xref: /llvm-project/clang/unittests/Format/FormatTestVerilog.cpp (revision 9fa2d74be415a3e30d811c0acc05c45e1c55759e)
1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "FormatTestBase.h"
10 
11 #define DEBUG_TYPE "format-test"
12 
13 namespace clang {
14 namespace format {
15 namespace test {
16 namespace {
17 class FormatTestVerilog : public test::FormatTestBase {
18 protected:
19   FormatStyle getDefaultStyle() const override {
20     return getLLVMStyle(FormatStyle::LK_Verilog);
21   }
22   std::string messUp(llvm::StringRef Code) const override {
23     return test::messUp(Code, /*HandleHash=*/false);
24   }
25 };
26 
27 TEST_F(FormatTestVerilog, Align) {
28   FormatStyle Style = getDefaultStyle();
29   Style.AlignConsecutiveAssignments.Enabled = true;
30   verifyFormat("x            <= x;\n"
31                "sfdbddfbdfbb <= x;\n"
32                "x             = x;",
33                Style);
34   verifyFormat("x            = x;\n"
35                "sfdbddfbdfbb = x;\n"
36                "x            = x;",
37                Style);
38   // Compound assignments are not aligned by default. '<=' is not a compound
39   // assignment.
40   verifyFormat("x            <= x;\n"
41                "sfdbddfbdfbb <= x;",
42                Style);
43   verifyFormat("x += x;\n"
44                "sfdbddfbdfbb <= x;",
45                Style);
46   verifyFormat("x <<= x;\n"
47                "sfdbddfbdfbb <= x;",
48                Style);
49   verifyFormat("x <<<= x;\n"
50                "sfdbddfbdfbb <= x;",
51                Style);
52   verifyFormat("x >>= x;\n"
53                "sfdbddfbdfbb <= x;",
54                Style);
55   verifyFormat("x >>>= x;\n"
56                "sfdbddfbdfbb <= x;",
57                Style);
58   Style.AlignConsecutiveAssignments.AlignCompound = true;
59   verifyFormat("x            <= x;\n"
60                "sfdbddfbdfbb <= x;",
61                Style);
62   verifyFormat("x            += x;\n"
63                "sfdbddfbdfbb <= x;",
64                Style);
65   verifyFormat("x            <<= x;\n"
66                "sfdbddfbdfbb  <= x;",
67                Style);
68   verifyFormat("x            <<<= x;\n"
69                "sfdbddfbdfbb   <= x;",
70                Style);
71   verifyFormat("x            >>= x;\n"
72                "sfdbddfbdfbb  <= x;",
73                Style);
74   verifyFormat("x            >>>= x;\n"
75                "sfdbddfbdfbb   <= x;",
76                Style);
77 }
78 
79 TEST_F(FormatTestVerilog, Assign) {
80   verifyFormat("assign mynet = enable;");
81   verifyFormat("assign (strong1, pull0) #1 mynet = enable;");
82   verifyFormat("assign #1 mynet = enable;");
83   verifyFormat("assign mynet = enable;");
84   // Test that assignments are on separate lines.
85   verifyFormat("assign mynet = enable,\n"
86                "       mynet1 = enable1;");
87   // Test that `<=` and `,` don't confuse it.
88   verifyFormat("assign mynet = enable1 <= enable2;");
89   verifyFormat("assign mynet = enable1 <= enable2,\n"
90                "       mynet1 = enable3;");
91   verifyFormat("assign mynet = enable,\n"
92                "       mynet1 = enable2 <= enable3;");
93   verifyFormat("assign mynet = enable(enable1, enable2);");
94 }
95 
96 TEST_F(FormatTestVerilog, BasedLiteral) {
97   verifyFormat("x = '0;");
98   verifyFormat("x = '1;");
99   verifyFormat("x = 'X;");
100   verifyFormat("x = 'x;");
101   verifyFormat("x = 'Z;");
102   verifyFormat("x = 'z;");
103   verifyFormat("x = 659;");
104   verifyFormat("x = 'h837ff;");
105   verifyFormat("x = 'o7460;");
106   verifyFormat("x = 4'b1001;");
107   verifyFormat("x = 5'D3;");
108   verifyFormat("x = 3'b01x;");
109   verifyFormat("x = 12'hx;");
110   verifyFormat("x = 16'hz;");
111   verifyFormat("x = -8'd6;");
112   verifyFormat("x = 4'shf;");
113   verifyFormat("x = -4'sd15;");
114   verifyFormat("x = 16'sd?;");
115 }
116 
117 TEST_F(FormatTestVerilog, Block) {
118   verifyFormat("begin\n"
119                "  x = x;\n"
120                "end");
121   verifyFormat("begin : x\n"
122                "  x = x;\n"
123                "end : x");
124   verifyFormat("begin\n"
125                "  x = x;\n"
126                "  x = x;\n"
127                "end");
128   verifyFormat("fork\n"
129                "  x = x;\n"
130                "join");
131   verifyFormat("fork\n"
132                "  x = x;\n"
133                "join_any");
134   verifyFormat("fork\n"
135                "  x = x;\n"
136                "join_none");
137   verifyFormat("generate\n"
138                "  x = x;\n"
139                "endgenerate");
140   verifyFormat("generate : x\n"
141                "  x = x;\n"
142                "endgenerate : x");
143   // Nested blocks.
144   verifyFormat("begin\n"
145                "  begin\n"
146                "  end\n"
147                "end");
148   verifyFormat("begin : x\n"
149                "  begin\n"
150                "  end\n"
151                "end : x");
152   verifyFormat("begin : x\n"
153                "  begin : x\n"
154                "  end : x\n"
155                "end : x");
156   verifyFormat("begin\n"
157                "  begin : x\n"
158                "  end : x\n"
159                "end");
160   // Test that 'disable fork' and 'rand join' don't get mistaken as blocks.
161   verifyFormat("disable fork;\n"
162                "x = x;");
163   verifyFormat("rand join x x;\n"
164                "x = x;");
165   // The begin keyword should not be indented if it is too long to fit on the
166   // same line.
167   verifyFormat("while (true) //\n"
168                "begin\n"
169                "  while (true) //\n"
170                "  begin\n"
171                "  end\n"
172                "end");
173   verifyFormat("while (true) //\n"
174                "begin : x\n"
175                "  while (true) //\n"
176                "  begin : x\n"
177                "  end : x\n"
178                "end : x");
179   verifyFormat("while (true) //\n"
180                "fork\n"
181                "  while (true) //\n"
182                "  fork\n"
183                "  join\n"
184                "join");
185   auto Style = getDefaultStyle();
186   Style.ColumnLimit = 17;
187   verifyFormat("while (true)\n"
188                "begin\n"
189                "  while (true)\n"
190                "  begin\n"
191                "  end\n"
192                "end",
193                "while (true) begin\n"
194                "  while (true) begin"
195                "  end\n"
196                "end",
197                Style);
198 }
199 
200 TEST_F(FormatTestVerilog, Case) {
201   verifyFormat("case (data)\n"
202                "endcase");
203   verifyFormat("casex (data)\n"
204                "endcase");
205   verifyFormat("casez (data)\n"
206                "endcase");
207   verifyFormat("case (data) inside\n"
208                "endcase");
209   verifyFormat("case (data)\n"
210                "  16'd0:\n"
211                "    result = 10'b0111111111;\n"
212                "endcase");
213   verifyFormat("case (data)\n"
214                "  xxxxxxxx:\n"
215                "    result = 10'b0111111111;\n"
216                "endcase");
217   // Test labels with multiple options.
218   verifyFormat("case (data)\n"
219                "  16'd0, 16'd1:\n"
220                "    result = 10'b0111111111;\n"
221                "endcase");
222   verifyFormat("case (data)\n"
223                "  16'd0, //\n"
224                "      16'd1:\n"
225                "    result = 10'b0111111111;\n"
226                "endcase");
227   // Test that blocks following labels are indented.
228   verifyFormat("case (data)\n"
229                "  16'd1: fork\n"
230                "    result = 10'b1011111111;\n"
231                "  join\n"
232                "endcase");
233   verifyFormat("case (data)\n"
234                "  16'd1: fork : x\n"
235                "    result = 10'b1011111111;\n"
236                "  join : x\n"
237                "endcase");
238   // Test default.
239   verifyFormat("case (data)\n"
240                "  default\n"
241                "    result = 10'b1011111111;\n"
242                "endcase");
243   verifyFormat("case (data)\n"
244                "  default:\n"
245                "    result = 10'b1011111111;\n"
246                "endcase");
247   // Test that question marks and colons don't get mistaken as labels.
248   verifyFormat("case (data)\n"
249                "  8'b1???????:\n"
250                "    instruction1(ir);\n"
251                "endcase");
252   verifyFormat("case (data)\n"
253                "  x ? 8'b1??????? : 1:\n"
254                "    instruction3(ir);\n"
255                "endcase");
256   // Test indention options.
257   auto Style = getDefaultStyle();
258   Style.IndentCaseLabels = false;
259   verifyFormat("case (data)\n"
260                "16'd0:\n"
261                "  result = 10'b0111111111;\n"
262                "endcase",
263                Style);
264   verifyFormat("case (data)\n"
265                "16'd0: begin\n"
266                "  result = 10'b0111111111;\n"
267                "end\n"
268                "endcase",
269                Style);
270   Style.IndentCaseLabels = true;
271   verifyFormat("case (data)\n"
272                "  16'd0:\n"
273                "    result = 10'b0111111111;\n"
274                "endcase",
275                Style);
276   verifyFormat("case (data)\n"
277                "  16'd0: begin\n"
278                "    result = 10'b0111111111;\n"
279                "  end\n"
280                "endcase",
281                Style);
282   // Other colons should not be mistaken as case colons.
283   Style = getDefaultStyle();
284   Style.BitFieldColonSpacing = FormatStyle::BFCS_None;
285   verifyFormat("case (x[1:0])\n"
286                "endcase",
287                Style);
288   verifyFormat("default:\n"
289                "  x[1:0] = x[1:0];",
290                Style);
291   Style.BitFieldColonSpacing = FormatStyle::BFCS_Both;
292   verifyFormat("case (x[1 : 0])\n"
293                "endcase",
294                Style);
295   verifyFormat("default:\n"
296                "  x[1 : 0] = x[1 : 0];",
297                Style);
298   Style = getDefaultStyle();
299   Style.SpacesInContainerLiterals = true;
300   verifyFormat("case ('{x : x, default : 9})\n"
301                "endcase",
302                Style);
303   verifyFormat("x = '{x : x, default : 9};", Style);
304   verifyFormat("default:\n"
305                "  x = '{x : x, default : 9};",
306                Style);
307   Style.SpacesInContainerLiterals = false;
308   verifyFormat("case ('{x: x, default: 9})\n"
309                "endcase",
310                Style);
311   verifyFormat("x = '{x: x, default: 9};", Style);
312   verifyFormat("default:\n"
313                "  x = '{x: x, default: 9};",
314                Style);
315   // When the line following the case label needs to be broken, the continuation
316   // should be indented correctly.
317   verifyFormat("case (data)\n"
318                "  16'd0:\n"
319                "    result = //\n"
320                "        10'b0111111111;\n"
321                "endcase");
322   verifyFormat("case (data)\n"
323                "  16'd0, //\n"
324                "      16'd1:\n"
325                "    result = //\n"
326                "        10'b0111111111;\n"
327                "endcase");
328   verifyFormat("case (data)\n"
329                "  16'd0:\n"
330                "    result = (10'b0111111111 + //\n"
331                "              10'b0111111111 + //\n"
332                "              10'b0111111111);\n"
333                "endcase");
334   verifyFormat("case (data)\n"
335                "  16'd0:\n"
336                "    result =              //\n"
337                "        (10'b0111111111 + //\n"
338                "         10'b0111111111 + //\n"
339                "         10'b0111111111);\n"
340                "endcase");
341   verifyFormat("case (data)\n"
342                "  16'd0:\n"
343                "    result =          //\n"
344                "        longfunction( //\n"
345                "            arg);\n"
346                "endcase");
347   verifyFormat("case (data)\n"
348                "  16'd0:\n"
349                "    //\n"
350                "    result = //\n"
351                "        10'b0111111111;\n"
352                "endcase");
353   verifyFormat("case (data)\n"
354                "  16'd0:\n"
355                "    //\n"
356                "\n"
357                "    //\n"
358                "    result = //\n"
359                "        10'b0111111111;\n"
360                "endcase");
361   Style = getDefaultStyle();
362   Style.ContinuationIndentWidth = 1;
363   verifyFormat("case (data)\n"
364                "  16'd0:\n"
365                "    result = //\n"
366                "     10'b0111111111;\n"
367                "endcase",
368                Style);
369   verifyFormat("case (data)\n"
370                "  16'd0:\n"
371                "    result =       //\n"
372                "     longfunction( //\n"
373                "      arg);\n"
374                "endcase",
375                Style);
376 }
377 
378 TEST_F(FormatTestVerilog, Coverage) {
379   verifyFormat("covergroup x\n"
380                "    @@(begin x);\n"
381                "endgroup");
382 }
383 
384 TEST_F(FormatTestVerilog, Declaration) {
385   verifyFormat("wire mynet;");
386   verifyFormat("wire mynet, mynet1;");
387   verifyFormat("wire mynet, //\n"
388                "     mynet1;");
389   verifyFormat("wire mynet = enable;");
390   verifyFormat("wire mynet = enable, mynet1;");
391   verifyFormat("wire mynet = enable, //\n"
392                "     mynet1;");
393   verifyFormat("wire mynet, mynet1 = enable;");
394   verifyFormat("wire mynet, //\n"
395                "     mynet1 = enable;");
396   verifyFormat("wire mynet = enable, mynet1 = enable;");
397   verifyFormat("wire mynet = enable, //\n"
398                "     mynet1 = enable;");
399   verifyFormat("wire (strong1, pull0) mynet;");
400   verifyFormat("wire (strong1, pull0) mynet, mynet1;");
401   verifyFormat("wire (strong1, pull0) mynet, //\n"
402                "                      mynet1;");
403   verifyFormat("wire (strong1, pull0) mynet = enable;");
404   verifyFormat("wire (strong1, pull0) mynet = enable, mynet1;");
405   verifyFormat("wire (strong1, pull0) mynet = enable, //\n"
406                "                      mynet1;");
407   verifyFormat("wire (strong1, pull0) mynet, mynet1 = enable;");
408   verifyFormat("wire (strong1, pull0) mynet, //\n"
409                "                      mynet1 = enable;");
410 }
411 
412 TEST_F(FormatTestVerilog, Delay) {
413   // Delay by the default unit.
414   verifyFormat("#0;");
415   verifyFormat("#1;");
416   verifyFormat("#10;");
417   verifyFormat("#1.5;");
418   // Explicit unit.
419   verifyFormat("#1fs;");
420   verifyFormat("#1.5fs;");
421   verifyFormat("#1ns;");
422   verifyFormat("#1.5ns;");
423   verifyFormat("#1us;");
424   verifyFormat("#1.5us;");
425   verifyFormat("#1ms;");
426   verifyFormat("#1.5ms;");
427   verifyFormat("#1s;");
428   verifyFormat("#1.5s;");
429   // The following expression should be on the same line.
430   verifyFormat("#1 x = x;");
431   verifyFormat("#1 x = x;", "#1\n"
432                             "x = x;");
433 }
434 
435 TEST_F(FormatTestVerilog, Enum) {
436   verifyFormat("enum { x } x;");
437   verifyFormat("typedef enum { x } x;");
438   verifyFormat("enum { red, yellow, green } x;");
439   verifyFormat("typedef enum { red, yellow, green } x;");
440   verifyFormat("enum integer { x } x;");
441   verifyFormat("typedef enum { x = 0 } x;");
442   verifyFormat("typedef enum { red = 0, yellow = 1, green = 2 } x;");
443   verifyFormat("typedef enum integer { x } x;");
444   verifyFormat("typedef enum bit [0 : 1] { x } x;");
445   verifyFormat("typedef enum { add = 10, sub[5], jmp[6 : 8] } E1;");
446   verifyFormat("typedef enum { add = 10, sub[5] = 0, jmp[6 : 8] = 1 } E1;");
447 }
448 
449 TEST_F(FormatTestVerilog, Headers) {
450   // Test headers with multiple ports.
451   verifyFormat("module mh1\n"
452                "    (input var int in1,\n"
453                "     input var shortreal in2,\n"
454                "     output tagged_st out);\n"
455                "endmodule");
456   // There should be a space following the type but not the variable name.
457   verifyFormat("module test\n"
458                "    (input wire [7 : 0] a,\n"
459                "     input wire b[7 : 0],\n"
460                "     input wire [7 : 0] c[7 : 0]);\n"
461                "endmodule");
462   // Ports should be grouped by types.
463   verifyFormat("module test\n"
464                "    (input [7 : 0] a,\n"
465                "     input signed [7 : 0] b, c, d);\n"
466                "endmodule");
467   verifyFormat("module test\n"
468                "    (input [7 : 0] a,\n"
469                "     (* x = x *) input signed [7 : 0] b, c, d);\n"
470                "endmodule");
471   verifyFormat("module test\n"
472                "    (input [7 : 0] a = 0,\n"
473                "     input signed [7 : 0] b = 0, c = 0, d = 0);\n"
474                "endmodule");
475   verifyFormat("module test\n"
476                "    #(parameter x)\n"
477                "    (input [7 : 0] a,\n"
478                "     input signed [7 : 0] b, c, d);\n"
479                "endmodule");
480   // When a line needs to be broken, ports of the same type should be aligned to
481   // the same column.
482   verifyFormat("module test\n"
483                "    (input signed [7 : 0] b, c, //\n"
484                "                          d);\n"
485                "endmodule");
486   verifyFormat("module test\n"
487                "    ((* x = x *) input signed [7 : 0] b, c, //\n"
488                "                                      d);\n"
489                "endmodule");
490   verifyFormat("module test\n"
491                "    (input signed [7 : 0] b = 0, c, //\n"
492                "                          d);\n"
493                "endmodule");
494   verifyFormat("module test\n"
495                "    (input signed [7 : 0] b, c = 0, //\n"
496                "                          d);\n"
497                "endmodule");
498   verifyFormat("module test\n"
499                "    (input signed [7 : 0] b, c, //\n"
500                "                          d = 0);\n"
501                "endmodule");
502   verifyFormat("module test\n"
503                "    (input wire logic signed [7 : 0][0 : 1] b, c, //\n"
504                "                                            d);\n"
505                "endmodule");
506   verifyFormat("module test\n"
507                "    (input signed [7 : 0] b, //\n"
508                "                          c, //\n"
509                "                          d);\n"
510                "endmodule");
511   verifyFormat("module test\n"
512                "    (input [7 : 0] a,\n"
513                "     input signed [7 : 0] b, //\n"
514                "                          c, //\n"
515                "                          d);\n"
516                "endmodule");
517   verifyFormat("module test\n"
518                "    (input signed [7 : 0] b, //\n"
519                "                          c, //\n"
520                "                          d,\n"
521                "     output signed [7 : 0] h);\n"
522                "endmodule");
523   // With a modport.
524   verifyFormat("module m\n"
525                "    (i2.master i);\n"
526                "endmodule");
527   verifyFormat("module m\n"
528                "    (i2.master i, ii);\n"
529                "endmodule");
530   verifyFormat("module m\n"
531                "    (i2.master i, //\n"
532                "               ii);\n"
533                "endmodule");
534   verifyFormat("module m\n"
535                "    (i2.master i,\n"
536                "     input ii);\n"
537                "endmodule");
538   verifyFormat("module m\n"
539                "    (i2::i2.master i);\n"
540                "endmodule");
541   verifyFormat("module m\n"
542                "    (i2::i2.master i, ii);\n"
543                "endmodule");
544   verifyFormat("module m\n"
545                "    (i2::i2.master i, //\n"
546                "                   ii);\n"
547                "endmodule");
548   verifyFormat("module m\n"
549                "    (i2::i2.master i,\n"
550                "     input ii);\n"
551                "endmodule");
552   verifyFormat("module m\n"
553                "    (i2::i2 i);\n"
554                "endmodule");
555   verifyFormat("module m\n"
556                "    (i2::i2 i, ii);\n"
557                "endmodule");
558   verifyFormat("module m\n"
559                "    (i2::i2 i, //\n"
560                "            ii);\n"
561                "endmodule");
562   verifyFormat("module m\n"
563                "    (i2::i2 i,\n"
564                "     input ii);\n"
565                "endmodule");
566   // With a macro in the names.
567   verifyFormat("module m\n"
568                "    (input var `x a, b);\n"
569                "endmodule");
570   verifyFormat("module m\n"
571                "    (input var `x a, //\n"
572                "                  b);\n"
573                "endmodule");
574   verifyFormat("module m\n"
575                "    (input var x `a, b);\n"
576                "endmodule");
577   verifyFormat("module m\n"
578                "    (input var x `a, //\n"
579                "                 b);\n"
580                "endmodule");
581   // A line comment shouldn't disrupt the indentation of the port list.
582   verifyFormat("extern module x\n"
583                "    (//\n"
584                "     output y);");
585   verifyFormat("extern module x\n"
586                "    #(//\n"
587                "      parameter x)\n"
588                "    (//\n"
589                "     output y);");
590   // With a concatenation in the names.
591   auto Style = getDefaultStyle();
592   Style.ColumnLimit = 40;
593   verifyFormat("`define X(x)                           \\\n"
594                "  module test                          \\\n"
595                "      (input var x``x a, b);",
596                Style);
597   verifyFormat("`define X(x)                           \\\n"
598                "  module test                          \\\n"
599                "      (input var x``x aaaaaaaaaaaaaaa, \\\n"
600                "                      b);",
601                Style);
602   verifyFormat("`define X(x)                           \\\n"
603                "  module test                          \\\n"
604                "      (input var x a``x, b);",
605                Style);
606   verifyFormat("`define X(x)                           \\\n"
607                "  module test                          \\\n"
608                "      (input var x aaaaaaaaaaaaaaa``x, \\\n"
609                "                   b);",
610                Style);
611 }
612 
613 TEST_F(FormatTestVerilog, Hierarchy) {
614   verifyFormat("module x;\n"
615                "endmodule");
616   // Test that the end label is on the same line as the end keyword.
617   verifyFormat("module x;\n"
618                "endmodule : x");
619   // Test that things inside are indented.
620   verifyFormat("module x;\n"
621                "  generate\n"
622                "  endgenerate\n"
623                "endmodule");
624   verifyFormat("program x;\n"
625                "  generate\n"
626                "  endgenerate\n"
627                "endprogram");
628   verifyFormat("interface x;\n"
629                "  generate\n"
630                "  endgenerate\n"
631                "endinterface");
632   verifyFormat("task x;\n"
633                "  generate\n"
634                "  endgenerate\n"
635                "endtask");
636   verifyFormat("function x;\n"
637                "  generate\n"
638                "  endgenerate\n"
639                "endfunction");
640   verifyFormat("class x;\n"
641                "  generate\n"
642                "  endgenerate\n"
643                "endclass");
644   // Test that they nest.
645   verifyFormat("module x;\n"
646                "  program x;\n"
647                "    program x;\n"
648                "    endprogram\n"
649                "  endprogram\n"
650                "endmodule");
651   // Test that an extern declaration doesn't change the indentation.
652   verifyFormat("extern module x;\n"
653                "x = x;");
654   // Test complex headers
655   verifyFormat("extern module x\n"
656                "    import x.x::x::*;\n"
657                "    import x;\n"
658                "    #(parameter x)\n"
659                "    (output x);");
660   verifyFormat("module x\n"
661                "    import x.x::x::*;\n"
662                "    import x;\n"
663                "    #(parameter x)\n"
664                "    (output x);\n"
665                "  generate\n"
666                "  endgenerate\n"
667                "endmodule : x");
668   verifyFormat("virtual class x\n"
669                "    (x)\n"
670                "    extends x(x)\n"
671                "    implements x, x, x;\n"
672                "  generate\n"
673                "  endgenerate\n"
674                "endclass : x");
675   verifyFormat("function automatic logic [1 : 0] x\n"
676                "    (input x);\n"
677                "  generate\n"
678                "  endgenerate\n"
679                "endfunction : x");
680 }
681 
682 TEST_F(FormatTestVerilog, Identifiers) {
683   // Escaped identifiers should not be split.
684   verifyFormat("\\busa+index");
685   verifyFormat("\\-clock");
686   verifyFormat("\\***error-condition***");
687   verifyFormat("\\net1\\/net2");
688   verifyFormat("\\{a,b}");
689   verifyFormat("\\a*(b+c)");
690   // Escaped identifiers can't be joined with the next token.  Extra space
691   // should be removed.
692   verifyFormat("\\busa+index ;", "\\busa+index\n"
693                                  ";");
694   verifyFormat("\\busa+index ;", "\\busa+index\r\n"
695                                  ";");
696   verifyFormat("\\busa+index ;", "\\busa+index  ;");
697   verifyFormat("\\busa+index ;", "\\busa+index\n"
698                                  " ;");
699   verifyFormat("\\busa+index ;");
700   verifyFormat("(\\busa+index );");
701   verifyFormat("\\busa+index \\busa+index ;");
702 }
703 
704 TEST_F(FormatTestVerilog, If) {
705   verifyFormat("if (x)\n"
706                "  x = x;");
707   verifyFormat("unique if (x)\n"
708                "  x = x;");
709   verifyFormat("unique0 if (x)\n"
710                "  x = x;");
711   verifyFormat("priority if (x)\n"
712                "  x = x;");
713   verifyFormat("if (x)\n"
714                "  x = x;\n"
715                "x = x;");
716 
717   // Test else
718   verifyFormat("if (x)\n"
719                "  x = x;\n"
720                "else if (x)\n"
721                "  x = x;\n"
722                "else\n"
723                "  x = x;");
724   verifyFormat("if (x) begin\n"
725                "  x = x;\n"
726                "end else if (x) begin\n"
727                "  x = x;\n"
728                "end else begin\n"
729                "  x = x;\n"
730                "end");
731   verifyFormat("if (x) begin : x\n"
732                "  x = x;\n"
733                "end : x else if (x) begin : x\n"
734                "  x = x;\n"
735                "end : x else begin : x\n"
736                "  x = x;\n"
737                "end : x");
738 
739   // Test block keywords.
740   verifyFormat("if (x) begin\n"
741                "  x = x;\n"
742                "end");
743   verifyFormat("if (x) begin : x\n"
744                "  x = x;\n"
745                "end : x");
746   verifyFormat("if (x) begin\n"
747                "  x = x;\n"
748                "  x = x;\n"
749                "end");
750   verifyFormat("if (x) fork\n"
751                "  x = x;\n"
752                "join");
753   verifyFormat("if (x) fork\n"
754                "  x = x;\n"
755                "join_any");
756   verifyFormat("if (x) fork\n"
757                "  x = x;\n"
758                "join_none");
759   verifyFormat("if (x) generate\n"
760                "  x = x;\n"
761                "endgenerate");
762   verifyFormat("if (x) generate : x\n"
763                "  x = x;\n"
764                "endgenerate : x");
765 
766   // Test that concatenation braces don't get regarded as blocks.
767   verifyFormat("if (x)\n"
768                "  {x} = x;");
769   verifyFormat("if (x)\n"
770                "  x = {x};");
771   verifyFormat("if (x)\n"
772                "  x = {x};\n"
773                "else\n"
774                "  {x} = {x};");
775 
776   // With attributes.
777   verifyFormat("(* x *) if (x)\n"
778                "  x = x;");
779   verifyFormat("(* x = \"x\" *) if (x)\n"
780                "  x = x;");
781   verifyFormat("(* x, x = \"x\" *) if (x)\n"
782                "  x = x;");
783 
784   // Assert are treated similar to if.  But the else parts should not be
785   // chained.
786   verifyFormat("assert (x);");
787   verifyFormat("assert (x)\n"
788                "  $info();");
789   verifyFormat("assert (x)\n"
790                "  $info();\n"
791                "else\n"
792                "  $error();");
793   verifyFormat("assert (x)\n"
794                "else\n"
795                "  $error();");
796   verifyFormat("assert (x)\n"
797                "else begin\n"
798                "end");
799   verifyFormat("assert (x)\n"
800                "else\n"
801                "  if (x)\n"
802                "    $error();");
803   verifyFormat("assert (x)\n"
804                "  $info();\n"
805                "else\n"
806                "  if (x)\n"
807                "    $error();");
808   verifyFormat("assert (x)\n"
809                "  $info();\n"
810                "else\n"
811                "  if (x)\n"
812                "    $error();\n"
813                "  else\n"
814                "    $error();");
815   verifyFormat("assert (x)\n"
816                "  $info();\n"
817                "else\n"
818                "  if (x)\n"
819                "    $error();\n"
820                "  else if (x)\n"
821                "    $error();\n"
822                "  else\n"
823                "    $error();");
824   // The body is optional for asserts.  The next line should not be indented if
825   // the statement already ended with a semicolon.
826   verifyFormat("assert (x);\n"
827                "x = x;");
828   verifyFormat("if (x)\n"
829                "  assert (x);\n"
830                "else if (x) begin\n"
831                "end else begin\n"
832                "end");
833   verifyFormat("if (x)\n"
834                "  assert (x);\n"
835                "else begin\n"
836                "end");
837   verifyFormat("if (x)\n"
838                "  assert (x)\n"
839                "  else begin\n"
840                "  end");
841   // Other keywords.
842   verifyFormat("assume (x)\n"
843                "  $info();");
844   verifyFormat("cover (x)\n"
845                "  $info();");
846   verifyFormat("restrict (x)\n"
847                "  $info();");
848   verifyFormat("assert #0 (x)\n"
849                "  $info();");
850   verifyFormat("assert final (x)\n"
851                "  $info();");
852   verifyFormat("cover #0 (x)\n"
853                "  $info();");
854   verifyFormat("cover final (x)\n"
855                "  $info();");
856 
857   // The space around parentheses options should work.
858   auto Style = getDefaultStyle();
859   verifyFormat("if (x)\n"
860                "  x = x;\n"
861                "else if (x)\n"
862                "  x = x;",
863                Style);
864   verifyFormat("assert (x);", Style);
865   verifyFormat("assert #0 (x);", Style);
866   verifyFormat("assert (x)\n"
867                "else\n"
868                "  if (x)\n"
869                "    x = x;",
870                Style);
871   Style.SpacesInParens = FormatStyle::SIPO_Custom;
872   Style.SpacesInParensOptions.InConditionalStatements = true;
873   verifyFormat("if ( x )\n"
874                "  x = x;\n"
875                "else if ( x )\n"
876                "  x = x;",
877                Style);
878   verifyFormat("assert ( x );", Style);
879   verifyFormat("assert #0 ( x );", Style);
880   verifyFormat("assert ( x )\n"
881                "else\n"
882                "  if ( x )\n"
883                "    x = x;",
884                Style);
885 }
886 
887 TEST_F(FormatTestVerilog, Instantiation) {
888   // Without ports.
889   verifyFormat("ffnand ff1;");
890   // With named ports.
891   verifyFormat("ffnand ff1(.qbar(out1),\n"
892                "           .clear(in1),\n"
893                "           .preset(in2));");
894   // With wildcard.
895   verifyFormat("ffnand ff1(.qbar(out1),\n"
896                "           .clear(in1),\n"
897                "           .preset(in2),\n"
898                "           .*);");
899   verifyFormat("ffnand ff1(.*,\n"
900                "           .qbar(out1),\n"
901                "           .clear(in1),\n"
902                "           .preset(in2));");
903   // With unconnected ports.
904   verifyFormat("ffnand ff1(.q(),\n"
905                "           .qbar(out1),\n"
906                "           .clear(in1),\n"
907                "           .preset(in2));");
908   verifyFormat("ffnand ff1(.q(),\n"
909                "           .qbar(),\n"
910                "           .clear(),\n"
911                "           .preset());");
912   verifyFormat("ffnand ff1(,\n"
913                "           .qbar(out1),\n"
914                "           .clear(in1),\n"
915                "           .preset(in2));");
916   // With positional ports.
917   verifyFormat("ffnand ff1(out1,\n"
918                "           in1,\n"
919                "           in2);");
920   verifyFormat("ffnand ff1(,\n"
921                "           out1,\n"
922                "           in1,\n"
923                "           in2);");
924   // Multiple instantiations.
925   verifyFormat("ffnand ff1(.q(),\n"
926                "           .qbar(out1),\n"
927                "           .clear(in1),\n"
928                "           .preset(in2)),\n"
929                "       ff1(.q(),\n"
930                "           .qbar(out1),\n"
931                "           .clear(in1),\n"
932                "           .preset(in2));");
933   verifyFormat("ffnand //\n"
934                "    ff1(.q(),\n"
935                "        .qbar(out1),\n"
936                "        .clear(in1),\n"
937                "        .preset(in2)),\n"
938                "    ff1(.q(),\n"
939                "        .qbar(out1),\n"
940                "        .clear(in1),\n"
941                "        .preset(in2));");
942   // With breaking between instance ports disabled.
943   auto Style = getDefaultStyle();
944   Style.VerilogBreakBetweenInstancePorts = false;
945   verifyFormat("ffnand ff1;", Style);
946   verifyFormat("ffnand ff1(.qbar(out1), .clear(in1), .preset(in2), .*);",
947                Style);
948   verifyFormat("ffnand ff1(out1, in1, in2);", Style);
949   verifyFormat("ffnand ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n"
950                "       ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));",
951                Style);
952   verifyFormat("ffnand //\n"
953                "    ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n"
954                "    ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));",
955                Style);
956 }
957 
958 TEST_F(FormatTestVerilog, Loop) {
959   verifyFormat("foreach (x[x])\n"
960                "  x = x;");
961   verifyFormat("repeat (x)\n"
962                "  x = x;");
963   verifyFormat("foreach (x[x]) begin\n"
964                "end");
965   verifyFormat("repeat (x) begin\n"
966                "end");
967   auto Style = getDefaultStyle();
968   Style.SpacesInParens = FormatStyle::SIPO_Custom;
969   Style.SpacesInParensOptions.InConditionalStatements = true;
970   verifyFormat("foreach ( x[x] )\n"
971                "  x = x;",
972                Style);
973   verifyFormat("repeat ( x )\n"
974                "  x = x;",
975                Style);
976 }
977 
978 TEST_F(FormatTestVerilog, Operators) {
979   // Test that unary operators are not followed by space.
980   verifyFormat("x = +x;");
981   verifyFormat("x = -x;");
982   verifyFormat("x = !x;");
983   verifyFormat("x = ~x;");
984   verifyFormat("x = &x;");
985   verifyFormat("x = ~&x;");
986   verifyFormat("x = |x;");
987   verifyFormat("x = ~|x;");
988   verifyFormat("x = ^x;");
989   verifyFormat("x = ~^x;");
990   verifyFormat("x = ^~x;");
991   verifyFormat("x = ++x;");
992   verifyFormat("x = --x;");
993 
994   // Test that `*` and `*>` are binary.
995   verifyFormat("x = x * x;");
996   verifyFormat("x = (x * x);");
997   verifyFormat("(opcode *> o1) = 6.1;");
998   verifyFormat("(C, D *> Q) = 18;");
999   // The wildcard import is not a binary operator.
1000   verifyFormat("import p::*;");
1001 
1002   // Test that operators don't get split.
1003   verifyFormat("x = x++;");
1004   verifyFormat("x = x--;");
1005   verifyFormat("x = x ** x;");
1006   verifyFormat("x = x << x;");
1007   verifyFormat("x = x >> x;");
1008   verifyFormat("x = x <<< x;");
1009   verifyFormat("x = x >>> x;");
1010   verifyFormat("x = x <= x;");
1011   verifyFormat("x = x >= x;");
1012   verifyFormat("x = x == x;");
1013   verifyFormat("x = x != x;");
1014   verifyFormat("x = x === x;");
1015   verifyFormat("x = x !== x;");
1016   verifyFormat("x = x ==? x;");
1017   verifyFormat("x = x !=? x;");
1018   verifyFormat("x = x ~^ x;");
1019   verifyFormat("x = x ^~ x;");
1020   verifyFormat("x = x && x;");
1021   verifyFormat("x = x || x;");
1022   verifyFormat("x = x -> x;");
1023   verifyFormat("x = x <-> x;");
1024   verifyFormat("x += x;");
1025   verifyFormat("x -= x;");
1026   verifyFormat("x *= x;");
1027   verifyFormat("x /= x;");
1028   verifyFormat("x %= x;");
1029   verifyFormat("x &= x;");
1030   verifyFormat("x ^= x;");
1031   verifyFormat("x |= x;");
1032   verifyFormat("x <<= x;");
1033   verifyFormat("x >>= x;");
1034   verifyFormat("x <<<= x;");
1035   verifyFormat("x >>>= x;");
1036   verifyFormat("x <= x;");
1037 
1038   // Test that space is added between operators.
1039   verifyFormat("x = x < -x;", "x=x<-x;");
1040   verifyFormat("x = x << -x;", "x=x<<-x;");
1041   verifyFormat("x = x <<< -x;", "x=x<<<-x;");
1042 
1043   // Test that operators that are C++ identifiers get treated as operators.
1044   verifyFormat("solve s before d;");                       // before
1045   verifyFormat("binsof(i) intersect {0};");                // intersect
1046   verifyFormat("req dist {1};");                           // dist
1047   verifyFormat("a inside {b, c};");                        // inside
1048   verifyFormat("bus.randomize() with { atype == low; };"); // with
1049 }
1050 
1051 TEST_F(FormatTestVerilog, Preprocessor) {
1052   auto Style = getDefaultStyle();
1053   Style.ColumnLimit = 20;
1054 
1055   // Macro definitions.
1056   verifyFormat("`define X          \\\n"
1057                "  if (x)           \\\n"
1058                "    x = x;",
1059                "`define X if(x)x=x;", Style);
1060   verifyFormat("`define X(x)       \\\n"
1061                "  if (x)           \\\n"
1062                "    x = x;",
1063                "`define X(x) if(x)x=x;", Style);
1064   verifyFormat("`define X          \\\n"
1065                "  x = x;           \\\n"
1066                "  x = x;",
1067                "`define X x=x;x=x;", Style);
1068   // Macro definitions with invocations inside.
1069   verifyFormat("`define LIST       \\\n"
1070                "  `ENTRY           \\\n"
1071                "  `ENTRY",
1072                "`define LIST \\\n"
1073                "`ENTRY \\\n"
1074                "`ENTRY",
1075                Style);
1076   verifyFormat("`define LIST       \\\n"
1077                "  `x = `x;         \\\n"
1078                "  `x = `x;",
1079                "`define LIST \\\n"
1080                "`x = `x; \\\n"
1081                "`x = `x;",
1082                Style);
1083   verifyFormat("`define LIST       \\\n"
1084                "  `x = `x;         \\\n"
1085                "  `x = `x;",
1086                "`define LIST `x=`x;`x=`x;", Style);
1087   // Macro invocations.
1088   verifyFormat("`x = (`x1 + `x2 + x);");
1089   // Lines starting with a preprocessor directive should not be indented.
1090   std::string Directives[] = {
1091       "begin_keywords",
1092       "celldefine",
1093       "default_nettype",
1094       "define",
1095       "else",
1096       "elsif",
1097       "end_keywords",
1098       "endcelldefine",
1099       "endif",
1100       "ifdef",
1101       "ifndef",
1102       "include",
1103       "line",
1104       "nounconnected_drive",
1105       "pragma",
1106       "resetall",
1107       "timescale",
1108       "unconnected_drive",
1109       "undef",
1110       "undefineall",
1111   };
1112   for (auto &Name : Directives) {
1113     verifyFormat("if (x)\n"
1114                  "`" +
1115                      Name +
1116                      "\n"
1117                      "  ;",
1118                  "if (x)\n"
1119                  "`" +
1120                      Name +
1121                      "\n"
1122                      ";",
1123                  Style);
1124   }
1125   // Lines starting with a regular macro invocation should be indented as a
1126   // normal line.
1127   verifyFormat("if (x)\n"
1128                "  `x = `x;\n"
1129                "`timescale 1ns / 1ps",
1130                "if (x)\n"
1131                "`x = `x;\n"
1132                "`timescale 1ns / 1ps",
1133                Style);
1134   verifyFormat("if (x)\n"
1135                "`timescale 1ns / 1ps\n"
1136                "  `x = `x;",
1137                "if (x)\n"
1138                "`timescale 1ns / 1ps\n"
1139                "`x = `x;",
1140                Style);
1141   std::string NonDirectives[] = {
1142       // For `__FILE__` and `__LINE__`, although the standard classifies them as
1143       // preprocessor directives, they are used like regular macros.
1144       "__FILE__", "__LINE__", "elif", "foo", "x",
1145   };
1146   for (auto &Name : NonDirectives) {
1147     verifyFormat("if (x)\n"
1148                  "  `" +
1149                      Name + ";",
1150                  "if (x)\n"
1151                  "`" +
1152                      Name +
1153                      "\n"
1154                      ";",
1155                  Style);
1156   }
1157 }
1158 
1159 TEST_F(FormatTestVerilog, Primitive) {
1160   verifyFormat("primitive multiplexer\n"
1161                "    (mux, control, dataA, dataB);\n"
1162                "  output mux;\n"
1163                "  input control, dataA, dataB;\n"
1164                "  table\n"
1165                "    0 1 ? : 1;\n"
1166                "    0 0 ? : 0;\n"
1167                "    1 ? 1 : 1;\n"
1168                "    1 ? 0 : 0;\n"
1169                "    x 0 0 : 0;\n"
1170                "    x 1 1 : 1;\n"
1171                "  endtable\n"
1172                "endprimitive");
1173   verifyFormat("primitive latch\n"
1174                "    (q, ena_, data);\n"
1175                "  output q;\n"
1176                "  reg q;\n"
1177                "  input ena_, data;\n"
1178                "  table\n"
1179                "    0 1 : ? : 1;\n"
1180                "    0 0 : ? : 0;\n"
1181                "    1 ? : ? : -;\n"
1182                "    ? * : ? : -;\n"
1183                "  endtable\n"
1184                "endprimitive");
1185   verifyFormat("primitive d\n"
1186                "    (q, clock, data);\n"
1187                "  output q;\n"
1188                "  reg q;\n"
1189                "  input clock, data;\n"
1190                "  table\n"
1191                "    (01) 0 : ? : 0;\n"
1192                "    (01) 1 : ? : 1;\n"
1193                "    (0?) 1 : 1 : 1;\n"
1194                "    (0?) 0 : 0 : 0;\n"
1195                "    (?0) ? : ? : -;\n"
1196                "    (?\?) ? : ? : -;\n"
1197                "  endtable\n"
1198                "endprimitive");
1199 }
1200 
1201 TEST_F(FormatTestVerilog, Streaming) {
1202   verifyFormat("x = {>>{j}};");
1203   verifyFormat("x = {>>byte{j}};");
1204   verifyFormat("x = {<<{j}};");
1205   verifyFormat("x = {<<byte{j}};");
1206   verifyFormat("x = {<<16{j}};");
1207   verifyFormat("x = {<<{8'b0011_0101}};");
1208   verifyFormat("x = {<<4{6'b11_0101}};");
1209   verifyFormat("x = {>>4{6'b11_0101}};");
1210   verifyFormat("x = {<<2{{<<{4'b1101}}}};");
1211   verifyFormat("bit [96 : 1] y = {>>{a, b, c}};");
1212   verifyFormat("int j = {>>{a, b, c}};");
1213   verifyFormat("{>>{a, b, c}} = 23'b1;");
1214   verifyFormat("{>>{a, b, c}} = x;");
1215   verifyFormat("{>>{j}} = x;");
1216   verifyFormat("{>>byte{j}} = x;");
1217   verifyFormat("{<<{j}} = x;");
1218   verifyFormat("{<<byte{j}} = x;");
1219 }
1220 
1221 TEST_F(FormatTestVerilog, StringLiteral) {
1222   // Long strings should be broken.
1223   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1224    "xxxx"});)",
1225                R"(x({"xxxxxxxxxxxxxxxx xxxx"});)",
1226                getStyleWithColumns(getDefaultStyle(), 23));
1227   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx",
1228    " xxxx"});)",
1229                R"(x({"xxxxxxxxxxxxxxxx xxxx"});)",
1230                getStyleWithColumns(getDefaultStyle(), 22));
1231   // Braces should be added when they don't already exist.
1232   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1233    "xxxx"});)",
1234                R"(x("xxxxxxxxxxxxxxxx xxxx");)",
1235                getStyleWithColumns(getDefaultStyle(), 23));
1236   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx",
1237    " xxxx"});)",
1238                R"(x("xxxxxxxxxxxxxxxx xxxx");)",
1239                getStyleWithColumns(getDefaultStyle(), 22));
1240   verifyFormat(R"(x({{"xxxxxxxxxxxxxxxx ",
1241     "xxxx"} == x});)",
1242                R"(x({"xxxxxxxxxxxxxxxx xxxx" == x});)",
1243                getStyleWithColumns(getDefaultStyle(), 24));
1244   verifyFormat(R"(string x = {"xxxxxxxxxxxxxxxx ",
1245             "xxxxxxxx"};)",
1246                R"(string x = "xxxxxxxxxxxxxxxx xxxxxxxx";)",
1247                getStyleWithColumns(getDefaultStyle(), 32));
1248   // Space around braces should be correct.
1249   auto Style = getStyleWithColumns(getDefaultStyle(), 24);
1250   Style.Cpp11BracedListStyle = false;
1251   verifyFormat(R"(x({ "xxxxxxxxxxxxxxxx ",
1252     "xxxx" });)",
1253                R"(x("xxxxxxxxxxxxxxxx xxxx");)", Style);
1254   // Braces should not be added twice.
1255   verifyFormat(R"(x({"xxxxxxxx",
1256    "xxxxxxxx",
1257    "xxxxxx"});)",
1258                R"(x("xxxxxxxxxxxxxxxxxxxxxx");)",
1259                getStyleWithColumns(getDefaultStyle(), 14));
1260   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1261    "xxxxxxxxxxxxxxxx ",
1262    "xxxx"});)",
1263                R"(x("xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxx");)",
1264                getStyleWithColumns(getDefaultStyle(), 23));
1265   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1266    "xxxxxxxxxxxxxxxx ",
1267    "xxxx"});)",
1268                R"(x({"xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx ", "xxxx"});)",
1269                getStyleWithColumns(getDefaultStyle(), 23));
1270   // import/export "DPI"/"DPI-C" cannot be split.
1271   verifyFormat(R"(import
1272     "DPI-C" function void foo
1273     ();)",
1274                R"(import "DPI-C" function void foo();)",
1275                getStyleWithColumns(getDefaultStyle(), 23));
1276   verifyFormat(R"(export "DPI-C" function foo;)",
1277                R"(export "DPI-C" function foo;)",
1278                getStyleWithColumns(getDefaultStyle(), 23));
1279   // These kinds of strings don't exist in Verilog.
1280   verifyNoCrash(R"(x(@"xxxxxxxxxxxxxxxx xxxx");)",
1281                 getStyleWithColumns(getDefaultStyle(), 23));
1282   verifyNoCrash(R"(x(u"xxxxxxxxxxxxxxxx xxxx");)",
1283                 getStyleWithColumns(getDefaultStyle(), 23));
1284   verifyNoCrash(R"(x(u8"xxxxxxxxxxxxxxxx xxxx");)",
1285                 getStyleWithColumns(getDefaultStyle(), 23));
1286   verifyNoCrash(R"(x(_T("xxxxxxxxxxxxxxxx xxxx"));)",
1287                 getStyleWithColumns(getDefaultStyle(), 23));
1288 }
1289 
1290 TEST_F(FormatTestVerilog, StructLiteral) {
1291   verifyFormat("c = '{0, 0.0};");
1292   verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};");
1293   verifyFormat("c = '{a: 0, b: 0.0};");
1294   verifyFormat("c = '{a: 0, b: 0.0, default: 0};");
1295   verifyFormat("c = ab'{a: 0, b: 0.0};");
1296   verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};");
1297   verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};");
1298   verifyFormat("d = {int: 1, shortreal: 1.0};");
1299   verifyFormat("d = ab'{int: 1, shortreal: 1.0};");
1300   verifyFormat("c = '{default: 0};");
1301   auto Style = getDefaultStyle();
1302   Style.SpacesInContainerLiterals = true;
1303   verifyFormat("c = '{a : 0, b : 0.0};", Style);
1304   verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style);
1305   verifyFormat("c = ab'{a : 0, b : 0.0};", Style);
1306   verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style);
1307 
1308   // It should be indented correctly when the line has to break.
1309   verifyFormat("c = //\n"
1310                "    '{default: 0};");
1311   Style = getDefaultStyle();
1312   Style.ContinuationIndentWidth = 2;
1313   verifyFormat("c = //\n"
1314                "  '{default: 0};",
1315                Style);
1316 }
1317 
1318 TEST_F(FormatTestVerilog, StructuredProcedure) {
1319   // Blocks should be indented correctly.
1320   verifyFormat("initial begin\n"
1321                "end");
1322   verifyFormat("initial begin\n"
1323                "  x <= x;\n"
1324                "  x <= x;\n"
1325                "end");
1326   verifyFormat("initial\n"
1327                "  x <= x;\n"
1328                "x <= x;");
1329   verifyFormat("always @(x) begin\n"
1330                "end");
1331   verifyFormat("always @(x) begin\n"
1332                "  x <= x;\n"
1333                "  x <= x;\n"
1334                "end");
1335   verifyFormat("always @(x)\n"
1336                "  x <= x;\n"
1337                "x <= x;");
1338   // Various keywords.
1339   verifyFormat("always @(x)\n"
1340                "  x <= x;");
1341   verifyFormat("always @(posedge x)\n"
1342                "  x <= x;");
1343   verifyFormat("always @(posedge x or posedge y)\n"
1344                "  x <= x;");
1345   verifyFormat("always @(posedge x, posedge y)\n"
1346                "  x <= x;");
1347   verifyFormat("always @(negedge x, negedge y)\n"
1348                "  x <= x;");
1349   verifyFormat("always @(edge x, edge y)\n"
1350                "  x <= x;");
1351   verifyFormat("always\n"
1352                "  x <= x;");
1353   verifyFormat("always @*\n"
1354                "  x <= x;");
1355   verifyFormat("always @(*)\n"
1356                "  x <= x;");
1357   verifyFormat("always_comb\n"
1358                "  x <= x;");
1359   verifyFormat("always_latch @(x)\n"
1360                "  x <= x;");
1361   verifyFormat("always_ff @(posedge x)\n"
1362                "  x <= x;");
1363   verifyFormat("initial\n"
1364                "  x <= x;");
1365   verifyFormat("final\n"
1366                "  x <= x;");
1367   verifyFormat("forever\n"
1368                "  x <= x;");
1369 }
1370 } // namespace
1371 } // namespace test
1372 } // namespace format
1373 } // namespace clang
1374