xref: /llvm-project/clang/unittests/Format/FormatTestVerilog.cpp (revision 60e12068ffeb96aa4e56c8dcff3442e516b27ab6)
1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "FormatTestUtils.h"
10 #include "clang/Format/Format.h"
11 #include "llvm/Support/Debug.h"
12 #include "gtest/gtest.h"
13 
14 #define DEBUG_TYPE "format-test"
15 
16 namespace clang {
17 namespace format {
18 
19 class FormatTestVerilog : public ::testing::Test {
20 protected:
21   static std::string format(llvm::StringRef Code, unsigned Offset,
22                             unsigned Length, const FormatStyle &Style) {
23     LLVM_DEBUG(llvm::errs() << "---\n");
24     LLVM_DEBUG(llvm::errs() << Code << "\n\n");
25     std::vector<tooling::Range> Ranges(1, tooling::Range(Offset, Length));
26     tooling::Replacements Replaces = reformat(Style, Code, Ranges);
27     auto Result = applyAllReplacements(Code, Replaces);
28     EXPECT_TRUE(static_cast<bool>(Result));
29     LLVM_DEBUG(llvm::errs() << "\n" << *Result << "\n\n");
30     return *Result;
31   }
32 
33   static std::string
34   format(llvm::StringRef Code,
35          const FormatStyle &Style = getLLVMStyle(FormatStyle::LK_Verilog)) {
36     return format(Code, 0, Code.size(), Style);
37   }
38 
39   static void verifyFormat(
40       llvm::StringRef Code,
41       const FormatStyle &Style = getLLVMStyle(FormatStyle::LK_Verilog)) {
42     EXPECT_EQ(Code.str(), format(Code, Style)) << "Expected code is not stable";
43     EXPECT_EQ(Code.str(),
44               format(test::messUp(Code, /*HandleHash=*/false), Style));
45   }
46 };
47 
48 TEST_F(FormatTestVerilog, BasedLiteral) {
49   verifyFormat("x = '0;");
50   verifyFormat("x = '1;");
51   verifyFormat("x = 'X;");
52   verifyFormat("x = 'x;");
53   verifyFormat("x = 'Z;");
54   verifyFormat("x = 'z;");
55   verifyFormat("x = 659;");
56   verifyFormat("x = 'h837ff;");
57   verifyFormat("x = 'o7460;");
58   verifyFormat("x = 4'b1001;");
59   verifyFormat("x = 5'D3;");
60   verifyFormat("x = 3'b01x;");
61   verifyFormat("x = 12'hx;");
62   verifyFormat("x = 16'hz;");
63   verifyFormat("x = -8'd6;");
64   verifyFormat("x = 4'shf;");
65   verifyFormat("x = -4'sd15;");
66   verifyFormat("x = 16'sd?;");
67 }
68 
69 TEST_F(FormatTestVerilog, Block) {
70   verifyFormat("begin\n"
71                "  x = x;\n"
72                "end");
73   verifyFormat("begin : x\n"
74                "  x = x;\n"
75                "end : x");
76   verifyFormat("begin\n"
77                "  x = x;\n"
78                "  x = x;\n"
79                "end");
80   verifyFormat("fork\n"
81                "  x = x;\n"
82                "join");
83   verifyFormat("fork\n"
84                "  x = x;\n"
85                "join_any");
86   verifyFormat("fork\n"
87                "  x = x;\n"
88                "join_none");
89   verifyFormat("generate\n"
90                "  x = x;\n"
91                "endgenerate");
92   verifyFormat("generate : x\n"
93                "  x = x;\n"
94                "endgenerate : x");
95   // Nested blocks.
96   verifyFormat("begin\n"
97                "  begin\n"
98                "  end\n"
99                "end");
100   verifyFormat("begin : x\n"
101                "  begin\n"
102                "  end\n"
103                "end : x");
104   verifyFormat("begin : x\n"
105                "  begin : x\n"
106                "  end : x\n"
107                "end : x");
108   verifyFormat("begin\n"
109                "  begin : x\n"
110                "  end : x\n"
111                "end");
112   // Test that 'disable fork' and 'rand join' don't get mistaken as blocks.
113   verifyFormat("disable fork;\n"
114                "x = x;");
115   verifyFormat("rand join x x;\n"
116                "x = x;");
117 }
118 
119 TEST_F(FormatTestVerilog, Case) {
120   verifyFormat("case (data)\n"
121                "endcase");
122   verifyFormat("casex (data)\n"
123                "endcase");
124   verifyFormat("casez (data)\n"
125                "endcase");
126   verifyFormat("case (data) inside\n"
127                "endcase");
128   verifyFormat("case (data)\n"
129                "  16'd0:\n"
130                "    result = 10'b0111111111;\n"
131                "endcase");
132   verifyFormat("case (data)\n"
133                "  xxxxxxxx:\n"
134                "    result = 10'b0111111111;\n"
135                "endcase");
136   // Test labels with multiple options.
137   verifyFormat("case (data)\n"
138                "  16'd0, 16'd1:\n"
139                "    result = 10'b0111111111;\n"
140                "endcase");
141   verifyFormat("case (data)\n"
142                "  16'd0, //\n"
143                "      16'd1:\n"
144                "    result = 10'b0111111111;\n"
145                "endcase");
146   // Test that blocks following labels are indented.
147   verifyFormat("case (data)\n"
148                "  16'd1: fork\n"
149                "    result = 10'b1011111111;\n"
150                "  join\n"
151                "endcase\n");
152   verifyFormat("case (data)\n"
153                "  16'd1: fork : x\n"
154                "    result = 10'b1011111111;\n"
155                "  join : x\n"
156                "endcase\n");
157   // Test default.
158   verifyFormat("case (data)\n"
159                "  default\n"
160                "    result = 10'b1011111111;\n"
161                "endcase");
162   verifyFormat("case (data)\n"
163                "  default:\n"
164                "    result = 10'b1011111111;\n"
165                "endcase");
166   // Test that question marks and colons don't get mistaken as labels.
167   verifyFormat("case (data)\n"
168                "  8'b1???????:\n"
169                "    instruction1(ir);\n"
170                "endcase");
171   verifyFormat("case (data)\n"
172                "  x ? 8'b1??????? : 1:\n"
173                "    instruction3(ir);\n"
174                "endcase");
175   // Test indention options.
176   auto Style = getLLVMStyle(FormatStyle::LK_Verilog);
177   Style.IndentCaseLabels = false;
178   verifyFormat("case (data)\n"
179                "16'd0:\n"
180                "  result = 10'b0111111111;\n"
181                "endcase",
182                Style);
183   verifyFormat("case (data)\n"
184                "16'd0: begin\n"
185                "  result = 10'b0111111111;\n"
186                "end\n"
187                "endcase",
188                Style);
189   Style.IndentCaseLabels = true;
190   verifyFormat("case (data)\n"
191                "  16'd0:\n"
192                "    result = 10'b0111111111;\n"
193                "endcase",
194                Style);
195   verifyFormat("case (data)\n"
196                "  16'd0: begin\n"
197                "    result = 10'b0111111111;\n"
198                "  end\n"
199                "endcase",
200                Style);
201 }
202 
203 TEST_F(FormatTestVerilog, Delay) {
204   // Delay by the default unit.
205   verifyFormat("#0;");
206   verifyFormat("#1;");
207   verifyFormat("#10;");
208   verifyFormat("#1.5;");
209   // Explicit unit.
210   verifyFormat("#1fs;");
211   verifyFormat("#1.5fs;");
212   verifyFormat("#1ns;");
213   verifyFormat("#1.5ns;");
214   verifyFormat("#1us;");
215   verifyFormat("#1.5us;");
216   verifyFormat("#1ms;");
217   verifyFormat("#1.5ms;");
218   verifyFormat("#1s;");
219   verifyFormat("#1.5s;");
220   // The following expression should be on the same line.
221   verifyFormat("#1 x = x;");
222   EXPECT_EQ("#1 x = x;", format("#1\n"
223                                 "x = x;"));
224 }
225 
226 TEST_F(FormatTestVerilog, Hierarchy) {
227   verifyFormat("module x;\n"
228                "endmodule");
229   // Test that the end label is on the same line as the end keyword.
230   verifyFormat("module x;\n"
231                "endmodule : x");
232   // Test that things inside are indented.
233   verifyFormat("module x;\n"
234                "  generate\n"
235                "  endgenerate\n"
236                "endmodule");
237   verifyFormat("program x;\n"
238                "  generate\n"
239                "  endgenerate\n"
240                "endprogram");
241   verifyFormat("interface x;\n"
242                "  generate\n"
243                "  endgenerate\n"
244                "endinterface");
245   verifyFormat("task x;\n"
246                "  generate\n"
247                "  endgenerate\n"
248                "endtask");
249   verifyFormat("function x;\n"
250                "  generate\n"
251                "  endgenerate\n"
252                "endfunction");
253   verifyFormat("class x;\n"
254                "  generate\n"
255                "  endgenerate\n"
256                "endclass");
257   // Test that they nest.
258   verifyFormat("module x;\n"
259                "  program x;\n"
260                "    program x;\n"
261                "    endprogram\n"
262                "  endprogram\n"
263                "endmodule");
264   // Test that an extern declaration doesn't change the indentation.
265   verifyFormat("extern module x;\n"
266                "x = x;");
267   // Test complex headers
268   verifyFormat("extern module x\n"
269                "    import x.x::x::*;\n"
270                "    import x;\n"
271                "    #(parameter x)\n"
272                "    (output x);");
273   verifyFormat("module x\n"
274                "    import x.x::x::*;\n"
275                "    import x;\n"
276                "    #(parameter x)\n"
277                "    (output x);\n"
278                "  generate\n"
279                "  endgenerate\n"
280                "endmodule : x");
281   verifyFormat("virtual class x\n"
282                "    (x)\n"
283                "    extends x(x)\n"
284                "    implements x, x, x;\n"
285                "  generate\n"
286                "  endgenerate\n"
287                "endclass : x\n");
288   verifyFormat("function automatic logic [1 : 0] x\n"
289                "    (input x);\n"
290                "  generate\n"
291                "  endgenerate\n"
292                "endfunction : x");
293 }
294 
295 TEST_F(FormatTestVerilog, If) {
296   verifyFormat("if (x)\n"
297                "  x = x;");
298   verifyFormat("unique if (x)\n"
299                "  x = x;");
300   verifyFormat("unique0 if (x)\n"
301                "  x = x;");
302   verifyFormat("priority if (x)\n"
303                "  x = x;");
304   verifyFormat("if (x)\n"
305                "  x = x;\n"
306                "x = x;");
307 
308   // Test else
309   verifyFormat("if (x)\n"
310                "  x = x;\n"
311                "else if (x)\n"
312                "  x = x;\n"
313                "else\n"
314                "  x = x;");
315   verifyFormat("if (x) begin\n"
316                "  x = x;\n"
317                "end else if (x) begin\n"
318                "  x = x;\n"
319                "end else begin\n"
320                "  x = x;\n"
321                "end");
322   verifyFormat("if (x) begin : x\n"
323                "  x = x;\n"
324                "end : x else if (x) begin : x\n"
325                "  x = x;\n"
326                "end : x else begin : x\n"
327                "  x = x;\n"
328                "end : x");
329 
330   // Test block keywords.
331   verifyFormat("if (x) begin\n"
332                "  x = x;\n"
333                "end");
334   verifyFormat("if (x) begin : x\n"
335                "  x = x;\n"
336                "end : x");
337   verifyFormat("if (x) begin\n"
338                "  x = x;\n"
339                "  x = x;\n"
340                "end");
341   verifyFormat("if (x) fork\n"
342                "  x = x;\n"
343                "join");
344   verifyFormat("if (x) fork\n"
345                "  x = x;\n"
346                "join_any");
347   verifyFormat("if (x) fork\n"
348                "  x = x;\n"
349                "join_none");
350   verifyFormat("if (x) generate\n"
351                "  x = x;\n"
352                "endgenerate");
353   verifyFormat("if (x) generate : x\n"
354                "  x = x;\n"
355                "endgenerate : x");
356 
357   // Test that concatenation braces don't get regarded as blocks.
358   verifyFormat("if (x)\n"
359                "  {x} = x;");
360   verifyFormat("if (x)\n"
361                "  x = {x};");
362   verifyFormat("if (x)\n"
363                "  x = {x};\n"
364                "else\n"
365                "  {x} = {x};");
366 
367   // With attributes.
368   verifyFormat("(* x *) if (x)\n"
369                "  x = x;");
370   verifyFormat("(* x = \"x\" *) if (x)\n"
371                "  x = x;");
372   verifyFormat("(* x, x = \"x\" *) if (x)\n"
373                "  x = x;");
374 }
375 
376 TEST_F(FormatTestVerilog, Operators) {
377   // Test that unary operators are not followed by space.
378   verifyFormat("x = +x;");
379   verifyFormat("x = -x;");
380   verifyFormat("x = !x;");
381   verifyFormat("x = ~x;");
382   verifyFormat("x = &x;");
383   verifyFormat("x = ~&x;");
384   verifyFormat("x = |x;");
385   verifyFormat("x = ~|x;");
386   verifyFormat("x = ^x;");
387   verifyFormat("x = ~^x;");
388   verifyFormat("x = ^~x;");
389   verifyFormat("x = ++x;");
390   verifyFormat("x = --x;");
391 
392   // Test that operators don't get split.
393   verifyFormat("x = x++;");
394   verifyFormat("x = x--;");
395   verifyFormat("x = x ** x;");
396   verifyFormat("x = x << x;");
397   verifyFormat("x = x >> x;");
398   verifyFormat("x = x <<< x;");
399   verifyFormat("x = x >>> x;");
400   verifyFormat("x = x <= x;");
401   verifyFormat("x = x >= x;");
402   verifyFormat("x = x == x;");
403   verifyFormat("x = x != x;");
404   verifyFormat("x = x === x;");
405   verifyFormat("x = x !== x;");
406   verifyFormat("x = x ==? x;");
407   verifyFormat("x = x !=? x;");
408   verifyFormat("x = x ~^ x;");
409   verifyFormat("x = x ^~ x;");
410   verifyFormat("x = x && x;");
411   verifyFormat("x = x || x;");
412   verifyFormat("x = x->x;");
413   verifyFormat("x = x <-> x;");
414   verifyFormat("x += x;");
415   verifyFormat("x -= x;");
416   verifyFormat("x *= x;");
417   verifyFormat("x /= x;");
418   verifyFormat("x %= x;");
419   verifyFormat("x &= x;");
420   verifyFormat("x ^= x;");
421   verifyFormat("x |= x;");
422   verifyFormat("x <<= x;");
423   verifyFormat("x >>= x;");
424   verifyFormat("x <<<= x;");
425   verifyFormat("x >>>= x;");
426   verifyFormat("x <= x;");
427 
428   // Test that space is added between operators.
429   EXPECT_EQ("x = x < -x;", format("x=x<-x;"));
430   EXPECT_EQ("x = x << -x;", format("x=x<<-x;"));
431   EXPECT_EQ("x = x <<< -x;", format("x=x<<<-x;"));
432 }
433 
434 TEST_F(FormatTestVerilog, Preprocessor) {
435   auto Style = getLLVMStyle(FormatStyle::LK_Verilog);
436   Style.ColumnLimit = 20;
437 
438   // Macro definitions.
439   EXPECT_EQ("`define X          \\\n"
440             "  if (x)           \\\n"
441             "    x = x;",
442             format("`define X if(x)x=x;", Style));
443   EXPECT_EQ("`define X(x)       \\\n"
444             "  if (x)           \\\n"
445             "    x = x;",
446             format("`define X(x) if(x)x=x;", Style));
447   EXPECT_EQ("`define X          \\\n"
448             "  x = x;           \\\n"
449             "  x = x;",
450             format("`define X x=x;x=x;", Style));
451   // Macro definitions with invocations inside.
452   EXPECT_EQ("`define LIST       \\\n"
453             "  `ENTRY           \\\n"
454             "  `ENTRY",
455             format("`define LIST \\\n"
456                    "`ENTRY \\\n"
457                    "`ENTRY",
458                    Style));
459   EXPECT_EQ("`define LIST       \\\n"
460             "  `x = `x;         \\\n"
461             "  `x = `x;",
462             format("`define LIST \\\n"
463                    "`x = `x; \\\n"
464                    "`x = `x;",
465                    Style));
466   EXPECT_EQ("`define LIST       \\\n"
467             "  `x = `x;         \\\n"
468             "  `x = `x;",
469             format("`define LIST `x=`x;`x=`x;", Style));
470   // Macro invocations.
471   verifyFormat("`x = (`x1 + `x2 + x);");
472   // Lines starting with a preprocessor directive should not be indented.
473   std::string Directives[] = {
474       "begin_keywords",
475       "celldefine",
476       "default_nettype",
477       "define",
478       "else",
479       "elsif",
480       "end_keywords",
481       "endcelldefine",
482       "endif",
483       "ifdef",
484       "ifndef",
485       "include",
486       "line",
487       "nounconnected_drive",
488       "pragma",
489       "resetall",
490       "timescale",
491       "unconnected_drive",
492       "undef",
493       "undefineall",
494   };
495   for (auto &Name : Directives) {
496     EXPECT_EQ("if (x)\n"
497               "`" +
498                   Name +
499                   "\n"
500                   "  ;",
501               format("if (x)\n"
502                      "`" +
503                          Name +
504                          "\n"
505                          ";",
506                      Style));
507   }
508   // Lines starting with a regular macro invocation should be indented as a
509   // normal line.
510   EXPECT_EQ("if (x)\n"
511             "  `x = `x;\n"
512             "`timescale 1ns / 1ps",
513             format("if (x)\n"
514                    "`x = `x;\n"
515                    "`timescale 1ns / 1ps",
516                    Style));
517   EXPECT_EQ("if (x)\n"
518             "`timescale 1ns / 1ps\n"
519             "  `x = `x;",
520             format("if (x)\n"
521                    "`timescale 1ns / 1ps\n"
522                    "`x = `x;",
523                    Style));
524   std::string NonDirectives[] = {
525       // For `__FILE__` and `__LINE__`, although the standard classifies them as
526       // preprocessor directives, they are used like regular macros.
527       "__FILE__", "__LINE__", "elif", "foo", "x",
528   };
529   for (auto &Name : NonDirectives) {
530     EXPECT_EQ("if (x)\n"
531               "  `" +
532                   Name + ";",
533               format("if (x)\n"
534                      "`" +
535                          Name +
536                          "\n"
537                          ";",
538                      Style));
539   }
540 }
541 
542 TEST_F(FormatTestVerilog, Primitive) {
543   verifyFormat("primitive multiplexer\n"
544                "    (mux, control, dataA, dataB);\n"
545                "  output mux;\n"
546                "  input control, dataA, dataB;\n"
547                "  table\n"
548                "    0 1 ? : 1;\n"
549                "    0 0 ? : 0;\n"
550                "    1 ? 1 : 1;\n"
551                "    1 ? 0 : 0;\n"
552                "    x 0 0 : 0;\n"
553                "    x 1 1 : 1;\n"
554                "  endtable\n"
555                "endprimitive");
556   verifyFormat("primitive latch\n"
557                "    (q, ena_, data);\n"
558                "  output q;\n"
559                "  reg q;\n"
560                "  input ena_, data;\n"
561                "  table\n"
562                "    0 1 : ? : 1;\n"
563                "    0 0 : ? : 0;\n"
564                "    1 ? : ? : -;\n"
565                "    ? * : ? : -;\n"
566                "  endtable\n"
567                "endprimitive");
568   verifyFormat("primitive d\n"
569                "    (q, clock, data);\n"
570                "  output q;\n"
571                "  reg q;\n"
572                "  input clock, data;\n"
573                "  table\n"
574                "    (01) 0 : ? : 0;\n"
575                "    (01) 1 : ? : 1;\n"
576                "    (0?) 1 : 1 : 1;\n"
577                "    (0?) 0 : 0 : 0;\n"
578                "    (?0) ? : ? : -;\n"
579                "    (?\?) ? : ? : -;\n"
580                "  endtable\n"
581                "endprimitive");
582 }
583 } // namespace format
584 } // end namespace clang
585