xref: /llvm-project/clang/unittests/Format/FormatTestVerilog.cpp (revision 4134f836103ebc70cc23a80c7a966d1d5f3a6353) 
1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "FormatTestBase.h"
10 
11 #define DEBUG_TYPE "format-test"
12 
13 namespace clang {
14 namespace format {
15 namespace test {
16 namespace {
17 class FormatTestVerilog : public test::FormatTestBase {
18 protected:
19   FormatStyle getDefaultStyle() const override {
20     return getLLVMStyle(FormatStyle::LK_Verilog);
21   }
22   std::string messUp(llvm::StringRef Code) const override {
23     return test::messUp(Code, /*HandleHash=*/false);
24   }
25 };
26 
27 TEST_F(FormatTestVerilog, Align) {
28   FormatStyle Style = getDefaultStyle();
29   Style.AlignConsecutiveAssignments.Enabled = true;
30   verifyFormat("x            <= x;\n"
31                "sfdbddfbdfbb <= x;\n"
32                "x             = x;",
33                Style);
34   verifyFormat("x            = x;\n"
35                "sfdbddfbdfbb = x;\n"
36                "x            = x;",
37                Style);
38   // Compound assignments are not aligned by default. '<=' is not a compound
39   // assignment.
40   verifyFormat("x            <= x;\n"
41                "sfdbddfbdfbb <= x;",
42                Style);
43   verifyFormat("x += x;\n"
44                "sfdbddfbdfbb <= x;",
45                Style);
46   verifyFormat("x <<= x;\n"
47                "sfdbddfbdfbb <= x;",
48                Style);
49   verifyFormat("x <<<= x;\n"
50                "sfdbddfbdfbb <= x;",
51                Style);
52   verifyFormat("x >>= x;\n"
53                "sfdbddfbdfbb <= x;",
54                Style);
55   verifyFormat("x >>>= x;\n"
56                "sfdbddfbdfbb <= x;",
57                Style);
58   Style.AlignConsecutiveAssignments.AlignCompound = true;
59   verifyFormat("x            <= x;\n"
60                "sfdbddfbdfbb <= x;",
61                Style);
62   verifyFormat("x            += x;\n"
63                "sfdbddfbdfbb <= x;",
64                Style);
65   verifyFormat("x            <<= x;\n"
66                "sfdbddfbdfbb  <= x;",
67                Style);
68   verifyFormat("x            <<<= x;\n"
69                "sfdbddfbdfbb   <= x;",
70                Style);
71   verifyFormat("x            >>= x;\n"
72                "sfdbddfbdfbb  <= x;",
73                Style);
74   verifyFormat("x            >>>= x;\n"
75                "sfdbddfbdfbb   <= x;",
76                Style);
77 }
78 
79 TEST_F(FormatTestVerilog, Assign) {
80   verifyFormat("assign mynet = enable;");
81   verifyFormat("assign (strong1, pull0) #1 mynet = enable;");
82   verifyFormat("assign #1 mynet = enable;");
83   verifyFormat("assign mynet = enable;");
84   // Test that assignments are on separate lines.
85   verifyFormat("assign mynet = enable,\n"
86                "       mynet1 = enable1;");
87   // Test that `<=` and `,` don't confuse it.
88   verifyFormat("assign mynet = enable1 <= enable2;");
89   verifyFormat("assign mynet = enable1 <= enable2,\n"
90                "       mynet1 = enable3;");
91   verifyFormat("assign mynet = enable,\n"
92                "       mynet1 = enable2 <= enable3;");
93   verifyFormat("assign mynet = enable(enable1, enable2);");
94 }
95 
96 TEST_F(FormatTestVerilog, BasedLiteral) {
97   verifyFormat("x = '0;");
98   verifyFormat("x = '1;");
99   verifyFormat("x = 'X;");
100   verifyFormat("x = 'x;");
101   verifyFormat("x = 'Z;");
102   verifyFormat("x = 'z;");
103   verifyFormat("x = 659;");
104   verifyFormat("x = 'h837ff;");
105   verifyFormat("x = 'o7460;");
106   verifyFormat("x = 4'b1001;");
107   verifyFormat("x = 5'D3;");
108   verifyFormat("x = 3'b01x;");
109   verifyFormat("x = 12'hx;");
110   verifyFormat("x = 16'hz;");
111   verifyFormat("x = -8'd6;");
112   verifyFormat("x = 4'shf;");
113   verifyFormat("x = -4'sd15;");
114   verifyFormat("x = 16'sd?;");
115 }
116 
117 TEST_F(FormatTestVerilog, Block) {
118   verifyFormat("begin\n"
119                "  x = x;\n"
120                "end");
121   verifyFormat("begin : x\n"
122                "  x = x;\n"
123                "end : x");
124   verifyFormat("begin\n"
125                "  x = x;\n"
126                "  x = x;\n"
127                "end");
128   verifyFormat("fork\n"
129                "  x = x;\n"
130                "join");
131   verifyFormat("fork\n"
132                "  x = x;\n"
133                "join_any");
134   verifyFormat("fork\n"
135                "  x = x;\n"
136                "join_none");
137   verifyFormat("generate\n"
138                "  x = x;\n"
139                "endgenerate");
140   verifyFormat("generate : x\n"
141                "  x = x;\n"
142                "endgenerate : x");
143   // Nested blocks.
144   verifyFormat("begin\n"
145                "  begin\n"
146                "  end\n"
147                "end");
148   verifyFormat("begin : x\n"
149                "  begin\n"
150                "  end\n"
151                "end : x");
152   verifyFormat("begin : x\n"
153                "  begin : x\n"
154                "  end : x\n"
155                "end : x");
156   verifyFormat("begin\n"
157                "  begin : x\n"
158                "  end : x\n"
159                "end");
160   // Test that 'disable fork' and 'rand join' don't get mistaken as blocks.
161   verifyFormat("disable fork;\n"
162                "x = x;");
163   verifyFormat("rand join x x;\n"
164                "x = x;");
165 }
166 
167 TEST_F(FormatTestVerilog, Case) {
168   verifyFormat("case (data)\n"
169                "endcase");
170   verifyFormat("casex (data)\n"
171                "endcase");
172   verifyFormat("casez (data)\n"
173                "endcase");
174   verifyFormat("case (data) inside\n"
175                "endcase");
176   verifyFormat("case (data)\n"
177                "  16'd0:\n"
178                "    result = 10'b0111111111;\n"
179                "endcase");
180   verifyFormat("case (data)\n"
181                "  xxxxxxxx:\n"
182                "    result = 10'b0111111111;\n"
183                "endcase");
184   // Test labels with multiple options.
185   verifyFormat("case (data)\n"
186                "  16'd0, 16'd1:\n"
187                "    result = 10'b0111111111;\n"
188                "endcase");
189   verifyFormat("case (data)\n"
190                "  16'd0, //\n"
191                "      16'd1:\n"
192                "    result = 10'b0111111111;\n"
193                "endcase");
194   // Test that blocks following labels are indented.
195   verifyFormat("case (data)\n"
196                "  16'd1: fork\n"
197                "    result = 10'b1011111111;\n"
198                "  join\n"
199                "endcase\n");
200   verifyFormat("case (data)\n"
201                "  16'd1: fork : x\n"
202                "    result = 10'b1011111111;\n"
203                "  join : x\n"
204                "endcase\n");
205   // Test default.
206   verifyFormat("case (data)\n"
207                "  default\n"
208                "    result = 10'b1011111111;\n"
209                "endcase");
210   verifyFormat("case (data)\n"
211                "  default:\n"
212                "    result = 10'b1011111111;\n"
213                "endcase");
214   // Test that question marks and colons don't get mistaken as labels.
215   verifyFormat("case (data)\n"
216                "  8'b1???????:\n"
217                "    instruction1(ir);\n"
218                "endcase");
219   verifyFormat("case (data)\n"
220                "  x ? 8'b1??????? : 1:\n"
221                "    instruction3(ir);\n"
222                "endcase");
223   // Test indention options.
224   auto Style = getDefaultStyle();
225   Style.IndentCaseLabels = false;
226   verifyFormat("case (data)\n"
227                "16'd0:\n"
228                "  result = 10'b0111111111;\n"
229                "endcase",
230                Style);
231   verifyFormat("case (data)\n"
232                "16'd0: begin\n"
233                "  result = 10'b0111111111;\n"
234                "end\n"
235                "endcase",
236                Style);
237   Style.IndentCaseLabels = true;
238   verifyFormat("case (data)\n"
239                "  16'd0:\n"
240                "    result = 10'b0111111111;\n"
241                "endcase",
242                Style);
243   verifyFormat("case (data)\n"
244                "  16'd0: begin\n"
245                "    result = 10'b0111111111;\n"
246                "  end\n"
247                "endcase",
248                Style);
249   // Other colons should not be mistaken as case colons.
250   Style = getDefaultStyle();
251   Style.BitFieldColonSpacing = FormatStyle::BFCS_None;
252   verifyFormat("case (x[1:0])\n"
253                "endcase",
254                Style);
255   verifyFormat("default:\n"
256                "  x[1:0] = x[1:0];",
257                Style);
258   Style.BitFieldColonSpacing = FormatStyle::BFCS_Both;
259   verifyFormat("case (x[1 : 0])\n"
260                "endcase",
261                Style);
262   verifyFormat("default:\n"
263                "  x[1 : 0] = x[1 : 0];",
264                Style);
265   Style = getDefaultStyle();
266   Style.SpacesInContainerLiterals = true;
267   verifyFormat("case ('{x : x, default : 9})\n"
268                "endcase",
269                Style);
270   verifyFormat("x = '{x : x, default : 9};\n", Style);
271   verifyFormat("default:\n"
272                "  x = '{x : x, default : 9};\n",
273                Style);
274   Style.SpacesInContainerLiterals = false;
275   verifyFormat("case ('{x: x, default: 9})\n"
276                "endcase",
277                Style);
278   verifyFormat("x = '{x: x, default: 9};\n", Style);
279   verifyFormat("default:\n"
280                "  x = '{x: x, default: 9};\n",
281                Style);
282 }
283 
284 TEST_F(FormatTestVerilog, Coverage) {
285   verifyFormat("covergroup x\n"
286                "    @@(begin x);\n"
287                "endgroup");
288 }
289 
290 TEST_F(FormatTestVerilog, Declaration) {
291   verifyFormat("wire mynet;");
292   verifyFormat("wire mynet, mynet1;");
293   verifyFormat("wire mynet, //\n"
294                "     mynet1;");
295   verifyFormat("wire mynet = enable;");
296   verifyFormat("wire mynet = enable, mynet1;");
297   verifyFormat("wire mynet = enable, //\n"
298                "     mynet1;");
299   verifyFormat("wire mynet, mynet1 = enable;");
300   verifyFormat("wire mynet, //\n"
301                "     mynet1 = enable;");
302   verifyFormat("wire mynet = enable, mynet1 = enable;");
303   verifyFormat("wire mynet = enable, //\n"
304                "     mynet1 = enable;");
305   verifyFormat("wire (strong1, pull0) mynet;");
306   verifyFormat("wire (strong1, pull0) mynet, mynet1;");
307   verifyFormat("wire (strong1, pull0) mynet, //\n"
308                "                      mynet1;");
309   verifyFormat("wire (strong1, pull0) mynet = enable;");
310   verifyFormat("wire (strong1, pull0) mynet = enable, mynet1;");
311   verifyFormat("wire (strong1, pull0) mynet = enable, //\n"
312                "                      mynet1;");
313   verifyFormat("wire (strong1, pull0) mynet, mynet1 = enable;");
314   verifyFormat("wire (strong1, pull0) mynet, //\n"
315                "                      mynet1 = enable;");
316 }
317 
318 TEST_F(FormatTestVerilog, Delay) {
319   // Delay by the default unit.
320   verifyFormat("#0;");
321   verifyFormat("#1;");
322   verifyFormat("#10;");
323   verifyFormat("#1.5;");
324   // Explicit unit.
325   verifyFormat("#1fs;");
326   verifyFormat("#1.5fs;");
327   verifyFormat("#1ns;");
328   verifyFormat("#1.5ns;");
329   verifyFormat("#1us;");
330   verifyFormat("#1.5us;");
331   verifyFormat("#1ms;");
332   verifyFormat("#1.5ms;");
333   verifyFormat("#1s;");
334   verifyFormat("#1.5s;");
335   // The following expression should be on the same line.
336   verifyFormat("#1 x = x;");
337   verifyFormat("#1 x = x;", "#1\n"
338                             "x = x;");
339 }
340 
341 TEST_F(FormatTestVerilog, Enum) {
342   verifyFormat("enum { x } x;");
343   verifyFormat("typedef enum { x } x;");
344   verifyFormat("enum { red, yellow, green } x;");
345   verifyFormat("typedef enum { red, yellow, green } x;");
346   verifyFormat("enum integer { x } x;");
347   verifyFormat("typedef enum { x = 0 } x;");
348   verifyFormat("typedef enum { red = 0, yellow = 1, green = 2 } x;");
349   verifyFormat("typedef enum integer { x } x;");
350   verifyFormat("typedef enum bit [0 : 1] { x } x;");
351   verifyFormat("typedef enum { add = 10, sub[5], jmp[6 : 8] } E1;");
352   verifyFormat("typedef enum { add = 10, sub[5] = 0, jmp[6 : 8] = 1 } E1;");
353 }
354 
355 TEST_F(FormatTestVerilog, Headers) {
356   // Test headers with multiple ports.
357   verifyFormat("module mh1\n"
358                "    (input var int in1,\n"
359                "     input var shortreal in2,\n"
360                "     output tagged_st out);\n"
361                "endmodule");
362   // There should be a space following the type but not the variable name.
363   verifyFormat("module test\n"
364                "    (input wire [7 : 0] a,\n"
365                "     input wire b[7 : 0],\n"
366                "     input wire [7 : 0] c[7 : 0]);\n"
367                "endmodule");
368   // Ports should be grouped by types.
369   verifyFormat("module test\n"
370                "    (input [7 : 0] a,\n"
371                "     input signed [7 : 0] b, c, d);\n"
372                "endmodule");
373   verifyFormat("module test\n"
374                "    (input [7 : 0] a,\n"
375                "     (* x = x *) input signed [7 : 0] b, c, d);\n"
376                "endmodule");
377   verifyFormat("module test\n"
378                "    (input [7 : 0] a = 0,\n"
379                "     input signed [7 : 0] b = 0, c = 0, d = 0);\n"
380                "endmodule");
381   verifyFormat("module test\n"
382                "    #(parameter x)\n"
383                "    (input [7 : 0] a,\n"
384                "     input signed [7 : 0] b, c, d);\n"
385                "endmodule");
386   // When a line needs to be broken, ports of the same type should be aligned to
387   // the same column.
388   verifyFormat("module test\n"
389                "    (input signed [7 : 0] b, c, //\n"
390                "                          d);\n"
391                "endmodule");
392   verifyFormat("module test\n"
393                "    ((* x = x *) input signed [7 : 0] b, c, //\n"
394                "                                      d);\n"
395                "endmodule");
396   verifyFormat("module test\n"
397                "    (input signed [7 : 0] b = 0, c, //\n"
398                "                          d);\n"
399                "endmodule");
400   verifyFormat("module test\n"
401                "    (input signed [7 : 0] b, c = 0, //\n"
402                "                          d);\n"
403                "endmodule");
404   verifyFormat("module test\n"
405                "    (input signed [7 : 0] b, c, //\n"
406                "                          d = 0);\n"
407                "endmodule");
408   verifyFormat("module test\n"
409                "    (input wire logic signed [7 : 0][0 : 1] b, c, //\n"
410                "                                            d);\n"
411                "endmodule");
412   verifyFormat("module test\n"
413                "    (input signed [7 : 0] b, //\n"
414                "                          c, //\n"
415                "                          d);\n"
416                "endmodule");
417   verifyFormat("module test\n"
418                "    (input [7 : 0] a,\n"
419                "     input signed [7 : 0] b, //\n"
420                "                          c, //\n"
421                "                          d);\n"
422                "endmodule");
423   verifyFormat("module test\n"
424                "    (input signed [7 : 0] b, //\n"
425                "                          c, //\n"
426                "                          d,\n"
427                "     output signed [7 : 0] h);\n"
428                "endmodule");
429   // With a modport.
430   verifyFormat("module m\n"
431                "    (i2.master i);\n"
432                "endmodule");
433   verifyFormat("module m\n"
434                "    (i2.master i, ii);\n"
435                "endmodule");
436   verifyFormat("module m\n"
437                "    (i2.master i, //\n"
438                "               ii);\n"
439                "endmodule");
440   verifyFormat("module m\n"
441                "    (i2.master i,\n"
442                "     input ii);\n"
443                "endmodule");
444   verifyFormat("module m\n"
445                "    (i2::i2.master i);\n"
446                "endmodule");
447   verifyFormat("module m\n"
448                "    (i2::i2.master i, ii);\n"
449                "endmodule");
450   verifyFormat("module m\n"
451                "    (i2::i2.master i, //\n"
452                "                   ii);\n"
453                "endmodule");
454   verifyFormat("module m\n"
455                "    (i2::i2.master i,\n"
456                "     input ii);\n"
457                "endmodule");
458   verifyFormat("module m\n"
459                "    (i2::i2 i);\n"
460                "endmodule");
461   verifyFormat("module m\n"
462                "    (i2::i2 i, ii);\n"
463                "endmodule");
464   verifyFormat("module m\n"
465                "    (i2::i2 i, //\n"
466                "            ii);\n"
467                "endmodule");
468   verifyFormat("module m\n"
469                "    (i2::i2 i,\n"
470                "     input ii);\n"
471                "endmodule");
472   // With a macro in the names.
473   verifyFormat("module m\n"
474                "    (input var `x a, b);\n"
475                "endmodule");
476   verifyFormat("module m\n"
477                "    (input var `x a, //\n"
478                "                  b);\n"
479                "endmodule");
480   verifyFormat("module m\n"
481                "    (input var x `a, b);\n"
482                "endmodule");
483   verifyFormat("module m\n"
484                "    (input var x `a, //\n"
485                "                 b);\n"
486                "endmodule");
487   // With a concatenation in the names.
488   auto Style = getDefaultStyle();
489   Style.ColumnLimit = 40;
490   verifyFormat("`define X(x)                           \\\n"
491                "  module test                          \\\n"
492                "      (input var x``x a, b);",
493                Style);
494   verifyFormat("`define X(x)                           \\\n"
495                "  module test                          \\\n"
496                "      (input var x``x aaaaaaaaaaaaaaa, \\\n"
497                "                      b);",
498                Style);
499   verifyFormat("`define X(x)                           \\\n"
500                "  module test                          \\\n"
501                "      (input var x a``x, b);",
502                Style);
503   verifyFormat("`define X(x)                           \\\n"
504                "  module test                          \\\n"
505                "      (input var x aaaaaaaaaaaaaaa``x, \\\n"
506                "                   b);",
507                Style);
508 }
509 
510 TEST_F(FormatTestVerilog, Hierarchy) {
511   verifyFormat("module x;\n"
512                "endmodule");
513   // Test that the end label is on the same line as the end keyword.
514   verifyFormat("module x;\n"
515                "endmodule : x");
516   // Test that things inside are indented.
517   verifyFormat("module x;\n"
518                "  generate\n"
519                "  endgenerate\n"
520                "endmodule");
521   verifyFormat("program x;\n"
522                "  generate\n"
523                "  endgenerate\n"
524                "endprogram");
525   verifyFormat("interface x;\n"
526                "  generate\n"
527                "  endgenerate\n"
528                "endinterface");
529   verifyFormat("task x;\n"
530                "  generate\n"
531                "  endgenerate\n"
532                "endtask");
533   verifyFormat("function x;\n"
534                "  generate\n"
535                "  endgenerate\n"
536                "endfunction");
537   verifyFormat("class x;\n"
538                "  generate\n"
539                "  endgenerate\n"
540                "endclass");
541   // Test that they nest.
542   verifyFormat("module x;\n"
543                "  program x;\n"
544                "    program x;\n"
545                "    endprogram\n"
546                "  endprogram\n"
547                "endmodule");
548   // Test that an extern declaration doesn't change the indentation.
549   verifyFormat("extern module x;\n"
550                "x = x;");
551   // Test complex headers
552   verifyFormat("extern module x\n"
553                "    import x.x::x::*;\n"
554                "    import x;\n"
555                "    #(parameter x)\n"
556                "    (output x);");
557   verifyFormat("module x\n"
558                "    import x.x::x::*;\n"
559                "    import x;\n"
560                "    #(parameter x)\n"
561                "    (output x);\n"
562                "  generate\n"
563                "  endgenerate\n"
564                "endmodule : x");
565   verifyFormat("virtual class x\n"
566                "    (x)\n"
567                "    extends x(x)\n"
568                "    implements x, x, x;\n"
569                "  generate\n"
570                "  endgenerate\n"
571                "endclass : x\n");
572   verifyFormat("function automatic logic [1 : 0] x\n"
573                "    (input x);\n"
574                "  generate\n"
575                "  endgenerate\n"
576                "endfunction : x");
577 }
578 
579 TEST_F(FormatTestVerilog, Identifiers) {
580   // Escaped identifiers should not be split.
581   verifyFormat("\\busa+index");
582   verifyFormat("\\-clock");
583   verifyFormat("\\***error-condition***");
584   verifyFormat("\\net1\\/net2");
585   verifyFormat("\\{a,b}");
586   verifyFormat("\\a*(b+c)");
587   // Escaped identifiers can't be joined with the next token.  Extra space
588   // should be removed.
589   verifyFormat("\\busa+index ;", "\\busa+index\n"
590                                  ";");
591   verifyFormat("\\busa+index ;", "\\busa+index\r\n"
592                                  ";");
593   verifyFormat("\\busa+index ;", "\\busa+index  ;");
594   verifyFormat("\\busa+index ;", "\\busa+index\n"
595                                  " ;");
596   verifyFormat("\\busa+index ;");
597   verifyFormat("(\\busa+index );");
598   verifyFormat("\\busa+index \\busa+index ;");
599 }
600 
601 TEST_F(FormatTestVerilog, If) {
602   verifyFormat("if (x)\n"
603                "  x = x;");
604   verifyFormat("unique if (x)\n"
605                "  x = x;");
606   verifyFormat("unique0 if (x)\n"
607                "  x = x;");
608   verifyFormat("priority if (x)\n"
609                "  x = x;");
610   verifyFormat("if (x)\n"
611                "  x = x;\n"
612                "x = x;");
613 
614   // Test else
615   verifyFormat("if (x)\n"
616                "  x = x;\n"
617                "else if (x)\n"
618                "  x = x;\n"
619                "else\n"
620                "  x = x;");
621   verifyFormat("if (x) begin\n"
622                "  x = x;\n"
623                "end else if (x) begin\n"
624                "  x = x;\n"
625                "end else begin\n"
626                "  x = x;\n"
627                "end");
628   verifyFormat("if (x) begin : x\n"
629                "  x = x;\n"
630                "end : x else if (x) begin : x\n"
631                "  x = x;\n"
632                "end : x else begin : x\n"
633                "  x = x;\n"
634                "end : x");
635 
636   // Test block keywords.
637   verifyFormat("if (x) begin\n"
638                "  x = x;\n"
639                "end");
640   verifyFormat("if (x) begin : x\n"
641                "  x = x;\n"
642                "end : x");
643   verifyFormat("if (x) begin\n"
644                "  x = x;\n"
645                "  x = x;\n"
646                "end");
647   verifyFormat("if (x) fork\n"
648                "  x = x;\n"
649                "join");
650   verifyFormat("if (x) fork\n"
651                "  x = x;\n"
652                "join_any");
653   verifyFormat("if (x) fork\n"
654                "  x = x;\n"
655                "join_none");
656   verifyFormat("if (x) generate\n"
657                "  x = x;\n"
658                "endgenerate");
659   verifyFormat("if (x) generate : x\n"
660                "  x = x;\n"
661                "endgenerate : x");
662 
663   // Test that concatenation braces don't get regarded as blocks.
664   verifyFormat("if (x)\n"
665                "  {x} = x;");
666   verifyFormat("if (x)\n"
667                "  x = {x};");
668   verifyFormat("if (x)\n"
669                "  x = {x};\n"
670                "else\n"
671                "  {x} = {x};");
672 
673   // With attributes.
674   verifyFormat("(* x *) if (x)\n"
675                "  x = x;");
676   verifyFormat("(* x = \"x\" *) if (x)\n"
677                "  x = x;");
678   verifyFormat("(* x, x = \"x\" *) if (x)\n"
679                "  x = x;");
680 
681   // Assert are treated similar to if.  But the else parts should not be
682   // chained.
683   verifyFormat("assert (x);");
684   verifyFormat("assert (x)\n"
685                "  $info();");
686   verifyFormat("assert (x)\n"
687                "  $info();\n"
688                "else\n"
689                "  $error();");
690   verifyFormat("assert (x)\n"
691                "else\n"
692                "  $error();");
693   verifyFormat("assert (x)\n"
694                "else begin\n"
695                "end");
696   verifyFormat("assert (x)\n"
697                "else\n"
698                "  if (x)\n"
699                "    $error();");
700   verifyFormat("assert (x)\n"
701                "  $info();\n"
702                "else\n"
703                "  if (x)\n"
704                "    $error();");
705   verifyFormat("assert (x)\n"
706                "  $info();\n"
707                "else\n"
708                "  if (x)\n"
709                "    $error();\n"
710                "  else\n"
711                "    $error();");
712   verifyFormat("assert (x)\n"
713                "  $info();\n"
714                "else\n"
715                "  if (x)\n"
716                "    $error();\n"
717                "  else if (x)\n"
718                "    $error();\n"
719                "  else\n"
720                "    $error();");
721   // The body is optional for asserts.  The next line should not be indented if
722   // the statement already ended with a semicolon.
723   verifyFormat("assert (x);\n"
724                "x = x;");
725   verifyFormat("if (x)\n"
726                "  assert (x);\n"
727                "else if (x) begin\n"
728                "end else begin\n"
729                "end");
730   verifyFormat("if (x)\n"
731                "  assert (x);\n"
732                "else begin\n"
733                "end");
734   verifyFormat("if (x)\n"
735                "  assert (x)\n"
736                "  else begin\n"
737                "  end");
738   // Other keywords.
739   verifyFormat("assume (x)\n"
740                "  $info();");
741   verifyFormat("cover (x)\n"
742                "  $info();");
743   verifyFormat("restrict (x)\n"
744                "  $info();");
745   verifyFormat("assert #0 (x)\n"
746                "  $info();");
747   verifyFormat("assert final (x)\n"
748                "  $info();");
749   verifyFormat("cover #0 (x)\n"
750                "  $info();");
751   verifyFormat("cover final (x)\n"
752                "  $info();");
753 
754   // The space around parentheses options should work.
755   auto Style = getDefaultStyle();
756   verifyFormat("if (x)\n"
757                "  x = x;\n"
758                "else if (x)\n"
759                "  x = x;",
760                Style);
761   verifyFormat("assert (x);", Style);
762   verifyFormat("assert #0 (x);", Style);
763   verifyFormat("assert (x)\n"
764                "else\n"
765                "  if (x)\n"
766                "    x = x;",
767                Style);
768   Style.SpacesInConditionalStatement = true;
769   verifyFormat("if ( x )\n"
770                "  x = x;\n"
771                "else if ( x )\n"
772                "  x = x;",
773                Style);
774   verifyFormat("assert ( x );", Style);
775   verifyFormat("assert #0 ( x );", Style);
776   verifyFormat("assert ( x )\n"
777                "else\n"
778                "  if ( x )\n"
779                "    x = x;",
780                Style);
781 }
782 
783 TEST_F(FormatTestVerilog, Instantiation) {
784   // Without ports.
785   verifyFormat("ffnand ff1;");
786   // With named ports.
787   verifyFormat("ffnand ff1(.qbar(out1),\n"
788                "           .clear(in1),\n"
789                "           .preset(in2));");
790   // With wildcard.
791   verifyFormat("ffnand ff1(.qbar(out1),\n"
792                "           .clear(in1),\n"
793                "           .preset(in2),\n"
794                "           .*);");
795   verifyFormat("ffnand ff1(.*,\n"
796                "           .qbar(out1),\n"
797                "           .clear(in1),\n"
798                "           .preset(in2));");
799   // With unconnected ports.
800   verifyFormat("ffnand ff1(.q(),\n"
801                "           .qbar(out1),\n"
802                "           .clear(in1),\n"
803                "           .preset(in2));");
804   verifyFormat("ffnand ff1(.q(),\n"
805                "           .qbar(),\n"
806                "           .clear(),\n"
807                "           .preset());");
808   verifyFormat("ffnand ff1(,\n"
809                "           .qbar(out1),\n"
810                "           .clear(in1),\n"
811                "           .preset(in2));");
812   // With positional ports.
813   verifyFormat("ffnand ff1(out1,\n"
814                "           in1,\n"
815                "           in2);");
816   verifyFormat("ffnand ff1(,\n"
817                "           out1,\n"
818                "           in1,\n"
819                "           in2);");
820   // Multiple instantiations.
821   verifyFormat("ffnand ff1(.q(),\n"
822                "           .qbar(out1),\n"
823                "           .clear(in1),\n"
824                "           .preset(in2)),\n"
825                "       ff1(.q(),\n"
826                "           .qbar(out1),\n"
827                "           .clear(in1),\n"
828                "           .preset(in2));");
829   verifyFormat("ffnand //\n"
830                "    ff1(.q(),\n"
831                "        .qbar(out1),\n"
832                "        .clear(in1),\n"
833                "        .preset(in2)),\n"
834                "    ff1(.q(),\n"
835                "        .qbar(out1),\n"
836                "        .clear(in1),\n"
837                "        .preset(in2));");
838   // With breaking between instance ports disabled.
839   auto Style = getDefaultStyle();
840   Style.VerilogBreakBetweenInstancePorts = false;
841   verifyFormat("ffnand ff1;", Style);
842   verifyFormat("ffnand ff1(.qbar(out1), .clear(in1), .preset(in2), .*);",
843                Style);
844   verifyFormat("ffnand ff1(out1, in1, in2);", Style);
845   verifyFormat("ffnand ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n"
846                "       ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));",
847                Style);
848   verifyFormat("ffnand //\n"
849                "    ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n"
850                "    ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));",
851                Style);
852 }
853 
854 TEST_F(FormatTestVerilog, Loop) {
855   verifyFormat("foreach (x[x])\n"
856                "  x = x;");
857   verifyFormat("repeat (x)\n"
858                "  x = x;");
859   verifyFormat("foreach (x[x]) begin\n"
860                "end");
861   verifyFormat("repeat (x) begin\n"
862                "end");
863   auto Style = getDefaultStyle();
864   Style.SpacesInConditionalStatement = true;
865   verifyFormat("foreach ( x[x] )\n"
866                "  x = x;",
867                Style);
868   verifyFormat("repeat ( x )\n"
869                "  x = x;",
870                Style);
871 }
872 
873 TEST_F(FormatTestVerilog, Operators) {
874   // Test that unary operators are not followed by space.
875   verifyFormat("x = +x;");
876   verifyFormat("x = -x;");
877   verifyFormat("x = !x;");
878   verifyFormat("x = ~x;");
879   verifyFormat("x = &x;");
880   verifyFormat("x = ~&x;");
881   verifyFormat("x = |x;");
882   verifyFormat("x = ~|x;");
883   verifyFormat("x = ^x;");
884   verifyFormat("x = ~^x;");
885   verifyFormat("x = ^~x;");
886   verifyFormat("x = ++x;");
887   verifyFormat("x = --x;");
888 
889   // Test that `*` and `*>` are binary.
890   verifyFormat("x = x * x;");
891   verifyFormat("x = (x * x);");
892   verifyFormat("(opcode *> o1) = 6.1;");
893   verifyFormat("(C, D *> Q) = 18;");
894   // The wildcard import is not a binary operator.
895   verifyFormat("import p::*;");
896 
897   // Test that operators don't get split.
898   verifyFormat("x = x++;");
899   verifyFormat("x = x--;");
900   verifyFormat("x = x ** x;");
901   verifyFormat("x = x << x;");
902   verifyFormat("x = x >> x;");
903   verifyFormat("x = x <<< x;");
904   verifyFormat("x = x >>> x;");
905   verifyFormat("x = x <= x;");
906   verifyFormat("x = x >= x;");
907   verifyFormat("x = x == x;");
908   verifyFormat("x = x != x;");
909   verifyFormat("x = x === x;");
910   verifyFormat("x = x !== x;");
911   verifyFormat("x = x ==? x;");
912   verifyFormat("x = x !=? x;");
913   verifyFormat("x = x ~^ x;");
914   verifyFormat("x = x ^~ x;");
915   verifyFormat("x = x && x;");
916   verifyFormat("x = x || x;");
917   verifyFormat("x = x->x;");
918   verifyFormat("x = x <-> x;");
919   verifyFormat("x += x;");
920   verifyFormat("x -= x;");
921   verifyFormat("x *= x;");
922   verifyFormat("x /= x;");
923   verifyFormat("x %= x;");
924   verifyFormat("x &= x;");
925   verifyFormat("x ^= x;");
926   verifyFormat("x |= x;");
927   verifyFormat("x <<= x;");
928   verifyFormat("x >>= x;");
929   verifyFormat("x <<<= x;");
930   verifyFormat("x >>>= x;");
931   verifyFormat("x <= x;");
932 
933   // Test that space is added between operators.
934   verifyFormat("x = x < -x;", "x=x<-x;");
935   verifyFormat("x = x << -x;", "x=x<<-x;");
936   verifyFormat("x = x <<< -x;", "x=x<<<-x;");
937 
938   // Test that operators that are C++ identifiers get treated as operators.
939   verifyFormat("solve s before d;");                       // before
940   verifyFormat("binsof(i) intersect {0};");                // intersect
941   verifyFormat("req dist {1};");                           // dist
942   verifyFormat("a inside {b, c};");                        // inside
943   verifyFormat("bus.randomize() with { atype == low; };"); // with
944 }
945 
946 TEST_F(FormatTestVerilog, Preprocessor) {
947   auto Style = getDefaultStyle();
948   Style.ColumnLimit = 20;
949 
950   // Macro definitions.
951   verifyFormat("`define X          \\\n"
952                "  if (x)           \\\n"
953                "    x = x;",
954                "`define X if(x)x=x;", Style);
955   verifyFormat("`define X(x)       \\\n"
956                "  if (x)           \\\n"
957                "    x = x;",
958                "`define X(x) if(x)x=x;", Style);
959   verifyFormat("`define X          \\\n"
960                "  x = x;           \\\n"
961                "  x = x;",
962                "`define X x=x;x=x;", Style);
963   // Macro definitions with invocations inside.
964   verifyFormat("`define LIST       \\\n"
965                "  `ENTRY           \\\n"
966                "  `ENTRY",
967                "`define LIST \\\n"
968                "`ENTRY \\\n"
969                "`ENTRY",
970                Style);
971   verifyFormat("`define LIST       \\\n"
972                "  `x = `x;         \\\n"
973                "  `x = `x;",
974                "`define LIST \\\n"
975                "`x = `x; \\\n"
976                "`x = `x;",
977                Style);
978   verifyFormat("`define LIST       \\\n"
979                "  `x = `x;         \\\n"
980                "  `x = `x;",
981                "`define LIST `x=`x;`x=`x;", Style);
982   // Macro invocations.
983   verifyFormat("`x = (`x1 + `x2 + x);");
984   // Lines starting with a preprocessor directive should not be indented.
985   std::string Directives[] = {
986       "begin_keywords",
987       "celldefine",
988       "default_nettype",
989       "define",
990       "else",
991       "elsif",
992       "end_keywords",
993       "endcelldefine",
994       "endif",
995       "ifdef",
996       "ifndef",
997       "include",
998       "line",
999       "nounconnected_drive",
1000       "pragma",
1001       "resetall",
1002       "timescale",
1003       "unconnected_drive",
1004       "undef",
1005       "undefineall",
1006   };
1007   for (auto &Name : Directives) {
1008     verifyFormat("if (x)\n"
1009                  "`" +
1010                      Name +
1011                      "\n"
1012                      "  ;",
1013                  "if (x)\n"
1014                  "`" +
1015                      Name +
1016                      "\n"
1017                      ";",
1018                  Style);
1019   }
1020   // Lines starting with a regular macro invocation should be indented as a
1021   // normal line.
1022   verifyFormat("if (x)\n"
1023                "  `x = `x;\n"
1024                "`timescale 1ns / 1ps",
1025                "if (x)\n"
1026                "`x = `x;\n"
1027                "`timescale 1ns / 1ps",
1028                Style);
1029   verifyFormat("if (x)\n"
1030                "`timescale 1ns / 1ps\n"
1031                "  `x = `x;",
1032                "if (x)\n"
1033                "`timescale 1ns / 1ps\n"
1034                "`x = `x;",
1035                Style);
1036   std::string NonDirectives[] = {
1037       // For `__FILE__` and `__LINE__`, although the standard classifies them as
1038       // preprocessor directives, they are used like regular macros.
1039       "__FILE__", "__LINE__", "elif", "foo", "x",
1040   };
1041   for (auto &Name : NonDirectives) {
1042     verifyFormat("if (x)\n"
1043                  "  `" +
1044                      Name + ";",
1045                  "if (x)\n"
1046                  "`" +
1047                      Name +
1048                      "\n"
1049                      ";",
1050                  Style);
1051   }
1052 }
1053 
1054 TEST_F(FormatTestVerilog, Primitive) {
1055   verifyFormat("primitive multiplexer\n"
1056                "    (mux, control, dataA, dataB);\n"
1057                "  output mux;\n"
1058                "  input control, dataA, dataB;\n"
1059                "  table\n"
1060                "    0 1 ? : 1;\n"
1061                "    0 0 ? : 0;\n"
1062                "    1 ? 1 : 1;\n"
1063                "    1 ? 0 : 0;\n"
1064                "    x 0 0 : 0;\n"
1065                "    x 1 1 : 1;\n"
1066                "  endtable\n"
1067                "endprimitive");
1068   verifyFormat("primitive latch\n"
1069                "    (q, ena_, data);\n"
1070                "  output q;\n"
1071                "  reg q;\n"
1072                "  input ena_, data;\n"
1073                "  table\n"
1074                "    0 1 : ? : 1;\n"
1075                "    0 0 : ? : 0;\n"
1076                "    1 ? : ? : -;\n"
1077                "    ? * : ? : -;\n"
1078                "  endtable\n"
1079                "endprimitive");
1080   verifyFormat("primitive d\n"
1081                "    (q, clock, data);\n"
1082                "  output q;\n"
1083                "  reg q;\n"
1084                "  input clock, data;\n"
1085                "  table\n"
1086                "    (01) 0 : ? : 0;\n"
1087                "    (01) 1 : ? : 1;\n"
1088                "    (0?) 1 : 1 : 1;\n"
1089                "    (0?) 0 : 0 : 0;\n"
1090                "    (?0) ? : ? : -;\n"
1091                "    (?\?) ? : ? : -;\n"
1092                "  endtable\n"
1093                "endprimitive");
1094 }
1095 
1096 TEST_F(FormatTestVerilog, Streaming) {
1097   verifyFormat("x = {>>{j}};");
1098   verifyFormat("x = {>>byte{j}};");
1099   verifyFormat("x = {<<{j}};");
1100   verifyFormat("x = {<<byte{j}};");
1101   verifyFormat("x = {<<16{j}};");
1102   verifyFormat("x = {<<{8'b0011_0101}};");
1103   verifyFormat("x = {<<4{6'b11_0101}};");
1104   verifyFormat("x = {>>4{6'b11_0101}};");
1105   verifyFormat("x = {<<2{{<<{4'b1101}}}};");
1106   verifyFormat("bit [96 : 1] y = {>>{a, b, c}};");
1107   verifyFormat("int j = {>>{a, b, c}};");
1108   verifyFormat("{>>{a, b, c}} = 23'b1;");
1109   verifyFormat("{>>{a, b, c}} = x;");
1110   verifyFormat("{>>{j}} = x;");
1111   verifyFormat("{>>byte{j}} = x;");
1112   verifyFormat("{<<{j}} = x;");
1113   verifyFormat("{<<byte{j}} = x;");
1114 }
1115 
1116 TEST_F(FormatTestVerilog, StructLiteral) {
1117   verifyFormat("c = '{0, 0.0};");
1118   verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};");
1119   verifyFormat("c = '{a: 0, b: 0.0};");
1120   verifyFormat("c = '{a: 0, b: 0.0, default: 0};");
1121   verifyFormat("c = ab'{a: 0, b: 0.0};");
1122   verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};");
1123   verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};");
1124   verifyFormat("d = {int: 1, shortreal: 1.0};");
1125   verifyFormat("d = ab'{int: 1, shortreal: 1.0};");
1126   verifyFormat("c = '{default: 0};");
1127   auto Style = getDefaultStyle();
1128   Style.SpacesInContainerLiterals = true;
1129   verifyFormat("c = '{a : 0, b : 0.0};", Style);
1130   verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style);
1131   verifyFormat("c = ab'{a : 0, b : 0.0};", Style);
1132   verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style);
1133 }
1134 
1135 TEST_F(FormatTestVerilog, StructuredProcedure) {
1136   // Blocks should be indented correctly.
1137   verifyFormat("initial begin\n"
1138                "end");
1139   verifyFormat("initial begin\n"
1140                "  x <= x;\n"
1141                "  x <= x;\n"
1142                "end");
1143   verifyFormat("initial\n"
1144                "  x <= x;\n"
1145                "x <= x;");
1146   verifyFormat("always @(x) begin\n"
1147                "end");
1148   verifyFormat("always @(x) begin\n"
1149                "  x <= x;\n"
1150                "  x <= x;\n"
1151                "end");
1152   verifyFormat("always @(x)\n"
1153                "  x <= x;\n"
1154                "x <= x;");
1155   // Various keywords.
1156   verifyFormat("always @(x)\n"
1157                "  x <= x;");
1158   verifyFormat("always @(posedge x)\n"
1159                "  x <= x;");
1160   verifyFormat("always\n"
1161                "  x <= x;");
1162   verifyFormat("always @*\n"
1163                "  x <= x;");
1164   verifyFormat("always @(*)\n"
1165                "  x <= x;");
1166   verifyFormat("always_comb\n"
1167                "  x <= x;");
1168   verifyFormat("always_latch @(x)\n"
1169                "  x <= x;");
1170   verifyFormat("always_ff @(posedge x)\n"
1171                "  x <= x;");
1172   verifyFormat("initial\n"
1173                "  x <= x;");
1174   verifyFormat("final\n"
1175                "  x <= x;");
1176   verifyFormat("forever\n"
1177                "  x <= x;");
1178 }
1179 } // namespace
1180 } // namespace test
1181 } // namespace format
1182 } // namespace clang
1183