xref: /llvm-project/clang/test/Sema/riscv-rvv-vector-exp-ops.c (revision 3055c5815ac08aa0d8597bff63569b9ed8ec0822) 
1 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
2 // RUN:   -target-feature +v -target-feature +zfh -target-feature +zvfh \
3 // RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify
4 // REQUIRES: riscv-registered-target
5 
6 #include <riscv_vector.h>
7 
8 
test_exp_vv_i8mf8(vfloat32mf2_t v)9 vfloat32mf2_t test_exp_vv_i8mf8(vfloat32mf2_t v) {
10 
11   return __builtin_elementwise_exp(v);
12   // expected-error@-1 {{1st argument must be a vector, integer or floating point type}}
13 }
14 
test_exp2_vv_i8mf8(vfloat32mf2_t v)15 vfloat32mf2_t test_exp2_vv_i8mf8(vfloat32mf2_t v) {
16 
17   return __builtin_elementwise_exp2(v);
18   // expected-error@-1 {{1st argument must be a vector, integer or floating point type}}
19 }
20