1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --version 4 2 // Check code generation 3 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fclang-abi-compat=latest -std=c++20 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 5 // Check same results after serialization round-trip 6 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fclang-abi-compat=latest -std=c++20 -fopenmp -emit-pch -o %t %s 7 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fclang-abi-compat=latest -std=c++20 -fopenmp -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2 8 // expected-no-diagnostics 9 10 #ifndef HEADER 11 #define HEADER 12 13 // placeholder for loop body code. 14 extern "C" void body(...) {} 15 16 17 struct S { 18 int i; 19 S() { 20 #pragma omp tile sizes(5) 21 for (i = 7; i < 17; i += 3) 22 body(i); 23 } 24 } s; 25 26 extern "C" void foo1(int start, int end, int step) { 27 int i; 28 #pragma omp tile sizes(5) 29 for (i = start; i < end; i += step) 30 body(i); 31 } 32 33 extern "C" void foo2(int start, int end, int step) { 34 #pragma omp tile sizes(5,5) 35 for (int i = 7; i < 17; i+=3) 36 for (int j = 7; j < 17; j+=3) 37 body(i,j); 38 } 39 40 extern "C" void foo3() { 41 #pragma omp for 42 #pragma omp tile sizes(5,5) 43 for (int i = 7; i < 17; i += 3) 44 for (int j = 7; j < 17; j += 3) 45 body(i, j); 46 } 47 48 extern "C" void foo4() { 49 #pragma omp for collapse(2) 50 for (int k = 7; k < 17; k += 3) 51 #pragma omp tile sizes(5,5) 52 for (int i = 7; i < 17; i += 3) 53 for (int j = 7; j < 17; j += 3) 54 body(i, j); 55 } 56 57 58 extern "C" void foo5() { 59 #pragma omp for collapse(3) 60 #pragma omp tile sizes(5) 61 for (int i = 7; i < 17; i += 3) 62 for (int j = 7; j < 17; j += 3) 63 body(i, j); 64 } 65 66 67 extern "C" void foo6() { 68 #pragma omp parallel for 69 #pragma omp tile sizes(5) 70 for (int i = 7; i < 17; i += 3) 71 body(i); 72 } 73 74 75 template<typename T, T Step, T Tile> 76 void foo7(T start, T end) { 77 #pragma omp tile sizes(Tile) 78 for (T i = start; i < end; i += Step) 79 body(i); 80 } 81 82 extern "C" void tfoo7() { 83 foo7<int,3,5>(0, 42); 84 } 85 86 87 extern "C" void foo8(int a) { 88 #pragma omp tile sizes(a) 89 for (int i = 7; i < 17; i += 3) 90 body(i); 91 } 92 93 94 typedef struct { double array[12]; } data_t; 95 extern "C" void foo9(data_t data) { 96 #pragma omp tile sizes(5) 97 for (double v : data.array) 98 body(v); 99 } 100 101 102 extern "C" void foo10(data_t data) { 103 #pragma omp tile sizes(5) 104 for (double c = 42.0; double v : data.array) 105 body(c, v); 106 } 107 108 109 #endif /* HEADER */ 110 111 // CHECK1-LABEL: define dso_local void @body( 112 // CHECK1-SAME: ...) #[[ATTR0:[0-9]+]] { 113 // CHECK1-NEXT: entry: 114 // CHECK1-NEXT: ret void 115 // 116 // 117 // CHECK1-LABEL: define internal void @__cxx_global_var_init( 118 // CHECK1-SAME: ) #[[ATTR1:[0-9]+]] section ".text.startup" { 119 // CHECK1-NEXT: entry: 120 // CHECK1-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s) 121 // CHECK1-NEXT: ret void 122 // 123 // 124 // CHECK1-LABEL: define linkonce_odr void @_ZN1SC1Ev( 125 // CHECK1-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 { 126 // CHECK1-NEXT: entry: 127 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 128 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 129 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 130 // CHECK1-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 131 // CHECK1-NEXT: ret void 132 // 133 // 134 // CHECK1-LABEL: define linkonce_odr void @_ZN1SC2Ev( 135 // CHECK1-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 138 // CHECK1-NEXT: [[I2:%.*]] = alloca ptr, align 8 139 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 140 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 142 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 143 // CHECK1-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 144 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 145 // CHECK1-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0 146 // CHECK1-NEXT: store ptr [[I3]], ptr [[I2]], align 8 147 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 148 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 149 // CHECK1: for.cond: 150 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 151 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 152 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END12:%.*]] 153 // CHECK1: for.body: 154 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 155 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTTILE_0_IV_I]], align 4 156 // CHECK1-NEXT: br label [[FOR_COND4:%.*]] 157 // CHECK1: for.cond4: 158 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 159 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 160 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 5 161 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 4, [[ADD]] 162 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 163 // CHECK1: cond.true: 164 // CHECK1-NEXT: br label [[COND_END:%.*]] 165 // CHECK1: cond.false: 166 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 167 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP4]], 5 168 // CHECK1-NEXT: br label [[COND_END]] 169 // CHECK1: cond.end: 170 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[ADD6]], [[COND_FALSE]] ] 171 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP2]], [[COND]] 172 // CHECK1-NEXT: br i1 [[CMP7]], label [[FOR_BODY8:%.*]], label [[FOR_END:%.*]] 173 // CHECK1: for.body8: 174 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 175 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 3 176 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 7, [[MUL]] 177 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[I2]], align 8 178 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[TMP6]], align 4 179 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[I2]], align 8 180 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 181 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP8]]) 182 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 183 // CHECK1: for.inc: 184 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 185 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1 186 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 187 // CHECK1-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP3:![0-9]+]] 188 // CHECK1: for.end: 189 // CHECK1-NEXT: br label [[FOR_INC10:%.*]] 190 // CHECK1: for.inc10: 191 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 192 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP10]], 5 193 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[DOTFLOOR_0_IV_I]], align 4 194 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 195 // CHECK1: for.end12: 196 // CHECK1-NEXT: ret void 197 // 198 // 199 // CHECK1-LABEL: define dso_local void @foo1( 200 // CHECK1-SAME: i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR0]] { 201 // CHECK1-NEXT: entry: 202 // CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 203 // CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 204 // CHECK1-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4 205 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 206 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 207 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[DOTNEW_STEP:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 213 // CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 214 // CHECK1-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4 215 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 216 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 217 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 218 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 219 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 220 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 221 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[STEP_ADDR]], align 4 222 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTNEW_STEP]], align 4 223 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 224 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 225 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]] 226 // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 227 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 228 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], [[TMP6]] 229 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 230 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP7]] 231 // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 232 // CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 233 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 234 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 235 // CHECK1: for.cond: 236 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 237 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 238 // CHECK1-NEXT: [[ADD5:%.*]] = add i32 [[TMP9]], 1 239 // CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP8]], [[ADD5]] 240 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END17:%.*]] 241 // CHECK1: for.body: 242 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 243 // CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTTILE_0_IV_I]], align 4 244 // CHECK1-NEXT: br label [[FOR_COND6:%.*]] 245 // CHECK1: for.cond6: 246 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 247 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 248 // CHECK1-NEXT: [[ADD7:%.*]] = add i32 [[TMP12]], 1 249 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 250 // CHECK1-NEXT: [[ADD8:%.*]] = add i32 [[TMP13]], 5 251 // CHECK1-NEXT: [[CMP9:%.*]] = icmp ult i32 [[ADD7]], [[ADD8]] 252 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 253 // CHECK1: cond.true: 254 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 255 // CHECK1-NEXT: [[ADD10:%.*]] = add i32 [[TMP14]], 1 256 // CHECK1-NEXT: br label [[COND_END:%.*]] 257 // CHECK1: cond.false: 258 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 259 // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP15]], 5 260 // CHECK1-NEXT: br label [[COND_END]] 261 // CHECK1: cond.end: 262 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[ADD10]], [[COND_TRUE]] ], [ [[ADD11]], [[COND_FALSE]] ] 263 // CHECK1-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP11]], [[COND]] 264 // CHECK1-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END:%.*]] 265 // CHECK1: for.body13: 266 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 267 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 268 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 269 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP17]], [[TMP18]] 270 // CHECK1-NEXT: [[ADD14:%.*]] = add i32 [[TMP16]], [[MUL]] 271 // CHECK1-NEXT: store i32 [[ADD14]], ptr [[I]], align 4 272 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4 273 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP19]]) 274 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 275 // CHECK1: for.inc: 276 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 277 // CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP20]], 1 278 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 279 // CHECK1-NEXT: br label [[FOR_COND6]], !llvm.loop [[LOOP6:![0-9]+]] 280 // CHECK1: for.end: 281 // CHECK1-NEXT: br label [[FOR_INC15:%.*]] 282 // CHECK1: for.inc15: 283 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 284 // CHECK1-NEXT: [[ADD16:%.*]] = add i32 [[TMP21]], 5 285 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[DOTFLOOR_0_IV_I]], align 4 286 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 287 // CHECK1: for.end17: 288 // CHECK1-NEXT: ret void 289 // 290 // 291 // CHECK1-LABEL: define dso_local void @foo2( 292 // CHECK1-SAME: i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR0]] { 293 // CHECK1-NEXT: entry: 294 // CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 296 // CHECK1-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[DOTFLOOR_1_IV_J:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[DOTTILE_1_IV_J:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 304 // CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 305 // CHECK1-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4 306 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 307 // CHECK1-NEXT: store i32 7, ptr [[J]], align 4 308 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 309 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 310 // CHECK1: for.cond: 311 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 312 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 313 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END30:%.*]] 314 // CHECK1: for.body: 315 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_1_IV_J]], align 4 316 // CHECK1-NEXT: br label [[FOR_COND1:%.*]] 317 // CHECK1: for.cond1: 318 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 319 // CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP1]], 4 320 // CHECK1-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END27:%.*]] 321 // CHECK1: for.body3: 322 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 323 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTILE_0_IV_I]], align 4 324 // CHECK1-NEXT: br label [[FOR_COND4:%.*]] 325 // CHECK1: for.cond4: 326 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 327 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 328 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], 5 329 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 4, [[ADD]] 330 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 331 // CHECK1: cond.true: 332 // CHECK1-NEXT: br label [[COND_END:%.*]] 333 // CHECK1: cond.false: 334 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 335 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP5]], 5 336 // CHECK1-NEXT: br label [[COND_END]] 337 // CHECK1: cond.end: 338 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[ADD6]], [[COND_FALSE]] ] 339 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP3]], [[COND]] 340 // CHECK1-NEXT: br i1 [[CMP7]], label [[FOR_BODY8:%.*]], label [[FOR_END24:%.*]] 341 // CHECK1: for.body8: 342 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 343 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 3 344 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 7, [[MUL]] 345 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4 346 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 347 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTTILE_1_IV_J]], align 4 348 // CHECK1-NEXT: br label [[FOR_COND10:%.*]] 349 // CHECK1: for.cond10: 350 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 351 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 352 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP9]], 5 353 // CHECK1-NEXT: [[CMP12:%.*]] = icmp slt i32 4, [[ADD11]] 354 // CHECK1-NEXT: br i1 [[CMP12]], label [[COND_TRUE13:%.*]], label [[COND_FALSE14:%.*]] 355 // CHECK1: cond.true13: 356 // CHECK1-NEXT: br label [[COND_END16:%.*]] 357 // CHECK1: cond.false14: 358 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 359 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP10]], 5 360 // CHECK1-NEXT: br label [[COND_END16]] 361 // CHECK1: cond.end16: 362 // CHECK1-NEXT: [[COND17:%.*]] = phi i32 [ 4, [[COND_TRUE13]] ], [ [[ADD15]], [[COND_FALSE14]] ] 363 // CHECK1-NEXT: [[CMP18:%.*]] = icmp slt i32 [[TMP8]], [[COND17]] 364 // CHECK1-NEXT: br i1 [[CMP18]], label [[FOR_BODY19:%.*]], label [[FOR_END:%.*]] 365 // CHECK1: for.body19: 366 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 367 // CHECK1-NEXT: [[MUL20:%.*]] = mul nsw i32 [[TMP11]], 3 368 // CHECK1-NEXT: [[ADD21:%.*]] = add nsw i32 7, [[MUL20]] 369 // CHECK1-NEXT: store i32 [[ADD21]], ptr [[J]], align 4 370 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 371 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[J]], align 4 372 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP12]], i32 noundef [[TMP13]]) 373 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 374 // CHECK1: for.inc: 375 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 376 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1 377 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_1_IV_J]], align 4 378 // CHECK1-NEXT: br label [[FOR_COND10]], !llvm.loop [[LOOP8:![0-9]+]] 379 // CHECK1: for.end: 380 // CHECK1-NEXT: br label [[FOR_INC22:%.*]] 381 // CHECK1: for.inc22: 382 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 383 // CHECK1-NEXT: [[INC23:%.*]] = add nsw i32 [[TMP15]], 1 384 // CHECK1-NEXT: store i32 [[INC23]], ptr [[DOTTILE_0_IV_I]], align 4 385 // CHECK1-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP9:![0-9]+]] 386 // CHECK1: for.end24: 387 // CHECK1-NEXT: br label [[FOR_INC25:%.*]] 388 // CHECK1: for.inc25: 389 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 390 // CHECK1-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP16]], 5 391 // CHECK1-NEXT: store i32 [[ADD26]], ptr [[DOTFLOOR_1_IV_J]], align 4 392 // CHECK1-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP10:![0-9]+]] 393 // CHECK1: for.end27: 394 // CHECK1-NEXT: br label [[FOR_INC28:%.*]] 395 // CHECK1: for.inc28: 396 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 397 // CHECK1-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP17]], 5 398 // CHECK1-NEXT: store i32 [[ADD29]], ptr [[DOTFLOOR_0_IV_I]], align 4 399 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 400 // CHECK1: for.end30: 401 // CHECK1-NEXT: ret void 402 // 403 // 404 // CHECK1-LABEL: define dso_local void @foo3( 405 // CHECK1-SAME: ) #[[ATTR0]] { 406 // CHECK1-NEXT: entry: 407 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 408 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 409 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 411 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 412 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 413 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 414 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 415 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 416 // CHECK1-NEXT: [[DOTFLOOR_1_IV_J:%.*]] = alloca i32, align 4 417 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 418 // CHECK1-NEXT: [[DOTTILE_1_IV_J:%.*]] = alloca i32, align 4 419 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]]) 420 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 421 // CHECK1-NEXT: store i32 7, ptr [[J]], align 4 422 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 423 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_UB]], align 4 424 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 425 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 426 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 427 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 428 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 0 429 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 430 // CHECK1: cond.true: 431 // CHECK1-NEXT: br label [[COND_END:%.*]] 432 // CHECK1: cond.false: 433 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 434 // CHECK1-NEXT: br label [[COND_END]] 435 // CHECK1: cond.end: 436 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 0, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 437 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 438 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 439 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 440 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 441 // CHECK1: omp.inner.for.cond: 442 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 443 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 444 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 445 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 446 // CHECK1: omp.inner.for.body: 447 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 448 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 5 449 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 450 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTFLOOR_0_IV_I]], align 4 451 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_1_IV_J]], align 4 452 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 453 // CHECK1: for.cond: 454 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 455 // CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP7]], 4 456 // CHECK1-NEXT: br i1 [[CMP2]], label [[FOR_BODY:%.*]], label [[FOR_END32:%.*]] 457 // CHECK1: for.body: 458 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 459 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTTILE_0_IV_I]], align 4 460 // CHECK1-NEXT: br label [[FOR_COND3:%.*]] 461 // CHECK1: for.cond3: 462 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 463 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 464 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 5 465 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 4, [[ADD4]] 466 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]] 467 // CHECK1: cond.true6: 468 // CHECK1-NEXT: br label [[COND_END9:%.*]] 469 // CHECK1: cond.false7: 470 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 471 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 5 472 // CHECK1-NEXT: br label [[COND_END9]] 473 // CHECK1: cond.end9: 474 // CHECK1-NEXT: [[COND10:%.*]] = phi i32 [ 4, [[COND_TRUE6]] ], [ [[ADD8]], [[COND_FALSE7]] ] 475 // CHECK1-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP9]], [[COND10]] 476 // CHECK1-NEXT: br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END29:%.*]] 477 // CHECK1: for.body12: 478 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 479 // CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP12]], 3 480 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 7, [[MUL13]] 481 // CHECK1-NEXT: store i32 [[ADD14]], ptr [[I]], align 4 482 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 483 // CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTTILE_1_IV_J]], align 4 484 // CHECK1-NEXT: br label [[FOR_COND15:%.*]] 485 // CHECK1: for.cond15: 486 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 487 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 488 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP15]], 5 489 // CHECK1-NEXT: [[CMP17:%.*]] = icmp slt i32 4, [[ADD16]] 490 // CHECK1-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]] 491 // CHECK1: cond.true18: 492 // CHECK1-NEXT: br label [[COND_END21:%.*]] 493 // CHECK1: cond.false19: 494 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 495 // CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP16]], 5 496 // CHECK1-NEXT: br label [[COND_END21]] 497 // CHECK1: cond.end21: 498 // CHECK1-NEXT: [[COND22:%.*]] = phi i32 [ 4, [[COND_TRUE18]] ], [ [[ADD20]], [[COND_FALSE19]] ] 499 // CHECK1-NEXT: [[CMP23:%.*]] = icmp slt i32 [[TMP14]], [[COND22]] 500 // CHECK1-NEXT: br i1 [[CMP23]], label [[FOR_BODY24:%.*]], label [[FOR_END:%.*]] 501 // CHECK1: for.body24: 502 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 503 // CHECK1-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP17]], 3 504 // CHECK1-NEXT: [[ADD26:%.*]] = add nsw i32 7, [[MUL25]] 505 // CHECK1-NEXT: store i32 [[ADD26]], ptr [[J]], align 4 506 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4 507 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[J]], align 4 508 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP18]], i32 noundef [[TMP19]]) 509 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 510 // CHECK1: for.inc: 511 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 512 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 513 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_1_IV_J]], align 4 514 // CHECK1-NEXT: br label [[FOR_COND15]], !llvm.loop [[LOOP12:![0-9]+]] 515 // CHECK1: for.end: 516 // CHECK1-NEXT: br label [[FOR_INC27:%.*]] 517 // CHECK1: for.inc27: 518 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 519 // CHECK1-NEXT: [[INC28:%.*]] = add nsw i32 [[TMP21]], 1 520 // CHECK1-NEXT: store i32 [[INC28]], ptr [[DOTTILE_0_IV_I]], align 4 521 // CHECK1-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP13:![0-9]+]] 522 // CHECK1: for.end29: 523 // CHECK1-NEXT: br label [[FOR_INC30:%.*]] 524 // CHECK1: for.inc30: 525 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 526 // CHECK1-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 5 527 // CHECK1-NEXT: store i32 [[ADD31]], ptr [[DOTFLOOR_1_IV_J]], align 4 528 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 529 // CHECK1: for.end32: 530 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 531 // CHECK1: omp.body.continue: 532 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 533 // CHECK1: omp.inner.for.inc: 534 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 535 // CHECK1-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP23]], 1 536 // CHECK1-NEXT: store i32 [[ADD33]], ptr [[DOTOMP_IV]], align 4 537 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 538 // CHECK1: omp.inner.for.end: 539 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 540 // CHECK1: omp.loop.exit: 541 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 542 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[TMP0]]) 543 // CHECK1-NEXT: ret void 544 // 545 // 546 // CHECK1-LABEL: define dso_local void @foo4( 547 // CHECK1-SAME: ) #[[ATTR0]] { 548 // CHECK1-NEXT: entry: 549 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 550 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 551 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 552 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 553 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 554 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 555 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 556 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 557 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 558 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4 559 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 560 // CHECK1-NEXT: [[DOTFLOOR_1_IV_J:%.*]] = alloca i32, align 4 561 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 562 // CHECK1-NEXT: [[DOTTILE_1_IV_J:%.*]] = alloca i32, align 4 563 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 564 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 565 // CHECK1-NEXT: store i32 7, ptr [[J]], align 4 566 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 567 // CHECK1-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4 568 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 569 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 570 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 571 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 572 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 3 573 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 574 // CHECK1: cond.true: 575 // CHECK1-NEXT: br label [[COND_END:%.*]] 576 // CHECK1: cond.false: 577 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 578 // CHECK1-NEXT: br label [[COND_END]] 579 // CHECK1: cond.end: 580 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 581 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 582 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 583 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 584 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 585 // CHECK1: omp.inner.for.cond: 586 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 587 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 588 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 589 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 590 // CHECK1: omp.inner.for.body: 591 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 592 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP6]], 1 593 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 3 594 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]] 595 // CHECK1-NEXT: store i32 [[ADD]], ptr [[K]], align 4 596 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 597 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 598 // CHECK1-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP8]], 1 599 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 1 600 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], [[MUL4]] 601 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 5 602 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 603 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTFLOOR_0_IV_I]], align 4 604 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_1_IV_J]], align 4 605 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 606 // CHECK1: for.cond: 607 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 608 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP9]], 4 609 // CHECK1-NEXT: br i1 [[CMP7]], label [[FOR_BODY:%.*]], label [[FOR_END37:%.*]] 610 // CHECK1: for.body: 611 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 612 // CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTTILE_0_IV_I]], align 4 613 // CHECK1-NEXT: br label [[FOR_COND8:%.*]] 614 // CHECK1: for.cond8: 615 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 616 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 617 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 5 618 // CHECK1-NEXT: [[CMP10:%.*]] = icmp slt i32 4, [[ADD9]] 619 // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 620 // CHECK1: cond.true11: 621 // CHECK1-NEXT: br label [[COND_END14:%.*]] 622 // CHECK1: cond.false12: 623 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 624 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP13]], 5 625 // CHECK1-NEXT: br label [[COND_END14]] 626 // CHECK1: cond.end14: 627 // CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ 4, [[COND_TRUE11]] ], [ [[ADD13]], [[COND_FALSE12]] ] 628 // CHECK1-NEXT: [[CMP16:%.*]] = icmp slt i32 [[TMP11]], [[COND15]] 629 // CHECK1-NEXT: br i1 [[CMP16]], label [[FOR_BODY17:%.*]], label [[FOR_END34:%.*]] 630 // CHECK1: for.body17: 631 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 632 // CHECK1-NEXT: [[MUL18:%.*]] = mul nsw i32 [[TMP14]], 3 633 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 7, [[MUL18]] 634 // CHECK1-NEXT: store i32 [[ADD19]], ptr [[I]], align 4 635 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 636 // CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTTILE_1_IV_J]], align 4 637 // CHECK1-NEXT: br label [[FOR_COND20:%.*]] 638 // CHECK1: for.cond20: 639 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 640 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 641 // CHECK1-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP17]], 5 642 // CHECK1-NEXT: [[CMP22:%.*]] = icmp slt i32 4, [[ADD21]] 643 // CHECK1-NEXT: br i1 [[CMP22]], label [[COND_TRUE23:%.*]], label [[COND_FALSE24:%.*]] 644 // CHECK1: cond.true23: 645 // CHECK1-NEXT: br label [[COND_END26:%.*]] 646 // CHECK1: cond.false24: 647 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 648 // CHECK1-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP18]], 5 649 // CHECK1-NEXT: br label [[COND_END26]] 650 // CHECK1: cond.end26: 651 // CHECK1-NEXT: [[COND27:%.*]] = phi i32 [ 4, [[COND_TRUE23]] ], [ [[ADD25]], [[COND_FALSE24]] ] 652 // CHECK1-NEXT: [[CMP28:%.*]] = icmp slt i32 [[TMP16]], [[COND27]] 653 // CHECK1-NEXT: br i1 [[CMP28]], label [[FOR_BODY29:%.*]], label [[FOR_END:%.*]] 654 // CHECK1: for.body29: 655 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 656 // CHECK1-NEXT: [[MUL30:%.*]] = mul nsw i32 [[TMP19]], 3 657 // CHECK1-NEXT: [[ADD31:%.*]] = add nsw i32 7, [[MUL30]] 658 // CHECK1-NEXT: store i32 [[ADD31]], ptr [[J]], align 4 659 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[I]], align 4 660 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[J]], align 4 661 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP20]], i32 noundef [[TMP21]]) 662 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 663 // CHECK1: for.inc: 664 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 665 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP22]], 1 666 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_1_IV_J]], align 4 667 // CHECK1-NEXT: br label [[FOR_COND20]], !llvm.loop [[LOOP15:![0-9]+]] 668 // CHECK1: for.end: 669 // CHECK1-NEXT: br label [[FOR_INC32:%.*]] 670 // CHECK1: for.inc32: 671 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 672 // CHECK1-NEXT: [[INC33:%.*]] = add nsw i32 [[TMP23]], 1 673 // CHECK1-NEXT: store i32 [[INC33]], ptr [[DOTTILE_0_IV_I]], align 4 674 // CHECK1-NEXT: br label [[FOR_COND8]], !llvm.loop [[LOOP16:![0-9]+]] 675 // CHECK1: for.end34: 676 // CHECK1-NEXT: br label [[FOR_INC35:%.*]] 677 // CHECK1: for.inc35: 678 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 679 // CHECK1-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP24]], 5 680 // CHECK1-NEXT: store i32 [[ADD36]], ptr [[DOTFLOOR_1_IV_J]], align 4 681 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 682 // CHECK1: for.end37: 683 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 684 // CHECK1: omp.body.continue: 685 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 686 // CHECK1: omp.inner.for.inc: 687 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 688 // CHECK1-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP25]], 1 689 // CHECK1-NEXT: store i32 [[ADD38]], ptr [[DOTOMP_IV]], align 4 690 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 691 // CHECK1: omp.inner.for.end: 692 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 693 // CHECK1: omp.loop.exit: 694 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 695 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 696 // CHECK1-NEXT: ret void 697 // 698 // 699 // CHECK1-LABEL: define dso_local void @foo5( 700 // CHECK1-SAME: ) #[[ATTR0]] { 701 // CHECK1-NEXT: entry: 702 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 703 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 704 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 705 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 707 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 708 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 709 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 710 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 711 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 712 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 713 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 714 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 715 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 716 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 717 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I11:%.*]] = alloca i32, align 4 718 // CHECK1-NEXT: [[DOTTILE_0_IV_I12:%.*]] = alloca i32, align 4 719 // CHECK1-NEXT: [[J13:%.*]] = alloca i32, align 4 720 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 721 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 722 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP]], align 4 723 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 724 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP]], align 4 725 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 5 726 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 4, [[ADD]] 727 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 728 // CHECK1: cond.true: 729 // CHECK1-NEXT: br label [[COND_END:%.*]] 730 // CHECK1: cond.false: 731 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP]], align 4 732 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP3]], 5 733 // CHECK1-NEXT: br label [[COND_END]] 734 // CHECK1: cond.end: 735 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[ADD4]], [[COND_FALSE]] ] 736 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTCAPTURE_EXPR_3]], align 4 737 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 738 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 739 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]] 740 // CHECK1-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 741 // CHECK1-NEXT: [[ADD7:%.*]] = add i32 [[SUB6]], 1 742 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD7]], 1 743 // CHECK1-NEXT: [[CONV:%.*]] = zext i32 [[DIV]] to i64 744 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 1, [[CONV]] 745 // CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i64 [[MUL]], 4 746 // CHECK1-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL8]], 1 747 // CHECK1-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 748 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 749 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 750 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTTILE_0_IV_I]], align 4 751 // CHECK1-NEXT: store i32 7, ptr [[J]], align 4 752 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 753 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 754 // CHECK1-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]] 755 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 756 // CHECK1: omp.precond.then: 757 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 758 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 759 // CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8 760 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 761 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 762 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 763 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 764 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 765 // CHECK1-NEXT: [[CMP14:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]] 766 // CHECK1-NEXT: br i1 [[CMP14]], label [[COND_TRUE15:%.*]], label [[COND_FALSE16:%.*]] 767 // CHECK1: cond.true15: 768 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 769 // CHECK1-NEXT: br label [[COND_END17:%.*]] 770 // CHECK1: cond.false16: 771 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 772 // CHECK1-NEXT: br label [[COND_END17]] 773 // CHECK1: cond.end17: 774 // CHECK1-NEXT: [[COND18:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE15]] ], [ [[TMP13]], [[COND_FALSE16]] ] 775 // CHECK1-NEXT: store i64 [[COND18]], ptr [[DOTOMP_UB]], align 8 776 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 777 // CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTOMP_IV]], align 8 778 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 779 // CHECK1: omp.inner.for.cond: 780 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 781 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 782 // CHECK1-NEXT: [[CMP19:%.*]] = icmp sle i64 [[TMP15]], [[TMP16]] 783 // CHECK1-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 784 // CHECK1: omp.inner.for.body: 785 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 786 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 787 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 788 // CHECK1-NEXT: [[SUB20:%.*]] = sub i32 [[TMP18]], [[TMP19]] 789 // CHECK1-NEXT: [[SUB21:%.*]] = sub i32 [[SUB20]], 1 790 // CHECK1-NEXT: [[ADD22:%.*]] = add i32 [[SUB21]], 1 791 // CHECK1-NEXT: [[DIV23:%.*]] = udiv i32 [[ADD22]], 1 792 // CHECK1-NEXT: [[MUL24:%.*]] = mul i32 1, [[DIV23]] 793 // CHECK1-NEXT: [[MUL25:%.*]] = mul i32 [[MUL24]], 4 794 // CHECK1-NEXT: [[CONV26:%.*]] = zext i32 [[MUL25]] to i64 795 // CHECK1-NEXT: [[DIV27:%.*]] = sdiv i64 [[TMP17]], [[CONV26]] 796 // CHECK1-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV27]], 5 797 // CHECK1-NEXT: [[ADD29:%.*]] = add nsw i64 0, [[MUL28]] 798 // CHECK1-NEXT: [[CONV30:%.*]] = trunc i64 [[ADD29]] to i32 799 // CHECK1-NEXT: store i32 [[CONV30]], ptr [[DOTFLOOR_0_IV_I11]], align 4 800 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 801 // CHECK1-NEXT: [[CONV31:%.*]] = sext i32 [[TMP20]] to i64 802 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 803 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 804 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 805 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 806 // CHECK1-NEXT: [[SUB32:%.*]] = sub i32 [[TMP23]], [[TMP24]] 807 // CHECK1-NEXT: [[SUB33:%.*]] = sub i32 [[SUB32]], 1 808 // CHECK1-NEXT: [[ADD34:%.*]] = add i32 [[SUB33]], 1 809 // CHECK1-NEXT: [[DIV35:%.*]] = udiv i32 [[ADD34]], 1 810 // CHECK1-NEXT: [[MUL36:%.*]] = mul i32 1, [[DIV35]] 811 // CHECK1-NEXT: [[MUL37:%.*]] = mul i32 [[MUL36]], 4 812 // CHECK1-NEXT: [[CONV38:%.*]] = zext i32 [[MUL37]] to i64 813 // CHECK1-NEXT: [[DIV39:%.*]] = sdiv i64 [[TMP22]], [[CONV38]] 814 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 815 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 816 // CHECK1-NEXT: [[SUB40:%.*]] = sub i32 [[TMP25]], [[TMP26]] 817 // CHECK1-NEXT: [[SUB41:%.*]] = sub i32 [[SUB40]], 1 818 // CHECK1-NEXT: [[ADD42:%.*]] = add i32 [[SUB41]], 1 819 // CHECK1-NEXT: [[DIV43:%.*]] = udiv i32 [[ADD42]], 1 820 // CHECK1-NEXT: [[MUL44:%.*]] = mul i32 1, [[DIV43]] 821 // CHECK1-NEXT: [[MUL45:%.*]] = mul i32 [[MUL44]], 4 822 // CHECK1-NEXT: [[CONV46:%.*]] = zext i32 [[MUL45]] to i64 823 // CHECK1-NEXT: [[MUL47:%.*]] = mul nsw i64 [[DIV39]], [[CONV46]] 824 // CHECK1-NEXT: [[SUB48:%.*]] = sub nsw i64 [[TMP21]], [[MUL47]] 825 // CHECK1-NEXT: [[DIV49:%.*]] = sdiv i64 [[SUB48]], 4 826 // CHECK1-NEXT: [[MUL50:%.*]] = mul nsw i64 [[DIV49]], 1 827 // CHECK1-NEXT: [[ADD51:%.*]] = add nsw i64 [[CONV31]], [[MUL50]] 828 // CHECK1-NEXT: [[CONV52:%.*]] = trunc i64 [[ADD51]] to i32 829 // CHECK1-NEXT: store i32 [[CONV52]], ptr [[DOTTILE_0_IV_I12]], align 4 830 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 831 // CHECK1-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 832 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 833 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 834 // CHECK1-NEXT: [[SUB53:%.*]] = sub i32 [[TMP29]], [[TMP30]] 835 // CHECK1-NEXT: [[SUB54:%.*]] = sub i32 [[SUB53]], 1 836 // CHECK1-NEXT: [[ADD55:%.*]] = add i32 [[SUB54]], 1 837 // CHECK1-NEXT: [[DIV56:%.*]] = udiv i32 [[ADD55]], 1 838 // CHECK1-NEXT: [[MUL57:%.*]] = mul i32 1, [[DIV56]] 839 // CHECK1-NEXT: [[MUL58:%.*]] = mul i32 [[MUL57]], 4 840 // CHECK1-NEXT: [[CONV59:%.*]] = zext i32 [[MUL58]] to i64 841 // CHECK1-NEXT: [[DIV60:%.*]] = sdiv i64 [[TMP28]], [[CONV59]] 842 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 843 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 844 // CHECK1-NEXT: [[SUB61:%.*]] = sub i32 [[TMP31]], [[TMP32]] 845 // CHECK1-NEXT: [[SUB62:%.*]] = sub i32 [[SUB61]], 1 846 // CHECK1-NEXT: [[ADD63:%.*]] = add i32 [[SUB62]], 1 847 // CHECK1-NEXT: [[DIV64:%.*]] = udiv i32 [[ADD63]], 1 848 // CHECK1-NEXT: [[MUL65:%.*]] = mul i32 1, [[DIV64]] 849 // CHECK1-NEXT: [[MUL66:%.*]] = mul i32 [[MUL65]], 4 850 // CHECK1-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64 851 // CHECK1-NEXT: [[MUL68:%.*]] = mul nsw i64 [[DIV60]], [[CONV67]] 852 // CHECK1-NEXT: [[SUB69:%.*]] = sub nsw i64 [[TMP27]], [[MUL68]] 853 // CHECK1-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 854 // CHECK1-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 855 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 856 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 857 // CHECK1-NEXT: [[SUB70:%.*]] = sub i32 [[TMP35]], [[TMP36]] 858 // CHECK1-NEXT: [[SUB71:%.*]] = sub i32 [[SUB70]], 1 859 // CHECK1-NEXT: [[ADD72:%.*]] = add i32 [[SUB71]], 1 860 // CHECK1-NEXT: [[DIV73:%.*]] = udiv i32 [[ADD72]], 1 861 // CHECK1-NEXT: [[MUL74:%.*]] = mul i32 1, [[DIV73]] 862 // CHECK1-NEXT: [[MUL75:%.*]] = mul i32 [[MUL74]], 4 863 // CHECK1-NEXT: [[CONV76:%.*]] = zext i32 [[MUL75]] to i64 864 // CHECK1-NEXT: [[DIV77:%.*]] = sdiv i64 [[TMP34]], [[CONV76]] 865 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 866 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 867 // CHECK1-NEXT: [[SUB78:%.*]] = sub i32 [[TMP37]], [[TMP38]] 868 // CHECK1-NEXT: [[SUB79:%.*]] = sub i32 [[SUB78]], 1 869 // CHECK1-NEXT: [[ADD80:%.*]] = add i32 [[SUB79]], 1 870 // CHECK1-NEXT: [[DIV81:%.*]] = udiv i32 [[ADD80]], 1 871 // CHECK1-NEXT: [[MUL82:%.*]] = mul i32 1, [[DIV81]] 872 // CHECK1-NEXT: [[MUL83:%.*]] = mul i32 [[MUL82]], 4 873 // CHECK1-NEXT: [[CONV84:%.*]] = zext i32 [[MUL83]] to i64 874 // CHECK1-NEXT: [[MUL85:%.*]] = mul nsw i64 [[DIV77]], [[CONV84]] 875 // CHECK1-NEXT: [[SUB86:%.*]] = sub nsw i64 [[TMP33]], [[MUL85]] 876 // CHECK1-NEXT: [[DIV87:%.*]] = sdiv i64 [[SUB86]], 4 877 // CHECK1-NEXT: [[MUL88:%.*]] = mul nsw i64 [[DIV87]], 4 878 // CHECK1-NEXT: [[SUB89:%.*]] = sub nsw i64 [[SUB69]], [[MUL88]] 879 // CHECK1-NEXT: [[MUL90:%.*]] = mul nsw i64 [[SUB89]], 3 880 // CHECK1-NEXT: [[ADD91:%.*]] = add nsw i64 7, [[MUL90]] 881 // CHECK1-NEXT: [[CONV92:%.*]] = trunc i64 [[ADD91]] to i32 882 // CHECK1-NEXT: store i32 [[CONV92]], ptr [[J13]], align 4 883 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTTILE_0_IV_I12]], align 4 884 // CHECK1-NEXT: [[MUL93:%.*]] = mul nsw i32 [[TMP39]], 3 885 // CHECK1-NEXT: [[ADD94:%.*]] = add nsw i32 7, [[MUL93]] 886 // CHECK1-NEXT: store i32 [[ADD94]], ptr [[I]], align 4 887 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, ptr [[I]], align 4 888 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[J13]], align 4 889 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP40]], i32 noundef [[TMP41]]) 890 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 891 // CHECK1: omp.body.continue: 892 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 893 // CHECK1: omp.inner.for.inc: 894 // CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 895 // CHECK1-NEXT: [[ADD95:%.*]] = add nsw i64 [[TMP42]], 1 896 // CHECK1-NEXT: store i64 [[ADD95]], ptr [[DOTOMP_IV]], align 8 897 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 898 // CHECK1: omp.inner.for.end: 899 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 900 // CHECK1: omp.loop.exit: 901 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 902 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 903 // CHECK1: omp.precond.end: 904 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 905 // CHECK1-NEXT: ret void 906 // 907 // 908 // CHECK1-LABEL: define dso_local void @foo6( 909 // CHECK1-SAME: ) #[[ATTR0]] { 910 // CHECK1-NEXT: entry: 911 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @foo6.omp_outlined) 912 // CHECK1-NEXT: ret void 913 // 914 // 915 // CHECK1-LABEL: define internal void @foo6.omp_outlined( 916 // CHECK1-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] { 917 // CHECK1-NEXT: entry: 918 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 919 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 920 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 921 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 922 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 923 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 924 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 925 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 926 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 927 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 928 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 929 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 930 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 931 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 932 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 933 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_UB]], align 4 934 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 935 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 936 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 937 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 938 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 939 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 940 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 0 941 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 942 // CHECK1: cond.true: 943 // CHECK1-NEXT: br label [[COND_END:%.*]] 944 // CHECK1: cond.false: 945 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 946 // CHECK1-NEXT: br label [[COND_END]] 947 // CHECK1: cond.end: 948 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 0, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 949 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 950 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 951 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 952 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 953 // CHECK1: omp.inner.for.cond: 954 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 955 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 956 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 957 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 958 // CHECK1: omp.inner.for.body: 959 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 960 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 5 961 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 962 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTFLOOR_0_IV_I]], align 4 963 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 964 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTTILE_0_IV_I]], align 4 965 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 966 // CHECK1: for.cond: 967 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 968 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 969 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 5 970 // CHECK1-NEXT: [[CMP3:%.*]] = icmp slt i32 4, [[ADD2]] 971 // CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 972 // CHECK1: cond.true4: 973 // CHECK1-NEXT: br label [[COND_END7:%.*]] 974 // CHECK1: cond.false5: 975 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 976 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 5 977 // CHECK1-NEXT: br label [[COND_END7]] 978 // CHECK1: cond.end7: 979 // CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 4, [[COND_TRUE4]] ], [ [[ADD6]], [[COND_FALSE5]] ] 980 // CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP9]], [[COND8]] 981 // CHECK1-NEXT: br i1 [[CMP9]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 982 // CHECK1: for.body: 983 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 984 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP12]], 3 985 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 7, [[MUL10]] 986 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[I]], align 4 987 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 988 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP13]]) 989 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 990 // CHECK1: for.inc: 991 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 992 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1 993 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 994 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 995 // CHECK1: for.end: 996 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 997 // CHECK1: omp.body.continue: 998 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 999 // CHECK1: omp.inner.for.inc: 1000 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1001 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP15]], 1 1002 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4 1003 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1004 // CHECK1: omp.inner.for.end: 1005 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1006 // CHECK1: omp.loop.exit: 1007 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1008 // CHECK1-NEXT: ret void 1009 // 1010 // 1011 // CHECK1-LABEL: define dso_local void @tfoo7( 1012 // CHECK1-SAME: ) #[[ATTR0]] { 1013 // CHECK1-NEXT: entry: 1014 // CHECK1-NEXT: call void @_Z4foo7IiTnT_Li3ETnS0_Li5EEvS0_S0_(i32 noundef 0, i32 noundef 42) 1015 // CHECK1-NEXT: ret void 1016 // 1017 // 1018 // CHECK1-LABEL: define linkonce_odr void @_Z4foo7IiTnT_Li3ETnS0_Li5EEvS0_S0_( 1019 // CHECK1-SAME: i32 noundef [[START:%.*]], i32 noundef [[END:%.*]]) #[[ATTR0]] comdat { 1020 // CHECK1-NEXT: entry: 1021 // CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 1022 // CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 1023 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1024 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1025 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1026 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1027 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1028 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1029 // CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 1030 // CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 1031 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 1032 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 1033 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 1034 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1035 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 1036 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1037 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1038 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1039 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 1040 // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 1041 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 3 1042 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 3 1043 // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 1044 // CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1045 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 1046 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 1047 // CHECK1: for.cond: 1048 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1049 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1050 // CHECK1-NEXT: [[ADD5:%.*]] = add i32 [[TMP6]], 1 1051 // CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP5]], [[ADD5]] 1052 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END17:%.*]] 1053 // CHECK1: for.body: 1054 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1055 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTTILE_0_IV_I]], align 4 1056 // CHECK1-NEXT: br label [[FOR_COND6:%.*]] 1057 // CHECK1: for.cond6: 1058 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1059 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1060 // CHECK1-NEXT: [[ADD7:%.*]] = add i32 [[TMP9]], 1 1061 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1062 // CHECK1-NEXT: [[ADD8:%.*]] = add i32 [[TMP10]], 5 1063 // CHECK1-NEXT: [[CMP9:%.*]] = icmp ult i32 [[ADD7]], [[ADD8]] 1064 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1065 // CHECK1: cond.true: 1066 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1067 // CHECK1-NEXT: [[ADD10:%.*]] = add i32 [[TMP11]], 1 1068 // CHECK1-NEXT: br label [[COND_END:%.*]] 1069 // CHECK1: cond.false: 1070 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1071 // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP12]], 5 1072 // CHECK1-NEXT: br label [[COND_END]] 1073 // CHECK1: cond.end: 1074 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[ADD10]], [[COND_TRUE]] ], [ [[ADD11]], [[COND_FALSE]] ] 1075 // CHECK1-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP8]], [[COND]] 1076 // CHECK1-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END:%.*]] 1077 // CHECK1: for.body13: 1078 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1079 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1080 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP14]], 3 1081 // CHECK1-NEXT: [[ADD14:%.*]] = add i32 [[TMP13]], [[MUL]] 1082 // CHECK1-NEXT: store i32 [[ADD14]], ptr [[I]], align 4 1083 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 1084 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP15]]) 1085 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 1086 // CHECK1: for.inc: 1087 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1088 // CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP16]], 1 1089 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 1090 // CHECK1-NEXT: br label [[FOR_COND6]], !llvm.loop [[LOOP21:![0-9]+]] 1091 // CHECK1: for.end: 1092 // CHECK1-NEXT: br label [[FOR_INC15:%.*]] 1093 // CHECK1: for.inc15: 1094 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1095 // CHECK1-NEXT: [[ADD16:%.*]] = add i32 [[TMP17]], 5 1096 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[DOTFLOOR_0_IV_I]], align 4 1097 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 1098 // CHECK1: for.end17: 1099 // CHECK1-NEXT: ret void 1100 // 1101 // 1102 // CHECK1-LABEL: define dso_local void @foo8( 1103 // CHECK1-SAME: i32 noundef [[A:%.*]]) #[[ATTR0]] { 1104 // CHECK1-NEXT: entry: 1105 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1106 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1107 // CHECK1-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1108 // CHECK1-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1109 // CHECK1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1110 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 1111 // CHECK1-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 1112 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 1113 // CHECK1: for.cond: 1114 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1115 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 1116 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END24:%.*]] 1117 // CHECK1: for.body: 1118 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1119 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTTILE_0_IV_I]], align 4 1120 // CHECK1-NEXT: br label [[FOR_COND1:%.*]] 1121 // CHECK1: for.cond1: 1122 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1123 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1124 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4 1125 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP4]], 0 1126 // CHECK1-NEXT: br i1 [[CMP2]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1127 // CHECK1: cond.true: 1128 // CHECK1-NEXT: br label [[COND_END:%.*]] 1129 // CHECK1: cond.false: 1130 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[A_ADDR]], align 4 1131 // CHECK1-NEXT: br label [[COND_END]] 1132 // CHECK1: cond.end: 1133 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1134 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[COND]] 1135 // CHECK1-NEXT: [[CMP3:%.*]] = icmp slt i32 4, [[ADD]] 1136 // CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 1137 // CHECK1: cond.true4: 1138 // CHECK1-NEXT: br label [[COND_END12:%.*]] 1139 // CHECK1: cond.false5: 1140 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1141 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[A_ADDR]], align 4 1142 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP7]], 0 1143 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]] 1144 // CHECK1: cond.true7: 1145 // CHECK1-NEXT: br label [[COND_END9:%.*]] 1146 // CHECK1: cond.false8: 1147 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4 1148 // CHECK1-NEXT: br label [[COND_END9]] 1149 // CHECK1: cond.end9: 1150 // CHECK1-NEXT: [[COND10:%.*]] = phi i32 [ 1, [[COND_TRUE7]] ], [ [[TMP8]], [[COND_FALSE8]] ] 1151 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP6]], [[COND10]] 1152 // CHECK1-NEXT: br label [[COND_END12]] 1153 // CHECK1: cond.end12: 1154 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ 4, [[COND_TRUE4]] ], [ [[ADD11]], [[COND_END9]] ] 1155 // CHECK1-NEXT: [[CMP14:%.*]] = icmp slt i32 [[TMP2]], [[COND13]] 1156 // CHECK1-NEXT: br i1 [[CMP14]], label [[FOR_BODY15:%.*]], label [[FOR_END:%.*]] 1157 // CHECK1: for.body15: 1158 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1159 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 3 1160 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 7, [[MUL]] 1161 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I]], align 4 1162 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1163 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP10]]) 1164 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 1165 // CHECK1: for.inc: 1166 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1167 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 1168 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 1169 // CHECK1-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP23:![0-9]+]] 1170 // CHECK1: for.end: 1171 // CHECK1-NEXT: br label [[FOR_INC17:%.*]] 1172 // CHECK1: for.inc17: 1173 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[A_ADDR]], align 4 1174 // CHECK1-NEXT: [[CMP18:%.*]] = icmp sle i32 [[TMP12]], 0 1175 // CHECK1-NEXT: br i1 [[CMP18]], label [[COND_TRUE19:%.*]], label [[COND_FALSE20:%.*]] 1176 // CHECK1: cond.true19: 1177 // CHECK1-NEXT: br label [[COND_END21:%.*]] 1178 // CHECK1: cond.false20: 1179 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[A_ADDR]], align 4 1180 // CHECK1-NEXT: br label [[COND_END21]] 1181 // CHECK1: cond.end21: 1182 // CHECK1-NEXT: [[COND22:%.*]] = phi i32 [ 1, [[COND_TRUE19]] ], [ [[TMP13]], [[COND_FALSE20]] ] 1183 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1184 // CHECK1-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP14]], [[COND22]] 1185 // CHECK1-NEXT: store i32 [[ADD23]], ptr [[DOTFLOOR_0_IV_I]], align 4 1186 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 1187 // CHECK1: for.end24: 1188 // CHECK1-NEXT: ret void 1189 // 1190 // 1191 // CHECK1-LABEL: define dso_local void @foo9( 1192 // CHECK1-SAME: ptr noundef byval([[STRUCT_DATA_T:%.*]]) align 8 [[DATA:%.*]]) #[[ATTR0]] { 1193 // CHECK1-NEXT: entry: 1194 // CHECK1-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8 1195 // CHECK1-NEXT: [[__END2:%.*]] = alloca ptr, align 8 1196 // CHECK1-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8 1197 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 1198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8 1199 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1200 // CHECK1-NEXT: [[DOTFLOOR_0_IV___BEGIN2:%.*]] = alloca i64, align 8 1201 // CHECK1-NEXT: [[DOTTILE_0_IV___BEGIN2:%.*]] = alloca i64, align 8 1202 // CHECK1-NEXT: [[V:%.*]] = alloca double, align 8 1203 // CHECK1-NEXT: [[ARRAY:%.*]] = getelementptr inbounds nuw [[STRUCT_DATA_T]], ptr [[DATA]], i32 0, i32 0 1204 // CHECK1-NEXT: store ptr [[ARRAY]], ptr [[__RANGE2]], align 8 1205 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1206 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP0]], i64 0, i64 0 1207 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 12 1208 // CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8 1209 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1210 // CHECK1-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP1]], i64 0, i64 0 1211 // CHECK1-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8 1212 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1213 // CHECK1-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP2]], i64 0, i64 0 1214 // CHECK1-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8 1215 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8 1216 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8 1217 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8 1218 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1219 // CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64 1220 // CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 1221 // CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 1222 // CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 1223 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 1224 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 1225 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 1226 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1 1227 // CHECK1-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8 1228 // CHECK1-NEXT: store i64 0, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1229 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 1230 // CHECK1: for.cond: 1231 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1232 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1233 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1 1234 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]] 1235 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END18:%.*]] 1236 // CHECK1: for.body: 1237 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1238 // CHECK1-NEXT: store i64 [[TMP8]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1239 // CHECK1-NEXT: br label [[FOR_COND7:%.*]] 1240 // CHECK1: for.cond7: 1241 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1242 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1243 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP10]], 1 1244 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1245 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP11]], 5 1246 // CHECK1-NEXT: [[CMP10:%.*]] = icmp slt i64 [[ADD8]], [[ADD9]] 1247 // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1248 // CHECK1: cond.true: 1249 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1250 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i64 [[TMP12]], 1 1251 // CHECK1-NEXT: br label [[COND_END:%.*]] 1252 // CHECK1: cond.false: 1253 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1254 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i64 [[TMP13]], 5 1255 // CHECK1-NEXT: br label [[COND_END]] 1256 // CHECK1: cond.end: 1257 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[ADD11]], [[COND_TRUE]] ], [ [[ADD12]], [[COND_FALSE]] ] 1258 // CHECK1-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP9]], [[COND]] 1259 // CHECK1-NEXT: br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END:%.*]] 1260 // CHECK1: for.body14: 1261 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1262 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1263 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP15]], 1 1264 // CHECK1-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds double, ptr [[TMP14]], i64 [[MUL]] 1265 // CHECK1-NEXT: store ptr [[ADD_PTR15]], ptr [[__BEGIN2]], align 8 1266 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[__BEGIN2]], align 8 1267 // CHECK1-NEXT: [[TMP17:%.*]] = load double, ptr [[TMP16]], align 8 1268 // CHECK1-NEXT: store double [[TMP17]], ptr [[V]], align 8 1269 // CHECK1-NEXT: [[TMP18:%.*]] = load double, ptr [[V]], align 8 1270 // CHECK1-NEXT: call void (...) @body(double noundef [[TMP18]]) 1271 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 1272 // CHECK1: for.inc: 1273 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1274 // CHECK1-NEXT: [[INC:%.*]] = add nsw i64 [[TMP19]], 1 1275 // CHECK1-NEXT: store i64 [[INC]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1276 // CHECK1-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP25:![0-9]+]] 1277 // CHECK1: for.end: 1278 // CHECK1-NEXT: br label [[FOR_INC16:%.*]] 1279 // CHECK1: for.inc16: 1280 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1281 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP20]], 5 1282 // CHECK1-NEXT: store i64 [[ADD17]], ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1283 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 1284 // CHECK1: for.end18: 1285 // CHECK1-NEXT: ret void 1286 // 1287 // 1288 // CHECK1-LABEL: define dso_local void @foo10( 1289 // CHECK1-SAME: ptr noundef byval([[STRUCT_DATA_T:%.*]]) align 8 [[DATA:%.*]]) #[[ATTR0]] { 1290 // CHECK1-NEXT: entry: 1291 // CHECK1-NEXT: [[C:%.*]] = alloca double, align 8 1292 // CHECK1-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8 1293 // CHECK1-NEXT: [[__END2:%.*]] = alloca ptr, align 8 1294 // CHECK1-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8 1295 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 1296 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8 1297 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1298 // CHECK1-NEXT: [[DOTFLOOR_0_IV___BEGIN2:%.*]] = alloca i64, align 8 1299 // CHECK1-NEXT: [[DOTTILE_0_IV___BEGIN2:%.*]] = alloca i64, align 8 1300 // CHECK1-NEXT: [[V:%.*]] = alloca double, align 8 1301 // CHECK1-NEXT: store double 4.200000e+01, ptr [[C]], align 8 1302 // CHECK1-NEXT: [[ARRAY:%.*]] = getelementptr inbounds nuw [[STRUCT_DATA_T]], ptr [[DATA]], i32 0, i32 0 1303 // CHECK1-NEXT: store ptr [[ARRAY]], ptr [[__RANGE2]], align 8 1304 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1305 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP0]], i64 0, i64 0 1306 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 12 1307 // CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8 1308 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1309 // CHECK1-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP1]], i64 0, i64 0 1310 // CHECK1-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8 1311 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1312 // CHECK1-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP2]], i64 0, i64 0 1313 // CHECK1-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8 1314 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8 1315 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8 1316 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8 1317 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1318 // CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64 1319 // CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 1320 // CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 1321 // CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 1322 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 1323 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 1324 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 1325 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1 1326 // CHECK1-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8 1327 // CHECK1-NEXT: store i64 0, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1328 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 1329 // CHECK1: for.cond: 1330 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1331 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1332 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1 1333 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]] 1334 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END18:%.*]] 1335 // CHECK1: for.body: 1336 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1337 // CHECK1-NEXT: store i64 [[TMP8]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1338 // CHECK1-NEXT: br label [[FOR_COND7:%.*]] 1339 // CHECK1: for.cond7: 1340 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1341 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1342 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP10]], 1 1343 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1344 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP11]], 5 1345 // CHECK1-NEXT: [[CMP10:%.*]] = icmp slt i64 [[ADD8]], [[ADD9]] 1346 // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1347 // CHECK1: cond.true: 1348 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1349 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i64 [[TMP12]], 1 1350 // CHECK1-NEXT: br label [[COND_END:%.*]] 1351 // CHECK1: cond.false: 1352 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1353 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i64 [[TMP13]], 5 1354 // CHECK1-NEXT: br label [[COND_END]] 1355 // CHECK1: cond.end: 1356 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[ADD11]], [[COND_TRUE]] ], [ [[ADD12]], [[COND_FALSE]] ] 1357 // CHECK1-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP9]], [[COND]] 1358 // CHECK1-NEXT: br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END:%.*]] 1359 // CHECK1: for.body14: 1360 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1361 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1362 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP15]], 1 1363 // CHECK1-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds double, ptr [[TMP14]], i64 [[MUL]] 1364 // CHECK1-NEXT: store ptr [[ADD_PTR15]], ptr [[__BEGIN2]], align 8 1365 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[__BEGIN2]], align 8 1366 // CHECK1-NEXT: [[TMP17:%.*]] = load double, ptr [[TMP16]], align 8 1367 // CHECK1-NEXT: store double [[TMP17]], ptr [[V]], align 8 1368 // CHECK1-NEXT: [[TMP18:%.*]] = load double, ptr [[C]], align 8 1369 // CHECK1-NEXT: [[TMP19:%.*]] = load double, ptr [[V]], align 8 1370 // CHECK1-NEXT: call void (...) @body(double noundef [[TMP18]], double noundef [[TMP19]]) 1371 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 1372 // CHECK1: for.inc: 1373 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1374 // CHECK1-NEXT: [[INC:%.*]] = add nsw i64 [[TMP20]], 1 1375 // CHECK1-NEXT: store i64 [[INC]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1376 // CHECK1-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP27:![0-9]+]] 1377 // CHECK1: for.end: 1378 // CHECK1-NEXT: br label [[FOR_INC16:%.*]] 1379 // CHECK1: for.inc16: 1380 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1381 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP21]], 5 1382 // CHECK1-NEXT: store i64 [[ADD17]], ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1383 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 1384 // CHECK1: for.end18: 1385 // CHECK1-NEXT: ret void 1386 // 1387 // 1388 // CHECK1-LABEL: define internal void @_GLOBAL__sub_I_tile_codegen.cpp( 1389 // CHECK1-SAME: ) #[[ATTR1]] section ".text.startup" { 1390 // CHECK1-NEXT: entry: 1391 // CHECK1-NEXT: call void @__cxx_global_var_init() 1392 // CHECK1-NEXT: ret void 1393 // 1394 // 1395 // CHECK2-LABEL: define internal void @__cxx_global_var_init( 1396 // CHECK2-SAME: ) #[[ATTR0:[0-9]+]] section ".text.startup" { 1397 // CHECK2-NEXT: entry: 1398 // CHECK2-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s) 1399 // CHECK2-NEXT: ret void 1400 // 1401 // 1402 // CHECK2-LABEL: define linkonce_odr void @_ZN1SC1Ev( 1403 // CHECK2-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1404 // CHECK2-NEXT: entry: 1405 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1406 // CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1407 // CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1408 // CHECK2-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1409 // CHECK2-NEXT: ret void 1410 // 1411 // 1412 // CHECK2-LABEL: define linkonce_odr void @_ZN1SC2Ev( 1413 // CHECK2-SAME: ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1414 // CHECK2-NEXT: entry: 1415 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1416 // CHECK2-NEXT: [[I2:%.*]] = alloca ptr, align 8 1417 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1418 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1419 // CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1420 // CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1421 // CHECK2-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1422 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 1423 // CHECK2-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0 1424 // CHECK2-NEXT: store ptr [[I3]], ptr [[I2]], align 8 1425 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 1426 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1427 // CHECK2: for.cond: 1428 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1429 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 1430 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END12:%.*]] 1431 // CHECK2: for.body: 1432 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1433 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTTILE_0_IV_I]], align 4 1434 // CHECK2-NEXT: br label [[FOR_COND4:%.*]] 1435 // CHECK2: for.cond4: 1436 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1437 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1438 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], 5 1439 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 4, [[ADD]] 1440 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1441 // CHECK2: cond.true: 1442 // CHECK2-NEXT: br label [[COND_END:%.*]] 1443 // CHECK2: cond.false: 1444 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1445 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP4]], 5 1446 // CHECK2-NEXT: br label [[COND_END]] 1447 // CHECK2: cond.end: 1448 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[ADD6]], [[COND_FALSE]] ] 1449 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP2]], [[COND]] 1450 // CHECK2-NEXT: br i1 [[CMP7]], label [[FOR_BODY8:%.*]], label [[FOR_END:%.*]] 1451 // CHECK2: for.body8: 1452 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1453 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP5]], 3 1454 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 7, [[MUL]] 1455 // CHECK2-NEXT: [[TMP6:%.*]] = load ptr, ptr [[I2]], align 8 1456 // CHECK2-NEXT: store i32 [[ADD9]], ptr [[TMP6]], align 4 1457 // CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[I2]], align 8 1458 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1459 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP8]]) 1460 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1461 // CHECK2: for.inc: 1462 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1463 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1 1464 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 1465 // CHECK2-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP3:![0-9]+]] 1466 // CHECK2: for.end: 1467 // CHECK2-NEXT: br label [[FOR_INC10:%.*]] 1468 // CHECK2: for.inc10: 1469 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1470 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP10]], 5 1471 // CHECK2-NEXT: store i32 [[ADD11]], ptr [[DOTFLOOR_0_IV_I]], align 4 1472 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1473 // CHECK2: for.end12: 1474 // CHECK2-NEXT: ret void 1475 // 1476 // 1477 // CHECK2-LABEL: define dso_local void @body( 1478 // CHECK2-SAME: ...) #[[ATTR1]] { 1479 // CHECK2-NEXT: entry: 1480 // CHECK2-NEXT: ret void 1481 // 1482 // 1483 // CHECK2-LABEL: define dso_local void @foo1( 1484 // CHECK2-SAME: i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR1]] { 1485 // CHECK2-NEXT: entry: 1486 // CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 1487 // CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 1488 // CHECK2-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4 1489 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1490 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1491 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1492 // CHECK2-NEXT: [[DOTNEW_STEP:%.*]] = alloca i32, align 4 1493 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1494 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1495 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1496 // CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 1497 // CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 1498 // CHECK2-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4 1499 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 1500 // CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 1501 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 1502 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1503 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 1504 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1505 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[STEP_ADDR]], align 4 1506 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTNEW_STEP]], align 4 1507 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1508 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1509 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]] 1510 // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 1511 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 1512 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], [[TMP6]] 1513 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 1514 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP7]] 1515 // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 1516 // CHECK2-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1517 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 1518 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1519 // CHECK2: for.cond: 1520 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1521 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1522 // CHECK2-NEXT: [[ADD5:%.*]] = add i32 [[TMP9]], 1 1523 // CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP8]], [[ADD5]] 1524 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END17:%.*]] 1525 // CHECK2: for.body: 1526 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1527 // CHECK2-NEXT: store i32 [[TMP10]], ptr [[DOTTILE_0_IV_I]], align 4 1528 // CHECK2-NEXT: br label [[FOR_COND6:%.*]] 1529 // CHECK2: for.cond6: 1530 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1531 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1532 // CHECK2-NEXT: [[ADD7:%.*]] = add i32 [[TMP12]], 1 1533 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1534 // CHECK2-NEXT: [[ADD8:%.*]] = add i32 [[TMP13]], 5 1535 // CHECK2-NEXT: [[CMP9:%.*]] = icmp ult i32 [[ADD7]], [[ADD8]] 1536 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1537 // CHECK2: cond.true: 1538 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1539 // CHECK2-NEXT: [[ADD10:%.*]] = add i32 [[TMP14]], 1 1540 // CHECK2-NEXT: br label [[COND_END:%.*]] 1541 // CHECK2: cond.false: 1542 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1543 // CHECK2-NEXT: [[ADD11:%.*]] = add i32 [[TMP15]], 5 1544 // CHECK2-NEXT: br label [[COND_END]] 1545 // CHECK2: cond.end: 1546 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[ADD10]], [[COND_TRUE]] ], [ [[ADD11]], [[COND_FALSE]] ] 1547 // CHECK2-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP11]], [[COND]] 1548 // CHECK2-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END:%.*]] 1549 // CHECK2: for.body13: 1550 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1551 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1552 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 1553 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP17]], [[TMP18]] 1554 // CHECK2-NEXT: [[ADD14:%.*]] = add i32 [[TMP16]], [[MUL]] 1555 // CHECK2-NEXT: store i32 [[ADD14]], ptr [[I]], align 4 1556 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4 1557 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP19]]) 1558 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1559 // CHECK2: for.inc: 1560 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1561 // CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP20]], 1 1562 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 1563 // CHECK2-NEXT: br label [[FOR_COND6]], !llvm.loop [[LOOP6:![0-9]+]] 1564 // CHECK2: for.end: 1565 // CHECK2-NEXT: br label [[FOR_INC15:%.*]] 1566 // CHECK2: for.inc15: 1567 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1568 // CHECK2-NEXT: [[ADD16:%.*]] = add i32 [[TMP21]], 5 1569 // CHECK2-NEXT: store i32 [[ADD16]], ptr [[DOTFLOOR_0_IV_I]], align 4 1570 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1571 // CHECK2: for.end17: 1572 // CHECK2-NEXT: ret void 1573 // 1574 // 1575 // CHECK2-LABEL: define dso_local void @foo10( 1576 // CHECK2-SAME: ptr noundef byval([[STRUCT_DATA_T:%.*]]) align 8 [[DATA:%.*]]) #[[ATTR1]] { 1577 // CHECK2-NEXT: entry: 1578 // CHECK2-NEXT: [[C:%.*]] = alloca double, align 8 1579 // CHECK2-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8 1580 // CHECK2-NEXT: [[__END2:%.*]] = alloca ptr, align 8 1581 // CHECK2-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8 1582 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 1583 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8 1584 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1585 // CHECK2-NEXT: [[DOTFLOOR_0_IV___BEGIN2:%.*]] = alloca i64, align 8 1586 // CHECK2-NEXT: [[DOTTILE_0_IV___BEGIN2:%.*]] = alloca i64, align 8 1587 // CHECK2-NEXT: [[V:%.*]] = alloca double, align 8 1588 // CHECK2-NEXT: store double 4.200000e+01, ptr [[C]], align 8 1589 // CHECK2-NEXT: [[ARRAY:%.*]] = getelementptr inbounds nuw [[STRUCT_DATA_T]], ptr [[DATA]], i32 0, i32 0 1590 // CHECK2-NEXT: store ptr [[ARRAY]], ptr [[__RANGE2]], align 8 1591 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1592 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP0]], i64 0, i64 0 1593 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 12 1594 // CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8 1595 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1596 // CHECK2-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP1]], i64 0, i64 0 1597 // CHECK2-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8 1598 // CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1599 // CHECK2-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP2]], i64 0, i64 0 1600 // CHECK2-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8 1601 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8 1602 // CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8 1603 // CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8 1604 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1605 // CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64 1606 // CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 1607 // CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 1608 // CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 1609 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 1610 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 1611 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 1612 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1 1613 // CHECK2-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8 1614 // CHECK2-NEXT: store i64 0, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1615 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1616 // CHECK2: for.cond: 1617 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1618 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1619 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1 1620 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]] 1621 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END18:%.*]] 1622 // CHECK2: for.body: 1623 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1624 // CHECK2-NEXT: store i64 [[TMP8]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1625 // CHECK2-NEXT: br label [[FOR_COND7:%.*]] 1626 // CHECK2: for.cond7: 1627 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1628 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1629 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP10]], 1 1630 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1631 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP11]], 5 1632 // CHECK2-NEXT: [[CMP10:%.*]] = icmp slt i64 [[ADD8]], [[ADD9]] 1633 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1634 // CHECK2: cond.true: 1635 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1636 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i64 [[TMP12]], 1 1637 // CHECK2-NEXT: br label [[COND_END:%.*]] 1638 // CHECK2: cond.false: 1639 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1640 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i64 [[TMP13]], 5 1641 // CHECK2-NEXT: br label [[COND_END]] 1642 // CHECK2: cond.end: 1643 // CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[ADD11]], [[COND_TRUE]] ], [ [[ADD12]], [[COND_FALSE]] ] 1644 // CHECK2-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP9]], [[COND]] 1645 // CHECK2-NEXT: br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END:%.*]] 1646 // CHECK2: for.body14: 1647 // CHECK2-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1648 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1649 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP15]], 1 1650 // CHECK2-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds double, ptr [[TMP14]], i64 [[MUL]] 1651 // CHECK2-NEXT: store ptr [[ADD_PTR15]], ptr [[__BEGIN2]], align 8 1652 // CHECK2-NEXT: [[TMP16:%.*]] = load ptr, ptr [[__BEGIN2]], align 8 1653 // CHECK2-NEXT: [[TMP17:%.*]] = load double, ptr [[TMP16]], align 8 1654 // CHECK2-NEXT: store double [[TMP17]], ptr [[V]], align 8 1655 // CHECK2-NEXT: [[TMP18:%.*]] = load double, ptr [[C]], align 8 1656 // CHECK2-NEXT: [[TMP19:%.*]] = load double, ptr [[V]], align 8 1657 // CHECK2-NEXT: call void (...) @body(double noundef [[TMP18]], double noundef [[TMP19]]) 1658 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1659 // CHECK2: for.inc: 1660 // CHECK2-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1661 // CHECK2-NEXT: [[INC:%.*]] = add nsw i64 [[TMP20]], 1 1662 // CHECK2-NEXT: store i64 [[INC]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 1663 // CHECK2-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]] 1664 // CHECK2: for.end: 1665 // CHECK2-NEXT: br label [[FOR_INC16:%.*]] 1666 // CHECK2: for.inc16: 1667 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1668 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP21]], 5 1669 // CHECK2-NEXT: store i64 [[ADD17]], ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 1670 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 1671 // CHECK2: for.end18: 1672 // CHECK2-NEXT: ret void 1673 // 1674 // 1675 // CHECK2-LABEL: define dso_local void @foo2( 1676 // CHECK2-SAME: i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR1]] { 1677 // CHECK2-NEXT: entry: 1678 // CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 1679 // CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 1680 // CHECK2-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4 1681 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1682 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 1683 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1684 // CHECK2-NEXT: [[DOTFLOOR_1_IV_J:%.*]] = alloca i32, align 4 1685 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1686 // CHECK2-NEXT: [[DOTTILE_1_IV_J:%.*]] = alloca i32, align 4 1687 // CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 1688 // CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 1689 // CHECK2-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4 1690 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 1691 // CHECK2-NEXT: store i32 7, ptr [[J]], align 4 1692 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 1693 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1694 // CHECK2: for.cond: 1695 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1696 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 1697 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END30:%.*]] 1698 // CHECK2: for.body: 1699 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_1_IV_J]], align 4 1700 // CHECK2-NEXT: br label [[FOR_COND1:%.*]] 1701 // CHECK2: for.cond1: 1702 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1703 // CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP1]], 4 1704 // CHECK2-NEXT: br i1 [[CMP2]], label [[FOR_BODY3:%.*]], label [[FOR_END27:%.*]] 1705 // CHECK2: for.body3: 1706 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1707 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTILE_0_IV_I]], align 4 1708 // CHECK2-NEXT: br label [[FOR_COND4:%.*]] 1709 // CHECK2: for.cond4: 1710 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1711 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1712 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], 5 1713 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 4, [[ADD]] 1714 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1715 // CHECK2: cond.true: 1716 // CHECK2-NEXT: br label [[COND_END:%.*]] 1717 // CHECK2: cond.false: 1718 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1719 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP5]], 5 1720 // CHECK2-NEXT: br label [[COND_END]] 1721 // CHECK2: cond.end: 1722 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[ADD6]], [[COND_FALSE]] ] 1723 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP3]], [[COND]] 1724 // CHECK2-NEXT: br i1 [[CMP7]], label [[FOR_BODY8:%.*]], label [[FOR_END24:%.*]] 1725 // CHECK2: for.body8: 1726 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1727 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 3 1728 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 7, [[MUL]] 1729 // CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 4 1730 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1731 // CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTTILE_1_IV_J]], align 4 1732 // CHECK2-NEXT: br label [[FOR_COND10:%.*]] 1733 // CHECK2: for.cond10: 1734 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 1735 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1736 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP9]], 5 1737 // CHECK2-NEXT: [[CMP12:%.*]] = icmp slt i32 4, [[ADD11]] 1738 // CHECK2-NEXT: br i1 [[CMP12]], label [[COND_TRUE13:%.*]], label [[COND_FALSE14:%.*]] 1739 // CHECK2: cond.true13: 1740 // CHECK2-NEXT: br label [[COND_END16:%.*]] 1741 // CHECK2: cond.false14: 1742 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1743 // CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP10]], 5 1744 // CHECK2-NEXT: br label [[COND_END16]] 1745 // CHECK2: cond.end16: 1746 // CHECK2-NEXT: [[COND17:%.*]] = phi i32 [ 4, [[COND_TRUE13]] ], [ [[ADD15]], [[COND_FALSE14]] ] 1747 // CHECK2-NEXT: [[CMP18:%.*]] = icmp slt i32 [[TMP8]], [[COND17]] 1748 // CHECK2-NEXT: br i1 [[CMP18]], label [[FOR_BODY19:%.*]], label [[FOR_END:%.*]] 1749 // CHECK2: for.body19: 1750 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 1751 // CHECK2-NEXT: [[MUL20:%.*]] = mul nsw i32 [[TMP11]], 3 1752 // CHECK2-NEXT: [[ADD21:%.*]] = add nsw i32 7, [[MUL20]] 1753 // CHECK2-NEXT: store i32 [[ADD21]], ptr [[J]], align 4 1754 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 1755 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[J]], align 4 1756 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP12]], i32 noundef [[TMP13]]) 1757 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1758 // CHECK2: for.inc: 1759 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 1760 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1 1761 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_1_IV_J]], align 4 1762 // CHECK2-NEXT: br label [[FOR_COND10]], !llvm.loop [[LOOP10:![0-9]+]] 1763 // CHECK2: for.end: 1764 // CHECK2-NEXT: br label [[FOR_INC22:%.*]] 1765 // CHECK2: for.inc22: 1766 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1767 // CHECK2-NEXT: [[INC23:%.*]] = add nsw i32 [[TMP15]], 1 1768 // CHECK2-NEXT: store i32 [[INC23]], ptr [[DOTTILE_0_IV_I]], align 4 1769 // CHECK2-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP11:![0-9]+]] 1770 // CHECK2: for.end24: 1771 // CHECK2-NEXT: br label [[FOR_INC25:%.*]] 1772 // CHECK2: for.inc25: 1773 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1774 // CHECK2-NEXT: [[ADD26:%.*]] = add nsw i32 [[TMP16]], 5 1775 // CHECK2-NEXT: store i32 [[ADD26]], ptr [[DOTFLOOR_1_IV_J]], align 4 1776 // CHECK2-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP12:![0-9]+]] 1777 // CHECK2: for.end27: 1778 // CHECK2-NEXT: br label [[FOR_INC28:%.*]] 1779 // CHECK2: for.inc28: 1780 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1781 // CHECK2-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP17]], 5 1782 // CHECK2-NEXT: store i32 [[ADD29]], ptr [[DOTFLOOR_0_IV_I]], align 4 1783 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 1784 // CHECK2: for.end30: 1785 // CHECK2-NEXT: ret void 1786 // 1787 // 1788 // CHECK2-LABEL: define dso_local void @foo3( 1789 // CHECK2-SAME: ) #[[ATTR1]] { 1790 // CHECK2-NEXT: entry: 1791 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1792 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1793 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1794 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 1795 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1796 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1797 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1798 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1799 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1800 // CHECK2-NEXT: [[DOTFLOOR_1_IV_J:%.*]] = alloca i32, align 4 1801 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1802 // CHECK2-NEXT: [[DOTTILE_1_IV_J:%.*]] = alloca i32, align 4 1803 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]]) 1804 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 1805 // CHECK2-NEXT: store i32 7, ptr [[J]], align 4 1806 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1807 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_UB]], align 4 1808 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1809 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1810 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1811 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1812 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 0 1813 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1814 // CHECK2: cond.true: 1815 // CHECK2-NEXT: br label [[COND_END:%.*]] 1816 // CHECK2: cond.false: 1817 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1818 // CHECK2-NEXT: br label [[COND_END]] 1819 // CHECK2: cond.end: 1820 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 0, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 1821 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1822 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1823 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 1824 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1825 // CHECK2: omp.inner.for.cond: 1826 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1827 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1828 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 1829 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1830 // CHECK2: omp.inner.for.body: 1831 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1832 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 5 1833 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1834 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTFLOOR_0_IV_I]], align 4 1835 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_1_IV_J]], align 4 1836 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1837 // CHECK2: for.cond: 1838 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1839 // CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP7]], 4 1840 // CHECK2-NEXT: br i1 [[CMP2]], label [[FOR_BODY:%.*]], label [[FOR_END32:%.*]] 1841 // CHECK2: for.body: 1842 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1843 // CHECK2-NEXT: store i32 [[TMP8]], ptr [[DOTTILE_0_IV_I]], align 4 1844 // CHECK2-NEXT: br label [[FOR_COND3:%.*]] 1845 // CHECK2: for.cond3: 1846 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1847 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1848 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 5 1849 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 4, [[ADD4]] 1850 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]] 1851 // CHECK2: cond.true6: 1852 // CHECK2-NEXT: br label [[COND_END9:%.*]] 1853 // CHECK2: cond.false7: 1854 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1855 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP11]], 5 1856 // CHECK2-NEXT: br label [[COND_END9]] 1857 // CHECK2: cond.end9: 1858 // CHECK2-NEXT: [[COND10:%.*]] = phi i32 [ 4, [[COND_TRUE6]] ], [ [[ADD8]], [[COND_FALSE7]] ] 1859 // CHECK2-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP9]], [[COND10]] 1860 // CHECK2-NEXT: br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END29:%.*]] 1861 // CHECK2: for.body12: 1862 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1863 // CHECK2-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP12]], 3 1864 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 7, [[MUL13]] 1865 // CHECK2-NEXT: store i32 [[ADD14]], ptr [[I]], align 4 1866 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1867 // CHECK2-NEXT: store i32 [[TMP13]], ptr [[DOTTILE_1_IV_J]], align 4 1868 // CHECK2-NEXT: br label [[FOR_COND15:%.*]] 1869 // CHECK2: for.cond15: 1870 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 1871 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1872 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP15]], 5 1873 // CHECK2-NEXT: [[CMP17:%.*]] = icmp slt i32 4, [[ADD16]] 1874 // CHECK2-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]] 1875 // CHECK2: cond.true18: 1876 // CHECK2-NEXT: br label [[COND_END21:%.*]] 1877 // CHECK2: cond.false19: 1878 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1879 // CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP16]], 5 1880 // CHECK2-NEXT: br label [[COND_END21]] 1881 // CHECK2: cond.end21: 1882 // CHECK2-NEXT: [[COND22:%.*]] = phi i32 [ 4, [[COND_TRUE18]] ], [ [[ADD20]], [[COND_FALSE19]] ] 1883 // CHECK2-NEXT: [[CMP23:%.*]] = icmp slt i32 [[TMP14]], [[COND22]] 1884 // CHECK2-NEXT: br i1 [[CMP23]], label [[FOR_BODY24:%.*]], label [[FOR_END:%.*]] 1885 // CHECK2: for.body24: 1886 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 1887 // CHECK2-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP17]], 3 1888 // CHECK2-NEXT: [[ADD26:%.*]] = add nsw i32 7, [[MUL25]] 1889 // CHECK2-NEXT: store i32 [[ADD26]], ptr [[J]], align 4 1890 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4 1891 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[J]], align 4 1892 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP18]], i32 noundef [[TMP19]]) 1893 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1894 // CHECK2: for.inc: 1895 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 1896 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 1897 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_1_IV_J]], align 4 1898 // CHECK2-NEXT: br label [[FOR_COND15]], !llvm.loop [[LOOP14:![0-9]+]] 1899 // CHECK2: for.end: 1900 // CHECK2-NEXT: br label [[FOR_INC27:%.*]] 1901 // CHECK2: for.inc27: 1902 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 1903 // CHECK2-NEXT: [[INC28:%.*]] = add nsw i32 [[TMP21]], 1 1904 // CHECK2-NEXT: store i32 [[INC28]], ptr [[DOTTILE_0_IV_I]], align 4 1905 // CHECK2-NEXT: br label [[FOR_COND3]], !llvm.loop [[LOOP15:![0-9]+]] 1906 // CHECK2: for.end29: 1907 // CHECK2-NEXT: br label [[FOR_INC30:%.*]] 1908 // CHECK2: for.inc30: 1909 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1910 // CHECK2-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 5 1911 // CHECK2-NEXT: store i32 [[ADD31]], ptr [[DOTFLOOR_1_IV_J]], align 4 1912 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1913 // CHECK2: for.end32: 1914 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1915 // CHECK2: omp.body.continue: 1916 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1917 // CHECK2: omp.inner.for.inc: 1918 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1919 // CHECK2-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP23]], 1 1920 // CHECK2-NEXT: store i32 [[ADD33]], ptr [[DOTOMP_IV]], align 4 1921 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1922 // CHECK2: omp.inner.for.end: 1923 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1924 // CHECK2: omp.loop.exit: 1925 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 1926 // CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[TMP0]]) 1927 // CHECK2-NEXT: ret void 1928 // 1929 // 1930 // CHECK2-LABEL: define dso_local void @foo4( 1931 // CHECK2-SAME: ) #[[ATTR1]] { 1932 // CHECK2-NEXT: entry: 1933 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1934 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1935 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1936 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1937 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 1938 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1939 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1940 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1941 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1942 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4 1943 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 1944 // CHECK2-NEXT: [[DOTFLOOR_1_IV_J:%.*]] = alloca i32, align 4 1945 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 1946 // CHECK2-NEXT: [[DOTTILE_1_IV_J:%.*]] = alloca i32, align 4 1947 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 1948 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 1949 // CHECK2-NEXT: store i32 7, ptr [[J]], align 4 1950 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1951 // CHECK2-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4 1952 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1953 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1954 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1955 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1956 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 3 1957 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1958 // CHECK2: cond.true: 1959 // CHECK2-NEXT: br label [[COND_END:%.*]] 1960 // CHECK2: cond.false: 1961 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1962 // CHECK2-NEXT: br label [[COND_END]] 1963 // CHECK2: cond.end: 1964 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 1965 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1966 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1967 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 1968 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1969 // CHECK2: omp.inner.for.cond: 1970 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1971 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1972 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 1973 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1974 // CHECK2: omp.inner.for.body: 1975 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1976 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP6]], 1 1977 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 3 1978 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]] 1979 // CHECK2-NEXT: store i32 [[ADD]], ptr [[K]], align 4 1980 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1981 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1982 // CHECK2-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP8]], 1 1983 // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 1 1984 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], [[MUL4]] 1985 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 5 1986 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1987 // CHECK2-NEXT: store i32 [[ADD6]], ptr [[DOTFLOOR_0_IV_I]], align 4 1988 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_1_IV_J]], align 4 1989 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1990 // CHECK2: for.cond: 1991 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 1992 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP9]], 4 1993 // CHECK2-NEXT: br i1 [[CMP7]], label [[FOR_BODY:%.*]], label [[FOR_END37:%.*]] 1994 // CHECK2: for.body: 1995 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 1996 // CHECK2-NEXT: store i32 [[TMP10]], ptr [[DOTTILE_0_IV_I]], align 4 1997 // CHECK2-NEXT: br label [[FOR_COND8:%.*]] 1998 // CHECK2: for.cond8: 1999 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2000 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2001 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 5 2002 // CHECK2-NEXT: [[CMP10:%.*]] = icmp slt i32 4, [[ADD9]] 2003 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 2004 // CHECK2: cond.true11: 2005 // CHECK2-NEXT: br label [[COND_END14:%.*]] 2006 // CHECK2: cond.false12: 2007 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2008 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP13]], 5 2009 // CHECK2-NEXT: br label [[COND_END14]] 2010 // CHECK2: cond.end14: 2011 // CHECK2-NEXT: [[COND15:%.*]] = phi i32 [ 4, [[COND_TRUE11]] ], [ [[ADD13]], [[COND_FALSE12]] ] 2012 // CHECK2-NEXT: [[CMP16:%.*]] = icmp slt i32 [[TMP11]], [[COND15]] 2013 // CHECK2-NEXT: br i1 [[CMP16]], label [[FOR_BODY17:%.*]], label [[FOR_END34:%.*]] 2014 // CHECK2: for.body17: 2015 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2016 // CHECK2-NEXT: [[MUL18:%.*]] = mul nsw i32 [[TMP14]], 3 2017 // CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 7, [[MUL18]] 2018 // CHECK2-NEXT: store i32 [[ADD19]], ptr [[I]], align 4 2019 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 2020 // CHECK2-NEXT: store i32 [[TMP15]], ptr [[DOTTILE_1_IV_J]], align 4 2021 // CHECK2-NEXT: br label [[FOR_COND20:%.*]] 2022 // CHECK2: for.cond20: 2023 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 2024 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 2025 // CHECK2-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP17]], 5 2026 // CHECK2-NEXT: [[CMP22:%.*]] = icmp slt i32 4, [[ADD21]] 2027 // CHECK2-NEXT: br i1 [[CMP22]], label [[COND_TRUE23:%.*]], label [[COND_FALSE24:%.*]] 2028 // CHECK2: cond.true23: 2029 // CHECK2-NEXT: br label [[COND_END26:%.*]] 2030 // CHECK2: cond.false24: 2031 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 2032 // CHECK2-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP18]], 5 2033 // CHECK2-NEXT: br label [[COND_END26]] 2034 // CHECK2: cond.end26: 2035 // CHECK2-NEXT: [[COND27:%.*]] = phi i32 [ 4, [[COND_TRUE23]] ], [ [[ADD25]], [[COND_FALSE24]] ] 2036 // CHECK2-NEXT: [[CMP28:%.*]] = icmp slt i32 [[TMP16]], [[COND27]] 2037 // CHECK2-NEXT: br i1 [[CMP28]], label [[FOR_BODY29:%.*]], label [[FOR_END:%.*]] 2038 // CHECK2: for.body29: 2039 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 2040 // CHECK2-NEXT: [[MUL30:%.*]] = mul nsw i32 [[TMP19]], 3 2041 // CHECK2-NEXT: [[ADD31:%.*]] = add nsw i32 7, [[MUL30]] 2042 // CHECK2-NEXT: store i32 [[ADD31]], ptr [[J]], align 4 2043 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[I]], align 4 2044 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[J]], align 4 2045 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP20]], i32 noundef [[TMP21]]) 2046 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 2047 // CHECK2: for.inc: 2048 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTTILE_1_IV_J]], align 4 2049 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP22]], 1 2050 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_1_IV_J]], align 4 2051 // CHECK2-NEXT: br label [[FOR_COND20]], !llvm.loop [[LOOP17:![0-9]+]] 2052 // CHECK2: for.end: 2053 // CHECK2-NEXT: br label [[FOR_INC32:%.*]] 2054 // CHECK2: for.inc32: 2055 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2056 // CHECK2-NEXT: [[INC33:%.*]] = add nsw i32 [[TMP23]], 1 2057 // CHECK2-NEXT: store i32 [[INC33]], ptr [[DOTTILE_0_IV_I]], align 4 2058 // CHECK2-NEXT: br label [[FOR_COND8]], !llvm.loop [[LOOP18:![0-9]+]] 2059 // CHECK2: for.end34: 2060 // CHECK2-NEXT: br label [[FOR_INC35:%.*]] 2061 // CHECK2: for.inc35: 2062 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTFLOOR_1_IV_J]], align 4 2063 // CHECK2-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP24]], 5 2064 // CHECK2-NEXT: store i32 [[ADD36]], ptr [[DOTFLOOR_1_IV_J]], align 4 2065 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 2066 // CHECK2: for.end37: 2067 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2068 // CHECK2: omp.body.continue: 2069 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2070 // CHECK2: omp.inner.for.inc: 2071 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2072 // CHECK2-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP25]], 1 2073 // CHECK2-NEXT: store i32 [[ADD38]], ptr [[DOTOMP_IV]], align 4 2074 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2075 // CHECK2: omp.inner.for.end: 2076 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2077 // CHECK2: omp.loop.exit: 2078 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 2079 // CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 2080 // CHECK2-NEXT: ret void 2081 // 2082 // 2083 // CHECK2-LABEL: define dso_local void @foo5( 2084 // CHECK2-SAME: ) #[[ATTR1]] { 2085 // CHECK2-NEXT: entry: 2086 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 2087 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2088 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2089 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2090 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2091 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2092 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2093 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 2094 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 2095 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 2096 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 2097 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 2098 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 2099 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 2100 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2101 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I11:%.*]] = alloca i32, align 4 2102 // CHECK2-NEXT: [[DOTTILE_0_IV_I12:%.*]] = alloca i32, align 4 2103 // CHECK2-NEXT: [[J13:%.*]] = alloca i32, align 4 2104 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 2105 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 2106 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP]], align 4 2107 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2108 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP]], align 4 2109 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], 5 2110 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 4, [[ADD]] 2111 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2112 // CHECK2: cond.true: 2113 // CHECK2-NEXT: br label [[COND_END:%.*]] 2114 // CHECK2: cond.false: 2115 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP]], align 4 2116 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP3]], 5 2117 // CHECK2-NEXT: br label [[COND_END]] 2118 // CHECK2: cond.end: 2119 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[ADD4]], [[COND_FALSE]] ] 2120 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTCAPTURE_EXPR_3]], align 4 2121 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2122 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2123 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]] 2124 // CHECK2-NEXT: [[SUB6:%.*]] = sub i32 [[SUB]], 1 2125 // CHECK2-NEXT: [[ADD7:%.*]] = add i32 [[SUB6]], 1 2126 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD7]], 1 2127 // CHECK2-NEXT: [[CONV:%.*]] = zext i32 [[DIV]] to i64 2128 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 1, [[CONV]] 2129 // CHECK2-NEXT: [[MUL8:%.*]] = mul nsw i64 [[MUL]], 4 2130 // CHECK2-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL8]], 1 2131 // CHECK2-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 2132 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 2133 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2134 // CHECK2-NEXT: store i32 [[TMP6]], ptr [[DOTTILE_0_IV_I]], align 4 2135 // CHECK2-NEXT: store i32 7, ptr [[J]], align 4 2136 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2137 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2138 // CHECK2-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]] 2139 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2140 // CHECK2: omp.precond.then: 2141 // CHECK2-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 2142 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 2143 // CHECK2-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8 2144 // CHECK2-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 2145 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2146 // CHECK2-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 2147 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 2148 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 2149 // CHECK2-NEXT: [[CMP14:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]] 2150 // CHECK2-NEXT: br i1 [[CMP14]], label [[COND_TRUE15:%.*]], label [[COND_FALSE16:%.*]] 2151 // CHECK2: cond.true15: 2152 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 2153 // CHECK2-NEXT: br label [[COND_END17:%.*]] 2154 // CHECK2: cond.false16: 2155 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 2156 // CHECK2-NEXT: br label [[COND_END17]] 2157 // CHECK2: cond.end17: 2158 // CHECK2-NEXT: [[COND18:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE15]] ], [ [[TMP13]], [[COND_FALSE16]] ] 2159 // CHECK2-NEXT: store i64 [[COND18]], ptr [[DOTOMP_UB]], align 8 2160 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 2161 // CHECK2-NEXT: store i64 [[TMP14]], ptr [[DOTOMP_IV]], align 8 2162 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2163 // CHECK2: omp.inner.for.cond: 2164 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2165 // CHECK2-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 2166 // CHECK2-NEXT: [[CMP19:%.*]] = icmp sle i64 [[TMP15]], [[TMP16]] 2167 // CHECK2-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2168 // CHECK2: omp.inner.for.body: 2169 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2170 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2171 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2172 // CHECK2-NEXT: [[SUB20:%.*]] = sub i32 [[TMP18]], [[TMP19]] 2173 // CHECK2-NEXT: [[SUB21:%.*]] = sub i32 [[SUB20]], 1 2174 // CHECK2-NEXT: [[ADD22:%.*]] = add i32 [[SUB21]], 1 2175 // CHECK2-NEXT: [[DIV23:%.*]] = udiv i32 [[ADD22]], 1 2176 // CHECK2-NEXT: [[MUL24:%.*]] = mul i32 1, [[DIV23]] 2177 // CHECK2-NEXT: [[MUL25:%.*]] = mul i32 [[MUL24]], 4 2178 // CHECK2-NEXT: [[CONV26:%.*]] = zext i32 [[MUL25]] to i64 2179 // CHECK2-NEXT: [[DIV27:%.*]] = sdiv i64 [[TMP17]], [[CONV26]] 2180 // CHECK2-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV27]], 5 2181 // CHECK2-NEXT: [[ADD29:%.*]] = add nsw i64 0, [[MUL28]] 2182 // CHECK2-NEXT: [[CONV30:%.*]] = trunc i64 [[ADD29]] to i32 2183 // CHECK2-NEXT: store i32 [[CONV30]], ptr [[DOTFLOOR_0_IV_I11]], align 4 2184 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2185 // CHECK2-NEXT: [[CONV31:%.*]] = sext i32 [[TMP20]] to i64 2186 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2187 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2188 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2189 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2190 // CHECK2-NEXT: [[SUB32:%.*]] = sub i32 [[TMP23]], [[TMP24]] 2191 // CHECK2-NEXT: [[SUB33:%.*]] = sub i32 [[SUB32]], 1 2192 // CHECK2-NEXT: [[ADD34:%.*]] = add i32 [[SUB33]], 1 2193 // CHECK2-NEXT: [[DIV35:%.*]] = udiv i32 [[ADD34]], 1 2194 // CHECK2-NEXT: [[MUL36:%.*]] = mul i32 1, [[DIV35]] 2195 // CHECK2-NEXT: [[MUL37:%.*]] = mul i32 [[MUL36]], 4 2196 // CHECK2-NEXT: [[CONV38:%.*]] = zext i32 [[MUL37]] to i64 2197 // CHECK2-NEXT: [[DIV39:%.*]] = sdiv i64 [[TMP22]], [[CONV38]] 2198 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2199 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2200 // CHECK2-NEXT: [[SUB40:%.*]] = sub i32 [[TMP25]], [[TMP26]] 2201 // CHECK2-NEXT: [[SUB41:%.*]] = sub i32 [[SUB40]], 1 2202 // CHECK2-NEXT: [[ADD42:%.*]] = add i32 [[SUB41]], 1 2203 // CHECK2-NEXT: [[DIV43:%.*]] = udiv i32 [[ADD42]], 1 2204 // CHECK2-NEXT: [[MUL44:%.*]] = mul i32 1, [[DIV43]] 2205 // CHECK2-NEXT: [[MUL45:%.*]] = mul i32 [[MUL44]], 4 2206 // CHECK2-NEXT: [[CONV46:%.*]] = zext i32 [[MUL45]] to i64 2207 // CHECK2-NEXT: [[MUL47:%.*]] = mul nsw i64 [[DIV39]], [[CONV46]] 2208 // CHECK2-NEXT: [[SUB48:%.*]] = sub nsw i64 [[TMP21]], [[MUL47]] 2209 // CHECK2-NEXT: [[DIV49:%.*]] = sdiv i64 [[SUB48]], 4 2210 // CHECK2-NEXT: [[MUL50:%.*]] = mul nsw i64 [[DIV49]], 1 2211 // CHECK2-NEXT: [[ADD51:%.*]] = add nsw i64 [[CONV31]], [[MUL50]] 2212 // CHECK2-NEXT: [[CONV52:%.*]] = trunc i64 [[ADD51]] to i32 2213 // CHECK2-NEXT: store i32 [[CONV52]], ptr [[DOTTILE_0_IV_I12]], align 4 2214 // CHECK2-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2215 // CHECK2-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2216 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2217 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2218 // CHECK2-NEXT: [[SUB53:%.*]] = sub i32 [[TMP29]], [[TMP30]] 2219 // CHECK2-NEXT: [[SUB54:%.*]] = sub i32 [[SUB53]], 1 2220 // CHECK2-NEXT: [[ADD55:%.*]] = add i32 [[SUB54]], 1 2221 // CHECK2-NEXT: [[DIV56:%.*]] = udiv i32 [[ADD55]], 1 2222 // CHECK2-NEXT: [[MUL57:%.*]] = mul i32 1, [[DIV56]] 2223 // CHECK2-NEXT: [[MUL58:%.*]] = mul i32 [[MUL57]], 4 2224 // CHECK2-NEXT: [[CONV59:%.*]] = zext i32 [[MUL58]] to i64 2225 // CHECK2-NEXT: [[DIV60:%.*]] = sdiv i64 [[TMP28]], [[CONV59]] 2226 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2227 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2228 // CHECK2-NEXT: [[SUB61:%.*]] = sub i32 [[TMP31]], [[TMP32]] 2229 // CHECK2-NEXT: [[SUB62:%.*]] = sub i32 [[SUB61]], 1 2230 // CHECK2-NEXT: [[ADD63:%.*]] = add i32 [[SUB62]], 1 2231 // CHECK2-NEXT: [[DIV64:%.*]] = udiv i32 [[ADD63]], 1 2232 // CHECK2-NEXT: [[MUL65:%.*]] = mul i32 1, [[DIV64]] 2233 // CHECK2-NEXT: [[MUL66:%.*]] = mul i32 [[MUL65]], 4 2234 // CHECK2-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64 2235 // CHECK2-NEXT: [[MUL68:%.*]] = mul nsw i64 [[DIV60]], [[CONV67]] 2236 // CHECK2-NEXT: [[SUB69:%.*]] = sub nsw i64 [[TMP27]], [[MUL68]] 2237 // CHECK2-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2238 // CHECK2-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2239 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2240 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2241 // CHECK2-NEXT: [[SUB70:%.*]] = sub i32 [[TMP35]], [[TMP36]] 2242 // CHECK2-NEXT: [[SUB71:%.*]] = sub i32 [[SUB70]], 1 2243 // CHECK2-NEXT: [[ADD72:%.*]] = add i32 [[SUB71]], 1 2244 // CHECK2-NEXT: [[DIV73:%.*]] = udiv i32 [[ADD72]], 1 2245 // CHECK2-NEXT: [[MUL74:%.*]] = mul i32 1, [[DIV73]] 2246 // CHECK2-NEXT: [[MUL75:%.*]] = mul i32 [[MUL74]], 4 2247 // CHECK2-NEXT: [[CONV76:%.*]] = zext i32 [[MUL75]] to i64 2248 // CHECK2-NEXT: [[DIV77:%.*]] = sdiv i64 [[TMP34]], [[CONV76]] 2249 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 2250 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2251 // CHECK2-NEXT: [[SUB78:%.*]] = sub i32 [[TMP37]], [[TMP38]] 2252 // CHECK2-NEXT: [[SUB79:%.*]] = sub i32 [[SUB78]], 1 2253 // CHECK2-NEXT: [[ADD80:%.*]] = add i32 [[SUB79]], 1 2254 // CHECK2-NEXT: [[DIV81:%.*]] = udiv i32 [[ADD80]], 1 2255 // CHECK2-NEXT: [[MUL82:%.*]] = mul i32 1, [[DIV81]] 2256 // CHECK2-NEXT: [[MUL83:%.*]] = mul i32 [[MUL82]], 4 2257 // CHECK2-NEXT: [[CONV84:%.*]] = zext i32 [[MUL83]] to i64 2258 // CHECK2-NEXT: [[MUL85:%.*]] = mul nsw i64 [[DIV77]], [[CONV84]] 2259 // CHECK2-NEXT: [[SUB86:%.*]] = sub nsw i64 [[TMP33]], [[MUL85]] 2260 // CHECK2-NEXT: [[DIV87:%.*]] = sdiv i64 [[SUB86]], 4 2261 // CHECK2-NEXT: [[MUL88:%.*]] = mul nsw i64 [[DIV87]], 4 2262 // CHECK2-NEXT: [[SUB89:%.*]] = sub nsw i64 [[SUB69]], [[MUL88]] 2263 // CHECK2-NEXT: [[MUL90:%.*]] = mul nsw i64 [[SUB89]], 3 2264 // CHECK2-NEXT: [[ADD91:%.*]] = add nsw i64 7, [[MUL90]] 2265 // CHECK2-NEXT: [[CONV92:%.*]] = trunc i64 [[ADD91]] to i32 2266 // CHECK2-NEXT: store i32 [[CONV92]], ptr [[J13]], align 4 2267 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTTILE_0_IV_I12]], align 4 2268 // CHECK2-NEXT: [[MUL93:%.*]] = mul nsw i32 [[TMP39]], 3 2269 // CHECK2-NEXT: [[ADD94:%.*]] = add nsw i32 7, [[MUL93]] 2270 // CHECK2-NEXT: store i32 [[ADD94]], ptr [[I]], align 4 2271 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, ptr [[I]], align 4 2272 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[J13]], align 4 2273 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP40]], i32 noundef [[TMP41]]) 2274 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2275 // CHECK2: omp.body.continue: 2276 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2277 // CHECK2: omp.inner.for.inc: 2278 // CHECK2-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 2279 // CHECK2-NEXT: [[ADD95:%.*]] = add nsw i64 [[TMP42]], 1 2280 // CHECK2-NEXT: store i64 [[ADD95]], ptr [[DOTOMP_IV]], align 8 2281 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2282 // CHECK2: omp.inner.for.end: 2283 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2284 // CHECK2: omp.loop.exit: 2285 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 2286 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 2287 // CHECK2: omp.precond.end: 2288 // CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 2289 // CHECK2-NEXT: ret void 2290 // 2291 // 2292 // CHECK2-LABEL: define dso_local void @foo6( 2293 // CHECK2-SAME: ) #[[ATTR1]] { 2294 // CHECK2-NEXT: entry: 2295 // CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @foo6.omp_outlined) 2296 // CHECK2-NEXT: ret void 2297 // 2298 // 2299 // CHECK2-LABEL: define internal void @foo6.omp_outlined( 2300 // CHECK2-SAME: ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] { 2301 // CHECK2-NEXT: entry: 2302 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2303 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2304 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2305 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 2306 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2307 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2308 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2309 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2310 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2311 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 2312 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 2313 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2314 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2315 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 2316 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2317 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_UB]], align 4 2318 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2319 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2320 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2321 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2322 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2323 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2324 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 0 2325 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2326 // CHECK2: cond.true: 2327 // CHECK2-NEXT: br label [[COND_END:%.*]] 2328 // CHECK2: cond.false: 2329 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2330 // CHECK2-NEXT: br label [[COND_END]] 2331 // CHECK2: cond.end: 2332 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 0, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2333 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2334 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2335 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2336 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2337 // CHECK2: omp.inner.for.cond: 2338 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2339 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2340 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2341 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2342 // CHECK2: omp.inner.for.body: 2343 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2344 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 5 2345 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2346 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTFLOOR_0_IV_I]], align 4 2347 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2348 // CHECK2-NEXT: store i32 [[TMP8]], ptr [[DOTTILE_0_IV_I]], align 4 2349 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 2350 // CHECK2: for.cond: 2351 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2352 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2353 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 5 2354 // CHECK2-NEXT: [[CMP3:%.*]] = icmp slt i32 4, [[ADD2]] 2355 // CHECK2-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 2356 // CHECK2: cond.true4: 2357 // CHECK2-NEXT: br label [[COND_END7:%.*]] 2358 // CHECK2: cond.false5: 2359 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2360 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], 5 2361 // CHECK2-NEXT: br label [[COND_END7]] 2362 // CHECK2: cond.end7: 2363 // CHECK2-NEXT: [[COND8:%.*]] = phi i32 [ 4, [[COND_TRUE4]] ], [ [[ADD6]], [[COND_FALSE5]] ] 2364 // CHECK2-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP9]], [[COND8]] 2365 // CHECK2-NEXT: br i1 [[CMP9]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2366 // CHECK2: for.body: 2367 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2368 // CHECK2-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP12]], 3 2369 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 7, [[MUL10]] 2370 // CHECK2-NEXT: store i32 [[ADD11]], ptr [[I]], align 4 2371 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 2372 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP13]]) 2373 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 2374 // CHECK2: for.inc: 2375 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2376 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP14]], 1 2377 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 2378 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 2379 // CHECK2: for.end: 2380 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2381 // CHECK2: omp.body.continue: 2382 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2383 // CHECK2: omp.inner.for.inc: 2384 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2385 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP15]], 1 2386 // CHECK2-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4 2387 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 2388 // CHECK2: omp.inner.for.end: 2389 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2390 // CHECK2: omp.loop.exit: 2391 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 2392 // CHECK2-NEXT: ret void 2393 // 2394 // 2395 // CHECK2-LABEL: define dso_local void @foo8( 2396 // CHECK2-SAME: i32 noundef [[A:%.*]]) #[[ATTR1]] { 2397 // CHECK2-NEXT: entry: 2398 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2399 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2400 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 2401 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 2402 // CHECK2-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2403 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 2404 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 2405 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 2406 // CHECK2: for.cond: 2407 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2408 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 2409 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END24:%.*]] 2410 // CHECK2: for.body: 2411 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2412 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTTILE_0_IV_I]], align 4 2413 // CHECK2-NEXT: br label [[FOR_COND1:%.*]] 2414 // CHECK2: for.cond1: 2415 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2416 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2417 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4 2418 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP4]], 0 2419 // CHECK2-NEXT: br i1 [[CMP2]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2420 // CHECK2: cond.true: 2421 // CHECK2-NEXT: br label [[COND_END:%.*]] 2422 // CHECK2: cond.false: 2423 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[A_ADDR]], align 4 2424 // CHECK2-NEXT: br label [[COND_END]] 2425 // CHECK2: cond.end: 2426 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2427 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[COND]] 2428 // CHECK2-NEXT: [[CMP3:%.*]] = icmp slt i32 4, [[ADD]] 2429 // CHECK2-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 2430 // CHECK2: cond.true4: 2431 // CHECK2-NEXT: br label [[COND_END12:%.*]] 2432 // CHECK2: cond.false5: 2433 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2434 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[A_ADDR]], align 4 2435 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP7]], 0 2436 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]] 2437 // CHECK2: cond.true7: 2438 // CHECK2-NEXT: br label [[COND_END9:%.*]] 2439 // CHECK2: cond.false8: 2440 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4 2441 // CHECK2-NEXT: br label [[COND_END9]] 2442 // CHECK2: cond.end9: 2443 // CHECK2-NEXT: [[COND10:%.*]] = phi i32 [ 1, [[COND_TRUE7]] ], [ [[TMP8]], [[COND_FALSE8]] ] 2444 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP6]], [[COND10]] 2445 // CHECK2-NEXT: br label [[COND_END12]] 2446 // CHECK2: cond.end12: 2447 // CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ 4, [[COND_TRUE4]] ], [ [[ADD11]], [[COND_END9]] ] 2448 // CHECK2-NEXT: [[CMP14:%.*]] = icmp slt i32 [[TMP2]], [[COND13]] 2449 // CHECK2-NEXT: br i1 [[CMP14]], label [[FOR_BODY15:%.*]], label [[FOR_END:%.*]] 2450 // CHECK2: for.body15: 2451 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2452 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 3 2453 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 7, [[MUL]] 2454 // CHECK2-NEXT: store i32 [[ADD16]], ptr [[I]], align 4 2455 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 2456 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP10]]) 2457 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 2458 // CHECK2: for.inc: 2459 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2460 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 2461 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 2462 // CHECK2-NEXT: br label [[FOR_COND1]], !llvm.loop [[LOOP23:![0-9]+]] 2463 // CHECK2: for.end: 2464 // CHECK2-NEXT: br label [[FOR_INC17:%.*]] 2465 // CHECK2: for.inc17: 2466 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[A_ADDR]], align 4 2467 // CHECK2-NEXT: [[CMP18:%.*]] = icmp sle i32 [[TMP12]], 0 2468 // CHECK2-NEXT: br i1 [[CMP18]], label [[COND_TRUE19:%.*]], label [[COND_FALSE20:%.*]] 2469 // CHECK2: cond.true19: 2470 // CHECK2-NEXT: br label [[COND_END21:%.*]] 2471 // CHECK2: cond.false20: 2472 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[A_ADDR]], align 4 2473 // CHECK2-NEXT: br label [[COND_END21]] 2474 // CHECK2: cond.end21: 2475 // CHECK2-NEXT: [[COND22:%.*]] = phi i32 [ 1, [[COND_TRUE19]] ], [ [[TMP13]], [[COND_FALSE20]] ] 2476 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2477 // CHECK2-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP14]], [[COND22]] 2478 // CHECK2-NEXT: store i32 [[ADD23]], ptr [[DOTFLOOR_0_IV_I]], align 4 2479 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 2480 // CHECK2: for.end24: 2481 // CHECK2-NEXT: ret void 2482 // 2483 // 2484 // CHECK2-LABEL: define dso_local void @foo9( 2485 // CHECK2-SAME: ptr noundef byval([[STRUCT_DATA_T:%.*]]) align 8 [[DATA:%.*]]) #[[ATTR1]] { 2486 // CHECK2-NEXT: entry: 2487 // CHECK2-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8 2488 // CHECK2-NEXT: [[__END2:%.*]] = alloca ptr, align 8 2489 // CHECK2-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8 2490 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 2491 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8 2492 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 2493 // CHECK2-NEXT: [[DOTFLOOR_0_IV___BEGIN2:%.*]] = alloca i64, align 8 2494 // CHECK2-NEXT: [[DOTTILE_0_IV___BEGIN2:%.*]] = alloca i64, align 8 2495 // CHECK2-NEXT: [[V:%.*]] = alloca double, align 8 2496 // CHECK2-NEXT: [[ARRAY:%.*]] = getelementptr inbounds nuw [[STRUCT_DATA_T]], ptr [[DATA]], i32 0, i32 0 2497 // CHECK2-NEXT: store ptr [[ARRAY]], ptr [[__RANGE2]], align 8 2498 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8 2499 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP0]], i64 0, i64 0 2500 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 12 2501 // CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8 2502 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8 2503 // CHECK2-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP1]], i64 0, i64 0 2504 // CHECK2-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8 2505 // CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8 2506 // CHECK2-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [12 x double], ptr [[TMP2]], i64 0, i64 0 2507 // CHECK2-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8 2508 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8 2509 // CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8 2510 // CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8 2511 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 2512 // CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64 2513 // CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 2514 // CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 2515 // CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 2516 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 2517 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 2518 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 2519 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1 2520 // CHECK2-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8 2521 // CHECK2-NEXT: store i64 0, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2522 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 2523 // CHECK2: for.cond: 2524 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2525 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 2526 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1 2527 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]] 2528 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END18:%.*]] 2529 // CHECK2: for.body: 2530 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2531 // CHECK2-NEXT: store i64 [[TMP8]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 2532 // CHECK2-NEXT: br label [[FOR_COND7:%.*]] 2533 // CHECK2: for.cond7: 2534 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 2535 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 2536 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP10]], 1 2537 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2538 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP11]], 5 2539 // CHECK2-NEXT: [[CMP10:%.*]] = icmp slt i64 [[ADD8]], [[ADD9]] 2540 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2541 // CHECK2: cond.true: 2542 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 2543 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i64 [[TMP12]], 1 2544 // CHECK2-NEXT: br label [[COND_END:%.*]] 2545 // CHECK2: cond.false: 2546 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2547 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i64 [[TMP13]], 5 2548 // CHECK2-NEXT: br label [[COND_END]] 2549 // CHECK2: cond.end: 2550 // CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[ADD11]], [[COND_TRUE]] ], [ [[ADD12]], [[COND_FALSE]] ] 2551 // CHECK2-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP9]], [[COND]] 2552 // CHECK2-NEXT: br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END:%.*]] 2553 // CHECK2: for.body14: 2554 // CHECK2-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 2555 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 2556 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP15]], 1 2557 // CHECK2-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds double, ptr [[TMP14]], i64 [[MUL]] 2558 // CHECK2-NEXT: store ptr [[ADD_PTR15]], ptr [[__BEGIN2]], align 8 2559 // CHECK2-NEXT: [[TMP16:%.*]] = load ptr, ptr [[__BEGIN2]], align 8 2560 // CHECK2-NEXT: [[TMP17:%.*]] = load double, ptr [[TMP16]], align 8 2561 // CHECK2-NEXT: store double [[TMP17]], ptr [[V]], align 8 2562 // CHECK2-NEXT: [[TMP18:%.*]] = load double, ptr [[V]], align 8 2563 // CHECK2-NEXT: call void (...) @body(double noundef [[TMP18]]) 2564 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 2565 // CHECK2: for.inc: 2566 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTTILE_0_IV___BEGIN2]], align 8 2567 // CHECK2-NEXT: [[INC:%.*]] = add nsw i64 [[TMP19]], 1 2568 // CHECK2-NEXT: store i64 [[INC]], ptr [[DOTTILE_0_IV___BEGIN2]], align 8 2569 // CHECK2-NEXT: br label [[FOR_COND7]], !llvm.loop [[LOOP25:![0-9]+]] 2570 // CHECK2: for.end: 2571 // CHECK2-NEXT: br label [[FOR_INC16:%.*]] 2572 // CHECK2: for.inc16: 2573 // CHECK2-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2574 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP20]], 5 2575 // CHECK2-NEXT: store i64 [[ADD17]], ptr [[DOTFLOOR_0_IV___BEGIN2]], align 8 2576 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 2577 // CHECK2: for.end18: 2578 // CHECK2-NEXT: ret void 2579 // 2580 // 2581 // CHECK2-LABEL: define dso_local void @tfoo7( 2582 // CHECK2-SAME: ) #[[ATTR1]] { 2583 // CHECK2-NEXT: entry: 2584 // CHECK2-NEXT: call void @_Z4foo7IiTnT_Li3ETnS0_Li5EEvS0_S0_(i32 noundef 0, i32 noundef 42) 2585 // CHECK2-NEXT: ret void 2586 // 2587 // 2588 // CHECK2-LABEL: define linkonce_odr void @_Z4foo7IiTnT_Li3ETnS0_Li5EEvS0_S0_( 2589 // CHECK2-SAME: i32 noundef [[START:%.*]], i32 noundef [[END:%.*]]) #[[ATTR1]] comdat { 2590 // CHECK2-NEXT: entry: 2591 // CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 2592 // CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 2593 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 2594 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2595 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2596 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2597 // CHECK2-NEXT: [[DOTFLOOR_0_IV_I:%.*]] = alloca i32, align 4 2598 // CHECK2-NEXT: [[DOTTILE_0_IV_I:%.*]] = alloca i32, align 4 2599 // CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 2600 // CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 2601 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 2602 // CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 2603 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 2604 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2605 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 2606 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2607 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2608 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2609 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 2610 // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 2611 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 3 2612 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 3 2613 // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 2614 // CHECK2-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2615 // CHECK2-NEXT: store i32 0, ptr [[DOTFLOOR_0_IV_I]], align 4 2616 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 2617 // CHECK2: for.cond: 2618 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2619 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2620 // CHECK2-NEXT: [[ADD5:%.*]] = add i32 [[TMP6]], 1 2621 // CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP5]], [[ADD5]] 2622 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END17:%.*]] 2623 // CHECK2: for.body: 2624 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2625 // CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTTILE_0_IV_I]], align 4 2626 // CHECK2-NEXT: br label [[FOR_COND6:%.*]] 2627 // CHECK2: for.cond6: 2628 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2629 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2630 // CHECK2-NEXT: [[ADD7:%.*]] = add i32 [[TMP9]], 1 2631 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2632 // CHECK2-NEXT: [[ADD8:%.*]] = add i32 [[TMP10]], 5 2633 // CHECK2-NEXT: [[CMP9:%.*]] = icmp ult i32 [[ADD7]], [[ADD8]] 2634 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2635 // CHECK2: cond.true: 2636 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2637 // CHECK2-NEXT: [[ADD10:%.*]] = add i32 [[TMP11]], 1 2638 // CHECK2-NEXT: br label [[COND_END:%.*]] 2639 // CHECK2: cond.false: 2640 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2641 // CHECK2-NEXT: [[ADD11:%.*]] = add i32 [[TMP12]], 5 2642 // CHECK2-NEXT: br label [[COND_END]] 2643 // CHECK2: cond.end: 2644 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[ADD10]], [[COND_TRUE]] ], [ [[ADD11]], [[COND_FALSE]] ] 2645 // CHECK2-NEXT: [[CMP12:%.*]] = icmp ult i32 [[TMP8]], [[COND]] 2646 // CHECK2-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END:%.*]] 2647 // CHECK2: for.body13: 2648 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2649 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2650 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP14]], 3 2651 // CHECK2-NEXT: [[ADD14:%.*]] = add i32 [[TMP13]], [[MUL]] 2652 // CHECK2-NEXT: store i32 [[ADD14]], ptr [[I]], align 4 2653 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 2654 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP15]]) 2655 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 2656 // CHECK2: for.inc: 2657 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTTILE_0_IV_I]], align 4 2658 // CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP16]], 1 2659 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTTILE_0_IV_I]], align 4 2660 // CHECK2-NEXT: br label [[FOR_COND6]], !llvm.loop [[LOOP27:![0-9]+]] 2661 // CHECK2: for.end: 2662 // CHECK2-NEXT: br label [[FOR_INC15:%.*]] 2663 // CHECK2: for.inc15: 2664 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTFLOOR_0_IV_I]], align 4 2665 // CHECK2-NEXT: [[ADD16:%.*]] = add i32 [[TMP17]], 5 2666 // CHECK2-NEXT: store i32 [[ADD16]], ptr [[DOTFLOOR_0_IV_I]], align 4 2667 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2668 // CHECK2: for.end17: 2669 // CHECK2-NEXT: ret void 2670 // 2671 // 2672 // CHECK2-LABEL: define internal void @_GLOBAL__sub_I_tile_codegen.cpp( 2673 // CHECK2-SAME: ) #[[ATTR0]] section ".text.startup" { 2674 // CHECK2-NEXT: entry: 2675 // CHECK2-NEXT: call void @__cxx_global_var_init() 2676 // CHECK2-NEXT: ret void 2677 // 2678 //. 2679 // CHECK1: [[LOOP3]] = distinct !{[[LOOP3]], [[META4:![0-9]+]]} 2680 // CHECK1: [[META4]] = !{!"llvm.loop.mustprogress"} 2681 // CHECK1: [[LOOP5]] = distinct !{[[LOOP5]], [[META4]]} 2682 // CHECK1: [[LOOP6]] = distinct !{[[LOOP6]], [[META4]]} 2683 // CHECK1: [[LOOP7]] = distinct !{[[LOOP7]], [[META4]]} 2684 // CHECK1: [[LOOP8]] = distinct !{[[LOOP8]], [[META4]]} 2685 // CHECK1: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]]} 2686 // CHECK1: [[LOOP10]] = distinct !{[[LOOP10]], [[META4]]} 2687 // CHECK1: [[LOOP11]] = distinct !{[[LOOP11]], [[META4]]} 2688 // CHECK1: [[LOOP12]] = distinct !{[[LOOP12]], [[META4]]} 2689 // CHECK1: [[LOOP13]] = distinct !{[[LOOP13]], [[META4]]} 2690 // CHECK1: [[LOOP14]] = distinct !{[[LOOP14]], [[META4]]} 2691 // CHECK1: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]]} 2692 // CHECK1: [[LOOP16]] = distinct !{[[LOOP16]], [[META4]]} 2693 // CHECK1: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]]} 2694 // CHECK1: [[LOOP18]] = distinct !{[[LOOP18]], [[META4]]} 2695 // CHECK1: [[LOOP21]] = distinct !{[[LOOP21]], [[META4]]} 2696 // CHECK1: [[LOOP22]] = distinct !{[[LOOP22]], [[META4]]} 2697 // CHECK1: [[LOOP23]] = distinct !{[[LOOP23]], [[META4]]} 2698 // CHECK1: [[LOOP24]] = distinct !{[[LOOP24]], [[META4]]} 2699 // CHECK1: [[LOOP25]] = distinct !{[[LOOP25]], [[META4]]} 2700 // CHECK1: [[LOOP26]] = distinct !{[[LOOP26]], [[META4]]} 2701 // CHECK1: [[LOOP27]] = distinct !{[[LOOP27]], [[META4]]} 2702 // CHECK1: [[LOOP28]] = distinct !{[[LOOP28]], [[META4]]} 2703 //. 2704 // CHECK2: [[LOOP3]] = distinct !{[[LOOP3]], [[META4:![0-9]+]]} 2705 // CHECK2: [[META4]] = !{!"llvm.loop.mustprogress"} 2706 // CHECK2: [[LOOP5]] = distinct !{[[LOOP5]], [[META4]]} 2707 // CHECK2: [[LOOP6]] = distinct !{[[LOOP6]], [[META4]]} 2708 // CHECK2: [[LOOP7]] = distinct !{[[LOOP7]], [[META4]]} 2709 // CHECK2: [[LOOP8]] = distinct !{[[LOOP8]], [[META4]]} 2710 // CHECK2: [[LOOP9]] = distinct !{[[LOOP9]], [[META4]]} 2711 // CHECK2: [[LOOP10]] = distinct !{[[LOOP10]], [[META4]]} 2712 // CHECK2: [[LOOP11]] = distinct !{[[LOOP11]], [[META4]]} 2713 // CHECK2: [[LOOP12]] = distinct !{[[LOOP12]], [[META4]]} 2714 // CHECK2: [[LOOP13]] = distinct !{[[LOOP13]], [[META4]]} 2715 // CHECK2: [[LOOP14]] = distinct !{[[LOOP14]], [[META4]]} 2716 // CHECK2: [[LOOP15]] = distinct !{[[LOOP15]], [[META4]]} 2717 // CHECK2: [[LOOP16]] = distinct !{[[LOOP16]], [[META4]]} 2718 // CHECK2: [[LOOP17]] = distinct !{[[LOOP17]], [[META4]]} 2719 // CHECK2: [[LOOP18]] = distinct !{[[LOOP18]], [[META4]]} 2720 // CHECK2: [[LOOP19]] = distinct !{[[LOOP19]], [[META4]]} 2721 // CHECK2: [[LOOP20]] = distinct !{[[LOOP20]], [[META4]]} 2722 // CHECK2: [[LOOP23]] = distinct !{[[LOOP23]], [[META4]]} 2723 // CHECK2: [[LOOP24]] = distinct !{[[LOOP24]], [[META4]]} 2724 // CHECK2: [[LOOP25]] = distinct !{[[LOOP25]], [[META4]]} 2725 // CHECK2: [[LOOP26]] = distinct !{[[LOOP26]], [[META4]]} 2726 // CHECK2: [[LOOP27]] = distinct !{[[LOOP27]], [[META4]]} 2727 // CHECK2: [[LOOP28]] = distinct !{[[LOOP28]], [[META4]]} 2728 //. 2729