1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 template <class T> 33 struct S { 34 T f; 35 S(T a) : f(a) {} 36 S() : f() {} 37 operator T() { return T(); } 38 ~S() {} 39 }; 40 41 volatile int g __attribute__((aligned(128))) = 1212; 42 43 struct SS { 44 int a; 45 int b : 4; 46 int &c; 47 SS(int &d) : a(0), b(0), c(d) { 48 #pragma omp target 49 #pragma omp teams private(a, b, c) 50 #ifdef LAMBDA 51 [&]() { 52 ++this->a, --b, (this)->c /= 1; 53 }(); 54 #else 55 ++this->a, --b, c /= 1; 56 #endif 57 } 58 }; 59 60 template<typename T> 61 struct SST { 62 T a; 63 SST() : a(T()) { 64 #pragma omp target 65 #pragma omp teams private(a) 66 #ifdef LAMBDA 67 [&]() { 68 [&]() { 69 ++this->a; 70 }(); 71 }(); 72 #else 73 ++(this)->a; 74 #endif 75 } 76 }; 77 78 template <typename T> 79 T tmain() { 80 S<T> test; 81 SST<T> sst; 82 T t_var __attribute__((aligned(128))) = T(); 83 T vec[] __attribute__((aligned(128))) = {1, 2}; 84 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 85 S<T> var __attribute__((aligned(128))) (3); 86 #pragma omp target 87 #pragma omp teams private(t_var, vec, s_arr, var) 88 { 89 vec[0] = t_var; 90 s_arr[0] = var; 91 } 92 return T(); 93 } 94 95 int main() { 96 static int sivar; 97 SS ss(sivar); 98 #ifdef LAMBDA 99 100 101 // lambda and target region in main 102 103 // target region in struct constructor 104 105 // offloading function in struct constructor 106 107 // outlined teams region in struct constructor 108 // call void [[INNER_LAMBDA_CONSTR:@.+]](ptr 109 110 // inner lambda in struct constructor 111 // define{{.*}} void [[INNER_LAMBDA_CONSTR]](ptr 112 113 114 // ret 115 116 [&]() { 117 #pragma omp target 118 #pragma omp teams private(g, sivar) 119 { 120 121 g = 1; 122 sivar = 2; 123 [&]() { 124 g = 2; 125 sivar = 4; 126 }(); 127 } 128 }(); 129 return 0; 130 #else 131 S<float> test; 132 int t_var = 0; 133 int vec[] = {1, 2}; 134 S<float> s_arr[] = {1, 2}; 135 S<float> var(3); 136 #pragma omp target 137 #pragma omp teams private(t_var, vec, s_arr, var, sivar) 138 { 139 vec[0] = t_var; 140 s_arr[0] = var; 141 sivar = 3; 142 } 143 return tmain<int>(); 144 #endif 145 } 146 147 148 // target region in main function 149 150 151 // template tmain 152 153 // target in SS constructor 154 155 156 // target in tmain template 157 158 159 // SST constructor 160 161 // target in SST constructor 162 163 164 #endif 165 166 // CHECK1-LABEL: define {{[^@]+}}@main 167 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 168 // CHECK1-NEXT: entry: 169 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 171 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 172 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 173 // CHECK1-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 174 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 175 // CHECK1-NEXT: ret i32 0 176 // 177 // 178 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 179 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 180 // CHECK1-NEXT: entry: 181 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 182 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8 183 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 184 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8 185 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 186 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8 187 // CHECK1-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 188 // CHECK1-NEXT: ret void 189 // 190 // 191 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 192 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat { 193 // CHECK1-NEXT: entry: 194 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 195 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8 196 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 197 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 198 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 199 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 200 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 201 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8 202 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 203 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 204 // CHECK1-NEXT: store i32 0, ptr [[A]], align 8 205 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1 206 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4 207 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 208 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 209 // CHECK1-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4 210 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2 211 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8 212 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[C]], align 8 213 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 214 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP1]], align 8 215 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 216 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 8 217 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 218 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 219 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 220 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 222 // CHECK1-NEXT: store i32 3, ptr [[TMP6]], align 4 223 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 224 // CHECK1-NEXT: store i32 1, ptr [[TMP7]], align 4 225 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 226 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 227 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 228 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 229 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 230 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP10]], align 8 231 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 232 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP11]], align 8 233 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 234 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 235 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 236 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 237 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 238 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 239 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 240 // CHECK1-NEXT: store i64 0, ptr [[TMP15]], align 8 241 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 242 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 243 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 244 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 245 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 246 // CHECK1-NEXT: store i32 0, ptr [[TMP18]], align 4 247 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, ptr [[KERNEL_ARGS]]) 248 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 249 // CHECK1-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 250 // CHECK1: omp_offload.failed: 251 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(ptr [[THIS1]]) #[[ATTR3:[0-9]+]] 252 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 253 // CHECK1: omp_offload.cont: 254 // CHECK1-NEXT: ret void 255 // 256 // 257 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 258 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 259 // CHECK1-NEXT: entry: 260 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 261 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 262 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 263 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined, ptr [[TMP0]]) 264 // CHECK1-NEXT: ret void 265 // 266 // 267 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined 268 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] { 269 // CHECK1-NEXT: entry: 270 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 271 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 272 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 273 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 274 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 275 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 276 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 277 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 278 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 279 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 280 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 281 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 282 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 283 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP]], align 8 284 // CHECK1-NEXT: store ptr [[C]], ptr [[_TMP1]], align 8 285 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 286 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP1]], align 8 287 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 288 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 289 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP2]], align 8 290 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 291 // CHECK1-NEXT: store ptr [[B]], ptr [[TMP4]], align 8 292 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 293 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8 294 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP5]], align 8 295 // CHECK1-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 296 // CHECK1-NEXT: ret void 297 // 298 // 299 // CHECK1-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 300 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] { 301 // CHECK1-NEXT: entry: 302 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 303 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 304 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 305 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 0 306 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8 307 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1 308 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8 309 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 310 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 311 // CHECK1-NEXT: store i32 [[INC]], ptr [[TMP3]], align 4 312 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2 313 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8 314 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 315 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 316 // CHECK1-NEXT: store i32 [[DEC]], ptr [[TMP6]], align 4 317 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3 318 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8 319 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 320 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 321 // CHECK1-NEXT: store i32 [[DIV]], ptr [[TMP9]], align 4 322 // CHECK1-NEXT: ret void 323 // 324 // 325 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 326 // CHECK1-SAME: () #[[ATTR2]] { 327 // CHECK1-NEXT: entry: 328 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117.omp_outlined) 329 // CHECK1-NEXT: ret void 330 // 331 // 332 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117.omp_outlined 333 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 334 // CHECK1-NEXT: entry: 335 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 336 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 337 // CHECK1-NEXT: [[G:%.*]] = alloca i32, align 128 338 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 339 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 340 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 341 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 342 // CHECK1-NEXT: store i32 1, ptr [[G]], align 128 343 // CHECK1-NEXT: store i32 2, ptr [[SIVAR]], align 4 344 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 0 345 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 346 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 1 347 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[TMP1]], align 8 348 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 349 // CHECK1-NEXT: ret void 350 // 351 // 352 // CHECK3-LABEL: define {{[^@]+}}@main 353 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 354 // CHECK3-NEXT: entry: 355 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 356 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 357 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 358 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 359 // CHECK3-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 4 dereferenceable(12) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 360 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 361 // CHECK3-NEXT: ret i32 0 362 // 363 // 364 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 365 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 366 // CHECK3-NEXT: entry: 367 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 368 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4 369 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 370 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4 371 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 372 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 4 373 // CHECK3-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 4 dereferenceable(12) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 374 // CHECK3-NEXT: ret void 375 // 376 // 377 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 378 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 379 // CHECK3-NEXT: entry: 380 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 381 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4 382 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 383 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 384 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 385 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 386 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 387 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4 388 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 389 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 390 // CHECK3-NEXT: store i32 0, ptr [[A]], align 4 391 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1 392 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4 393 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 394 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 395 // CHECK3-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4 396 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2 397 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 4 398 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[C]], align 4 399 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 400 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP1]], align 4 401 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 402 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 4 403 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 404 // CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 4 405 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 406 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 407 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 408 // CHECK3-NEXT: store i32 3, ptr [[TMP6]], align 4 409 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 410 // CHECK3-NEXT: store i32 1, ptr [[TMP7]], align 4 411 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 412 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 413 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 414 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 415 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 416 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP10]], align 4 417 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 418 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP11]], align 4 419 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 420 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 421 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 422 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 423 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 424 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 425 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 426 // CHECK3-NEXT: store i64 0, ptr [[TMP15]], align 8 427 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 428 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 429 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 430 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 431 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 432 // CHECK3-NEXT: store i32 0, ptr [[TMP18]], align 4 433 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, ptr [[KERNEL_ARGS]]) 434 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 435 // CHECK3-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 436 // CHECK3: omp_offload.failed: 437 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(ptr [[THIS1]]) #[[ATTR3:[0-9]+]] 438 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 439 // CHECK3: omp_offload.cont: 440 // CHECK3-NEXT: ret void 441 // 442 // 443 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 444 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 445 // CHECK3-NEXT: entry: 446 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 447 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 448 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 449 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined, ptr [[TMP0]]) 450 // CHECK3-NEXT: ret void 451 // 452 // 453 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined 454 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] { 455 // CHECK3-NEXT: entry: 456 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 457 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 458 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 459 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 460 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 461 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 462 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 463 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 464 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 465 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 466 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 467 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 468 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 469 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP]], align 4 470 // CHECK3-NEXT: store ptr [[C]], ptr [[_TMP1]], align 4 471 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 472 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP1]], align 4 473 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 474 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 475 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP2]], align 4 476 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 477 // CHECK3-NEXT: store ptr [[B]], ptr [[TMP4]], align 4 478 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 479 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4 480 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP5]], align 4 481 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 482 // CHECK3-NEXT: ret void 483 // 484 // 485 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 486 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] align 2 { 487 // CHECK3-NEXT: entry: 488 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 489 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 490 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 491 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 0 492 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 4 493 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1 494 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 4 495 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 496 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 497 // CHECK3-NEXT: store i32 [[INC]], ptr [[TMP3]], align 4 498 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2 499 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 4 500 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 501 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 502 // CHECK3-NEXT: store i32 [[DEC]], ptr [[TMP6]], align 4 503 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3 504 // CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 4 505 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 506 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 507 // CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP9]], align 4 508 // CHECK3-NEXT: ret void 509 // 510 // 511 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117 512 // CHECK3-SAME: () #[[ATTR2]] { 513 // CHECK3-NEXT: entry: 514 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117.omp_outlined) 515 // CHECK3-NEXT: ret void 516 // 517 // 518 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117.omp_outlined 519 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 520 // CHECK3-NEXT: entry: 521 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 522 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 523 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 524 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 525 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 526 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 527 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 528 // CHECK3-NEXT: store i32 1, ptr [[G]], align 128 529 // CHECK3-NEXT: store i32 2, ptr [[SIVAR]], align 4 530 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 0 531 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 532 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 1 533 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[TMP1]], align 4 534 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 535 // CHECK3-NEXT: ret void 536 // 537 // 538 // CHECK9-LABEL: define {{[^@]+}}@main 539 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 540 // CHECK9-NEXT: entry: 541 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 542 // CHECK9-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 543 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 544 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 545 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 546 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 547 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 548 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 549 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 550 // CHECK9-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 551 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 552 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 553 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 554 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 555 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 556 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 557 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00) 558 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 559 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 560 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 561 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 562 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 563 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 564 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 565 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 566 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 567 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 568 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 569 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 570 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 571 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 572 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 573 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 574 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 575 // CHECK9-NEXT: store i64 0, ptr [[TMP8]], align 8 576 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 577 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 578 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 579 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 580 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 581 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 582 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 583 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 584 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, ptr [[KERNEL_ARGS]]) 585 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 586 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 587 // CHECK9: omp_offload.failed: 588 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]] 589 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 590 // CHECK9: omp_offload.cont: 591 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 592 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 593 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 594 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 595 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 596 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 597 // CHECK9: arraydestroy.body: 598 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 599 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 600 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 601 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 602 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 603 // CHECK9: arraydestroy.done1: 604 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 605 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 606 // CHECK9-NEXT: ret i32 [[TMP16]] 607 // 608 // 609 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 610 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 611 // CHECK9-NEXT: entry: 612 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 613 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8 614 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 615 // CHECK9-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8 616 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 617 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8 618 // CHECK9-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 619 // CHECK9-NEXT: ret void 620 // 621 // 622 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 623 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 624 // CHECK9-NEXT: entry: 625 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 626 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 627 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 628 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 629 // CHECK9-NEXT: ret void 630 // 631 // 632 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 633 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 634 // CHECK9-NEXT: entry: 635 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 636 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 637 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 638 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 639 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 640 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 641 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 642 // CHECK9-NEXT: ret void 643 // 644 // 645 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136 646 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 647 // CHECK9-NEXT: entry: 648 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.omp_outlined) 649 // CHECK9-NEXT: ret void 650 // 651 // 652 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.omp_outlined 653 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 654 // CHECK9-NEXT: entry: 655 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 656 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 657 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 658 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 659 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 660 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 661 // CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 662 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 663 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 664 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 665 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 666 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 667 // CHECK9: arrayctor.loop: 668 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 669 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 670 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 671 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 672 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 673 // CHECK9: arrayctor.cont: 674 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 675 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4 676 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0 677 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX]], align 4 678 // CHECK9-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0 679 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX1]], ptr align 4 [[VAR]], i64 4, i1 false) 680 // CHECK9-NEXT: store i32 3, ptr [[SIVAR]], align 4 681 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 682 // CHECK9-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 683 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i64 2 684 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 685 // CHECK9: arraydestroy.body: 686 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 687 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 688 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 689 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 690 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 691 // CHECK9: arraydestroy.done3: 692 // CHECK9-NEXT: ret void 693 // 694 // 695 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 696 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 697 // CHECK9-NEXT: entry: 698 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 699 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 700 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 701 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 702 // CHECK9-NEXT: ret void 703 // 704 // 705 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 706 // CHECK9-SAME: () #[[ATTR1]] comdat { 707 // CHECK9-NEXT: entry: 708 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 709 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 710 // CHECK9-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 711 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 712 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 713 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 714 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 715 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 716 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 717 // CHECK9-NEXT: call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]]) 718 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 128 719 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[VEC]], ptr align 128 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 720 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 721 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 722 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 723 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef signext 3) 724 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 725 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 726 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 727 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 728 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 729 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 730 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 731 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 732 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 733 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 734 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 735 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 736 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 737 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 738 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 739 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 740 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 741 // CHECK9-NEXT: store i64 0, ptr [[TMP8]], align 8 742 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 743 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 744 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 745 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 746 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 747 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 748 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 749 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 750 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, ptr [[KERNEL_ARGS]]) 751 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 752 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 753 // CHECK9: omp_offload.failed: 754 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]] 755 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 756 // CHECK9: omp_offload.cont: 757 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 758 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 759 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 760 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 761 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 762 // CHECK9: arraydestroy.body: 763 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 764 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 765 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 766 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 767 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 768 // CHECK9: arraydestroy.done1: 769 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 770 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 771 // CHECK9-NEXT: ret i32 [[TMP16]] 772 // 773 // 774 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 775 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat { 776 // CHECK9-NEXT: entry: 777 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 778 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8 779 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 780 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 781 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 782 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 783 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 784 // CHECK9-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8 785 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 786 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 787 // CHECK9-NEXT: store i32 0, ptr [[A]], align 8 788 // CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1 789 // CHECK9-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4 790 // CHECK9-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 791 // CHECK9-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 792 // CHECK9-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4 793 // CHECK9-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2 794 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8 795 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[C]], align 8 796 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 797 // CHECK9-NEXT: store ptr [[THIS1]], ptr [[TMP1]], align 8 798 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 799 // CHECK9-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 8 800 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 801 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 802 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 803 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 804 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 805 // CHECK9-NEXT: store i32 3, ptr [[TMP6]], align 4 806 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 807 // CHECK9-NEXT: store i32 1, ptr [[TMP7]], align 4 808 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 809 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 810 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 811 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 812 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 813 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP10]], align 8 814 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 815 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP11]], align 8 816 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 817 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 818 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 819 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8 820 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 821 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 822 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 823 // CHECK9-NEXT: store i64 0, ptr [[TMP15]], align 8 824 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 825 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 826 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 827 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 828 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 829 // CHECK9-NEXT: store i32 0, ptr [[TMP18]], align 4 830 // CHECK9-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, ptr [[KERNEL_ARGS]]) 831 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 832 // CHECK9-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 833 // CHECK9: omp_offload.failed: 834 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(ptr [[THIS1]]) #[[ATTR4]] 835 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 836 // CHECK9: omp_offload.cont: 837 // CHECK9-NEXT: ret void 838 // 839 // 840 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 841 // CHECK9-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 842 // CHECK9-NEXT: entry: 843 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 844 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 845 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 846 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined, ptr [[TMP0]]) 847 // CHECK9-NEXT: ret void 848 // 849 // 850 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined 851 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 852 // CHECK9-NEXT: entry: 853 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 854 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 855 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 856 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 857 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 858 // CHECK9-NEXT: [[B:%.*]] = alloca i32, align 4 859 // CHECK9-NEXT: [[C:%.*]] = alloca i32, align 4 860 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 861 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 862 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 863 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 864 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 865 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP]], align 8 866 // CHECK9-NEXT: store ptr [[C]], ptr [[_TMP1]], align 8 867 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP]], align 8 868 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 869 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 870 // CHECK9-NEXT: store i32 [[INC]], ptr [[TMP1]], align 4 871 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[B]], align 4 872 // CHECK9-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 873 // CHECK9-NEXT: store i32 [[DEC]], ptr [[B]], align 4 874 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8 875 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 876 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 877 // CHECK9-NEXT: store i32 [[DIV]], ptr [[TMP4]], align 4 878 // CHECK9-NEXT: ret void 879 // 880 // 881 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 882 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 883 // CHECK9-NEXT: entry: 884 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 885 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 886 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 887 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 888 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 889 // CHECK9-NEXT: ret void 890 // 891 // 892 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 893 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 894 // CHECK9-NEXT: entry: 895 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 896 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 897 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 898 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 899 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 900 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 901 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 902 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 903 // CHECK9-NEXT: ret void 904 // 905 // 906 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 907 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 908 // CHECK9-NEXT: entry: 909 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 910 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 911 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 912 // CHECK9-NEXT: ret void 913 // 914 // 915 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 916 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 917 // CHECK9-NEXT: entry: 918 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 919 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 920 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 921 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 922 // CHECK9-NEXT: ret void 923 // 924 // 925 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 926 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 927 // CHECK9-NEXT: entry: 928 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 929 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 930 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 931 // CHECK9-NEXT: call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 932 // CHECK9-NEXT: ret void 933 // 934 // 935 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 936 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 937 // CHECK9-NEXT: entry: 938 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 939 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 940 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 941 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 942 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 943 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 944 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 945 // CHECK9-NEXT: ret void 946 // 947 // 948 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86 949 // CHECK9-SAME: () #[[ATTR3]] { 950 // CHECK9-NEXT: entry: 951 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.omp_outlined) 952 // CHECK9-NEXT: ret void 953 // 954 // 955 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.omp_outlined 956 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 957 // CHECK9-NEXT: entry: 958 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 959 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 960 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 961 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 962 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 963 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 964 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 965 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 966 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 967 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 968 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 969 // CHECK9: arrayctor.loop: 970 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 971 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 972 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 973 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 974 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 975 // CHECK9: arrayctor.cont: 976 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 977 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 128 978 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0 979 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX]], align 128 980 // CHECK9-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0 981 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[ARRAYIDX1]], ptr align 128 [[VAR]], i64 4, i1 false) 982 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 983 // CHECK9-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 984 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN2]], i64 2 985 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 986 // CHECK9: arraydestroy.body: 987 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 988 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 989 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 990 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 991 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 992 // CHECK9: arraydestroy.done3: 993 // CHECK9-NEXT: ret void 994 // 995 // 996 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 997 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 998 // CHECK9-NEXT: entry: 999 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1000 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1001 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1002 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1003 // CHECK9-NEXT: ret void 1004 // 1005 // 1006 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1007 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1008 // CHECK9-NEXT: entry: 1009 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1010 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1011 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1012 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1013 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 1014 // CHECK9-NEXT: ret void 1015 // 1016 // 1017 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1018 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1019 // CHECK9-NEXT: entry: 1020 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1021 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1022 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1023 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1024 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1025 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1026 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1027 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0 1028 // CHECK9-NEXT: store i32 0, ptr [[A]], align 4 1029 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1030 // CHECK9-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 1031 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1032 // CHECK9-NEXT: store ptr [[THIS1]], ptr [[TMP1]], align 8 1033 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1034 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 1035 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1036 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1037 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1038 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4 1039 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1040 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4 1041 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1042 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 1043 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1044 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 1045 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1046 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 8 1047 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1048 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8 1049 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1050 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 1051 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1052 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 1053 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1054 // CHECK9-NEXT: store i64 0, ptr [[TMP13]], align 8 1055 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1056 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 1057 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1058 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1059 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1060 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1061 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1062 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4 1063 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, ptr [[KERNEL_ARGS]]) 1064 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1065 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1066 // CHECK9: omp_offload.failed: 1067 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(ptr [[THIS1]]) #[[ATTR4]] 1068 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1069 // CHECK9: omp_offload.cont: 1070 // CHECK9-NEXT: ret void 1071 // 1072 // 1073 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64 1074 // CHECK9-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 1075 // CHECK9-NEXT: entry: 1076 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1077 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1078 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1079 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.omp_outlined, ptr [[TMP0]]) 1080 // CHECK9-NEXT: ret void 1081 // 1082 // 1083 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.omp_outlined 1084 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 1085 // CHECK9-NEXT: entry: 1086 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1087 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1088 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1089 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4 1090 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1091 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1092 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1093 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1094 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1095 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP]], align 8 1096 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP]], align 8 1097 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1098 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1099 // CHECK9-NEXT: store i32 [[INC]], ptr [[TMP1]], align 4 1100 // CHECK9-NEXT: ret void 1101 // 1102 // 1103 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1104 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1105 // CHECK9-NEXT: entry: 1106 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1107 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1108 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1109 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1110 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1111 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1112 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1113 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1114 // CHECK9-NEXT: ret void 1115 // 1116 // 1117 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1118 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1119 // CHECK9-NEXT: entry: 1120 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1121 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1122 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1123 // CHECK9-NEXT: ret void 1124 // 1125 // 1126 // CHECK11-LABEL: define {{[^@]+}}@main 1127 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1128 // CHECK11-NEXT: entry: 1129 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1130 // CHECK11-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1131 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1132 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1133 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1134 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1135 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1136 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1137 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1138 // CHECK11-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 4 dereferenceable(12) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1139 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1140 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1141 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1142 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1143 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1144 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1145 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00) 1146 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1147 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 1148 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1149 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 1150 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1151 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1152 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1153 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1154 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1155 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 4 1156 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1157 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 4 1158 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1159 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1160 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1161 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 1162 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1163 // CHECK11-NEXT: store i64 0, ptr [[TMP8]], align 8 1164 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1165 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 1166 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1167 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1168 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1169 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1170 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1171 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 1172 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, ptr [[KERNEL_ARGS]]) 1173 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1174 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1175 // CHECK11: omp_offload.failed: 1176 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]] 1177 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1178 // CHECK11: omp_offload.cont: 1179 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1180 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1181 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1182 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1183 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1184 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1185 // CHECK11: arraydestroy.body: 1186 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1187 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1188 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1189 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1190 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1191 // CHECK11: arraydestroy.done1: 1192 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1193 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1194 // CHECK11-NEXT: ret i32 [[TMP16]] 1195 // 1196 // 1197 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1198 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1199 // CHECK11-NEXT: entry: 1200 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1201 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4 1202 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1203 // CHECK11-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4 1204 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1205 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 4 1206 // CHECK11-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 4 dereferenceable(12) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 1207 // CHECK11-NEXT: ret void 1208 // 1209 // 1210 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1211 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1212 // CHECK11-NEXT: entry: 1213 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1214 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1215 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1216 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1217 // CHECK11-NEXT: ret void 1218 // 1219 // 1220 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1221 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1222 // CHECK11-NEXT: entry: 1223 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1224 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1225 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1226 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1227 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1228 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1229 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1230 // CHECK11-NEXT: ret void 1231 // 1232 // 1233 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136 1234 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 1235 // CHECK11-NEXT: entry: 1236 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.omp_outlined) 1237 // CHECK11-NEXT: ret void 1238 // 1239 // 1240 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.omp_outlined 1241 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1242 // CHECK11-NEXT: entry: 1243 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1244 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1245 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1246 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1247 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1248 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1249 // CHECK11-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1250 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1251 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1252 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1253 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1254 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1255 // CHECK11: arrayctor.loop: 1256 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1257 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1258 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1259 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1260 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1261 // CHECK11: arrayctor.cont: 1262 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1263 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4 1264 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 0 1265 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX]], align 4 1266 // CHECK11-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1267 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX1]], ptr align 4 [[VAR]], i32 4, i1 false) 1268 // CHECK11-NEXT: store i32 3, ptr [[SIVAR]], align 4 1269 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1270 // CHECK11-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1271 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i32 2 1272 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1273 // CHECK11: arraydestroy.body: 1274 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1275 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1276 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1277 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1278 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1279 // CHECK11: arraydestroy.done3: 1280 // CHECK11-NEXT: ret void 1281 // 1282 // 1283 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1284 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1285 // CHECK11-NEXT: entry: 1286 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1287 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1288 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1289 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1290 // CHECK11-NEXT: ret void 1291 // 1292 // 1293 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1294 // CHECK11-SAME: () #[[ATTR1]] comdat { 1295 // CHECK11-NEXT: entry: 1296 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1297 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1298 // CHECK11-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1299 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1300 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1301 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1302 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1303 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1304 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1305 // CHECK11-NEXT: call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]]) 1306 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 128 1307 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 128 [[VEC]], ptr align 128 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1308 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1309 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1310 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1311 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3) 1312 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1313 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 1314 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1315 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 1316 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1317 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1318 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1319 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1320 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1321 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 4 1322 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1323 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 4 1324 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1325 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1326 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1327 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 1328 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1329 // CHECK11-NEXT: store i64 0, ptr [[TMP8]], align 8 1330 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1331 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 1332 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1333 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1334 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1335 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1336 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1337 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 1338 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, ptr [[KERNEL_ARGS]]) 1339 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1340 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1341 // CHECK11: omp_offload.failed: 1342 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]] 1343 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1344 // CHECK11: omp_offload.cont: 1345 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1346 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1347 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1348 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1349 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1350 // CHECK11: arraydestroy.body: 1351 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1352 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1353 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1354 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1355 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1356 // CHECK11: arraydestroy.done1: 1357 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1358 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1359 // CHECK11-NEXT: ret i32 [[TMP16]] 1360 // 1361 // 1362 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1363 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1364 // CHECK11-NEXT: entry: 1365 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1366 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4 1367 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1368 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1369 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1370 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1371 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1372 // CHECK11-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4 1373 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1374 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1375 // CHECK11-NEXT: store i32 0, ptr [[A]], align 4 1376 // CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1 1377 // CHECK11-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4 1378 // CHECK11-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1379 // CHECK11-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 1380 // CHECK11-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4 1381 // CHECK11-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2 1382 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 4 1383 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[C]], align 4 1384 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1385 // CHECK11-NEXT: store ptr [[THIS1]], ptr [[TMP1]], align 4 1386 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1387 // CHECK11-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 4 1388 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1389 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1390 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1391 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1392 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1393 // CHECK11-NEXT: store i32 3, ptr [[TMP6]], align 4 1394 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1395 // CHECK11-NEXT: store i32 1, ptr [[TMP7]], align 4 1396 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1397 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1398 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1399 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 1400 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1401 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP10]], align 4 1402 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1403 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP11]], align 4 1404 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1405 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1406 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1407 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 1408 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1409 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 1410 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1411 // CHECK11-NEXT: store i64 0, ptr [[TMP15]], align 8 1412 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1413 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1414 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1415 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 1416 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1417 // CHECK11-NEXT: store i32 0, ptr [[TMP18]], align 4 1418 // CHECK11-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, ptr [[KERNEL_ARGS]]) 1419 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1420 // CHECK11-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1421 // CHECK11: omp_offload.failed: 1422 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(ptr [[THIS1]]) #[[ATTR4]] 1423 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1424 // CHECK11: omp_offload.cont: 1425 // CHECK11-NEXT: ret void 1426 // 1427 // 1428 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48 1429 // CHECK11-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 1430 // CHECK11-NEXT: entry: 1431 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1432 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1433 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1434 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined, ptr [[TMP0]]) 1435 // CHECK11-NEXT: ret void 1436 // 1437 // 1438 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.omp_outlined 1439 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 1440 // CHECK11-NEXT: entry: 1441 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1442 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1443 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1444 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 1445 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1446 // CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4 1447 // CHECK11-NEXT: [[C:%.*]] = alloca i32, align 4 1448 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1449 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1450 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1451 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1452 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1453 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP]], align 4 1454 // CHECK11-NEXT: store ptr [[C]], ptr [[_TMP1]], align 4 1455 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP]], align 4 1456 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1457 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1458 // CHECK11-NEXT: store i32 [[INC]], ptr [[TMP1]], align 4 1459 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[B]], align 4 1460 // CHECK11-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1 1461 // CHECK11-NEXT: store i32 [[DEC]], ptr [[B]], align 4 1462 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 4 1463 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1464 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1 1465 // CHECK11-NEXT: store i32 [[DIV]], ptr [[TMP4]], align 4 1466 // CHECK11-NEXT: ret void 1467 // 1468 // 1469 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1470 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1471 // CHECK11-NEXT: entry: 1472 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1473 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1474 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1475 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1476 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1477 // CHECK11-NEXT: ret void 1478 // 1479 // 1480 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1481 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1482 // CHECK11-NEXT: entry: 1483 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1484 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1485 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1486 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1487 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1488 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1489 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1490 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1491 // CHECK11-NEXT: ret void 1492 // 1493 // 1494 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1495 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1496 // CHECK11-NEXT: entry: 1497 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1498 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1499 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1500 // CHECK11-NEXT: ret void 1501 // 1502 // 1503 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1504 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1505 // CHECK11-NEXT: entry: 1506 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1507 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1508 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1509 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1510 // CHECK11-NEXT: ret void 1511 // 1512 // 1513 // CHECK11-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1514 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1515 // CHECK11-NEXT: entry: 1516 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1517 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1518 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1519 // CHECK11-NEXT: call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1520 // CHECK11-NEXT: ret void 1521 // 1522 // 1523 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1524 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1525 // CHECK11-NEXT: entry: 1526 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1527 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1528 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1529 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1530 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1531 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1532 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1533 // CHECK11-NEXT: ret void 1534 // 1535 // 1536 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86 1537 // CHECK11-SAME: () #[[ATTR3]] { 1538 // CHECK11-NEXT: entry: 1539 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.omp_outlined) 1540 // CHECK11-NEXT: ret void 1541 // 1542 // 1543 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.omp_outlined 1544 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1545 // CHECK11-NEXT: entry: 1546 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1547 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1548 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1549 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 1550 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128 1551 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 1552 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1553 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1554 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1555 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1556 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1557 // CHECK11: arrayctor.loop: 1558 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1559 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1560 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1561 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1562 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1563 // CHECK11: arrayctor.cont: 1564 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1565 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 128 1566 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 0 1567 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX]], align 128 1568 // CHECK11-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1569 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 128 [[ARRAYIDX1]], ptr align 128 [[VAR]], i32 4, i1 false) 1570 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1571 // CHECK11-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1572 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN2]], i32 2 1573 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1574 // CHECK11: arraydestroy.body: 1575 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1576 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1577 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1578 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1579 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1580 // CHECK11: arraydestroy.done3: 1581 // CHECK11-NEXT: ret void 1582 // 1583 // 1584 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1585 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1586 // CHECK11-NEXT: entry: 1587 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1588 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1589 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1590 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1591 // CHECK11-NEXT: ret void 1592 // 1593 // 1594 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1595 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1596 // CHECK11-NEXT: entry: 1597 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1598 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1599 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1600 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1601 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1602 // CHECK11-NEXT: ret void 1603 // 1604 // 1605 // CHECK11-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1606 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1607 // CHECK11-NEXT: entry: 1608 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1609 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1610 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1611 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1612 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1613 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1614 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1615 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0 1616 // CHECK11-NEXT: store i32 0, ptr [[A]], align 4 1617 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1618 // CHECK11-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 1619 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1620 // CHECK11-NEXT: store ptr [[THIS1]], ptr [[TMP1]], align 4 1621 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1622 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1623 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1624 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1625 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1626 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4 1627 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1628 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4 1629 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1630 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 1631 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1632 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1633 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1634 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 4 1635 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1636 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4 1637 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1638 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1639 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1640 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1641 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1642 // CHECK11-NEXT: store i64 0, ptr [[TMP13]], align 8 1643 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1644 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 1645 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1646 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1647 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1648 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1649 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1650 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4 1651 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, ptr [[KERNEL_ARGS]]) 1652 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1653 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1654 // CHECK11: omp_offload.failed: 1655 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(ptr [[THIS1]]) #[[ATTR4]] 1656 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1657 // CHECK11: omp_offload.cont: 1658 // CHECK11-NEXT: ret void 1659 // 1660 // 1661 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64 1662 // CHECK11-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 1663 // CHECK11-NEXT: entry: 1664 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1665 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1666 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1667 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.omp_outlined, ptr [[TMP0]]) 1668 // CHECK11-NEXT: ret void 1669 // 1670 // 1671 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.omp_outlined 1672 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] { 1673 // CHECK11-NEXT: entry: 1674 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1675 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1676 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1677 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4 1678 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1679 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1680 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1681 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1682 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1683 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP]], align 4 1684 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP]], align 4 1685 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1686 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1 1687 // CHECK11-NEXT: store i32 [[INC]], ptr [[TMP1]], align 4 1688 // CHECK11-NEXT: ret void 1689 // 1690 // 1691 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1692 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1693 // CHECK11-NEXT: entry: 1694 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1695 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1696 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1697 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1698 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1699 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1700 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1701 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1702 // CHECK11-NEXT: ret void 1703 // 1704 // 1705 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1706 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1707 // CHECK11-NEXT: entry: 1708 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1709 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1710 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1711 // CHECK11-NEXT: ret void 1712 // 1713