xref: /llvm-project/clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp (revision 94473f4db6a6f5f12d7c4081455b5b596094eac5) 
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8 
9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 
16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 
20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27 
28 template <typename T>
29 T tmain() {
30   T t_var = T();
31   T vec[] = {1, 2};
32 #pragma omp target
33 #pragma omp teams loop reduction(+: t_var)
34   for (int i = 0; i < 2; ++i) {
35     t_var += (T) i;
36   }
37   return T();
38 }
39 
40 int main() {
41   static int sivar;
42 #ifdef LAMBDA
43 
44   [&]() {
45 #pragma omp target
46 #pragma omp teams loop reduction(+: sivar)
47   for (int i = 0; i < 2; ++i) {
48 
49     // Skip global and bound tid vars
50 
51 
52 
53     // Skip global and bound tid vars, and prev lb and ub vars
54     // skip loop vars
55 
56 
57     sivar += i;
58 
59     [&]() {
60 
61       sivar += 4;
62 
63     }();
64   }
65   }();
66   return 0;
67 #else
68 #pragma omp target
69 #pragma omp teams loop reduction(+: sivar)
70   for (int i = 0; i < 2; ++i) {
71     sivar += i;
72   }
73   return tmain<int>();
74 #endif
75 }
76 
77 
78 
79 
80 // Skip global and bound tid vars
81 
82 
83 // Skip global and bound tid vars, and prev lb and ub
84 // skip loop vars
85 
86 
87 
88 
89 // Skip global and bound tid vars
90 
91 
92 // Skip global and bound tid vars, and prev lb and ub vars
93 // skip loop vars
94 
95 #endif
96 // CHECK1-LABEL: define {{[^@]+}}@main
97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
98 // CHECK1-NEXT:  entry:
99 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT:    [[SIVAR_CASTED:%.*]] = alloca i64, align 8
101 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
102 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
103 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
104 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
105 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
106 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
107 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4
108 // CHECK1-NEXT:    store i32 [[TMP0]], ptr [[SIVAR_CASTED]], align 4
109 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8
110 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
111 // CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP2]], align 8
112 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
113 // CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP3]], align 8
114 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
115 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
116 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
117 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
118 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
119 // CHECK1-NEXT:    store i32 3, ptr [[TMP7]], align 4
120 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
121 // CHECK1-NEXT:    store i32 1, ptr [[TMP8]], align 4
122 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
123 // CHECK1-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 8
124 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
125 // CHECK1-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 8
126 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
127 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP11]], align 8
128 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
129 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP12]], align 8
130 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
131 // CHECK1-NEXT:    store ptr null, ptr [[TMP13]], align 8
132 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
133 // CHECK1-NEXT:    store ptr null, ptr [[TMP14]], align 8
134 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
135 // CHECK1-NEXT:    store i64 2, ptr [[TMP15]], align 8
136 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
137 // CHECK1-NEXT:    store i64 0, ptr [[TMP16]], align 8
138 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
139 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4
140 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
141 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4
142 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
143 // CHECK1-NEXT:    store i32 0, ptr [[TMP19]], align 4
144 // CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]])
145 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
146 // CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
147 // CHECK1:       omp_offload.failed:
148 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
149 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
150 // CHECK1:       omp_offload.cont:
151 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
152 // CHECK1-NEXT:    ret i32 [[CALL]]
153 //
154 //
155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
156 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
157 // CHECK1-NEXT:  entry:
158 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i64, align 8
159 // CHECK1-NEXT:    store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
160 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[SIVAR_ADDR]])
161 // CHECK1-NEXT:    ret void
162 //
163 //
164 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
165 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
166 // CHECK1-NEXT:  entry:
167 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
168 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
169 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 8
170 // CHECK1-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
171 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
172 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
173 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
174 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
175 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
176 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
177 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
178 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
179 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
180 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
181 // CHECK1-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
182 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8
183 // CHECK1-NEXT:    store i32 0, ptr [[SIVAR1]], align 4
184 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
185 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
186 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
187 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
188 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
189 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
190 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
191 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
192 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
193 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
194 // CHECK1:       cond.true:
195 // CHECK1-NEXT:    br label [[COND_END:%.*]]
196 // CHECK1:       cond.false:
197 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
198 // CHECK1-NEXT:    br label [[COND_END]]
199 // CHECK1:       cond.end:
200 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
201 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
203 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
204 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
205 // CHECK1:       omp.inner.for.cond:
206 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
207 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
208 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
209 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
210 // CHECK1:       omp.inner.for.body:
211 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
212 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
213 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
214 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
215 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4
216 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4
217 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
218 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[SIVAR1]], align 4
219 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
220 // CHECK1:       omp.body.continue:
221 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
222 // CHECK1:       omp.inner.for.inc:
223 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
224 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
225 // CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
226 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
227 // CHECK1:       omp.inner.for.end:
228 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
229 // CHECK1:       omp.loop.exit:
230 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
231 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
232 // CHECK1-NEXT:    store ptr [[SIVAR1]], ptr [[TMP12]], align 8
233 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
234 // CHECK1-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
235 // CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
236 // CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
237 // CHECK1-NEXT:    ]
238 // CHECK1:       .omp.reduction.case1:
239 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
240 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4
241 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
242 // CHECK1-NEXT:    store i32 [[ADD5]], ptr [[TMP0]], align 4
243 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)
244 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
245 // CHECK1:       .omp.reduction.case2:
246 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4
247 // CHECK1-NEXT:    [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4
248 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
249 // CHECK1:       .omp.reduction.default:
250 // CHECK1-NEXT:    ret void
251 //
252 //
253 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func
254 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
255 // CHECK1-NEXT:  entry:
256 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
257 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
258 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
259 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
260 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
261 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
262 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0
263 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
264 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
265 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
266 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
267 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4
268 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
269 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
270 // CHECK1-NEXT:    ret void
271 //
272 //
273 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
274 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
275 // CHECK1-NEXT:  entry:
276 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
277 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
278 // CHECK1-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
279 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
280 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
281 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
282 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
283 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
284 // CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 4
285 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
286 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4
287 // CHECK1-NEXT:    store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4
288 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
289 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
290 // CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP2]], align 8
291 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
292 // CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP3]], align 8
293 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
294 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
295 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
296 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
297 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
298 // CHECK1-NEXT:    store i32 3, ptr [[TMP7]], align 4
299 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
300 // CHECK1-NEXT:    store i32 1, ptr [[TMP8]], align 4
301 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
302 // CHECK1-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 8
303 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
304 // CHECK1-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 8
305 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
306 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP11]], align 8
307 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
308 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP12]], align 8
309 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
310 // CHECK1-NEXT:    store ptr null, ptr [[TMP13]], align 8
311 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
312 // CHECK1-NEXT:    store ptr null, ptr [[TMP14]], align 8
313 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
314 // CHECK1-NEXT:    store i64 2, ptr [[TMP15]], align 8
315 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
316 // CHECK1-NEXT:    store i64 0, ptr [[TMP16]], align 8
317 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
318 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4
319 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
320 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4
321 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
322 // CHECK1-NEXT:    store i32 0, ptr [[TMP19]], align 4
323 // CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]])
324 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
325 // CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
326 // CHECK1:       omp_offload.failed:
327 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]]) #[[ATTR2]]
328 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
329 // CHECK1:       omp_offload.cont:
330 // CHECK1-NEXT:    ret i32 0
331 //
332 //
333 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
334 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
335 // CHECK1-NEXT:  entry:
336 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
337 // CHECK1-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
338 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[T_VAR_ADDR]])
339 // CHECK1-NEXT:    ret void
340 //
341 //
342 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
343 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
344 // CHECK1-NEXT:  entry:
345 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
346 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
347 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
348 // CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
349 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
350 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
351 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
352 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
353 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
354 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
355 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
356 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
357 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
358 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
359 // CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
360 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
361 // CHECK1-NEXT:    store i32 0, ptr [[T_VAR1]], align 4
362 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
363 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
364 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
365 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
366 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
367 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
368 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
369 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
370 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
371 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
372 // CHECK1:       cond.true:
373 // CHECK1-NEXT:    br label [[COND_END:%.*]]
374 // CHECK1:       cond.false:
375 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
376 // CHECK1-NEXT:    br label [[COND_END]]
377 // CHECK1:       cond.end:
378 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
379 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
380 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
381 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
382 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
383 // CHECK1:       omp.inner.for.cond:
384 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
385 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
386 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
387 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
388 // CHECK1:       omp.inner.for.body:
389 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
390 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
391 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
392 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
393 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4
394 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4
395 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
396 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[T_VAR1]], align 4
397 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
398 // CHECK1:       omp.body.continue:
399 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
400 // CHECK1:       omp.inner.for.inc:
401 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
402 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
403 // CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
404 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
405 // CHECK1:       omp.inner.for.end:
406 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
407 // CHECK1:       omp.loop.exit:
408 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
409 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
410 // CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[TMP12]], align 8
411 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
412 // CHECK1-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
413 // CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
414 // CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
415 // CHECK1-NEXT:    ]
416 // CHECK1:       .omp.reduction.case1:
417 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
418 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4
419 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
420 // CHECK1-NEXT:    store i32 [[ADD5]], ptr [[TMP0]], align 4
421 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)
422 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
423 // CHECK1:       .omp.reduction.case2:
424 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4
425 // CHECK1-NEXT:    [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4
426 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
427 // CHECK1:       .omp.reduction.default:
428 // CHECK1-NEXT:    ret void
429 //
430 //
431 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
432 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
433 // CHECK1-NEXT:  entry:
434 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
435 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
436 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
437 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
438 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
439 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
440 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0
441 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
442 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
443 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
444 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
445 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4
446 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
447 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
448 // CHECK1-NEXT:    ret void
449 //
450 //
451 // CHECK3-LABEL: define {{[^@]+}}@main
452 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
453 // CHECK3-NEXT:  entry:
454 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
455 // CHECK3-NEXT:    [[SIVAR_CASTED:%.*]] = alloca i32, align 4
456 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
457 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
458 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
459 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
460 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
461 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
462 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4
463 // CHECK3-NEXT:    store i32 [[TMP0]], ptr [[SIVAR_CASTED]], align 4
464 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[SIVAR_CASTED]], align 4
465 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
466 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP2]], align 4
467 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
468 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP3]], align 4
469 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
470 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 4
471 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
472 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
473 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
474 // CHECK3-NEXT:    store i32 3, ptr [[TMP7]], align 4
475 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
476 // CHECK3-NEXT:    store i32 1, ptr [[TMP8]], align 4
477 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
478 // CHECK3-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 4
479 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
480 // CHECK3-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 4
481 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
482 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP11]], align 4
483 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
484 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP12]], align 4
485 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
486 // CHECK3-NEXT:    store ptr null, ptr [[TMP13]], align 4
487 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
488 // CHECK3-NEXT:    store ptr null, ptr [[TMP14]], align 4
489 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
490 // CHECK3-NEXT:    store i64 2, ptr [[TMP15]], align 8
491 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
492 // CHECK3-NEXT:    store i64 0, ptr [[TMP16]], align 8
493 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
494 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4
495 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
496 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4
497 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
498 // CHECK3-NEXT:    store i32 0, ptr [[TMP19]], align 4
499 // CHECK3-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]])
500 // CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
501 // CHECK3-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
502 // CHECK3:       omp_offload.failed:
503 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
504 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
505 // CHECK3:       omp_offload.cont:
506 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
507 // CHECK3-NEXT:    ret i32 [[CALL]]
508 //
509 //
510 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
511 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
512 // CHECK3-NEXT:  entry:
513 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32, align 4
514 // CHECK3-NEXT:    store i32 [[SIVAR]], ptr [[SIVAR_ADDR]], align 4
515 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[SIVAR_ADDR]])
516 // CHECK3-NEXT:    ret void
517 //
518 //
519 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
520 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
521 // CHECK3-NEXT:  entry:
522 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
523 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
524 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 4
525 // CHECK3-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
526 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
527 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
528 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
529 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
530 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
531 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
532 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
533 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4
534 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
535 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
536 // CHECK3-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4
537 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4
538 // CHECK3-NEXT:    store i32 0, ptr [[SIVAR1]], align 4
539 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
540 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
541 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
542 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
543 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
544 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
545 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
546 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
547 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
548 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
549 // CHECK3:       cond.true:
550 // CHECK3-NEXT:    br label [[COND_END:%.*]]
551 // CHECK3:       cond.false:
552 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
553 // CHECK3-NEXT:    br label [[COND_END]]
554 // CHECK3:       cond.end:
555 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
556 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
557 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
558 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
559 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
560 // CHECK3:       omp.inner.for.cond:
561 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
562 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
563 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
564 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
565 // CHECK3:       omp.inner.for.body:
566 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
567 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
568 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
569 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
570 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4
571 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4
572 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
573 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[SIVAR1]], align 4
574 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
575 // CHECK3:       omp.body.continue:
576 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
577 // CHECK3:       omp.inner.for.inc:
578 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
579 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
580 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
581 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
582 // CHECK3:       omp.inner.for.end:
583 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
584 // CHECK3:       omp.loop.exit:
585 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
586 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
587 // CHECK3-NEXT:    store ptr [[SIVAR1]], ptr [[TMP12]], align 4
588 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
589 // CHECK3-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
590 // CHECK3-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
591 // CHECK3-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
592 // CHECK3-NEXT:    ]
593 // CHECK3:       .omp.reduction.case1:
594 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
595 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4
596 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
597 // CHECK3-NEXT:    store i32 [[ADD5]], ptr [[TMP0]], align 4
598 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)
599 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
600 // CHECK3:       .omp.reduction.case2:
601 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4
602 // CHECK3-NEXT:    [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4
603 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
604 // CHECK3:       .omp.reduction.default:
605 // CHECK3-NEXT:    ret void
606 //
607 //
608 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func
609 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
610 // CHECK3-NEXT:  entry:
611 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 4
612 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 4
613 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 4
614 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 4
615 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4
616 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4
617 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0
618 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4
619 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0
620 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4
621 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
622 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4
623 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
624 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
625 // CHECK3-NEXT:    ret void
626 //
627 //
628 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
629 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
630 // CHECK3-NEXT:  entry:
631 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
632 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
633 // CHECK3-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
634 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
635 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
636 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
637 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
638 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
639 // CHECK3-NEXT:    store i32 0, ptr [[T_VAR]], align 4
640 // CHECK3-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
641 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4
642 // CHECK3-NEXT:    store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4
643 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
644 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
645 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP2]], align 4
646 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
647 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP3]], align 4
648 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
649 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 4
650 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
651 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
652 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
653 // CHECK3-NEXT:    store i32 3, ptr [[TMP7]], align 4
654 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
655 // CHECK3-NEXT:    store i32 1, ptr [[TMP8]], align 4
656 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
657 // CHECK3-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 4
658 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
659 // CHECK3-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 4
660 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
661 // CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP11]], align 4
662 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
663 // CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP12]], align 4
664 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
665 // CHECK3-NEXT:    store ptr null, ptr [[TMP13]], align 4
666 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
667 // CHECK3-NEXT:    store ptr null, ptr [[TMP14]], align 4
668 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
669 // CHECK3-NEXT:    store i64 2, ptr [[TMP15]], align 8
670 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
671 // CHECK3-NEXT:    store i64 0, ptr [[TMP16]], align 8
672 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
673 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4
674 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
675 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4
676 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
677 // CHECK3-NEXT:    store i32 0, ptr [[TMP19]], align 4
678 // CHECK3-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]])
679 // CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
680 // CHECK3-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
681 // CHECK3:       omp_offload.failed:
682 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]]) #[[ATTR2]]
683 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
684 // CHECK3:       omp_offload.cont:
685 // CHECK3-NEXT:    ret i32 0
686 //
687 //
688 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
689 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
690 // CHECK3-NEXT:  entry:
691 // CHECK3-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
692 // CHECK3-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
693 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[T_VAR_ADDR]])
694 // CHECK3-NEXT:    ret void
695 //
696 //
697 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined
698 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
699 // CHECK3-NEXT:  entry:
700 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
701 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
702 // CHECK3-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
703 // CHECK3-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
704 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
705 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
706 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
707 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
708 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
709 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
710 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
711 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4
712 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
713 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
714 // CHECK3-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
715 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
716 // CHECK3-NEXT:    store i32 0, ptr [[T_VAR1]], align 4
717 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
718 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
719 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
720 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
721 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
722 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
723 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
724 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
725 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
726 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
727 // CHECK3:       cond.true:
728 // CHECK3-NEXT:    br label [[COND_END:%.*]]
729 // CHECK3:       cond.false:
730 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
731 // CHECK3-NEXT:    br label [[COND_END]]
732 // CHECK3:       cond.end:
733 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
734 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
735 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
736 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
737 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
738 // CHECK3:       omp.inner.for.cond:
739 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
740 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
741 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
742 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
743 // CHECK3:       omp.inner.for.body:
744 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
745 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
746 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
747 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
748 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4
749 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4
750 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
751 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[T_VAR1]], align 4
752 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
753 // CHECK3:       omp.body.continue:
754 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
755 // CHECK3:       omp.inner.for.inc:
756 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
757 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
758 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
759 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
760 // CHECK3:       omp.inner.for.end:
761 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
762 // CHECK3:       omp.loop.exit:
763 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
764 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
765 // CHECK3-NEXT:    store ptr [[T_VAR1]], ptr [[TMP12]], align 4
766 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
767 // CHECK3-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
768 // CHECK3-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
769 // CHECK3-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
770 // CHECK3-NEXT:    ]
771 // CHECK3:       .omp.reduction.case1:
772 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4
773 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4
774 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
775 // CHECK3-NEXT:    store i32 [[ADD5]], ptr [[TMP0]], align 4
776 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)
777 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
778 // CHECK3:       .omp.reduction.case2:
779 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4
780 // CHECK3-NEXT:    [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4
781 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
782 // CHECK3:       .omp.reduction.default:
783 // CHECK3-NEXT:    ret void
784 //
785 //
786 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func
787 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
788 // CHECK3-NEXT:  entry:
789 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 4
790 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 4
791 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 4
792 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 4
793 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4
794 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4
795 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0
796 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4
797 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0
798 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4
799 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
800 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4
801 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
802 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
803 // CHECK3-NEXT:    ret void
804 //
805 //
806 // CHECK9-LABEL: define {{[^@]+}}@main
807 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
808 // CHECK9-NEXT:  entry:
809 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
810 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
811 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
812 // CHECK9-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
813 // CHECK9-NEXT:    ret i32 0
814 //
815 //
816 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
817 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
818 // CHECK9-NEXT:  entry:
819 // CHECK9-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i64, align 8
820 // CHECK9-NEXT:    store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
821 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined, ptr [[SIVAR_ADDR]])
822 // CHECK9-NEXT:    ret void
823 //
824 //
825 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined
826 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
827 // CHECK9-NEXT:  entry:
828 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
829 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
830 // CHECK9-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 8
831 // CHECK9-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
832 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
833 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
834 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
835 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
836 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
837 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
838 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
839 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
840 // CHECK9-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
841 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
842 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
843 // CHECK9-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
844 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8
845 // CHECK9-NEXT:    store i32 0, ptr [[SIVAR1]], align 4
846 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
847 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
848 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
849 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
850 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
851 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
852 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
853 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
854 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
855 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
856 // CHECK9:       cond.true:
857 // CHECK9-NEXT:    br label [[COND_END:%.*]]
858 // CHECK9:       cond.false:
859 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
860 // CHECK9-NEXT:    br label [[COND_END]]
861 // CHECK9:       cond.end:
862 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
863 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
864 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
865 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
866 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
867 // CHECK9:       omp.inner.for.cond:
868 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
869 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
870 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
871 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
872 // CHECK9:       omp.inner.for.body:
873 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
874 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
875 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
876 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
877 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4
878 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4
879 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]
880 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[SIVAR1]], align 4
881 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
882 // CHECK9-NEXT:    store ptr [[SIVAR1]], ptr [[TMP11]], align 8
883 // CHECK9-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])
884 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
885 // CHECK9:       omp.body.continue:
886 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
887 // CHECK9:       omp.inner.for.inc:
888 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
889 // CHECK9-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1
890 // CHECK9-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
891 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
892 // CHECK9:       omp.inner.for.end:
893 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
894 // CHECK9:       omp.loop.exit:
895 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
896 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
897 // CHECK9-NEXT:    store ptr [[SIVAR1]], ptr [[TMP13]], align 8
898 // CHECK9-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
899 // CHECK9-NEXT:    switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
900 // CHECK9-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
901 // CHECK9-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
902 // CHECK9-NEXT:    ]
903 // CHECK9:       .omp.reduction.case1:
904 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4
905 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4
906 // CHECK9-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
907 // CHECK9-NEXT:    store i32 [[ADD5]], ptr [[TMP0]], align 4
908 // CHECK9-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)
909 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
910 // CHECK9:       .omp.reduction.case2:
911 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4
912 // CHECK9-NEXT:    [[TMP18:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4
913 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
914 // CHECK9:       .omp.reduction.default:
915 // CHECK9-NEXT:    ret void
916 //
917 //
918 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func
919 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
920 // CHECK9-NEXT:  entry:
921 // CHECK9-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
922 // CHECK9-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
923 // CHECK9-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
924 // CHECK9-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
925 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
926 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
927 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0
928 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
929 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
930 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
931 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
932 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4
933 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
934 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
935 // CHECK9-NEXT:    ret void
936 //
937