1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping| FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var) 51 for (int i = 0; i < 2; ++i) { 52 vec[i] = t_var; 53 s_arr[i] = var; 54 } 55 return T(); 56 } 57 58 int main() { 59 static int svar; 60 volatile double g; 61 volatile double &g1 = g; 62 63 #ifdef LAMBDA 64 [&]() { 65 static float sfvar; 66 67 #pragma omp target 68 #pragma omp teams distribute simd lastprivate(g, g1, svar, sfvar) 69 for (int i = 0; i < 2; ++i) { 70 // loop variables 71 72 // init private variables 73 g = 1; 74 g1 = 1; 75 svar = 3; 76 sfvar = 4.0; 77 78 79 [&]() { 80 g = 2; 81 g1 = 2; 82 svar = 4; 83 sfvar = 8.0; 84 85 }(); 86 } 87 }(); 88 return 0; 89 #else 90 S<float> test; 91 int t_var = 0; 92 int vec[] = {1, 2}; 93 S<float> s_arr[] = {1, 2}; 94 S<float> &var = test; 95 96 #pragma omp target 97 #pragma omp teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 } 102 int i; 103 104 return tmain<int>(); 105 #endif 106 } 107 108 109 // skip loop variables 110 111 // copy from parameters to local address variables 112 113 // load content of local address variables 114 // the distribute loop 115 // assignment: vec[i] = t_var; 116 117 // assignment: s_arr[i] = var; 118 119 // lastprivates 120 121 122 // template tmain 123 124 125 126 // skip alloca of global_tid and bound_tid 127 // skip loop variables 128 129 // skip init of bound and global tid 130 // copy from parameters to local address variables 131 132 // load content of local address variables 133 // assignment: vec[i] = t_var; 134 135 // assignment: s_arr[i] = var; 136 137 // lastprivates 138 139 #endif 140 // CHECK1-LABEL: define {{[^@]+}}@main 141 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 142 // CHECK1-NEXT: entry: 143 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 145 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8 146 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 147 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 148 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8 149 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 150 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 151 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 152 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8 153 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8 154 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 155 // CHECK1-NEXT: ret i32 0 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 159 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 163 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 166 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8 167 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 170 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8 171 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8 172 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]]) 173 // CHECK1-NEXT: ret void 174 // 175 // 176 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined 177 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 178 // CHECK1-NEXT: entry: 179 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 180 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 181 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 182 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 8 183 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8 184 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 8 185 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 186 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 187 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8 193 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8 194 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8 195 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 197 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 199 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 200 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 201 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 202 // CHECK1-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 8 203 // CHECK1-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8 204 // CHECK1-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 205 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8 206 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8 207 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8 208 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8 209 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8 210 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 211 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 212 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 213 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 214 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 215 // CHECK1-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 8 216 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 217 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 218 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 219 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 220 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 221 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 222 // CHECK1: cond.true: 223 // CHECK1-NEXT: br label [[COND_END:%.*]] 224 // CHECK1: cond.false: 225 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 226 // CHECK1-NEXT: br label [[COND_END]] 227 // CHECK1: cond.end: 228 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 229 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 230 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 231 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 232 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 233 // CHECK1: omp.inner.for.cond: 234 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]] 235 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]] 236 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 237 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 238 // CHECK1: omp.inner.for.body: 239 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 240 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 241 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 242 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]] 243 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP4]] 244 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP4]], align 8, !llvm.access.group [[ACC_GRP4]] 245 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP4]] 246 // CHECK1-NEXT: store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP4]] 247 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP4]] 248 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 249 // CHECK1-NEXT: store ptr [[G2]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP4]] 250 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 251 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 8, !llvm.access.group [[ACC_GRP4]] 252 // CHECK1-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP4]] 253 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 254 // CHECK1-NEXT: store ptr [[SVAR5]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP4]] 255 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 256 // CHECK1-NEXT: store ptr [[SFVAR6]], ptr [[TMP18]], align 8, !llvm.access.group [[ACC_GRP4]] 257 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP4]] 258 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 259 // CHECK1: omp.body.continue: 260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 261 // CHECK1: omp.inner.for.inc: 262 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 263 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 264 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 265 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 266 // CHECK1: omp.inner.for.end: 267 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 268 // CHECK1: omp.loop.exit: 269 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]]) 270 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 271 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 272 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 273 // CHECK1: .omp.final.then: 274 // CHECK1-NEXT: store i32 2, ptr [[I]], align 4 275 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 276 // CHECK1: .omp.final.done: 277 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 278 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 279 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 280 // CHECK1: .omp.lastprivate.then: 281 // CHECK1-NEXT: [[TMP24:%.*]] = load double, ptr [[G2]], align 8 282 // CHECK1-NEXT: store volatile double [[TMP24]], ptr [[TMP0]], align 8 283 // CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP4]], align 8 284 // CHECK1-NEXT: [[TMP26:%.*]] = load double, ptr [[TMP25]], align 8 285 // CHECK1-NEXT: store volatile double [[TMP26]], ptr [[TMP4]], align 8 286 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[SVAR5]], align 4 287 // CHECK1-NEXT: store i32 [[TMP27]], ptr [[TMP2]], align 4 288 // CHECK1-NEXT: [[TMP28:%.*]] = load float, ptr [[SFVAR6]], align 4 289 // CHECK1-NEXT: store float [[TMP28]], ptr [[TMP3]], align 4 290 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 291 // CHECK1: .omp.lastprivate.done: 292 // CHECK1-NEXT: ret void 293 // 294 // 295 // CHECK3-LABEL: define {{[^@]+}}@main 296 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 297 // CHECK3-NEXT: entry: 298 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 299 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 300 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4 301 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 302 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 303 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4 304 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 305 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 306 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 307 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4 308 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4 309 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 310 // CHECK3-NEXT: ret i32 0 311 // 312 // 313 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67 314 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 315 // CHECK3-NEXT: entry: 316 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 317 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 318 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 319 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 320 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 321 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 322 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 323 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4 324 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 325 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 326 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 327 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 328 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 329 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 330 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 331 // CHECK3-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8 332 // CHECK3-NEXT: store double [[TMP2]], ptr [[G2]], align 8 333 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 334 // CHECK3-NEXT: [[TMP4:%.*]] = load double, ptr [[TMP3]], align 4 335 // CHECK3-NEXT: store double [[TMP4]], ptr [[G13]], align 8 336 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4 337 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4 338 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]]) 339 // CHECK3-NEXT: ret void 340 // 341 // 342 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined 343 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 344 // CHECK3-NEXT: entry: 345 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 346 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 347 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 348 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 349 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4 350 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 4 351 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 352 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 353 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 354 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 355 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 356 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 357 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 358 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 359 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 360 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4 361 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 362 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 363 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 364 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 365 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 366 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 367 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 368 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 369 // CHECK3-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4 370 // CHECK3-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 371 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 372 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 373 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4 374 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4 375 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 376 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 377 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 378 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 379 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 380 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 381 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4 382 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 383 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 384 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 385 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 386 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 387 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 388 // CHECK3: cond.true: 389 // CHECK3-NEXT: br label [[COND_END:%.*]] 390 // CHECK3: cond.false: 391 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 392 // CHECK3-NEXT: br label [[COND_END]] 393 // CHECK3: cond.end: 394 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 395 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 396 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 397 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 398 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 399 // CHECK3: omp.inner.for.cond: 400 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 401 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 402 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 403 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 404 // CHECK3: omp.inner.for.body: 405 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 406 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 407 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 408 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 409 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP5]] 410 // CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP5]] 411 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP5]] 412 // CHECK3-NEXT: store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP5]] 413 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP5]] 414 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 415 // CHECK3-NEXT: store ptr [[G2]], ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP5]] 416 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 417 // CHECK3-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP5]] 418 // CHECK3-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP5]] 419 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 420 // CHECK3-NEXT: store ptr [[SVAR5]], ptr [[TMP17]], align 4, !llvm.access.group [[ACC_GRP5]] 421 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 422 // CHECK3-NEXT: store ptr [[SFVAR6]], ptr [[TMP18]], align 4, !llvm.access.group [[ACC_GRP5]] 423 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP5]] 424 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 425 // CHECK3: omp.body.continue: 426 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 427 // CHECK3: omp.inner.for.inc: 428 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 429 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 430 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 431 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 432 // CHECK3: omp.inner.for.end: 433 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 434 // CHECK3: omp.loop.exit: 435 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]]) 436 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 437 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 438 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 439 // CHECK3: .omp.final.then: 440 // CHECK3-NEXT: store i32 2, ptr [[I]], align 4 441 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 442 // CHECK3: .omp.final.done: 443 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 444 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 445 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 446 // CHECK3: .omp.lastprivate.then: 447 // CHECK3-NEXT: [[TMP24:%.*]] = load double, ptr [[G2]], align 8 448 // CHECK3-NEXT: store volatile double [[TMP24]], ptr [[TMP0]], align 8 449 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP4]], align 4 450 // CHECK3-NEXT: [[TMP26:%.*]] = load double, ptr [[TMP25]], align 4 451 // CHECK3-NEXT: store volatile double [[TMP26]], ptr [[TMP4]], align 4 452 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[SVAR5]], align 4 453 // CHECK3-NEXT: store i32 [[TMP27]], ptr [[TMP2]], align 4 454 // CHECK3-NEXT: [[TMP28:%.*]] = load float, ptr [[SFVAR6]], align 4 455 // CHECK3-NEXT: store float [[TMP28]], ptr [[TMP3]], align 4 456 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 457 // CHECK3: .omp.lastprivate.done: 458 // CHECK3-NEXT: ret void 459 // 460 // 461 // CHECK5-LABEL: define {{[^@]+}}@main 462 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 463 // CHECK5-NEXT: entry: 464 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 465 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 466 // CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8 467 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 468 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 469 // CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8 470 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 471 // CHECK5-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 472 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 473 // CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8 474 // CHECK5-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8 475 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 476 // CHECK5-NEXT: ret i32 0 477 // 478 // 479 // CHECK7-LABEL: define {{[^@]+}}@main 480 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 481 // CHECK7-NEXT: entry: 482 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 483 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 484 // CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4 485 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 486 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4 487 // CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4 488 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 489 // CHECK7-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 490 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 491 // CHECK7-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4 492 // CHECK7-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4 493 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 494 // CHECK7-NEXT: ret i32 0 495 // 496 // 497 // CHECK9-LABEL: define {{[^@]+}}@main 498 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 499 // CHECK9-NEXT: entry: 500 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 501 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 502 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8 503 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 504 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 505 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 506 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 507 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 508 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 509 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 510 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 511 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 512 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 513 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 514 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 515 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 516 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 517 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 518 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8 519 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 520 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 521 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 522 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 523 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 524 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 525 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 526 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 527 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 528 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 529 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 530 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 531 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 532 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 533 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 534 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 535 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8 536 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8 537 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 538 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 539 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 540 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8 541 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 542 // CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8 543 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 544 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 8 545 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 546 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 8 547 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 548 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8 549 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 550 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 8 551 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 552 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 8 553 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 554 // CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8 555 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 556 // CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 8 557 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 558 // CHECK9-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 8 559 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 560 // CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8 561 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 562 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP20]], align 8 563 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 564 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP21]], align 8 565 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 566 // CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8 567 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 568 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 569 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 570 // CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4 571 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 572 // CHECK9-NEXT: store i32 5, ptr [[TMP26]], align 4 573 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 574 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 575 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 576 // CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 577 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 578 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 8 579 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 580 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 8 581 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 582 // CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8 583 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 584 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8 585 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 586 // CHECK9-NEXT: store i64 2, ptr [[TMP33]], align 8 587 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 588 // CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8 589 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 590 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 591 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 592 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4 593 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 594 // CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4 595 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]]) 596 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 597 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 598 // CHECK9: omp_offload.failed: 599 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]] 600 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 601 // CHECK9: omp_offload.cont: 602 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 603 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 604 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 605 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 606 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 607 // CHECK9: arraydestroy.body: 608 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 609 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 610 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 611 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 612 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 613 // CHECK9: arraydestroy.done2: 614 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 615 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4 616 // CHECK9-NEXT: ret i32 [[TMP41]] 617 // 618 // 619 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 620 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 621 // CHECK9-NEXT: entry: 622 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 623 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 624 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 625 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 626 // CHECK9-NEXT: ret void 627 // 628 // 629 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 630 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 631 // CHECK9-NEXT: entry: 632 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 633 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 634 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 635 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 636 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 637 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 638 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 639 // CHECK9-NEXT: ret void 640 // 641 // 642 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 643 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 644 // CHECK9-NEXT: entry: 645 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 646 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 647 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 648 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 649 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 650 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 651 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 652 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 653 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 654 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 655 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 656 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 657 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 658 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 659 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 660 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 661 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]]) 662 // CHECK9-NEXT: ret void 663 // 664 // 665 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined 666 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 667 // CHECK9-NEXT: entry: 668 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 669 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 670 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 671 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 672 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 673 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 674 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8 675 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 676 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 677 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 678 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 679 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 680 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 681 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 682 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 683 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 684 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 685 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 686 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 687 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 688 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 689 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 690 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 691 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 692 // CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 693 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 694 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 695 // CHECK9-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8 696 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 697 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 698 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 699 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 700 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8 701 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8 702 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 703 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 704 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 705 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 706 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 707 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 708 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 709 // CHECK9: arrayctor.loop: 710 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 711 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 712 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 713 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 714 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 715 // CHECK9: arrayctor.cont: 716 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 717 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 718 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 719 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 720 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 721 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 722 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 723 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 724 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 725 // CHECK9: cond.true: 726 // CHECK9-NEXT: br label [[COND_END:%.*]] 727 // CHECK9: cond.false: 728 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 729 // CHECK9-NEXT: br label [[COND_END]] 730 // CHECK9: cond.end: 731 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 732 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 733 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 734 // CHECK9-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 735 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 736 // CHECK9: omp.inner.for.cond: 737 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 738 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 739 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 740 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 741 // CHECK9: omp.inner.for.cond.cleanup: 742 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 743 // CHECK9: omp.inner.for.body: 744 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 745 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 746 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 747 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 748 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP5]] 749 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 750 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 751 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 752 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]] 753 // CHECK9-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP5]] 754 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 755 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64 756 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 757 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP16]], i64 4, i1 false), !llvm.access.group [[ACC_GRP5]] 758 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 759 // CHECK9: omp.body.continue: 760 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 761 // CHECK9: omp.inner.for.inc: 762 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 763 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1 764 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 765 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 766 // CHECK9: omp.inner.for.end: 767 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 768 // CHECK9: omp.loop.exit: 769 // CHECK9-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 770 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 771 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]]) 772 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 773 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 774 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 775 // CHECK9: .omp.final.then: 776 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 777 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 778 // CHECK9: .omp.final.done: 779 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 780 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 781 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 782 // CHECK9: .omp.lastprivate.then: 783 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[T_VAR2]], align 4 784 // CHECK9-NEXT: store i32 [[TMP25]], ptr [[TMP1]], align 4 785 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false) 786 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0 787 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2 788 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP26]] 789 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 790 // CHECK9: omp.arraycpy.body: 791 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 792 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 793 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 794 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 795 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 796 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]] 797 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 798 // CHECK9: omp.arraycpy.done13: 799 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP6]], align 8 800 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i64 4, i1 false) 801 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[SVAR7]], align 4 802 // CHECK9-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4 803 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 804 // CHECK9: .omp.lastprivate.done: 805 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 806 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 807 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2 808 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 809 // CHECK9: arraydestroy.body: 810 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 811 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 812 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 813 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 814 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 815 // CHECK9: arraydestroy.done15: 816 // CHECK9-NEXT: ret void 817 // 818 // 819 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 820 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 821 // CHECK9-NEXT: entry: 822 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 823 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 824 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 825 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 826 // CHECK9-NEXT: ret void 827 // 828 // 829 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 830 // CHECK9-SAME: () #[[ATTR1]] comdat { 831 // CHECK9-NEXT: entry: 832 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 833 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 834 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 835 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 836 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 837 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 838 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 839 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 840 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 841 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 842 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 843 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 844 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 845 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 846 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 847 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 848 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 849 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 850 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 851 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 852 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 853 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 854 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 855 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 856 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 857 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 858 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 859 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 860 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 861 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8 862 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 863 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8 864 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 865 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8 866 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 867 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 8 868 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 869 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 8 870 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 871 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 872 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 873 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8 874 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 875 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8 876 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 877 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 878 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 879 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8 880 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 881 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 8 882 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 883 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 884 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 885 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 886 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 887 // CHECK9-NEXT: store i32 3, ptr [[TMP20]], align 4 888 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 889 // CHECK9-NEXT: store i32 4, ptr [[TMP21]], align 4 890 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 891 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 8 892 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 893 // CHECK9-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 8 894 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 895 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 8 896 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 897 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8 898 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 899 // CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8 900 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 901 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8 902 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 903 // CHECK9-NEXT: store i64 2, ptr [[TMP28]], align 8 904 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 905 // CHECK9-NEXT: store i64 0, ptr [[TMP29]], align 8 906 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 907 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4 908 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 909 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 4 910 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 911 // CHECK9-NEXT: store i32 0, ptr [[TMP32]], align 4 912 // CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 913 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 914 // CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 915 // CHECK9: omp_offload.failed: 916 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 917 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 918 // CHECK9: omp_offload.cont: 919 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 920 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 921 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 922 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 923 // CHECK9: arraydestroy.body: 924 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 925 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 926 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 927 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 928 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 929 // CHECK9: arraydestroy.done2: 930 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 931 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4 932 // CHECK9-NEXT: ret i32 [[TMP36]] 933 // 934 // 935 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 936 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 937 // CHECK9-NEXT: entry: 938 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 939 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 940 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 941 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 942 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 943 // CHECK9-NEXT: ret void 944 // 945 // 946 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 947 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 948 // CHECK9-NEXT: entry: 949 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 950 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 951 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 952 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 953 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 954 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 955 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 956 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 957 // CHECK9-NEXT: ret void 958 // 959 // 960 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 961 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 962 // CHECK9-NEXT: entry: 963 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 964 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 965 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 966 // CHECK9-NEXT: ret void 967 // 968 // 969 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 970 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 971 // CHECK9-NEXT: entry: 972 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 973 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 974 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 975 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 976 // CHECK9-NEXT: ret void 977 // 978 // 979 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 980 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 981 // CHECK9-NEXT: entry: 982 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 983 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 984 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 985 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 986 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 987 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 988 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 989 // CHECK9-NEXT: ret void 990 // 991 // 992 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 993 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 994 // CHECK9-NEXT: entry: 995 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 996 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 997 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 998 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 999 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1000 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 1001 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 1002 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 1003 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 1004 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 1005 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 1006 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 1007 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 1008 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 1009 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]]) 1010 // CHECK9-NEXT: ret void 1011 // 1012 // 1013 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1014 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1015 // CHECK9-NEXT: entry: 1016 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1017 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1018 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 1019 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 1020 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 1021 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 1022 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1023 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1024 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1025 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1026 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1027 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1028 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1029 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1030 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1031 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1032 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1033 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 1034 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1035 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1036 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1037 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 1038 // CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 1039 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 1040 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 1041 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 1042 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 1043 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 1044 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 1045 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8 1046 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1047 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1048 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1049 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1050 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1051 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1052 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1053 // CHECK9: arrayctor.loop: 1054 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1055 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1056 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 1057 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1058 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1059 // CHECK9: arrayctor.cont: 1060 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 1061 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1062 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 1063 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1064 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1065 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1066 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1067 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 1068 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1069 // CHECK9: cond.true: 1070 // CHECK9-NEXT: br label [[COND_END:%.*]] 1071 // CHECK9: cond.false: 1072 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1073 // CHECK9-NEXT: br label [[COND_END]] 1074 // CHECK9: cond.end: 1075 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1076 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1077 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1078 // CHECK9-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 1079 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1080 // CHECK9: omp.inner.for.cond: 1081 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 1082 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 1083 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1084 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1085 // CHECK9: omp.inner.for.cond.cleanup: 1086 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1087 // CHECK9: omp.inner.for.body: 1088 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1089 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 1090 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1091 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1092 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP11]] 1093 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1094 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 1095 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 1096 // CHECK9-NEXT: store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]] 1097 // CHECK9-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP11]] 1098 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1099 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 1100 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1101 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group [[ACC_GRP11]] 1102 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1103 // CHECK9: omp.body.continue: 1104 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1105 // CHECK9: omp.inner.for.inc: 1106 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1107 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 1 1108 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1109 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1110 // CHECK9: omp.inner.for.end: 1111 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1112 // CHECK9: omp.loop.exit: 1113 // CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1114 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 1115 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]]) 1116 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1117 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1118 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1119 // CHECK9: .omp.final.then: 1120 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 1121 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1122 // CHECK9: .omp.final.done: 1123 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1124 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1125 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1126 // CHECK9: .omp.lastprivate.then: 1127 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[T_VAR2]], align 4 1128 // CHECK9-NEXT: store i32 [[TMP24]], ptr [[TMP1]], align 4 1129 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false) 1130 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0 1131 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2 1132 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP25]] 1133 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1134 // CHECK9: omp.arraycpy.body: 1135 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1136 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1137 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 1138 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1139 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1140 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]] 1141 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1142 // CHECK9: omp.arraycpy.done12: 1143 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP6]], align 8 1144 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP26]], i64 4, i1 false) 1145 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1146 // CHECK9: .omp.lastprivate.done: 1147 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1148 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1149 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2 1150 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1151 // CHECK9: arraydestroy.body: 1152 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1153 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1154 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1155 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1156 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1157 // CHECK9: arraydestroy.done14: 1158 // CHECK9-NEXT: ret void 1159 // 1160 // 1161 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1162 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1163 // CHECK9-NEXT: entry: 1164 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1165 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1166 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1167 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1168 // CHECK9-NEXT: ret void 1169 // 1170 // 1171 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1172 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1173 // CHECK9-NEXT: entry: 1174 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1175 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1176 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1177 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1178 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 1179 // CHECK9-NEXT: ret void 1180 // 1181 // 1182 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1183 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1184 // CHECK9-NEXT: entry: 1185 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1186 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1187 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1188 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1189 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1190 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1191 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1192 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1193 // CHECK9-NEXT: ret void 1194 // 1195 // 1196 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1197 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1198 // CHECK9-NEXT: entry: 1199 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1200 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1201 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1202 // CHECK9-NEXT: ret void 1203 // 1204 // 1205 // CHECK11-LABEL: define {{[^@]+}}@main 1206 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1207 // CHECK11-NEXT: entry: 1208 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1209 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1210 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4 1211 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1212 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1213 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1214 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1215 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1216 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1217 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1218 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1219 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 1220 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 1221 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 1222 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1223 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1224 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1225 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1226 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4 1227 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1228 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1229 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1230 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1231 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1232 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1233 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1234 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1235 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1236 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1237 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1238 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1239 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1240 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 1241 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 1242 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 1243 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4 1244 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4 1245 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1246 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 1247 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1248 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4 1249 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1250 // CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 4 1251 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1252 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 4 1253 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1254 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 4 1255 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1256 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 1257 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1258 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 4 1259 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1260 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 4 1261 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1262 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 1263 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1264 // CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 4 1265 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1266 // CHECK11-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 4 1267 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1268 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4 1269 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1270 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP20]], align 4 1271 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1272 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP21]], align 4 1273 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1274 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 1275 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1276 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1277 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1278 // CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 4 1279 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1280 // CHECK11-NEXT: store i32 5, ptr [[TMP26]], align 4 1281 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1282 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 1283 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1284 // CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 1285 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1286 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 4 1287 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1288 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 4 1289 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1290 // CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 4 1291 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1292 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 4 1293 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1294 // CHECK11-NEXT: store i64 2, ptr [[TMP33]], align 8 1295 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1296 // CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 8 1297 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1298 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 1299 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1300 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4 1301 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1302 // CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 4 1303 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.region_id, ptr [[KERNEL_ARGS]]) 1304 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 1305 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1306 // CHECK11: omp_offload.failed: 1307 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]] 1308 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1309 // CHECK11: omp_offload.cont: 1310 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1311 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1312 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1313 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1314 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1315 // CHECK11: arraydestroy.body: 1316 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1317 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1318 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1319 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1320 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1321 // CHECK11: arraydestroy.done2: 1322 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1323 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4 1324 // CHECK11-NEXT: ret i32 [[TMP41]] 1325 // 1326 // 1327 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1328 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1329 // CHECK11-NEXT: entry: 1330 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1331 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1332 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1333 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1334 // CHECK11-NEXT: ret void 1335 // 1336 // 1337 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1338 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1339 // CHECK11-NEXT: entry: 1340 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1341 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1342 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1343 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1344 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1345 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1346 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1347 // CHECK11-NEXT: ret void 1348 // 1349 // 1350 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 1351 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1352 // CHECK11-NEXT: entry: 1353 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1354 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1355 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1356 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1357 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1358 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1359 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1360 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1361 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1362 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1363 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 1364 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1365 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1366 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1367 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1368 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1369 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]]) 1370 // CHECK11-NEXT: ret void 1371 // 1372 // 1373 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined 1374 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1375 // CHECK11-NEXT: entry: 1376 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1377 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1378 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1379 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1380 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1381 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1382 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4 1383 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1384 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1385 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1386 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1387 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1388 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1389 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1390 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1391 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1392 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1393 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1394 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 1395 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1396 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1397 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1398 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1399 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1400 // CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1401 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1402 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1403 // CHECK11-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4 1404 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1405 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1406 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1407 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1408 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4 1409 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 4 1410 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1411 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1412 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1413 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1414 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1415 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1416 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1417 // CHECK11: arrayctor.loop: 1418 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1419 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1420 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1421 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1422 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1423 // CHECK11: arrayctor.cont: 1424 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1425 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1426 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 1427 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1428 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 1429 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1430 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1431 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1 1432 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1433 // CHECK11: cond.true: 1434 // CHECK11-NEXT: br label [[COND_END:%.*]] 1435 // CHECK11: cond.false: 1436 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1437 // CHECK11-NEXT: br label [[COND_END]] 1438 // CHECK11: cond.end: 1439 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 1440 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1441 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1442 // CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 1443 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1444 // CHECK11: omp.inner.for.cond: 1445 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1446 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 1447 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1448 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1449 // CHECK11: omp.inner.for.cond.cleanup: 1450 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1451 // CHECK11: omp.inner.for.body: 1452 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1453 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1 1454 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1455 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 1456 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP6]] 1457 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 1458 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP15]] 1459 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 1460 // CHECK11-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP6]] 1461 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 1462 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP17]] 1463 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP16]], i32 4, i1 false), !llvm.access.group [[ACC_GRP6]] 1464 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1465 // CHECK11: omp.body.continue: 1466 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1467 // CHECK11: omp.inner.for.inc: 1468 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1469 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1 1470 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1471 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1472 // CHECK11: omp.inner.for.end: 1473 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1474 // CHECK11: omp.loop.exit: 1475 // CHECK11-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1476 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 1477 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]]) 1478 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1479 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1480 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1481 // CHECK11: .omp.final.then: 1482 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1483 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1484 // CHECK11: .omp.final.done: 1485 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1486 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 1487 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1488 // CHECK11: .omp.lastprivate.then: 1489 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[T_VAR2]], align 4 1490 // CHECK11-NEXT: store i32 [[TMP25]], ptr [[TMP1]], align 4 1491 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false) 1492 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0 1493 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2 1494 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP26]] 1495 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1496 // CHECK11: omp.arraycpy.body: 1497 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1498 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1499 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1500 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1501 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1502 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]] 1503 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1504 // CHECK11: omp.arraycpy.done12: 1505 // CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP6]], align 4 1506 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i32 4, i1 false) 1507 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[SVAR7]], align 4 1508 // CHECK11-NEXT: store i32 [[TMP28]], ptr [[TMP4]], align 4 1509 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1510 // CHECK11: .omp.lastprivate.done: 1511 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1512 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1513 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2 1514 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1515 // CHECK11: arraydestroy.body: 1516 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1517 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1518 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1519 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1520 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1521 // CHECK11: arraydestroy.done14: 1522 // CHECK11-NEXT: ret void 1523 // 1524 // 1525 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1526 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1527 // CHECK11-NEXT: entry: 1528 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1529 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1530 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1531 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1532 // CHECK11-NEXT: ret void 1533 // 1534 // 1535 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1536 // CHECK11-SAME: () #[[ATTR1]] comdat { 1537 // CHECK11-NEXT: entry: 1538 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1539 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1540 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1541 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1542 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1543 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1544 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1545 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1546 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 1547 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 1548 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 1549 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1550 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1551 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1552 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1553 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1554 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1555 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1556 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1557 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1558 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1559 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1560 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1561 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1562 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1563 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1564 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 1565 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1566 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1567 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP6]], align 4 1568 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1569 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4 1570 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1571 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4 1572 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1573 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 4 1574 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1575 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 4 1576 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1577 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1578 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1579 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 4 1580 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1581 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 4 1582 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1583 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4 1584 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1585 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 4 1586 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1587 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 4 1588 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1589 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4 1590 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1591 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1592 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1593 // CHECK11-NEXT: store i32 3, ptr [[TMP20]], align 4 1594 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1595 // CHECK11-NEXT: store i32 4, ptr [[TMP21]], align 4 1596 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1597 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 4 1598 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1599 // CHECK11-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 4 1600 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1601 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 4 1602 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1603 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 4 1604 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1605 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4 1606 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1607 // CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 4 1608 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1609 // CHECK11-NEXT: store i64 2, ptr [[TMP28]], align 8 1610 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1611 // CHECK11-NEXT: store i64 0, ptr [[TMP29]], align 8 1612 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1613 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4 1614 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1615 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 4 1616 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1617 // CHECK11-NEXT: store i32 0, ptr [[TMP32]], align 4 1618 // CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 1619 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 1620 // CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1621 // CHECK11: omp_offload.failed: 1622 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 1623 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1624 // CHECK11: omp_offload.cont: 1625 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1626 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1627 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1628 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1629 // CHECK11: arraydestroy.body: 1630 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1631 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1632 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1633 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1634 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1635 // CHECK11: arraydestroy.done2: 1636 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1637 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4 1638 // CHECK11-NEXT: ret i32 [[TMP36]] 1639 // 1640 // 1641 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1642 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1643 // CHECK11-NEXT: entry: 1644 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1645 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1646 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1647 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1648 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1649 // CHECK11-NEXT: ret void 1650 // 1651 // 1652 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1653 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1654 // CHECK11-NEXT: entry: 1655 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1656 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1657 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1658 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1659 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1660 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1661 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1662 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1663 // CHECK11-NEXT: ret void 1664 // 1665 // 1666 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1667 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1668 // CHECK11-NEXT: entry: 1669 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1670 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1671 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1672 // CHECK11-NEXT: ret void 1673 // 1674 // 1675 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1676 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1677 // CHECK11-NEXT: entry: 1678 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1679 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1680 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1681 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1682 // CHECK11-NEXT: ret void 1683 // 1684 // 1685 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1686 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1687 // CHECK11-NEXT: entry: 1688 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1689 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1690 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1691 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1692 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1693 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1694 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1695 // CHECK11-NEXT: ret void 1696 // 1697 // 1698 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1699 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1700 // CHECK11-NEXT: entry: 1701 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1702 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1703 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1704 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1705 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1706 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1707 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1708 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1709 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1710 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1711 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1712 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1713 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1714 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1715 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]]) 1716 // CHECK11-NEXT: ret void 1717 // 1718 // 1719 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1720 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1721 // CHECK11-NEXT: entry: 1722 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1723 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1724 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1725 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1726 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1727 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1728 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1729 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1730 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1731 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1732 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1733 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1734 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1735 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1736 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1737 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1738 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1739 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 1740 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1741 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1742 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1743 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1744 // CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1745 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1746 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1747 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1748 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1749 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1750 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1751 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 4 1752 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1753 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1754 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1755 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1756 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1757 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1758 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1759 // CHECK11: arrayctor.loop: 1760 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1761 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1762 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1763 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1764 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1765 // CHECK11: arrayctor.cont: 1766 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 1767 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1768 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 1769 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1770 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1771 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1772 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1773 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1 1774 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1775 // CHECK11: cond.true: 1776 // CHECK11-NEXT: br label [[COND_END:%.*]] 1777 // CHECK11: cond.false: 1778 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1779 // CHECK11-NEXT: br label [[COND_END]] 1780 // CHECK11: cond.end: 1781 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1782 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1783 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1784 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 1785 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1786 // CHECK11: omp.inner.for.cond: 1787 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 1788 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 1789 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1790 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1791 // CHECK11: omp.inner.for.cond.cleanup: 1792 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1793 // CHECK11: omp.inner.for.body: 1794 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 1795 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 1796 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1797 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 1798 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP12]] 1799 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 1800 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP14]] 1801 // CHECK11-NEXT: store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 1802 // CHECK11-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP12]] 1803 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 1804 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP16]] 1805 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group [[ACC_GRP12]] 1806 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1807 // CHECK11: omp.body.continue: 1808 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1809 // CHECK11: omp.inner.for.inc: 1810 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 1811 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], 1 1812 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 1813 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 1814 // CHECK11: omp.inner.for.end: 1815 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1816 // CHECK11: omp.loop.exit: 1817 // CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1818 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 1819 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]]) 1820 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1821 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1822 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1823 // CHECK11: .omp.final.then: 1824 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1825 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1826 // CHECK11: .omp.final.done: 1827 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1828 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1829 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1830 // CHECK11: .omp.lastprivate.then: 1831 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[T_VAR2]], align 4 1832 // CHECK11-NEXT: store i32 [[TMP24]], ptr [[TMP1]], align 4 1833 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false) 1834 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0 1835 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2 1836 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP25]] 1837 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1838 // CHECK11: omp.arraycpy.body: 1839 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1840 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1841 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1842 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1843 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1844 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]] 1845 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 1846 // CHECK11: omp.arraycpy.done11: 1847 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP6]], align 4 1848 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP26]], i32 4, i1 false) 1849 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1850 // CHECK11: .omp.lastprivate.done: 1851 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1852 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1853 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2 1854 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1855 // CHECK11: arraydestroy.body: 1856 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1857 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1858 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1859 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 1860 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 1861 // CHECK11: arraydestroy.done13: 1862 // CHECK11-NEXT: ret void 1863 // 1864 // 1865 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1866 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1867 // CHECK11-NEXT: entry: 1868 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1869 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1870 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1871 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1872 // CHECK11-NEXT: ret void 1873 // 1874 // 1875 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1876 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1877 // CHECK11-NEXT: entry: 1878 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1879 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1880 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1881 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1882 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1883 // CHECK11-NEXT: ret void 1884 // 1885 // 1886 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1887 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1888 // CHECK11-NEXT: entry: 1889 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1890 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1891 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1892 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1893 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1894 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1895 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1896 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1897 // CHECK11-NEXT: ret void 1898 // 1899 // 1900 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1901 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1902 // CHECK11-NEXT: entry: 1903 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1904 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1905 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1906 // CHECK11-NEXT: ret void 1907 // 1908 // 1909 // CHECK13-LABEL: define {{[^@]+}}@main 1910 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 1911 // CHECK13-NEXT: entry: 1912 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1913 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 1914 // CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 8 1915 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1916 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1917 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1918 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1919 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 1920 // CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1921 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1922 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1923 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1924 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1925 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1926 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 1927 // CHECK13-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1928 // CHECK13-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1929 // CHECK13-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1930 // CHECK13-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4 1931 // CHECK13-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8 1932 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1933 // CHECK13-NEXT: [[I15:%.*]] = alloca i32, align 4 1934 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 1935 // CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 8 1936 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1937 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 1938 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 1939 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1940 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 1941 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1942 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 1943 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 1944 // CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 1945 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8 1946 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8 1947 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8 1948 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1949 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1950 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1951 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 1952 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 1953 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 1954 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1955 // CHECK13: arrayctor.loop: 1956 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1957 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1958 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 1959 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1960 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1961 // CHECK13: arrayctor.cont: 1962 // CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8 1963 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 1964 // CHECK13-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 8 1965 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1966 // CHECK13: omp.inner.for.cond: 1967 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 1968 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 1969 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1970 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1971 // CHECK13: omp.inner.for.cond.cleanup: 1972 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1973 // CHECK13: omp.inner.for.body: 1974 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1975 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1976 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1977 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1978 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP2]] 1979 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1980 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1981 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]] 1982 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 1983 // CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP2]] 1984 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1985 // CHECK13-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP11]] to i64 1986 // CHECK13-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM8]] 1987 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]] 1988 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1989 // CHECK13: omp.body.continue: 1990 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1991 // CHECK13: omp.inner.for.inc: 1992 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1993 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP12]], 1 1994 // CHECK13-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1995 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1996 // CHECK13: omp.inner.for.end: 1997 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 1998 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 4 1999 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2000 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i64 8, i1 false) 2001 // CHECK13-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2002 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2 2003 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP14]] 2004 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2005 // CHECK13: omp.arraycpy.body: 2006 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2007 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2008 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 2009 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2010 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2011 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2012 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2013 // CHECK13: omp.arraycpy.done12: 2014 // CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 8 2015 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false) 2016 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 4 2017 // CHECK13-NEXT: store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 4 2018 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3:[0-9]+]] 2019 // CHECK13-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 2020 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2 2021 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2022 // CHECK13: arraydestroy.body: 2023 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2024 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2025 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2026 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2027 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2028 // CHECK13: arraydestroy.done14: 2029 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 2030 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2031 // CHECK13-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2032 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i64 2 2033 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]] 2034 // CHECK13: arraydestroy.body17: 2035 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ] 2036 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1 2037 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]] 2038 // CHECK13-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]] 2039 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]] 2040 // CHECK13: arraydestroy.done21: 2041 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2042 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4 2043 // CHECK13-NEXT: ret i32 [[TMP19]] 2044 // 2045 // 2046 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2047 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 2048 // CHECK13-NEXT: entry: 2049 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2050 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2051 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2052 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2053 // CHECK13-NEXT: ret void 2054 // 2055 // 2056 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2057 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2058 // CHECK13-NEXT: entry: 2059 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2060 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2061 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2062 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2063 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2064 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2065 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2066 // CHECK13-NEXT: ret void 2067 // 2068 // 2069 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2070 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2071 // CHECK13-NEXT: entry: 2072 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2073 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2074 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2075 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2076 // CHECK13-NEXT: ret void 2077 // 2078 // 2079 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2080 // CHECK13-SAME: () #[[ATTR1]] comdat { 2081 // CHECK13-NEXT: entry: 2082 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2083 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2084 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2085 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2086 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2087 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 2088 // CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 8 2089 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 2090 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2091 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2092 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2093 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2094 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2095 // CHECK13-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2096 // CHECK13-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2097 // CHECK13-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2098 // CHECK13-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4 2099 // CHECK13-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8 2100 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2101 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 2102 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 2103 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 2104 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 2105 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 2106 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 2107 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 2108 // CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 2109 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8 2110 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8 2111 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8 2112 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2113 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2114 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2115 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 2116 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 2117 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 2118 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2119 // CHECK13: arrayctor.loop: 2120 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2121 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2122 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 2123 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2124 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2125 // CHECK13: arrayctor.cont: 2126 // CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8 2127 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 2128 // CHECK13-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 8 2129 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2130 // CHECK13: omp.inner.for.cond: 2131 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 2132 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 2133 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2134 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2135 // CHECK13: omp.inner.for.cond.cleanup: 2136 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2137 // CHECK13: omp.inner.for.body: 2138 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2139 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2140 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2141 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2142 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP6]] 2143 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2144 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2145 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]] 2146 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 2147 // CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP6]] 2148 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2149 // CHECK13-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP11]] to i64 2150 // CHECK13-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM8]] 2151 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]] 2152 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2153 // CHECK13: omp.body.continue: 2154 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2155 // CHECK13: omp.inner.for.inc: 2156 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2157 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP12]], 1 2158 // CHECK13-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2159 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2160 // CHECK13: omp.inner.for.end: 2161 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 2162 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 4 2163 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2164 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i64 8, i1 false) 2165 // CHECK13-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2166 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2 2167 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP14]] 2168 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2169 // CHECK13: omp.arraycpy.body: 2170 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2171 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2172 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 2173 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2174 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2175 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2176 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 2177 // CHECK13: omp.arraycpy.done12: 2178 // CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 8 2179 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false) 2180 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3]] 2181 // CHECK13-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 2182 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2 2183 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2184 // CHECK13: arraydestroy.body: 2185 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2186 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2187 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2188 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 2189 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 2190 // CHECK13: arraydestroy.done14: 2191 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 2192 // CHECK13-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2193 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i64 2 2194 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]] 2195 // CHECK13: arraydestroy.body16: 2196 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ] 2197 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1 2198 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]] 2199 // CHECK13-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]] 2200 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]] 2201 // CHECK13: arraydestroy.done20: 2202 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2203 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 4 2204 // CHECK13-NEXT: ret i32 [[TMP18]] 2205 // 2206 // 2207 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2208 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2209 // CHECK13-NEXT: entry: 2210 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2211 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2212 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2213 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2214 // CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2215 // CHECK13-NEXT: ret void 2216 // 2217 // 2218 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2219 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2220 // CHECK13-NEXT: entry: 2221 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2222 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2223 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2224 // CHECK13-NEXT: ret void 2225 // 2226 // 2227 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2228 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2229 // CHECK13-NEXT: entry: 2230 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2231 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2232 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2233 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2234 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2235 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2236 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2237 // CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 4 2238 // CHECK13-NEXT: ret void 2239 // 2240 // 2241 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2242 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2243 // CHECK13-NEXT: entry: 2244 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2245 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2246 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2247 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2248 // CHECK13-NEXT: ret void 2249 // 2250 // 2251 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2252 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2253 // CHECK13-NEXT: entry: 2254 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2255 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2256 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2257 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2258 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2259 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2260 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2261 // CHECK13-NEXT: ret void 2262 // 2263 // 2264 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2265 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2266 // CHECK13-NEXT: entry: 2267 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2268 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2269 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2270 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2271 // CHECK13-NEXT: ret void 2272 // 2273 // 2274 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2275 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2276 // CHECK13-NEXT: entry: 2277 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2278 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2279 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2280 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2281 // CHECK13-NEXT: store i32 0, ptr [[F]], align 4 2282 // CHECK13-NEXT: ret void 2283 // 2284 // 2285 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2286 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2287 // CHECK13-NEXT: entry: 2288 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2289 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2290 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2291 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2292 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2293 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2294 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2295 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2296 // CHECK13-NEXT: ret void 2297 // 2298 // 2299 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2300 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2301 // CHECK13-NEXT: entry: 2302 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2303 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2304 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2305 // CHECK13-NEXT: ret void 2306 // 2307 // 2308 // CHECK15-LABEL: define {{[^@]+}}@main 2309 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2310 // CHECK15-NEXT: entry: 2311 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2312 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 2313 // CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 4 2314 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2315 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2316 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2317 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2318 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2319 // CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 4 2320 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2321 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2322 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2323 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2324 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2325 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2326 // CHECK15-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2327 // CHECK15-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2328 // CHECK15-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 2329 // CHECK15-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4 2330 // CHECK15-NEXT: [[_TMP7:%.*]] = alloca ptr, align 4 2331 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2332 // CHECK15-NEXT: [[I14:%.*]] = alloca i32, align 4 2333 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2334 // CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 4 2335 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2336 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2337 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 2338 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 2339 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 2340 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2341 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2342 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 2343 // CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 2344 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4 2345 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4 2346 // CHECK15-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 4 2347 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2348 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2349 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2350 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 2351 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 2352 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 2353 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2354 // CHECK15: arrayctor.loop: 2355 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2356 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2357 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 2358 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2359 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2360 // CHECK15: arrayctor.cont: 2361 // CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 4 2362 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 2363 // CHECK15-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 4 2364 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2365 // CHECK15: omp.inner.for.cond: 2366 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 2367 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 2368 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2369 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2370 // CHECK15: omp.inner.for.cond.cleanup: 2371 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2372 // CHECK15: omp.inner.for.body: 2373 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2374 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2375 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2376 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2377 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP3]] 2378 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2379 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP9]] 2380 // CHECK15-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 2381 // CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP3]] 2382 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2383 // CHECK15-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP11]] 2384 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]] 2385 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2386 // CHECK15: omp.body.continue: 2387 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2388 // CHECK15: omp.inner.for.inc: 2389 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2390 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 1 2391 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2392 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2393 // CHECK15: omp.inner.for.end: 2394 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2395 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 4 2396 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2397 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i32 8, i1 false) 2398 // CHECK15-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2399 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2 2400 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]] 2401 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2402 // CHECK15: omp.arraycpy.body: 2403 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2404 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2405 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 2406 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2407 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2408 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2409 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2410 // CHECK15: omp.arraycpy.done11: 2411 // CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 4 2412 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false) 2413 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 4 2414 // CHECK15-NEXT: store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 4 2415 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3:[0-9]+]] 2416 // CHECK15-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 2417 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 2 2418 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2419 // CHECK15: arraydestroy.body: 2420 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2421 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2422 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2423 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2424 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2425 // CHECK15: arraydestroy.done13: 2426 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2427 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2428 // CHECK15-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2429 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i32 2 2430 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]] 2431 // CHECK15: arraydestroy.body16: 2432 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ] 2433 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1 2434 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]] 2435 // CHECK15-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]] 2436 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]] 2437 // CHECK15: arraydestroy.done20: 2438 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2439 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4 2440 // CHECK15-NEXT: ret i32 [[TMP19]] 2441 // 2442 // 2443 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2444 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2445 // CHECK15-NEXT: entry: 2446 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2447 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2448 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2449 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2450 // CHECK15-NEXT: ret void 2451 // 2452 // 2453 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2454 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2455 // CHECK15-NEXT: entry: 2456 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2457 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2458 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2459 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2460 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2461 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2462 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2463 // CHECK15-NEXT: ret void 2464 // 2465 // 2466 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2467 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2468 // CHECK15-NEXT: entry: 2469 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2470 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2471 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2472 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2473 // CHECK15-NEXT: ret void 2474 // 2475 // 2476 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2477 // CHECK15-SAME: () #[[ATTR1]] comdat { 2478 // CHECK15-NEXT: entry: 2479 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2480 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2481 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2482 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2483 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2484 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2485 // CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 4 2486 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2487 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 2488 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2489 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2490 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2491 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2492 // CHECK15-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 2493 // CHECK15-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 2494 // CHECK15-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 2495 // CHECK15-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4 2496 // CHECK15-NEXT: [[_TMP7:%.*]] = alloca ptr, align 4 2497 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2498 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2499 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 2500 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 2501 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 2502 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2503 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2504 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 2505 // CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 2506 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4 2507 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4 2508 // CHECK15-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 4 2509 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2510 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2511 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2512 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 2513 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 2514 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 2515 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2516 // CHECK15: arrayctor.loop: 2517 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2518 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2519 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 2520 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2521 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2522 // CHECK15: arrayctor.cont: 2523 // CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 4 2524 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) 2525 // CHECK15-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 4 2526 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2527 // CHECK15: omp.inner.for.cond: 2528 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 2529 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 2530 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2531 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2532 // CHECK15: omp.inner.for.cond.cleanup: 2533 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2534 // CHECK15: omp.inner.for.body: 2535 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2536 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2537 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2538 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2539 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP7]] 2540 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2541 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP9]] 2542 // CHECK15-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]] 2543 // CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP7]] 2544 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2545 // CHECK15-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP11]] 2546 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]] 2547 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2548 // CHECK15: omp.body.continue: 2549 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2550 // CHECK15: omp.inner.for.inc: 2551 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2552 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 1 2553 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2554 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2555 // CHECK15: omp.inner.for.end: 2556 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2557 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR3]], align 4 2558 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2559 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i32 8, i1 false) 2560 // CHECK15-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2561 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2 2562 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]] 2563 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2564 // CHECK15: omp.arraycpy.body: 2565 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2566 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2567 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 2568 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2569 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2570 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2571 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2572 // CHECK15: omp.arraycpy.done11: 2573 // CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 4 2574 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false) 2575 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3]] 2576 // CHECK15-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 2577 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2 2578 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2579 // CHECK15: arraydestroy.body: 2580 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2581 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2582 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2583 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2584 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2585 // CHECK15: arraydestroy.done13: 2586 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2587 // CHECK15-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2588 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i32 2 2589 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 2590 // CHECK15: arraydestroy.body15: 2591 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 2592 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1 2593 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]] 2594 // CHECK15-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 2595 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 2596 // CHECK15: arraydestroy.done19: 2597 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2598 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 4 2599 // CHECK15-NEXT: ret i32 [[TMP18]] 2600 // 2601 // 2602 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2603 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2604 // CHECK15-NEXT: entry: 2605 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2606 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2607 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2608 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2609 // CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2610 // CHECK15-NEXT: ret void 2611 // 2612 // 2613 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2614 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2615 // CHECK15-NEXT: entry: 2616 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2617 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2618 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2619 // CHECK15-NEXT: ret void 2620 // 2621 // 2622 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2623 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2624 // CHECK15-NEXT: entry: 2625 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2626 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2627 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2628 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2629 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2630 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2631 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2632 // CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 4 2633 // CHECK15-NEXT: ret void 2634 // 2635 // 2636 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2637 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2638 // CHECK15-NEXT: entry: 2639 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2640 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2641 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2642 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2643 // CHECK15-NEXT: ret void 2644 // 2645 // 2646 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2647 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2648 // CHECK15-NEXT: entry: 2649 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2650 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2651 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2652 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2653 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2654 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2655 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2656 // CHECK15-NEXT: ret void 2657 // 2658 // 2659 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2660 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2661 // CHECK15-NEXT: entry: 2662 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2663 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2664 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2665 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2666 // CHECK15-NEXT: ret void 2667 // 2668 // 2669 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2670 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2671 // CHECK15-NEXT: entry: 2672 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2673 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2674 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2675 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2676 // CHECK15-NEXT: store i32 0, ptr [[F]], align 4 2677 // CHECK15-NEXT: ret void 2678 // 2679 // 2680 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2681 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2682 // CHECK15-NEXT: entry: 2683 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2684 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2685 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2686 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2687 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2688 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2689 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2690 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2691 // CHECK15-NEXT: ret void 2692 // 2693 // 2694 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2695 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2696 // CHECK15-NEXT: entry: 2697 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2698 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2699 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2700 // CHECK15-NEXT: ret void 2701 // 2702