1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target 33 #pragma omp teams distribute reduction(+: t_var) 34 for (int i = 0; i < 2; ++i) { 35 t_var += (T) i; 36 } 37 return T(); 38 } 39 40 int main() { 41 static int sivar; 42 #ifdef LAMBDA 43 44 [&]() { 45 #pragma omp target 46 #pragma omp teams distribute reduction(+: sivar) 47 for (int i = 0; i < 2; ++i) { 48 49 // Skip global and bound tid vars 50 51 52 sivar += i; 53 54 [&]() { 55 56 sivar += 4; 57 58 }(); 59 } 60 }(); 61 return 0; 62 #else 63 #pragma omp target 64 #pragma omp teams distribute reduction(+: sivar) 65 for (int i = 0; i < 2; ++i) { 66 sivar += i; 67 } 68 return tmain<int>(); 69 #endif 70 } 71 72 73 74 75 // Skip global and bound tid vars 76 77 78 79 80 81 // Skip global and bound tid vars 82 83 84 #endif 85 // CHECK1-LABEL: define {{[^@]+}}@main 86 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 87 // CHECK1-NEXT: entry: 88 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 89 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 90 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 91 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 92 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 93 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 94 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 95 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 96 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4 97 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[SIVAR_CASTED]], align 4 98 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 99 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 100 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 101 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 102 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 103 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 104 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 105 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 106 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 107 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 108 // CHECK1-NEXT: store i32 3, ptr [[TMP7]], align 4 109 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 110 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 111 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 112 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 113 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 114 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 115 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 116 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8 117 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 118 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8 119 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 120 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 121 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 122 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 123 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 124 // CHECK1-NEXT: store i64 2, ptr [[TMP15]], align 8 125 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 126 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8 127 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 128 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 129 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 130 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 131 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 132 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4 133 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, ptr [[KERNEL_ARGS]]) 134 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 135 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 136 // CHECK1: omp_offload.failed: 137 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 138 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 139 // CHECK1: omp_offload.cont: 140 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 141 // CHECK1-NEXT: ret i32 [[CALL]] 142 // 143 // 144 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63 145 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 146 // CHECK1-NEXT: entry: 147 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 148 // CHECK1-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 149 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined, ptr [[SIVAR_ADDR]]) 150 // CHECK1-NEXT: ret void 151 // 152 // 153 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined 154 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 155 // CHECK1-NEXT: entry: 156 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 157 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 158 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 159 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 160 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 161 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 168 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 169 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 170 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 171 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 172 // CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4 173 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 174 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 175 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 176 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 177 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 178 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 179 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 180 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 181 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 182 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 183 // CHECK1: cond.true: 184 // CHECK1-NEXT: br label [[COND_END:%.*]] 185 // CHECK1: cond.false: 186 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 187 // CHECK1-NEXT: br label [[COND_END]] 188 // CHECK1: cond.end: 189 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 190 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 191 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 192 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 194 // CHECK1: omp.inner.for.cond: 195 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 196 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 197 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 198 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 199 // CHECK1: omp.inner.for.body: 200 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 201 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 202 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 203 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 204 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 205 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 206 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 207 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 208 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 209 // CHECK1: omp.body.continue: 210 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 211 // CHECK1: omp.inner.for.inc: 212 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 213 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 214 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 215 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 216 // CHECK1: omp.inner.for.end: 217 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 218 // CHECK1: omp.loop.exit: 219 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 220 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 221 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 8 222 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 223 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 224 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 225 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 226 // CHECK1-NEXT: ] 227 // CHECK1: .omp.reduction.case1: 228 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 229 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 230 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 231 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 232 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 233 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 234 // CHECK1: .omp.reduction.case2: 235 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 236 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 237 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 238 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 239 // CHECK1: .omp.reduction.default: 240 // CHECK1-NEXT: ret void 241 // 242 // 243 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined.omp.reduction.reduction_func 244 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 247 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 248 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 249 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 250 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 251 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 252 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 253 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 254 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 255 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 256 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 257 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 258 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 259 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 260 // CHECK1-NEXT: ret void 261 // 262 // 263 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 264 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 265 // CHECK1-NEXT: entry: 266 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 267 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 268 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 269 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 270 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 271 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 272 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 273 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 274 // CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4 275 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 276 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4 277 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4 278 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 279 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 280 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 281 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 282 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 283 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 284 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 285 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 286 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 287 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 288 // CHECK1-NEXT: store i32 3, ptr [[TMP7]], align 4 289 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 290 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 291 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 292 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 293 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 294 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 295 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 296 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP11]], align 8 297 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 298 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP12]], align 8 299 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 300 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 301 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 302 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 303 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 304 // CHECK1-NEXT: store i64 2, ptr [[TMP15]], align 8 305 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 306 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8 307 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 308 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 309 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 310 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 311 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 312 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4 313 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 314 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 315 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 316 // CHECK1: omp_offload.failed: 317 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]]) #[[ATTR2]] 318 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 319 // CHECK1: omp_offload.cont: 320 // CHECK1-NEXT: ret i32 0 321 // 322 // 323 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 324 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 325 // CHECK1-NEXT: entry: 326 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 327 // CHECK1-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 328 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[T_VAR_ADDR]]) 329 // CHECK1-NEXT: ret void 330 // 331 // 332 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 333 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 334 // CHECK1-NEXT: entry: 335 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 336 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 337 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 338 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 339 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 340 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 341 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 342 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 343 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 344 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 345 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 346 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 347 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 348 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 349 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 350 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 351 // CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 4 352 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 353 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 354 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 355 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 356 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 357 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 358 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 359 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 360 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 361 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 362 // CHECK1: cond.true: 363 // CHECK1-NEXT: br label [[COND_END:%.*]] 364 // CHECK1: cond.false: 365 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 366 // CHECK1-NEXT: br label [[COND_END]] 367 // CHECK1: cond.end: 368 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 369 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 370 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 371 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 372 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 373 // CHECK1: omp.inner.for.cond: 374 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 375 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 376 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 377 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 378 // CHECK1: omp.inner.for.body: 379 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 380 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 381 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 382 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 383 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 384 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 385 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 386 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 4 387 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 388 // CHECK1: omp.body.continue: 389 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 390 // CHECK1: omp.inner.for.inc: 391 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 392 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 393 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 394 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 395 // CHECK1: omp.inner.for.end: 396 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 397 // CHECK1: omp.loop.exit: 398 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 399 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 400 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 8 401 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 402 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 403 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 404 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 405 // CHECK1-NEXT: ] 406 // CHECK1: .omp.reduction.case1: 407 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 408 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4 409 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 410 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 411 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 412 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 413 // CHECK1: .omp.reduction.case2: 414 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4 415 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 416 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 417 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 418 // CHECK1: .omp.reduction.default: 419 // CHECK1-NEXT: ret void 420 // 421 // 422 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 423 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 424 // CHECK1-NEXT: entry: 425 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 426 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 427 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 428 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 429 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 430 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 431 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 432 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 433 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 434 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 435 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 436 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 437 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 438 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 439 // CHECK1-NEXT: ret void 440 // 441 // 442 // CHECK3-LABEL: define {{[^@]+}}@main 443 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 444 // CHECK3-NEXT: entry: 445 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 446 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 447 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 448 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 449 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 450 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 451 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 452 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 453 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4 454 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[SIVAR_CASTED]], align 4 455 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_CASTED]], align 4 456 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 457 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4 458 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 459 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4 460 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 461 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 462 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 463 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 464 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 465 // CHECK3-NEXT: store i32 3, ptr [[TMP7]], align 4 466 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 467 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 468 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 469 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 470 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 471 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4 472 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 473 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 4 474 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 475 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 4 476 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 477 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 478 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 479 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4 480 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 481 // CHECK3-NEXT: store i64 2, ptr [[TMP15]], align 8 482 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 483 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8 484 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 485 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 486 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 487 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 488 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 489 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4 490 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.region_id, ptr [[KERNEL_ARGS]]) 491 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 492 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 493 // CHECK3: omp_offload.failed: 494 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63(i32 [[TMP1]]) #[[ATTR2:[0-9]+]] 495 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 496 // CHECK3: omp_offload.cont: 497 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 498 // CHECK3-NEXT: ret i32 [[CALL]] 499 // 500 // 501 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63 502 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 503 // CHECK3-NEXT: entry: 504 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 505 // CHECK3-NEXT: store i32 [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 506 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined, ptr [[SIVAR_ADDR]]) 507 // CHECK3-NEXT: ret void 508 // 509 // 510 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined 511 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 512 // CHECK3-NEXT: entry: 513 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 514 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 515 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 516 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 517 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 518 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 519 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 520 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 521 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 522 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 523 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 524 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 525 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 526 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 527 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 528 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 529 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 530 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 531 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 532 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 533 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 534 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 535 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 536 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 537 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 538 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 539 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 540 // CHECK3: cond.true: 541 // CHECK3-NEXT: br label [[COND_END:%.*]] 542 // CHECK3: cond.false: 543 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 544 // CHECK3-NEXT: br label [[COND_END]] 545 // CHECK3: cond.end: 546 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 547 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 548 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 549 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 550 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 551 // CHECK3: omp.inner.for.cond: 552 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 553 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 554 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 555 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 556 // CHECK3: omp.inner.for.body: 557 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 558 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 559 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 560 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 561 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 562 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 563 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 564 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 565 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 566 // CHECK3: omp.body.continue: 567 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 568 // CHECK3: omp.inner.for.inc: 569 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 570 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 571 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 572 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 573 // CHECK3: omp.inner.for.end: 574 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 575 // CHECK3: omp.loop.exit: 576 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 577 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 578 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 4 579 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 580 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 581 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 582 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 583 // CHECK3-NEXT: ] 584 // CHECK3: .omp.reduction.case1: 585 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 586 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 587 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 588 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 589 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 590 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 591 // CHECK3: .omp.reduction.case2: 592 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 593 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 594 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 595 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 596 // CHECK3: .omp.reduction.default: 597 // CHECK3-NEXT: ret void 598 // 599 // 600 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l63.omp_outlined.omp.reduction.reduction_func 601 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 602 // CHECK3-NEXT: entry: 603 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 604 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 605 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 606 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 607 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 608 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 609 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 610 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 611 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 612 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 613 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 614 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 615 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 616 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 617 // CHECK3-NEXT: ret void 618 // 619 // 620 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 621 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 622 // CHECK3-NEXT: entry: 623 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 624 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 625 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 626 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 627 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 628 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 629 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 630 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 631 // CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4 632 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 633 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4 634 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4 635 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 636 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 637 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4 638 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 639 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4 640 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 641 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 642 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 643 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 644 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 645 // CHECK3-NEXT: store i32 3, ptr [[TMP7]], align 4 646 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 647 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 648 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 649 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 650 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 651 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4 652 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 653 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP11]], align 4 654 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 655 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP12]], align 4 656 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 657 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 658 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 659 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4 660 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 661 // CHECK3-NEXT: store i64 2, ptr [[TMP15]], align 8 662 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 663 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8 664 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 665 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 666 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 667 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 668 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 669 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4 670 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 671 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 672 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 673 // CHECK3: omp_offload.failed: 674 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]]) #[[ATTR2]] 675 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 676 // CHECK3: omp_offload.cont: 677 // CHECK3-NEXT: ret i32 0 678 // 679 // 680 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 681 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 682 // CHECK3-NEXT: entry: 683 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 684 // CHECK3-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 685 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[T_VAR_ADDR]]) 686 // CHECK3-NEXT: ret void 687 // 688 // 689 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 690 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 691 // CHECK3-NEXT: entry: 692 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 693 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 694 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 695 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 696 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 697 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 698 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 699 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 700 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 701 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 702 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 703 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 704 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 705 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 706 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 707 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 708 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 709 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 710 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 711 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 712 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 713 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 714 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 715 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 716 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 717 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 718 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 719 // CHECK3: cond.true: 720 // CHECK3-NEXT: br label [[COND_END:%.*]] 721 // CHECK3: cond.false: 722 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 723 // CHECK3-NEXT: br label [[COND_END]] 724 // CHECK3: cond.end: 725 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 726 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 727 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 728 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 729 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 730 // CHECK3: omp.inner.for.cond: 731 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 732 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 733 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 734 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 735 // CHECK3: omp.inner.for.body: 736 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 737 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 738 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 739 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 740 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 741 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 742 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 743 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 4 744 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 745 // CHECK3: omp.body.continue: 746 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 747 // CHECK3: omp.inner.for.inc: 748 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 749 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 750 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 751 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 752 // CHECK3: omp.inner.for.end: 753 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 754 // CHECK3: omp.loop.exit: 755 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 756 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 757 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 4 758 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 759 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 760 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 761 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 762 // CHECK3-NEXT: ] 763 // CHECK3: .omp.reduction.case1: 764 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 765 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4 766 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 767 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 768 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 769 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 770 // CHECK3: .omp.reduction.case2: 771 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4 772 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 773 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 774 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 775 // CHECK3: .omp.reduction.default: 776 // CHECK3-NEXT: ret void 777 // 778 // 779 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 780 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 781 // CHECK3-NEXT: entry: 782 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 783 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 784 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 785 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 786 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 787 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 788 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 789 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 790 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 791 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 792 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 793 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 794 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 795 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 796 // CHECK3-NEXT: ret void 797 // 798 // 799 // CHECK9-LABEL: define {{[^@]+}}@main 800 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 801 // CHECK9-NEXT: entry: 802 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 803 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 804 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 805 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 806 // CHECK9-NEXT: ret i32 0 807 // 808 // 809 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45 810 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 811 // CHECK9-NEXT: entry: 812 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 813 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 814 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined, ptr [[SIVAR_ADDR]]) 815 // CHECK9-NEXT: ret void 816 // 817 // 818 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined 819 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 820 // CHECK9-NEXT: entry: 821 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 822 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 823 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 824 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 825 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 826 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 827 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 828 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 829 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 830 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 831 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 832 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 833 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 834 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 835 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 836 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 837 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 838 // CHECK9-NEXT: store i32 0, ptr [[SIVAR1]], align 4 839 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 840 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 841 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 842 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 843 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 844 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 845 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 846 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 847 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 848 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 849 // CHECK9: cond.true: 850 // CHECK9-NEXT: br label [[COND_END:%.*]] 851 // CHECK9: cond.false: 852 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 853 // CHECK9-NEXT: br label [[COND_END]] 854 // CHECK9: cond.end: 855 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 856 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 857 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 858 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 859 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 860 // CHECK9: omp.inner.for.cond: 861 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 862 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 863 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 864 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 865 // CHECK9: omp.inner.for.body: 866 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 867 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 868 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 869 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 870 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 871 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 872 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 873 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 874 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 875 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 8 876 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 877 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 878 // CHECK9: omp.body.continue: 879 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 880 // CHECK9: omp.inner.for.inc: 881 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 882 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 883 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 884 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 885 // CHECK9: omp.inner.for.end: 886 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 887 // CHECK9: omp.loop.exit: 888 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 889 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 890 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 8 891 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 892 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 893 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 894 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 895 // CHECK9-NEXT: ] 896 // CHECK9: .omp.reduction.case1: 897 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 898 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 899 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 900 // CHECK9-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 901 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 902 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 903 // CHECK9: .omp.reduction.case2: 904 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 905 // CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4 906 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 907 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 908 // CHECK9: .omp.reduction.default: 909 // CHECK9-NEXT: ret void 910 // 911 // 912 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func 913 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 914 // CHECK9-NEXT: entry: 915 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 916 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 917 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 918 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 919 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 920 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 921 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 922 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 923 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 924 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 925 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 926 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 927 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 928 // CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 929 // CHECK9-NEXT: ret void 930 // 931