1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for simd 30 for(int i = 0; i < X; i++) { 31 a[i] = (T)0; 32 } 33 #pragma omp target 34 #pragma omp teams distribute parallel for simd dist_schedule(static) 35 for(int i = 0; i < X; i++) { 36 a[i] = (T)0; 37 } 38 #pragma omp target 39 #pragma omp teams distribute parallel for simd dist_schedule(static, X/2) 40 for(int i = 0; i < X; i++) { 41 a[i] = (T)0; 42 } 43 44 45 46 47 48 49 50 51 52 53 return a[0]; 54 } 55 }; 56 57 int teams_template_struct(void) { 58 SS<int, 123, 456> V; 59 return V.foo(); 60 61 } 62 63 64 #endif // CK1 65 66 // Test host codegen. 67 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 68 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 69 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 70 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 71 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 72 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 73 74 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 75 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 76 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 77 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 78 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 79 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 80 #ifdef CK2 81 82 template <typename T, int n> 83 int tmain(T argc) { 84 T a[n]; 85 int m = 10; 86 #pragma omp target 87 #pragma omp teams distribute parallel for simd 88 for(int i = 0; i < n; i++) { 89 a[i] = (T)0; 90 } 91 #pragma omp target 92 #pragma omp teams distribute parallel for simd dist_schedule(static) 93 for(int i = 0; i < n; i++) { 94 a[i] = (T)0; 95 } 96 #pragma omp target 97 #pragma omp teams distribute parallel for simd dist_schedule(static, m) 98 for(int i = 0; i < n; i++) { 99 a[i] = (T)0; 100 } 101 return 0; 102 } 103 104 int main (int argc, char **argv) { 105 int n = 100; 106 int a[n]; 107 int m = 10; 108 #pragma omp target 109 #pragma omp teams distribute parallel for simd 110 for(int i = 0; i < n; i++) { 111 a[i] = 0; 112 } 113 #pragma omp target 114 #pragma omp teams distribute parallel for simd dist_schedule(static) 115 for(int i = 0; i < n; i++) { 116 a[i] = 0; 117 } 118 #pragma omp target 119 #pragma omp teams distribute parallel for simd dist_schedule(static, m) 120 for(int i = 0; i < n; i++) { 121 a[i] = 0; 122 } 123 return tmain<int, 10>(argc); 124 } 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 #endif // CK2 148 #endif // #ifndef HEADER 149 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 150 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 151 // CHECK1-NEXT: entry: 152 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 153 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 154 // CHECK1-NEXT: ret i32 [[CALL]] 155 // 156 // 157 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 158 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 159 // CHECK1-NEXT: entry: 160 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 161 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 162 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 163 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 164 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 166 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8 167 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8 168 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8 169 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 171 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8 172 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8 173 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8 174 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 175 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 176 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 177 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 178 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 179 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 180 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 181 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 182 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 183 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 184 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 185 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 186 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 187 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 188 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 189 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 190 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 191 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 192 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 193 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 194 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 195 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 196 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 197 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 198 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 199 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 200 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 201 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 202 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 203 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 204 // CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8 205 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 206 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 207 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 208 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 209 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 210 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 211 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 212 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 213 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 214 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 215 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 216 // CHECK1: omp_offload.failed: 217 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 218 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 219 // CHECK1: omp_offload.cont: 220 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 221 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 222 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8 223 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 224 // CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8 225 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 226 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 227 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 228 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 229 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 230 // CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4 231 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 232 // CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4 233 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 234 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 235 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 236 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 237 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 238 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 239 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 240 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 241 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 242 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 243 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 244 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 245 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 246 // CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8 247 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 248 // CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8 249 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 250 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 251 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 252 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 253 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 254 // CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4 255 // CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, ptr [[KERNEL_ARGS7]]) 256 // CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 257 // CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 258 // CHECK1: omp_offload.failed8: 259 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(ptr [[THIS1]]) #[[ATTR2]] 260 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 261 // CHECK1: omp_offload.cont9: 262 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 263 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 264 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8 265 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 266 // CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8 267 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 268 // CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8 269 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 270 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 271 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 272 // CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4 273 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 274 // CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4 275 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 276 // CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 277 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 278 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 279 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 280 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 281 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 282 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 283 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 284 // CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8 285 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 286 // CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8 287 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 288 // CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8 289 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 290 // CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8 291 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 292 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 293 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 294 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 295 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 296 // CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4 297 // CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, ptr [[KERNEL_ARGS15]]) 298 // CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 299 // CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 300 // CHECK1: omp_offload.failed16: 301 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(ptr [[THIS1]]) #[[ATTR2]] 302 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]] 303 // CHECK1: omp_offload.cont17: 304 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 305 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i64 0, i64 0 306 // CHECK1-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 307 // CHECK1-NEXT: ret i32 [[TMP60]] 308 // 309 // 310 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 311 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 312 // CHECK1-NEXT: entry: 313 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 314 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 315 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 316 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 317 // CHECK1-NEXT: ret void 318 // 319 // 320 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 321 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 322 // CHECK1-NEXT: entry: 323 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 324 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 325 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 326 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 328 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 329 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 330 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 331 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 332 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 333 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 334 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 335 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 336 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 337 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 338 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 339 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 340 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 341 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 342 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 343 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 344 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 345 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 346 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 347 // CHECK1: cond.true: 348 // CHECK1-NEXT: br label [[COND_END:%.*]] 349 // CHECK1: cond.false: 350 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 351 // CHECK1-NEXT: br label [[COND_END]] 352 // CHECK1: cond.end: 353 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 354 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 355 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 356 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 358 // CHECK1: omp.inner.for.cond: 359 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 360 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 361 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 362 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 363 // CHECK1: omp.inner.for.body: 364 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]] 365 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 366 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 367 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 368 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP6]] 369 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 370 // CHECK1: omp.inner.for.inc: 371 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 372 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]] 373 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 374 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 375 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 376 // CHECK1: omp.inner.for.end: 377 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 378 // CHECK1: omp.loop.exit: 379 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 380 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 381 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 382 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 383 // CHECK1: .omp.final.then: 384 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 385 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 386 // CHECK1: .omp.final.done: 387 // CHECK1-NEXT: ret void 388 // 389 // 390 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined 391 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 392 // CHECK1-NEXT: entry: 393 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 394 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 395 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 396 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 397 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 398 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 406 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 407 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 408 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 409 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 410 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 411 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 412 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 413 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 414 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 415 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 416 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 417 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 418 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 419 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 420 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 421 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 422 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 423 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 424 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 425 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 426 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 427 // CHECK1: cond.true: 428 // CHECK1-NEXT: br label [[COND_END:%.*]] 429 // CHECK1: cond.false: 430 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 431 // CHECK1-NEXT: br label [[COND_END]] 432 // CHECK1: cond.end: 433 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 434 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 435 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 436 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 437 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 438 // CHECK1: omp.inner.for.cond: 439 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 440 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 441 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 442 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 443 // CHECK1: omp.inner.for.body: 444 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 445 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 446 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 447 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 448 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 449 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 450 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 451 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 452 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 453 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 454 // CHECK1: omp.body.continue: 455 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 456 // CHECK1: omp.inner.for.inc: 457 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 458 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 459 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 460 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 461 // CHECK1: omp.inner.for.end: 462 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 463 // CHECK1: omp.loop.exit: 464 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 465 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 466 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 467 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 468 // CHECK1: .omp.final.then: 469 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 470 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 471 // CHECK1: .omp.final.done: 472 // CHECK1-NEXT: ret void 473 // 474 // 475 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 476 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 477 // CHECK1-NEXT: entry: 478 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 479 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 480 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 481 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined, ptr [[TMP0]]) 482 // CHECK1-NEXT: ret void 483 // 484 // 485 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined 486 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 487 // CHECK1-NEXT: entry: 488 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 489 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 490 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 491 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 492 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 493 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 494 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 497 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 498 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 499 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 500 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 501 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 502 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 503 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 504 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 505 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 506 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 507 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 508 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 509 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 510 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 511 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 512 // CHECK1: cond.true: 513 // CHECK1-NEXT: br label [[COND_END:%.*]] 514 // CHECK1: cond.false: 515 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 516 // CHECK1-NEXT: br label [[COND_END]] 517 // CHECK1: cond.end: 518 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 519 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 520 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 521 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 522 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 523 // CHECK1: omp.inner.for.cond: 524 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 525 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 526 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 527 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 528 // CHECK1: omp.inner.for.body: 529 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP15]] 530 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 531 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 532 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 533 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP15]] 534 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 535 // CHECK1: omp.inner.for.inc: 536 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 537 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP15]] 538 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 539 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 540 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 541 // CHECK1: omp.inner.for.end: 542 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 543 // CHECK1: omp.loop.exit: 544 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 545 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 546 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 547 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 548 // CHECK1: .omp.final.then: 549 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 550 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 551 // CHECK1: .omp.final.done: 552 // CHECK1-NEXT: ret void 553 // 554 // 555 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined.omp_outlined 556 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 557 // CHECK1-NEXT: entry: 558 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 559 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 560 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 561 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 562 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 563 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 564 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 565 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 566 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 567 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 568 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 569 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 570 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 571 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 572 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 573 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 574 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 575 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 576 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 577 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 578 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 579 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 580 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 581 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 582 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 583 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 584 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 585 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 586 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 587 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 588 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 589 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 590 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 591 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 592 // CHECK1: cond.true: 593 // CHECK1-NEXT: br label [[COND_END:%.*]] 594 // CHECK1: cond.false: 595 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 596 // CHECK1-NEXT: br label [[COND_END]] 597 // CHECK1: cond.end: 598 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 599 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 600 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 601 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 602 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 603 // CHECK1: omp.inner.for.cond: 604 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 605 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 606 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 607 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 608 // CHECK1: omp.inner.for.body: 609 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 610 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 611 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 612 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 613 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 614 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 615 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 616 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 617 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 618 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 619 // CHECK1: omp.body.continue: 620 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 621 // CHECK1: omp.inner.for.inc: 622 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 623 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 624 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 625 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 626 // CHECK1: omp.inner.for.end: 627 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 628 // CHECK1: omp.loop.exit: 629 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 630 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 631 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 632 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 633 // CHECK1: .omp.final.then: 634 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 635 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 636 // CHECK1: .omp.final.done: 637 // CHECK1-NEXT: ret void 638 // 639 // 640 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 641 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 642 // CHECK1-NEXT: entry: 643 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 644 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 645 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 646 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined, ptr [[TMP0]]) 647 // CHECK1-NEXT: ret void 648 // 649 // 650 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined 651 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 652 // CHECK1-NEXT: entry: 653 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 654 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 655 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 656 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 657 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 658 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 659 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 660 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 661 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 662 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 663 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 664 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 665 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 666 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 667 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 668 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 669 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 670 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 671 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 672 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 673 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 674 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 675 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 676 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 677 // CHECK1: cond.true: 678 // CHECK1-NEXT: br label [[COND_END:%.*]] 679 // CHECK1: cond.false: 680 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 681 // CHECK1-NEXT: br label [[COND_END]] 682 // CHECK1: cond.end: 683 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 684 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 685 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 686 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 687 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 688 // CHECK1: omp.inner.for.cond: 689 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 690 // CHECK1-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 123 691 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 692 // CHECK1: omp.inner.for.body: 693 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP21]] 694 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 695 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 696 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 697 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP21]] 698 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 699 // CHECK1: omp.inner.for.inc: 700 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 701 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP21]] 702 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 703 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 704 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP21]] 705 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP21]] 706 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 707 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP21]] 708 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 709 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP21]] 710 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 711 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 712 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 713 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP17]], 122 714 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 715 // CHECK1: cond.true5: 716 // CHECK1-NEXT: br label [[COND_END7:%.*]] 717 // CHECK1: cond.false6: 718 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 719 // CHECK1-NEXT: br label [[COND_END7]] 720 // CHECK1: cond.end7: 721 // CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 122, [[COND_TRUE5]] ], [ [[TMP18]], [[COND_FALSE6]] ] 722 // CHECK1-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 723 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP21]] 724 // CHECK1-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 725 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 726 // CHECK1: omp.inner.for.end: 727 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 728 // CHECK1: omp.loop.exit: 729 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 730 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 731 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 732 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 733 // CHECK1: .omp.final.then: 734 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 735 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 736 // CHECK1: .omp.final.done: 737 // CHECK1-NEXT: ret void 738 // 739 // 740 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined.omp_outlined 741 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 742 // CHECK1-NEXT: entry: 743 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 744 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 745 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 746 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 747 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 748 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 749 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 750 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 751 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 752 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 753 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 754 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 755 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 756 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 757 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 758 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 759 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 760 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 761 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 762 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 763 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 764 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 765 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 766 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 767 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 768 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 769 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 770 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 771 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 772 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 773 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 774 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 775 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 776 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 777 // CHECK1: cond.true: 778 // CHECK1-NEXT: br label [[COND_END:%.*]] 779 // CHECK1: cond.false: 780 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 781 // CHECK1-NEXT: br label [[COND_END]] 782 // CHECK1: cond.end: 783 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 784 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 785 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 786 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 787 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 788 // CHECK1: omp.inner.for.cond: 789 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 790 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 791 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 792 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 793 // CHECK1: omp.inner.for.body: 794 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 795 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 796 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 797 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 798 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 799 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 800 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 801 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 802 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]] 803 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 804 // CHECK1: omp.body.continue: 805 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 806 // CHECK1: omp.inner.for.inc: 807 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 808 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 809 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 810 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 811 // CHECK1: omp.inner.for.end: 812 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 813 // CHECK1: omp.loop.exit: 814 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 815 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 816 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 817 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 818 // CHECK1: .omp.final.then: 819 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 820 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 821 // CHECK1: .omp.final.done: 822 // CHECK1-NEXT: ret void 823 // 824 // 825 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 826 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 827 // CHECK3-NEXT: entry: 828 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 829 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 830 // CHECK3-NEXT: ret i32 [[CALL]] 831 // 832 // 833 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 834 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 835 // CHECK3-NEXT: entry: 836 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 837 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 838 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 839 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 840 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 841 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 842 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4 843 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4 844 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4 845 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 846 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 847 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4 848 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4 849 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4 850 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 851 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 852 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 853 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 854 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 855 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 856 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 857 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 858 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 859 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 860 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 861 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 862 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 863 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 864 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 865 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 866 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 867 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 868 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 869 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 870 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 871 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 872 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 873 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 874 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 875 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 876 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 877 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 878 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 879 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 880 // CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 8 881 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 882 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 883 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 884 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 885 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 886 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 887 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 888 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 889 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 890 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 891 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 892 // CHECK3: omp_offload.failed: 893 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 894 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 895 // CHECK3: omp_offload.cont: 896 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 897 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 898 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4 899 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 900 // CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4 901 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 902 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4 903 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 904 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 905 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 906 // CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 4 907 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 908 // CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4 909 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 910 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 911 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 912 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 913 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 914 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 915 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 916 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 917 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 918 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 919 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 920 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4 921 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 922 // CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 8 923 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 924 // CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8 925 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 926 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 927 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 928 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 929 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 930 // CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4 931 // CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, ptr [[KERNEL_ARGS7]]) 932 // CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 933 // CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 934 // CHECK3: omp_offload.failed8: 935 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(ptr [[THIS1]]) #[[ATTR2]] 936 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]] 937 // CHECK3: omp_offload.cont9: 938 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 939 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 940 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4 941 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 942 // CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4 943 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 944 // CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4 945 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 946 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 947 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 948 // CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 4 949 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 950 // CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4 951 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 952 // CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 953 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 954 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 955 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 956 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 957 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 958 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 959 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 960 // CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4 961 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 962 // CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4 963 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 964 // CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 8 965 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 966 // CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8 967 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 968 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 969 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 970 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 971 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 972 // CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4 973 // CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, ptr [[KERNEL_ARGS15]]) 974 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 975 // CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 976 // CHECK3: omp_offload.failed16: 977 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(ptr [[THIS1]]) #[[ATTR2]] 978 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 979 // CHECK3: omp_offload.cont17: 980 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 981 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i32 0, i32 0 982 // CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 983 // CHECK3-NEXT: ret i32 [[TMP60]] 984 // 985 // 986 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 987 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 988 // CHECK3-NEXT: entry: 989 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 990 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 991 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 992 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 993 // CHECK3-NEXT: ret void 994 // 995 // 996 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 997 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 998 // CHECK3-NEXT: entry: 999 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1000 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1001 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1002 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1003 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1004 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1005 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1006 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1007 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1008 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1009 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1010 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1011 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1012 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1013 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1014 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1015 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1016 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1017 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1018 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1019 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1020 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1021 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1022 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1023 // CHECK3: cond.true: 1024 // CHECK3-NEXT: br label [[COND_END:%.*]] 1025 // CHECK3: cond.false: 1026 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1027 // CHECK3-NEXT: br label [[COND_END]] 1028 // CHECK3: cond.end: 1029 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1030 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1031 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1032 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1033 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1034 // CHECK3: omp.inner.for.cond: 1035 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 1036 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 1037 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1038 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1039 // CHECK3: omp.inner.for.body: 1040 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP7]] 1041 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 1042 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP7]] 1043 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1044 // CHECK3: omp.inner.for.inc: 1045 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 1046 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP7]] 1047 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1048 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 1049 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 1050 // CHECK3: omp.inner.for.end: 1051 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1052 // CHECK3: omp.loop.exit: 1053 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1054 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1055 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1056 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1057 // CHECK3: .omp.final.then: 1058 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1059 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1060 // CHECK3: .omp.final.done: 1061 // CHECK3-NEXT: ret void 1062 // 1063 // 1064 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined 1065 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1066 // CHECK3-NEXT: entry: 1067 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1068 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1069 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1070 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1071 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1072 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1073 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1074 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1075 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1076 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1077 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1078 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1079 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1080 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1081 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1082 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1083 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1084 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1085 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1086 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1087 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1088 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1089 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1090 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1091 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1092 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1093 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1094 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1095 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1096 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1097 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1098 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1099 // CHECK3: cond.true: 1100 // CHECK3-NEXT: br label [[COND_END:%.*]] 1101 // CHECK3: cond.false: 1102 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1103 // CHECK3-NEXT: br label [[COND_END]] 1104 // CHECK3: cond.end: 1105 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1106 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1107 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1108 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1109 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1110 // CHECK3: omp.inner.for.cond: 1111 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 1112 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 1113 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1114 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1115 // CHECK3: omp.inner.for.body: 1116 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1117 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1118 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1119 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1120 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1121 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1122 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1123 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]] 1124 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1125 // CHECK3: omp.body.continue: 1126 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1127 // CHECK3: omp.inner.for.inc: 1128 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1129 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1130 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1131 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1132 // CHECK3: omp.inner.for.end: 1133 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1134 // CHECK3: omp.loop.exit: 1135 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1136 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1137 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1138 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1139 // CHECK3: .omp.final.then: 1140 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1141 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1142 // CHECK3: .omp.final.done: 1143 // CHECK3-NEXT: ret void 1144 // 1145 // 1146 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33 1147 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1148 // CHECK3-NEXT: entry: 1149 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1150 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1151 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1152 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined, ptr [[TMP0]]) 1153 // CHECK3-NEXT: ret void 1154 // 1155 // 1156 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined 1157 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1158 // CHECK3-NEXT: entry: 1159 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1160 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1161 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1162 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1163 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1164 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1165 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1166 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1167 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1168 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1169 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1170 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1171 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1172 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1173 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1174 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1175 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1176 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1177 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1178 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1179 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1180 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1181 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1182 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1183 // CHECK3: cond.true: 1184 // CHECK3-NEXT: br label [[COND_END:%.*]] 1185 // CHECK3: cond.false: 1186 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1187 // CHECK3-NEXT: br label [[COND_END]] 1188 // CHECK3: cond.end: 1189 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1190 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1191 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1192 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1193 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1194 // CHECK3: omp.inner.for.cond: 1195 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 1196 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 1197 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1198 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1199 // CHECK3: omp.inner.for.body: 1200 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP16]] 1201 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 1202 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP16]] 1203 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1204 // CHECK3: omp.inner.for.inc: 1205 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 1206 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP16]] 1207 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1208 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 1209 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 1210 // CHECK3: omp.inner.for.end: 1211 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1212 // CHECK3: omp.loop.exit: 1213 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1214 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1215 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1216 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1217 // CHECK3: .omp.final.then: 1218 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1219 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1220 // CHECK3: .omp.final.done: 1221 // CHECK3-NEXT: ret void 1222 // 1223 // 1224 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined.omp_outlined 1225 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1226 // CHECK3-NEXT: entry: 1227 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1228 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1229 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1230 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1231 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1232 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1233 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1234 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1235 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1236 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1237 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1238 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1239 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1240 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1241 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1242 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1243 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1244 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1245 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1246 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1247 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1248 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1249 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1250 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1251 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1252 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1253 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1254 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1255 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1256 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1257 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1258 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1259 // CHECK3: cond.true: 1260 // CHECK3-NEXT: br label [[COND_END:%.*]] 1261 // CHECK3: cond.false: 1262 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1263 // CHECK3-NEXT: br label [[COND_END]] 1264 // CHECK3: cond.end: 1265 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1266 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1267 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1268 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1269 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1270 // CHECK3: omp.inner.for.cond: 1271 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 1272 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 1273 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1274 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1275 // CHECK3: omp.inner.for.body: 1276 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 1277 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1278 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1279 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]] 1280 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1281 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]] 1282 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1283 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]] 1284 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1285 // CHECK3: omp.body.continue: 1286 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1287 // CHECK3: omp.inner.for.inc: 1288 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 1289 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1290 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 1291 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 1292 // CHECK3: omp.inner.for.end: 1293 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1294 // CHECK3: omp.loop.exit: 1295 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1296 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1297 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1298 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1299 // CHECK3: .omp.final.then: 1300 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1301 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1302 // CHECK3: .omp.final.done: 1303 // CHECK3-NEXT: ret void 1304 // 1305 // 1306 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38 1307 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1308 // CHECK3-NEXT: entry: 1309 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1310 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1311 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1312 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined, ptr [[TMP0]]) 1313 // CHECK3-NEXT: ret void 1314 // 1315 // 1316 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined 1317 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1318 // CHECK3-NEXT: entry: 1319 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1320 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1321 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1322 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1323 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1324 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1325 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1326 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1327 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1328 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1329 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1330 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1331 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1332 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1333 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1334 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1335 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1336 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1337 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1338 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1339 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 1340 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1341 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1342 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1343 // CHECK3: cond.true: 1344 // CHECK3-NEXT: br label [[COND_END:%.*]] 1345 // CHECK3: cond.false: 1346 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1347 // CHECK3-NEXT: br label [[COND_END]] 1348 // CHECK3: cond.end: 1349 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1350 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1351 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1352 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1353 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1354 // CHECK3: omp.inner.for.cond: 1355 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 1356 // CHECK3-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 123 1357 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1358 // CHECK3: omp.inner.for.body: 1359 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP22]] 1360 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1361 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP22]] 1362 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1363 // CHECK3: omp.inner.for.inc: 1364 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 1365 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP22]] 1366 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1367 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 1368 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP22]] 1369 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP22]] 1370 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1371 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP22]] 1372 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1373 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP22]] 1374 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1375 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1376 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1377 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP15]], 122 1378 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 1379 // CHECK3: cond.true5: 1380 // CHECK3-NEXT: br label [[COND_END7:%.*]] 1381 // CHECK3: cond.false6: 1382 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1383 // CHECK3-NEXT: br label [[COND_END7]] 1384 // CHECK3: cond.end7: 1385 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 122, [[COND_TRUE5]] ], [ [[TMP16]], [[COND_FALSE6]] ] 1386 // CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1387 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP22]] 1388 // CHECK3-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 1389 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 1390 // CHECK3: omp.inner.for.end: 1391 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1392 // CHECK3: omp.loop.exit: 1393 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1394 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1395 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1396 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1397 // CHECK3: .omp.final.then: 1398 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1399 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1400 // CHECK3: .omp.final.done: 1401 // CHECK3-NEXT: ret void 1402 // 1403 // 1404 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined.omp_outlined 1405 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1406 // CHECK3-NEXT: entry: 1407 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1408 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1409 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1410 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1411 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1412 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1413 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1414 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1415 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1416 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1417 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1418 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1419 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1420 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1421 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1422 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1423 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1424 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1425 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1426 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1427 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1428 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1429 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1430 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1431 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1432 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1433 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1434 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1435 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1436 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1437 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1438 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1439 // CHECK3: cond.true: 1440 // CHECK3-NEXT: br label [[COND_END:%.*]] 1441 // CHECK3: cond.false: 1442 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1443 // CHECK3-NEXT: br label [[COND_END]] 1444 // CHECK3: cond.end: 1445 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1446 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1447 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1448 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1449 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1450 // CHECK3: omp.inner.for.cond: 1451 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 1452 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1453 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1454 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1455 // CHECK3: omp.inner.for.body: 1456 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 1457 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1458 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1459 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 1460 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1461 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 1462 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1463 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 1464 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1465 // CHECK3: omp.body.continue: 1466 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1467 // CHECK3: omp.inner.for.inc: 1468 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 1469 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1470 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 1471 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 1472 // CHECK3: omp.inner.for.end: 1473 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1474 // CHECK3: omp.loop.exit: 1475 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1476 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1477 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1478 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1479 // CHECK3: .omp.final.then: 1480 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1481 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1482 // CHECK3: .omp.final.done: 1483 // CHECK3-NEXT: ret void 1484 // 1485 // 1486 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1487 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1488 // CHECK5-NEXT: entry: 1489 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1490 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 1491 // CHECK5-NEXT: ret i32 [[CALL]] 1492 // 1493 // 1494 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1495 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 1496 // CHECK5-NEXT: entry: 1497 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1498 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1499 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1500 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1501 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1502 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1503 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1504 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1505 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1506 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1507 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4 1508 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1509 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 1510 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 1511 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1512 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1513 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1514 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1515 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1516 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1517 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1518 // CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 1519 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1520 // CHECK5: omp.inner.for.cond: 1521 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 1522 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 1523 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1524 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1525 // CHECK5: omp.inner.for.body: 1526 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1527 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1528 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1529 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1530 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1531 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1532 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 1533 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 1534 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 1535 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1536 // CHECK5: omp.body.continue: 1537 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1538 // CHECK5: omp.inner.for.inc: 1539 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1540 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1541 // CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1542 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1543 // CHECK5: omp.inner.for.end: 1544 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 1545 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 4 1546 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 4 1547 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4 1548 // CHECK5-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4 1549 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1550 // CHECK5: omp.inner.for.cond8: 1551 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1552 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]] 1553 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1554 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 1555 // CHECK5: omp.inner.for.body10: 1556 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 1557 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1558 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1559 // CHECK5-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]] 1560 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1561 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]] 1562 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 1563 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i64 0, i64 [[IDXPROM14]] 1564 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP6]] 1565 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 1566 // CHECK5: omp.body.continue16: 1567 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 1568 // CHECK5: omp.inner.for.inc17: 1569 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 1570 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 1571 // CHECK5-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 1572 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 1573 // CHECK5: omp.inner.for.end19: 1574 // CHECK5-NEXT: store i32 123, ptr [[I7]], align 4 1575 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB21]], align 4 1576 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB22]], align 4 1577 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4 1578 // CHECK5-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV23]], align 4 1579 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 1580 // CHECK5: omp.inner.for.cond25: 1581 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 1582 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP9]] 1583 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1584 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1585 // CHECK5: omp.inner.for.body27: 1586 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 1587 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 1588 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 1589 // CHECK5-NEXT: store i32 [[ADD29]], ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]] 1590 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1591 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]] 1592 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 1593 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], ptr [[A30]], i64 0, i64 [[IDXPROM31]] 1594 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP9]] 1595 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1596 // CHECK5: omp.body.continue33: 1597 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1598 // CHECK5: omp.inner.for.inc34: 1599 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 1600 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 1601 // CHECK5-NEXT: store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 1602 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 1603 // CHECK5: omp.inner.for.end36: 1604 // CHECK5-NEXT: store i32 123, ptr [[I24]], align 4 1605 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1606 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], ptr [[A37]], i64 0, i64 0 1607 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX38]], align 4 1608 // CHECK5-NEXT: ret i32 [[TMP18]] 1609 // 1610 // 1611 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1612 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1613 // CHECK7-NEXT: entry: 1614 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1615 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 1616 // CHECK7-NEXT: ret i32 [[CALL]] 1617 // 1618 // 1619 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1620 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1621 // CHECK7-NEXT: entry: 1622 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1623 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1624 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1625 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1626 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1627 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1628 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1629 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1630 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1631 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1632 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4 1633 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1634 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1635 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1636 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1637 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4 1638 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1639 // CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1640 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1641 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1642 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1643 // CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 1644 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1645 // CHECK7: omp.inner.for.cond: 1646 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 1647 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 1648 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1649 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1650 // CHECK7: omp.inner.for.body: 1651 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1652 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1653 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1654 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 1655 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1656 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 1657 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 1658 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 1659 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1660 // CHECK7: omp.body.continue: 1661 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1662 // CHECK7: omp.inner.for.inc: 1663 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1664 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1665 // CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1666 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1667 // CHECK7: omp.inner.for.end: 1668 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 1669 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 4 1670 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 4 1671 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4 1672 // CHECK7-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4 1673 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1674 // CHECK7: omp.inner.for.cond8: 1675 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 1676 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP7]] 1677 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1678 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 1679 // CHECK7: omp.inner.for.body10: 1680 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 1681 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1682 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1683 // CHECK7-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]] 1684 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1685 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]] 1686 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i32 0, i32 [[TMP10]] 1687 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP7]] 1688 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 1689 // CHECK7: omp.body.continue15: 1690 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 1691 // CHECK7: omp.inner.for.inc16: 1692 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 1693 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 1694 // CHECK7-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 1695 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 1696 // CHECK7: omp.inner.for.end18: 1697 // CHECK7-NEXT: store i32 123, ptr [[I7]], align 4 1698 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB20]], align 4 1699 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB21]], align 4 1700 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB20]], align 4 1701 // CHECK7-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV22]], align 4 1702 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 1703 // CHECK7: omp.inner.for.cond24: 1704 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 1705 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB21]], align 4, !llvm.access.group [[ACC_GRP10]] 1706 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1707 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 1708 // CHECK7: omp.inner.for.body26: 1709 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 1710 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 1711 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 1712 // CHECK7-NEXT: store i32 [[ADD28]], ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]] 1713 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1714 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]] 1715 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], ptr [[A29]], i32 0, i32 [[TMP16]] 1716 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX30]], align 4, !llvm.access.group [[ACC_GRP10]] 1717 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 1718 // CHECK7: omp.body.continue31: 1719 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 1720 // CHECK7: omp.inner.for.inc32: 1721 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 1722 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 1723 // CHECK7-NEXT: store i32 [[ADD33]], ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 1724 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 1725 // CHECK7: omp.inner.for.end34: 1726 // CHECK7-NEXT: store i32 123, ptr [[I23]], align 4 1727 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1728 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], ptr [[A35]], i32 0, i32 0 1729 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX36]], align 4 1730 // CHECK7-NEXT: ret i32 [[TMP18]] 1731 // 1732 // 1733 // CHECK9-LABEL: define {{[^@]+}}@main 1734 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1735 // CHECK9-NEXT: entry: 1736 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1737 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1738 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 1739 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1740 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 1741 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1742 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 1743 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1744 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 1745 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 1746 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 1747 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1748 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1749 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1750 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1751 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1752 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1753 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8 1754 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8 1755 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8 1756 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8 1757 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1758 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1759 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1760 // CHECK9-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1761 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 1762 // CHECK9-NEXT: [[N_CASTED18:%.*]] = alloca i64, align 8 1763 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 8 1764 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 8 1765 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 8 1766 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 8 1767 // CHECK9-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 1768 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 1769 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 1770 // CHECK9-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1771 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 1772 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1773 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 1774 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4 1775 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 1776 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1777 // CHECK9-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 1778 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 1779 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1780 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 1781 // CHECK9-NEXT: store i32 10, ptr [[M]], align 4 1782 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 1783 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 1784 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 1785 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1786 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false) 1787 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1788 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8 1789 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1790 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8 1791 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1792 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8 1793 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1794 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 1795 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1796 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8 1797 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1798 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 1799 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1800 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 1801 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1802 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8 1803 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1804 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8 1805 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1806 // CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8 1807 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1808 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1809 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1810 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 1811 // CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 1812 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1813 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 1814 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1815 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1816 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1817 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1818 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 1819 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 1820 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1821 // CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4 1822 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1823 // CHECK9-NEXT: store i32 3, ptr [[TMP24]], align 4 1824 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1825 // CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8 1826 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1827 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8 1828 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1829 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8 1830 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1831 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 1832 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1833 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 1834 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1835 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8 1836 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1837 // CHECK9-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 1838 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1839 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8 1840 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1841 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 1842 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1843 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 1844 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1845 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4 1846 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.region_id, ptr [[KERNEL_ARGS]]) 1847 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1848 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1849 // CHECK9: omp_offload.failed: 1850 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 1851 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1852 // CHECK9: omp_offload.cont: 1853 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 1854 // CHECK9-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 1855 // CHECK9-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 1856 // CHECK9-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4 1857 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false) 1858 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1859 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8 1860 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1861 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8 1862 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 1863 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8 1864 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 1865 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8 1866 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 1867 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8 1868 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 1869 // CHECK9-NEXT: store ptr null, ptr [[TMP46]], align 8 1870 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 1871 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8 1872 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 1873 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8 1874 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 1875 // CHECK9-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8 1876 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 1877 // CHECK9-NEXT: store ptr null, ptr [[TMP50]], align 8 1878 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1879 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1880 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 1881 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 1882 // CHECK9-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4 1883 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 1884 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0 1885 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1886 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1887 // CHECK9-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 1888 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 1889 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1 1890 // CHECK9-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64 1891 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 1892 // CHECK9-NEXT: store i32 3, ptr [[TMP58]], align 4 1893 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 1894 // CHECK9-NEXT: store i32 3, ptr [[TMP59]], align 4 1895 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 1896 // CHECK9-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8 1897 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 1898 // CHECK9-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8 1899 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 1900 // CHECK9-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8 1901 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 1902 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8 1903 // CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 1904 // CHECK9-NEXT: store ptr null, ptr [[TMP64]], align 8 1905 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 1906 // CHECK9-NEXT: store ptr null, ptr [[TMP65]], align 8 1907 // CHECK9-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 1908 // CHECK9-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8 1909 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 1910 // CHECK9-NEXT: store i64 0, ptr [[TMP67]], align 8 1911 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 1912 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4 1913 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 1914 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 1915 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 1916 // CHECK9-NEXT: store i32 0, ptr [[TMP70]], align 4 1917 // CHECK9-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.region_id, ptr [[KERNEL_ARGS15]]) 1918 // CHECK9-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 1919 // CHECK9-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1920 // CHECK9: omp_offload.failed16: 1921 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 1922 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1923 // CHECK9: omp_offload.cont17: 1924 // CHECK9-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 4 1925 // CHECK9-NEXT: store i32 [[TMP73]], ptr [[M_CASTED]], align 4 1926 // CHECK9-NEXT: [[TMP74:%.*]] = load i64, ptr [[M_CASTED]], align 8 1927 // CHECK9-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4 1928 // CHECK9-NEXT: store i32 [[TMP75]], ptr [[N_CASTED18]], align 4 1929 // CHECK9-NEXT: [[TMP76:%.*]] = load i64, ptr [[N_CASTED18]], align 8 1930 // CHECK9-NEXT: [[TMP77:%.*]] = mul nuw i64 [[TMP1]], 4 1931 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 32, i1 false) 1932 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1933 // CHECK9-NEXT: store i64 [[TMP74]], ptr [[TMP78]], align 8 1934 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1935 // CHECK9-NEXT: store i64 [[TMP74]], ptr [[TMP79]], align 8 1936 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0 1937 // CHECK9-NEXT: store ptr null, ptr [[TMP80]], align 8 1938 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 1939 // CHECK9-NEXT: store i64 [[TMP76]], ptr [[TMP81]], align 8 1940 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 1941 // CHECK9-NEXT: store i64 [[TMP76]], ptr [[TMP82]], align 8 1942 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 1 1943 // CHECK9-NEXT: store ptr null, ptr [[TMP83]], align 8 1944 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 1945 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP84]], align 8 1946 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 1947 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP85]], align 8 1948 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 2 1949 // CHECK9-NEXT: store ptr null, ptr [[TMP86]], align 8 1950 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 1951 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 8 1952 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 1953 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 8 1954 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 3 1955 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8 1956 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 3 1957 // CHECK9-NEXT: store ptr null, ptr [[TMP90]], align 8 1958 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1959 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1960 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 1961 // CHECK9-NEXT: [[TMP94:%.*]] = load i32, ptr [[N]], align 4 1962 // CHECK9-NEXT: store i32 [[TMP94]], ptr [[DOTCAPTURE_EXPR_24]], align 4 1963 // CHECK9-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4 1964 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 1965 // CHECK9-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 1966 // CHECK9-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 1967 // CHECK9-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4 1968 // CHECK9-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 1969 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 1970 // CHECK9-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 1971 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0 1972 // CHECK9-NEXT: store i32 3, ptr [[TMP98]], align 4 1973 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1 1974 // CHECK9-NEXT: store i32 4, ptr [[TMP99]], align 4 1975 // CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2 1976 // CHECK9-NEXT: store ptr [[TMP91]], ptr [[TMP100]], align 8 1977 // CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3 1978 // CHECK9-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8 1979 // CHECK9-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4 1980 // CHECK9-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8 1981 // CHECK9-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5 1982 // CHECK9-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP103]], align 8 1983 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6 1984 // CHECK9-NEXT: store ptr null, ptr [[TMP104]], align 8 1985 // CHECK9-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7 1986 // CHECK9-NEXT: store ptr null, ptr [[TMP105]], align 8 1987 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8 1988 // CHECK9-NEXT: store i64 [[TMP97]], ptr [[TMP106]], align 8 1989 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9 1990 // CHECK9-NEXT: store i64 0, ptr [[TMP107]], align 8 1991 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10 1992 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 1993 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11 1994 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4 1995 // CHECK9-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12 1996 // CHECK9-NEXT: store i32 0, ptr [[TMP110]], align 4 1997 // CHECK9-NEXT: [[TMP111:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.region_id, ptr [[KERNEL_ARGS30]]) 1998 // CHECK9-NEXT: [[TMP112:%.*]] = icmp ne i32 [[TMP111]], 0 1999 // CHECK9-NEXT: br i1 [[TMP112]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 2000 // CHECK9: omp_offload.failed31: 2001 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118(i64 [[TMP74]], i64 [[TMP76]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 2002 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT32]] 2003 // CHECK9: omp_offload.cont32: 2004 // CHECK9-NEXT: [[TMP113:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 2005 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP113]]) 2006 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2007 // CHECK9-NEXT: [[TMP114:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 2008 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP114]]) 2009 // CHECK9-NEXT: [[TMP115:%.*]] = load i32, ptr [[RETVAL]], align 4 2010 // CHECK9-NEXT: ret i32 [[TMP115]] 2011 // 2012 // 2013 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108 2014 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2015 // CHECK9-NEXT: entry: 2016 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2017 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2018 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2019 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2020 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2021 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2022 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2023 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2024 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]]) 2025 // CHECK9-NEXT: ret void 2026 // 2027 // 2028 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined 2029 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2030 // CHECK9-NEXT: entry: 2031 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2032 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2033 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2034 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2035 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2036 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2037 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2038 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2039 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2040 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2041 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2042 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2043 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2044 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2045 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2046 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2047 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2048 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2049 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2050 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2051 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2052 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2053 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2054 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 2055 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 2056 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2057 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2058 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2059 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2060 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2061 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 2062 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2063 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2064 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2065 // CHECK9: omp.precond.then: 2066 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2067 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2068 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 2069 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2070 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2071 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2072 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2073 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2074 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2075 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2076 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2077 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2078 // CHECK9: cond.true: 2079 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2080 // CHECK9-NEXT: br label [[COND_END:%.*]] 2081 // CHECK9: cond.false: 2082 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2083 // CHECK9-NEXT: br label [[COND_END]] 2084 // CHECK9: cond.end: 2085 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2086 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2087 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2088 // CHECK9-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2089 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2090 // CHECK9: omp.inner.for.cond: 2091 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 2092 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 2093 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2094 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2095 // CHECK9: omp.inner.for.body: 2096 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 2097 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 2098 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 2099 // CHECK9-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 2100 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]]), !llvm.access.group [[ACC_GRP9]] 2101 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2102 // CHECK9: omp.inner.for.inc: 2103 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 2104 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 2105 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 2106 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 2107 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 2108 // CHECK9: omp.inner.for.end: 2109 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2110 // CHECK9: omp.loop.exit: 2111 // CHECK9-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2112 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 2113 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]]) 2114 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2115 // CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 2116 // CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2117 // CHECK9: .omp.final.then: 2118 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2119 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 2120 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2121 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 2122 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 2123 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 2124 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2125 // CHECK9: .omp.final.done: 2126 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2127 // CHECK9: omp.precond.end: 2128 // CHECK9-NEXT: ret void 2129 // 2130 // 2131 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined.omp_outlined 2132 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2133 // CHECK9-NEXT: entry: 2134 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2135 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2136 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2137 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2138 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2139 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2140 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2141 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2142 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2143 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2144 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2145 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2146 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2147 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2148 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2149 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2150 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 2151 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2152 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2153 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2154 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2155 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2156 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2157 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2158 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2159 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2160 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2161 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 2162 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 2163 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2164 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2165 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2166 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2167 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2168 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 2169 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2170 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2171 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2172 // CHECK9: omp.precond.then: 2173 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2174 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2175 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 2176 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2177 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 2178 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2179 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 2180 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2181 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 2182 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2183 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2184 // CHECK9-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2185 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 2186 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2187 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2188 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2189 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 2190 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2191 // CHECK9: cond.true: 2192 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2193 // CHECK9-NEXT: br label [[COND_END:%.*]] 2194 // CHECK9: cond.false: 2195 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2196 // CHECK9-NEXT: br label [[COND_END]] 2197 // CHECK9: cond.end: 2198 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2199 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2200 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2201 // CHECK9-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 2202 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2203 // CHECK9: omp.inner.for.cond: 2204 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 2205 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 2206 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2207 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2208 // CHECK9: omp.inner.for.body: 2209 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 2210 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2211 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2212 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP13]] 2213 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP13]] 2214 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2215 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]] 2216 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 2217 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2218 // CHECK9: omp.body.continue: 2219 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2220 // CHECK9: omp.inner.for.inc: 2221 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 2222 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 2223 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 2224 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 2225 // CHECK9: omp.inner.for.end: 2226 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2227 // CHECK9: omp.loop.exit: 2228 // CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2229 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2230 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2231 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2232 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2233 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2234 // CHECK9: .omp.final.then: 2235 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2236 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 2237 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2238 // CHECK9-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2239 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2240 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 2241 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2242 // CHECK9: .omp.final.done: 2243 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2244 // CHECK9: omp.precond.end: 2245 // CHECK9-NEXT: ret void 2246 // 2247 // 2248 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113 2249 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2250 // CHECK9-NEXT: entry: 2251 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2252 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2253 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2254 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2255 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2256 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2257 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2258 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2259 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]]) 2260 // CHECK9-NEXT: ret void 2261 // 2262 // 2263 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined 2264 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2265 // CHECK9-NEXT: entry: 2266 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2267 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2268 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2269 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2270 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2271 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2272 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2273 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2274 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2275 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2276 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2277 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2278 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2279 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2280 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2281 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2282 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2283 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2284 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2285 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2286 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2287 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2288 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2289 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 2290 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 2291 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2292 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2293 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2294 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2295 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2296 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 2297 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2298 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2299 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2300 // CHECK9: omp.precond.then: 2301 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2302 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2303 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 2304 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2305 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2306 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2307 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2308 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2309 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2310 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2311 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2312 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2313 // CHECK9: cond.true: 2314 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2315 // CHECK9-NEXT: br label [[COND_END:%.*]] 2316 // CHECK9: cond.false: 2317 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2318 // CHECK9-NEXT: br label [[COND_END]] 2319 // CHECK9: cond.end: 2320 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2321 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2322 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2323 // CHECK9-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2324 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2325 // CHECK9: omp.inner.for.cond: 2326 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 2327 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 2328 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2329 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2330 // CHECK9: omp.inner.for.body: 2331 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]] 2332 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 2333 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 2334 // CHECK9-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 2335 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]]), !llvm.access.group [[ACC_GRP18]] 2336 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2337 // CHECK9: omp.inner.for.inc: 2338 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 2339 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]] 2340 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 2341 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 2342 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 2343 // CHECK9: omp.inner.for.end: 2344 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2345 // CHECK9: omp.loop.exit: 2346 // CHECK9-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2347 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 2348 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]]) 2349 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2350 // CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 2351 // CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2352 // CHECK9: .omp.final.then: 2353 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2354 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0 2355 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2356 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 2357 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 2358 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 2359 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2360 // CHECK9: .omp.final.done: 2361 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2362 // CHECK9: omp.precond.end: 2363 // CHECK9-NEXT: ret void 2364 // 2365 // 2366 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined.omp_outlined 2367 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2368 // CHECK9-NEXT: entry: 2369 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2370 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2371 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2372 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2373 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2374 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2375 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2376 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2377 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2378 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2379 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2380 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2381 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2382 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2383 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2384 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2385 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 2386 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2387 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2388 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2389 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2390 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2391 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2392 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2393 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2394 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2395 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2396 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 2397 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 2398 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2399 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2400 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2401 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2402 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2403 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 2404 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2405 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2406 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2407 // CHECK9: omp.precond.then: 2408 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2409 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2410 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 2411 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2412 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 2413 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2414 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 2415 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2416 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 2417 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2418 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2419 // CHECK9-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2420 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 2421 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2422 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2423 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2424 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 2425 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2426 // CHECK9: cond.true: 2427 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2428 // CHECK9-NEXT: br label [[COND_END:%.*]] 2429 // CHECK9: cond.false: 2430 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2431 // CHECK9-NEXT: br label [[COND_END]] 2432 // CHECK9: cond.end: 2433 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2434 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2435 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2436 // CHECK9-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 2437 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2438 // CHECK9: omp.inner.for.cond: 2439 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 2440 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 2441 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2442 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2443 // CHECK9: omp.inner.for.body: 2444 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 2445 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2446 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2447 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP21]] 2448 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP21]] 2449 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2450 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]] 2451 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]] 2452 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2453 // CHECK9: omp.body.continue: 2454 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2455 // CHECK9: omp.inner.for.inc: 2456 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 2457 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 2458 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 2459 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 2460 // CHECK9: omp.inner.for.end: 2461 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2462 // CHECK9: omp.loop.exit: 2463 // CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2464 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2465 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2466 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2467 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2468 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2469 // CHECK9: .omp.final.then: 2470 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2471 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 2472 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2473 // CHECK9-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2474 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2475 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 2476 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2477 // CHECK9: .omp.final.done: 2478 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2479 // CHECK9: omp.precond.end: 2480 // CHECK9-NEXT: ret void 2481 // 2482 // 2483 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118 2484 // CHECK9-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2485 // CHECK9-NEXT: entry: 2486 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 2487 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2488 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2489 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2490 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2491 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2492 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 2493 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2494 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2495 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2496 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2497 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2498 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4 2499 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 2500 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2501 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 2502 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 2503 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]]) 2504 // CHECK9-NEXT: ret void 2505 // 2506 // 2507 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined 2508 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2509 // CHECK9-NEXT: entry: 2510 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2511 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2512 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2513 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2514 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2515 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2516 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2517 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2518 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2519 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2520 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2521 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2522 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2523 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2524 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2525 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 2526 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2527 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2528 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2529 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2530 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2531 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2532 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2533 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2534 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2535 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2536 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 2537 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2538 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2539 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2540 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2541 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2542 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2543 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 2544 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2545 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2546 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2547 // CHECK9: omp.precond.then: 2548 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2549 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2550 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 2551 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2552 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2553 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2554 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2555 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 2556 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 2557 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2558 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2559 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2560 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2561 // CHECK9: cond.true: 2562 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2563 // CHECK9-NEXT: br label [[COND_END:%.*]] 2564 // CHECK9: cond.false: 2565 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2566 // CHECK9-NEXT: br label [[COND_END]] 2567 // CHECK9: cond.end: 2568 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2569 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2570 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2571 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 2572 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2573 // CHECK9: omp.inner.for.cond: 2574 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 2575 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP24]] 2576 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 2577 // CHECK9-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 2578 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2579 // CHECK9: omp.inner.for.body: 2580 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 2581 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2582 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2583 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2584 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP24]] 2585 // CHECK9-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP24]] 2586 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP24]] 2587 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP22]]), !llvm.access.group [[ACC_GRP24]] 2588 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2589 // CHECK9: omp.inner.for.inc: 2590 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 2591 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 2592 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2593 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 2594 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 2595 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 2596 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 2597 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 2598 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2599 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 2600 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 2601 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2602 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2603 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP24]] 2604 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 2605 // CHECK9-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 2606 // CHECK9: cond.true11: 2607 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP24]] 2608 // CHECK9-NEXT: br label [[COND_END13:%.*]] 2609 // CHECK9: cond.false12: 2610 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2611 // CHECK9-NEXT: br label [[COND_END13]] 2612 // CHECK9: cond.end13: 2613 // CHECK9-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE11]] ], [ [[TMP32]], [[COND_FALSE12]] ] 2614 // CHECK9-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2615 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 2616 // CHECK9-NEXT: store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 2617 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 2618 // CHECK9: omp.inner.for.end: 2619 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2620 // CHECK9: omp.loop.exit: 2621 // CHECK9-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2622 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 2623 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]]) 2624 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2625 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2626 // CHECK9-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2627 // CHECK9: .omp.final.then: 2628 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2629 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP38]], 0 2630 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 2631 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1 2632 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]] 2633 // CHECK9-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 2634 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2635 // CHECK9: .omp.final.done: 2636 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2637 // CHECK9: omp.precond.end: 2638 // CHECK9-NEXT: ret void 2639 // 2640 // 2641 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined.omp_outlined 2642 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2643 // CHECK9-NEXT: entry: 2644 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2645 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2646 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2647 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2648 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2649 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2650 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2651 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2652 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2653 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2654 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2655 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2656 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2657 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2658 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2659 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2660 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2661 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2662 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2663 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2664 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2665 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2666 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2667 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2668 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2669 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2670 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2671 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2672 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2673 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 2674 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2675 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2676 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2677 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2678 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2679 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2680 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 2681 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2682 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2683 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2684 // CHECK9: omp.precond.then: 2685 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2686 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2687 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 2688 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2689 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 2690 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2691 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 2692 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2693 // CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 2694 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2695 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2696 // CHECK9-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2697 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 2698 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2699 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2700 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2701 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 2702 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2703 // CHECK9: cond.true: 2704 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2705 // CHECK9-NEXT: br label [[COND_END:%.*]] 2706 // CHECK9: cond.false: 2707 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2708 // CHECK9-NEXT: br label [[COND_END]] 2709 // CHECK9: cond.end: 2710 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 2711 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2712 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2713 // CHECK9-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 2714 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2715 // CHECK9: omp.inner.for.cond: 2716 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 2717 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 2718 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2719 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2720 // CHECK9: omp.inner.for.body: 2721 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2722 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2723 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2724 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP27]] 2725 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP27]] 2726 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2727 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]] 2728 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]] 2729 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2730 // CHECK9: omp.body.continue: 2731 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2732 // CHECK9: omp.inner.for.inc: 2733 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2734 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 2735 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2736 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2737 // CHECK9: omp.inner.for.end: 2738 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2739 // CHECK9: omp.loop.exit: 2740 // CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2741 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2742 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2743 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2744 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2745 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2746 // CHECK9: .omp.final.then: 2747 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2748 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0 2749 // CHECK9-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 2750 // CHECK9-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 2751 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 2752 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[I5]], align 4 2753 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2754 // CHECK9: .omp.final.done: 2755 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2756 // CHECK9: omp.precond.end: 2757 // CHECK9-NEXT: ret void 2758 // 2759 // 2760 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2761 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2762 // CHECK9-NEXT: entry: 2763 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2764 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2765 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 2766 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 2767 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 2768 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 2769 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2770 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2771 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 2772 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 2773 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 2774 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2775 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2776 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 2777 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8 2778 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8 2779 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8 2780 // CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 2781 // CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2782 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 2783 // CHECK9-NEXT: store i32 10, ptr [[M]], align 4 2784 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2785 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 2786 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2787 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 2788 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2789 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 2790 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2791 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2792 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2793 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4 2794 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2795 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4 2796 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2797 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 2798 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2799 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 2800 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2801 // CHECK9-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 8 2802 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2803 // CHECK9-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 8 2804 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2805 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 2806 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2807 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 2808 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2809 // CHECK9-NEXT: store i64 10, ptr [[TMP13]], align 8 2810 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2811 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 2812 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2813 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 2814 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2815 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 2816 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2817 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4 2818 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.region_id, ptr [[KERNEL_ARGS]]) 2819 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 2820 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2821 // CHECK9: omp_offload.failed: 2822 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86(ptr [[A]]) #[[ATTR3]] 2823 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2824 // CHECK9: omp_offload.cont: 2825 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2826 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP20]], align 8 2827 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2828 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP21]], align 8 2829 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 2830 // CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8 2831 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2832 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2833 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 2834 // CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4 2835 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 2836 // CHECK9-NEXT: store i32 1, ptr [[TMP26]], align 4 2837 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 2838 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 2839 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 2840 // CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 2841 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 2842 // CHECK9-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 8 2843 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 2844 // CHECK9-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 8 2845 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 2846 // CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8 2847 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 2848 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8 2849 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 2850 // CHECK9-NEXT: store i64 10, ptr [[TMP33]], align 8 2851 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 2852 // CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8 2853 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 2854 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 2855 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 2856 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 2857 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 2858 // CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4 2859 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.region_id, ptr [[KERNEL_ARGS5]]) 2860 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 2861 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 2862 // CHECK9: omp_offload.failed6: 2863 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91(ptr [[A]]) #[[ATTR3]] 2864 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]] 2865 // CHECK9: omp_offload.cont7: 2866 // CHECK9-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 2867 // CHECK9-NEXT: store i32 [[TMP40]], ptr [[M_CASTED]], align 4 2868 // CHECK9-NEXT: [[TMP41:%.*]] = load i64, ptr [[M_CASTED]], align 8 2869 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 2870 // CHECK9-NEXT: store i64 [[TMP41]], ptr [[TMP42]], align 8 2871 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 2872 // CHECK9-NEXT: store i64 [[TMP41]], ptr [[TMP43]], align 8 2873 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 2874 // CHECK9-NEXT: store ptr null, ptr [[TMP44]], align 8 2875 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 2876 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP45]], align 8 2877 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 2878 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP46]], align 8 2879 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 2880 // CHECK9-NEXT: store ptr null, ptr [[TMP47]], align 8 2881 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 2882 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 2883 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 2884 // CHECK9-NEXT: store i32 3, ptr [[TMP50]], align 4 2885 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 2886 // CHECK9-NEXT: store i32 2, ptr [[TMP51]], align 4 2887 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 2888 // CHECK9-NEXT: store ptr [[TMP48]], ptr [[TMP52]], align 8 2889 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 2890 // CHECK9-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 8 2891 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 2892 // CHECK9-NEXT: store ptr @.offload_sizes.9, ptr [[TMP54]], align 8 2893 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 2894 // CHECK9-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP55]], align 8 2895 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 2896 // CHECK9-NEXT: store ptr null, ptr [[TMP56]], align 8 2897 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 2898 // CHECK9-NEXT: store ptr null, ptr [[TMP57]], align 8 2899 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 2900 // CHECK9-NEXT: store i64 10, ptr [[TMP58]], align 8 2901 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 2902 // CHECK9-NEXT: store i64 0, ptr [[TMP59]], align 8 2903 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 2904 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP60]], align 4 2905 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 2906 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 2907 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 2908 // CHECK9-NEXT: store i32 0, ptr [[TMP62]], align 4 2909 // CHECK9-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.region_id, ptr [[KERNEL_ARGS12]]) 2910 // CHECK9-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0 2911 // CHECK9-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 2912 // CHECK9: omp_offload.failed13: 2913 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96(i64 [[TMP41]], ptr [[A]]) #[[ATTR3]] 2914 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]] 2915 // CHECK9: omp_offload.cont14: 2916 // CHECK9-NEXT: ret i32 0 2917 // 2918 // 2919 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86 2920 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2921 // CHECK9-NEXT: entry: 2922 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2923 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2924 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2925 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined, ptr [[TMP0]]) 2926 // CHECK9-NEXT: ret void 2927 // 2928 // 2929 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined 2930 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2931 // CHECK9-NEXT: entry: 2932 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2933 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2934 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2935 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2936 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2937 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2938 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2939 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2940 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2941 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2942 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2943 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2944 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2945 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2946 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2947 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 2948 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2949 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2950 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2951 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2952 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2953 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2954 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2955 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2956 // CHECK9: cond.true: 2957 // CHECK9-NEXT: br label [[COND_END:%.*]] 2958 // CHECK9: cond.false: 2959 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2960 // CHECK9-NEXT: br label [[COND_END]] 2961 // CHECK9: cond.end: 2962 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2963 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2964 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2965 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2966 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2967 // CHECK9: omp.inner.for.cond: 2968 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 2969 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 2970 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2971 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2972 // CHECK9: omp.inner.for.body: 2973 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]] 2974 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2975 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 2976 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2977 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP30]] 2978 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2979 // CHECK9: omp.inner.for.inc: 2980 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 2981 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]] 2982 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2983 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 2984 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 2985 // CHECK9: omp.inner.for.end: 2986 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2987 // CHECK9: omp.loop.exit: 2988 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2989 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2990 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2991 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2992 // CHECK9: .omp.final.then: 2993 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 2994 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2995 // CHECK9: .omp.final.done: 2996 // CHECK9-NEXT: ret void 2997 // 2998 // 2999 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined.omp_outlined 3000 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3001 // CHECK9-NEXT: entry: 3002 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3003 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3004 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3005 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3006 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3007 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3008 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3009 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3010 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3011 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3012 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3013 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3014 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3015 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3016 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3017 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3018 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3019 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3020 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3021 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3022 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3023 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3024 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3025 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3026 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3027 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3028 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3029 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3030 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3031 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3032 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3033 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3034 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 3035 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3036 // CHECK9: cond.true: 3037 // CHECK9-NEXT: br label [[COND_END:%.*]] 3038 // CHECK9: cond.false: 3039 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3040 // CHECK9-NEXT: br label [[COND_END]] 3041 // CHECK9: cond.end: 3042 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3043 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3044 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3045 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3046 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3047 // CHECK9: omp.inner.for.cond: 3048 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 3049 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 3050 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3051 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3052 // CHECK9: omp.inner.for.body: 3053 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 3054 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3055 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3056 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 3057 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 3058 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3059 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 3060 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP33]] 3061 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3062 // CHECK9: omp.body.continue: 3063 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3064 // CHECK9: omp.inner.for.inc: 3065 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 3066 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3067 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 3068 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] 3069 // CHECK9: omp.inner.for.end: 3070 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3071 // CHECK9: omp.loop.exit: 3072 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3073 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3074 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3075 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3076 // CHECK9: .omp.final.then: 3077 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 3078 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3079 // CHECK9: .omp.final.done: 3080 // CHECK9-NEXT: ret void 3081 // 3082 // 3083 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91 3084 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3085 // CHECK9-NEXT: entry: 3086 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3087 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3088 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3089 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined, ptr [[TMP0]]) 3090 // CHECK9-NEXT: ret void 3091 // 3092 // 3093 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined 3094 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3095 // CHECK9-NEXT: entry: 3096 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3097 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3098 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3099 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3100 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3101 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3102 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3103 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3104 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3105 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3106 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3107 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3108 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3109 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3110 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3111 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 3112 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3113 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3114 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3115 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3116 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3117 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3118 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3119 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3120 // CHECK9: cond.true: 3121 // CHECK9-NEXT: br label [[COND_END:%.*]] 3122 // CHECK9: cond.false: 3123 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3124 // CHECK9-NEXT: br label [[COND_END]] 3125 // CHECK9: cond.end: 3126 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3127 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3128 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3129 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3130 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3131 // CHECK9: omp.inner.for.cond: 3132 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 3133 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 3134 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3135 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3136 // CHECK9: omp.inner.for.body: 3137 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]] 3138 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3139 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 3140 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3141 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP36]] 3142 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3143 // CHECK9: omp.inner.for.inc: 3144 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 3145 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]] 3146 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3147 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 3148 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] 3149 // CHECK9: omp.inner.for.end: 3150 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3151 // CHECK9: omp.loop.exit: 3152 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3153 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3154 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3155 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3156 // CHECK9: .omp.final.then: 3157 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 3158 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3159 // CHECK9: .omp.final.done: 3160 // CHECK9-NEXT: ret void 3161 // 3162 // 3163 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined.omp_outlined 3164 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3165 // CHECK9-NEXT: entry: 3166 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3167 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3168 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3169 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3170 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3171 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3172 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3173 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3174 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3175 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3176 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3177 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3178 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3179 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3180 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3181 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3182 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3183 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3184 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3185 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3186 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3187 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3188 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3189 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3190 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3191 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3192 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3193 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3194 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3195 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3196 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3197 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3198 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 3199 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3200 // CHECK9: cond.true: 3201 // CHECK9-NEXT: br label [[COND_END:%.*]] 3202 // CHECK9: cond.false: 3203 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3204 // CHECK9-NEXT: br label [[COND_END]] 3205 // CHECK9: cond.end: 3206 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3207 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3208 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3209 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3210 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3211 // CHECK9: omp.inner.for.cond: 3212 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 3213 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 3214 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3215 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3216 // CHECK9: omp.inner.for.body: 3217 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 3218 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3219 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3220 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 3221 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 3222 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3223 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 3224 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP39]] 3225 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3226 // CHECK9: omp.body.continue: 3227 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3228 // CHECK9: omp.inner.for.inc: 3229 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 3230 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3231 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 3232 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] 3233 // CHECK9: omp.inner.for.end: 3234 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3235 // CHECK9: omp.loop.exit: 3236 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3237 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3238 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3239 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3240 // CHECK9: .omp.final.then: 3241 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 3242 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3243 // CHECK9: .omp.final.done: 3244 // CHECK9-NEXT: ret void 3245 // 3246 // 3247 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96 3248 // CHECK9-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3249 // CHECK9-NEXT: entry: 3250 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 3251 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3252 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3253 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3254 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 3255 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3256 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3257 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4 3258 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 3259 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3260 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 3261 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 3262 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined, ptr [[TMP0]], i64 [[TMP3]]) 3263 // CHECK9-NEXT: ret void 3264 // 3265 // 3266 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined 3267 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3268 // CHECK9-NEXT: entry: 3269 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3270 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3271 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3272 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3273 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3274 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3275 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3276 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3277 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3278 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3279 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3280 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3281 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3282 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3283 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3284 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 3285 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3286 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3287 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 3288 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3289 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3290 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 3291 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3292 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3293 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP1]]) 3294 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3295 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 3296 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3297 // CHECK9: cond.true: 3298 // CHECK9-NEXT: br label [[COND_END:%.*]] 3299 // CHECK9: cond.false: 3300 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3301 // CHECK9-NEXT: br label [[COND_END]] 3302 // CHECK9: cond.end: 3303 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3304 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3305 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3306 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3307 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3308 // CHECK9: omp.inner.for.cond: 3309 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 3310 // CHECK9-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP7]], 10 3311 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3312 // CHECK9: omp.inner.for.body: 3313 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]] 3314 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3315 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 3316 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3317 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP42]] 3318 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP42]] 3319 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP42]] 3320 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP42]] 3321 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3322 // CHECK9: omp.inner.for.inc: 3323 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 3324 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]] 3325 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 3326 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 3327 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]] 3328 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]] 3329 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 3330 // CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]] 3331 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 3332 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]] 3333 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 3334 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 3335 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 3336 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9 3337 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 3338 // CHECK9: cond.true5: 3339 // CHECK9-NEXT: br label [[COND_END7:%.*]] 3340 // CHECK9: cond.false6: 3341 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 3342 // CHECK9-NEXT: br label [[COND_END7]] 3343 // CHECK9: cond.end7: 3344 // CHECK9-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ] 3345 // CHECK9-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 3346 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]] 3347 // CHECK9-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 3348 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]] 3349 // CHECK9: omp.inner.for.end: 3350 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3351 // CHECK9: omp.loop.exit: 3352 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3353 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3354 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3355 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3356 // CHECK9: .omp.final.then: 3357 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 3358 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3359 // CHECK9: .omp.final.done: 3360 // CHECK9-NEXT: ret void 3361 // 3362 // 3363 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined.omp_outlined 3364 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3365 // CHECK9-NEXT: entry: 3366 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3367 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3368 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3369 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3370 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3371 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3372 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3373 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3374 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3375 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3376 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3377 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3378 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3379 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3380 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3381 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3382 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3383 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3384 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 3385 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3386 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3387 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3388 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3389 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3390 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3391 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3392 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3393 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3394 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3395 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3396 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3397 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3398 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3399 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3400 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 3401 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3402 // CHECK9: cond.true: 3403 // CHECK9-NEXT: br label [[COND_END:%.*]] 3404 // CHECK9: cond.false: 3405 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3406 // CHECK9-NEXT: br label [[COND_END]] 3407 // CHECK9: cond.end: 3408 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3409 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3410 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3411 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3412 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3413 // CHECK9: omp.inner.for.cond: 3414 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]] 3415 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]] 3416 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3417 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3418 // CHECK9: omp.inner.for.body: 3419 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 3420 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3421 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3422 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP45]] 3423 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP45]] 3424 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3425 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 3426 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP45]] 3427 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3428 // CHECK9: omp.body.continue: 3429 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3430 // CHECK9: omp.inner.for.inc: 3431 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 3432 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3433 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 3434 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]] 3435 // CHECK9: omp.inner.for.end: 3436 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3437 // CHECK9: omp.loop.exit: 3438 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3439 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3440 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3441 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3442 // CHECK9: .omp.final.then: 3443 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 3444 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3445 // CHECK9: .omp.final.done: 3446 // CHECK9-NEXT: ret void 3447 // 3448 // 3449 // CHECK11-LABEL: define {{[^@]+}}@main 3450 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3451 // CHECK11-NEXT: entry: 3452 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3453 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3454 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 3455 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 3456 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 3457 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3458 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 3459 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3460 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 3461 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 3462 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 3463 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3464 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3465 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3466 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3467 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3468 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 3469 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4 3470 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4 3471 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4 3472 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 3473 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 3474 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 3475 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 3476 // CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3477 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 3478 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 3479 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 4 3480 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 4 3481 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 4 3482 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 3483 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3484 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 3485 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3486 // CHECK11-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3487 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 3488 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3489 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 3490 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4 3491 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 3492 // CHECK11-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 3493 // CHECK11-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 3494 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3495 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 3496 // CHECK11-NEXT: store i32 10, ptr [[M]], align 4 3497 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 3498 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 3499 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 3500 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 3501 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 3502 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false) 3503 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3504 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4 3505 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3506 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 3507 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3508 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4 3509 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3510 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 3511 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3512 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4 3513 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3514 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 3515 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3516 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 3517 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3518 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4 3519 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3520 // CHECK11-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4 3521 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3522 // CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 4 3523 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3524 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3525 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3526 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 3527 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 3528 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3529 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 3530 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3531 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3532 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3533 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3534 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 3535 // CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 3536 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 3537 // CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 4 3538 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 3539 // CHECK11-NEXT: store i32 3, ptr [[TMP24]], align 4 3540 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 3541 // CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4 3542 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 3543 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4 3544 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 3545 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4 3546 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 3547 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 3548 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3549 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 3550 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3551 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4 3552 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3553 // CHECK11-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 3554 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3555 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8 3556 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3557 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 3558 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3559 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 3560 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3561 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4 3562 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.region_id, ptr [[KERNEL_ARGS]]) 3563 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 3564 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3565 // CHECK11: omp_offload.failed: 3566 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 3567 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3568 // CHECK11: omp_offload.cont: 3569 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 3570 // CHECK11-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 3571 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 3572 // CHECK11-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4 3573 // CHECK11-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64 3574 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false) 3575 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 3576 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4 3577 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 3578 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 3579 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 3580 // CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 4 3581 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 3582 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4 3583 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 3584 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4 3585 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 3586 // CHECK11-NEXT: store ptr null, ptr [[TMP47]], align 4 3587 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 3588 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4 3589 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 3590 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4 3591 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 3592 // CHECK11-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4 3593 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 3594 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4 3595 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 3596 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 3597 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 3598 // CHECK11-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4 3599 // CHECK11-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4 3600 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 3601 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0 3602 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 3603 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 3604 // CHECK11-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 3605 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 3606 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1 3607 // CHECK11-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64 3608 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 3609 // CHECK11-NEXT: store i32 3, ptr [[TMP59]], align 4 3610 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 3611 // CHECK11-NEXT: store i32 3, ptr [[TMP60]], align 4 3612 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 3613 // CHECK11-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4 3614 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 3615 // CHECK11-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4 3616 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 3617 // CHECK11-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4 3618 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 3619 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4 3620 // CHECK11-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 3621 // CHECK11-NEXT: store ptr null, ptr [[TMP65]], align 4 3622 // CHECK11-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 3623 // CHECK11-NEXT: store ptr null, ptr [[TMP66]], align 4 3624 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 3625 // CHECK11-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8 3626 // CHECK11-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 3627 // CHECK11-NEXT: store i64 0, ptr [[TMP68]], align 8 3628 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 3629 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 3630 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 3631 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4 3632 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 3633 // CHECK11-NEXT: store i32 0, ptr [[TMP71]], align 4 3634 // CHECK11-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.region_id, ptr [[KERNEL_ARGS15]]) 3635 // CHECK11-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0 3636 // CHECK11-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3637 // CHECK11: omp_offload.failed16: 3638 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 3639 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3640 // CHECK11: omp_offload.cont17: 3641 // CHECK11-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 4 3642 // CHECK11-NEXT: store i32 [[TMP74]], ptr [[M_CASTED]], align 4 3643 // CHECK11-NEXT: [[TMP75:%.*]] = load i32, ptr [[M_CASTED]], align 4 3644 // CHECK11-NEXT: [[TMP76:%.*]] = load i32, ptr [[N]], align 4 3645 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[N_CASTED18]], align 4 3646 // CHECK11-NEXT: [[TMP77:%.*]] = load i32, ptr [[N_CASTED18]], align 4 3647 // CHECK11-NEXT: [[TMP78:%.*]] = mul nuw i32 [[TMP0]], 4 3648 // CHECK11-NEXT: [[TMP79:%.*]] = sext i32 [[TMP78]] to i64 3649 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 32, i1 false) 3650 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3651 // CHECK11-NEXT: store i32 [[TMP75]], ptr [[TMP80]], align 4 3652 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3653 // CHECK11-NEXT: store i32 [[TMP75]], ptr [[TMP81]], align 4 3654 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 3655 // CHECK11-NEXT: store ptr null, ptr [[TMP82]], align 4 3656 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 3657 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[TMP83]], align 4 3658 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 3659 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[TMP84]], align 4 3660 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 3661 // CHECK11-NEXT: store ptr null, ptr [[TMP85]], align 4 3662 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 3663 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP86]], align 4 3664 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 3665 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP87]], align 4 3666 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 3667 // CHECK11-NEXT: store ptr null, ptr [[TMP88]], align 4 3668 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 3669 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP89]], align 4 3670 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 3671 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP90]], align 4 3672 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 3 3673 // CHECK11-NEXT: store i64 [[TMP79]], ptr [[TMP91]], align 4 3674 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 3675 // CHECK11-NEXT: store ptr null, ptr [[TMP92]], align 4 3676 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3677 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3678 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 3679 // CHECK11-NEXT: [[TMP96:%.*]] = load i32, ptr [[N]], align 4 3680 // CHECK11-NEXT: store i32 [[TMP96]], ptr [[DOTCAPTURE_EXPR_24]], align 4 3681 // CHECK11-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4 3682 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP97]], 0 3683 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 3684 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 3685 // CHECK11-NEXT: store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4 3686 // CHECK11-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 3687 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP98]], 1 3688 // CHECK11-NEXT: [[TMP99:%.*]] = zext i32 [[ADD29]] to i64 3689 // CHECK11-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0 3690 // CHECK11-NEXT: store i32 3, ptr [[TMP100]], align 4 3691 // CHECK11-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1 3692 // CHECK11-NEXT: store i32 4, ptr [[TMP101]], align 4 3693 // CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2 3694 // CHECK11-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 4 3695 // CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3 3696 // CHECK11-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4 3697 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4 3698 // CHECK11-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4 3699 // CHECK11-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5 3700 // CHECK11-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP105]], align 4 3701 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6 3702 // CHECK11-NEXT: store ptr null, ptr [[TMP106]], align 4 3703 // CHECK11-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7 3704 // CHECK11-NEXT: store ptr null, ptr [[TMP107]], align 4 3705 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8 3706 // CHECK11-NEXT: store i64 [[TMP99]], ptr [[TMP108]], align 8 3707 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9 3708 // CHECK11-NEXT: store i64 0, ptr [[TMP109]], align 8 3709 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10 3710 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4 3711 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11 3712 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4 3713 // CHECK11-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12 3714 // CHECK11-NEXT: store i32 0, ptr [[TMP112]], align 4 3715 // CHECK11-NEXT: [[TMP113:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.region_id, ptr [[KERNEL_ARGS30]]) 3716 // CHECK11-NEXT: [[TMP114:%.*]] = icmp ne i32 [[TMP113]], 0 3717 // CHECK11-NEXT: br i1 [[TMP114]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]] 3718 // CHECK11: omp_offload.failed31: 3719 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118(i32 [[TMP75]], i32 [[TMP77]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 3720 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT32]] 3721 // CHECK11: omp_offload.cont32: 3722 // CHECK11-NEXT: [[TMP115:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 3723 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP115]]) 3724 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 3725 // CHECK11-NEXT: [[TMP116:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 3726 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP116]]) 3727 // CHECK11-NEXT: [[TMP117:%.*]] = load i32, ptr [[RETVAL]], align 4 3728 // CHECK11-NEXT: ret i32 [[TMP117]] 3729 // 3730 // 3731 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108 3732 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3733 // CHECK11-NEXT: entry: 3734 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3735 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3736 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3737 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 3738 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 3739 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3740 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 3741 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3742 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]]) 3743 // CHECK11-NEXT: ret void 3744 // 3745 // 3746 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined 3747 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3748 // CHECK11-NEXT: entry: 3749 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3750 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3751 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3752 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3753 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3754 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3755 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3756 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3757 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3758 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3759 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3760 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3761 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3762 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3763 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3764 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3765 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3766 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3767 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 3768 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3769 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3770 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 3771 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3772 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 3773 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 3774 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3775 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3776 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3777 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3778 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3779 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 3780 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3781 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3782 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3783 // CHECK11: omp.precond.then: 3784 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3785 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3786 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 3787 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3788 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3789 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3790 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 3791 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3792 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3793 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3794 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3795 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3796 // CHECK11: cond.true: 3797 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3798 // CHECK11-NEXT: br label [[COND_END:%.*]] 3799 // CHECK11: cond.false: 3800 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3801 // CHECK11-NEXT: br label [[COND_END]] 3802 // CHECK11: cond.end: 3803 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3804 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3805 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3806 // CHECK11-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 3807 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3808 // CHECK11: omp.inner.for.cond: 3809 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 3810 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 3811 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3812 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3813 // CHECK11: omp.inner.for.body: 3814 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP10]] 3815 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 3816 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]]), !llvm.access.group [[ACC_GRP10]] 3817 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3818 // CHECK11: omp.inner.for.inc: 3819 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3820 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP10]] 3821 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 3822 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3823 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3824 // CHECK11: omp.inner.for.end: 3825 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3826 // CHECK11: omp.loop.exit: 3827 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3828 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 3829 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]]) 3830 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3831 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 3832 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3833 // CHECK11: .omp.final.then: 3834 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3835 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0 3836 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3837 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 3838 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 3839 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 3840 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3841 // CHECK11: .omp.final.done: 3842 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3843 // CHECK11: omp.precond.end: 3844 // CHECK11-NEXT: ret void 3845 // 3846 // 3847 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l108.omp_outlined.omp_outlined 3848 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3849 // CHECK11-NEXT: entry: 3850 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3851 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3852 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3853 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3854 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3855 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3856 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3857 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3858 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3859 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3860 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3861 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3862 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3863 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3864 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3865 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3866 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3867 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3868 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3869 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3870 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3871 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3872 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 3873 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3874 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3875 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 3876 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3877 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 3878 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 3879 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3880 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3881 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3882 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3883 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3884 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 3885 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3886 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3887 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3888 // CHECK11: omp.precond.then: 3889 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3890 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3891 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 3892 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3893 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3894 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4 3895 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 3896 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3897 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3898 // CHECK11-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3899 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 3900 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3901 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3902 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3903 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 3904 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3905 // CHECK11: cond.true: 3906 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3907 // CHECK11-NEXT: br label [[COND_END:%.*]] 3908 // CHECK11: cond.false: 3909 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3910 // CHECK11-NEXT: br label [[COND_END]] 3911 // CHECK11: cond.end: 3912 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 3913 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3914 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3915 // CHECK11-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 3916 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3917 // CHECK11: omp.inner.for.cond: 3918 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 3919 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 3920 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3921 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3922 // CHECK11: omp.inner.for.body: 3923 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 3924 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3925 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3926 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP14]] 3927 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP14]] 3928 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]] 3929 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]] 3930 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3931 // CHECK11: omp.body.continue: 3932 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3933 // CHECK11: omp.inner.for.inc: 3934 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 3935 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 3936 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 3937 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3938 // CHECK11: omp.inner.for.end: 3939 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3940 // CHECK11: omp.loop.exit: 3941 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3942 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 3943 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 3944 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3945 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3946 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3947 // CHECK11: .omp.final.then: 3948 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3949 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 3950 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3951 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 3952 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 3953 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 3954 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3955 // CHECK11: .omp.final.done: 3956 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3957 // CHECK11: omp.precond.end: 3958 // CHECK11-NEXT: ret void 3959 // 3960 // 3961 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113 3962 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3963 // CHECK11-NEXT: entry: 3964 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3965 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3966 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3967 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 3968 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 3969 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3970 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 3971 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3972 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]]) 3973 // CHECK11-NEXT: ret void 3974 // 3975 // 3976 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined 3977 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3978 // CHECK11-NEXT: entry: 3979 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3980 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3981 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3982 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3983 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3984 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3985 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3986 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3987 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3988 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3989 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3990 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3991 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3992 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3993 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3994 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3995 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3996 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3997 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 3998 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3999 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4000 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4001 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4002 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 4003 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 4004 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4005 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4006 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4007 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4008 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4009 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 4010 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4011 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4012 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4013 // CHECK11: omp.precond.then: 4014 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4015 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4016 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 4017 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4018 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4019 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4020 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 4021 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4022 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4023 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4024 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4025 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4026 // CHECK11: cond.true: 4027 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4028 // CHECK11-NEXT: br label [[COND_END:%.*]] 4029 // CHECK11: cond.false: 4030 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4031 // CHECK11-NEXT: br label [[COND_END]] 4032 // CHECK11: cond.end: 4033 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4034 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4035 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4036 // CHECK11-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 4037 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4038 // CHECK11: omp.inner.for.cond: 4039 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 4040 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 4041 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4042 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4043 // CHECK11: omp.inner.for.body: 4044 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]] 4045 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 4046 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]]), !llvm.access.group [[ACC_GRP19]] 4047 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4048 // CHECK11: omp.inner.for.inc: 4049 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 4050 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]] 4051 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 4052 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 4053 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 4054 // CHECK11: omp.inner.for.end: 4055 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4056 // CHECK11: omp.loop.exit: 4057 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4058 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 4059 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]]) 4060 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4061 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 4062 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4063 // CHECK11: .omp.final.then: 4064 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4065 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0 4066 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 4067 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 4068 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 4069 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 4070 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4071 // CHECK11: .omp.final.done: 4072 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4073 // CHECK11: omp.precond.end: 4074 // CHECK11-NEXT: ret void 4075 // 4076 // 4077 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l113.omp_outlined.omp_outlined 4078 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4079 // CHECK11-NEXT: entry: 4080 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4081 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4082 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4083 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4084 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4085 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4086 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4087 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4088 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4089 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4090 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4091 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4092 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4093 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4094 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4095 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4096 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 4097 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4098 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4099 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4100 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4101 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4102 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4103 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4104 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4105 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4106 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4107 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 4108 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 4109 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4110 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4111 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4112 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4113 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4114 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 4115 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4116 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4117 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4118 // CHECK11: omp.precond.then: 4119 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4120 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4121 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 4122 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4123 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4124 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4 4125 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 4126 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4127 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4128 // CHECK11-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4129 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 4130 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4131 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4132 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4133 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 4134 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4135 // CHECK11: cond.true: 4136 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4137 // CHECK11-NEXT: br label [[COND_END:%.*]] 4138 // CHECK11: cond.false: 4139 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4140 // CHECK11-NEXT: br label [[COND_END]] 4141 // CHECK11: cond.end: 4142 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 4143 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4144 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4145 // CHECK11-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 4146 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4147 // CHECK11: omp.inner.for.cond: 4148 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 4149 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 4150 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4151 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4152 // CHECK11: omp.inner.for.body: 4153 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 4154 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4155 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4156 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP22]] 4157 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP22]] 4158 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]] 4159 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]] 4160 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4161 // CHECK11: omp.body.continue: 4162 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4163 // CHECK11: omp.inner.for.inc: 4164 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 4165 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 4166 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 4167 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 4168 // CHECK11: omp.inner.for.end: 4169 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4170 // CHECK11: omp.loop.exit: 4171 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4172 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 4173 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 4174 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4175 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4176 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4177 // CHECK11: .omp.final.then: 4178 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4179 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 4180 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4181 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 4182 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 4183 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 4184 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4185 // CHECK11: .omp.final.done: 4186 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4187 // CHECK11: omp.precond.end: 4188 // CHECK11-NEXT: ret void 4189 // 4190 // 4191 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118 4192 // CHECK11-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4193 // CHECK11-NEXT: entry: 4194 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 4195 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4196 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4197 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4198 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4199 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4200 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 4201 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 4202 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4203 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4204 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4205 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4206 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4 4207 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 4208 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4209 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 4210 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 4211 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]]) 4212 // CHECK11-NEXT: ret void 4213 // 4214 // 4215 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined 4216 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4217 // CHECK11-NEXT: entry: 4218 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4219 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4220 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4221 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4222 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4223 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4224 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4225 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4226 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4227 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4228 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4229 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4230 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4231 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4232 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4233 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 4234 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4235 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4236 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4237 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4238 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4239 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4240 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4241 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4242 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4243 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4244 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 4245 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4246 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4247 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4248 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4249 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4250 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 4251 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 4252 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4253 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4254 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4255 // CHECK11: omp.precond.then: 4256 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4257 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4258 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 4259 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4260 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4261 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4262 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4263 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 4264 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 4265 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4266 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4267 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4268 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4269 // CHECK11: cond.true: 4270 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4271 // CHECK11-NEXT: br label [[COND_END:%.*]] 4272 // CHECK11: cond.false: 4273 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4274 // CHECK11-NEXT: br label [[COND_END]] 4275 // CHECK11: cond.end: 4276 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4277 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4278 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4279 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 4280 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4281 // CHECK11: omp.inner.for.cond: 4282 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 4283 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP25]] 4284 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 4285 // CHECK11-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 4286 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4287 // CHECK11: omp.inner.for.body: 4288 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 4289 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 4290 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP25]] 4291 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP25]] 4292 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP25]] 4293 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP20]]), !llvm.access.group [[ACC_GRP25]] 4294 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4295 // CHECK11: omp.inner.for.inc: 4296 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 4297 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 4298 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4299 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 4300 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 4301 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 4302 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4303 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 4304 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 4305 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 4306 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 4307 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 4308 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 4309 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP25]] 4310 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 4311 // CHECK11-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 4312 // CHECK11: cond.true11: 4313 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP25]] 4314 // CHECK11-NEXT: br label [[COND_END13:%.*]] 4315 // CHECK11: cond.false12: 4316 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 4317 // CHECK11-NEXT: br label [[COND_END13]] 4318 // CHECK11: cond.end13: 4319 // CHECK11-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 4320 // CHECK11-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 4321 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 4322 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 4323 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 4324 // CHECK11: omp.inner.for.end: 4325 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4326 // CHECK11: omp.loop.exit: 4327 // CHECK11-NEXT: [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4328 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4 4329 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]]) 4330 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4331 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 4332 // CHECK11-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4333 // CHECK11: .omp.final.then: 4334 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4335 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP36]], 0 4336 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 4337 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1 4338 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]] 4339 // CHECK11-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 4340 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4341 // CHECK11: .omp.final.done: 4342 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4343 // CHECK11: omp.precond.end: 4344 // CHECK11-NEXT: ret void 4345 // 4346 // 4347 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l118.omp_outlined.omp_outlined 4348 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4349 // CHECK11-NEXT: entry: 4350 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4351 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4352 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4353 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4354 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4355 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4356 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4357 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4358 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4359 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4360 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4361 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4362 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4363 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4364 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4365 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4366 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4367 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 4368 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4369 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4370 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4371 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4372 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4373 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4374 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4375 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4376 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4377 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4378 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4379 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 4380 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4381 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4382 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4383 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4384 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4385 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 4386 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 4387 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4388 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4389 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4390 // CHECK11: omp.precond.then: 4391 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4392 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4393 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 4394 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4395 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4396 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4 4397 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 4398 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4399 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4400 // CHECK11-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4401 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 4402 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4403 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4404 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4405 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 4406 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4407 // CHECK11: cond.true: 4408 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4409 // CHECK11-NEXT: br label [[COND_END:%.*]] 4410 // CHECK11: cond.false: 4411 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4412 // CHECK11-NEXT: br label [[COND_END]] 4413 // CHECK11: cond.end: 4414 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 4415 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4416 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4417 // CHECK11-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 4418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4419 // CHECK11: omp.inner.for.cond: 4420 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 4421 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 4422 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4423 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4424 // CHECK11: omp.inner.for.body: 4425 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 4426 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4427 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4428 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP28]] 4429 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP28]] 4430 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]] 4431 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP28]] 4432 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4433 // CHECK11: omp.body.continue: 4434 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4435 // CHECK11: omp.inner.for.inc: 4436 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 4437 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 4438 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 4439 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 4440 // CHECK11: omp.inner.for.end: 4441 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4442 // CHECK11: omp.loop.exit: 4443 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4444 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 4445 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 4446 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4447 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4448 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4449 // CHECK11: .omp.final.then: 4450 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4451 // CHECK11-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0 4452 // CHECK11-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4453 // CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4454 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4455 // CHECK11-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 4456 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4457 // CHECK11: .omp.final.done: 4458 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4459 // CHECK11: omp.precond.end: 4460 // CHECK11-NEXT: ret void 4461 // 4462 // 4463 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4464 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 4465 // CHECK11-NEXT: entry: 4466 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4467 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4468 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 4469 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 4470 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 4471 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 4472 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4473 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4474 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 4475 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 4476 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 4477 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4478 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4479 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 4480 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4 4481 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4 4482 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4 4483 // CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 4484 // CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4485 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4486 // CHECK11-NEXT: store i32 10, ptr [[M]], align 4 4487 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4488 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 4489 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4490 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 4491 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4492 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 4493 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4494 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4495 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4496 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4 4497 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4498 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4 4499 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4500 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 4501 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4502 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 4503 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4504 // CHECK11-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 4 4505 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4506 // CHECK11-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 4 4507 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4508 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 4509 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4510 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 4511 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4512 // CHECK11-NEXT: store i64 10, ptr [[TMP13]], align 8 4513 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4514 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 4515 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4516 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 4517 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4518 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 4519 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4520 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4 4521 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.region_id, ptr [[KERNEL_ARGS]]) 4522 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 4523 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4524 // CHECK11: omp_offload.failed: 4525 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86(ptr [[A]]) #[[ATTR3]] 4526 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4527 // CHECK11: omp_offload.cont: 4528 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4529 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP20]], align 4 4530 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4531 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP21]], align 4 4532 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 4533 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 4534 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4535 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4536 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 4537 // CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 4 4538 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 4539 // CHECK11-NEXT: store i32 1, ptr [[TMP26]], align 4 4540 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 4541 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 4542 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 4543 // CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 4544 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 4545 // CHECK11-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 4 4546 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 4547 // CHECK11-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 4 4548 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 4549 // CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 4 4550 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 4551 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 4 4552 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 4553 // CHECK11-NEXT: store i64 10, ptr [[TMP33]], align 8 4554 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 4555 // CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 8 4556 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 4557 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 4558 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 4559 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 4560 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 4561 // CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 4 4562 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.region_id, ptr [[KERNEL_ARGS5]]) 4563 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 4564 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 4565 // CHECK11: omp_offload.failed6: 4566 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91(ptr [[A]]) #[[ATTR3]] 4567 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]] 4568 // CHECK11: omp_offload.cont7: 4569 // CHECK11-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 4570 // CHECK11-NEXT: store i32 [[TMP40]], ptr [[M_CASTED]], align 4 4571 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[M_CASTED]], align 4 4572 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 4573 // CHECK11-NEXT: store i32 [[TMP41]], ptr [[TMP42]], align 4 4574 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 4575 // CHECK11-NEXT: store i32 [[TMP41]], ptr [[TMP43]], align 4 4576 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 4577 // CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 4 4578 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 4579 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP45]], align 4 4580 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 4581 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP46]], align 4 4582 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 4583 // CHECK11-NEXT: store ptr null, ptr [[TMP47]], align 4 4584 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 4585 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 4586 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 4587 // CHECK11-NEXT: store i32 3, ptr [[TMP50]], align 4 4588 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 4589 // CHECK11-NEXT: store i32 2, ptr [[TMP51]], align 4 4590 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 4591 // CHECK11-NEXT: store ptr [[TMP48]], ptr [[TMP52]], align 4 4592 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 4593 // CHECK11-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 4 4594 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 4595 // CHECK11-NEXT: store ptr @.offload_sizes.9, ptr [[TMP54]], align 4 4596 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 4597 // CHECK11-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP55]], align 4 4598 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 4599 // CHECK11-NEXT: store ptr null, ptr [[TMP56]], align 4 4600 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 4601 // CHECK11-NEXT: store ptr null, ptr [[TMP57]], align 4 4602 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 4603 // CHECK11-NEXT: store i64 10, ptr [[TMP58]], align 8 4604 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 4605 // CHECK11-NEXT: store i64 0, ptr [[TMP59]], align 8 4606 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 4607 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP60]], align 4 4608 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 4609 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 4610 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 4611 // CHECK11-NEXT: store i32 0, ptr [[TMP62]], align 4 4612 // CHECK11-NEXT: [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.region_id, ptr [[KERNEL_ARGS12]]) 4613 // CHECK11-NEXT: [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0 4614 // CHECK11-NEXT: br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 4615 // CHECK11: omp_offload.failed13: 4616 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96(i32 [[TMP41]], ptr [[A]]) #[[ATTR3]] 4617 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]] 4618 // CHECK11: omp_offload.cont14: 4619 // CHECK11-NEXT: ret i32 0 4620 // 4621 // 4622 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86 4623 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4624 // CHECK11-NEXT: entry: 4625 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4626 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4627 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4628 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined, ptr [[TMP0]]) 4629 // CHECK11-NEXT: ret void 4630 // 4631 // 4632 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined 4633 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4634 // CHECK11-NEXT: entry: 4635 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4636 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4637 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4638 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4639 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4640 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4641 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4642 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4643 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4644 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4645 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4646 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4647 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4648 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4649 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4650 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 4651 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4652 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4653 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4654 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4655 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4656 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4657 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4658 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4659 // CHECK11: cond.true: 4660 // CHECK11-NEXT: br label [[COND_END:%.*]] 4661 // CHECK11: cond.false: 4662 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4663 // CHECK11-NEXT: br label [[COND_END]] 4664 // CHECK11: cond.end: 4665 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4666 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4667 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4668 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4669 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4670 // CHECK11: omp.inner.for.cond: 4671 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31:![0-9]+]] 4672 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP31]] 4673 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4674 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4675 // CHECK11: omp.inner.for.body: 4676 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP31]] 4677 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP31]] 4678 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP31]] 4679 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4680 // CHECK11: omp.inner.for.inc: 4681 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 4682 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP31]] 4683 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4684 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 4685 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] 4686 // CHECK11: omp.inner.for.end: 4687 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4688 // CHECK11: omp.loop.exit: 4689 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4690 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4691 // CHECK11-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4692 // CHECK11-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4693 // CHECK11: .omp.final.then: 4694 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 4695 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4696 // CHECK11: .omp.final.done: 4697 // CHECK11-NEXT: ret void 4698 // 4699 // 4700 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l86.omp_outlined.omp_outlined 4701 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4702 // CHECK11-NEXT: entry: 4703 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4704 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4705 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4706 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4707 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4708 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4709 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4710 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4711 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4712 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4713 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4714 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4715 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4716 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4717 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4718 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4719 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4720 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4721 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4722 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 4723 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4724 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4725 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4726 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4727 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4728 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4729 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4730 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 4731 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4732 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4733 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 4734 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4735 // CHECK11: cond.true: 4736 // CHECK11-NEXT: br label [[COND_END:%.*]] 4737 // CHECK11: cond.false: 4738 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4739 // CHECK11-NEXT: br label [[COND_END]] 4740 // CHECK11: cond.end: 4741 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4742 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4743 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4744 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 4745 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4746 // CHECK11: omp.inner.for.cond: 4747 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 4748 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 4749 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4750 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4751 // CHECK11: omp.inner.for.body: 4752 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 4753 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4754 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4755 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP34]] 4756 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP34]] 4757 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 4758 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP34]] 4759 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4760 // CHECK11: omp.body.continue: 4761 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4762 // CHECK11: omp.inner.for.inc: 4763 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 4764 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4765 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 4766 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] 4767 // CHECK11: omp.inner.for.end: 4768 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4769 // CHECK11: omp.loop.exit: 4770 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 4771 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4772 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4773 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4774 // CHECK11: .omp.final.then: 4775 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 4776 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4777 // CHECK11: .omp.final.done: 4778 // CHECK11-NEXT: ret void 4779 // 4780 // 4781 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91 4782 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4783 // CHECK11-NEXT: entry: 4784 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4785 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4786 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4787 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined, ptr [[TMP0]]) 4788 // CHECK11-NEXT: ret void 4789 // 4790 // 4791 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined 4792 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4793 // CHECK11-NEXT: entry: 4794 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4795 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4796 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4797 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4798 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4799 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4800 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4801 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4802 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4803 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4804 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4805 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4806 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4807 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4808 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4809 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 4810 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4811 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4812 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4813 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4814 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4815 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4816 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4817 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4818 // CHECK11: cond.true: 4819 // CHECK11-NEXT: br label [[COND_END:%.*]] 4820 // CHECK11: cond.false: 4821 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4822 // CHECK11-NEXT: br label [[COND_END]] 4823 // CHECK11: cond.end: 4824 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4825 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4826 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4827 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4828 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4829 // CHECK11: omp.inner.for.cond: 4830 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37:![0-9]+]] 4831 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP37]] 4832 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4833 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4834 // CHECK11: omp.inner.for.body: 4835 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP37]] 4836 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP37]] 4837 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP37]] 4838 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4839 // CHECK11: omp.inner.for.inc: 4840 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 4841 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP37]] 4842 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4843 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 4844 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] 4845 // CHECK11: omp.inner.for.end: 4846 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4847 // CHECK11: omp.loop.exit: 4848 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4849 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4850 // CHECK11-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4851 // CHECK11-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4852 // CHECK11: .omp.final.then: 4853 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 4854 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4855 // CHECK11: .omp.final.done: 4856 // CHECK11-NEXT: ret void 4857 // 4858 // 4859 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l91.omp_outlined.omp_outlined 4860 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4861 // CHECK11-NEXT: entry: 4862 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4863 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4864 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4865 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4866 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4867 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4868 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4869 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4870 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4871 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4872 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4873 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4874 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4875 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4876 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4877 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4878 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4879 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4880 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4881 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 4882 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4883 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4884 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4885 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4886 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4887 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4888 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4889 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 4890 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4891 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4892 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 4893 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4894 // CHECK11: cond.true: 4895 // CHECK11-NEXT: br label [[COND_END:%.*]] 4896 // CHECK11: cond.false: 4897 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4898 // CHECK11-NEXT: br label [[COND_END]] 4899 // CHECK11: cond.end: 4900 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4901 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4902 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4903 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 4904 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4905 // CHECK11: omp.inner.for.cond: 4906 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40:![0-9]+]] 4907 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP40]] 4908 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4909 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4910 // CHECK11: omp.inner.for.body: 4911 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 4912 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4913 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4914 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP40]] 4915 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP40]] 4916 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 4917 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP40]] 4918 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4919 // CHECK11: omp.body.continue: 4920 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4921 // CHECK11: omp.inner.for.inc: 4922 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 4923 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4924 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 4925 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] 4926 // CHECK11: omp.inner.for.end: 4927 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4928 // CHECK11: omp.loop.exit: 4929 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 4930 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4931 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4932 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4933 // CHECK11: .omp.final.then: 4934 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 4935 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4936 // CHECK11: .omp.final.done: 4937 // CHECK11-NEXT: ret void 4938 // 4939 // 4940 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96 4941 // CHECK11-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4942 // CHECK11-NEXT: entry: 4943 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 4944 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4945 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4946 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4947 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 4948 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4949 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4950 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4 4951 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 4952 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4953 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 4954 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 4955 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined, ptr [[TMP0]], i32 [[TMP3]]) 4956 // CHECK11-NEXT: ret void 4957 // 4958 // 4959 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined 4960 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4961 // CHECK11-NEXT: entry: 4962 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4963 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4964 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4965 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4966 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4967 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4968 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4969 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4970 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4971 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4972 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4973 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4974 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4975 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4976 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4977 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4978 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4979 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4980 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 4981 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4982 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4983 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4984 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4985 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 4986 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP1]]) 4987 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4988 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 4989 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4990 // CHECK11: cond.true: 4991 // CHECK11-NEXT: br label [[COND_END:%.*]] 4992 // CHECK11: cond.false: 4993 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4994 // CHECK11-NEXT: br label [[COND_END]] 4995 // CHECK11: cond.end: 4996 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4997 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4998 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4999 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5000 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5001 // CHECK11: omp.inner.for.cond: 5002 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]] 5003 // CHECK11-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP7]], 10 5004 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5005 // CHECK11: omp.inner.for.body: 5006 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP43]] 5007 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 5008 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP43]] 5009 // CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP43]] 5010 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP43]] 5011 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]), !llvm.access.group [[ACC_GRP43]] 5012 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5013 // CHECK11: omp.inner.for.inc: 5014 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 5015 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP43]] 5016 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5017 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 5018 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP43]] 5019 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP43]] 5020 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 5021 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP43]] 5022 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 5023 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP43]] 5024 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 5025 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 5026 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 5027 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP18]], 9 5028 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 5029 // CHECK11: cond.true5: 5030 // CHECK11-NEXT: br label [[COND_END7:%.*]] 5031 // CHECK11: cond.false6: 5032 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 5033 // CHECK11-NEXT: br label [[COND_END7]] 5034 // CHECK11: cond.end7: 5035 // CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP19]], [[COND_FALSE6]] ] 5036 // CHECK11-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 5037 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP43]] 5038 // CHECK11-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 5039 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] 5040 // CHECK11: omp.inner.for.end: 5041 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5042 // CHECK11: omp.loop.exit: 5043 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 5044 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5045 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 5046 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5047 // CHECK11: .omp.final.then: 5048 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 5049 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 5050 // CHECK11: .omp.final.done: 5051 // CHECK11-NEXT: ret void 5052 // 5053 // 5054 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l96.omp_outlined.omp_outlined 5055 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5056 // CHECK11-NEXT: entry: 5057 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5058 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5059 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5060 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5061 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 5062 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 5063 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5064 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 5065 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5066 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5067 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5068 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5069 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 5070 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5071 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5072 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 5073 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 5074 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 5075 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5076 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 5077 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5078 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 5079 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 5080 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 5081 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 5082 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 5083 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5084 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5085 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5086 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 5087 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5088 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5089 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 5090 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5091 // CHECK11: cond.true: 5092 // CHECK11-NEXT: br label [[COND_END:%.*]] 5093 // CHECK11: cond.false: 5094 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5095 // CHECK11-NEXT: br label [[COND_END]] 5096 // CHECK11: cond.end: 5097 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5098 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5099 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5100 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 5101 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5102 // CHECK11: omp.inner.for.cond: 5103 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]] 5104 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 5105 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5106 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5107 // CHECK11: omp.inner.for.body: 5108 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 5109 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5110 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5111 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP46]] 5112 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP46]] 5113 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 5114 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP46]] 5115 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5116 // CHECK11: omp.body.continue: 5117 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5118 // CHECK11: omp.inner.for.inc: 5119 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 5120 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 5121 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 5122 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] 5123 // CHECK11: omp.inner.for.end: 5124 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5125 // CHECK11: omp.loop.exit: 5126 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 5127 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5128 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 5129 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5130 // CHECK11: .omp.final.then: 5131 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 5132 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 5133 // CHECK11: .omp.final.done: 5134 // CHECK11-NEXT: ret void 5135 // 5136 // 5137 // CHECK13-LABEL: define {{[^@]+}}@main 5138 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 5139 // CHECK13-NEXT: entry: 5140 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5141 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5142 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 5143 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 5144 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 5145 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 5146 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 5147 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5148 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5149 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5150 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5151 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5152 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5153 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5154 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 5155 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 5156 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 5157 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 5158 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 5159 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 5160 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4 5161 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 5162 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 5163 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 5164 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 5165 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 5166 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 5167 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 5168 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 5169 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4 5170 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 5171 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4 5172 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 5173 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 5174 // CHECK13-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 5175 // CHECK13-NEXT: store i32 100, ptr [[N]], align 4 5176 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 5177 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 5178 // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 5179 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 5180 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 5181 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 5182 // CHECK13-NEXT: store i32 10, ptr [[M]], align 4 5183 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 5184 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 5185 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5186 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5187 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5188 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5189 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5190 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5191 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5192 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5193 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5194 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5195 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5196 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 5197 // CHECK13: simd.if.then: 5198 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5199 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 5200 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5201 // CHECK13: omp.inner.for.cond: 5202 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 5203 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 5204 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5205 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5206 // CHECK13: omp.inner.for.body: 5207 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 5208 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5209 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5210 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 5211 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 5212 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 5213 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]] 5214 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 5215 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5216 // CHECK13: omp.body.continue: 5217 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5218 // CHECK13: omp.inner.for.inc: 5219 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 5220 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 5221 // CHECK13-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 5222 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 5223 // CHECK13: omp.inner.for.end: 5224 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5225 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 5226 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 5227 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 5228 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 5229 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 5230 // CHECK13-NEXT: br label [[SIMD_IF_END]] 5231 // CHECK13: simd.if.end: 5232 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[N]], align 4 5233 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTCAPTURE_EXPR_11]], align 4 5234 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 5235 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 5236 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 5237 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 5238 // CHECK13-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4 5239 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 4 5240 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 5241 // CHECK13-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_UB17]], align 4 5242 // CHECK13-NEXT: store i32 0, ptr [[I18]], align 4 5243 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 5244 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 5245 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 5246 // CHECK13: simd.if.then20: 5247 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4 5248 // CHECK13-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV21]], align 4 5249 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 5250 // CHECK13: omp.inner.for.cond23: 5251 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 5252 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP6]] 5253 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 5254 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 5255 // CHECK13: omp.inner.for.body25: 5256 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 5257 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 5258 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 5259 // CHECK13-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]] 5260 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]] 5261 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 5262 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM28]] 5263 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP6]] 5264 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 5265 // CHECK13: omp.body.continue30: 5266 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 5267 // CHECK13: omp.inner.for.inc31: 5268 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 5269 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 5270 // CHECK13-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 5271 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 5272 // CHECK13: omp.inner.for.end33: 5273 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 5274 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 5275 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 5276 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 5277 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 5278 // CHECK13-NEXT: store i32 [[ADD37]], ptr [[I22]], align 4 5279 // CHECK13-NEXT: br label [[SIMD_IF_END38]] 5280 // CHECK13: simd.if.end38: 5281 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[M]], align 4 5282 // CHECK13-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_39]], align 4 5283 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[N]], align 4 5284 // CHECK13-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR_41]], align 4 5285 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 5286 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 5287 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 5288 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 5289 // CHECK13-NEXT: store i32 [[SUB45]], ptr [[DOTCAPTURE_EXPR_42]], align 4 5290 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB46]], align 4 5291 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_42]], align 4 5292 // CHECK13-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_UB47]], align 4 5293 // CHECK13-NEXT: store i32 0, ptr [[I48]], align 4 5294 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 5295 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 5296 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 5297 // CHECK13: simd.if.then50: 5298 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_LB46]], align 4 5299 // CHECK13-NEXT: store i32 [[TMP30]], ptr [[DOTOMP_IV51]], align 4 5300 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 5301 // CHECK13: omp.inner.for.cond53: 5302 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 5303 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_UB47]], align 4, !llvm.access.group [[ACC_GRP9]] 5304 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 5305 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 5306 // CHECK13: omp.inner.for.body55: 5307 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 5308 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 5309 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 5310 // CHECK13-NEXT: store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]] 5311 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]] 5312 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 5313 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM58]] 5314 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX59]], align 4, !llvm.access.group [[ACC_GRP9]] 5315 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 5316 // CHECK13: omp.body.continue60: 5317 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 5318 // CHECK13: omp.inner.for.inc61: 5319 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 5320 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 5321 // CHECK13-NEXT: store i32 [[ADD62]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 5322 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 5323 // CHECK13: omp.inner.for.end63: 5324 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 5325 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 5326 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 5327 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 5328 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 5329 // CHECK13-NEXT: store i32 [[ADD67]], ptr [[I52]], align 4 5330 // CHECK13-NEXT: br label [[SIMD_IF_END68]] 5331 // CHECK13: simd.if.end68: 5332 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 5333 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 5334 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 5335 // CHECK13-NEXT: [[TMP38:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 5336 // CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP38]]) 5337 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4 5338 // CHECK13-NEXT: ret i32 [[TMP39]] 5339 // 5340 // 5341 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5342 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 5343 // CHECK13-NEXT: entry: 5344 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5345 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5346 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 5347 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5348 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5349 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5350 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5351 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5352 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 5353 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 5354 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 5355 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 5356 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 5357 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5358 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 5359 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 5360 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 5361 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 5362 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 5363 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 5364 // CHECK13-NEXT: store i32 10, ptr [[M]], align 4 5365 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5366 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 5367 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5368 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 5369 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5370 // CHECK13: omp.inner.for.cond: 5371 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 5372 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 5373 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 5374 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5375 // CHECK13: omp.inner.for.body: 5376 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 5377 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 5378 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5379 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 5380 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 5381 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 5382 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 5383 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 5384 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5385 // CHECK13: omp.body.continue: 5386 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5387 // CHECK13: omp.inner.for.inc: 5388 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 5389 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 5390 // CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 5391 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 5392 // CHECK13: omp.inner.for.end: 5393 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 5394 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 5395 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 4 5396 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 5397 // CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4 5398 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 5399 // CHECK13: omp.inner.for.cond7: 5400 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 5401 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP15]] 5402 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5403 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 5404 // CHECK13: omp.inner.for.body9: 5405 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]] 5406 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 5407 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 5408 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]] 5409 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]] 5410 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 5411 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM12]] 5412 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX13]], align 4, !llvm.access.group [[ACC_GRP15]] 5413 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 5414 // CHECK13: omp.body.continue14: 5415 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 5416 // CHECK13: omp.inner.for.inc15: 5417 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]] 5418 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 5419 // CHECK13-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]] 5420 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 5421 // CHECK13: omp.inner.for.end17: 5422 // CHECK13-NEXT: store i32 10, ptr [[I6]], align 4 5423 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[M]], align 4 5424 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 4 5425 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB19]], align 4 5426 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB20]], align 4 5427 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 4 5428 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV21]], align 4 5429 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 5430 // CHECK13: omp.inner.for.cond23: 5431 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 5432 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP18]] 5433 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 5434 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 5435 // CHECK13: omp.inner.for.body25: 5436 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]] 5437 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP16]], 1 5438 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 5439 // CHECK13-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]] 5440 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]] 5441 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP17]] to i64 5442 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM28]] 5443 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP18]] 5444 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 5445 // CHECK13: omp.body.continue30: 5446 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 5447 // CHECK13: omp.inner.for.inc31: 5448 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]] 5449 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP18]], 1 5450 // CHECK13-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]] 5451 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 5452 // CHECK13: omp.inner.for.end33: 5453 // CHECK13-NEXT: store i32 10, ptr [[I22]], align 4 5454 // CHECK13-NEXT: ret i32 0 5455 // 5456 // 5457 // CHECK15-LABEL: define {{[^@]+}}@main 5458 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 5459 // CHECK15-NEXT: entry: 5460 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5461 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5462 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 5463 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 5464 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 5465 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 5466 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 5467 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 5468 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5469 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5470 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5471 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5472 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 5473 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5474 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 5475 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 5476 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 5477 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 5478 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 5479 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 5480 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4 5481 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 5482 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4 5483 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 5484 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 5485 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 5486 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 5487 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 5488 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 5489 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4 5490 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 5491 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4 5492 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 5493 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 5494 // CHECK15-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 5495 // CHECK15-NEXT: store i32 100, ptr [[N]], align 4 5496 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 5497 // CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 5498 // CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 5499 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 5500 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 5501 // CHECK15-NEXT: store i32 10, ptr [[M]], align 4 5502 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 5503 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5504 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5505 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5506 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5507 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5508 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5509 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5510 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5511 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 5512 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 5513 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5514 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5515 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 5516 // CHECK15: simd.if.then: 5517 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5518 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5519 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5520 // CHECK15: omp.inner.for.cond: 5521 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 5522 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 5523 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5524 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5525 // CHECK15: omp.inner.for.body: 5526 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 5527 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5528 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5529 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 5530 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 5531 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP10]] 5532 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 5533 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5534 // CHECK15: omp.body.continue: 5535 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5536 // CHECK15: omp.inner.for.inc: 5537 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 5538 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 5539 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 5540 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 5541 // CHECK15: omp.inner.for.end: 5542 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5543 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 5544 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 5545 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 5546 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 5547 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 5548 // CHECK15-NEXT: br label [[SIMD_IF_END]] 5549 // CHECK15: simd.if.end: 5550 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[N]], align 4 5551 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTCAPTURE_EXPR_11]], align 4 5552 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 5553 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 5554 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 5555 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 5556 // CHECK15-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4 5557 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 4 5558 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 5559 // CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_UB17]], align 4 5560 // CHECK15-NEXT: store i32 0, ptr [[I18]], align 4 5561 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 5562 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 5563 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 5564 // CHECK15: simd.if.then20: 5565 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4 5566 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV21]], align 4 5567 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 5568 // CHECK15: omp.inner.for.cond23: 5569 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 5570 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP7]] 5571 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 5572 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 5573 // CHECK15: omp.inner.for.body25: 5574 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 5575 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 5576 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 5577 // CHECK15-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]] 5578 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]] 5579 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP21]] 5580 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX28]], align 4, !llvm.access.group [[ACC_GRP7]] 5581 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 5582 // CHECK15: omp.body.continue29: 5583 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 5584 // CHECK15: omp.inner.for.inc30: 5585 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 5586 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 5587 // CHECK15-NEXT: store i32 [[ADD31]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 5588 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 5589 // CHECK15: omp.inner.for.end32: 5590 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 5591 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 5592 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 5593 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 5594 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 5595 // CHECK15-NEXT: store i32 [[ADD36]], ptr [[I22]], align 4 5596 // CHECK15-NEXT: br label [[SIMD_IF_END37]] 5597 // CHECK15: simd.if.end37: 5598 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[M]], align 4 5599 // CHECK15-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_38]], align 4 5600 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 4 5601 // CHECK15-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_40]], align 4 5602 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 5603 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 5604 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 5605 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 5606 // CHECK15-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 5607 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB45]], align 4 5608 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 5609 // CHECK15-NEXT: store i32 [[TMP27]], ptr [[DOTOMP_UB46]], align 4 5610 // CHECK15-NEXT: store i32 0, ptr [[I47]], align 4 5611 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 5612 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 5613 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 5614 // CHECK15: simd.if.then49: 5615 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_LB45]], align 4 5616 // CHECK15-NEXT: store i32 [[TMP29]], ptr [[DOTOMP_IV50]], align 4 5617 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 5618 // CHECK15: omp.inner.for.cond52: 5619 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 5620 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_UB46]], align 4, !llvm.access.group [[ACC_GRP10]] 5621 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 5622 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 5623 // CHECK15: omp.inner.for.body54: 5624 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 5625 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 5626 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 5627 // CHECK15-NEXT: store i32 [[ADD56]], ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]] 5628 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]] 5629 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP33]] 5630 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX57]], align 4, !llvm.access.group [[ACC_GRP10]] 5631 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 5632 // CHECK15: omp.body.continue58: 5633 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 5634 // CHECK15: omp.inner.for.inc59: 5635 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 5636 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 5637 // CHECK15-NEXT: store i32 [[ADD60]], ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 5638 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 5639 // CHECK15: omp.inner.for.end61: 5640 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 5641 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 5642 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 5643 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 5644 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 5645 // CHECK15-NEXT: store i32 [[ADD65]], ptr [[I51]], align 4 5646 // CHECK15-NEXT: br label [[SIMD_IF_END66]] 5647 // CHECK15: simd.if.end66: 5648 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 5649 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 5650 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 5651 // CHECK15-NEXT: [[TMP37:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 5652 // CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP37]]) 5653 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 4 5654 // CHECK15-NEXT: ret i32 [[TMP38]] 5655 // 5656 // 5657 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5658 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 5659 // CHECK15-NEXT: entry: 5660 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5661 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5662 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 5663 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 5664 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5665 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5666 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5667 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 5668 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 5669 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 5670 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 5671 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 5672 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 5673 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5674 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 5675 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 5676 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 5677 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 5678 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 5679 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 5680 // CHECK15-NEXT: store i32 10, ptr [[M]], align 4 5681 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5682 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 5683 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5684 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 5685 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5686 // CHECK15: omp.inner.for.cond: 5687 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 5688 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 5689 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 5690 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5691 // CHECK15: omp.inner.for.body: 5692 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 5693 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 5694 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5695 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 5696 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 5697 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 5698 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 5699 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5700 // CHECK15: omp.body.continue: 5701 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5702 // CHECK15: omp.inner.for.inc: 5703 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 5704 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 5705 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 5706 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 5707 // CHECK15: omp.inner.for.end: 5708 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 5709 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 5710 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 4 5711 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 5712 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4 5713 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 5714 // CHECK15: omp.inner.for.cond7: 5715 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 5716 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP16]] 5717 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5718 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 5719 // CHECK15: omp.inner.for.body9: 5720 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]] 5721 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 5722 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 5723 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]] 5724 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]] 5725 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP10]] 5726 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP16]] 5727 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 5728 // CHECK15: omp.body.continue13: 5729 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 5730 // CHECK15: omp.inner.for.inc14: 5731 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]] 5732 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 5733 // CHECK15-NEXT: store i32 [[ADD15]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]] 5734 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 5735 // CHECK15: omp.inner.for.end16: 5736 // CHECK15-NEXT: store i32 10, ptr [[I6]], align 4 5737 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[M]], align 4 5738 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 4 5739 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 4 5740 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB19]], align 4 5741 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 4 5742 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV20]], align 4 5743 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 5744 // CHECK15: omp.inner.for.cond22: 5745 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 5746 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4, !llvm.access.group [[ACC_GRP19]] 5747 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 5748 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 5749 // CHECK15: omp.inner.for.body24: 5750 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]] 5751 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP16]], 1 5752 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 5753 // CHECK15-NEXT: store i32 [[ADD26]], ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]] 5754 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]] 5755 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP17]] 5756 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX27]], align 4, !llvm.access.group [[ACC_GRP19]] 5757 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 5758 // CHECK15: omp.body.continue28: 5759 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 5760 // CHECK15: omp.inner.for.inc29: 5761 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]] 5762 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP18]], 1 5763 // CHECK15-NEXT: store i32 [[ADD30]], ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]] 5764 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 5765 // CHECK15: omp.inner.for.end31: 5766 // CHECK15-NEXT: store i32 10, ptr [[I21]], align 4 5767 // CHECK15-NEXT: ret i32 0 5768 // 5769