1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 9 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 12 13 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 16 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 19 #ifdef CK1 20 21 int a[100]; 22 23 int teams_argument_global(int n){ 24 int te = n / 128; 25 int th = 128; 26 // discard n_addr 27 28 29 #pragma omp target 30 #pragma omp teams distribute parallel for simd num_teams(te), thread_limit(th) simdlen(64) 31 for(int i = 0; i < n; i++) { 32 a[i] = 0; 33 } 34 35 int i; 36 #pragma omp target 37 {{{ 38 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 39 for(i = 0; i < n; i++) { 40 a[i] = 0; 41 } 42 }}} 43 // outlined target regions 44 45 46 47 48 return a[0]; 49 } 50 51 52 #endif // CK1 53 54 // Test host codegen. 55 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 57 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 58 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 61 62 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 64 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 65 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 68 #ifdef CK2 69 70 int teams_local_arg(void) { 71 int n = 100; 72 int a[n], i; 73 74 #pragma omp target 75 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 76 for(i = 0; i < n; i++) { 77 a[i] = 0; 78 } 79 80 // outlined target region 81 82 83 return a[0]; 84 } 85 86 87 #endif // CK2 88 89 // Test host codegen. 90 // RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 91 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17 93 // RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 94 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19 96 97 // RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 98 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21 100 // RUN: %clang_cc1 -DCK3 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 101 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK23 103 #ifdef CK3 104 105 106 template <typename T, int X, long long Y> 107 struct SS{ 108 T a[X]; 109 float b; 110 int foo(void) { 111 int i; 112 #pragma omp target 113 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 114 for(i = 0; i < X; i++) { 115 a[i] = (T)0; 116 } 117 118 // outlined target region 119 120 121 return a[0]; 122 } 123 }; 124 125 int teams_template_struct(void) { 126 SS<int, 123, 456> V; 127 return V.foo(); 128 129 } 130 131 #endif // CK3 132 133 // Test host codegen. 134 // RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25 135 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 136 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25 137 // RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27 138 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 139 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK27 140 141 // RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29 142 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 143 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK29 144 // RUN: %clang_cc1 -DCK4 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31 145 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 146 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK31 147 148 #ifdef CK4 149 150 template <typename T, int n> 151 int tmain(T argc) { 152 T a[n]; 153 int te = n/128; 154 int th = 128; 155 #pragma omp target 156 #pragma omp teams distribute parallel for simd num_teams(te) thread_limit(th) simdlen(64) 157 for(int i = 0; i < n; i++) { 158 a[i] = (T)0; 159 } 160 return 0; 161 } 162 163 int main (int argc, char **argv) { 164 int n = 100; 165 int a[n], i; 166 #pragma omp target 167 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i) 168 for(i = 0; i < n; i++) { 169 a[i] = 0; 170 } 171 return tmain<int, 10>(argc); 172 } 173 174 175 176 177 178 179 180 181 #endif // CK4 182 #endif 183 184 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 185 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 186 // CHECK1-NEXT: entry: 187 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 191 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 192 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 193 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 194 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 195 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 196 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 200 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 201 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 202 // CHECK1-NEXT: [[N_CASTED4:%.*]] = alloca i64, align 8 203 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x ptr], align 8 204 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x ptr], align 8 205 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x ptr], align 8 206 // CHECK1-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 207 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 210 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 211 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 212 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 213 // CHECK1-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 214 // CHECK1-NEXT: store i32 128, ptr [[TH]], align 4 215 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4 216 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[TE_CASTED]], align 4 217 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[TE_CASTED]], align 8 218 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH]], align 4 219 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[TH_CASTED]], align 4 220 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TH_CASTED]], align 8 221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4 222 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 4 223 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 8 224 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 225 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8 226 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 227 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 228 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 229 // CHECK1-NEXT: store ptr null, ptr [[TMP9]], align 8 230 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 231 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP10]], align 8 232 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 233 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP11]], align 8 234 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 235 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 236 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 237 // CHECK1-NEXT: store i64 [[TMP6]], ptr [[TMP13]], align 8 238 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 239 // CHECK1-NEXT: store i64 [[TMP6]], ptr [[TMP14]], align 8 240 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 241 // CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8 242 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 243 // CHECK1-NEXT: store ptr @a, ptr [[TMP16]], align 8 244 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 245 // CHECK1-NEXT: store ptr @a, ptr [[TMP17]], align 8 246 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 247 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 248 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 249 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TE]], align 4 251 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TH]], align 4 252 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[N_ADDR]], align 4 253 // CHECK1-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR_]], align 4 254 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 255 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP24]], 0 256 // CHECK1-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 257 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 258 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 259 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 260 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], 1 261 // CHECK1-NEXT: [[TMP26:%.*]] = zext i32 [[ADD]] to i64 262 // CHECK1-NEXT: [[TMP27:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP21]], 0 263 // CHECK1-NEXT: [[TMP28:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP22]], 0 264 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 265 // CHECK1-NEXT: store i32 3, ptr [[TMP29]], align 4 266 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 267 // CHECK1-NEXT: store i32 4, ptr [[TMP30]], align 4 268 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 269 // CHECK1-NEXT: store ptr [[TMP19]], ptr [[TMP31]], align 8 270 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 271 // CHECK1-NEXT: store ptr [[TMP20]], ptr [[TMP32]], align 8 272 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 273 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP33]], align 8 274 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 275 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP34]], align 8 276 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 277 // CHECK1-NEXT: store ptr null, ptr [[TMP35]], align 8 278 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 279 // CHECK1-NEXT: store ptr null, ptr [[TMP36]], align 8 280 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 281 // CHECK1-NEXT: store i64 [[TMP26]], ptr [[TMP37]], align 8 282 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 283 // CHECK1-NEXT: store i64 0, ptr [[TMP38]], align 8 284 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 285 // CHECK1-NEXT: store [3 x i32] [[TMP27]], ptr [[TMP39]], align 4 286 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 287 // CHECK1-NEXT: store [3 x i32] [[TMP28]], ptr [[TMP40]], align 4 288 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 289 // CHECK1-NEXT: store i32 0, ptr [[TMP41]], align 4 290 // CHECK1-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP21]], i32 [[TMP22]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, ptr [[KERNEL_ARGS]]) 291 // CHECK1-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 292 // CHECK1-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 293 // CHECK1: omp_offload.failed: 294 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], ptr @a) #[[ATTR2:[0-9]+]] 295 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 296 // CHECK1: omp_offload.cont: 297 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[I]], align 4 298 // CHECK1-NEXT: store i32 [[TMP44]], ptr [[I_CASTED]], align 4 299 // CHECK1-NEXT: [[TMP45:%.*]] = load i64, ptr [[I_CASTED]], align 8 300 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[N_ADDR]], align 4 301 // CHECK1-NEXT: store i32 [[TMP46]], ptr [[N_CASTED4]], align 4 302 // CHECK1-NEXT: [[TMP47:%.*]] = load i64, ptr [[N_CASTED4]], align 8 303 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 304 // CHECK1-NEXT: store ptr @a, ptr [[TMP48]], align 8 305 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 306 // CHECK1-NEXT: store ptr @a, ptr [[TMP49]], align 8 307 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 308 // CHECK1-NEXT: store ptr null, ptr [[TMP50]], align 8 309 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 310 // CHECK1-NEXT: store i64 [[TMP45]], ptr [[TMP51]], align 8 311 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 312 // CHECK1-NEXT: store i64 [[TMP45]], ptr [[TMP52]], align 8 313 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 314 // CHECK1-NEXT: store ptr null, ptr [[TMP53]], align 8 315 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 316 // CHECK1-NEXT: store i64 [[TMP47]], ptr [[TMP54]], align 8 317 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 318 // CHECK1-NEXT: store i64 [[TMP47]], ptr [[TMP55]], align 8 319 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 320 // CHECK1-NEXT: store ptr null, ptr [[TMP56]], align 8 321 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 322 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 323 // CHECK1-NEXT: [[TMP59:%.*]] = load i32, ptr [[N_ADDR]], align 4 324 // CHECK1-NEXT: store i32 [[TMP59]], ptr [[DOTCAPTURE_EXPR_9]], align 4 325 // CHECK1-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 326 // CHECK1-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP60]], 0 327 // CHECK1-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 328 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 329 // CHECK1-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 330 // CHECK1-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 331 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP61]], 1 332 // CHECK1-NEXT: [[TMP62:%.*]] = zext i32 [[ADD14]] to i64 333 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 334 // CHECK1-NEXT: store i32 3, ptr [[TMP63]], align 4 335 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 336 // CHECK1-NEXT: store i32 3, ptr [[TMP64]], align 4 337 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 338 // CHECK1-NEXT: store ptr [[TMP57]], ptr [[TMP65]], align 8 339 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 340 // CHECK1-NEXT: store ptr [[TMP58]], ptr [[TMP66]], align 8 341 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 342 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP67]], align 8 343 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 344 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP68]], align 8 345 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 346 // CHECK1-NEXT: store ptr null, ptr [[TMP69]], align 8 347 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 348 // CHECK1-NEXT: store ptr null, ptr [[TMP70]], align 8 349 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 350 // CHECK1-NEXT: store i64 [[TMP62]], ptr [[TMP71]], align 8 351 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 352 // CHECK1-NEXT: store i64 0, ptr [[TMP72]], align 8 353 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 354 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP73]], align 4 355 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 356 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP74]], align 4 357 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 358 // CHECK1-NEXT: store i32 0, ptr [[TMP75]], align 4 359 // CHECK1-NEXT: [[TMP76:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, ptr [[KERNEL_ARGS15]]) 360 // CHECK1-NEXT: [[TMP77:%.*]] = icmp ne i32 [[TMP76]], 0 361 // CHECK1-NEXT: br i1 [[TMP77]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 362 // CHECK1: omp_offload.failed16: 363 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(ptr @a, i64 [[TMP45]], i64 [[TMP47]]) #[[ATTR2]] 364 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]] 365 // CHECK1: omp_offload.cont17: 366 // CHECK1-NEXT: [[TMP78:%.*]] = load i32, ptr @a, align 4 367 // CHECK1-NEXT: ret i32 [[TMP78]] 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 371 // CHECK1-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 374 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 375 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 376 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 377 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]]) 378 // CHECK1-NEXT: store i64 [[TE]], ptr [[TE_ADDR]], align 8 379 // CHECK1-NEXT: store i64 [[TH]], ptr [[TH_ADDR]], align 8 380 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 381 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 382 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 383 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 4 384 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 4 385 // CHECK1-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 386 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined, ptr [[N_ADDR]], ptr [[TMP1]]) 387 // CHECK1-NEXT: ret void 388 // 389 // 390 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined 391 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 392 // CHECK1-NEXT: entry: 393 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 394 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 395 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 396 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 397 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 399 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 400 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 408 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 409 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 410 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 411 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 412 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 413 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4 414 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 415 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 416 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 417 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 418 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 419 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 420 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 421 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 422 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 423 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 424 // CHECK1: omp.precond.then: 425 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 426 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 427 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 428 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 429 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 430 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 431 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 432 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 433 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 434 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 435 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 436 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 437 // CHECK1: cond.true: 438 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 439 // CHECK1-NEXT: br label [[COND_END:%.*]] 440 // CHECK1: cond.false: 441 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 442 // CHECK1-NEXT: br label [[COND_END]] 443 // CHECK1: cond.end: 444 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 445 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 446 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 447 // CHECK1-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 448 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 449 // CHECK1: omp.inner.for.cond: 450 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 451 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 452 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 453 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 454 // CHECK1: omp.inner.for.body: 455 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]] 456 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 457 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 458 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 459 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP5]] 460 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 461 // CHECK1: omp.inner.for.inc: 462 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 463 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]] 464 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 465 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 467 // CHECK1: omp.inner.for.end: 468 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 469 // CHECK1: omp.loop.exit: 470 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 471 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 472 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 473 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 474 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 475 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 476 // CHECK1: .omp.final.then: 477 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 478 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 479 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 480 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 481 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 482 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 483 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 484 // CHECK1: .omp.final.done: 485 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 486 // CHECK1: omp.precond.end: 487 // CHECK1-NEXT: ret void 488 // 489 // 490 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined 491 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 492 // CHECK1-NEXT: entry: 493 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 494 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 495 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 496 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 497 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 498 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 499 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 500 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 501 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 502 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 503 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 504 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 505 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 506 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 507 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 508 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 509 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 510 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 511 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 512 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 513 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 514 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 515 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 516 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 517 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4 518 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 519 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 520 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 521 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 522 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 523 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 524 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 525 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 526 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 527 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 528 // CHECK1: omp.precond.then: 529 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 530 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 531 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 532 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 533 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 534 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 535 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 536 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 537 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 538 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 539 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 540 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 541 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 542 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 543 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 544 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 545 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 546 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 547 // CHECK1: cond.true: 548 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 549 // CHECK1-NEXT: br label [[COND_END:%.*]] 550 // CHECK1: cond.false: 551 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 552 // CHECK1-NEXT: br label [[COND_END]] 553 // CHECK1: cond.end: 554 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 555 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 556 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 557 // CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 558 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 559 // CHECK1: omp.inner.for.cond: 560 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 561 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 562 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 563 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 564 // CHECK1: omp.inner.for.body: 565 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 566 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 567 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 568 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP10]] 569 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP10]] 570 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 571 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 572 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 573 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 574 // CHECK1: omp.body.continue: 575 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 576 // CHECK1: omp.inner.for.inc: 577 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 578 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 579 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 580 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 581 // CHECK1: omp.inner.for.end: 582 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 583 // CHECK1: omp.loop.exit: 584 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 585 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 586 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 587 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 588 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 589 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 590 // CHECK1: .omp.final.then: 591 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 592 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 593 // CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 594 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 595 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 596 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 597 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 598 // CHECK1: .omp.final.done: 599 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 600 // CHECK1: omp.precond.end: 601 // CHECK1-NEXT: ret void 602 // 603 // 604 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36 605 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR1]] { 606 // CHECK1-NEXT: entry: 607 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 608 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 609 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 610 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 611 // CHECK1-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 8 612 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 613 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 614 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], ptr [[TMP0]]) 615 // CHECK1-NEXT: ret void 616 // 617 // 618 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined 619 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 620 // CHECK1-NEXT: entry: 621 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 622 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 623 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 624 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 625 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 626 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 627 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 628 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 629 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 630 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 631 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 632 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 633 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 637 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 638 // CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 639 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 640 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 641 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 642 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 643 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 644 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4 645 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 646 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 647 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 648 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 649 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 650 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 651 // CHECK1-NEXT: store i32 0, ptr [[I3]], align 4 652 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 653 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 654 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 655 // CHECK1: omp.precond.then: 656 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i64 0, i64 0 657 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ] 658 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 659 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 660 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 661 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 662 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 663 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 664 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 665 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 666 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 667 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 668 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 669 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 670 // CHECK1: cond.true: 671 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 672 // CHECK1-NEXT: br label [[COND_END:%.*]] 673 // CHECK1: cond.false: 674 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 675 // CHECK1-NEXT: br label [[COND_END]] 676 // CHECK1: cond.end: 677 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 678 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 679 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 680 // CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 681 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 682 // CHECK1: omp.inner.for.cond: 683 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 684 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 685 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 686 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 687 // CHECK1: omp.inner.for.body: 688 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 689 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 690 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 691 // CHECK1-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 692 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[I4]], ptr [[TMP1]], ptr [[TMP2]]) 693 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 694 // CHECK1: omp.inner.for.inc: 695 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 696 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 697 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 698 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 699 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 700 // CHECK1: omp.inner.for.end: 701 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 702 // CHECK1: omp.loop.exit: 703 // CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 704 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 705 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]]) 706 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 707 // CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 708 // CHECK1-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 709 // CHECK1: .omp.final.then: 710 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 711 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0 712 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 713 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 714 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 715 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4 716 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 717 // CHECK1: .omp.final.done: 718 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 719 // CHECK1: omp.precond.end: 720 // CHECK1-NEXT: ret void 721 // 722 // 723 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined 724 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 725 // CHECK1-NEXT: entry: 726 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 727 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 728 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 729 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 730 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 731 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 732 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 733 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 737 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 738 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 739 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 740 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 741 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 742 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 743 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 744 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4 745 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 746 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 747 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 748 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 749 // CHECK1-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 750 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 751 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 752 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 753 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 754 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 755 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4 756 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 757 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 758 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 759 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 760 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 761 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 762 // CHECK1-NEXT: store i32 0, ptr [[I3]], align 4 763 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 764 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 765 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 766 // CHECK1: omp.precond.then: 767 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i64 0, i64 0 768 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ] 769 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4 770 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START]], align 4 771 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 772 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 773 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 774 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 775 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 776 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 777 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 778 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 779 // CHECK1-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 780 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 781 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 782 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 783 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 784 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP11]]) 785 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 786 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 787 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 788 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 789 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 790 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 791 // CHECK1-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 792 // CHECK1: cond.true: 793 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 794 // CHECK1-NEXT: br label [[COND_END:%.*]] 795 // CHECK1: cond.false: 796 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 797 // CHECK1-NEXT: br label [[COND_END]] 798 // CHECK1: cond.end: 799 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 800 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 801 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 802 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 803 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 804 // CHECK1: omp.inner.for.cond: 805 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 806 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 807 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 808 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 809 // CHECK1: omp.inner.for.body: 810 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 811 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 812 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 813 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I5]], align 4 814 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[I5]], align 4 815 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 816 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i64 0, i64 [[IDXPROM]] 817 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 818 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 819 // CHECK1: omp.body.continue: 820 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 821 // CHECK1: omp.inner.for.inc: 822 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 823 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP23]], 1 824 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 825 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 826 // CHECK1: omp.inner.for.end: 827 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 828 // CHECK1: omp.loop.exit: 829 // CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 830 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4 831 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP25]]) 832 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 833 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 834 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 835 // CHECK1: .omp.final.then: 836 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 837 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0 838 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 839 // CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 840 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 841 // CHECK1-NEXT: store i32 [[ADD13]], ptr [[TMP0]], align 4 842 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 843 // CHECK1: .omp.final.done: 844 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 845 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 846 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 847 // CHECK1: .omp.linear.pu: 848 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 849 // CHECK1: .omp.linear.pu.done: 850 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 851 // CHECK1: omp.precond.end: 852 // CHECK1-NEXT: ret void 853 // 854 // 855 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 856 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 857 // CHECK3-NEXT: entry: 858 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 859 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4 860 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4 861 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 862 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 863 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 864 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 865 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 866 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 867 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 868 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 869 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 870 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 871 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 872 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 873 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4 874 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x ptr], align 4 875 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x ptr], align 4 876 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x ptr], align 4 877 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 878 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 879 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 880 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 881 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 882 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 883 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 884 // CHECK3-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 885 // CHECK3-NEXT: store i32 128, ptr [[TH]], align 4 886 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4 887 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TE_CASTED]], align 4 888 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_CASTED]], align 4 889 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH]], align 4 890 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[TH_CASTED]], align 4 891 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TH_CASTED]], align 4 892 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4 893 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 4 894 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[N_CASTED]], align 4 895 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 896 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4 897 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 898 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 899 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 900 // CHECK3-NEXT: store ptr null, ptr [[TMP9]], align 4 901 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 902 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP10]], align 4 903 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 904 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP11]], align 4 905 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 906 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 907 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 908 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[TMP13]], align 4 909 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 910 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[TMP14]], align 4 911 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 912 // CHECK3-NEXT: store ptr null, ptr [[TMP15]], align 4 913 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 914 // CHECK3-NEXT: store ptr @a, ptr [[TMP16]], align 4 915 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 916 // CHECK3-NEXT: store ptr @a, ptr [[TMP17]], align 4 917 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 918 // CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 4 919 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 920 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 921 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TE]], align 4 922 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TH]], align 4 923 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[N_ADDR]], align 4 924 // CHECK3-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR_]], align 4 925 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 926 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP24]], 0 927 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 928 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 929 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 930 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 931 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], 1 932 // CHECK3-NEXT: [[TMP26:%.*]] = zext i32 [[ADD]] to i64 933 // CHECK3-NEXT: [[TMP27:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP21]], 0 934 // CHECK3-NEXT: [[TMP28:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP22]], 0 935 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 936 // CHECK3-NEXT: store i32 3, ptr [[TMP29]], align 4 937 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 938 // CHECK3-NEXT: store i32 4, ptr [[TMP30]], align 4 939 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 940 // CHECK3-NEXT: store ptr [[TMP19]], ptr [[TMP31]], align 4 941 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 942 // CHECK3-NEXT: store ptr [[TMP20]], ptr [[TMP32]], align 4 943 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 944 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP33]], align 4 945 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 946 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP34]], align 4 947 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 948 // CHECK3-NEXT: store ptr null, ptr [[TMP35]], align 4 949 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 950 // CHECK3-NEXT: store ptr null, ptr [[TMP36]], align 4 951 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 952 // CHECK3-NEXT: store i64 [[TMP26]], ptr [[TMP37]], align 8 953 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 954 // CHECK3-NEXT: store i64 0, ptr [[TMP38]], align 8 955 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 956 // CHECK3-NEXT: store [3 x i32] [[TMP27]], ptr [[TMP39]], align 4 957 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 958 // CHECK3-NEXT: store [3 x i32] [[TMP28]], ptr [[TMP40]], align 4 959 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 960 // CHECK3-NEXT: store i32 0, ptr [[TMP41]], align 4 961 // CHECK3-NEXT: [[TMP42:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP21]], i32 [[TMP22]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, ptr [[KERNEL_ARGS]]) 962 // CHECK3-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 963 // CHECK3-NEXT: br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 964 // CHECK3: omp_offload.failed: 965 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], ptr @a) #[[ATTR2:[0-9]+]] 966 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 967 // CHECK3: omp_offload.cont: 968 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[I]], align 4 969 // CHECK3-NEXT: store i32 [[TMP44]], ptr [[I_CASTED]], align 4 970 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, ptr [[I_CASTED]], align 4 971 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, ptr [[N_ADDR]], align 4 972 // CHECK3-NEXT: store i32 [[TMP46]], ptr [[N_CASTED4]], align 4 973 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, ptr [[N_CASTED4]], align 4 974 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 975 // CHECK3-NEXT: store ptr @a, ptr [[TMP48]], align 4 976 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 977 // CHECK3-NEXT: store ptr @a, ptr [[TMP49]], align 4 978 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0 979 // CHECK3-NEXT: store ptr null, ptr [[TMP50]], align 4 980 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 981 // CHECK3-NEXT: store i32 [[TMP45]], ptr [[TMP51]], align 4 982 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 983 // CHECK3-NEXT: store i32 [[TMP45]], ptr [[TMP52]], align 4 984 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1 985 // CHECK3-NEXT: store ptr null, ptr [[TMP53]], align 4 986 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 987 // CHECK3-NEXT: store i32 [[TMP47]], ptr [[TMP54]], align 4 988 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 989 // CHECK3-NEXT: store i32 [[TMP47]], ptr [[TMP55]], align 4 990 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 2 991 // CHECK3-NEXT: store ptr null, ptr [[TMP56]], align 4 992 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 993 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 994 // CHECK3-NEXT: [[TMP59:%.*]] = load i32, ptr [[N_ADDR]], align 4 995 // CHECK3-NEXT: store i32 [[TMP59]], ptr [[DOTCAPTURE_EXPR_9]], align 4 996 // CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 997 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP60]], 0 998 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 999 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1000 // CHECK3-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 1001 // CHECK3-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 1002 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP61]], 1 1003 // CHECK3-NEXT: [[TMP62:%.*]] = zext i32 [[ADD14]] to i64 1004 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 1005 // CHECK3-NEXT: store i32 3, ptr [[TMP63]], align 4 1006 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 1007 // CHECK3-NEXT: store i32 3, ptr [[TMP64]], align 4 1008 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 1009 // CHECK3-NEXT: store ptr [[TMP57]], ptr [[TMP65]], align 4 1010 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 1011 // CHECK3-NEXT: store ptr [[TMP58]], ptr [[TMP66]], align 4 1012 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 1013 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP67]], align 4 1014 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 1015 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP68]], align 4 1016 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 1017 // CHECK3-NEXT: store ptr null, ptr [[TMP69]], align 4 1018 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 1019 // CHECK3-NEXT: store ptr null, ptr [[TMP70]], align 4 1020 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 1021 // CHECK3-NEXT: store i64 [[TMP62]], ptr [[TMP71]], align 8 1022 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 1023 // CHECK3-NEXT: store i64 0, ptr [[TMP72]], align 8 1024 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 1025 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP73]], align 4 1026 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 1027 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP74]], align 4 1028 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 1029 // CHECK3-NEXT: store i32 0, ptr [[TMP75]], align 4 1030 // CHECK3-NEXT: [[TMP76:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, ptr [[KERNEL_ARGS15]]) 1031 // CHECK3-NEXT: [[TMP77:%.*]] = icmp ne i32 [[TMP76]], 0 1032 // CHECK3-NEXT: br i1 [[TMP77]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1033 // CHECK3: omp_offload.failed16: 1034 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36(ptr @a, i32 [[TMP45]], i32 [[TMP47]]) #[[ATTR2]] 1035 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1036 // CHECK3: omp_offload.cont17: 1037 // CHECK3-NEXT: [[TMP78:%.*]] = load i32, ptr @a, align 4 1038 // CHECK3-NEXT: ret i32 [[TMP78]] 1039 // 1040 // 1041 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29 1042 // CHECK3-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] { 1043 // CHECK3-NEXT: entry: 1044 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 1045 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 1046 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1047 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1048 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]]) 1049 // CHECK3-NEXT: store i32 [[TE]], ptr [[TE_ADDR]], align 4 1050 // CHECK3-NEXT: store i32 [[TH]], ptr [[TH_ADDR]], align 4 1051 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1052 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1053 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1054 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 4 1055 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 4 1056 // CHECK3-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1057 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined, ptr [[N_ADDR]], ptr [[TMP1]]) 1058 // CHECK3-NEXT: ret void 1059 // 1060 // 1061 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined 1062 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1063 // CHECK3-NEXT: entry: 1064 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1065 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1066 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1067 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1068 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1069 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1070 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1071 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1072 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1073 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1074 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1075 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1076 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1077 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1078 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1079 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1080 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1081 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1082 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1083 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1084 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4 1085 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 1086 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1087 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1088 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1089 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1090 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1091 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 1092 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1093 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1094 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1095 // CHECK3: omp.precond.then: 1096 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1097 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1098 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 1099 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1100 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1101 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1102 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 1103 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1104 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1105 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1106 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1107 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1108 // CHECK3: cond.true: 1109 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1110 // CHECK3-NEXT: br label [[COND_END:%.*]] 1111 // CHECK3: cond.false: 1112 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1113 // CHECK3-NEXT: br label [[COND_END]] 1114 // CHECK3: cond.end: 1115 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1116 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1117 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1118 // CHECK3-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 1119 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1120 // CHECK3: omp.inner.for.cond: 1121 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1122 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 1123 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1124 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1125 // CHECK3: omp.inner.for.body: 1126 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]] 1127 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 1128 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], ptr [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP6]] 1129 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1130 // CHECK3: omp.inner.for.inc: 1131 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1132 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]] 1133 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1134 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1135 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1136 // CHECK3: omp.inner.for.end: 1137 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1138 // CHECK3: omp.loop.exit: 1139 // CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1140 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 1141 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]]) 1142 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1143 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1144 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1145 // CHECK3: .omp.final.then: 1146 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1147 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0 1148 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1149 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 1150 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 1151 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 1152 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1153 // CHECK3: .omp.final.done: 1154 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1155 // CHECK3: omp.precond.end: 1156 // CHECK3-NEXT: ret void 1157 // 1158 // 1159 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.omp_outlined.omp_outlined 1160 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1161 // CHECK3-NEXT: entry: 1162 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1163 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1164 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1165 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1166 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1167 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1168 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1169 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1170 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1171 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1172 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1173 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1174 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1175 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1176 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1177 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1178 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1179 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1180 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1181 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1182 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1183 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1184 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1185 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1186 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4 1187 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 1188 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1189 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1190 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1191 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1192 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1193 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 1194 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1195 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1196 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1197 // CHECK3: omp.precond.then: 1198 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1199 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1200 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 1201 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1202 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1203 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 1204 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 1205 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1206 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1207 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1208 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 1209 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1210 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1211 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1212 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1213 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1214 // CHECK3: cond.true: 1215 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1216 // CHECK3-NEXT: br label [[COND_END:%.*]] 1217 // CHECK3: cond.false: 1218 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1219 // CHECK3-NEXT: br label [[COND_END]] 1220 // CHECK3: cond.end: 1221 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1222 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1223 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1224 // CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 1225 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1226 // CHECK3: omp.inner.for.cond: 1227 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 1228 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 1229 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1230 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1231 // CHECK3: omp.inner.for.body: 1232 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1233 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1234 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1235 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP11]] 1236 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP11]] 1237 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP1]], i32 0, i32 [[TMP18]] 1238 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]] 1239 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1240 // CHECK3: omp.body.continue: 1241 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1242 // CHECK3: omp.inner.for.inc: 1243 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1244 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 1245 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1246 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1247 // CHECK3: omp.inner.for.end: 1248 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1249 // CHECK3: omp.loop.exit: 1250 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1251 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 1252 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 1253 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1254 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1255 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1256 // CHECK3: .omp.final.then: 1257 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1258 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 1259 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1260 // CHECK3-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1261 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1262 // CHECK3-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 1263 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1264 // CHECK3: .omp.final.done: 1265 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1266 // CHECK3: omp.precond.end: 1267 // CHECK3-NEXT: ret void 1268 // 1269 // 1270 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36 1271 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR1]] { 1272 // CHECK3-NEXT: entry: 1273 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1274 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 1275 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1276 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1277 // CHECK3-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4 1278 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1279 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1280 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], ptr [[TMP0]]) 1281 // CHECK3-NEXT: ret void 1282 // 1283 // 1284 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined 1285 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1286 // CHECK3-NEXT: entry: 1287 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1288 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1289 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 1290 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1291 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1292 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1293 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1294 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1295 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1296 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1297 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1298 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1299 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1300 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1301 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 1302 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1303 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1304 // CHECK3-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 1305 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1306 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1307 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 1308 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1309 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1310 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4 1311 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 1312 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1313 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1314 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1315 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1316 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1317 // CHECK3-NEXT: store i32 0, ptr [[I3]], align 4 1318 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1319 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1320 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1321 // CHECK3: omp.precond.then: 1322 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i32 0, i32 0 1323 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ] 1324 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1325 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1326 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4 1327 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1328 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1329 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1330 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1331 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1332 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1333 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1334 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1335 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1336 // CHECK3: cond.true: 1337 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1338 // CHECK3-NEXT: br label [[COND_END:%.*]] 1339 // CHECK3: cond.false: 1340 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1341 // CHECK3-NEXT: br label [[COND_END]] 1342 // CHECK3: cond.end: 1343 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1344 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1345 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1346 // CHECK3-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 1347 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1348 // CHECK3: omp.inner.for.cond: 1349 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1350 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1351 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1352 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1353 // CHECK3: omp.inner.for.body: 1354 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1355 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1356 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[I4]], ptr [[TMP1]], ptr [[TMP2]]) 1357 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1358 // CHECK3: omp.inner.for.inc: 1359 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1360 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1361 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1362 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1363 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1364 // CHECK3: omp.inner.for.end: 1365 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1366 // CHECK3: omp.loop.exit: 1367 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1368 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 1369 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]]) 1370 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1371 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 1372 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1373 // CHECK3: .omp.final.then: 1374 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1375 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 1376 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1377 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 1378 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 1379 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4 1380 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1381 // CHECK3: .omp.final.done: 1382 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1383 // CHECK3: omp.precond.end: 1384 // CHECK3-NEXT: ret void 1385 // 1386 // 1387 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.omp_outlined.omp_outlined 1388 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] { 1389 // CHECK3-NEXT: entry: 1390 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1391 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1392 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1393 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1394 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 1395 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1396 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1397 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1398 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1399 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1400 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1401 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 1402 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1403 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1404 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1405 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1406 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1407 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 1408 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4 1409 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1410 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1411 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1412 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1413 // CHECK3-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 1414 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1415 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1416 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 1417 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1418 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1419 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP1]], align 4 1420 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 1421 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1422 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 1423 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1424 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1425 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1426 // CHECK3-NEXT: store i32 0, ptr [[I3]], align 4 1427 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1428 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 1429 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1430 // CHECK3: omp.precond.then: 1431 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i32 0, i32 0 1432 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ] 1433 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4 1434 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START]], align 4 1435 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1436 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1437 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 1438 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1439 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1440 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 1441 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 1442 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1443 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1444 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1445 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1446 // CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB4:[0-9]+]], i32 [[TMP11]]) 1447 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1448 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 1449 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1450 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1451 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1452 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]] 1453 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1454 // CHECK3: cond.true: 1455 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1456 // CHECK3-NEXT: br label [[COND_END:%.*]] 1457 // CHECK3: cond.false: 1458 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1459 // CHECK3-NEXT: br label [[COND_END]] 1460 // CHECK3: cond.end: 1461 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1462 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1463 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1464 // CHECK3-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 1465 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1466 // CHECK3: omp.inner.for.cond: 1467 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1468 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1469 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 1470 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1471 // CHECK3: omp.inner.for.body: 1472 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1473 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 1474 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1475 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 1476 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[I4]], align 4 1477 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[TMP2]], i32 0, i32 [[TMP22]] 1478 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 1479 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1480 // CHECK3: omp.body.continue: 1481 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1482 // CHECK3: omp.inner.for.inc: 1483 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1484 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], 1 1485 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 1486 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 1487 // CHECK3: omp.inner.for.end: 1488 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1489 // CHECK3: omp.loop.exit: 1490 // CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1491 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4 1492 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP25]]) 1493 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1494 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 1495 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1496 // CHECK3: .omp.final.then: 1497 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1498 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP28]], 0 1499 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 1500 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 1501 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1502 // CHECK3-NEXT: store i32 [[ADD12]], ptr [[TMP0]], align 4 1503 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1504 // CHECK3: .omp.final.done: 1505 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1506 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1507 // CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 1508 // CHECK3: .omp.linear.pu: 1509 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 1510 // CHECK3: .omp.linear.pu.done: 1511 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 1512 // CHECK3: omp.precond.end: 1513 // CHECK3-NEXT: ret void 1514 // 1515 // 1516 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1517 // CHECK5-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1518 // CHECK5-NEXT: entry: 1519 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1520 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4 1521 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4 1522 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1523 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1524 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1525 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1526 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1527 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1528 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1529 // CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4 1530 // CHECK5-NEXT: [[I11:%.*]] = alloca i32, align 4 1531 // CHECK5-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 1532 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1533 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 1534 // CHECK5-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 1535 // CHECK5-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 1536 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 1537 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1538 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1539 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1540 // CHECK5-NEXT: [[I25:%.*]] = alloca i32, align 4 1541 // CHECK5-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1542 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 1543 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1544 // CHECK5-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 1545 // CHECK5-NEXT: store i32 128, ptr [[TH]], align 4 1546 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1547 // CHECK5-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1548 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1549 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1550 // CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1551 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1552 // CHECK5-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1553 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1554 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1555 // CHECK5-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_UB]], align 4 1556 // CHECK5-NEXT: store i32 0, ptr [[I]], align 4 1557 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1558 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1559 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 1560 // CHECK5: simd.if.then: 1561 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1562 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1563 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1564 // CHECK5: omp.inner.for.cond: 1565 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 1566 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 1567 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1568 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1569 // CHECK5: omp.inner.for.body: 1570 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1571 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1572 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1573 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP2]] 1574 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP2]] 1575 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1576 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[IDXPROM]] 1577 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 1578 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1579 // CHECK5: omp.body.continue: 1580 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1581 // CHECK5: omp.inner.for.inc: 1582 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1583 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1584 // CHECK5-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1585 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1586 // CHECK5: omp.inner.for.end: 1587 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1588 // CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0 1589 // CHECK5-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1590 // CHECK5-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1591 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1592 // CHECK5-NEXT: store i32 [[ADD10]], ptr [[I4]], align 4 1593 // CHECK5-NEXT: br label [[SIMD_IF_END]] 1594 // CHECK5: simd.if.end: 1595 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[N_ADDR]], align 4 1596 // CHECK5-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_13]], align 4 1597 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1598 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0 1599 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1600 // CHECK5-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 1601 // CHECK5-NEXT: store i32 [[SUB17]], ptr [[DOTCAPTURE_EXPR_14]], align 4 1602 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 4 1603 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 1604 // CHECK5-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_UB19]], align 4 1605 // CHECK5-NEXT: store i32 0, ptr [[I20]], align 4 1606 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1607 // CHECK5-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]] 1608 // CHECK5-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END41:%.*]] 1609 // CHECK5: simd.if.then22: 1610 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 4 1611 // CHECK5-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV23]], align 4 1612 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr @a, i64 16) ] 1613 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[I11]], align 4 1614 // CHECK5-NEXT: store i32 [[TMP17]], ptr [[DOTLINEAR_START]], align 4 1615 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 1616 // CHECK5: omp.inner.for.cond26: 1617 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4 1618 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4 1619 // CHECK5-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1620 // CHECK5-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1621 // CHECK5: omp.inner.for.body28: 1622 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4 1623 // CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1 1624 // CHECK5-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 1625 // CHECK5-NEXT: store i32 [[ADD30]], ptr [[I24]], align 4 1626 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, ptr [[I24]], align 4 1627 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64 1628 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[IDXPROM31]] 1629 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX32]], align 4 1630 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1631 // CHECK5: omp.body.continue33: 1632 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1633 // CHECK5: omp.inner.for.inc34: 1634 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4 1635 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1 1636 // CHECK5-NEXT: store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4 1637 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]] 1638 // CHECK5: omp.inner.for.end36: 1639 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1640 // CHECK5-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0 1641 // CHECK5-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1 1642 // CHECK5-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1 1643 // CHECK5-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]] 1644 // CHECK5-NEXT: store i32 [[ADD40]], ptr [[I11]], align 4 1645 // CHECK5-NEXT: br label [[SIMD_IF_END41]] 1646 // CHECK5: simd.if.end41: 1647 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, ptr @a, align 4 1648 // CHECK5-NEXT: ret i32 [[TMP24]] 1649 // 1650 // 1651 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali 1652 // CHECK7-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 1653 // CHECK7-NEXT: entry: 1654 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1655 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4 1656 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4 1657 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1658 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1659 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1660 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1661 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1662 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1663 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1664 // CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 4 1665 // CHECK7-NEXT: [[I11:%.*]] = alloca i32, align 4 1666 // CHECK7-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 1667 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1668 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 1669 // CHECK7-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 1670 // CHECK7-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 1671 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 1672 // CHECK7-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1673 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 1674 // CHECK7-NEXT: [[I24:%.*]] = alloca i32, align 4 1675 // CHECK7-NEXT: [[I25:%.*]] = alloca i32, align 4 1676 // CHECK7-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1677 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 1678 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1679 // CHECK7-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 1680 // CHECK7-NEXT: store i32 128, ptr [[TH]], align 4 1681 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1682 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1683 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1684 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1685 // CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1 1686 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1 1687 // CHECK7-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1688 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1689 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1690 // CHECK7-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_UB]], align 4 1691 // CHECK7-NEXT: store i32 0, ptr [[I]], align 4 1692 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1693 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1694 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 1695 // CHECK7: simd.if.then: 1696 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1697 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1698 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1699 // CHECK7: omp.inner.for.cond: 1700 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 1701 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 1702 // CHECK7-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1703 // CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1704 // CHECK7: omp.inner.for.body: 1705 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1706 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1707 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1708 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP3]] 1709 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP3]] 1710 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i32 0, i32 [[TMP9]] 1711 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 1712 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1713 // CHECK7: omp.body.continue: 1714 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1715 // CHECK7: omp.inner.for.inc: 1716 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1717 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1 1718 // CHECK7-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1719 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1720 // CHECK7: omp.inner.for.end: 1721 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1722 // CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0 1723 // CHECK7-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1724 // CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1725 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1726 // CHECK7-NEXT: store i32 [[ADD10]], ptr [[I4]], align 4 1727 // CHECK7-NEXT: br label [[SIMD_IF_END]] 1728 // CHECK7: simd.if.end: 1729 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[N_ADDR]], align 4 1730 // CHECK7-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_13]], align 4 1731 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1732 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0 1733 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1734 // CHECK7-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1 1735 // CHECK7-NEXT: store i32 [[SUB17]], ptr [[DOTCAPTURE_EXPR_14]], align 4 1736 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 4 1737 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 1738 // CHECK7-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_UB19]], align 4 1739 // CHECK7-NEXT: store i32 0, ptr [[I20]], align 4 1740 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1741 // CHECK7-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]] 1742 // CHECK7-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END40:%.*]] 1743 // CHECK7: simd.if.then22: 1744 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 4 1745 // CHECK7-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV23]], align 4 1746 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr @a, i32 16) ] 1747 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[I11]], align 4 1748 // CHECK7-NEXT: store i32 [[TMP17]], ptr [[DOTLINEAR_START]], align 4 1749 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 1750 // CHECK7: omp.inner.for.cond26: 1751 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4 1752 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4 1753 // CHECK7-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 1754 // CHECK7-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]] 1755 // CHECK7: omp.inner.for.body28: 1756 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4 1757 // CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1 1758 // CHECK7-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 1759 // CHECK7-NEXT: store i32 [[ADD30]], ptr [[I24]], align 4 1760 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, ptr [[I24]], align 4 1761 // CHECK7-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i32 0, i32 [[TMP21]] 1762 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX31]], align 4 1763 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]] 1764 // CHECK7: omp.body.continue32: 1765 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]] 1766 // CHECK7: omp.inner.for.inc33: 1767 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4 1768 // CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1 1769 // CHECK7-NEXT: store i32 [[ADD34]], ptr [[DOTOMP_IV23]], align 4 1770 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]] 1771 // CHECK7: omp.inner.for.end35: 1772 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1773 // CHECK7-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0 1774 // CHECK7-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1 1775 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1 1776 // CHECK7-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]] 1777 // CHECK7-NEXT: store i32 [[ADD39]], ptr [[I11]], align 4 1778 // CHECK7-NEXT: br label [[SIMD_IF_END40]] 1779 // CHECK7: simd.if.end40: 1780 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, ptr @a, align 4 1781 // CHECK7-NEXT: ret i32 [[TMP24]] 1782 // 1783 // 1784 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv 1785 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1786 // CHECK9-NEXT: entry: 1787 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1788 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 1789 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1790 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1791 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 1792 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1793 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 1794 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 1795 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 1796 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8 1797 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1798 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1799 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1800 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1801 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4 1802 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 1803 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1804 // CHECK9-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 1805 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 1806 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1807 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 1808 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4 1809 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[I_CASTED]], align 4 1810 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[I_CASTED]], align 8 1811 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[N]], align 4 1812 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 4 1813 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 8 1814 // CHECK9-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4 1815 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 32, i1 false) 1816 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1817 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP8]], align 8 1818 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1819 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 1820 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1821 // CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8 1822 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1823 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 8 1824 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1825 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 1826 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 1 1827 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 8 1828 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1829 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 1830 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1831 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP15]], align 8 1832 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1833 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP16]], align 8 1834 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1835 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 1836 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1837 // CHECK9-NEXT: store i64 [[TMP6]], ptr [[TMP18]], align 8 1838 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1839 // CHECK9-NEXT: store i64 [[TMP6]], ptr [[TMP19]], align 8 1840 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 1841 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 1842 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1843 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1844 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1845 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 4 1846 // CHECK9-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 4 1847 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1848 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 0 1849 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1850 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1851 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1852 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1853 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 1 1854 // CHECK9-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i64 1855 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1856 // CHECK9-NEXT: store i32 3, ptr [[TMP28]], align 4 1857 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1858 // CHECK9-NEXT: store i32 4, ptr [[TMP29]], align 4 1859 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1860 // CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 8 1861 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1862 // CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 8 1863 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1864 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 8 1865 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1866 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 8 1867 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1868 // CHECK9-NEXT: store ptr null, ptr [[TMP34]], align 8 1869 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1870 // CHECK9-NEXT: store ptr null, ptr [[TMP35]], align 8 1871 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1872 // CHECK9-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 8 1873 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1874 // CHECK9-NEXT: store i64 0, ptr [[TMP37]], align 8 1875 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1876 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 4 1877 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1878 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 1879 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1880 // CHECK9-NEXT: store i32 0, ptr [[TMP40]], align 4 1881 // CHECK9-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, ptr [[KERNEL_ARGS]]) 1882 // CHECK9-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 1883 // CHECK9-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1884 // CHECK9: omp_offload.failed: 1885 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 1886 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1887 // CHECK9: omp_offload.cont: 1888 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 0 1889 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 1890 // CHECK9-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 1891 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]]) 1892 // CHECK9-NEXT: ret i32 [[TMP43]] 1893 // 1894 // 1895 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74 1896 // CHECK9-SAME: (i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 1897 // CHECK9-NEXT: entry: 1898 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1899 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1900 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 1901 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1902 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1903 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1904 // CHECK9-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 8 1905 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1906 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1907 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1908 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]]) 1909 // CHECK9-NEXT: ret void 1910 // 1911 // 1912 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined 1913 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1914 // CHECK9-NEXT: entry: 1915 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1916 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1917 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 1918 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1919 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1920 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1921 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1922 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1923 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1924 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1925 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1926 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1927 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1928 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1929 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1930 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1931 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1932 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1933 // CHECK9-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 1934 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1935 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1936 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1937 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 1938 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1939 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1940 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1941 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 1942 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 1943 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1944 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1945 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1946 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1947 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1948 // CHECK9-NEXT: store i32 0, ptr [[I3]], align 4 1949 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1950 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1951 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1952 // CHECK9: omp.precond.then: 1953 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ] 1954 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1955 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1956 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 1957 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1958 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1959 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1960 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 1961 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1962 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1963 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1964 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1965 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1966 // CHECK9: cond.true: 1967 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1968 // CHECK9-NEXT: br label [[COND_END:%.*]] 1969 // CHECK9: cond.false: 1970 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1971 // CHECK9-NEXT: br label [[COND_END]] 1972 // CHECK9: cond.end: 1973 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1974 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1975 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1976 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 1977 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1978 // CHECK9: omp.inner.for.cond: 1979 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1980 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1981 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1982 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1983 // CHECK9: omp.inner.for.body: 1984 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1985 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1986 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1987 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1988 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[I4]], ptr [[TMP1]], i64 [[TMP2]], ptr [[TMP3]]) 1989 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1990 // CHECK9: omp.inner.for.inc: 1991 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1992 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1993 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1994 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1995 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1996 // CHECK9: omp.inner.for.end: 1997 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1998 // CHECK9: omp.loop.exit: 1999 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2000 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 2001 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 2002 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2003 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2004 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2005 // CHECK9: .omp.final.then: 2006 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2007 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 2008 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2009 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2010 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2011 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4 2012 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2013 // CHECK9: .omp.final.done: 2014 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2015 // CHECK9: omp.precond.end: 2016 // CHECK9-NEXT: ret void 2017 // 2018 // 2019 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined 2020 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2021 // CHECK9-NEXT: entry: 2022 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2023 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2024 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2025 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2026 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 2027 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2028 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2029 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2030 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2031 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2032 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2033 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2034 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2035 // CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2036 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2037 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2038 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2039 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2040 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2041 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4 2042 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2043 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2044 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2045 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2046 // CHECK9-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 2047 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2048 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 2049 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2050 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 2051 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2052 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 2053 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2054 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 2055 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2056 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2057 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2058 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2059 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2060 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2061 // CHECK9-NEXT: store i32 0, ptr [[I3]], align 4 2062 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2063 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2064 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2065 // CHECK9: omp.precond.then: 2066 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ] 2067 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 4 2068 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4 2069 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2070 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2071 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 2072 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2073 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 2074 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2075 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32 2076 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2077 // CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 2078 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2079 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2080 // CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2081 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 2082 // CHECK9-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 2083 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2084 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 2085 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2086 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2087 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2088 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 2089 // CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2090 // CHECK9: cond.true: 2091 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2092 // CHECK9-NEXT: br label [[COND_END:%.*]] 2093 // CHECK9: cond.false: 2094 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2095 // CHECK9-NEXT: br label [[COND_END]] 2096 // CHECK9: cond.end: 2097 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2098 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2099 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2100 // CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 4 2101 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2102 // CHECK9: omp.inner.for.cond: 2103 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2104 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2105 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2106 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2107 // CHECK9: omp.inner.for.body: 2108 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2109 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2110 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2111 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 4 2112 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 4 2113 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2114 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]] 2115 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2116 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2117 // CHECK9: omp.body.continue: 2118 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2119 // CHECK9: omp.inner.for.inc: 2120 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2121 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1 2122 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 2123 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2124 // CHECK9: omp.inner.for.end: 2125 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2126 // CHECK9: omp.loop.exit: 2127 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2128 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 2129 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]]) 2130 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2131 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2132 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2133 // CHECK9: .omp.final.then: 2134 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2135 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0 2136 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 2137 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 2138 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 2139 // CHECK9-NEXT: store i32 [[ADD13]], ptr [[TMP0]], align 4 2140 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2141 // CHECK9: .omp.final.done: 2142 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2143 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2144 // CHECK9-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2145 // CHECK9: .omp.linear.pu: 2146 // CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2147 // CHECK9: .omp.linear.pu.done: 2148 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2149 // CHECK9: omp.precond.end: 2150 // CHECK9-NEXT: ret void 2151 // 2152 // 2153 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2154 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 2155 // CHECK11-NEXT: entry: 2156 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2157 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 2158 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2159 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2160 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 2161 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2162 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 2163 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 2164 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 2165 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4 2166 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2167 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2168 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2169 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2170 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4 2171 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 2172 // CHECK11-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 2173 // CHECK11-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 2174 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2175 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 2176 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4 2177 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[I_CASTED]], align 4 2178 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[I_CASTED]], align 4 2179 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 4 2180 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 2181 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 2182 // CHECK11-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4 2183 // CHECK11-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64 2184 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 32, i1 false) 2185 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2186 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP8]], align 4 2187 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2188 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 2189 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2190 // CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 4 2191 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2192 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 4 2193 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2194 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 2195 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 1 2196 // CHECK11-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 4 2197 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2198 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4 2199 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2200 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP15]], align 4 2201 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2202 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP16]], align 4 2203 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2204 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4 2205 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 2206 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 4 2207 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 2208 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 4 2209 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 2210 // CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 4 2211 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2212 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2213 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2214 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 4 2215 // CHECK11-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 4 2216 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2217 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 0 2218 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2219 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2220 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2221 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2222 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 1 2223 // CHECK11-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i64 2224 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2225 // CHECK11-NEXT: store i32 3, ptr [[TMP28]], align 4 2226 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2227 // CHECK11-NEXT: store i32 4, ptr [[TMP29]], align 4 2228 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2229 // CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 4 2230 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2231 // CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 4 2232 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2233 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 4 2234 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2235 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 4 2236 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2237 // CHECK11-NEXT: store ptr null, ptr [[TMP34]], align 4 2238 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2239 // CHECK11-NEXT: store ptr null, ptr [[TMP35]], align 4 2240 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2241 // CHECK11-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 8 2242 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2243 // CHECK11-NEXT: store i64 0, ptr [[TMP37]], align 8 2244 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2245 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 4 2246 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2247 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 2248 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2249 // CHECK11-NEXT: store i32 0, ptr [[TMP40]], align 4 2250 // CHECK11-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, ptr [[KERNEL_ARGS]]) 2251 // CHECK11-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 2252 // CHECK11-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2253 // CHECK11: omp_offload.failed: 2254 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]] 2255 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2256 // CHECK11: omp_offload.cont: 2257 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 0 2258 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2259 // CHECK11-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 2260 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]]) 2261 // CHECK11-NEXT: ret i32 [[TMP43]] 2262 // 2263 // 2264 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74 2265 // CHECK11-SAME: (i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 2266 // CHECK11-NEXT: entry: 2267 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2268 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2269 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 2270 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2271 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2272 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2273 // CHECK11-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4 2274 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2275 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2276 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2277 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]]) 2278 // CHECK11-NEXT: ret void 2279 // 2280 // 2281 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined 2282 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2283 // CHECK11-NEXT: entry: 2284 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2285 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2286 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 2287 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 2288 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2289 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2290 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2291 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2292 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2293 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2294 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2295 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2296 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2297 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2298 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2299 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2300 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2301 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2302 // CHECK11-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 2303 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 2304 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2305 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2306 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 2307 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 2308 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2309 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2310 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 2311 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2312 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2313 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2314 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2315 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2316 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2317 // CHECK11-NEXT: store i32 0, ptr [[I3]], align 4 2318 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2319 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2320 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2321 // CHECK11: omp.precond.then: 2322 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ] 2323 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2324 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2325 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 2326 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2327 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2328 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2329 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 2330 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2331 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2332 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2333 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2334 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2335 // CHECK11: cond.true: 2336 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2337 // CHECK11-NEXT: br label [[COND_END:%.*]] 2338 // CHECK11: cond.false: 2339 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2340 // CHECK11-NEXT: br label [[COND_END]] 2341 // CHECK11: cond.end: 2342 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2343 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2344 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2345 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 2346 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2347 // CHECK11: omp.inner.for.cond: 2348 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2349 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2350 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2351 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2352 // CHECK11: omp.inner.for.body: 2353 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2354 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2355 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[I4]], ptr [[TMP1]], i32 [[TMP2]], ptr [[TMP3]]) 2356 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2357 // CHECK11: omp.inner.for.inc: 2358 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2359 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2360 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2361 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2362 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2363 // CHECK11: omp.inner.for.end: 2364 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2365 // CHECK11: omp.loop.exit: 2366 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2367 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2368 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 2369 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2370 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2371 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2372 // CHECK11: .omp.final.then: 2373 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2374 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 2375 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2376 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2377 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2378 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4 2379 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2380 // CHECK11: .omp.final.done: 2381 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2382 // CHECK11: omp.precond.end: 2383 // CHECK11-NEXT: ret void 2384 // 2385 // 2386 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.omp_outlined.omp_outlined 2387 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2388 // CHECK11-NEXT: entry: 2389 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2390 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2391 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2392 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2393 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 2394 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 2395 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2396 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2397 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2398 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2399 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2400 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2401 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2402 // CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2403 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2404 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2405 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2406 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2407 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2408 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4 2409 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2410 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2411 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2412 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2413 // CHECK11-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 2414 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 2415 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2416 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2417 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 2418 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 2419 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2420 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2421 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 2422 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2423 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2424 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2425 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2426 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2427 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2428 // CHECK11-NEXT: store i32 0, ptr [[I3]], align 4 2429 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2430 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2431 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2432 // CHECK11: omp.precond.then: 2433 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ] 2434 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 4 2435 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4 2436 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2437 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2438 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 2439 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2440 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2441 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_LB]], align 4 2442 // CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_UB]], align 4 2443 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2444 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2445 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2446 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 2447 // CHECK11-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 2448 // CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2449 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 2450 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2451 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2452 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2453 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 2454 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2455 // CHECK11: cond.true: 2456 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2457 // CHECK11-NEXT: br label [[COND_END:%.*]] 2458 // CHECK11: cond.false: 2459 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2460 // CHECK11-NEXT: br label [[COND_END]] 2461 // CHECK11: cond.end: 2462 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 2463 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2464 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2465 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 4 2466 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2467 // CHECK11: omp.inner.for.cond: 2468 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2469 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2470 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2471 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2472 // CHECK11: omp.inner.for.body: 2473 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2474 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2475 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2476 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 2477 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 4 2478 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 [[TMP23]] 2479 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2480 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2481 // CHECK11: omp.body.continue: 2482 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2483 // CHECK11: omp.inner.for.inc: 2484 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2485 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 2486 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 2487 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2488 // CHECK11: omp.inner.for.end: 2489 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2490 // CHECK11: omp.loop.exit: 2491 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2492 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 2493 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]]) 2494 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2495 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2496 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2497 // CHECK11: .omp.final.then: 2498 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2499 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0 2500 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 2501 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 2502 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 2503 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[TMP0]], align 4 2504 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2505 // CHECK11: .omp.final.done: 2506 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2507 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2508 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2509 // CHECK11: .omp.linear.pu: 2510 // CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2511 // CHECK11: .omp.linear.pu.done: 2512 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2513 // CHECK11: omp.precond.end: 2514 // CHECK11-NEXT: ret void 2515 // 2516 // 2517 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2518 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2519 // CHECK13-NEXT: entry: 2520 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 2521 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 2522 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2523 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2524 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2525 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2526 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2527 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2528 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2529 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 2530 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2531 // CHECK13-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2532 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 2533 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 2534 // CHECK13-NEXT: store i32 100, ptr [[N]], align 4 2535 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 2536 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2537 // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 2538 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 2539 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2540 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 2541 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 2542 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 2543 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2544 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 2545 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2546 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2547 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2548 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2549 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2550 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 2551 // CHECK13-NEXT: store i32 0, ptr [[I3]], align 4 2552 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2553 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2554 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2555 // CHECK13: simd.if.then: 2556 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2557 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2558 // CHECK13-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i64 16) ] 2559 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4 2560 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START]], align 4 2561 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2562 // CHECK13: omp.inner.for.cond: 2563 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2564 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2565 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2566 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2567 // CHECK13: omp.inner.for.body: 2568 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2569 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2570 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2571 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 2572 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I4]], align 4 2573 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2574 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]] 2575 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2576 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2577 // CHECK13: omp.body.continue: 2578 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2579 // CHECK13: omp.inner.for.inc: 2580 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2581 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1 2582 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 2583 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2584 // CHECK13: omp.inner.for.end: 2585 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2586 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0 2587 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2588 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2589 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2590 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I]], align 4 2591 // CHECK13-NEXT: br label [[SIMD_IF_END]] 2592 // CHECK13: simd.if.end: 2593 // CHECK13-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 0 2594 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX12]], align 4 2595 // CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 2596 // CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP16]]) 2597 // CHECK13-NEXT: ret i32 [[TMP15]] 2598 // 2599 // 2600 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv 2601 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2602 // CHECK15-NEXT: entry: 2603 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 2604 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 2605 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2606 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2607 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2608 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2609 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2610 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2611 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2612 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 2613 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2614 // CHECK15-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2615 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 2616 // CHECK15-NEXT: [[I5:%.*]] = alloca i32, align 4 2617 // CHECK15-NEXT: store i32 100, ptr [[N]], align 4 2618 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 2619 // CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 2620 // CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 2621 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2622 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 2623 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 2624 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 2625 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2626 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2627 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2628 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2629 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2630 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2631 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2632 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 2633 // CHECK15-NEXT: store i32 0, ptr [[I3]], align 4 2634 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2635 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2636 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2637 // CHECK15: simd.if.then: 2638 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2639 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2640 // CHECK15-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i32 16) ] 2641 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4 2642 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4 2643 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2644 // CHECK15: omp.inner.for.cond: 2645 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2646 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2647 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2648 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2649 // CHECK15: omp.inner.for.body: 2650 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2651 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2652 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2653 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 2654 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I4]], align 4 2655 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP11]] 2656 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2657 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2658 // CHECK15: omp.body.continue: 2659 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2660 // CHECK15: omp.inner.for.inc: 2661 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2662 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 2663 // CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 2664 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2665 // CHECK15: omp.inner.for.end: 2666 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2667 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0 2668 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 2669 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 2670 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 2671 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I]], align 4 2672 // CHECK15-NEXT: br label [[SIMD_IF_END]] 2673 // CHECK15: simd.if.end: 2674 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 0 2675 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARRAYIDX12]], align 4 2676 // CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 2677 // CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP15]]) 2678 // CHECK15-NEXT: ret i32 [[TMP14]] 2679 // 2680 // 2681 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2682 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] { 2683 // CHECK17-NEXT: entry: 2684 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2685 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 2686 // CHECK17-NEXT: ret i32 [[CALL]] 2687 // 2688 // 2689 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2690 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 2691 // CHECK17-NEXT: entry: 2692 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2693 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 2694 // CHECK17-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 2695 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 8 2696 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 8 2697 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 8 2698 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2699 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2700 // CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2701 // CHECK17-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2702 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4 2703 // CHECK17-NEXT: store i32 [[TMP0]], ptr [[I_CASTED]], align 4 2704 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[I_CASTED]], align 8 2705 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 2706 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2707 // CHECK17-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 8 2708 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2709 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP3]], align 8 2710 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2711 // CHECK17-NEXT: store ptr null, ptr [[TMP4]], align 8 2712 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2713 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP5]], align 8 2714 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2715 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP6]], align 8 2716 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2717 // CHECK17-NEXT: store ptr null, ptr [[TMP7]], align 8 2718 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2719 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2720 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2721 // CHECK17-NEXT: store i32 3, ptr [[TMP10]], align 4 2722 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2723 // CHECK17-NEXT: store i32 2, ptr [[TMP11]], align 4 2724 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2725 // CHECK17-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 8 2726 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2727 // CHECK17-NEXT: store ptr [[TMP9]], ptr [[TMP13]], align 8 2728 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2729 // CHECK17-NEXT: store ptr @.offload_sizes, ptr [[TMP14]], align 8 2730 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2731 // CHECK17-NEXT: store ptr @.offload_maptypes, ptr [[TMP15]], align 8 2732 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2733 // CHECK17-NEXT: store ptr null, ptr [[TMP16]], align 8 2734 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2735 // CHECK17-NEXT: store ptr null, ptr [[TMP17]], align 8 2736 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2737 // CHECK17-NEXT: store i64 123, ptr [[TMP18]], align 8 2738 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2739 // CHECK17-NEXT: store i64 0, ptr [[TMP19]], align 8 2740 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2741 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4 2742 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2743 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4 2744 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2745 // CHECK17-NEXT: store i32 0, ptr [[TMP22]], align 4 2746 // CHECK17-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, ptr [[KERNEL_ARGS]]) 2747 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2748 // CHECK17-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2749 // CHECK17: omp_offload.failed: 2750 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i64 [[TMP1]]) #[[ATTR3:[0-9]+]] 2751 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 2752 // CHECK17: omp_offload.cont: 2753 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2754 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A2]], i64 0, i64 0 2755 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2756 // CHECK17-NEXT: ret i32 [[TMP25]] 2757 // 2758 // 2759 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112 2760 // CHECK17-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] { 2761 // CHECK17-NEXT: entry: 2762 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2763 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 2764 // CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2765 // CHECK17-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 8 2766 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2767 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined, ptr [[I_ADDR]], ptr [[TMP0]]) 2768 // CHECK17-NEXT: ret void 2769 // 2770 // 2771 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined 2772 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2773 // CHECK17-NEXT: entry: 2774 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2775 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2776 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 2777 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2778 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2779 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2780 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2781 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2782 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2783 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2784 // CHECK17-NEXT: [[I1:%.*]] = alloca i32, align 4 2785 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2786 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2787 // CHECK17-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 2788 // CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2789 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 2790 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2791 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 0 2792 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 0 2793 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ] 2794 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2795 // CHECK17-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2796 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2797 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2798 // CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2799 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2800 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2801 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2802 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122 2803 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2804 // CHECK17: cond.true: 2805 // CHECK17-NEXT: br label [[COND_END:%.*]] 2806 // CHECK17: cond.false: 2807 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2808 // CHECK17-NEXT: br label [[COND_END]] 2809 // CHECK17: cond.end: 2810 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2811 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2812 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2813 // CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2814 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2815 // CHECK17: omp.inner.for.cond: 2816 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2817 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2818 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2819 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2820 // CHECK17: omp.inner.for.body: 2821 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2822 // CHECK17-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2823 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2824 // CHECK17-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64 2825 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined, i64 [[TMP10]], i64 [[TMP12]], ptr [[I1]], ptr [[TMP1]]) 2826 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2827 // CHECK17: omp.inner.for.inc: 2828 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2829 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2830 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2831 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2832 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2833 // CHECK17: omp.inner.for.end: 2834 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2835 // CHECK17: omp.loop.exit: 2836 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 2837 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2838 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2839 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2840 // CHECK17: .omp.final.then: 2841 // CHECK17-NEXT: store i32 123, ptr [[TMP0]], align 4 2842 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 2843 // CHECK17: .omp.final.done: 2844 // CHECK17-NEXT: ret void 2845 // 2846 // 2847 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined 2848 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2849 // CHECK17-NEXT: entry: 2850 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2851 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2852 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2853 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2854 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 2855 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2856 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2857 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2858 // CHECK17-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 2859 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2860 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2861 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2862 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2863 // CHECK17-NEXT: [[I2:%.*]] = alloca i32, align 4 2864 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 2865 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2866 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2867 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2868 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2869 // CHECK17-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 2870 // CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2871 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 2872 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2873 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 0 2874 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 0 2875 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ] 2876 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4 2877 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START]], align 4 2878 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2879 // CHECK17-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2880 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2881 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP3]] to i32 2882 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2883 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP4]] to i32 2884 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2885 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2886 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2887 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2888 // CHECK17-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2889 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2890 // CHECK17-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]]) 2891 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2892 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2893 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122 2894 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2895 // CHECK17: cond.true: 2896 // CHECK17-NEXT: br label [[COND_END:%.*]] 2897 // CHECK17: cond.false: 2898 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2899 // CHECK17-NEXT: br label [[COND_END]] 2900 // CHECK17: cond.end: 2901 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2902 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2903 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2904 // CHECK17-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 2905 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2906 // CHECK17: omp.inner.for.cond: 2907 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2908 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2909 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2910 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2911 // CHECK17: omp.inner.for.body: 2912 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2913 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 2914 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2915 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I2]], align 4 2916 // CHECK17-NEXT: [[A5:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP1]], i32 0, i32 0 2917 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I2]], align 4 2918 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 2919 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A5]], i64 0, i64 [[IDXPROM]] 2920 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2921 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2922 // CHECK17: omp.body.continue: 2923 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2924 // CHECK17: omp.inner.for.inc: 2925 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2926 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 2927 // CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 2928 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2929 // CHECK17: omp.inner.for.end: 2930 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2931 // CHECK17: omp.loop.exit: 2932 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP6]]) 2933 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2934 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 2935 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2936 // CHECK17: .omp.final.then: 2937 // CHECK17-NEXT: store i32 123, ptr [[TMP0]], align 4 2938 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 2939 // CHECK17: .omp.final.done: 2940 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2941 // CHECK17-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2942 // CHECK17-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 2943 // CHECK17: .omp.linear.pu: 2944 // CHECK17-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 2945 // CHECK17: .omp.linear.pu.done: 2946 // CHECK17-NEXT: ret void 2947 // 2948 // 2949 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2950 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] { 2951 // CHECK19-NEXT: entry: 2952 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2953 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 2954 // CHECK19-NEXT: ret i32 [[CALL]] 2955 // 2956 // 2957 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2958 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2959 // CHECK19-NEXT: entry: 2960 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2961 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 2962 // CHECK19-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 2963 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 4 2964 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 4 2965 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 4 2966 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 2967 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2968 // CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2969 // CHECK19-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2970 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4 2971 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[I_CASTED]], align 4 2972 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[I_CASTED]], align 4 2973 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 2974 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2975 // CHECK19-NEXT: store ptr [[THIS1]], ptr [[TMP2]], align 4 2976 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2977 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP3]], align 4 2978 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2979 // CHECK19-NEXT: store ptr null, ptr [[TMP4]], align 4 2980 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2981 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 4 2982 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2983 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[TMP6]], align 4 2984 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2985 // CHECK19-NEXT: store ptr null, ptr [[TMP7]], align 4 2986 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2987 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2988 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2989 // CHECK19-NEXT: store i32 3, ptr [[TMP10]], align 4 2990 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2991 // CHECK19-NEXT: store i32 2, ptr [[TMP11]], align 4 2992 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2993 // CHECK19-NEXT: store ptr [[TMP8]], ptr [[TMP12]], align 4 2994 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2995 // CHECK19-NEXT: store ptr [[TMP9]], ptr [[TMP13]], align 4 2996 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2997 // CHECK19-NEXT: store ptr @.offload_sizes, ptr [[TMP14]], align 4 2998 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2999 // CHECK19-NEXT: store ptr @.offload_maptypes, ptr [[TMP15]], align 4 3000 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3001 // CHECK19-NEXT: store ptr null, ptr [[TMP16]], align 4 3002 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3003 // CHECK19-NEXT: store ptr null, ptr [[TMP17]], align 4 3004 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3005 // CHECK19-NEXT: store i64 123, ptr [[TMP18]], align 8 3006 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3007 // CHECK19-NEXT: store i64 0, ptr [[TMP19]], align 8 3008 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3009 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4 3010 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3011 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4 3012 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3013 // CHECK19-NEXT: store i32 0, ptr [[TMP22]], align 4 3014 // CHECK19-NEXT: [[TMP23:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, ptr [[KERNEL_ARGS]]) 3015 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3016 // CHECK19-NEXT: br i1 [[TMP24]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3017 // CHECK19: omp_offload.failed: 3018 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(ptr [[THIS1]], i32 [[TMP1]]) #[[ATTR3:[0-9]+]] 3019 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 3020 // CHECK19: omp_offload.cont: 3021 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3022 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A2]], i32 0, i32 0 3023 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3024 // CHECK19-NEXT: ret i32 [[TMP25]] 3025 // 3026 // 3027 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112 3028 // CHECK19-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[I:%.*]]) #[[ATTR1:[0-9]+]] { 3029 // CHECK19-NEXT: entry: 3030 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3031 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 3032 // CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3033 // CHECK19-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4 3034 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3035 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined, ptr [[I_ADDR]], ptr [[TMP0]]) 3036 // CHECK19-NEXT: ret void 3037 // 3038 // 3039 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined 3040 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3041 // CHECK19-NEXT: entry: 3042 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3043 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3044 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 3045 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3046 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3047 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3048 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3049 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3050 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3051 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3052 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4 3053 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3054 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3055 // CHECK19-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 3056 // CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3057 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 3058 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3059 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 0 3060 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 0 3061 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ] 3062 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3063 // CHECK19-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3064 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3065 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3066 // CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3067 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3068 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3069 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3070 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122 3071 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3072 // CHECK19: cond.true: 3073 // CHECK19-NEXT: br label [[COND_END:%.*]] 3074 // CHECK19: cond.false: 3075 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3076 // CHECK19-NEXT: br label [[COND_END]] 3077 // CHECK19: cond.end: 3078 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3079 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3080 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3081 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3082 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3083 // CHECK19: omp.inner.for.cond: 3084 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3085 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3086 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3087 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3088 // CHECK19: omp.inner.for.body: 3089 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3090 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3091 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined, i32 [[TMP9]], i32 [[TMP10]], ptr [[I1]], ptr [[TMP1]]) 3092 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3093 // CHECK19: omp.inner.for.inc: 3094 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3095 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3096 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3097 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3098 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 3099 // CHECK19: omp.inner.for.end: 3100 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3101 // CHECK19: omp.loop.exit: 3102 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3103 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3104 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3105 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3106 // CHECK19: .omp.final.then: 3107 // CHECK19-NEXT: store i32 123, ptr [[TMP0]], align 4 3108 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 3109 // CHECK19: .omp.final.done: 3110 // CHECK19-NEXT: ret void 3111 // 3112 // 3113 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.omp_outlined.omp_outlined 3114 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3115 // CHECK19-NEXT: entry: 3116 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3117 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3118 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3119 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3120 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 3121 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3122 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3123 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 3124 // CHECK19-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3125 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3126 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3127 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3128 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3129 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4 3130 // CHECK19-NEXT: [[I2:%.*]] = alloca i32, align 4 3131 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3132 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3133 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3134 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3135 // CHECK19-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 3136 // CHECK19-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3137 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 3138 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3139 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 0 3140 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 0 3141 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ] 3142 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP0]], align 4 3143 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START]], align 4 3144 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3145 // CHECK19-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3146 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3147 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3148 // CHECK19-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_LB]], align 4 3149 // CHECK19-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 3150 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3151 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3152 // CHECK19-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3153 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 3154 // CHECK19-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]]) 3155 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3156 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3157 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122 3158 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3159 // CHECK19: cond.true: 3160 // CHECK19-NEXT: br label [[COND_END:%.*]] 3161 // CHECK19: cond.false: 3162 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3163 // CHECK19-NEXT: br label [[COND_END]] 3164 // CHECK19: cond.end: 3165 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3166 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3167 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3168 // CHECK19-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 3169 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3170 // CHECK19: omp.inner.for.cond: 3171 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3172 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3173 // CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3174 // CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3175 // CHECK19: omp.inner.for.body: 3176 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3177 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 3178 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3179 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I1]], align 4 3180 // CHECK19-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP1]], i32 0, i32 0 3181 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[I1]], align 4 3182 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A4]], i32 0, i32 [[TMP13]] 3183 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3184 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3185 // CHECK19: omp.body.continue: 3186 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3187 // CHECK19: omp.inner.for.inc: 3188 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3189 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 3190 // CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 3191 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 3192 // CHECK19: omp.inner.for.end: 3193 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3194 // CHECK19: omp.loop.exit: 3195 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP6]]) 3196 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3197 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 3198 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3199 // CHECK19: .omp.final.then: 3200 // CHECK19-NEXT: store i32 123, ptr [[TMP0]], align 4 3201 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 3202 // CHECK19: .omp.final.done: 3203 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3204 // CHECK19-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3205 // CHECK19-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 3206 // CHECK19: .omp.linear.pu: 3207 // CHECK19-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 3208 // CHECK19: .omp.linear.pu.done: 3209 // CHECK19-NEXT: ret void 3210 // 3211 // 3212 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3213 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] { 3214 // CHECK21-NEXT: entry: 3215 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3216 // CHECK21-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 3217 // CHECK21-NEXT: ret i32 [[CALL]] 3218 // 3219 // 3220 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3221 // CHECK21-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 3222 // CHECK21-NEXT: entry: 3223 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3224 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 3225 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4 3226 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3227 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3228 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3229 // CHECK21-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3230 // CHECK21-NEXT: [[I2:%.*]] = alloca i32, align 4 3231 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4 3232 // CHECK21-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3233 // CHECK21-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3234 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3235 // CHECK21-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3236 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3237 // CHECK21-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3238 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 3239 // CHECK21-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 0 3240 // CHECK21-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 16) ] 3241 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4 3242 // CHECK21-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 4 3243 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3244 // CHECK21: omp.inner.for.cond: 3245 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3246 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3247 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3248 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3249 // CHECK21: omp.inner.for.body: 3250 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3251 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3252 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3253 // CHECK21-NEXT: store i32 [[ADD]], ptr [[I2]], align 4 3254 // CHECK21-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3255 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, ptr [[I2]], align 4 3256 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 3257 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A4]], i64 0, i64 [[IDXPROM]] 3258 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3259 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3260 // CHECK21: omp.body.continue: 3261 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3262 // CHECK21: omp.inner.for.inc: 3263 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3264 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1 3265 // CHECK21-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 3266 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3267 // CHECK21: omp.inner.for.end: 3268 // CHECK21-NEXT: store i32 123, ptr [[I]], align 4 3269 // CHECK21-NEXT: [[A6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3270 // CHECK21-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], ptr [[A6]], i64 0, i64 0 3271 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4 3272 // CHECK21-NEXT: ret i32 [[TMP7]] 3273 // 3274 // 3275 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3276 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] { 3277 // CHECK23-NEXT: entry: 3278 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3279 // CHECK23-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 3280 // CHECK23-NEXT: ret i32 [[CALL]] 3281 // 3282 // 3283 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3284 // CHECK23-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3285 // CHECK23-NEXT: entry: 3286 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3287 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 3288 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4 3289 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3290 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3291 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3292 // CHECK23-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3293 // CHECK23-NEXT: [[I2:%.*]] = alloca i32, align 4 3294 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4 3295 // CHECK23-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3296 // CHECK23-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3297 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3298 // CHECK23-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3299 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3300 // CHECK23-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3301 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 3302 // CHECK23-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 0 3303 // CHECK23-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 16) ] 3304 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4 3305 // CHECK23-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 4 3306 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3307 // CHECK23: omp.inner.for.cond: 3308 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3309 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3310 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] 3311 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3312 // CHECK23: omp.inner.for.body: 3313 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3314 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3315 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3316 // CHECK23-NEXT: store i32 [[ADD]], ptr [[I2]], align 4 3317 // CHECK23-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3318 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, ptr [[I2]], align 4 3319 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A4]], i32 0, i32 [[TMP5]] 3320 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3321 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3322 // CHECK23: omp.body.continue: 3323 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3324 // CHECK23: omp.inner.for.inc: 3325 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3326 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1 3327 // CHECK23-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 3328 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3329 // CHECK23: omp.inner.for.end: 3330 // CHECK23-NEXT: store i32 123, ptr [[I]], align 4 3331 // CHECK23-NEXT: [[A6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3332 // CHECK23-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], ptr [[A6]], i32 0, i32 0 3333 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4 3334 // CHECK23-NEXT: ret i32 [[TMP7]] 3335 // 3336 // 3337 // CHECK25-LABEL: define {{[^@]+}}@main 3338 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3339 // CHECK25-NEXT: entry: 3340 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3341 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3342 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 3343 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4 3344 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 3345 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3346 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3347 // CHECK25-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 3348 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3349 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 3350 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 3351 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 3352 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8 3353 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3354 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3355 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3356 // CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3357 // CHECK25-NEXT: store i32 0, ptr [[RETVAL]], align 4 3358 // CHECK25-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3359 // CHECK25-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 3360 // CHECK25-NEXT: store i32 100, ptr [[N]], align 4 3361 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 3362 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3363 // CHECK25-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 3364 // CHECK25-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 3365 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3366 // CHECK25-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 3367 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4 3368 // CHECK25-NEXT: store i32 [[TMP3]], ptr [[I_CASTED]], align 4 3369 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, ptr [[I_CASTED]], align 8 3370 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[N]], align 4 3371 // CHECK25-NEXT: store i32 [[TMP5]], ptr [[N_CASTED]], align 4 3372 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 8 3373 // CHECK25-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4 3374 // CHECK25-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 32, i1 false) 3375 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3376 // CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP8]], align 8 3377 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3378 // CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 3379 // CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3380 // CHECK25-NEXT: store ptr null, ptr [[TMP10]], align 8 3381 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3382 // CHECK25-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 8 3383 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3384 // CHECK25-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 3385 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 1 3386 // CHECK25-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 8 3387 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3388 // CHECK25-NEXT: store ptr null, ptr [[TMP14]], align 8 3389 // CHECK25-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3390 // CHECK25-NEXT: store i64 [[TMP4]], ptr [[TMP15]], align 8 3391 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3392 // CHECK25-NEXT: store i64 [[TMP4]], ptr [[TMP16]], align 8 3393 // CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3394 // CHECK25-NEXT: store ptr null, ptr [[TMP17]], align 8 3395 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 3396 // CHECK25-NEXT: store i64 [[TMP6]], ptr [[TMP18]], align 8 3397 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 3398 // CHECK25-NEXT: store i64 [[TMP6]], ptr [[TMP19]], align 8 3399 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 3400 // CHECK25-NEXT: store ptr null, ptr [[TMP20]], align 8 3401 // CHECK25-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3402 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3403 // CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3404 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 4 3405 // CHECK25-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 4 3406 // CHECK25-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3407 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 0 3408 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3409 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3410 // CHECK25-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3411 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3412 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 1 3413 // CHECK25-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i64 3414 // CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 3415 // CHECK25-NEXT: store i32 3, ptr [[TMP28]], align 4 3416 // CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 3417 // CHECK25-NEXT: store i32 4, ptr [[TMP29]], align 4 3418 // CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 3419 // CHECK25-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 8 3420 // CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 3421 // CHECK25-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 8 3422 // CHECK25-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 3423 // CHECK25-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 8 3424 // CHECK25-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 3425 // CHECK25-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 8 3426 // CHECK25-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3427 // CHECK25-NEXT: store ptr null, ptr [[TMP34]], align 8 3428 // CHECK25-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3429 // CHECK25-NEXT: store ptr null, ptr [[TMP35]], align 8 3430 // CHECK25-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3431 // CHECK25-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 8 3432 // CHECK25-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3433 // CHECK25-NEXT: store i64 0, ptr [[TMP37]], align 8 3434 // CHECK25-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3435 // CHECK25-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 4 3436 // CHECK25-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3437 // CHECK25-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 3438 // CHECK25-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3439 // CHECK25-NEXT: store i32 0, ptr [[TMP40]], align 4 3440 // CHECK25-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, ptr [[KERNEL_ARGS]]) 3441 // CHECK25-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 3442 // CHECK25-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3443 // CHECK25: omp_offload.failed: 3444 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], ptr [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]] 3445 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3446 // CHECK25: omp_offload.cont: 3447 // CHECK25-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 3448 // CHECK25-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP43]]) 3449 // CHECK25-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 3450 // CHECK25-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 3451 // CHECK25-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]]) 3452 // CHECK25-NEXT: [[TMP45:%.*]] = load i32, ptr [[RETVAL]], align 4 3453 // CHECK25-NEXT: ret i32 [[TMP45]] 3454 // 3455 // 3456 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 3457 // CHECK25-SAME: (i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 3458 // CHECK25-NEXT: entry: 3459 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3460 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3461 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 3462 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3463 // CHECK25-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 3464 // CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3465 // CHECK25-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 8 3466 // CHECK25-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 3467 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 3468 // CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3469 // CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]]) 3470 // CHECK25-NEXT: ret void 3471 // 3472 // 3473 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined 3474 // CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3475 // CHECK25-NEXT: entry: 3476 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3477 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3478 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 3479 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 3480 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3481 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3482 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3483 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3484 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3485 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3486 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3487 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3488 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3489 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3490 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3491 // CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 4 3492 // CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3493 // CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3494 // CHECK25-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 3495 // CHECK25-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 3496 // CHECK25-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 3497 // CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3498 // CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 3499 // CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 3500 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 3501 // CHECK25-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3502 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 3503 // CHECK25-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3504 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3505 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3506 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3507 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3508 // CHECK25-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3509 // CHECK25-NEXT: store i32 0, ptr [[I3]], align 4 3510 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3511 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3512 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3513 // CHECK25: omp.precond.then: 3514 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ] 3515 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3516 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3517 // CHECK25-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 3518 // CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3519 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3520 // CHECK25-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3521 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 3522 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3523 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3524 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3525 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3526 // CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3527 // CHECK25: cond.true: 3528 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3529 // CHECK25-NEXT: br label [[COND_END:%.*]] 3530 // CHECK25: cond.false: 3531 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3532 // CHECK25-NEXT: br label [[COND_END]] 3533 // CHECK25: cond.end: 3534 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3535 // CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3536 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3537 // CHECK25-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 3538 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3539 // CHECK25: omp.inner.for.cond: 3540 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3541 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3542 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3543 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3544 // CHECK25: omp.inner.for.body: 3545 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3546 // CHECK25-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 3547 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3548 // CHECK25-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 3549 // CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[I4]], ptr [[TMP1]], i64 [[TMP2]], ptr [[TMP3]]) 3550 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3551 // CHECK25: omp.inner.for.inc: 3552 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3553 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3554 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3555 // CHECK25-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3556 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 3557 // CHECK25: omp.inner.for.end: 3558 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3559 // CHECK25: omp.loop.exit: 3560 // CHECK25-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3561 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 3562 // CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 3563 // CHECK25-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3564 // CHECK25-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3565 // CHECK25-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3566 // CHECK25: .omp.final.then: 3567 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3568 // CHECK25-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 3569 // CHECK25-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3570 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 3571 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 3572 // CHECK25-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4 3573 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3574 // CHECK25: .omp.final.done: 3575 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3576 // CHECK25: omp.precond.end: 3577 // CHECK25-NEXT: ret void 3578 // 3579 // 3580 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined 3581 // CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3582 // CHECK25-NEXT: entry: 3583 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3584 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3585 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3586 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3587 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 3588 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 3589 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3590 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3591 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3592 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3593 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3594 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3595 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4 3596 // CHECK25-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 3597 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3598 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3599 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3600 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3601 // CHECK25-NEXT: [[I5:%.*]] = alloca i32, align 4 3602 // CHECK25-NEXT: [[I6:%.*]] = alloca i32, align 4 3603 // CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3604 // CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3605 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3606 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3607 // CHECK25-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 3608 // CHECK25-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 3609 // CHECK25-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 3610 // CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3611 // CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 3612 // CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 3613 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 3614 // CHECK25-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3615 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 3616 // CHECK25-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3617 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3618 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3619 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3620 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3621 // CHECK25-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3622 // CHECK25-NEXT: store i32 0, ptr [[I3]], align 4 3623 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3624 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3625 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3626 // CHECK25: omp.precond.then: 3627 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i64 16) ] 3628 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 4 3629 // CHECK25-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4 3630 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3631 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3632 // CHECK25-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 3633 // CHECK25-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3634 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32 3635 // CHECK25-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3636 // CHECK25-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32 3637 // CHECK25-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3638 // CHECK25-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 3639 // CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3640 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3641 // CHECK25-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3642 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 3643 // CHECK25-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 3644 // CHECK25-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3645 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 3646 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3647 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3648 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3649 // CHECK25-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 3650 // CHECK25-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3651 // CHECK25: cond.true: 3652 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3653 // CHECK25-NEXT: br label [[COND_END:%.*]] 3654 // CHECK25: cond.false: 3655 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3656 // CHECK25-NEXT: br label [[COND_END]] 3657 // CHECK25: cond.end: 3658 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 3659 // CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3660 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3661 // CHECK25-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 4 3662 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3663 // CHECK25: omp.inner.for.cond: 3664 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3665 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3666 // CHECK25-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 3667 // CHECK25-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3668 // CHECK25: omp.inner.for.body: 3669 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3670 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 3671 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3672 // CHECK25-NEXT: store i32 [[ADD]], ptr [[I5]], align 4 3673 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 4 3674 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 3675 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 [[IDXPROM]] 3676 // CHECK25-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3677 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3678 // CHECK25: omp.body.continue: 3679 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3680 // CHECK25: omp.inner.for.inc: 3681 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3682 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1 3683 // CHECK25-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 3684 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 3685 // CHECK25: omp.inner.for.end: 3686 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3687 // CHECK25: omp.loop.exit: 3688 // CHECK25-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3689 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 3690 // CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]]) 3691 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3692 // CHECK25-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3693 // CHECK25-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3694 // CHECK25: .omp.final.then: 3695 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3696 // CHECK25-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0 3697 // CHECK25-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 3698 // CHECK25-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 3699 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 3700 // CHECK25-NEXT: store i32 [[ADD13]], ptr [[TMP0]], align 4 3701 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3702 // CHECK25: .omp.final.done: 3703 // CHECK25-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3704 // CHECK25-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3705 // CHECK25-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 3706 // CHECK25: .omp.linear.pu: 3707 // CHECK25-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 3708 // CHECK25: .omp.linear.pu.done: 3709 // CHECK25-NEXT: br label [[OMP_PRECOND_END]] 3710 // CHECK25: omp.precond.end: 3711 // CHECK25-NEXT: ret void 3712 // 3713 // 3714 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3715 // CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat { 3716 // CHECK25-NEXT: entry: 3717 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3718 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3719 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4 3720 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4 3721 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8 3722 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8 3723 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 3724 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 3725 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 3726 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3727 // CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3728 // CHECK25-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3729 // CHECK25-NEXT: store i32 0, ptr [[TE]], align 4 3730 // CHECK25-NEXT: store i32 128, ptr [[TH]], align 4 3731 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, ptr [[TE]], align 4 3732 // CHECK25-NEXT: store i32 [[TMP0]], ptr [[TE_CASTED]], align 4 3733 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, ptr [[TE_CASTED]], align 8 3734 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 4 3735 // CHECK25-NEXT: store i32 [[TMP2]], ptr [[TH_CASTED]], align 4 3736 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, ptr [[TH_CASTED]], align 8 3737 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3738 // CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP4]], align 8 3739 // CHECK25-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3740 // CHECK25-NEXT: store i64 [[TMP1]], ptr [[TMP5]], align 8 3741 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3742 // CHECK25-NEXT: store ptr null, ptr [[TMP6]], align 8 3743 // CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3744 // CHECK25-NEXT: store i64 [[TMP3]], ptr [[TMP7]], align 8 3745 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3746 // CHECK25-NEXT: store i64 [[TMP3]], ptr [[TMP8]], align 8 3747 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3748 // CHECK25-NEXT: store ptr null, ptr [[TMP9]], align 8 3749 // CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3750 // CHECK25-NEXT: store ptr [[A]], ptr [[TMP10]], align 8 3751 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3752 // CHECK25-NEXT: store ptr [[A]], ptr [[TMP11]], align 8 3753 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3754 // CHECK25-NEXT: store ptr null, ptr [[TMP12]], align 8 3755 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3756 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3757 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, ptr [[TE]], align 4 3758 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, ptr [[TH]], align 4 3759 // CHECK25-NEXT: [[TMP17:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP15]], 0 3760 // CHECK25-NEXT: [[TMP18:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP16]], 0 3761 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 3762 // CHECK25-NEXT: store i32 3, ptr [[TMP19]], align 4 3763 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 3764 // CHECK25-NEXT: store i32 3, ptr [[TMP20]], align 4 3765 // CHECK25-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 3766 // CHECK25-NEXT: store ptr [[TMP13]], ptr [[TMP21]], align 8 3767 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 3768 // CHECK25-NEXT: store ptr [[TMP14]], ptr [[TMP22]], align 8 3769 // CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 3770 // CHECK25-NEXT: store ptr @.offload_sizes.1, ptr [[TMP23]], align 8 3771 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 3772 // CHECK25-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP24]], align 8 3773 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3774 // CHECK25-NEXT: store ptr null, ptr [[TMP25]], align 8 3775 // CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3776 // CHECK25-NEXT: store ptr null, ptr [[TMP26]], align 8 3777 // CHECK25-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3778 // CHECK25-NEXT: store i64 10, ptr [[TMP27]], align 8 3779 // CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3780 // CHECK25-NEXT: store i64 0, ptr [[TMP28]], align 8 3781 // CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3782 // CHECK25-NEXT: store [3 x i32] [[TMP17]], ptr [[TMP29]], align 4 3783 // CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3784 // CHECK25-NEXT: store [3 x i32] [[TMP18]], ptr [[TMP30]], align 4 3785 // CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3786 // CHECK25-NEXT: store i32 0, ptr [[TMP31]], align 4 3787 // CHECK25-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 [[TMP15]], i32 [[TMP16]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, ptr [[KERNEL_ARGS]]) 3788 // CHECK25-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 3789 // CHECK25-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3790 // CHECK25: omp_offload.failed: 3791 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], ptr [[A]]) #[[ATTR4]] 3792 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]] 3793 // CHECK25: omp_offload.cont: 3794 // CHECK25-NEXT: ret i32 0 3795 // 3796 // 3797 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155 3798 // CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3799 // CHECK25-NEXT: entry: 3800 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8 3801 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8 3802 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3803 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4]]) 3804 // CHECK25-NEXT: store i64 [[TE]], ptr [[TE_ADDR]], align 8 3805 // CHECK25-NEXT: store i64 [[TH]], ptr [[TH_ADDR]], align 8 3806 // CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3807 // CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3808 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 4 3809 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 4 3810 // CHECK25-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 3811 // CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined, ptr [[TMP1]]) 3812 // CHECK25-NEXT: ret void 3813 // 3814 // 3815 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined 3816 // CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3817 // CHECK25-NEXT: entry: 3818 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3819 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3820 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3821 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3822 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3823 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3824 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3825 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3826 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3827 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3828 // CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3829 // CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3830 // CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3831 // CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3832 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3833 // CHECK25-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 3834 // CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3835 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3836 // CHECK25-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3837 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3838 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3839 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3840 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3841 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3842 // CHECK25: cond.true: 3843 // CHECK25-NEXT: br label [[COND_END:%.*]] 3844 // CHECK25: cond.false: 3845 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3846 // CHECK25-NEXT: br label [[COND_END]] 3847 // CHECK25: cond.end: 3848 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3849 // CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3850 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3851 // CHECK25-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3852 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3853 // CHECK25: omp.inner.for.cond: 3854 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 3855 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 3856 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3857 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3858 // CHECK25: omp.inner.for.body: 3859 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]] 3860 // CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3861 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 3862 // CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3863 // CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP11]] 3864 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3865 // CHECK25: omp.inner.for.inc: 3866 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 3867 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]] 3868 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3869 // CHECK25-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 3870 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 3871 // CHECK25: omp.inner.for.end: 3872 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3873 // CHECK25: omp.loop.exit: 3874 // CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3875 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3876 // CHECK25-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3877 // CHECK25-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3878 // CHECK25: .omp.final.then: 3879 // CHECK25-NEXT: store i32 10, ptr [[I]], align 4 3880 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3881 // CHECK25: .omp.final.done: 3882 // CHECK25-NEXT: ret void 3883 // 3884 // 3885 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined 3886 // CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3887 // CHECK25-NEXT: entry: 3888 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3889 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3890 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3891 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3892 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 3893 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3894 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4 3895 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3896 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3897 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3898 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3899 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4 3900 // CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3901 // CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3902 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3903 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3904 // CHECK25-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 3905 // CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 3906 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3907 // CHECK25-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3908 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3909 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3910 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3911 // CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3912 // CHECK25-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3913 // CHECK25-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3914 // CHECK25-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3915 // CHECK25-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3916 // CHECK25-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3917 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3918 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3919 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3920 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 3921 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3922 // CHECK25: cond.true: 3923 // CHECK25-NEXT: br label [[COND_END:%.*]] 3924 // CHECK25: cond.false: 3925 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3926 // CHECK25-NEXT: br label [[COND_END]] 3927 // CHECK25: cond.end: 3928 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3929 // CHECK25-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3930 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3931 // CHECK25-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3932 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3933 // CHECK25: omp.inner.for.cond: 3934 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 3935 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 3936 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3937 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3938 // CHECK25: omp.inner.for.body: 3939 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 3940 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3941 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3942 // CHECK25-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 3943 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 3944 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3945 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 3946 // CHECK25-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 3947 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3948 // CHECK25: omp.body.continue: 3949 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3950 // CHECK25: omp.inner.for.inc: 3951 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 3952 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3953 // CHECK25-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 3954 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 3955 // CHECK25: omp.inner.for.end: 3956 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3957 // CHECK25: omp.loop.exit: 3958 // CHECK25-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]]) 3959 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3960 // CHECK25-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3961 // CHECK25-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3962 // CHECK25: .omp.final.then: 3963 // CHECK25-NEXT: store i32 10, ptr [[I]], align 4 3964 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]] 3965 // CHECK25: .omp.final.done: 3966 // CHECK25-NEXT: ret void 3967 // 3968 // 3969 // CHECK27-LABEL: define {{[^@]+}}@main 3970 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3971 // CHECK27-NEXT: entry: 3972 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3973 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3974 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 3975 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4 3976 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 3977 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3978 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 3979 // CHECK27-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 3980 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3981 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 3982 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 3983 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 3984 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4 3985 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 3986 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3987 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3988 // CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3989 // CHECK27-NEXT: store i32 0, ptr [[RETVAL]], align 4 3990 // CHECK27-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3991 // CHECK27-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 3992 // CHECK27-NEXT: store i32 100, ptr [[N]], align 4 3993 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 3994 // CHECK27-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 3995 // CHECK27-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 3996 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3997 // CHECK27-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 3998 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4 3999 // CHECK27-NEXT: store i32 [[TMP2]], ptr [[I_CASTED]], align 4 4000 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[I_CASTED]], align 4 4001 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 4 4002 // CHECK27-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 4003 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 4004 // CHECK27-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4 4005 // CHECK27-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64 4006 // CHECK27-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 32, i1 false) 4007 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4008 // CHECK27-NEXT: store i32 [[TMP0]], ptr [[TMP8]], align 4 4009 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4010 // CHECK27-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 4011 // CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4012 // CHECK27-NEXT: store ptr null, ptr [[TMP10]], align 4 4013 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4014 // CHECK27-NEXT: store ptr [[VLA]], ptr [[TMP11]], align 4 4015 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4016 // CHECK27-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 4017 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 1 4018 // CHECK27-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 4 4019 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4020 // CHECK27-NEXT: store ptr null, ptr [[TMP14]], align 4 4021 // CHECK27-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4022 // CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP15]], align 4 4023 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4024 // CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP16]], align 4 4025 // CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4026 // CHECK27-NEXT: store ptr null, ptr [[TMP17]], align 4 4027 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4028 // CHECK27-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 4 4029 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4030 // CHECK27-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 4 4031 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 4032 // CHECK27-NEXT: store ptr null, ptr [[TMP20]], align 4 4033 // CHECK27-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4034 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4035 // CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4036 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 4 4037 // CHECK27-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_]], align 4 4038 // CHECK27-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4039 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP25]], 0 4040 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4041 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4042 // CHECK27-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4043 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4044 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], 1 4045 // CHECK27-NEXT: [[TMP27:%.*]] = zext i32 [[ADD]] to i64 4046 // CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4047 // CHECK27-NEXT: store i32 3, ptr [[TMP28]], align 4 4048 // CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4049 // CHECK27-NEXT: store i32 4, ptr [[TMP29]], align 4 4050 // CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4051 // CHECK27-NEXT: store ptr [[TMP21]], ptr [[TMP30]], align 4 4052 // CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4053 // CHECK27-NEXT: store ptr [[TMP22]], ptr [[TMP31]], align 4 4054 // CHECK27-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4055 // CHECK27-NEXT: store ptr [[TMP23]], ptr [[TMP32]], align 4 4056 // CHECK27-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4057 // CHECK27-NEXT: store ptr @.offload_maptypes, ptr [[TMP33]], align 4 4058 // CHECK27-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4059 // CHECK27-NEXT: store ptr null, ptr [[TMP34]], align 4 4060 // CHECK27-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4061 // CHECK27-NEXT: store ptr null, ptr [[TMP35]], align 4 4062 // CHECK27-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4063 // CHECK27-NEXT: store i64 [[TMP27]], ptr [[TMP36]], align 8 4064 // CHECK27-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4065 // CHECK27-NEXT: store i64 0, ptr [[TMP37]], align 8 4066 // CHECK27-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4067 // CHECK27-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 4 4068 // CHECK27-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4069 // CHECK27-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 4070 // CHECK27-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4071 // CHECK27-NEXT: store i32 0, ptr [[TMP40]], align 4 4072 // CHECK27-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, ptr [[KERNEL_ARGS]]) 4073 // CHECK27-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 4074 // CHECK27-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4075 // CHECK27: omp_offload.failed: 4076 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], ptr [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]] 4077 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4078 // CHECK27: omp_offload.cont: 4079 // CHECK27-NEXT: [[TMP43:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 4080 // CHECK27-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP43]]) 4081 // CHECK27-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 4082 // CHECK27-NEXT: [[TMP44:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 4083 // CHECK27-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP44]]) 4084 // CHECK27-NEXT: [[TMP45:%.*]] = load i32, ptr [[RETVAL]], align 4 4085 // CHECK27-NEXT: ret i32 [[TMP45]] 4086 // 4087 // 4088 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 4089 // CHECK27-SAME: (i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]]) #[[ATTR2:[0-9]+]] { 4090 // CHECK27-NEXT: entry: 4091 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4092 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4093 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 4094 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4095 // CHECK27-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4096 // CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4097 // CHECK27-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4 4098 // CHECK27-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 4099 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4100 // CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4101 // CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined, ptr [[I_ADDR]], ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]]) 4102 // CHECK27-NEXT: ret void 4103 // 4104 // 4105 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined 4106 // CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4107 // CHECK27-NEXT: entry: 4108 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4109 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4110 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 4111 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4112 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4113 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4114 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4115 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4116 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4117 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4118 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 4119 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4120 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4121 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4122 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4123 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4 4124 // CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4125 // CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4126 // CHECK27-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 4127 // CHECK27-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4128 // CHECK27-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4129 // CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4130 // CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 4131 // CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4132 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4133 // CHECK27-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4134 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 4135 // CHECK27-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 4136 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4137 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4138 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4139 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4140 // CHECK27-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4141 // CHECK27-NEXT: store i32 0, ptr [[I3]], align 4 4142 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4143 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4144 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4145 // CHECK27: omp.precond.then: 4146 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ] 4147 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4148 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4149 // CHECK27-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 4150 // CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4151 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4152 // CHECK27-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4153 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 4154 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4155 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4156 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4157 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4158 // CHECK27-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4159 // CHECK27: cond.true: 4160 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4161 // CHECK27-NEXT: br label [[COND_END:%.*]] 4162 // CHECK27: cond.false: 4163 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4164 // CHECK27-NEXT: br label [[COND_END]] 4165 // CHECK27: cond.end: 4166 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4167 // CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4168 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4169 // CHECK27-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 4170 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4171 // CHECK27: omp.inner.for.cond: 4172 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4173 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4174 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4175 // CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4176 // CHECK27: omp.inner.for.body: 4177 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4178 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4179 // CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[I4]], ptr [[TMP1]], i32 [[TMP2]], ptr [[TMP3]]) 4180 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4181 // CHECK27: omp.inner.for.inc: 4182 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4183 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4184 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4185 // CHECK27-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 4186 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 4187 // CHECK27: omp.inner.for.end: 4188 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4189 // CHECK27: omp.loop.exit: 4190 // CHECK27-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4191 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 4192 // CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 4193 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4194 // CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4195 // CHECK27-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4196 // CHECK27: .omp.final.then: 4197 // CHECK27-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4198 // CHECK27-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 4199 // CHECK27-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4200 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 4201 // CHECK27-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 4202 // CHECK27-NEXT: store i32 [[ADD9]], ptr [[TMP0]], align 4 4203 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4204 // CHECK27: .omp.final.done: 4205 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4206 // CHECK27: omp.precond.end: 4207 // CHECK27-NEXT: ret void 4208 // 4209 // 4210 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp_outlined 4211 // CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4212 // CHECK27-NEXT: entry: 4213 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4214 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4215 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4216 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4217 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 4218 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4219 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4220 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4221 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4222 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4223 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4224 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4225 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4 4226 // CHECK27-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4227 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4228 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4229 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4230 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4231 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4 4232 // CHECK27-NEXT: [[I5:%.*]] = alloca i32, align 4 4233 // CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4234 // CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4235 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4236 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4237 // CHECK27-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 4238 // CHECK27-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4239 // CHECK27-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 4240 // CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4241 // CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 4242 // CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4243 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 4244 // CHECK27-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4245 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP1]], align 4 4246 // CHECK27-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 4247 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4248 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4249 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4250 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4251 // CHECK27-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4252 // CHECK27-NEXT: store i32 0, ptr [[I3]], align 4 4253 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4254 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4255 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4256 // CHECK27: omp.precond.then: 4257 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP3]], i32 16) ] 4258 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP0]], align 4 4259 // CHECK27-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4 4260 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4261 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4262 // CHECK27-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4 4263 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4264 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4265 // CHECK27-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_LB]], align 4 4266 // CHECK27-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_UB]], align 4 4267 // CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4268 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4269 // CHECK27-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4270 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 4271 // CHECK27-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP12]]) 4272 // CHECK27-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4273 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 4274 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4275 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4276 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4277 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]] 4278 // CHECK27-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4279 // CHECK27: cond.true: 4280 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4281 // CHECK27-NEXT: br label [[COND_END:%.*]] 4282 // CHECK27: cond.false: 4283 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4284 // CHECK27-NEXT: br label [[COND_END]] 4285 // CHECK27: cond.end: 4286 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ] 4287 // CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4288 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4289 // CHECK27-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV]], align 4 4290 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4291 // CHECK27: omp.inner.for.cond: 4292 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4293 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4294 // CHECK27-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4295 // CHECK27-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4296 // CHECK27: omp.inner.for.body: 4297 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4298 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 4299 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4300 // CHECK27-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 4301 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 4 4302 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 [[TMP23]] 4303 // CHECK27-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 4304 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4305 // CHECK27: omp.body.continue: 4306 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4307 // CHECK27: omp.inner.for.inc: 4308 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4309 // CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1 4310 // CHECK27-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 4311 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 4312 // CHECK27: omp.inner.for.end: 4313 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4314 // CHECK27: omp.loop.exit: 4315 // CHECK27-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4316 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 4317 // CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP26]]) 4318 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4319 // CHECK27-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 4320 // CHECK27-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4321 // CHECK27: .omp.final.then: 4322 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4323 // CHECK27-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0 4324 // CHECK27-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 4325 // CHECK27-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 4326 // CHECK27-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 4327 // CHECK27-NEXT: store i32 [[ADD12]], ptr [[TMP0]], align 4 4328 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4329 // CHECK27: .omp.final.done: 4330 // CHECK27-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4331 // CHECK27-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4332 // CHECK27-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 4333 // CHECK27: .omp.linear.pu: 4334 // CHECK27-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 4335 // CHECK27: .omp.linear.pu.done: 4336 // CHECK27-NEXT: br label [[OMP_PRECOND_END]] 4337 // CHECK27: omp.precond.end: 4338 // CHECK27-NEXT: ret void 4339 // 4340 // 4341 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4342 // CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR7:[0-9]+]] comdat { 4343 // CHECK27-NEXT: entry: 4344 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4345 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4346 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4 4347 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4 4348 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4 4349 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4 4350 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 4351 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 4352 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 4353 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4354 // CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4355 // CHECK27-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4356 // CHECK27-NEXT: store i32 0, ptr [[TE]], align 4 4357 // CHECK27-NEXT: store i32 128, ptr [[TH]], align 4 4358 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, ptr [[TE]], align 4 4359 // CHECK27-NEXT: store i32 [[TMP0]], ptr [[TE_CASTED]], align 4 4360 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE_CASTED]], align 4 4361 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 4 4362 // CHECK27-NEXT: store i32 [[TMP2]], ptr [[TH_CASTED]], align 4 4363 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_CASTED]], align 4 4364 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4365 // CHECK27-NEXT: store i32 [[TMP1]], ptr [[TMP4]], align 4 4366 // CHECK27-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4367 // CHECK27-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 4 4368 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4369 // CHECK27-NEXT: store ptr null, ptr [[TMP6]], align 4 4370 // CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4371 // CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 4372 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4373 // CHECK27-NEXT: store i32 [[TMP3]], ptr [[TMP8]], align 4 4374 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4375 // CHECK27-NEXT: store ptr null, ptr [[TMP9]], align 4 4376 // CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4377 // CHECK27-NEXT: store ptr [[A]], ptr [[TMP10]], align 4 4378 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4379 // CHECK27-NEXT: store ptr [[A]], ptr [[TMP11]], align 4 4380 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4381 // CHECK27-NEXT: store ptr null, ptr [[TMP12]], align 4 4382 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4383 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4384 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, ptr [[TE]], align 4 4385 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, ptr [[TH]], align 4 4386 // CHECK27-NEXT: [[TMP17:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP15]], 0 4387 // CHECK27-NEXT: [[TMP18:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP16]], 0 4388 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4389 // CHECK27-NEXT: store i32 3, ptr [[TMP19]], align 4 4390 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4391 // CHECK27-NEXT: store i32 3, ptr [[TMP20]], align 4 4392 // CHECK27-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4393 // CHECK27-NEXT: store ptr [[TMP13]], ptr [[TMP21]], align 4 4394 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4395 // CHECK27-NEXT: store ptr [[TMP14]], ptr [[TMP22]], align 4 4396 // CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4397 // CHECK27-NEXT: store ptr @.offload_sizes.1, ptr [[TMP23]], align 4 4398 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4399 // CHECK27-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP24]], align 4 4400 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4401 // CHECK27-NEXT: store ptr null, ptr [[TMP25]], align 4 4402 // CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4403 // CHECK27-NEXT: store ptr null, ptr [[TMP26]], align 4 4404 // CHECK27-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4405 // CHECK27-NEXT: store i64 10, ptr [[TMP27]], align 8 4406 // CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4407 // CHECK27-NEXT: store i64 0, ptr [[TMP28]], align 8 4408 // CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4409 // CHECK27-NEXT: store [3 x i32] [[TMP17]], ptr [[TMP29]], align 4 4410 // CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4411 // CHECK27-NEXT: store [3 x i32] [[TMP18]], ptr [[TMP30]], align 4 4412 // CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4413 // CHECK27-NEXT: store i32 0, ptr [[TMP31]], align 4 4414 // CHECK27-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 [[TMP15]], i32 [[TMP16]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, ptr [[KERNEL_ARGS]]) 4415 // CHECK27-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 4416 // CHECK27-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4417 // CHECK27: omp_offload.failed: 4418 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], ptr [[A]]) #[[ATTR4]] 4419 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]] 4420 // CHECK27: omp_offload.cont: 4421 // CHECK27-NEXT: ret i32 0 4422 // 4423 // 4424 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155 4425 // CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4426 // CHECK27-NEXT: entry: 4427 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4 4428 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4 4429 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4430 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4]]) 4431 // CHECK27-NEXT: store i32 [[TE]], ptr [[TE_ADDR]], align 4 4432 // CHECK27-NEXT: store i32 [[TH]], ptr [[TH_ADDR]], align 4 4433 // CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4434 // CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4435 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[TE_ADDR]], align 4 4436 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[TH_ADDR]], align 4 4437 // CHECK27-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 4438 // CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined, ptr [[TMP1]]) 4439 // CHECK27-NEXT: ret void 4440 // 4441 // 4442 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined 4443 // CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4444 // CHECK27-NEXT: entry: 4445 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4446 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4447 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4448 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4449 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4450 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4451 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4452 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4453 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4454 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4455 // CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4456 // CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4457 // CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4458 // CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4459 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4460 // CHECK27-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 4461 // CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4462 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4463 // CHECK27-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4464 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4465 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4466 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4467 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4468 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4469 // CHECK27: cond.true: 4470 // CHECK27-NEXT: br label [[COND_END:%.*]] 4471 // CHECK27: cond.false: 4472 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4473 // CHECK27-NEXT: br label [[COND_END]] 4474 // CHECK27: cond.end: 4475 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4476 // CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4477 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4478 // CHECK27-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4479 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4480 // CHECK27: omp.inner.for.cond: 4481 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 4482 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 4483 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4484 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4485 // CHECK27: omp.inner.for.body: 4486 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP12]] 4487 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 4488 // CHECK27-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP12]] 4489 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4490 // CHECK27: omp.inner.for.inc: 4491 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 4492 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP12]] 4493 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4494 // CHECK27-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 4495 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4496 // CHECK27: omp.inner.for.end: 4497 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4498 // CHECK27: omp.loop.exit: 4499 // CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4500 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4501 // CHECK27-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4502 // CHECK27-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4503 // CHECK27: .omp.final.then: 4504 // CHECK27-NEXT: store i32 10, ptr [[I]], align 4 4505 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4506 // CHECK27: .omp.final.done: 4507 // CHECK27-NEXT: ret void 4508 // 4509 // 4510 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.omp_outlined.omp_outlined 4511 // CHECK27-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4512 // CHECK27-NEXT: entry: 4513 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4514 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4515 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4516 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4517 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4518 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4519 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4 4520 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4521 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4522 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4523 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4524 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4 4525 // CHECK27-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4526 // CHECK27-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4527 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4528 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4529 // CHECK27-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4530 // CHECK27-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4531 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4532 // CHECK27-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 4533 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4534 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4535 // CHECK27-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4536 // CHECK27-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4537 // CHECK27-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4538 // CHECK27-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4539 // CHECK27-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4540 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 4541 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4542 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4543 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 4544 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4545 // CHECK27: cond.true: 4546 // CHECK27-NEXT: br label [[COND_END:%.*]] 4547 // CHECK27: cond.false: 4548 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4549 // CHECK27-NEXT: br label [[COND_END]] 4550 // CHECK27: cond.end: 4551 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4552 // CHECK27-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4553 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4554 // CHECK27-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 4555 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4556 // CHECK27: omp.inner.for.cond: 4557 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 4558 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 4559 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4560 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4561 // CHECK27: omp.inner.for.body: 4562 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 4563 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4564 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4565 // CHECK27-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 4566 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 4567 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 4568 // CHECK27-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]] 4569 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4570 // CHECK27: omp.body.continue: 4571 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4572 // CHECK27: omp.inner.for.inc: 4573 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 4574 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4575 // CHECK27-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 4576 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 4577 // CHECK27: omp.inner.for.end: 4578 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4579 // CHECK27: omp.loop.exit: 4580 // CHECK27-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]]) 4581 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4582 // CHECK27-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4583 // CHECK27-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4584 // CHECK27: .omp.final.then: 4585 // CHECK27-NEXT: store i32 10, ptr [[I]], align 4 4586 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]] 4587 // CHECK27: .omp.final.done: 4588 // CHECK27-NEXT: ret void 4589 // 4590 // 4591 // CHECK29-LABEL: define {{[^@]+}}@main 4592 // CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4593 // CHECK29-NEXT: entry: 4594 // CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4595 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4596 // CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 4597 // CHECK29-NEXT: [[N:%.*]] = alloca i32, align 4 4598 // CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 4599 // CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4600 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4601 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4 4602 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4603 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4604 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4605 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4606 // CHECK29-NEXT: [[I3:%.*]] = alloca i32, align 4 4607 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4608 // CHECK29-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4609 // CHECK29-NEXT: [[I4:%.*]] = alloca i32, align 4 4610 // CHECK29-NEXT: [[I5:%.*]] = alloca i32, align 4 4611 // CHECK29-NEXT: store i32 0, ptr [[RETVAL]], align 4 4612 // CHECK29-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4613 // CHECK29-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 4614 // CHECK29-NEXT: store i32 100, ptr [[N]], align 4 4615 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 4616 // CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4617 // CHECK29-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 4618 // CHECK29-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 4619 // CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4620 // CHECK29-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 4621 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 4622 // CHECK29-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 4623 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4624 // CHECK29-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4625 // CHECK29-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4626 // CHECK29-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4627 // CHECK29-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4628 // CHECK29-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4629 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4630 // CHECK29-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 4631 // CHECK29-NEXT: store i32 0, ptr [[I3]], align 4 4632 // CHECK29-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4633 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4634 // CHECK29-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4635 // CHECK29: simd.if.then: 4636 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4637 // CHECK29-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 4638 // CHECK29-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i64 16) ] 4639 // CHECK29-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4 4640 // CHECK29-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START]], align 4 4641 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4642 // CHECK29: omp.inner.for.cond: 4643 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4644 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4645 // CHECK29-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4646 // CHECK29-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4647 // CHECK29: omp.inner.for.body: 4648 // CHECK29-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4649 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4650 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4651 // CHECK29-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 4652 // CHECK29-NEXT: [[TMP12:%.*]] = load i32, ptr [[I4]], align 4 4653 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4654 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]] 4655 // CHECK29-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 4656 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4657 // CHECK29: omp.body.continue: 4658 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4659 // CHECK29: omp.inner.for.inc: 4660 // CHECK29-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4661 // CHECK29-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1 4662 // CHECK29-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 4663 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4664 // CHECK29: omp.inner.for.end: 4665 // CHECK29-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4666 // CHECK29-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0 4667 // CHECK29-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4668 // CHECK29-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4669 // CHECK29-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4670 // CHECK29-NEXT: store i32 [[ADD11]], ptr [[I]], align 4 4671 // CHECK29-NEXT: br label [[SIMD_IF_END]] 4672 // CHECK29: simd.if.end: 4673 // CHECK29-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 4674 // CHECK29-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP15]]) 4675 // CHECK29-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 4676 // CHECK29-NEXT: [[TMP16:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 4677 // CHECK29-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP16]]) 4678 // CHECK29-NEXT: [[TMP17:%.*]] = load i32, ptr [[RETVAL]], align 4 4679 // CHECK29-NEXT: ret i32 [[TMP17]] 4680 // 4681 // 4682 // CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4683 // CHECK29-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat { 4684 // CHECK29-NEXT: entry: 4685 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4686 // CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4687 // CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 4 4688 // CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 4 4689 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4 4690 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4691 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4692 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4693 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4 4694 // CHECK29-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4695 // CHECK29-NEXT: store i32 0, ptr [[TE]], align 4 4696 // CHECK29-NEXT: store i32 128, ptr [[TH]], align 4 4697 // CHECK29-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4698 // CHECK29-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 4699 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4700 // CHECK29-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 4701 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4702 // CHECK29: omp.inner.for.cond: 4703 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 4704 // CHECK29-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 4705 // CHECK29-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4706 // CHECK29-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4707 // CHECK29: omp.inner.for.body: 4708 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 4709 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4710 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4711 // CHECK29-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 4712 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 4713 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 4714 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 4715 // CHECK29-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]] 4716 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4717 // CHECK29: omp.body.continue: 4718 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4719 // CHECK29: omp.inner.for.inc: 4720 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 4721 // CHECK29-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 4722 // CHECK29-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 4723 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 4724 // CHECK29: omp.inner.for.end: 4725 // CHECK29-NEXT: store i32 10, ptr [[I]], align 4 4726 // CHECK29-NEXT: ret i32 0 4727 // 4728 // 4729 // CHECK31-LABEL: define {{[^@]+}}@main 4730 // CHECK31-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4731 // CHECK31-NEXT: entry: 4732 // CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4733 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4734 // CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 4735 // CHECK31-NEXT: [[N:%.*]] = alloca i32, align 4 4736 // CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 4737 // CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4738 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 4739 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4 4740 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4741 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4742 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4743 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4744 // CHECK31-NEXT: [[I3:%.*]] = alloca i32, align 4 4745 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4746 // CHECK31-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 4747 // CHECK31-NEXT: [[I4:%.*]] = alloca i32, align 4 4748 // CHECK31-NEXT: [[I5:%.*]] = alloca i32, align 4 4749 // CHECK31-NEXT: store i32 0, ptr [[RETVAL]], align 4 4750 // CHECK31-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4751 // CHECK31-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 4752 // CHECK31-NEXT: store i32 100, ptr [[N]], align 4 4753 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 4754 // CHECK31-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 4755 // CHECK31-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 4756 // CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4757 // CHECK31-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 4758 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 4759 // CHECK31-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 4760 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4761 // CHECK31-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4762 // CHECK31-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4763 // CHECK31-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4764 // CHECK31-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4765 // CHECK31-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4766 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4767 // CHECK31-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 4768 // CHECK31-NEXT: store i32 0, ptr [[I3]], align 4 4769 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4770 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4771 // CHECK31-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4772 // CHECK31: simd.if.then: 4773 // CHECK31-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4774 // CHECK31-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 4775 // CHECK31-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[VLA]], i32 16) ] 4776 // CHECK31-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4 4777 // CHECK31-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4 4778 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4779 // CHECK31: omp.inner.for.cond: 4780 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4781 // CHECK31-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4782 // CHECK31-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4783 // CHECK31-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4784 // CHECK31: omp.inner.for.body: 4785 // CHECK31-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4786 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4787 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4788 // CHECK31-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 4789 // CHECK31-NEXT: [[TMP11:%.*]] = load i32, ptr [[I4]], align 4 4790 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP11]] 4791 // CHECK31-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 4792 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4793 // CHECK31: omp.body.continue: 4794 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4795 // CHECK31: omp.inner.for.inc: 4796 // CHECK31-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4797 // CHECK31-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1 4798 // CHECK31-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 4799 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4800 // CHECK31: omp.inner.for.end: 4801 // CHECK31-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4802 // CHECK31-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0 4803 // CHECK31-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 4804 // CHECK31-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 4805 // CHECK31-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4806 // CHECK31-NEXT: store i32 [[ADD11]], ptr [[I]], align 4 4807 // CHECK31-NEXT: br label [[SIMD_IF_END]] 4808 // CHECK31: simd.if.end: 4809 // CHECK31-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 4810 // CHECK31-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP14]]) 4811 // CHECK31-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 4812 // CHECK31-NEXT: [[TMP15:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 4813 // CHECK31-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP15]]) 4814 // CHECK31-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 4815 // CHECK31-NEXT: ret i32 [[TMP16]] 4816 // 4817 // 4818 // CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4819 // CHECK31-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat { 4820 // CHECK31-NEXT: entry: 4821 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4822 // CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4823 // CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 4 4824 // CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 4 4825 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4 4826 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4827 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4828 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4829 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4 4830 // CHECK31-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4831 // CHECK31-NEXT: store i32 0, ptr [[TE]], align 4 4832 // CHECK31-NEXT: store i32 128, ptr [[TH]], align 4 4833 // CHECK31-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4834 // CHECK31-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 4835 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4836 // CHECK31-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 4837 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4838 // CHECK31: omp.inner.for.cond: 4839 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 4840 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 4841 // CHECK31-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4842 // CHECK31-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4843 // CHECK31: omp.inner.for.body: 4844 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 4845 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4846 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4847 // CHECK31-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 4848 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 4849 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 4850 // CHECK31-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 4851 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4852 // CHECK31: omp.body.continue: 4853 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4854 // CHECK31: omp.inner.for.inc: 4855 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 4856 // CHECK31-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 4857 // CHECK31-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 4858 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 4859 // CHECK31: omp.inner.for.end: 4860 // CHECK31-NEXT: store i32 10, ptr [[I]], align 4 4861 // CHECK31-NEXT: ret i32 0 4862 // 4863