1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target 33 #pragma omp teams distribute parallel for reduction(+: t_var) 34 for (int i = 0; i < 2; ++i) { 35 t_var += (T) i; 36 } 37 return T(); 38 } 39 40 int main() { 41 static int sivar; 42 #ifdef LAMBDA 43 44 [&]() { 45 #pragma omp target 46 #pragma omp teams distribute parallel for reduction(+: sivar) 47 for (int i = 0; i < 2; ++i) { 48 49 // Skip global and bound tid vars 50 51 52 53 // Skip global and bound tid vars, and prev lb and ub vars 54 // skip loop vars 55 56 57 sivar += i; 58 59 [&]() { 60 61 sivar += 4; 62 63 }(); 64 } 65 }(); 66 return 0; 67 #else 68 #pragma omp target 69 #pragma omp teams distribute parallel for reduction(+: sivar) 70 for (int i = 0; i < 2; ++i) { 71 sivar += i; 72 } 73 return tmain<int>(); 74 #endif 75 } 76 77 78 79 80 // Skip global and bound tid vars 81 82 83 // Skip global and bound tid vars, and prev lb and ub 84 // skip loop vars 85 86 87 88 89 // Skip global and bound tid vars 90 91 92 // Skip global and bound tid vars, and prev lb and ub vars 93 // skip loop vars 94 95 #endif 96 // CHECK1-LABEL: define {{[^@]+}}@main 97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 98 // CHECK1-NEXT: entry: 99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 100 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 101 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 102 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 103 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 106 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 107 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4 108 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[SIVAR_CASTED]], align 4 109 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 110 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 111 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 112 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 113 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 114 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 115 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 116 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 117 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 118 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 119 // CHECK1-NEXT: store i32 3, ptr [[TMP7]], align 4 120 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 121 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 122 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 123 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 124 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 125 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 126 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 127 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8 128 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 129 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8 130 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 131 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 132 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 133 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 134 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 135 // CHECK1-NEXT: store i64 2, ptr [[TMP15]], align 8 136 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 137 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8 138 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 139 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 140 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 141 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 142 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 143 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4 144 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]]) 145 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 146 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 147 // CHECK1: omp_offload.failed: 148 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 149 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 150 // CHECK1: omp_offload.cont: 151 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 152 // CHECK1-NEXT: ret i32 [[CALL]] 153 // 154 // 155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 156 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 157 // CHECK1-NEXT: entry: 158 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 159 // CHECK1-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 160 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[SIVAR_ADDR]]) 161 // CHECK1-NEXT: ret void 162 // 163 // 164 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 165 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 166 // CHECK1-NEXT: entry: 167 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 168 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 169 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 170 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 171 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 172 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 173 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 175 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 176 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 177 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 178 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 179 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 180 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 181 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 182 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 183 // CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4 184 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 185 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 186 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 187 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 188 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 189 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 190 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 191 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 192 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 193 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 194 // CHECK1: cond.true: 195 // CHECK1-NEXT: br label [[COND_END:%.*]] 196 // CHECK1: cond.false: 197 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: br label [[COND_END]] 199 // CHECK1: cond.end: 200 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 201 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 203 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 204 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 205 // CHECK1: omp.inner.for.cond: 206 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 208 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 209 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 210 // CHECK1: omp.inner.for.body: 211 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 212 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 213 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 214 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 215 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[SIVAR1]]) 216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 217 // CHECK1: omp.inner.for.inc: 218 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 219 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 220 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 221 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 223 // CHECK1: omp.inner.for.end: 224 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 225 // CHECK1: omp.loop.exit: 226 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 227 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 228 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 8 229 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 230 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 231 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 232 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 233 // CHECK1-NEXT: ] 234 // CHECK1: .omp.reduction.case1: 235 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 236 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 237 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 238 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 239 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 240 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 241 // CHECK1: .omp.reduction.case2: 242 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR1]], align 4 243 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 244 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 245 // CHECK1: .omp.reduction.default: 246 // CHECK1-NEXT: ret void 247 // 248 // 249 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined 250 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 251 // CHECK1-NEXT: entry: 252 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 253 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 254 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 255 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 256 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 257 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 263 // CHECK1-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 264 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 265 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 266 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 267 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 268 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 269 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 270 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 271 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 272 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 275 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 276 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 277 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 278 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 279 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 281 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 282 // CHECK1-NEXT: store i32 0, ptr [[SIVAR2]], align 4 283 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 284 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 285 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 286 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 287 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 288 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 289 // CHECK1: cond.true: 290 // CHECK1-NEXT: br label [[COND_END:%.*]] 291 // CHECK1: cond.false: 292 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 293 // CHECK1-NEXT: br label [[COND_END]] 294 // CHECK1: cond.end: 295 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 296 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 298 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 299 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 300 // CHECK1: omp.inner.for.cond: 301 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 302 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 303 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 304 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 305 // CHECK1: omp.inner.for.body: 306 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 307 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 308 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 309 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 310 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 311 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR2]], align 4 312 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 313 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[SIVAR2]], align 4 314 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 315 // CHECK1: omp.body.continue: 316 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 317 // CHECK1: omp.inner.for.inc: 318 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 319 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 320 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 321 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 322 // CHECK1: omp.inner.for.end: 323 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 324 // CHECK1: omp.loop.exit: 325 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 326 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 327 // CHECK1-NEXT: store ptr [[SIVAR2]], ptr [[TMP14]], align 8 328 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 329 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 330 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 331 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 332 // CHECK1-NEXT: ] 333 // CHECK1: .omp.reduction.case1: 334 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 335 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR2]], align 4 336 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 337 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[TMP0]], align 4 338 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 339 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 340 // CHECK1: .omp.reduction.case2: 341 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR2]], align 4 342 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 343 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 344 // CHECK1: .omp.reduction.default: 345 // CHECK1-NEXT: ret void 346 // 347 // 348 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined.omp.reduction.reduction_func 349 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 350 // CHECK1-NEXT: entry: 351 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 352 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 353 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 354 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 355 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 356 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 357 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 358 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 359 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 360 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 361 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 362 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 363 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 364 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 365 // CHECK1-NEXT: ret void 366 // 367 // 368 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func 369 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 370 // CHECK1-NEXT: entry: 371 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 372 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 373 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 374 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 375 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 376 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 377 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 378 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 379 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 380 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 381 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 382 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 383 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 384 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 385 // CHECK1-NEXT: ret void 386 // 387 // 388 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 389 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 390 // CHECK1-NEXT: entry: 391 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 392 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 393 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 394 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 395 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 396 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 397 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 398 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 399 // CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4 400 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 401 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4 402 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4 403 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 404 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 405 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 406 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 407 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 408 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 409 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 410 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 411 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 412 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 413 // CHECK1-NEXT: store i32 3, ptr [[TMP7]], align 4 414 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 415 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 416 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 417 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 418 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 419 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 420 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 421 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP11]], align 8 422 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 423 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP12]], align 8 424 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 425 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 426 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 427 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 428 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 429 // CHECK1-NEXT: store i64 2, ptr [[TMP15]], align 8 430 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 431 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8 432 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 433 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 434 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 435 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 436 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 437 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4 438 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 439 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 440 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 441 // CHECK1: omp_offload.failed: 442 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP1]]) #[[ATTR2]] 443 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 444 // CHECK1: omp_offload.cont: 445 // CHECK1-NEXT: ret i32 0 446 // 447 // 448 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 449 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 450 // CHECK1-NEXT: entry: 451 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 452 // CHECK1-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 453 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[T_VAR_ADDR]]) 454 // CHECK1-NEXT: ret void 455 // 456 // 457 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 458 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 459 // CHECK1-NEXT: entry: 460 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 461 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 462 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 463 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 464 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 465 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 466 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 467 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 471 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 472 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 473 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 474 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 475 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 476 // CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 4 477 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 478 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 479 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 480 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 481 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 482 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 483 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 484 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 485 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 486 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 487 // CHECK1: cond.true: 488 // CHECK1-NEXT: br label [[COND_END:%.*]] 489 // CHECK1: cond.false: 490 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 491 // CHECK1-NEXT: br label [[COND_END]] 492 // CHECK1: cond.end: 493 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 494 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 495 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 496 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 497 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 498 // CHECK1: omp.inner.for.cond: 499 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 500 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 501 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 502 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 503 // CHECK1: omp.inner.for.body: 504 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 505 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 506 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 507 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 508 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[T_VAR1]]) 509 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 510 // CHECK1: omp.inner.for.inc: 511 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 512 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 513 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 514 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 515 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 516 // CHECK1: omp.inner.for.end: 517 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 518 // CHECK1: omp.loop.exit: 519 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 520 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 521 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 8 522 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 523 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 524 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 525 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 526 // CHECK1-NEXT: ] 527 // CHECK1: .omp.reduction.case1: 528 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 529 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 530 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 531 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 532 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 533 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 534 // CHECK1: .omp.reduction.case2: 535 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 536 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 537 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 538 // CHECK1: .omp.reduction.default: 539 // CHECK1-NEXT: ret void 540 // 541 // 542 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined 543 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 544 // CHECK1-NEXT: entry: 545 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 546 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 547 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 548 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 549 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 550 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 551 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 552 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 553 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 554 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 555 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 556 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 557 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 558 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 559 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 560 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 561 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 562 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 563 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 564 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 565 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 566 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 567 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 568 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 569 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 570 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 571 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 572 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 573 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 574 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 575 // CHECK1-NEXT: store i32 0, ptr [[T_VAR2]], align 4 576 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 577 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 578 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 579 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 580 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 581 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 582 // CHECK1: cond.true: 583 // CHECK1-NEXT: br label [[COND_END:%.*]] 584 // CHECK1: cond.false: 585 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 586 // CHECK1-NEXT: br label [[COND_END]] 587 // CHECK1: cond.end: 588 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 589 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 590 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 591 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 592 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 593 // CHECK1: omp.inner.for.cond: 594 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 595 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 596 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 597 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 598 // CHECK1: omp.inner.for.body: 599 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 600 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 601 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 602 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 603 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 604 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4 605 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 606 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[T_VAR2]], align 4 607 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 608 // CHECK1: omp.body.continue: 609 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 610 // CHECK1: omp.inner.for.inc: 611 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 612 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 613 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 614 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 615 // CHECK1: omp.inner.for.end: 616 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 617 // CHECK1: omp.loop.exit: 618 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 619 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 620 // CHECK1-NEXT: store ptr [[T_VAR2]], ptr [[TMP14]], align 8 621 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 622 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 623 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 624 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 625 // CHECK1-NEXT: ] 626 // CHECK1: .omp.reduction.case1: 627 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 628 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR2]], align 4 629 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 630 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[TMP0]], align 4 631 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 632 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 633 // CHECK1: .omp.reduction.case2: 634 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR2]], align 4 635 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 636 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 637 // CHECK1: .omp.reduction.default: 638 // CHECK1-NEXT: ret void 639 // 640 // 641 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func 642 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 643 // CHECK1-NEXT: entry: 644 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 645 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 646 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 647 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 648 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 649 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 650 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 651 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 652 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 653 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 654 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 655 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 656 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 657 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 658 // CHECK1-NEXT: ret void 659 // 660 // 661 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 662 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 663 // CHECK1-NEXT: entry: 664 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 665 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 666 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 667 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 668 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 669 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 670 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 671 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 672 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 673 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 674 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 675 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 676 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 677 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 678 // CHECK1-NEXT: ret void 679 // 680 // 681 // CHECK3-LABEL: define {{[^@]+}}@main 682 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 683 // CHECK3-NEXT: entry: 684 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 685 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 686 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 687 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 688 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 689 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 690 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 691 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 692 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4 693 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[SIVAR_CASTED]], align 4 694 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_CASTED]], align 4 695 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 696 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4 697 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 698 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4 699 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 700 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 701 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 702 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 703 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 704 // CHECK3-NEXT: store i32 3, ptr [[TMP7]], align 4 705 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 706 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 707 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 708 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 709 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 710 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4 711 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 712 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 4 713 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 714 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 4 715 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 716 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 717 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 718 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4 719 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 720 // CHECK3-NEXT: store i64 2, ptr [[TMP15]], align 8 721 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 722 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8 723 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 724 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 725 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 726 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 727 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 728 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4 729 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]]) 730 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 731 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 732 // CHECK3: omp_offload.failed: 733 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]]) #[[ATTR2:[0-9]+]] 734 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 735 // CHECK3: omp_offload.cont: 736 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 737 // CHECK3-NEXT: ret i32 [[CALL]] 738 // 739 // 740 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 741 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 742 // CHECK3-NEXT: entry: 743 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 744 // CHECK3-NEXT: store i32 [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 745 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[SIVAR_ADDR]]) 746 // CHECK3-NEXT: ret void 747 // 748 // 749 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 750 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 751 // CHECK3-NEXT: entry: 752 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 753 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 754 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 755 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 756 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 757 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 758 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 759 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 760 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 761 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 762 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 763 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 764 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 765 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 766 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 767 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 768 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 769 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 770 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 771 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 772 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 773 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 774 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 775 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 776 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 777 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 778 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 779 // CHECK3: cond.true: 780 // CHECK3-NEXT: br label [[COND_END:%.*]] 781 // CHECK3: cond.false: 782 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 783 // CHECK3-NEXT: br label [[COND_END]] 784 // CHECK3: cond.end: 785 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 786 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 787 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 788 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 789 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 790 // CHECK3: omp.inner.for.cond: 791 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 792 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 793 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 794 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 795 // CHECK3: omp.inner.for.body: 796 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 797 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 798 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[SIVAR1]]) 799 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 800 // CHECK3: omp.inner.for.inc: 801 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 802 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 803 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 804 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 805 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 806 // CHECK3: omp.inner.for.end: 807 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 808 // CHECK3: omp.loop.exit: 809 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 810 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 811 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 4 812 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 813 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 814 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 815 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 816 // CHECK3-NEXT: ] 817 // CHECK3: .omp.reduction.case1: 818 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 819 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 820 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 821 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 822 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 823 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 824 // CHECK3: .omp.reduction.case2: 825 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 826 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 827 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 828 // CHECK3: .omp.reduction.default: 829 // CHECK3-NEXT: ret void 830 // 831 // 832 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined 833 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 834 // CHECK3-NEXT: entry: 835 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 836 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 837 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 838 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 839 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 840 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 841 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 842 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 843 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 844 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 845 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 846 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 847 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 848 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 849 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 850 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 851 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 852 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 853 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 854 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 855 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 856 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 857 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 858 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 859 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 860 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 861 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 862 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 863 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 864 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 865 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 866 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 867 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 868 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 869 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 870 // CHECK3: cond.true: 871 // CHECK3-NEXT: br label [[COND_END:%.*]] 872 // CHECK3: cond.false: 873 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 874 // CHECK3-NEXT: br label [[COND_END]] 875 // CHECK3: cond.end: 876 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 877 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 878 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 879 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 880 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 881 // CHECK3: omp.inner.for.cond: 882 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 883 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 884 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 885 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 886 // CHECK3: omp.inner.for.body: 887 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 888 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 889 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 890 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 891 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 892 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR1]], align 4 893 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 894 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 895 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 896 // CHECK3: omp.body.continue: 897 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 898 // CHECK3: omp.inner.for.inc: 899 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 900 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 901 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 902 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 903 // CHECK3: omp.inner.for.end: 904 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 905 // CHECK3: omp.loop.exit: 906 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 907 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 908 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 4 909 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 910 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 911 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 912 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 913 // CHECK3-NEXT: ] 914 // CHECK3: .omp.reduction.case1: 915 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 916 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 917 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 918 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 919 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 920 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 921 // CHECK3: .omp.reduction.case2: 922 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR1]], align 4 923 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 924 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 925 // CHECK3: .omp.reduction.default: 926 // CHECK3-NEXT: ret void 927 // 928 // 929 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined.omp.reduction.reduction_func 930 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 931 // CHECK3-NEXT: entry: 932 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 933 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 934 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 935 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 936 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 937 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 938 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 939 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 940 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 941 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 942 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 943 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 944 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 945 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 946 // CHECK3-NEXT: ret void 947 // 948 // 949 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp.reduction.reduction_func 950 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 951 // CHECK3-NEXT: entry: 952 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 953 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 954 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 955 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 956 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 957 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 958 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 959 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 960 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 961 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 962 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 963 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 964 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 965 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 966 // CHECK3-NEXT: ret void 967 // 968 // 969 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 970 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 971 // CHECK3-NEXT: entry: 972 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 973 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 974 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 975 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 976 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 977 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 978 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 979 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 980 // CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4 981 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 982 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4 983 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4 984 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 985 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 986 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4 987 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 988 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4 989 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 990 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 991 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 992 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 993 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 994 // CHECK3-NEXT: store i32 3, ptr [[TMP7]], align 4 995 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 996 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 997 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 998 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 999 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1000 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4 1001 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1002 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP11]], align 4 1003 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1004 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP12]], align 4 1005 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1006 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 1007 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1008 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4 1009 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1010 // CHECK3-NEXT: store i64 2, ptr [[TMP15]], align 8 1011 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1012 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8 1013 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1014 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 1015 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1016 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 1017 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1018 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4 1019 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 1020 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1021 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1022 // CHECK3: omp_offload.failed: 1023 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP1]]) #[[ATTR2]] 1024 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1025 // CHECK3: omp_offload.cont: 1026 // CHECK3-NEXT: ret i32 0 1027 // 1028 // 1029 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 1030 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] { 1031 // CHECK3-NEXT: entry: 1032 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1033 // CHECK3-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1034 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[T_VAR_ADDR]]) 1035 // CHECK3-NEXT: ret void 1036 // 1037 // 1038 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 1039 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1040 // CHECK3-NEXT: entry: 1041 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1042 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1043 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1044 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1045 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1046 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1047 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1048 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1049 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1050 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1051 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1052 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 1053 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1054 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1055 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1056 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1057 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 1058 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1059 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1060 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1061 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1062 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1063 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1064 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1065 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1066 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1067 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1068 // CHECK3: cond.true: 1069 // CHECK3-NEXT: br label [[COND_END:%.*]] 1070 // CHECK3: cond.false: 1071 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1072 // CHECK3-NEXT: br label [[COND_END]] 1073 // CHECK3: cond.end: 1074 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1075 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1076 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1077 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1078 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1079 // CHECK3: omp.inner.for.cond: 1080 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1081 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1082 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1083 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1084 // CHECK3: omp.inner.for.body: 1085 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1086 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1087 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[T_VAR1]]) 1088 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1089 // CHECK3: omp.inner.for.inc: 1090 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1091 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1092 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1093 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1094 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1095 // CHECK3: omp.inner.for.end: 1096 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1097 // CHECK3: omp.loop.exit: 1098 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1099 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1100 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 4 1101 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1102 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1103 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1104 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1105 // CHECK3-NEXT: ] 1106 // CHECK3: .omp.reduction.case1: 1107 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 1108 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4 1109 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1110 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 1111 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1112 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1113 // CHECK3: .omp.reduction.case2: 1114 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4 1115 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 1116 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1117 // CHECK3: .omp.reduction.default: 1118 // CHECK3-NEXT: ret void 1119 // 1120 // 1121 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined 1122 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1123 // CHECK3-NEXT: entry: 1124 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1125 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1126 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1127 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1128 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1129 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1130 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1131 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1132 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1133 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1134 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1135 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1136 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1137 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 1138 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1139 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1140 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1141 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1142 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1143 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1144 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1145 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1146 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1147 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1148 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1149 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1150 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1151 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1152 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 1153 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1154 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1155 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1156 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1157 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1158 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1159 // CHECK3: cond.true: 1160 // CHECK3-NEXT: br label [[COND_END:%.*]] 1161 // CHECK3: cond.false: 1162 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1163 // CHECK3-NEXT: br label [[COND_END]] 1164 // CHECK3: cond.end: 1165 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1166 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1167 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1168 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1169 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1170 // CHECK3: omp.inner.for.cond: 1171 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1172 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1173 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1174 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1175 // CHECK3: omp.inner.for.body: 1176 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1177 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1178 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1179 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1180 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1181 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR1]], align 4 1182 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1183 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 4 1184 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1185 // CHECK3: omp.body.continue: 1186 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1187 // CHECK3: omp.inner.for.inc: 1188 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1189 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 1190 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1191 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1192 // CHECK3: omp.inner.for.end: 1193 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1194 // CHECK3: omp.loop.exit: 1195 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1196 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1197 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 4 1198 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1199 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1200 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1201 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1202 // CHECK3-NEXT: ] 1203 // CHECK3: .omp.reduction.case1: 1204 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 1205 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 1206 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1207 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 1208 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 1209 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1210 // CHECK3: .omp.reduction.case2: 1211 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 1212 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 1213 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1214 // CHECK3: .omp.reduction.default: 1215 // CHECK3-NEXT: ret void 1216 // 1217 // 1218 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func 1219 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1220 // CHECK3-NEXT: entry: 1221 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 1222 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 1223 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 1224 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 1225 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 1226 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 1227 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 1228 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 1229 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 1230 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 1231 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1232 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1233 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1234 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1235 // CHECK3-NEXT: ret void 1236 // 1237 // 1238 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 1239 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1240 // CHECK3-NEXT: entry: 1241 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 1242 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 1243 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 1244 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 1245 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 1246 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 1247 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 1248 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 1249 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 1250 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 1251 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1252 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1253 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1254 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1255 // CHECK3-NEXT: ret void 1256 // 1257 // 1258 // CHECK9-LABEL: define {{[^@]+}}@main 1259 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 1260 // CHECK9-NEXT: entry: 1261 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1262 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1263 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 1264 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1265 // CHECK9-NEXT: ret i32 0 1266 // 1267 // 1268 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45 1269 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1270 // CHECK9-NEXT: entry: 1271 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 1272 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1273 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined, ptr [[SIVAR_ADDR]]) 1274 // CHECK9-NEXT: ret void 1275 // 1276 // 1277 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined 1278 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 1279 // CHECK9-NEXT: entry: 1280 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1281 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1282 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1283 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1284 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1285 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1286 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1287 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1288 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1289 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1290 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1291 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1292 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1293 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1294 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1295 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1296 // CHECK9-NEXT: store i32 0, ptr [[SIVAR1]], align 4 1297 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1298 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1299 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1300 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1301 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1302 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1303 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1304 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1305 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1306 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1307 // CHECK9: cond.true: 1308 // CHECK9-NEXT: br label [[COND_END:%.*]] 1309 // CHECK9: cond.false: 1310 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1311 // CHECK9-NEXT: br label [[COND_END]] 1312 // CHECK9: cond.end: 1313 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1314 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1315 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1316 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1317 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1318 // CHECK9: omp.inner.for.cond: 1319 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1320 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1321 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1322 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1323 // CHECK9: omp.inner.for.body: 1324 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1325 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1326 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1327 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1328 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[SIVAR1]]) 1329 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1330 // CHECK9: omp.inner.for.inc: 1331 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1332 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1333 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1334 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1335 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1336 // CHECK9: omp.inner.for.end: 1337 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1338 // CHECK9: omp.loop.exit: 1339 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1340 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1341 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 8 1342 // CHECK9-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1343 // CHECK9-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1344 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1345 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1346 // CHECK9-NEXT: ] 1347 // CHECK9: .omp.reduction.case1: 1348 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 1349 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 1350 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1351 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 1352 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1353 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1354 // CHECK9: .omp.reduction.case2: 1355 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR1]], align 4 1356 // CHECK9-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 1357 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1358 // CHECK9: .omp.reduction.default: 1359 // CHECK9-NEXT: ret void 1360 // 1361 // 1362 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined 1363 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 1364 // CHECK9-NEXT: entry: 1365 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1366 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1367 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1368 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1369 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1370 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1371 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1372 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1373 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1374 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1375 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1376 // CHECK9-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 1377 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1378 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1379 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1380 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1381 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1382 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1383 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1384 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1385 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1386 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1387 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1388 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1389 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1390 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1391 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1392 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1393 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1394 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1395 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1396 // CHECK9-NEXT: store i32 0, ptr [[SIVAR2]], align 4 1397 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1398 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1399 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1400 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1401 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1402 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1403 // CHECK9: cond.true: 1404 // CHECK9-NEXT: br label [[COND_END:%.*]] 1405 // CHECK9: cond.false: 1406 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1407 // CHECK9-NEXT: br label [[COND_END]] 1408 // CHECK9: cond.end: 1409 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1410 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1411 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1412 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1413 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1414 // CHECK9: omp.inner.for.cond: 1415 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1416 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1417 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1418 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1419 // CHECK9: omp.inner.for.body: 1420 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1421 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1422 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1423 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1424 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1425 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR2]], align 4 1426 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1427 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[SIVAR2]], align 4 1428 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 1429 // CHECK9-NEXT: store ptr [[SIVAR2]], ptr [[TMP13]], align 8 1430 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 1431 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1432 // CHECK9: omp.body.continue: 1433 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1434 // CHECK9: omp.inner.for.inc: 1435 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1436 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1437 // CHECK9-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 1438 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1439 // CHECK9: omp.inner.for.end: 1440 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1441 // CHECK9: omp.loop.exit: 1442 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1443 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1444 // CHECK9-NEXT: store ptr [[SIVAR2]], ptr [[TMP15]], align 8 1445 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1446 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1447 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1448 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1449 // CHECK9-NEXT: ] 1450 // CHECK9: .omp.reduction.case1: 1451 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP0]], align 4 1452 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR2]], align 4 1453 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1454 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[TMP0]], align 4 1455 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 1456 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1457 // CHECK9: .omp.reduction.case2: 1458 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR2]], align 4 1459 // CHECK9-NEXT: [[TMP20:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP19]] monotonic, align 4 1460 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1461 // CHECK9: .omp.reduction.default: 1462 // CHECK9-NEXT: ret void 1463 // 1464 // 1465 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp_outlined.omp.reduction.reduction_func 1466 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1467 // CHECK9-NEXT: entry: 1468 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1469 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1470 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1471 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1472 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1473 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1474 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1475 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1476 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1477 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1478 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1479 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1480 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1481 // CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1482 // CHECK9-NEXT: ret void 1483 // 1484 // 1485 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45.omp_outlined.omp.reduction.reduction_func 1486 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 1487 // CHECK9-NEXT: entry: 1488 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1489 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1490 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1491 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1492 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1493 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1494 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1495 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1496 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1497 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1498 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1499 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1500 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1501 // CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1502 // CHECK9-NEXT: ret void 1503 // 1504