1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute parallel for collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 39 return a[0][0]; 40 } 41 }; 42 43 int teams_template_struct(void) { 44 SS<int, 123, 456> V; 45 return V.foo(); 46 47 } 48 #endif // CK1 49 50 // Test host codegen. 51 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 52 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 53 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 54 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 57 58 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 59 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 #ifdef CK2 65 66 template <typename T, int n, int m> 67 int tmain(T argc) { 68 T a[n][m]; 69 #pragma omp target 70 #pragma omp teams distribute parallel for collapse(2) 71 for(int i = 0; i < n; i++) { 72 for(int j = 0; j < m; j++) { 73 a[i][j] = (T)0; 74 } 75 } 76 return 0; 77 } 78 79 int main (int argc, char **argv) { 80 int n = 100; 81 int m = 2; 82 int a[n][m]; 83 #pragma omp target 84 #pragma omp teams distribute parallel for collapse(2) 85 for(int i = 0; i < n; i++) { 86 for(int j = 0; j < m; j++) { 87 a[i][j] = 0; 88 } 89 } 90 return tmain<int, 10, 2>(argc); 91 } 92 93 94 95 96 97 98 99 100 // discard loop variables not needed here 101 102 103 #endif // CK2 104 #endif // #ifndef HEADER 105 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 106 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 107 // CHECK1-NEXT: entry: 108 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 109 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]]) 110 // CHECK1-NEXT: ret i32 [[CALL]] 111 // 112 // 113 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 114 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat { 115 // CHECK1-NEXT: entry: 116 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 117 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 118 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 119 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 120 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 121 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 123 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 124 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 125 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 126 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 127 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 128 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 129 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 130 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 131 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 132 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 133 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 134 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 135 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 136 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 137 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 138 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 139 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 140 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 141 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 142 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 143 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 144 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 145 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 146 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 147 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 148 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 149 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 150 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 151 // CHECK1-NEXT: store i64 56088, ptr [[TMP13]], align 8 152 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 153 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 154 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 155 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 156 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 157 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 158 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 159 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 160 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 161 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 162 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 163 // CHECK1: omp_offload.failed: 164 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 165 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 166 // CHECK1: omp_offload.cont: 167 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 168 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0 169 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0 170 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4 171 // CHECK1-NEXT: ret i32 [[TMP20]] 172 // 173 // 174 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 175 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 176 // CHECK1-NEXT: entry: 177 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 178 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 179 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 180 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 181 // CHECK1-NEXT: ret void 182 // 183 // 184 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 185 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 186 // CHECK1-NEXT: entry: 187 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 188 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 189 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 190 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 194 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 195 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 200 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 201 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 202 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 203 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 204 // CHECK1-NEXT: store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4 205 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 206 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 207 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 208 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 209 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 210 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 211 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 212 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 213 // CHECK1: cond.true: 214 // CHECK1-NEXT: br label [[COND_END:%.*]] 215 // CHECK1: cond.false: 216 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 217 // CHECK1-NEXT: br label [[COND_END]] 218 // CHECK1: cond.end: 219 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 220 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 222 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 223 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 224 // CHECK1: omp.inner.for.cond: 225 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 226 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 227 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 228 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 229 // CHECK1: omp.inner.for.body: 230 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 231 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 232 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 233 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 234 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 235 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 236 // CHECK1: omp.inner.for.inc: 237 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 238 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 239 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 240 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 241 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 242 // CHECK1: omp.inner.for.end: 243 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 244 // CHECK1: omp.loop.exit: 245 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 246 // CHECK1-NEXT: ret void 247 // 248 // 249 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined 250 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 251 // CHECK1-NEXT: entry: 252 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 253 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 254 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 255 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 256 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 257 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 263 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 264 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 265 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 266 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 267 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 268 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 269 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 270 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 271 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 272 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 275 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 276 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 277 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 278 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 279 // CHECK1-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 281 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 282 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 283 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 284 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 285 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 286 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 287 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 288 // CHECK1: cond.true: 289 // CHECK1-NEXT: br label [[COND_END:%.*]] 290 // CHECK1: cond.false: 291 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 292 // CHECK1-NEXT: br label [[COND_END]] 293 // CHECK1: cond.end: 294 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 295 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 296 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 297 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 298 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 299 // CHECK1: omp.inner.for.cond: 300 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 301 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 302 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 303 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 304 // CHECK1: omp.inner.for.body: 305 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 306 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 307 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 308 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 309 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 310 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 311 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 312 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 313 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 314 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 315 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 316 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 317 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[J]], align 4 318 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 319 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 320 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 321 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]] 322 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 323 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 324 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 325 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX9]], align 4 326 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 327 // CHECK1: omp.body.continue: 328 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 329 // CHECK1: omp.inner.for.inc: 330 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 331 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 332 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 334 // CHECK1: omp.inner.for.end: 335 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 336 // CHECK1: omp.loop.exit: 337 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 338 // CHECK1-NEXT: ret void 339 // 340 // 341 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 342 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 343 // CHECK3-NEXT: entry: 344 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 345 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]]) 346 // CHECK3-NEXT: ret i32 [[CALL]] 347 // 348 // 349 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 350 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 351 // CHECK3-NEXT: entry: 352 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 353 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 354 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 355 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 356 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 357 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 358 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 359 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 360 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 361 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 362 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 363 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 364 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 365 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 366 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 367 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 368 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 369 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 370 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 371 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 372 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 373 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 374 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 375 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 376 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 377 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 378 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 379 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 380 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 381 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 382 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 383 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 384 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 385 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 386 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 387 // CHECK3-NEXT: store i64 56088, ptr [[TMP13]], align 8 388 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 389 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 390 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 391 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 392 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 393 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 394 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 395 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 396 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 397 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 398 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 399 // CHECK3: omp_offload.failed: 400 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 401 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 402 // CHECK3: omp_offload.cont: 403 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 404 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0 405 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0 406 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4 407 // CHECK3-NEXT: ret i32 [[TMP20]] 408 // 409 // 410 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 411 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 412 // CHECK3-NEXT: entry: 413 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 414 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 415 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 416 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 417 // CHECK3-NEXT: ret void 418 // 419 // 420 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 421 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 422 // CHECK3-NEXT: entry: 423 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 424 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 425 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 426 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 427 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 428 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 429 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 430 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 431 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 432 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 433 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 434 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 435 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 436 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 437 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 438 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 439 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 440 // CHECK3-NEXT: store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4 441 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 442 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 443 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 444 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 445 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 446 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 447 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 448 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 449 // CHECK3: cond.true: 450 // CHECK3-NEXT: br label [[COND_END:%.*]] 451 // CHECK3: cond.false: 452 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 453 // CHECK3-NEXT: br label [[COND_END]] 454 // CHECK3: cond.end: 455 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 456 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 457 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 458 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 459 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 460 // CHECK3: omp.inner.for.cond: 461 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 462 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 463 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 464 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 465 // CHECK3: omp.inner.for.body: 466 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 467 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 468 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 469 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 470 // CHECK3: omp.inner.for.inc: 471 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 472 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 473 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 474 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 475 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 476 // CHECK3: omp.inner.for.end: 477 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 478 // CHECK3: omp.loop.exit: 479 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 480 // CHECK3-NEXT: ret void 481 // 482 // 483 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined 484 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 485 // CHECK3-NEXT: entry: 486 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 487 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 488 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 489 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 490 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 491 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 492 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 493 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 494 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 495 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 496 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 497 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 498 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 499 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 500 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 501 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 502 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 503 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 504 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 505 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 506 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 507 // CHECK3-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4 508 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 509 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 510 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 511 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 512 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 513 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 514 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 515 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 516 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 517 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 518 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 519 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 520 // CHECK3: cond.true: 521 // CHECK3-NEXT: br label [[COND_END:%.*]] 522 // CHECK3: cond.false: 523 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 524 // CHECK3-NEXT: br label [[COND_END]] 525 // CHECK3: cond.end: 526 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 527 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 528 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 529 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 530 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 531 // CHECK3: omp.inner.for.cond: 532 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 533 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 534 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 535 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 536 // CHECK3: omp.inner.for.body: 537 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 538 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 539 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 540 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 541 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 542 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 543 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 544 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 545 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 546 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 547 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 548 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 549 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 550 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 551 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 552 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP13]] 553 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 554 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP14]] 555 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4 556 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 557 // CHECK3: omp.body.continue: 558 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 559 // CHECK3: omp.inner.for.inc: 560 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 561 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 562 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 563 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 564 // CHECK3: omp.inner.for.end: 565 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 566 // CHECK3: omp.loop.exit: 567 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 568 // CHECK3-NEXT: ret void 569 // 570 // 571 // CHECK9-LABEL: define {{[^@]+}}@main 572 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 573 // CHECK9-NEXT: entry: 574 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 575 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 576 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 577 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 578 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 579 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 580 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 581 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 582 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 583 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 584 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 585 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 586 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 587 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 588 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 589 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 590 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 591 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 592 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 593 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 594 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 595 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 596 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 597 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4 598 // CHECK9-NEXT: store i32 2, ptr [[M]], align 4 599 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 600 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 601 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[M]], align 4 602 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 603 // CHECK9-NEXT: [[TMP4:%.*]] = call ptr @llvm.stacksave.p0() 604 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8 605 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 606 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 607 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 608 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8 609 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[N]], align 4 610 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[N_CASTED]], align 4 611 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8 612 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[M]], align 4 613 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[M_CASTED]], align 4 614 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8 615 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 616 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 617 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false) 618 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 619 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP12]], align 8 620 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 621 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 8 622 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 623 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 624 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 625 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP15]], align 8 626 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 627 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP16]], align 8 628 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 629 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 630 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 631 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP18]], align 8 632 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 633 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP19]], align 8 634 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 635 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 636 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 637 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP21]], align 8 638 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 639 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP22]], align 8 640 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 641 // CHECK9-NEXT: store ptr null, ptr [[TMP23]], align 8 642 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 643 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 8 644 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 645 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP25]], align 8 646 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4 647 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[TMP26]], align 8 648 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 649 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8 650 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 651 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 652 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 653 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[N]], align 4 654 // CHECK9-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4 655 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[M]], align 4 656 // CHECK9-NEXT: store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4 657 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 658 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0 659 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 660 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 661 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 662 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0 663 // CHECK9-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 664 // CHECK9-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 665 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 666 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 667 // CHECK9-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8 668 // CHECK9-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8 669 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP35]], 1 670 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 671 // CHECK9-NEXT: store i32 3, ptr [[TMP36]], align 4 672 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 673 // CHECK9-NEXT: store i32 5, ptr [[TMP37]], align 4 674 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 675 // CHECK9-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 8 676 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 677 // CHECK9-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 8 678 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 679 // CHECK9-NEXT: store ptr [[TMP30]], ptr [[TMP40]], align 8 680 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 681 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP41]], align 8 682 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 683 // CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 8 684 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 685 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8 686 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 687 // CHECK9-NEXT: store i64 [[ADD]], ptr [[TMP44]], align 8 688 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 689 // CHECK9-NEXT: store i64 0, ptr [[TMP45]], align 8 690 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 691 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4 692 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 693 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4 694 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 695 // CHECK9-NEXT: store i32 0, ptr [[TMP48]], align 4 696 // CHECK9-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, ptr [[KERNEL_ARGS]]) 697 // CHECK9-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 698 // CHECK9-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 699 // CHECK9: omp_offload.failed: 700 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 701 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 702 // CHECK9: omp_offload.cont: 703 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 704 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]]) 705 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 706 // CHECK9-NEXT: [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 707 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP52]]) 708 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4 709 // CHECK9-NEXT: ret i32 [[TMP53]] 710 // 711 // 712 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 713 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 714 // CHECK9-NEXT: entry: 715 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 716 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 717 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 718 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 719 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 720 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 721 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 722 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 723 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 724 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 725 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 726 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 727 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 728 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]]) 729 // CHECK9-NEXT: ret void 730 // 731 // 732 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined 733 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 734 // CHECK9-NEXT: entry: 735 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 736 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 737 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 738 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 8 739 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 740 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 741 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 742 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 743 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 744 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 745 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 746 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 747 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 748 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 749 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 750 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 751 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 752 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 753 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 754 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 755 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 756 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 757 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 758 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 759 // CHECK9-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 8 760 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 761 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 762 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 763 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 764 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8 765 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 766 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 767 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8 768 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 769 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 770 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 771 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 772 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 773 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 774 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 775 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 776 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 777 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 778 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 779 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 780 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 781 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 782 // CHECK9-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 783 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 784 // CHECK9-NEXT: store i32 0, ptr [[J]], align 4 785 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 786 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 787 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 788 // CHECK9: land.lhs.true: 789 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 790 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 791 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 792 // CHECK9: omp.precond.then: 793 // CHECK9-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8 794 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 795 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_COMB_UB]], align 8 796 // CHECK9-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 797 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 798 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 799 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 800 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 801 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 802 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 803 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 804 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 805 // CHECK9: cond.true: 806 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 807 // CHECK9-NEXT: br label [[COND_END:%.*]] 808 // CHECK9: cond.false: 809 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 810 // CHECK9-NEXT: br label [[COND_END]] 811 // CHECK9: cond.end: 812 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 813 // CHECK9-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8 814 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 815 // CHECK9-NEXT: store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8 816 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 817 // CHECK9: omp.inner.for.cond: 818 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 819 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 820 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 821 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 822 // CHECK9: omp.inner.for.body: 823 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 824 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 825 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined, i64 [[TMP21]], i64 [[TMP22]], ptr [[TMP0]], ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], ptr [[TMP4]]) 826 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 827 // CHECK9: omp.inner.for.inc: 828 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 829 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8 830 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]] 831 // CHECK9-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8 832 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 833 // CHECK9: omp.inner.for.end: 834 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 835 // CHECK9: omp.loop.exit: 836 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 837 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 838 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 839 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 840 // CHECK9: omp.precond.end: 841 // CHECK9-NEXT: ret void 842 // 843 // 844 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined 845 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 846 // CHECK9-NEXT: entry: 847 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 848 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 849 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 850 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 851 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 852 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 8 853 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 854 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 855 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 856 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 857 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 858 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 859 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 860 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 861 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 862 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 863 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 864 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 865 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 866 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 867 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 868 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 869 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 870 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 871 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 872 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 873 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 874 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 875 // CHECK9-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 8 876 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 877 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 878 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 879 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 880 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8 881 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 882 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 883 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8 884 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 885 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 886 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 887 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 888 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 889 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 890 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 891 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 892 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 893 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 894 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 895 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 896 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 897 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 898 // CHECK9-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 899 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 900 // CHECK9-NEXT: store i32 0, ptr [[J]], align 4 901 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 902 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 903 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 904 // CHECK9: land.lhs.true: 905 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 906 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 907 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 908 // CHECK9: omp.precond.then: 909 // CHECK9-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 910 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 911 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8 912 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 913 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 914 // CHECK9-NEXT: store i64 [[TMP12]], ptr [[DOTOMP_LB]], align 8 915 // CHECK9-NEXT: store i64 [[TMP13]], ptr [[DOTOMP_UB]], align 8 916 // CHECK9-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 917 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 918 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 919 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 920 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 921 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 922 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 923 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 924 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 925 // CHECK9: cond.true: 926 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 927 // CHECK9-NEXT: br label [[COND_END:%.*]] 928 // CHECK9: cond.false: 929 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 930 // CHECK9-NEXT: br label [[COND_END]] 931 // CHECK9: cond.end: 932 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 933 // CHECK9-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 934 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 935 // CHECK9-NEXT: store i64 [[TMP20]], ptr [[DOTOMP_IV]], align 8 936 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 937 // CHECK9: omp.inner.for.cond: 938 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 939 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 940 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 941 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 942 // CHECK9: omp.inner.for.body: 943 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 944 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 945 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0 946 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 947 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 948 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 949 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]] 950 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 951 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 952 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 953 // CHECK9-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4 954 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 955 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 956 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 957 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0 958 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 959 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 960 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 961 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]] 962 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 963 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0 964 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 965 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 966 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 967 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 968 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]] 969 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 970 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 971 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 972 // CHECK9-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4 973 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[I11]], align 4 974 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64 975 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 976 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP30]] 977 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[J12]], align 4 978 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64 979 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]] 980 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX37]], align 4 981 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 982 // CHECK9: omp.body.continue: 983 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 984 // CHECK9: omp.inner.for.inc: 985 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 986 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1 987 // CHECK9-NEXT: store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8 988 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 989 // CHECK9: omp.inner.for.end: 990 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 991 // CHECK9: omp.loop.exit: 992 // CHECK9-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 993 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 994 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 995 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 996 // CHECK9: omp.precond.end: 997 // CHECK9-NEXT: ret void 998 // 999 // 1000 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1001 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1002 // CHECK9-NEXT: entry: 1003 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1004 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1005 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1006 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1007 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1008 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1009 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1010 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1011 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1012 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1013 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 1014 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1015 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 1016 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1017 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 1018 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1019 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1020 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1021 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4 1022 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1023 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4 1024 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1025 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 1026 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1027 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 1028 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1029 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 8 1030 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1031 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8 1032 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1033 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 1034 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1035 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 1036 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1037 // CHECK9-NEXT: store i64 20, ptr [[TMP13]], align 8 1038 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1039 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 1040 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1041 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1042 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1043 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1044 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1045 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4 1046 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, ptr [[KERNEL_ARGS]]) 1047 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1048 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1049 // CHECK9: omp_offload.failed: 1050 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69(ptr [[A]]) #[[ATTR3]] 1051 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1052 // CHECK9: omp_offload.cont: 1053 // CHECK9-NEXT: ret i32 0 1054 // 1055 // 1056 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1057 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1058 // CHECK9-NEXT: entry: 1059 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1060 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1061 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1062 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined, ptr [[TMP0]]) 1063 // CHECK9-NEXT: ret void 1064 // 1065 // 1066 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined 1067 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1068 // CHECK9-NEXT: entry: 1069 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1070 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1071 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1072 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1073 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1074 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1075 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1076 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1077 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1078 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1079 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1080 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1081 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1082 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1083 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1084 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1085 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1086 // CHECK9-NEXT: store i32 19, ptr [[DOTOMP_COMB_UB]], align 4 1087 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1088 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1089 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1090 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1091 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1092 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1093 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1094 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1095 // CHECK9: cond.true: 1096 // CHECK9-NEXT: br label [[COND_END:%.*]] 1097 // CHECK9: cond.false: 1098 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1099 // CHECK9-NEXT: br label [[COND_END]] 1100 // CHECK9: cond.end: 1101 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1102 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1103 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1104 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1105 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1106 // CHECK9: omp.inner.for.cond: 1107 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1108 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1109 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1110 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1111 // CHECK9: omp.inner.for.body: 1112 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1113 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1114 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1115 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1116 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 1117 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1118 // CHECK9: omp.inner.for.inc: 1119 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1120 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1121 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1122 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1123 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1124 // CHECK9: omp.inner.for.end: 1125 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1126 // CHECK9: omp.loop.exit: 1127 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1128 // CHECK9-NEXT: ret void 1129 // 1130 // 1131 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined 1132 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1133 // CHECK9-NEXT: entry: 1134 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1135 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1136 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1137 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1138 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1139 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1140 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1141 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1142 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1143 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1144 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1145 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1146 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1147 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1148 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1149 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1150 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1151 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1152 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1153 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1154 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1155 // CHECK9-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4 1156 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1157 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1158 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1159 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 1160 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1161 // CHECK9-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 1162 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1163 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1164 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1165 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1166 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1167 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1168 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1169 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1170 // CHECK9: cond.true: 1171 // CHECK9-NEXT: br label [[COND_END:%.*]] 1172 // CHECK9: cond.false: 1173 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1174 // CHECK9-NEXT: br label [[COND_END]] 1175 // CHECK9: cond.end: 1176 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1177 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1178 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1179 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1180 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1181 // CHECK9: omp.inner.for.cond: 1182 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1183 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1184 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1185 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1186 // CHECK9: omp.inner.for.body: 1187 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1188 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1189 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1190 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1191 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1192 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1193 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1194 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 1195 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 1196 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 1197 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 1198 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 1199 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[J]], align 4 1200 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1201 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1202 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 1203 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 1204 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 1205 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 1206 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX9]], align 4 1207 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1208 // CHECK9: omp.body.continue: 1209 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1210 // CHECK9: omp.inner.for.inc: 1211 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1212 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 1213 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 1214 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1215 // CHECK9: omp.inner.for.end: 1216 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1217 // CHECK9: omp.loop.exit: 1218 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1219 // CHECK9-NEXT: ret void 1220 // 1221 // 1222 // CHECK11-LABEL: define {{[^@]+}}@main 1223 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1224 // CHECK11-NEXT: entry: 1225 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1226 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1227 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 1228 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 1229 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 1230 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 1231 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 1232 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 1233 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1234 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 1235 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 1236 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 1237 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 1238 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 1239 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1240 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1241 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1242 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1243 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 1244 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1245 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1246 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1247 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 1248 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4 1249 // CHECK11-NEXT: store i32 2, ptr [[M]], align 4 1250 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 1251 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[M]], align 4 1252 // CHECK11-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 1253 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4 1254 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1255 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 1256 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 1257 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4 1258 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 4 1259 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 1260 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 1261 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[M]], align 4 1262 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[M_CASTED]], align 4 1263 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4 1264 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1265 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 1266 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 1267 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false) 1268 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1269 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP11]], align 4 1270 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1271 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP12]], align 4 1272 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1273 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 1274 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1275 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP14]], align 4 1276 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1277 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP15]], align 4 1278 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1279 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 1280 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1281 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP17]], align 4 1282 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1283 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP18]], align 4 1284 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1285 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4 1286 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1287 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP20]], align 4 1288 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1289 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP21]], align 4 1290 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1291 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 1292 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1293 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP23]], align 4 1294 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1295 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 4 1296 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1297 // CHECK11-NEXT: store i64 [[TMP10]], ptr [[TMP25]], align 4 1298 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1299 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4 1300 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1301 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1302 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1303 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[N]], align 4 1304 // CHECK11-NEXT: store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4 1305 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[M]], align 4 1306 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1307 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1308 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 1309 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1310 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1311 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1312 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0 1313 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 1314 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 1315 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 1316 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 1317 // CHECK11-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8 1318 // CHECK11-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8 1319 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP34]], 1 1320 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1321 // CHECK11-NEXT: store i32 3, ptr [[TMP35]], align 4 1322 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1323 // CHECK11-NEXT: store i32 5, ptr [[TMP36]], align 4 1324 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1325 // CHECK11-NEXT: store ptr [[TMP27]], ptr [[TMP37]], align 4 1326 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1327 // CHECK11-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 4 1328 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1329 // CHECK11-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 4 1330 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1331 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP40]], align 4 1332 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1333 // CHECK11-NEXT: store ptr null, ptr [[TMP41]], align 4 1334 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1335 // CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 4 1336 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1337 // CHECK11-NEXT: store i64 [[ADD]], ptr [[TMP43]], align 8 1338 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1339 // CHECK11-NEXT: store i64 0, ptr [[TMP44]], align 8 1340 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1341 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4 1342 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1343 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4 1344 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1345 // CHECK11-NEXT: store i32 0, ptr [[TMP47]], align 4 1346 // CHECK11-NEXT: [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, ptr [[KERNEL_ARGS]]) 1347 // CHECK11-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0 1348 // CHECK11-NEXT: br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1349 // CHECK11: omp_offload.failed: 1350 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 1351 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1352 // CHECK11: omp_offload.cont: 1353 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 1354 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]]) 1355 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1356 // CHECK11-NEXT: [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 1357 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP51]]) 1358 // CHECK11-NEXT: [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 4 1359 // CHECK11-NEXT: ret i32 [[TMP52]] 1360 // 1361 // 1362 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 1363 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1364 // CHECK11-NEXT: entry: 1365 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1366 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1367 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1368 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1369 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1370 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1371 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 1372 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1373 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1374 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1375 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1376 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1377 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1378 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]]) 1379 // CHECK11-NEXT: ret void 1380 // 1381 // 1382 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined 1383 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1384 // CHECK11-NEXT: entry: 1385 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1386 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1387 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1388 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 4 1389 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1390 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1391 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1392 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1393 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1394 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1395 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1396 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1397 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1398 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1399 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1400 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1401 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1402 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1403 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1404 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 1405 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 1406 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1407 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1408 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1409 // CHECK11-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 4 1410 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1411 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1412 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1413 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1414 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4 1415 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1416 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1417 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1418 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 1419 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 1420 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 1421 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 1422 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1423 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1424 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1425 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1426 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1427 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1428 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1429 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1430 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1431 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1432 // CHECK11-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 1433 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 1434 // CHECK11-NEXT: store i32 0, ptr [[J]], align 4 1435 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1436 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1437 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1438 // CHECK11: land.lhs.true: 1439 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1440 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1441 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1442 // CHECK11: omp.precond.then: 1443 // CHECK11-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8 1444 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1445 // CHECK11-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_COMB_UB]], align 8 1446 // CHECK11-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 1447 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1448 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1449 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 1450 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 1451 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1452 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1453 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1454 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1455 // CHECK11: cond.true: 1456 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1457 // CHECK11-NEXT: br label [[COND_END:%.*]] 1458 // CHECK11: cond.false: 1459 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1460 // CHECK11-NEXT: br label [[COND_END]] 1461 // CHECK11: cond.end: 1462 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1463 // CHECK11-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8 1464 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 1465 // CHECK11-NEXT: store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8 1466 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1467 // CHECK11: omp.inner.for.cond: 1468 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1469 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1470 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1471 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1472 // CHECK11: omp.inner.for.body: 1473 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 1474 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 1475 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1476 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32 1477 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined, i32 [[TMP22]], i32 [[TMP24]], ptr [[TMP0]], ptr [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], ptr [[TMP4]]) 1478 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1479 // CHECK11: omp.inner.for.inc: 1480 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1481 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8 1482 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 1483 // CHECK11-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8 1484 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1485 // CHECK11: omp.inner.for.end: 1486 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1487 // CHECK11: omp.loop.exit: 1488 // CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1489 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 1490 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 1491 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1492 // CHECK11: omp.precond.end: 1493 // CHECK11-NEXT: ret void 1494 // 1495 // 1496 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined 1497 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1498 // CHECK11-NEXT: entry: 1499 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1500 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1501 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1502 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1503 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1504 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 4 1505 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1506 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1507 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1508 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1509 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1510 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1511 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1512 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1513 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1514 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1515 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1516 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1517 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1518 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1519 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1520 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4 1521 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4 1522 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1523 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1524 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1525 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1526 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1527 // CHECK11-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 4 1528 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1529 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1530 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1531 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1532 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4 1533 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1534 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1535 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1536 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 1537 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 1538 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 1539 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 1540 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1541 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1542 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1543 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1544 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1545 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1546 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1547 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1548 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1549 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1550 // CHECK11-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 1551 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 1552 // CHECK11-NEXT: store i32 0, ptr [[J]], align 4 1553 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1554 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1555 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1556 // CHECK11: land.lhs.true: 1557 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1558 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1559 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1560 // CHECK11: omp.precond.then: 1561 // CHECK11-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 1562 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1563 // CHECK11-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8 1564 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1565 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64 1566 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1567 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64 1568 // CHECK11-NEXT: store i64 [[CONV11]], ptr [[DOTOMP_LB]], align 8 1569 // CHECK11-NEXT: store i64 [[CONV12]], ptr [[DOTOMP_UB]], align 8 1570 // CHECK11-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 1571 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1572 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1573 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 1574 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 1575 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1576 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1577 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]] 1578 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1579 // CHECK11: cond.true: 1580 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1581 // CHECK11-NEXT: br label [[COND_END:%.*]] 1582 // CHECK11: cond.false: 1583 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1584 // CHECK11-NEXT: br label [[COND_END]] 1585 // CHECK11: cond.end: 1586 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ] 1587 // CHECK11-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 1588 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 1589 // CHECK11-NEXT: store i64 [[TMP20]], ptr [[DOTOMP_IV]], align 8 1590 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1591 // CHECK11: omp.inner.for.cond: 1592 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1593 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1594 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]] 1595 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1596 // CHECK11: omp.inner.for.body: 1597 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1598 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1599 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0 1600 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 1601 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 1602 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 1603 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]] 1604 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 1605 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 1606 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 1607 // CHECK11-NEXT: store i32 [[CONV23]], ptr [[I13]], align 4 1608 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1609 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1610 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1611 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0 1612 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 1613 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 1614 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 1615 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]] 1616 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1617 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0 1618 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1619 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 1620 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 1621 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 1622 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]] 1623 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 1624 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 1625 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 1626 // CHECK11-NEXT: store i32 [[CONV37]], ptr [[J14]], align 4 1627 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[I13]], align 4 1628 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]] 1629 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 [[TMP30]] 1630 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[J14]], align 4 1631 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP31]] 1632 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX38]], align 4 1633 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1634 // CHECK11: omp.body.continue: 1635 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1636 // CHECK11: omp.inner.for.inc: 1637 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1638 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1 1639 // CHECK11-NEXT: store i64 [[ADD39]], ptr [[DOTOMP_IV]], align 8 1640 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1641 // CHECK11: omp.inner.for.end: 1642 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1643 // CHECK11: omp.loop.exit: 1644 // CHECK11-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1645 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 1646 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 1647 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1648 // CHECK11: omp.precond.end: 1649 // CHECK11-NEXT: ret void 1650 // 1651 // 1652 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1653 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1654 // CHECK11-NEXT: entry: 1655 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1656 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1657 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1658 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1659 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1660 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1661 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1662 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1663 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1664 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1665 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 1666 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1667 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 1668 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1669 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1670 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1671 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1672 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1673 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4 1674 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1675 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4 1676 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1677 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 1678 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1679 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1680 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1681 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 4 1682 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1683 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4 1684 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1685 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1686 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1687 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1688 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1689 // CHECK11-NEXT: store i64 20, ptr [[TMP13]], align 8 1690 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1691 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 1692 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1693 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1694 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1695 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1696 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1697 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4 1698 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, ptr [[KERNEL_ARGS]]) 1699 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1700 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1701 // CHECK11: omp_offload.failed: 1702 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69(ptr [[A]]) #[[ATTR3]] 1703 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1704 // CHECK11: omp_offload.cont: 1705 // CHECK11-NEXT: ret i32 0 1706 // 1707 // 1708 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69 1709 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1710 // CHECK11-NEXT: entry: 1711 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1712 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1713 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1714 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined, ptr [[TMP0]]) 1715 // CHECK11-NEXT: ret void 1716 // 1717 // 1718 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined 1719 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1720 // CHECK11-NEXT: entry: 1721 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1722 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1723 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1724 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1725 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1726 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1727 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1728 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1729 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1730 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1731 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1732 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1733 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1734 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1735 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1736 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1737 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1738 // CHECK11-NEXT: store i32 19, ptr [[DOTOMP_COMB_UB]], align 4 1739 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1740 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1741 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1742 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1743 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1744 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1745 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1746 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1747 // CHECK11: cond.true: 1748 // CHECK11-NEXT: br label [[COND_END:%.*]] 1749 // CHECK11: cond.false: 1750 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1751 // CHECK11-NEXT: br label [[COND_END]] 1752 // CHECK11: cond.end: 1753 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1754 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1755 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1756 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1757 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1758 // CHECK11: omp.inner.for.cond: 1759 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1760 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1761 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1762 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1763 // CHECK11: omp.inner.for.body: 1764 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1765 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1766 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 1767 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1768 // CHECK11: omp.inner.for.inc: 1769 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1770 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1771 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1772 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1773 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1774 // CHECK11: omp.inner.for.end: 1775 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1776 // CHECK11: omp.loop.exit: 1777 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1778 // CHECK11-NEXT: ret void 1779 // 1780 // 1781 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined 1782 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1783 // CHECK11-NEXT: entry: 1784 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1785 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1786 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1787 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1788 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1789 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1790 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1791 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1792 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1793 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1794 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1795 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1796 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1797 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1798 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1799 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1800 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1801 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1802 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1803 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1804 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1805 // CHECK11-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4 1806 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1807 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1808 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1809 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1810 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1811 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1812 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1813 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1814 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1815 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1816 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1817 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1818 // CHECK11: cond.true: 1819 // CHECK11-NEXT: br label [[COND_END:%.*]] 1820 // CHECK11: cond.false: 1821 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1822 // CHECK11-NEXT: br label [[COND_END]] 1823 // CHECK11: cond.end: 1824 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1825 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1826 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1827 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1828 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1829 // CHECK11: omp.inner.for.cond: 1830 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1831 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1832 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1833 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1834 // CHECK11: omp.inner.for.body: 1835 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1836 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1837 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1838 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1839 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1840 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1841 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1842 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 1843 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1844 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 1845 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1846 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1847 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 1848 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1849 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP13]] 1850 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 1851 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP14]] 1852 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4 1853 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1854 // CHECK11: omp.body.continue: 1855 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1856 // CHECK11: omp.inner.for.inc: 1857 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1858 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 1859 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 1860 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1861 // CHECK11: omp.inner.for.end: 1862 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1863 // CHECK11: omp.loop.exit: 1864 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1865 // CHECK11-NEXT: ret void 1866 // 1867