1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-enable-noundef-analysis -verify -Wno-vla -triple x86_64-apple-darwin10 -fopenmp -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -no-enable-noundef-analysis -verify -Wno-vla -triple x86_64-apple-darwin10 -fopenmp-simd -x c++ -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 typedef void **omp_allocator_handle_t; 14 extern const omp_allocator_handle_t omp_null_allocator; 15 extern const omp_allocator_handle_t omp_default_mem_alloc; 16 extern const omp_allocator_handle_t omp_large_cap_mem_alloc; 17 extern const omp_allocator_handle_t omp_const_mem_alloc; 18 extern const omp_allocator_handle_t omp_high_bw_mem_alloc; 19 extern const omp_allocator_handle_t omp_low_lat_mem_alloc; 20 extern const omp_allocator_handle_t omp_cgroup_mem_alloc; 21 extern const omp_allocator_handle_t omp_pteam_mem_alloc; 22 extern const omp_allocator_handle_t omp_thread_mem_alloc; 23 24 25 struct S { 26 int a; 27 S() : a(0) {} 28 S(const S&) {} 29 S& operator=(const S&) {return *this;} 30 ~S() {} 31 friend S operator+(const S&a, const S&b) {return a;} 32 }; 33 34 35 int main(int argc, char **argv) { 36 int a; 37 float b; 38 S c[5]; 39 short d[argc]; 40 #pragma omp taskgroup task_reduction(+: a, b, argc) 41 { 42 #pragma omp taskgroup task_reduction(-:c, d) 43 #pragma omp parallel 44 #pragma omp task in_reduction(+:a) in_reduction(-:d) allocate(omp_high_bw_mem_alloc: d) 45 a += d[a]; 46 } 47 #pragma omp task in_reduction(+:a) 48 ++a; 49 return 0; 50 } 51 52 53 54 55 #endif 56 // CHECK1-LABEL: define {{[^@]+}}@main 57 // CHECK1-SAME: (i32 [[ARGC:%.*]], ptr [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 58 // CHECK1-NEXT: entry: 59 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 60 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 61 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 62 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 63 // CHECK1-NEXT: [[B:%.*]] = alloca float, align 4 64 // CHECK1-NEXT: [[C:%.*]] = alloca [5 x %struct.S], align 16 65 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 66 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 67 // CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [3 x %struct.kmp_taskred_input_t], align 8 68 // CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 8 69 // CHECK1-NEXT: [[DOTRD_INPUT_3:%.*]] = alloca [2 x %struct.kmp_taskred_input_t.0], align 8 70 // CHECK1-NEXT: [[DOTTASK_RED_6:%.*]] = alloca ptr, align 8 71 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 72 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]]) 73 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 74 // CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 75 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 76 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0 77 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5 78 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 79 // CHECK1: arrayctor.loop: 80 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 81 // CHECK1-NEXT: call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 82 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 83 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 84 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 85 // CHECK1: arrayctor.cont: 86 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 87 // CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 88 // CHECK1-NEXT: [[TMP3:%.*]] = call ptr @llvm.stacksave.p0() 89 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[SAVED_STACK]], align 8 90 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP2]], align 16 91 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[__VLA_EXPR0]], align 8 92 // CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]]) 93 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 0 94 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0 95 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP4]], align 8 96 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1 97 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP5]], align 8 98 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2 99 // CHECK1-NEXT: store i64 4, ptr [[TMP6]], align 8 100 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3 101 // CHECK1-NEXT: store ptr @.red_init., ptr [[TMP7]], align 8 102 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4 103 // CHECK1-NEXT: store ptr null, ptr [[TMP8]], align 8 104 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5 105 // CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP9]], align 8 106 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6 107 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP10]], i8 0, i64 4, i1 false) 108 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_1:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 1 109 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 0 110 // CHECK1-NEXT: store ptr [[B]], ptr [[TMP11]], align 8 111 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 1 112 // CHECK1-NEXT: store ptr [[B]], ptr [[TMP12]], align 8 113 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 2 114 // CHECK1-NEXT: store i64 4, ptr [[TMP13]], align 8 115 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 3 116 // CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP14]], align 8 117 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 4 118 // CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8 119 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 5 120 // CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP16]], align 8 121 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 6 122 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP17]], i8 0, i64 4, i1 false) 123 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_2:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 2 124 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 0 125 // CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP18]], align 8 126 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 1 127 // CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP19]], align 8 128 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 2 129 // CHECK1-NEXT: store i64 4, ptr [[TMP20]], align 8 130 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 3 131 // CHECK1-NEXT: store ptr @.red_init..3, ptr [[TMP21]], align 8 132 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 4 133 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 134 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 5 135 // CHECK1-NEXT: store ptr @.red_comb..4, ptr [[TMP23]], align 8 136 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 6 137 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP24]], i8 0, i64 4, i1 false) 138 // CHECK1-NEXT: [[TMP25:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 3, ptr [[DOTRD_INPUT_]]) 139 // CHECK1-NEXT: store ptr [[TMP25]], ptr [[DOTTASK_RED_]], align 8 140 // CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]]) 141 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_4:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 0 142 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0:%.*]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 0 143 // CHECK1-NEXT: store ptr [[C]], ptr [[TMP26]], align 8 144 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 1 145 // CHECK1-NEXT: store ptr [[C]], ptr [[TMP27]], align 8 146 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 2 147 // CHECK1-NEXT: store i64 20, ptr [[TMP28]], align 8 148 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 3 149 // CHECK1-NEXT: store ptr @.red_init..5, ptr [[TMP29]], align 8 150 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 4 151 // CHECK1-NEXT: store ptr @.red_fini., ptr [[TMP30]], align 8 152 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 5 153 // CHECK1-NEXT: store ptr @.red_comb..6, ptr [[TMP31]], align 8 154 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 6 155 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP32]], i8 0, i64 4, i1 false) 156 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_5:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 1 157 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 0 158 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP33]], align 8 159 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 1 160 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP34]], align 8 161 // CHECK1-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP2]], 2 162 // CHECK1-NEXT: [[TMP36:%.*]] = udiv exact i64 [[TMP35]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64) 163 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 2 164 // CHECK1-NEXT: store i64 [[TMP35]], ptr [[TMP37]], align 8 165 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 3 166 // CHECK1-NEXT: store ptr @.red_init..7, ptr [[TMP38]], align 8 167 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 4 168 // CHECK1-NEXT: store ptr null, ptr [[TMP39]], align 8 169 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 5 170 // CHECK1-NEXT: store ptr @.red_comb..8, ptr [[TMP40]], align 8 171 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 6 172 // CHECK1-NEXT: store i32 1, ptr [[TMP41]], align 8 173 // CHECK1-NEXT: [[TMP42:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 2, ptr [[DOTRD_INPUT_3]]) 174 // CHECK1-NEXT: store ptr [[TMP42]], ptr [[DOTTASK_RED_6]], align 8 175 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 5, ptr @main.omp_outlined, ptr [[A]], i64 [[TMP2]], ptr [[VLA]], ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED_6]]) 176 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]]) 177 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]]) 178 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[AGG_CAPTURED]], i32 0, i32 0 179 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP43]], align 8 180 // CHECK1-NEXT: [[TMP44:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP0]], i32 1, i64 40, i64 8, ptr @.omp_task_entry..10) 181 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP44]], i32 0, i32 0 182 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP45]], i32 0, i32 0 183 // CHECK1-NEXT: [[TMP47:%.*]] = load ptr, ptr [[TMP46]], align 8 184 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP47]], ptr align 8 [[AGG_CAPTURED]], i64 8, i1 false) 185 // CHECK1-NEXT: [[TMP48:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP0]], ptr [[TMP44]]) 186 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 187 // CHECK1-NEXT: [[TMP49:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 188 // CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP49]]) 189 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0 190 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 5 191 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 192 // CHECK1: arraydestroy.body: 193 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP50]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 194 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 195 // CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3:[0-9]+]] 196 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 197 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 198 // CHECK1: arraydestroy.done8: 199 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[RETVAL]], align 4 200 // CHECK1-NEXT: ret i32 [[TMP51]] 201 // 202 // 203 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ev 204 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 205 // CHECK1-NEXT: entry: 206 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 207 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 208 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 209 // CHECK1-NEXT: call void @_ZN1SC2Ev(ptr nonnull align 4 dereferenceable(4) [[THIS1]]) 210 // CHECK1-NEXT: ret void 211 // 212 // 213 // CHECK1-LABEL: define {{[^@]+}}@.red_init. 214 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] { 215 // CHECK1-NEXT: entry: 216 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 217 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 218 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 219 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 220 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 221 // CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4 222 // CHECK1-NEXT: ret void 223 // 224 // 225 // CHECK1-LABEL: define {{[^@]+}}@.red_comb. 226 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] { 227 // CHECK1-NEXT: entry: 228 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 229 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 230 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 231 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 232 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 233 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 234 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 235 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4 236 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]] 237 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4 238 // CHECK1-NEXT: ret void 239 // 240 // 241 // CHECK1-LABEL: define {{[^@]+}}@.red_init..1 242 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] { 243 // CHECK1-NEXT: entry: 244 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 245 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 246 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 247 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 248 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 249 // CHECK1-NEXT: store float 0.000000e+00, ptr [[TMP2]], align 4 250 // CHECK1-NEXT: ret void 251 // 252 // 253 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..2 254 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] { 255 // CHECK1-NEXT: entry: 256 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 257 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 258 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 259 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 260 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 261 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 262 // CHECK1-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP2]], align 4 263 // CHECK1-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP3]], align 4 264 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP4]], [[TMP5]] 265 // CHECK1-NEXT: store float [[ADD]], ptr [[TMP2]], align 4 266 // CHECK1-NEXT: ret void 267 // 268 // 269 // CHECK1-LABEL: define {{[^@]+}}@.red_init..3 270 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] { 271 // CHECK1-NEXT: entry: 272 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 273 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 274 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 275 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 276 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 277 // CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4 278 // CHECK1-NEXT: ret void 279 // 280 // 281 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..4 282 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] { 283 // CHECK1-NEXT: entry: 284 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 285 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 286 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 287 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 288 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 289 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 290 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 291 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4 292 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]] 293 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4 294 // CHECK1-NEXT: ret void 295 // 296 // 297 // CHECK1-LABEL: define {{[^@]+}}@.red_init..5 298 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] { 299 // CHECK1-NEXT: entry: 300 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 301 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 302 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 303 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 304 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 305 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP2]], i32 0, i32 0 306 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5 307 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP3]] 308 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 309 // CHECK1: omp.arrayinit.body: 310 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 311 // CHECK1-NEXT: call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]]) 312 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 313 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]] 314 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 315 // CHECK1: omp.arrayinit.done: 316 // CHECK1-NEXT: ret void 317 // 318 // 319 // CHECK1-LABEL: define {{[^@]+}}@.red_fini. 320 // CHECK1-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5]] { 321 // CHECK1-NEXT: entry: 322 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 323 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 324 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8 325 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP1]], i32 0, i32 0 326 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5 327 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 328 // CHECK1: arraydestroy.body: 329 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 330 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 331 // CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 332 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 333 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 334 // CHECK1: arraydestroy.done1: 335 // CHECK1-NEXT: ret void 336 // 337 // 338 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev 339 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 340 // CHECK1-NEXT: entry: 341 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 342 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 343 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 344 // CHECK1-NEXT: call void @_ZN1SD2Ev(ptr nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 345 // CHECK1-NEXT: ret void 346 // 347 // 348 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..6 349 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] { 350 // CHECK1-NEXT: entry: 351 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 352 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 353 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4 354 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 355 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 356 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 357 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 358 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S]], ptr [[TMP2]], i64 5 359 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP4]] 360 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 361 // CHECK1: omp.arraycpy.body: 362 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 363 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 364 // CHECK1-NEXT: call void @_ZplRK1SS1_(ptr dead_on_unwind writable sret([[STRUCT_S]]) align 4 [[REF_TMP]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]]) 365 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) ptr @_ZN1SaSERKS_(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[REF_TMP]]) 366 // CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR3]] 367 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 368 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 369 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]] 370 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]] 371 // CHECK1: omp.arraycpy.done2: 372 // CHECK1-NEXT: ret void 373 // 374 // 375 // CHECK1-LABEL: define {{[^@]+}}@_ZplRK1SS1_ 376 // CHECK1-SAME: (ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1]] { 377 // CHECK1-NEXT: entry: 378 // CHECK1-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 8 379 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 380 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 381 // CHECK1-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 8 382 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 383 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 384 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 385 // CHECK1-NEXT: call void @_ZN1SC1ERKS_(ptr nonnull align 4 dereferenceable(4) [[AGG_RESULT]], ptr nonnull align 4 dereferenceable(4) [[TMP0]]) 386 // CHECK1-NEXT: ret void 387 // 388 // 389 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SaSERKS_ 390 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR1]] align 2 { 391 // CHECK1-NEXT: entry: 392 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 393 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 394 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 395 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 396 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 397 // CHECK1-NEXT: ret ptr [[THIS1]] 398 // 399 // 400 // CHECK1-LABEL: define {{[^@]+}}@.red_init..7 401 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] { 402 // CHECK1-NEXT: entry: 403 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 404 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 405 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 406 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 407 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 408 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8 409 // CHECK1-NEXT: [[TMP4:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}}) 410 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8 411 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr i16, ptr [[TMP3]], i64 [[TMP5]] 412 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP3]], [[TMP6]] 413 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 414 // CHECK1: omp.arrayinit.body: 415 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 416 // CHECK1-NEXT: store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 417 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 418 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 419 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 420 // CHECK1: omp.arrayinit.done: 421 // CHECK1-NEXT: ret void 422 // 423 // 424 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..8 425 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] { 426 // CHECK1-NEXT: entry: 427 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 428 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 429 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 430 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 431 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 432 // CHECK1-NEXT: [[TMP3:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}}) 433 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8 434 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR]], align 8 435 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 436 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr i16, ptr [[TMP5]], i64 [[TMP4]] 437 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP5]], [[TMP7]] 438 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 439 // CHECK1: omp.arraycpy.body: 440 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP6]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 441 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 442 // CHECK1-NEXT: [[TMP8:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 443 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32 444 // CHECK1-NEXT: [[TMP9:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 445 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP9]] to i32 446 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 447 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 448 // CHECK1-NEXT: store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 449 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 450 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 451 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]] 452 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 453 // CHECK1: omp.arraycpy.done4: 454 // CHECK1-NEXT: ret void 455 // 456 // 457 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined 458 // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] { 459 // CHECK1-NEXT: entry: 460 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 461 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 462 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 463 // CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 464 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8 465 // CHECK1-NEXT: [[DOTTASK_RED__ADDR:%.*]] = alloca ptr, align 8 466 // CHECK1-NEXT: [[DOTTASK_RED__ADDR2:%.*]] = alloca ptr, align 8 467 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 468 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 469 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 470 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 471 // CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 472 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8 473 // CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED__ADDR]], align 8 474 // CHECK1-NEXT: store ptr [[DOTTASK_RED_1]], ptr [[DOTTASK_RED__ADDR2]], align 8 475 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 476 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 477 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8 478 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR]], align 8 479 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR2]], align 8 480 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0 481 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8 482 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1 483 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP6]], align 8 484 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2 485 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP7]], align 8 486 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 3 487 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP8]], align 8 488 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 4 489 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP9]], align 8 490 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 491 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 492 // CHECK1-NEXT: [[TMP12:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP11]], i32 1, i64 56, i64 40, ptr @.omp_task_entry.) 493 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP12]], i32 0, i32 0 494 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP13]], i32 0, i32 0 495 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8 496 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[AGG_CAPTURED]], i64 40, i1 false) 497 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP12]], i32 0, i32 1 498 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP16]], i32 0, i32 0 499 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8 500 // CHECK1-NEXT: store ptr [[TMP18]], ptr [[TMP17]], align 8 501 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP16]], i32 0, i32 1 502 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP4]], align 8 503 // CHECK1-NEXT: store ptr [[TMP20]], ptr [[TMP19]], align 8 504 // CHECK1-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP11]], ptr [[TMP12]]) 505 // CHECK1-NEXT: ret void 506 // 507 // 508 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. 509 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]], ptr noalias [[TMP2:%.*]]) #[[ATTR8:[0-9]+]] { 510 // CHECK1-NEXT: entry: 511 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 512 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 513 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8 514 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 515 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 516 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8 517 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8 518 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0 519 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 520 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 8 521 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1 522 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 8 523 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8 524 // CHECK1-NEXT: ret void 525 // 526 // 527 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 528 // CHECK1-SAME: (i32 [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] { 529 // CHECK1-NEXT: entry: 530 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 531 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8 532 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8 533 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8 534 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8 535 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8 536 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8 537 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8 538 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 539 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 540 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4 541 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 542 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4 543 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 544 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0 545 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2 546 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0 547 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 548 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1 549 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 550 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 551 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 552 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 553 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]] 554 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]] 555 // CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]] 556 // CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]] 557 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]] 558 // CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]] 559 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]] 560 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP9]], i32 0, i32 1 561 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8 562 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]] 563 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]] 564 // CHECK1-NEXT: call void [[TMP12]](ptr [[TMP13]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3]] 565 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META12]] 566 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META12]] 567 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP9]], align 8 568 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP14]], align 8 569 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12]] 570 // CHECK1-NEXT: [[TMP19:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP18]], ptr [[TMP17]], ptr [[TMP16]]) 571 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 572 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8 573 // CHECK1-NEXT: [[TMP22:%.*]] = mul nuw i64 [[TMP11]], 2 574 // CHECK1-NEXT: [[TMP23:%.*]] = udiv exact i64 [[TMP22]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64) 575 // CHECK1-NEXT: [[TMP24:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP18]], ptr @{{reduction_size[.].+[.]}}) 576 // CHECK1-NEXT: store i64 [[TMP23]], ptr [[TMP24]], align 8 577 // CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP15]], align 8 578 // CHECK1-NEXT: [[TMP26:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP18]], ptr [[TMP25]], ptr [[TMP21]]) 579 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP19]], align 4 580 // CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP27]] to i64 581 // CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i16, ptr [[TMP26]], i64 [[IDXPROM_I]] 582 // CHECK1-NEXT: [[TMP28:%.*]] = load i16, ptr [[ARRAYIDX_I]], align 2 583 // CHECK1-NEXT: [[CONV_I:%.*]] = sext i16 [[TMP28]] to i32 584 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP19]], align 4 585 // CHECK1-NEXT: [[ADD_I:%.*]] = add nsw i32 [[TMP29]], [[CONV_I]] 586 // CHECK1-NEXT: store i32 [[ADD_I]], ptr [[TMP19]], align 4 587 // CHECK1-NEXT: ret i32 0 588 // 589 // 590 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..10 591 // CHECK1-SAME: (i32 [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] { 592 // CHECK1-NEXT: entry: 593 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 594 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8 595 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8 596 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8 597 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8 598 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8 599 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 600 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 601 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4 602 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 603 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4 604 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 605 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP3]], i32 0, i32 0 606 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2 607 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0 608 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 609 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META15:![0-9]+]]) 610 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META18:![0-9]+]]) 611 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 612 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]]) 613 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24:![0-9]+]] 614 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META24]] 615 // CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META24]] 616 // CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META24]] 617 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META24]] 618 // CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]] 619 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META24]] 620 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8 621 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META24]] 622 // CHECK1-NEXT: [[TMP11:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP10]], ptr null, ptr [[TMP9]]) 623 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 624 // CHECK1-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP12]], 1 625 // CHECK1-NEXT: store i32 [[INC_I]], ptr [[TMP11]], align 4 626 // CHECK1-NEXT: ret i32 0 627 // 628 // 629 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ev 630 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 631 // CHECK1-NEXT: entry: 632 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 633 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 634 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 635 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 636 // CHECK1-NEXT: store i32 0, ptr [[A]], align 4 637 // CHECK1-NEXT: ret void 638 // 639 // 640 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev 641 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 642 // CHECK1-NEXT: entry: 643 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 644 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 645 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 646 // CHECK1-NEXT: ret void 647 // 648 // 649 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1ERKS_ 650 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 651 // CHECK1-NEXT: entry: 652 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 653 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 654 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 655 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 656 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 657 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8 658 // CHECK1-NEXT: call void @_ZN1SC2ERKS_(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP1]]) 659 // CHECK1-NEXT: ret void 660 // 661 // 662 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2ERKS_ 663 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 664 // CHECK1-NEXT: entry: 665 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 666 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 667 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 668 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 669 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 670 // CHECK1-NEXT: ret void 671 // 672