1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target teams loop collapse(2) 29 for(int i = 0; i < X; i++) { 30 for(int j = 0; j < Y; j++) { 31 a[i][j] = (T)0; 32 } 33 } 34 35 // discard loop variables not needed here 36 37 38 return a[0][0]; 39 } 40 }; 41 42 int teams_template_struct(void) { 43 SS<int, 123, 456> V; 44 return V.foo(); 45 46 } 47 #endif // CK1 48 49 // Test host codegen. 50 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 51 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 52 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 53 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 54 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 56 57 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 58 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 59 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 60 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 63 #ifdef CK2 64 65 template <typename T, int n, int m> 66 int tmain(T argc) { 67 T a[n][m]; 68 #pragma omp target teams loop collapse(2) 69 for(int i = 0; i < n; i++) { 70 for(int j = 0; j < m; j++) { 71 a[i][j] = (T)0; 72 } 73 } 74 return 0; 75 } 76 77 int main (int argc, char **argv) { 78 int n = 100; 79 int m = 2; 80 int a[n][m]; 81 #pragma omp target teams loop collapse(2) 82 for(int i = 0; i < n; i++) { 83 for(int j = 0; j < m; j++) { 84 a[i][j] = 0; 85 } 86 } 87 return tmain<int, 10, 2>(argc); 88 } 89 90 91 92 93 94 95 96 97 // discard loop variables not needed here 98 99 100 #endif // CK2 101 #endif // #ifndef HEADER 102 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 103 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 104 // CHECK1-NEXT: entry: 105 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 106 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]]) 107 // CHECK1-NEXT: ret i32 [[CALL]] 108 // 109 // 110 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 111 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat { 112 // CHECK1-NEXT: entry: 113 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 114 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 115 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 116 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 117 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 118 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 119 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 120 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 121 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 122 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 123 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 124 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 125 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 126 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 127 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 128 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 129 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 130 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 131 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 132 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 133 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 134 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 135 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 136 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 137 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 138 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 139 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 140 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 141 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 142 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 143 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 144 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 145 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 146 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 147 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 148 // CHECK1-NEXT: store i64 56088, ptr [[TMP13]], align 8 149 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 150 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 151 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 152 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 153 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 154 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 155 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 156 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 157 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 158 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 159 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 160 // CHECK1: omp_offload.failed: 161 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 162 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 163 // CHECK1: omp_offload.cont: 164 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 165 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0 166 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0 167 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4 168 // CHECK1-NEXT: ret i32 [[TMP20]] 169 // 170 // 171 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 172 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 173 // CHECK1-NEXT: entry: 174 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 175 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 176 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 177 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 178 // CHECK1-NEXT: ret void 179 // 180 // 181 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 182 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 183 // CHECK1-NEXT: entry: 184 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 185 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 186 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 187 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 194 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 195 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 196 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 197 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 198 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 199 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 200 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 201 // CHECK1-NEXT: store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4 202 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 203 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 204 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 205 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 206 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 207 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 208 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 209 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 210 // CHECK1: cond.true: 211 // CHECK1-NEXT: br label [[COND_END:%.*]] 212 // CHECK1: cond.false: 213 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 214 // CHECK1-NEXT: br label [[COND_END]] 215 // CHECK1: cond.end: 216 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 217 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 218 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 219 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 220 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 221 // CHECK1: omp.inner.for.cond: 222 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 223 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 224 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 225 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 226 // CHECK1: omp.inner.for.body: 227 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 228 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 229 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 230 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 231 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 232 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 233 // CHECK1: omp.inner.for.inc: 234 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 235 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 236 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 237 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 238 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 239 // CHECK1: omp.inner.for.end: 240 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 241 // CHECK1: omp.loop.exit: 242 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 243 // CHECK1-NEXT: ret void 244 // 245 // 246 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined 247 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 248 // CHECK1-NEXT: entry: 249 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 250 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 251 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 252 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 253 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 254 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 263 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 264 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 265 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 266 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 267 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 268 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 269 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 270 // CHECK1-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4 271 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 272 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 273 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 274 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 275 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 276 // CHECK1-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 277 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 278 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 279 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 280 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 281 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 282 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 283 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 284 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 285 // CHECK1: cond.true: 286 // CHECK1-NEXT: br label [[COND_END:%.*]] 287 // CHECK1: cond.false: 288 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 289 // CHECK1-NEXT: br label [[COND_END]] 290 // CHECK1: cond.end: 291 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 292 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 293 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 294 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 295 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 296 // CHECK1: omp.inner.for.cond: 297 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 298 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 299 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 300 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 301 // CHECK1: omp.inner.for.body: 302 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 304 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 305 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 306 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 307 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 308 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 309 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456 310 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456 311 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 312 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 313 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 314 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[J]], align 4 315 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 316 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 317 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 318 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]] 319 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 320 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 321 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 322 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX9]], align 4 323 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 324 // CHECK1: omp.body.continue: 325 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 326 // CHECK1: omp.inner.for.inc: 327 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 328 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 329 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 331 // CHECK1: omp.inner.for.end: 332 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 333 // CHECK1: omp.loop.exit: 334 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 335 // CHECK1-NEXT: ret void 336 // 337 // 338 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 339 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 340 // CHECK3-NEXT: entry: 341 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 342 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]]) 343 // CHECK3-NEXT: ret i32 [[CALL]] 344 // 345 // 346 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 347 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 348 // CHECK3-NEXT: entry: 349 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 350 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 351 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 352 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 353 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 354 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 355 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 356 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 357 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 358 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 359 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 360 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 361 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 362 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 363 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 364 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 365 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 366 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 367 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 368 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 369 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 370 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 371 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 372 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 373 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 374 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 375 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 376 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 377 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 378 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 379 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 380 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 381 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 382 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 383 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 384 // CHECK3-NEXT: store i64 56088, ptr [[TMP13]], align 8 385 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 386 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 387 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 388 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 389 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 390 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 391 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 392 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 393 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 394 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 395 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 396 // CHECK3: omp_offload.failed: 397 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 398 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 399 // CHECK3: omp_offload.cont: 400 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 401 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0 402 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0 403 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4 404 // CHECK3-NEXT: ret i32 [[TMP20]] 405 // 406 // 407 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 408 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 409 // CHECK3-NEXT: entry: 410 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 411 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 412 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 413 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 414 // CHECK3-NEXT: ret void 415 // 416 // 417 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 418 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 419 // CHECK3-NEXT: entry: 420 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 421 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 422 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 423 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 424 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 425 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 426 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 427 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 428 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 429 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 430 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 431 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 432 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 433 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 434 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 435 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 436 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 437 // CHECK3-NEXT: store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4 438 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 439 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 440 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 441 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 442 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 443 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 444 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 445 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 446 // CHECK3: cond.true: 447 // CHECK3-NEXT: br label [[COND_END:%.*]] 448 // CHECK3: cond.false: 449 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 450 // CHECK3-NEXT: br label [[COND_END]] 451 // CHECK3: cond.end: 452 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 453 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 454 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 455 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 456 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 457 // CHECK3: omp.inner.for.cond: 458 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 459 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 460 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 461 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 462 // CHECK3: omp.inner.for.body: 463 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 464 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 465 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 466 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 467 // CHECK3: omp.inner.for.inc: 468 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 469 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 470 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 471 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 472 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 473 // CHECK3: omp.inner.for.end: 474 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 475 // CHECK3: omp.loop.exit: 476 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 477 // CHECK3-NEXT: ret void 478 // 479 // 480 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined 481 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 482 // CHECK3-NEXT: entry: 483 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 484 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 485 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 486 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 487 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 488 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 489 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 490 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 491 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 492 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 493 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 494 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 495 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 496 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 497 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 498 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 499 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 500 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 501 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 502 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 503 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 504 // CHECK3-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4 505 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 506 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 507 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 508 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 509 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 510 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 511 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 512 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 513 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 514 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 515 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087 516 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 517 // CHECK3: cond.true: 518 // CHECK3-NEXT: br label [[COND_END:%.*]] 519 // CHECK3: cond.false: 520 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 521 // CHECK3-NEXT: br label [[COND_END]] 522 // CHECK3: cond.end: 523 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 524 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 525 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 526 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 527 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 528 // CHECK3: omp.inner.for.cond: 529 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 530 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 531 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 532 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 533 // CHECK3: omp.inner.for.body: 534 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 535 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456 536 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 537 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 538 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 539 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 540 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 541 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456 542 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 543 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 544 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 545 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 546 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 547 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 548 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 549 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP13]] 550 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 551 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP14]] 552 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4 553 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 554 // CHECK3: omp.body.continue: 555 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 556 // CHECK3: omp.inner.for.inc: 557 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 558 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 559 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 560 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 561 // CHECK3: omp.inner.for.end: 562 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 563 // CHECK3: omp.loop.exit: 564 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 565 // CHECK3-NEXT: ret void 566 // 567 // 568 // CHECK9-LABEL: define {{[^@]+}}@main 569 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 570 // CHECK9-NEXT: entry: 571 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 572 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 573 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 574 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 575 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 576 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 577 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 578 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 579 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 580 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 581 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 582 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 583 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 584 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 585 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 586 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 587 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 588 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 589 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 590 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 591 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 592 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 593 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 594 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4 595 // CHECK9-NEXT: store i32 2, ptr [[M]], align 4 596 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 597 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 598 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[M]], align 4 599 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 600 // CHECK9-NEXT: [[TMP4:%.*]] = call ptr @llvm.stacksave.p0() 601 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8 602 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 603 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 604 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 605 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8 606 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[N]], align 4 607 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[N_CASTED]], align 4 608 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8 609 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[M]], align 4 610 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[M_CASTED]], align 4 611 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8 612 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 613 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 614 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false) 615 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 616 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP12]], align 8 617 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 618 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 8 619 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 620 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 621 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 622 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP15]], align 8 623 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 624 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP16]], align 8 625 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 626 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 627 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 628 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP18]], align 8 629 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 630 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP19]], align 8 631 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 632 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 633 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 634 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP21]], align 8 635 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 636 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP22]], align 8 637 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 638 // CHECK9-NEXT: store ptr null, ptr [[TMP23]], align 8 639 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 640 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 8 641 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 642 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP25]], align 8 643 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4 644 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[TMP26]], align 8 645 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 646 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8 647 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 648 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 649 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 650 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[N]], align 4 651 // CHECK9-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4 652 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[M]], align 4 653 // CHECK9-NEXT: store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4 654 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 655 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0 656 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 657 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 658 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 659 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0 660 // CHECK9-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 661 // CHECK9-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 662 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 663 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 664 // CHECK9-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8 665 // CHECK9-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8 666 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP35]], 1 667 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 668 // CHECK9-NEXT: store i32 3, ptr [[TMP36]], align 4 669 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 670 // CHECK9-NEXT: store i32 5, ptr [[TMP37]], align 4 671 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 672 // CHECK9-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 8 673 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 674 // CHECK9-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 8 675 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 676 // CHECK9-NEXT: store ptr [[TMP30]], ptr [[TMP40]], align 8 677 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 678 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP41]], align 8 679 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 680 // CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 8 681 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 682 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8 683 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 684 // CHECK9-NEXT: store i64 [[ADD]], ptr [[TMP44]], align 8 685 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 686 // CHECK9-NEXT: store i64 0, ptr [[TMP45]], align 8 687 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 688 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4 689 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 690 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4 691 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 692 // CHECK9-NEXT: store i32 0, ptr [[TMP48]], align 4 693 // CHECK9-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]]) 694 // CHECK9-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 695 // CHECK9-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 696 // CHECK9: omp_offload.failed: 697 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 698 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 699 // CHECK9: omp_offload.cont: 700 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 701 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]]) 702 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 703 // CHECK9-NEXT: [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 704 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP52]]) 705 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4 706 // CHECK9-NEXT: ret i32 [[TMP53]] 707 // 708 // 709 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 710 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 711 // CHECK9-NEXT: entry: 712 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 713 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 714 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 715 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 716 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 717 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 718 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 719 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 720 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 721 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 722 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 723 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 724 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 725 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 726 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 727 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4 728 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 729 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 730 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[M_ADDR]], align 4 731 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[M_CASTED]], align 4 732 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, ptr [[M_CASTED]], align 8 733 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined, i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]]) 734 // CHECK9-NEXT: ret void 735 // 736 // 737 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined 738 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 739 // CHECK9-NEXT: entry: 740 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 741 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 742 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 743 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 744 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 745 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 746 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 747 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 748 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 749 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 750 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 751 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 752 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 753 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 754 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 755 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 756 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 757 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 758 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 759 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 760 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 761 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 762 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 763 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 764 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 765 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 766 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 767 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 768 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 769 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 770 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 771 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 772 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 773 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4 774 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 775 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4 776 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4 777 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 778 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 779 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 780 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 781 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 782 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0 783 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 784 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 785 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 786 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 787 // CHECK9-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 788 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 789 // CHECK9-NEXT: store i32 0, ptr [[J]], align 4 790 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 791 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 792 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 793 // CHECK9: land.lhs.true: 794 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 795 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]] 796 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 797 // CHECK9: omp.precond.then: 798 // CHECK9-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8 799 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 800 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 8 801 // CHECK9-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 802 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 803 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 804 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 805 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 806 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 807 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 808 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]] 809 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 810 // CHECK9: cond.true: 811 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 812 // CHECK9-NEXT: br label [[COND_END:%.*]] 813 // CHECK9: cond.false: 814 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 815 // CHECK9-NEXT: br label [[COND_END]] 816 // CHECK9: cond.end: 817 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 818 // CHECK9-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8 819 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 820 // CHECK9-NEXT: store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8 821 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 822 // CHECK9: omp.inner.for.cond: 823 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 824 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 825 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]] 826 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 827 // CHECK9: omp.inner.for.body: 828 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 829 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 830 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[N_ADDR]], align 4 831 // CHECK9-NEXT: store i32 [[TMP21]], ptr [[N_CASTED]], align 4 832 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[N_CASTED]], align 8 833 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[M_ADDR]], align 4 834 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[M_CASTED]], align 4 835 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[M_CASTED]], align 8 836 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP19]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP24]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]]) 837 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 838 // CHECK9: omp.inner.for.inc: 839 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 840 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8 841 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]] 842 // CHECK9-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8 843 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 844 // CHECK9: omp.inner.for.end: 845 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 846 // CHECK9: omp.loop.exit: 847 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 848 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 849 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 850 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 851 // CHECK9: omp.precond.end: 852 // CHECK9-NEXT: ret void 853 // 854 // 855 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined 856 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 857 // CHECK9-NEXT: entry: 858 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 859 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 860 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 861 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 862 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 863 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 864 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 865 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 866 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 867 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 868 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 869 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 870 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 871 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 872 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 873 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 874 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 875 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 876 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 877 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 878 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 879 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 880 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 881 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 882 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 883 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 884 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 885 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 886 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 887 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 888 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 889 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 890 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 891 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 892 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 893 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4 894 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 895 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4 896 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4 897 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 898 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 899 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 900 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 901 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 902 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0 903 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 904 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 905 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 906 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 907 // CHECK9-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 908 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 909 // CHECK9-NEXT: store i32 0, ptr [[J]], align 4 910 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 911 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 912 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 913 // CHECK9: land.lhs.true: 914 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 915 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]] 916 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 917 // CHECK9: omp.precond.then: 918 // CHECK9-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 919 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 920 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8 921 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 922 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 923 // CHECK9-NEXT: store i64 [[TMP10]], ptr [[DOTOMP_LB]], align 8 924 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8 925 // CHECK9-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 926 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 927 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 928 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 929 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 930 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 931 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 932 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 933 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 934 // CHECK9: cond.true: 935 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 936 // CHECK9-NEXT: br label [[COND_END:%.*]] 937 // CHECK9: cond.false: 938 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 939 // CHECK9-NEXT: br label [[COND_END]] 940 // CHECK9: cond.end: 941 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 942 // CHECK9-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 943 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 944 // CHECK9-NEXT: store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8 945 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 946 // CHECK9: omp.inner.for.cond: 947 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 948 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 949 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 950 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 951 // CHECK9: omp.inner.for.body: 952 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 953 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 954 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0 955 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 956 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 957 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 958 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]] 959 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 960 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 961 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 962 // CHECK9-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4 963 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 964 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 965 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 966 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0 967 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 968 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 969 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 970 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]] 971 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 972 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0 973 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 974 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 975 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 976 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 977 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]] 978 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 979 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 980 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 981 // CHECK9-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4 982 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I11]], align 4 983 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64 984 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]] 985 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[TMP28]] 986 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[J12]], align 4 987 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64 988 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]] 989 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX37]], align 4 990 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 991 // CHECK9: omp.body.continue: 992 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 993 // CHECK9: omp.inner.for.inc: 994 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 995 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1 996 // CHECK9-NEXT: store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8 997 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 998 // CHECK9: omp.inner.for.end: 999 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1000 // CHECK9: omp.loop.exit: 1001 // CHECK9-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1002 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 1003 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP32]]) 1004 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1005 // CHECK9: omp.precond.end: 1006 // CHECK9-NEXT: ret void 1007 // 1008 // 1009 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1010 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1011 // CHECK9-NEXT: entry: 1012 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1013 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1014 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1015 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1016 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1017 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1018 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1019 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1020 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1021 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1022 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 1023 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1024 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 1025 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1026 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 1027 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1028 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1029 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1030 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4 1031 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1032 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4 1033 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1034 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 1035 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1036 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 1037 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1038 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 8 1039 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1040 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8 1041 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1042 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 1043 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1044 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 1045 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1046 // CHECK9-NEXT: store i64 20, ptr [[TMP13]], align 8 1047 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1048 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 1049 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1050 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1051 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1052 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1053 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1054 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4 1055 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]]) 1056 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1057 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1058 // CHECK9: omp_offload.failed: 1059 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR3]] 1060 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1061 // CHECK9: omp_offload.cont: 1062 // CHECK9-NEXT: ret i32 0 1063 // 1064 // 1065 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68 1066 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1067 // CHECK9-NEXT: entry: 1068 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1069 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1070 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1071 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]]) 1072 // CHECK9-NEXT: ret void 1073 // 1074 // 1075 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined 1076 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1077 // CHECK9-NEXT: entry: 1078 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1079 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1080 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1081 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1082 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1083 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1084 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1085 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1086 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1087 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1088 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1089 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1090 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1091 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1092 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1093 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1094 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1095 // CHECK9-NEXT: store i32 19, ptr [[DOTOMP_COMB_UB]], align 4 1096 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1097 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1098 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1099 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1100 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1101 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1102 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1103 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1104 // CHECK9: cond.true: 1105 // CHECK9-NEXT: br label [[COND_END:%.*]] 1106 // CHECK9: cond.false: 1107 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1108 // CHECK9-NEXT: br label [[COND_END]] 1109 // CHECK9: cond.end: 1110 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1111 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1112 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1113 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1114 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1115 // CHECK9: omp.inner.for.cond: 1116 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1117 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1118 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1119 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1120 // CHECK9: omp.inner.for.body: 1121 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1122 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1123 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1124 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1125 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 1126 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1127 // CHECK9: omp.inner.for.inc: 1128 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1129 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1130 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1131 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1132 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1133 // CHECK9: omp.inner.for.end: 1134 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1135 // CHECK9: omp.loop.exit: 1136 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1137 // CHECK9-NEXT: ret void 1138 // 1139 // 1140 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined.omp_outlined 1141 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1142 // CHECK9-NEXT: entry: 1143 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1144 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1145 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1146 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1147 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1148 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1149 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1150 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1151 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1152 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1153 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1154 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1155 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1156 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 1157 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1158 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1159 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1160 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1161 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1162 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1163 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1164 // CHECK9-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4 1165 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1166 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1167 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1168 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 1169 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1170 // CHECK9-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 1171 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1172 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1173 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1174 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1175 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1176 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1177 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1178 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1179 // CHECK9: cond.true: 1180 // CHECK9-NEXT: br label [[COND_END:%.*]] 1181 // CHECK9: cond.false: 1182 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1183 // CHECK9-NEXT: br label [[COND_END]] 1184 // CHECK9: cond.end: 1185 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1186 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1187 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1188 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1189 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1190 // CHECK9: omp.inner.for.cond: 1191 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1192 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1193 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1194 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1195 // CHECK9: omp.inner.for.body: 1196 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1197 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1198 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1199 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1200 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1201 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1202 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1203 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2 1204 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2 1205 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]] 1206 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1 1207 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]] 1208 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[J]], align 4 1209 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1210 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1211 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 1212 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 1213 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64 1214 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]] 1215 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX9]], align 4 1216 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1217 // CHECK9: omp.body.continue: 1218 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1219 // CHECK9: omp.inner.for.inc: 1220 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1221 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1 1222 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 1223 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1224 // CHECK9: omp.inner.for.end: 1225 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1226 // CHECK9: omp.loop.exit: 1227 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1228 // CHECK9-NEXT: ret void 1229 // 1230 // 1231 // CHECK11-LABEL: define {{[^@]+}}@main 1232 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1233 // CHECK11-NEXT: entry: 1234 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1235 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1236 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 1237 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 1238 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 1239 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 1240 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 1241 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 1242 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1243 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 1244 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 1245 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 1246 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 1247 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 1248 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1249 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1250 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1251 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1252 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 1253 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1254 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1255 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1256 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 1257 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4 1258 // CHECK11-NEXT: store i32 2, ptr [[M]], align 4 1259 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 1260 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[M]], align 4 1261 // CHECK11-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 1262 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4 1263 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1264 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 1265 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 1266 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4 1267 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 4 1268 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 1269 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 1270 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[M]], align 4 1271 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[M_CASTED]], align 4 1272 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4 1273 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 1274 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 1275 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 1276 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false) 1277 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1278 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP11]], align 4 1279 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1280 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP12]], align 4 1281 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1282 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 1283 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1284 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP14]], align 4 1285 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1286 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP15]], align 4 1287 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1288 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 1289 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1290 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP17]], align 4 1291 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1292 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP18]], align 4 1293 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1294 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4 1295 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1296 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP20]], align 4 1297 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1298 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP21]], align 4 1299 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1300 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 1301 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1302 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP23]], align 4 1303 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1304 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 4 1305 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4 1306 // CHECK11-NEXT: store i64 [[TMP10]], ptr [[TMP25]], align 4 1307 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1308 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4 1309 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1310 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1311 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1312 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[N]], align 4 1313 // CHECK11-NEXT: store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4 1314 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[M]], align 4 1315 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1316 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1317 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 1318 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1319 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1320 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1321 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0 1322 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 1323 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 1324 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 1325 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 1326 // CHECK11-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8 1327 // CHECK11-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8 1328 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP34]], 1 1329 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1330 // CHECK11-NEXT: store i32 3, ptr [[TMP35]], align 4 1331 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1332 // CHECK11-NEXT: store i32 5, ptr [[TMP36]], align 4 1333 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1334 // CHECK11-NEXT: store ptr [[TMP27]], ptr [[TMP37]], align 4 1335 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1336 // CHECK11-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 4 1337 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1338 // CHECK11-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 4 1339 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1340 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP40]], align 4 1341 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1342 // CHECK11-NEXT: store ptr null, ptr [[TMP41]], align 4 1343 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1344 // CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 4 1345 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1346 // CHECK11-NEXT: store i64 [[ADD]], ptr [[TMP43]], align 8 1347 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1348 // CHECK11-NEXT: store i64 0, ptr [[TMP44]], align 8 1349 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1350 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4 1351 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1352 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4 1353 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1354 // CHECK11-NEXT: store i32 0, ptr [[TMP47]], align 4 1355 // CHECK11-NEXT: [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]]) 1356 // CHECK11-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0 1357 // CHECK11-NEXT: br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1358 // CHECK11: omp_offload.failed: 1359 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 1360 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1361 // CHECK11: omp_offload.cont: 1362 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 1363 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]]) 1364 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1365 // CHECK11-NEXT: [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 1366 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP51]]) 1367 // CHECK11-NEXT: [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 4 1368 // CHECK11-NEXT: ret i32 [[TMP52]] 1369 // 1370 // 1371 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81 1372 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1373 // CHECK11-NEXT: entry: 1374 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1375 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1376 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1377 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1378 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1379 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1380 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 1381 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1382 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 1383 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1384 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1385 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1386 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1387 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1388 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1389 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4 1390 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 1391 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4 1392 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[M_ADDR]], align 4 1393 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[M_CASTED]], align 4 1394 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[M_CASTED]], align 4 1395 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined, i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]]) 1396 // CHECK11-NEXT: ret void 1397 // 1398 // 1399 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined 1400 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1401 // CHECK11-NEXT: entry: 1402 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1403 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1404 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1405 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1406 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1407 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1408 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1409 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1410 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1411 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1412 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1413 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1414 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1415 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1416 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1417 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 1418 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 1419 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1420 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1421 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 1422 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 1423 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1424 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 1425 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1426 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1427 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1428 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 1429 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1430 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1431 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1432 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1433 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1434 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1435 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4 1436 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 1437 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4 1438 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4 1439 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1440 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1441 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1442 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1443 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1444 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0 1445 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1446 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1447 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1448 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1449 // CHECK11-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 1450 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 1451 // CHECK11-NEXT: store i32 0, ptr [[J]], align 4 1452 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1453 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1454 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1455 // CHECK11: land.lhs.true: 1456 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1457 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]] 1458 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1459 // CHECK11: omp.precond.then: 1460 // CHECK11-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8 1461 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1462 // CHECK11-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 8 1463 // CHECK11-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 1464 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1465 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1466 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1467 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 1468 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1469 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1470 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]] 1471 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1472 // CHECK11: cond.true: 1473 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1474 // CHECK11-NEXT: br label [[COND_END:%.*]] 1475 // CHECK11: cond.false: 1476 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1477 // CHECK11-NEXT: br label [[COND_END]] 1478 // CHECK11: cond.end: 1479 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1480 // CHECK11-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8 1481 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 1482 // CHECK11-NEXT: store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8 1483 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1484 // CHECK11: omp.inner.for.cond: 1485 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1486 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1487 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]] 1488 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1489 // CHECK11: omp.inner.for.body: 1490 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 1491 // CHECK11-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32 1492 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 1493 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32 1494 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[N_ADDR]], align 4 1495 // CHECK11-NEXT: store i32 [[TMP23]], ptr [[N_CASTED]], align 4 1496 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[N_CASTED]], align 4 1497 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[M_ADDR]], align 4 1498 // CHECK11-NEXT: store i32 [[TMP25]], ptr [[M_CASTED]], align 4 1499 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[M_CASTED]], align 4 1500 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i32 [[TMP20]], i32 [[TMP22]], i32 [[TMP24]], i32 [[TMP26]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]]) 1501 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1502 // CHECK11: omp.inner.for.inc: 1503 // CHECK11-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1504 // CHECK11-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8 1505 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP27]], [[TMP28]] 1506 // CHECK11-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8 1507 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1508 // CHECK11: omp.inner.for.end: 1509 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1510 // CHECK11: omp.loop.exit: 1511 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1512 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 1513 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP30]]) 1514 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1515 // CHECK11: omp.precond.end: 1516 // CHECK11-NEXT: ret void 1517 // 1518 // 1519 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined 1520 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1521 // CHECK11-NEXT: entry: 1522 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1523 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1524 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1525 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1526 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1527 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1528 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1529 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1530 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1531 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1532 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1533 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1534 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1535 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1536 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1537 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1538 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1539 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1540 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1541 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1542 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1543 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4 1544 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4 1545 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1546 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1547 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1548 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1549 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1550 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 1551 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1552 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1553 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1554 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1555 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1556 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1557 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4 1558 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 1559 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4 1560 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4 1561 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1562 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1563 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1564 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1565 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1566 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0 1567 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1568 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1569 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1570 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1571 // CHECK11-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 1572 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 1573 // CHECK11-NEXT: store i32 0, ptr [[J]], align 4 1574 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1575 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1576 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1577 // CHECK11: land.lhs.true: 1578 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1579 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]] 1580 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1581 // CHECK11: omp.precond.then: 1582 // CHECK11-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 1583 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1584 // CHECK11-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8 1585 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1586 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP10]] to i64 1587 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1588 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP11]] to i64 1589 // CHECK11-NEXT: store i64 [[CONV11]], ptr [[DOTOMP_LB]], align 8 1590 // CHECK11-NEXT: store i64 [[CONV12]], ptr [[DOTOMP_UB]], align 8 1591 // CHECK11-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 1592 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1593 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1594 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 1595 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 1596 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1597 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1598 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1599 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1600 // CHECK11: cond.true: 1601 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1602 // CHECK11-NEXT: br label [[COND_END:%.*]] 1603 // CHECK11: cond.false: 1604 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1605 // CHECK11-NEXT: br label [[COND_END]] 1606 // CHECK11: cond.end: 1607 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1608 // CHECK11-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 1609 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 1610 // CHECK11-NEXT: store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8 1611 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1612 // CHECK11: omp.inner.for.cond: 1613 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1614 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1615 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1616 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1617 // CHECK11: omp.inner.for.body: 1618 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1619 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1620 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0 1621 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1 1622 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]] 1623 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64 1624 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]] 1625 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1 1626 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]] 1627 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32 1628 // CHECK11-NEXT: store i32 [[CONV23]], ptr [[I13]], align 4 1629 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1630 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1631 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1632 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0 1633 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 1634 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]] 1635 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64 1636 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]] 1637 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1638 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0 1639 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1640 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]] 1641 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64 1642 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]] 1643 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]] 1644 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1 1645 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]] 1646 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32 1647 // CHECK11-NEXT: store i32 [[CONV37]], ptr [[J14]], align 4 1648 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I13]], align 4 1649 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP1]] 1650 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP28]] 1651 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[J14]], align 4 1652 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP29]] 1653 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX38]], align 4 1654 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1655 // CHECK11: omp.body.continue: 1656 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1657 // CHECK11: omp.inner.for.inc: 1658 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1659 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP30]], 1 1660 // CHECK11-NEXT: store i64 [[ADD39]], ptr [[DOTOMP_IV]], align 8 1661 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1662 // CHECK11: omp.inner.for.end: 1663 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1664 // CHECK11: omp.loop.exit: 1665 // CHECK11-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1666 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 1667 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP32]]) 1668 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1669 // CHECK11: omp.precond.end: 1670 // CHECK11-NEXT: ret void 1671 // 1672 // 1673 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1674 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1675 // CHECK11-NEXT: entry: 1676 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1677 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1678 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1679 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1680 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1681 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1682 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1683 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1684 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1685 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1686 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 1687 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1688 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 1689 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1690 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1691 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1692 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1693 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1694 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4 1695 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1696 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4 1697 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1698 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 1699 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1700 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1701 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1702 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 4 1703 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1704 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4 1705 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1706 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1707 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1708 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1709 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1710 // CHECK11-NEXT: store i64 20, ptr [[TMP13]], align 8 1711 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1712 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 1713 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1714 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1715 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1716 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1717 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1718 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4 1719 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]]) 1720 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1721 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1722 // CHECK11: omp_offload.failed: 1723 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR3]] 1724 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1725 // CHECK11: omp_offload.cont: 1726 // CHECK11-NEXT: ret i32 0 1727 // 1728 // 1729 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68 1730 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1731 // CHECK11-NEXT: entry: 1732 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1733 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1734 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1735 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]]) 1736 // CHECK11-NEXT: ret void 1737 // 1738 // 1739 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined 1740 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1741 // CHECK11-NEXT: entry: 1742 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1743 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1744 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1745 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1746 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1747 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1748 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1749 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1750 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1751 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1752 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1753 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1754 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1755 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1756 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1757 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1758 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1759 // CHECK11-NEXT: store i32 19, ptr [[DOTOMP_COMB_UB]], align 4 1760 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1761 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1762 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1763 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1764 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1765 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1766 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1767 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1768 // CHECK11: cond.true: 1769 // CHECK11-NEXT: br label [[COND_END:%.*]] 1770 // CHECK11: cond.false: 1771 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1772 // CHECK11-NEXT: br label [[COND_END]] 1773 // CHECK11: cond.end: 1774 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1775 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1776 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1777 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1778 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1779 // CHECK11: omp.inner.for.cond: 1780 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1781 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1782 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1783 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1784 // CHECK11: omp.inner.for.body: 1785 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1786 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1787 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 1788 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1789 // CHECK11: omp.inner.for.inc: 1790 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1791 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1792 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1793 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1794 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1795 // CHECK11: omp.inner.for.end: 1796 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1797 // CHECK11: omp.loop.exit: 1798 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1799 // CHECK11-NEXT: ret void 1800 // 1801 // 1802 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined.omp_outlined 1803 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1804 // CHECK11-NEXT: entry: 1805 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1806 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1807 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1808 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1809 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1810 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1811 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1812 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1813 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1814 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1815 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1816 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1817 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1818 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1819 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1820 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1821 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1822 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1823 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1824 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1825 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1826 // CHECK11-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4 1827 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1828 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1829 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1830 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1831 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1832 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1833 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1834 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1835 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1836 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1837 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19 1838 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1839 // CHECK11: cond.true: 1840 // CHECK11-NEXT: br label [[COND_END:%.*]] 1841 // CHECK11: cond.false: 1842 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1843 // CHECK11-NEXT: br label [[COND_END]] 1844 // CHECK11: cond.end: 1845 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1846 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1847 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1848 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1849 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1850 // CHECK11: omp.inner.for.cond: 1851 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1852 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1853 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1854 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1855 // CHECK11: omp.inner.for.body: 1856 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1857 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2 1858 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1859 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1860 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1861 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1862 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1863 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2 1864 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1865 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]] 1866 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1867 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1868 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 1869 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1870 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP13]] 1871 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[J]], align 4 1872 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP14]] 1873 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4 1874 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1875 // CHECK11: omp.body.continue: 1876 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1877 // CHECK11: omp.inner.for.inc: 1878 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1879 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 1880 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 1881 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1882 // CHECK11: omp.inner.for.end: 1883 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1884 // CHECK11: omp.loop.exit: 1885 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1886 // CHECK11-NEXT: ret void 1887 // 1888