1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var) 50 for (int i = 0; i < 2; ++i) { 51 vec[i] = t_var; 52 s_arr[i] = var; 53 } 54 return T(); 55 } 56 57 int main() { 58 static int svar; 59 volatile double g; 60 volatile double &g1 = g; 61 62 #ifdef LAMBDA 63 [&]() { 64 static float sfvar; 65 66 #pragma omp target teams distribute simd lastprivate(g, g1, svar, sfvar) 67 for (int i = 0; i < 2; ++i) { 68 // loop variables 69 70 // init private variables 71 g = 1; 72 g1 = 1; 73 svar = 3; 74 sfvar = 4.0; 75 76 77 [&]() { 78 g = 2; 79 g1 = 2; 80 svar = 4; 81 sfvar = 8.0; 82 83 }(); 84 } 85 }(); 86 return 0; 87 #else 88 S<float> test; 89 int t_var = 0; 90 int vec[] = {1, 2}; 91 S<float> s_arr[] = {1, 2}; 92 S<float> &var = test; 93 94 #pragma omp target teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 95 for (int i = 0; i < 2; ++i) { 96 vec[i] = t_var; 97 s_arr[i] = var; 98 } 99 int i; 100 101 return tmain<int>(); 102 #endif 103 } 104 105 106 // skip loop variables 107 108 // copy from parameters to local address variables 109 110 // load content of local address variables 111 // the distribute loop 112 // assignment: vec[i] = t_var; 113 114 // assignment: s_arr[i] = var; 115 116 // lastprivates 117 118 119 // template tmain 120 121 122 123 // skip alloca of global_tid and bound_tid 124 // skip loop variables 125 126 // skip init of bound and global tid 127 // copy from parameters to local address variables 128 129 // load content of local address variables 130 // assignment: vec[i] = t_var; 131 132 // assignment: s_arr[i] = var; 133 134 // lastprivates 135 136 #endif 137 // CHECK1-LABEL: define {{[^@]+}}@main 138 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 142 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8 143 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 144 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 145 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8 146 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 147 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 148 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 149 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8 150 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8 151 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 152 // CHECK1-NEXT: ret i32 0 153 // 154 // 155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 156 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 157 // CHECK1-NEXT: entry: 158 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 159 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 160 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 161 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 163 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 166 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 167 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 170 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 171 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8 172 // CHECK1-NEXT: [[TMP0:%.*]] = load double, ptr [[G_ADDR]], align 8 173 // CHECK1-NEXT: store double [[TMP0]], ptr [[G_CASTED]], align 8 174 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[G_CASTED]], align 8 175 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8 176 // CHECK1-NEXT: [[TMP3:%.*]] = load volatile double, ptr [[TMP2]], align 8 177 // CHECK1-NEXT: store double [[TMP3]], ptr [[G1_CASTED]], align 8 178 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[G1_CASTED]], align 8 179 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 180 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[SVAR_CASTED]], align 4 181 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 182 // CHECK1-NEXT: [[TMP7:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4 183 // CHECK1-NEXT: store float [[TMP7]], ptr [[SFVAR_CASTED]], align 4 184 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[SFVAR_CASTED]], align 8 185 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) 186 // CHECK1-NEXT: ret void 187 // 188 // 189 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined 190 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 191 // CHECK1-NEXT: entry: 192 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 193 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 194 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 195 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 196 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 197 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 198 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 199 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 201 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 203 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 204 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 205 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8 206 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8 207 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8 208 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 210 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 212 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 213 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 214 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8 215 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8 216 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 217 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 218 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8 219 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 220 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 221 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 222 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 223 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8 224 // CHECK1-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 8 225 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 226 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 227 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 228 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 229 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 230 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 231 // CHECK1: cond.true: 232 // CHECK1-NEXT: br label [[COND_END:%.*]] 233 // CHECK1: cond.false: 234 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 235 // CHECK1-NEXT: br label [[COND_END]] 236 // CHECK1: cond.end: 237 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 238 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 239 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 240 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 241 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 242 // CHECK1: omp.inner.for.cond: 243 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]] 244 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]] 245 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 246 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 247 // CHECK1: omp.inner.for.body: 248 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 249 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 250 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 251 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]] 252 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP4]] 253 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8, !llvm.access.group [[ACC_GRP4]] 254 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP9]], align 8, !llvm.access.group [[ACC_GRP4]] 255 // CHECK1-NEXT: store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP4]] 256 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP4]] 257 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 258 // CHECK1-NEXT: store ptr [[G2]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP4]] 259 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 260 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP4]], align 8, !llvm.access.group [[ACC_GRP4]] 261 // CHECK1-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8, !llvm.access.group [[ACC_GRP4]] 262 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 263 // CHECK1-NEXT: store ptr [[SVAR5]], ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP4]] 264 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 265 // CHECK1-NEXT: store ptr [[SFVAR6]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP4]] 266 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP4]] 267 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 268 // CHECK1: omp.body.continue: 269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 270 // CHECK1: omp.inner.for.inc: 271 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 272 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 273 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 275 // CHECK1: omp.inner.for.end: 276 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 277 // CHECK1: omp.loop.exit: 278 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 279 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 280 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 281 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 282 // CHECK1: .omp.final.then: 283 // CHECK1-NEXT: store i32 2, ptr [[I]], align 4 284 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 285 // CHECK1: .omp.final.done: 286 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 287 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 288 // CHECK1-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 289 // CHECK1: .omp.lastprivate.then: 290 // CHECK1-NEXT: [[TMP20:%.*]] = load double, ptr [[G2]], align 8 291 // CHECK1-NEXT: store volatile double [[TMP20]], ptr [[G_ADDR]], align 8 292 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP4]], align 8 293 // CHECK1-NEXT: [[TMP22:%.*]] = load double, ptr [[TMP21]], align 8 294 // CHECK1-NEXT: store volatile double [[TMP22]], ptr [[TMP0]], align 8 295 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[SVAR5]], align 4 296 // CHECK1-NEXT: store i32 [[TMP23]], ptr [[SVAR_ADDR]], align 4 297 // CHECK1-NEXT: [[TMP24:%.*]] = load float, ptr [[SFVAR6]], align 4 298 // CHECK1-NEXT: store float [[TMP24]], ptr [[SFVAR_ADDR]], align 4 299 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 300 // CHECK1: .omp.lastprivate.done: 301 // CHECK1-NEXT: ret void 302 // 303 // 304 // CHECK3-LABEL: define {{[^@]+}}@main 305 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 306 // CHECK3-NEXT: entry: 307 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 308 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 309 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4 310 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 311 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 312 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4 313 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 314 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 315 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 316 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4 317 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4 318 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 319 // CHECK3-NEXT: ret i32 0 320 // 321 // 322 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 323 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 324 // CHECK3-NEXT: entry: 325 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 326 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 327 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 328 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 329 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 330 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 331 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 332 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 333 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 334 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 335 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 336 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 337 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 338 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 339 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4 340 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 341 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[SVAR_CASTED]], align 4 342 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 343 // CHECK3-NEXT: [[TMP5:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4 344 // CHECK3-NEXT: store float [[TMP5]], ptr [[SFVAR_CASTED]], align 4 345 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[SFVAR_CASTED]], align 4 346 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) 347 // CHECK3-NEXT: ret void 348 // 349 // 350 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined 351 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 352 // CHECK3-NEXT: entry: 353 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 354 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 355 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 356 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 357 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 358 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 359 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 360 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 361 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 362 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 363 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 364 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 365 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 366 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 367 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 368 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4 369 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 370 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 371 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 372 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 373 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 374 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 375 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 376 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 377 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 378 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 379 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 380 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 381 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 382 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 383 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 384 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 385 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 386 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4 387 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4 388 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 389 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 390 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 391 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 392 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 393 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 394 // CHECK3: cond.true: 395 // CHECK3-NEXT: br label [[COND_END:%.*]] 396 // CHECK3: cond.false: 397 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 398 // CHECK3-NEXT: br label [[COND_END]] 399 // CHECK3: cond.end: 400 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 401 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 402 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 403 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 405 // CHECK3: omp.inner.for.cond: 406 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 407 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 408 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 409 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 410 // CHECK3: omp.inner.for.body: 411 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 412 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 413 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 414 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 415 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP5]] 416 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP5]] 417 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP5]] 418 // CHECK3-NEXT: store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP5]] 419 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP5]] 420 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 421 // CHECK3-NEXT: store ptr [[G2]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP5]] 422 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 423 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP5]] 424 // CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP5]] 425 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 426 // CHECK3-NEXT: store ptr [[SVAR5]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP5]] 427 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 428 // CHECK3-NEXT: store ptr [[SFVAR6]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP5]] 429 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP5]] 430 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 431 // CHECK3: omp.body.continue: 432 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 433 // CHECK3: omp.inner.for.inc: 434 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 435 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 436 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 437 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 438 // CHECK3: omp.inner.for.end: 439 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 440 // CHECK3: omp.loop.exit: 441 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]]) 442 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 443 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 444 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 445 // CHECK3: .omp.final.then: 446 // CHECK3-NEXT: store i32 2, ptr [[I]], align 4 447 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 448 // CHECK3: .omp.final.done: 449 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 450 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 451 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 452 // CHECK3: .omp.lastprivate.then: 453 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[G2]], align 8 454 // CHECK3-NEXT: store volatile double [[TMP22]], ptr [[TMP0]], align 8 455 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP4]], align 4 456 // CHECK3-NEXT: [[TMP24:%.*]] = load double, ptr [[TMP23]], align 4 457 // CHECK3-NEXT: store volatile double [[TMP24]], ptr [[TMP2]], align 4 458 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[SVAR5]], align 4 459 // CHECK3-NEXT: store i32 [[TMP25]], ptr [[SVAR_ADDR]], align 4 460 // CHECK3-NEXT: [[TMP26:%.*]] = load float, ptr [[SFVAR6]], align 4 461 // CHECK3-NEXT: store float [[TMP26]], ptr [[SFVAR_ADDR]], align 4 462 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 463 // CHECK3: .omp.lastprivate.done: 464 // CHECK3-NEXT: ret void 465 // 466 // 467 // CHECK5-LABEL: define {{[^@]+}}@main 468 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 469 // CHECK5-NEXT: entry: 470 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 471 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 472 // CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8 473 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 474 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 475 // CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8 476 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 477 // CHECK5-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 478 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 479 // CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8 480 // CHECK5-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8 481 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 482 // CHECK5-NEXT: ret i32 0 483 // 484 // 485 // CHECK7-LABEL: define {{[^@]+}}@main 486 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 487 // CHECK7-NEXT: entry: 488 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 489 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 490 // CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4 491 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 492 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4 493 // CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4 494 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 495 // CHECK7-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 496 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 497 // CHECK7-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4 498 // CHECK7-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4 499 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 500 // CHECK7-NEXT: ret i32 0 501 // 502 // 503 // CHECK9-LABEL: define {{[^@]+}}@main 504 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 505 // CHECK9-NEXT: entry: 506 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 507 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 508 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8 509 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 510 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 511 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 512 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 513 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 514 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 515 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 516 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 517 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 518 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 519 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 520 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 521 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 522 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 523 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 524 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8 525 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 526 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 527 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 528 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 529 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 530 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 531 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 532 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 533 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 534 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 535 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 536 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 537 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 538 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 539 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 540 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 541 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 542 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 8 543 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 544 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 8 545 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 546 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8 547 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 548 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8 549 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 550 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP10]], align 8 551 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 552 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 553 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 554 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8 555 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 556 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8 557 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 558 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 559 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 560 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 8 561 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 562 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 8 563 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 564 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 565 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 566 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP18]], align 8 567 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 568 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP19]], align 8 569 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 570 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 571 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 572 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 573 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 574 // CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4 575 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 576 // CHECK9-NEXT: store i32 5, ptr [[TMP24]], align 4 577 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 578 // CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 8 579 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 580 // CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 8 581 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 582 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 8 583 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 584 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 585 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 586 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 587 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 588 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8 589 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 590 // CHECK9-NEXT: store i64 2, ptr [[TMP31]], align 8 591 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 592 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8 593 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 594 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 595 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 596 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4 597 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 598 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4 599 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]]) 600 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 601 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 602 // CHECK9: omp_offload.failed: 603 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]] 604 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 605 // CHECK9: omp_offload.cont: 606 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 607 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 608 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 609 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 610 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 611 // CHECK9: arraydestroy.body: 612 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 613 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 614 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 615 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 616 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 617 // CHECK9: arraydestroy.done2: 618 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 619 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4 620 // CHECK9-NEXT: ret i32 [[TMP39]] 621 // 622 // 623 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 624 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 625 // CHECK9-NEXT: entry: 626 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 627 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 628 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 629 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 630 // CHECK9-NEXT: ret void 631 // 632 // 633 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 634 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 635 // CHECK9-NEXT: entry: 636 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 637 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 638 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 639 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 640 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 641 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 642 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 643 // CHECK9-NEXT: ret void 644 // 645 // 646 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 647 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 648 // CHECK9-NEXT: entry: 649 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 650 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 651 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 652 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 653 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 654 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 655 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 656 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 657 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 658 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 659 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 660 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 661 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 662 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 663 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 664 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 665 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 666 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 667 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 668 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 669 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 670 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 671 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4 672 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 673 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i64 [[TMP7]]) 674 // CHECK9-NEXT: ret void 675 // 676 // 677 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 678 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { 679 // CHECK9-NEXT: entry: 680 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 681 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 682 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 683 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 684 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 685 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 686 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 687 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 688 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 689 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 690 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 691 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 692 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 693 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 694 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 695 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 696 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 697 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 698 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 699 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 700 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 701 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 702 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 703 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 704 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 705 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 706 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 707 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 708 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 709 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 710 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 711 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 712 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 713 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 714 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 715 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 716 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 717 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 718 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 719 // CHECK9: arrayctor.loop: 720 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 721 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 722 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 723 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 724 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 725 // CHECK9: arrayctor.cont: 726 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 727 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 728 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 729 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 730 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 731 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 732 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 733 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 734 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 735 // CHECK9: cond.true: 736 // CHECK9-NEXT: br label [[COND_END:%.*]] 737 // CHECK9: cond.false: 738 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 739 // CHECK9-NEXT: br label [[COND_END]] 740 // CHECK9: cond.end: 741 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 742 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 743 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 744 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 745 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 746 // CHECK9: omp.inner.for.cond: 747 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 748 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 749 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 750 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 751 // CHECK9: omp.inner.for.cond.cleanup: 752 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 753 // CHECK9: omp.inner.for.body: 754 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 755 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 756 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 757 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 758 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP5]] 759 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 760 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 761 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 762 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]] 763 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP5]] 764 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 765 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP15]] to i64 766 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 767 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group [[ACC_GRP5]] 768 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 769 // CHECK9: omp.body.continue: 770 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 771 // CHECK9: omp.inner.for.inc: 772 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 773 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1 774 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 775 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 776 // CHECK9: omp.inner.for.end: 777 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 778 // CHECK9: omp.loop.exit: 779 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 780 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 781 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 782 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 783 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 784 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 785 // CHECK9: .omp.final.then: 786 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 787 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 788 // CHECK9: .omp.final.done: 789 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 790 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 791 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 792 // CHECK9: .omp.lastprivate.then: 793 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 4 794 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 4 795 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false) 796 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0 797 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2 798 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]] 799 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 800 // CHECK9: omp.arraycpy.body: 801 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 802 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 803 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 804 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 805 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 806 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]] 807 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 808 // CHECK9: omp.arraycpy.done13: 809 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 8 810 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i64 4, i1 false) 811 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[SVAR7]], align 4 812 // CHECK9-NEXT: store i32 [[TMP26]], ptr [[SVAR_ADDR]], align 4 813 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 814 // CHECK9: .omp.lastprivate.done: 815 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 816 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 817 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2 818 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 819 // CHECK9: arraydestroy.body: 820 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 821 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 822 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 823 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 824 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 825 // CHECK9: arraydestroy.done15: 826 // CHECK9-NEXT: ret void 827 // 828 // 829 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 830 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 831 // CHECK9-NEXT: entry: 832 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 833 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 834 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 835 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 836 // CHECK9-NEXT: ret void 837 // 838 // 839 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 840 // CHECK9-SAME: () #[[ATTR1]] comdat { 841 // CHECK9-NEXT: entry: 842 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 843 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 844 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 845 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 846 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 847 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 848 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 849 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 850 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 851 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 852 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 853 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 854 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 855 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 856 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 857 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 858 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 859 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 860 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 861 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 862 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 863 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 864 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 865 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 866 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 867 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 868 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 869 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 8 870 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 871 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 8 872 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 873 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 874 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 875 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8 876 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 877 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 878 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 879 // CHECK9-NEXT: store ptr null, ptr [[TMP9]], align 8 880 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 881 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 8 882 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 883 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 8 884 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 885 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 886 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 887 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8 888 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 889 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8 890 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 891 // CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8 892 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 893 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 894 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 895 // CHECK9-NEXT: store i32 3, ptr [[TMP18]], align 4 896 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 897 // CHECK9-NEXT: store i32 4, ptr [[TMP19]], align 4 898 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 899 // CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8 900 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 901 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8 902 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 903 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 8 904 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 905 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8 906 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 907 // CHECK9-NEXT: store ptr null, ptr [[TMP24]], align 8 908 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 909 // CHECK9-NEXT: store ptr null, ptr [[TMP25]], align 8 910 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 911 // CHECK9-NEXT: store i64 2, ptr [[TMP26]], align 8 912 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 913 // CHECK9-NEXT: store i64 0, ptr [[TMP27]], align 8 914 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 915 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4 916 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 917 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4 918 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 919 // CHECK9-NEXT: store i32 0, ptr [[TMP30]], align 4 920 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 921 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 922 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 923 // CHECK9: omp_offload.failed: 924 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 925 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 926 // CHECK9: omp_offload.cont: 927 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 928 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 929 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 930 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 931 // CHECK9: arraydestroy.body: 932 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 933 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 934 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 935 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 936 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 937 // CHECK9: arraydestroy.done2: 938 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 939 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4 940 // CHECK9-NEXT: ret i32 [[TMP34]] 941 // 942 // 943 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 944 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 945 // CHECK9-NEXT: entry: 946 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 947 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 948 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 949 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 950 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 951 // CHECK9-NEXT: ret void 952 // 953 // 954 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 955 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 956 // CHECK9-NEXT: entry: 957 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 958 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 959 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 960 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 961 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 962 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 963 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 964 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 965 // CHECK9-NEXT: ret void 966 // 967 // 968 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 969 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 970 // CHECK9-NEXT: entry: 971 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 972 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 973 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 974 // CHECK9-NEXT: ret void 975 // 976 // 977 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 978 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 979 // CHECK9-NEXT: entry: 980 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 981 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 982 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 983 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 984 // CHECK9-NEXT: ret void 985 // 986 // 987 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 988 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 989 // CHECK9-NEXT: entry: 990 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 991 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 992 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 993 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 994 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 995 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 996 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 997 // CHECK9-NEXT: ret void 998 // 999 // 1000 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1001 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1002 // CHECK9-NEXT: entry: 1003 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 1004 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1005 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 1006 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 1007 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1008 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 1009 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 1010 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 1011 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 1012 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 1013 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 1014 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 1015 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 1016 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 1017 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 1018 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 1019 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 1020 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 1021 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]]) 1022 // CHECK9-NEXT: ret void 1023 // 1024 // 1025 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1026 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1027 // CHECK9-NEXT: entry: 1028 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1029 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1030 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 1031 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 1032 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 1033 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 1034 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1035 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1036 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1037 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1038 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1039 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1040 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1041 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1042 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1043 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1044 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1045 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 1046 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1047 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1048 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1049 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 1050 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 1051 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 1052 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 1053 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 1054 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 1055 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 1056 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 1057 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1058 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1059 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1060 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1061 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1062 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1063 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1064 // CHECK9: arrayctor.loop: 1065 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1066 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1067 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 1068 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1069 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1070 // CHECK9: arrayctor.cont: 1071 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 1072 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1073 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 1074 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1075 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1076 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1077 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1078 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1079 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1080 // CHECK9: cond.true: 1081 // CHECK9-NEXT: br label [[COND_END:%.*]] 1082 // CHECK9: cond.false: 1083 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1084 // CHECK9-NEXT: br label [[COND_END]] 1085 // CHECK9: cond.end: 1086 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1087 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1088 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1089 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1090 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1091 // CHECK9: omp.inner.for.cond: 1092 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 1093 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 1094 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1095 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1096 // CHECK9: omp.inner.for.cond.cleanup: 1097 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1098 // CHECK9: omp.inner.for.body: 1099 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1100 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1101 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1102 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1103 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP11]] 1104 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1105 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1106 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 1107 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]] 1108 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP11]] 1109 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 1110 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 1111 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1112 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group [[ACC_GRP11]] 1113 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1114 // CHECK9: omp.body.continue: 1115 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1116 // CHECK9: omp.inner.for.inc: 1117 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1118 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 1119 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 1120 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1121 // CHECK9: omp.inner.for.end: 1122 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1123 // CHECK9: omp.loop.exit: 1124 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1125 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 1126 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 1127 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1128 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1129 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1130 // CHECK9: .omp.final.then: 1131 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 1132 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1133 // CHECK9: .omp.final.done: 1134 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1135 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1136 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1137 // CHECK9: .omp.lastprivate.then: 1138 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 4 1139 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 4 1140 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false) 1141 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 0 1142 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2 1143 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]] 1144 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1145 // CHECK9: omp.arraycpy.body: 1146 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1147 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1148 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 1149 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1150 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1151 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]] 1152 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1153 // CHECK9: omp.arraycpy.done12: 1154 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 8 1155 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i64 4, i1 false) 1156 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1157 // CHECK9: .omp.lastprivate.done: 1158 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1159 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1160 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2 1161 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1162 // CHECK9: arraydestroy.body: 1163 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1164 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1165 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1166 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1167 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1168 // CHECK9: arraydestroy.done14: 1169 // CHECK9-NEXT: ret void 1170 // 1171 // 1172 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1173 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1174 // CHECK9-NEXT: entry: 1175 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1176 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1177 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1178 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1179 // CHECK9-NEXT: ret void 1180 // 1181 // 1182 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1183 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1184 // CHECK9-NEXT: entry: 1185 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1186 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1187 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1188 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1189 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 1190 // CHECK9-NEXT: ret void 1191 // 1192 // 1193 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1194 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1195 // CHECK9-NEXT: entry: 1196 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1197 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1198 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1199 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1200 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1201 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1202 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1203 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1204 // CHECK9-NEXT: ret void 1205 // 1206 // 1207 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1208 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1209 // CHECK9-NEXT: entry: 1210 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1211 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1212 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1213 // CHECK9-NEXT: ret void 1214 // 1215 // 1216 // CHECK11-LABEL: define {{[^@]+}}@main 1217 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1218 // CHECK11-NEXT: entry: 1219 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1220 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1221 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4 1222 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1223 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1224 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1225 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1226 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1227 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1228 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1229 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1230 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 1231 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 1232 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 1233 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1234 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1235 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1236 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1237 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4 1238 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1239 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1240 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1241 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1242 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1243 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1244 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1245 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1246 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1247 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1248 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1249 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1250 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1251 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 1252 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 1253 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 1254 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1255 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 4 1256 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1257 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 4 1258 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1259 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4 1260 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1261 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4 1262 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1263 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP10]], align 4 1264 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1265 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1266 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1267 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 4 1268 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1269 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 4 1270 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1271 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4 1272 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1273 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 4 1274 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1275 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 4 1276 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1277 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4 1278 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1279 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 4 1280 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1281 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 4 1282 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1283 // CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 4 1284 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1285 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1286 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1287 // CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 4 1288 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1289 // CHECK11-NEXT: store i32 5, ptr [[TMP24]], align 4 1290 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1291 // CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 4 1292 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1293 // CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 4 1294 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1295 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 4 1296 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1297 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 1298 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1299 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 1300 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1301 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4 1302 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1303 // CHECK11-NEXT: store i64 2, ptr [[TMP31]], align 8 1304 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1305 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8 1306 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1307 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 1308 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1309 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4 1310 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1311 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4 1312 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]]) 1313 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1314 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1315 // CHECK11: omp_offload.failed: 1316 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]] 1317 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1318 // CHECK11: omp_offload.cont: 1319 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1320 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1321 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1322 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1323 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1324 // CHECK11: arraydestroy.body: 1325 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1326 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1327 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1328 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1329 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1330 // CHECK11: arraydestroy.done2: 1331 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1332 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4 1333 // CHECK11-NEXT: ret i32 [[TMP39]] 1334 // 1335 // 1336 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1337 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1338 // CHECK11-NEXT: entry: 1339 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1340 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1341 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1342 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1343 // CHECK11-NEXT: ret void 1344 // 1345 // 1346 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1347 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1348 // CHECK11-NEXT: entry: 1349 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1350 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1351 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1352 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1353 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1354 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1355 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1356 // CHECK11-NEXT: ret void 1357 // 1358 // 1359 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1360 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1361 // CHECK11-NEXT: entry: 1362 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1363 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1364 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1365 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1366 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1367 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1368 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1369 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1370 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1371 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1372 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1373 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1374 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 1375 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1376 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1377 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1378 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1379 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 1380 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 1381 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1382 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1383 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 1384 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4 1385 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 1386 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i32 [[TMP7]]) 1387 // CHECK11-NEXT: ret void 1388 // 1389 // 1390 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 1391 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { 1392 // CHECK11-NEXT: entry: 1393 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1394 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1395 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1396 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1397 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1398 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1399 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1400 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1401 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1402 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1403 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1404 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1405 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1406 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1407 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1408 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1409 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1410 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1411 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 1412 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1413 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1414 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1415 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1416 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1417 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1418 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1419 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1420 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 1421 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1422 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1423 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1424 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1425 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1426 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1427 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1428 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1429 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1430 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1431 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1432 // CHECK11: arrayctor.loop: 1433 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1434 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1435 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1436 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1437 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1438 // CHECK11: arrayctor.cont: 1439 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1440 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1441 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 1442 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1443 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1444 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1445 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1446 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1447 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1448 // CHECK11: cond.true: 1449 // CHECK11-NEXT: br label [[COND_END:%.*]] 1450 // CHECK11: cond.false: 1451 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1452 // CHECK11-NEXT: br label [[COND_END]] 1453 // CHECK11: cond.end: 1454 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1455 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1456 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1457 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1458 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1459 // CHECK11: omp.inner.for.cond: 1460 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1461 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 1462 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1463 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1464 // CHECK11: omp.inner.for.cond.cleanup: 1465 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1466 // CHECK11: omp.inner.for.body: 1467 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1468 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1469 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1470 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 1471 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP6]] 1472 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 1473 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]] 1474 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 1475 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP6]] 1476 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 1477 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP15]] 1478 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group [[ACC_GRP6]] 1479 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1480 // CHECK11: omp.body.continue: 1481 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1482 // CHECK11: omp.inner.for.inc: 1483 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1484 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 1485 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1487 // CHECK11: omp.inner.for.end: 1488 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1489 // CHECK11: omp.loop.exit: 1490 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1491 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 1492 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 1493 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1494 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1495 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1496 // CHECK11: .omp.final.then: 1497 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1498 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1499 // CHECK11: .omp.final.done: 1500 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1501 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1502 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1503 // CHECK11: .omp.lastprivate.then: 1504 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 4 1505 // CHECK11-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 4 1506 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false) 1507 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0 1508 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2 1509 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]] 1510 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1511 // CHECK11: omp.arraycpy.body: 1512 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1513 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1514 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1515 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1516 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1517 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]] 1518 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1519 // CHECK11: omp.arraycpy.done12: 1520 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 4 1521 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i32 4, i1 false) 1522 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[SVAR7]], align 4 1523 // CHECK11-NEXT: store i32 [[TMP26]], ptr [[SVAR_ADDR]], align 4 1524 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1525 // CHECK11: .omp.lastprivate.done: 1526 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1527 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1528 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2 1529 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1530 // CHECK11: arraydestroy.body: 1531 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1532 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1533 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1534 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1535 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1536 // CHECK11: arraydestroy.done14: 1537 // CHECK11-NEXT: ret void 1538 // 1539 // 1540 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1541 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1542 // CHECK11-NEXT: entry: 1543 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1544 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1545 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1546 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1547 // CHECK11-NEXT: ret void 1548 // 1549 // 1550 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1551 // CHECK11-SAME: () #[[ATTR1]] comdat { 1552 // CHECK11-NEXT: entry: 1553 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1554 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1555 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1556 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1557 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1558 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1559 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1560 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1561 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 1562 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 1563 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 1564 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1565 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1566 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1567 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1568 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1569 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1570 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1571 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1572 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1573 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1574 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1575 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1576 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1577 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1578 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1579 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1580 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 4 1581 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1582 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 4 1583 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1584 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1585 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1586 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4 1587 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1588 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 1589 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1590 // CHECK11-NEXT: store ptr null, ptr [[TMP9]], align 4 1591 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1592 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 4 1593 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1594 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 4 1595 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1596 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1597 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1598 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 4 1599 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1600 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 4 1601 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1602 // CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 4 1603 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1604 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1605 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1606 // CHECK11-NEXT: store i32 3, ptr [[TMP18]], align 4 1607 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1608 // CHECK11-NEXT: store i32 4, ptr [[TMP19]], align 4 1609 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1610 // CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 4 1611 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1612 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 4 1613 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1614 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 4 1615 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1616 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 4 1617 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1618 // CHECK11-NEXT: store ptr null, ptr [[TMP24]], align 4 1619 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1620 // CHECK11-NEXT: store ptr null, ptr [[TMP25]], align 4 1621 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1622 // CHECK11-NEXT: store i64 2, ptr [[TMP26]], align 8 1623 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1624 // CHECK11-NEXT: store i64 0, ptr [[TMP27]], align 8 1625 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1626 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4 1627 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1628 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4 1629 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1630 // CHECK11-NEXT: store i32 0, ptr [[TMP30]], align 4 1631 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 1632 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1633 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1634 // CHECK11: omp_offload.failed: 1635 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 1636 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1637 // CHECK11: omp_offload.cont: 1638 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1639 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1640 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1641 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1642 // CHECK11: arraydestroy.body: 1643 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1644 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1645 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1646 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1647 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1648 // CHECK11: arraydestroy.done2: 1649 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1650 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4 1651 // CHECK11-NEXT: ret i32 [[TMP34]] 1652 // 1653 // 1654 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1655 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1656 // CHECK11-NEXT: entry: 1657 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1658 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1659 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1660 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1661 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1662 // CHECK11-NEXT: ret void 1663 // 1664 // 1665 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1666 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1667 // CHECK11-NEXT: entry: 1668 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1669 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1670 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1671 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1672 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1673 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1674 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1675 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1676 // CHECK11-NEXT: ret void 1677 // 1678 // 1679 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1680 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1681 // CHECK11-NEXT: entry: 1682 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1683 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1684 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1685 // CHECK11-NEXT: ret void 1686 // 1687 // 1688 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1689 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1690 // CHECK11-NEXT: entry: 1691 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1692 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1693 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1694 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1695 // CHECK11-NEXT: ret void 1696 // 1697 // 1698 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1699 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1700 // CHECK11-NEXT: entry: 1701 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1702 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1703 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1704 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1705 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1706 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1707 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1708 // CHECK11-NEXT: ret void 1709 // 1710 // 1711 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1712 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1713 // CHECK11-NEXT: entry: 1714 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1715 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1716 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1717 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1718 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1719 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1720 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1721 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1722 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1723 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1724 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1725 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1726 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1727 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1728 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 1729 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 1730 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1731 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1732 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]]) 1733 // CHECK11-NEXT: ret void 1734 // 1735 // 1736 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1737 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1738 // CHECK11-NEXT: entry: 1739 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1740 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1741 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1742 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1743 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1744 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1745 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1746 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1747 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1748 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1749 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1750 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1751 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1752 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1753 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1754 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1755 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1756 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 1757 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1758 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1759 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1760 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1761 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1762 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1763 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1764 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1765 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1766 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1767 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1768 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1769 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1770 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1771 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1772 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1773 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1774 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1775 // CHECK11: arrayctor.loop: 1776 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1777 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1778 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1779 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1780 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1781 // CHECK11: arrayctor.cont: 1782 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1783 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1784 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 1785 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1786 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1787 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1788 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1789 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1790 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1791 // CHECK11: cond.true: 1792 // CHECK11-NEXT: br label [[COND_END:%.*]] 1793 // CHECK11: cond.false: 1794 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1795 // CHECK11-NEXT: br label [[COND_END]] 1796 // CHECK11: cond.end: 1797 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1798 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1799 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1800 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1801 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1802 // CHECK11: omp.inner.for.cond: 1803 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 1804 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 1805 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1806 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1807 // CHECK11: omp.inner.for.cond.cleanup: 1808 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1809 // CHECK11: omp.inner.for.body: 1810 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 1811 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1812 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1813 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 1814 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP12]] 1815 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 1816 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]] 1817 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 1818 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP12]] 1819 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 1820 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP15]] 1821 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group [[ACC_GRP12]] 1822 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1823 // CHECK11: omp.body.continue: 1824 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1825 // CHECK11: omp.inner.for.inc: 1826 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 1827 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1 1828 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 1829 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 1830 // CHECK11: omp.inner.for.end: 1831 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1832 // CHECK11: omp.loop.exit: 1833 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1834 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 1835 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 1836 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1837 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1838 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1839 // CHECK11: .omp.final.then: 1840 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1841 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1842 // CHECK11: .omp.final.done: 1843 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1844 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 1845 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1846 // CHECK11: .omp.lastprivate.then: 1847 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 4 1848 // CHECK11-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 4 1849 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false) 1850 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 0 1851 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2 1852 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP24]] 1853 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1854 // CHECK11: omp.arraycpy.body: 1855 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1856 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1857 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1858 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1859 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1860 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]] 1861 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 1862 // CHECK11: omp.arraycpy.done11: 1863 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 4 1864 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i32 4, i1 false) 1865 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1866 // CHECK11: .omp.lastprivate.done: 1867 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1868 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1869 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2 1870 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1871 // CHECK11: arraydestroy.body: 1872 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1873 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1874 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1875 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 1876 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 1877 // CHECK11: arraydestroy.done13: 1878 // CHECK11-NEXT: ret void 1879 // 1880 // 1881 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1882 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1883 // CHECK11-NEXT: entry: 1884 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1885 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1886 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1887 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1888 // CHECK11-NEXT: ret void 1889 // 1890 // 1891 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1892 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1893 // CHECK11-NEXT: entry: 1894 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1895 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1896 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1897 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1898 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1899 // CHECK11-NEXT: ret void 1900 // 1901 // 1902 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1903 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1904 // CHECK11-NEXT: entry: 1905 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1906 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1907 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1908 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1909 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1910 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1911 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1912 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1913 // CHECK11-NEXT: ret void 1914 // 1915 // 1916 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1917 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1918 // CHECK11-NEXT: entry: 1919 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1920 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1921 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1922 // CHECK11-NEXT: ret void 1923 // 1924 // 1925 // CHECK13-LABEL: define {{[^@]+}}@main 1926 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 1927 // CHECK13-NEXT: entry: 1928 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1929 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 1930 // CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 8 1931 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1932 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1933 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1934 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1935 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 1936 // CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 8 1937 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1938 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1939 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1940 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1941 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 1942 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1943 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1944 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1945 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 1946 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 1947 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1948 // CHECK13-NEXT: [[I14:%.*]] = alloca i32, align 4 1949 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 1950 // CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 8 1951 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1952 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 1953 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 1954 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1955 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 1956 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1957 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 1958 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 1959 // CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 1960 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8 1961 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 8 1962 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1963 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1964 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1965 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 1966 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1967 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 1968 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1969 // CHECK13: arrayctor.loop: 1970 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1971 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1972 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 1973 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1974 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1975 // CHECK13: arrayctor.cont: 1976 // CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 1977 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1978 // CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 1979 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1980 // CHECK13: omp.inner.for.cond: 1981 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 1982 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 1983 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1984 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1985 // CHECK13: omp.inner.for.cond.cleanup: 1986 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1987 // CHECK13: omp.inner.for.body: 1988 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1989 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1990 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1991 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1992 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]] 1993 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1994 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1995 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 1996 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 1997 // CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP2]] 1998 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1999 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP11]] to i64 2000 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 2001 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]] 2002 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2003 // CHECK13: omp.body.continue: 2004 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2005 // CHECK13: omp.inner.for.inc: 2006 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 2007 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 1 2008 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 2009 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2010 // CHECK13: omp.inner.for.end: 2011 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 2012 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4 2013 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2014 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i64 8, i1 false) 2015 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2016 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 2 2017 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]] 2018 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2019 // CHECK13: omp.arraycpy.body: 2020 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2021 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2022 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 2023 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2024 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2025 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2026 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2027 // CHECK13: omp.arraycpy.done11: 2028 // CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 8 2029 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false) 2030 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 4 2031 // CHECK13-NEXT: store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 4 2032 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]] 2033 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2034 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2 2035 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2036 // CHECK13: arraydestroy.body: 2037 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2038 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2039 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2040 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2041 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2042 // CHECK13: arraydestroy.done13: 2043 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 2044 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2045 // CHECK13-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2046 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2 2047 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]] 2048 // CHECK13: arraydestroy.body16: 2049 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ] 2050 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1 2051 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]] 2052 // CHECK13-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]] 2053 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]] 2054 // CHECK13: arraydestroy.done20: 2055 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2056 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4 2057 // CHECK13-NEXT: ret i32 [[TMP19]] 2058 // 2059 // 2060 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2061 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 2062 // CHECK13-NEXT: entry: 2063 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2064 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2065 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2066 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2067 // CHECK13-NEXT: ret void 2068 // 2069 // 2070 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2071 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2072 // CHECK13-NEXT: entry: 2073 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2074 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2075 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2076 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2077 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2078 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2079 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2080 // CHECK13-NEXT: ret void 2081 // 2082 // 2083 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2084 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2085 // CHECK13-NEXT: entry: 2086 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2087 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2088 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2089 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2090 // CHECK13-NEXT: ret void 2091 // 2092 // 2093 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2094 // CHECK13-SAME: () #[[ATTR1]] comdat { 2095 // CHECK13-NEXT: entry: 2096 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2097 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2098 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2099 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2100 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2101 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 2102 // CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 8 2103 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2104 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2105 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2106 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2107 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2108 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2109 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2110 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2111 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 2112 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 2113 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2114 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 2115 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 2116 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 2117 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 2118 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 2119 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 2120 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 2121 // CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 2122 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8 2123 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 8 2124 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2125 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2126 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2127 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 2128 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2129 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 2130 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2131 // CHECK13: arrayctor.loop: 2132 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2133 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2134 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 2135 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2136 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2137 // CHECK13: arrayctor.cont: 2138 // CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 2139 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2140 // CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 2141 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2142 // CHECK13: omp.inner.for.cond: 2143 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 2144 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 2145 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2146 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2147 // CHECK13: omp.inner.for.cond.cleanup: 2148 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2149 // CHECK13: omp.inner.for.body: 2150 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2151 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2152 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2153 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2154 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP6]] 2155 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2156 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2157 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 2158 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 2159 // CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP6]] 2160 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2161 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP11]] to i64 2162 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 2163 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]] 2164 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2165 // CHECK13: omp.body.continue: 2166 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2167 // CHECK13: omp.inner.for.inc: 2168 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2169 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 1 2170 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2171 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2172 // CHECK13: omp.inner.for.end: 2173 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 2174 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4 2175 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2176 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i64 8, i1 false) 2177 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2178 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2 2179 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]] 2180 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2181 // CHECK13: omp.arraycpy.body: 2182 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2183 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2184 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 2185 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2186 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2187 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2188 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 2189 // CHECK13: omp.arraycpy.done11: 2190 // CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 8 2191 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false) 2192 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]] 2193 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2194 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2 2195 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2196 // CHECK13: arraydestroy.body: 2197 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2198 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2199 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2200 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 2201 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 2202 // CHECK13: arraydestroy.done13: 2203 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 2204 // CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2205 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2 2206 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 2207 // CHECK13: arraydestroy.body15: 2208 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 2209 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i64 -1 2210 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]] 2211 // CHECK13-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 2212 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 2213 // CHECK13: arraydestroy.done19: 2214 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2215 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 4 2216 // CHECK13-NEXT: ret i32 [[TMP18]] 2217 // 2218 // 2219 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2220 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2221 // CHECK13-NEXT: entry: 2222 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2223 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2224 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2225 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2226 // CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2227 // CHECK13-NEXT: ret void 2228 // 2229 // 2230 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2231 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2232 // CHECK13-NEXT: entry: 2233 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2234 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2235 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2236 // CHECK13-NEXT: ret void 2237 // 2238 // 2239 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2240 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2241 // CHECK13-NEXT: entry: 2242 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2243 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2244 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2245 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2246 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2247 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2248 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2249 // CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 4 2250 // CHECK13-NEXT: ret void 2251 // 2252 // 2253 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2254 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2255 // CHECK13-NEXT: entry: 2256 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2257 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2258 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2259 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2260 // CHECK13-NEXT: ret void 2261 // 2262 // 2263 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2264 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2265 // CHECK13-NEXT: entry: 2266 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2267 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2268 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2269 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2270 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2271 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2272 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2273 // CHECK13-NEXT: ret void 2274 // 2275 // 2276 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2277 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2278 // CHECK13-NEXT: entry: 2279 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2280 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2281 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2282 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2283 // CHECK13-NEXT: ret void 2284 // 2285 // 2286 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2287 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2288 // CHECK13-NEXT: entry: 2289 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2290 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2291 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2292 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2293 // CHECK13-NEXT: store i32 0, ptr [[F]], align 4 2294 // CHECK13-NEXT: ret void 2295 // 2296 // 2297 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2298 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2299 // CHECK13-NEXT: entry: 2300 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2301 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2302 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2303 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2304 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2305 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2306 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2307 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2308 // CHECK13-NEXT: ret void 2309 // 2310 // 2311 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2312 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2313 // CHECK13-NEXT: entry: 2314 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2315 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2316 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2317 // CHECK13-NEXT: ret void 2318 // 2319 // 2320 // CHECK15-LABEL: define {{[^@]+}}@main 2321 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2322 // CHECK15-NEXT: entry: 2323 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2324 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 2325 // CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 4 2326 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2327 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2328 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2329 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2330 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2331 // CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 4 2332 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2333 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2334 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2335 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2336 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2337 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2338 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2339 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2340 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 2341 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 2342 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2343 // CHECK15-NEXT: [[I13:%.*]] = alloca i32, align 4 2344 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2345 // CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 4 2346 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2347 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2348 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 2349 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 2350 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 2351 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2352 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2353 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 2354 // CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 2355 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4 2356 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 4 2357 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2358 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2359 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2360 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 2361 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2362 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 2363 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2364 // CHECK15: arrayctor.loop: 2365 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2366 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2367 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 2368 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2369 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2370 // CHECK15: arrayctor.cont: 2371 // CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 2372 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2373 // CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 2374 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2375 // CHECK15: omp.inner.for.cond: 2376 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 2377 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 2378 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2379 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2380 // CHECK15: omp.inner.for.cond.cleanup: 2381 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2382 // CHECK15: omp.inner.for.body: 2383 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2384 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2385 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2386 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2387 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP3]] 2388 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2389 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP9]] 2390 // CHECK15-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 2391 // CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP3]] 2392 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2393 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP11]] 2394 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]] 2395 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2396 // CHECK15: omp.body.continue: 2397 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2398 // CHECK15: omp.inner.for.inc: 2399 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2400 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 2401 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2402 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2403 // CHECK15: omp.inner.for.end: 2404 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2405 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4 2406 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2407 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i32 8, i1 false) 2408 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2409 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 2 2410 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP14]] 2411 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2412 // CHECK15: omp.arraycpy.body: 2413 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2414 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2415 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 2416 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2417 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2418 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2419 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 2420 // CHECK15: omp.arraycpy.done10: 2421 // CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 4 2422 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false) 2423 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 4 2424 // CHECK15-NEXT: store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 4 2425 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]] 2426 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2427 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2 2428 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2429 // CHECK15: arraydestroy.body: 2430 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2431 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2432 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2433 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 2434 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 2435 // CHECK15: arraydestroy.done12: 2436 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2437 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2438 // CHECK15-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2439 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i32 2 2440 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]] 2441 // CHECK15: arraydestroy.body15: 2442 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ] 2443 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1 2444 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]] 2445 // CHECK15-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]] 2446 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]] 2447 // CHECK15: arraydestroy.done19: 2448 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2449 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4 2450 // CHECK15-NEXT: ret i32 [[TMP19]] 2451 // 2452 // 2453 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2454 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2455 // CHECK15-NEXT: entry: 2456 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2457 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2458 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2459 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2460 // CHECK15-NEXT: ret void 2461 // 2462 // 2463 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2464 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2465 // CHECK15-NEXT: entry: 2466 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2467 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2468 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2469 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2470 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2471 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2472 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2473 // CHECK15-NEXT: ret void 2474 // 2475 // 2476 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2477 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2478 // CHECK15-NEXT: entry: 2479 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2480 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2481 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2482 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2483 // CHECK15-NEXT: ret void 2484 // 2485 // 2486 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2487 // CHECK15-SAME: () #[[ATTR1]] comdat { 2488 // CHECK15-NEXT: entry: 2489 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2490 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2491 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2492 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2493 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2494 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2495 // CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 4 2496 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2497 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2498 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2499 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2500 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2501 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2502 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2503 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2504 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 2505 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 2506 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2507 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2508 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 2509 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 2510 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 2511 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2512 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2513 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 2514 // CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 2515 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4 2516 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 4 2517 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2518 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2519 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2520 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 2521 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2522 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 2523 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2524 // CHECK15: arrayctor.loop: 2525 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2526 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2527 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 2528 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2529 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2530 // CHECK15: arrayctor.cont: 2531 // CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 2532 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2533 // CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 2534 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2535 // CHECK15: omp.inner.for.cond: 2536 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 2537 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 2538 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2539 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2540 // CHECK15: omp.inner.for.cond.cleanup: 2541 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2542 // CHECK15: omp.inner.for.body: 2543 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2544 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 2545 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2546 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2547 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP7]] 2548 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2549 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP9]] 2550 // CHECK15-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]] 2551 // CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP7]] 2552 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2553 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP11]] 2554 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]] 2555 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2556 // CHECK15: omp.body.continue: 2557 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2558 // CHECK15: omp.inner.for.inc: 2559 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2560 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 1 2561 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2562 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2563 // CHECK15: omp.inner.for.end: 2564 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2565 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 4 2566 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 4 2567 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i32 8, i1 false) 2568 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2569 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2 2570 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP14]] 2571 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 2572 // CHECK15: omp.arraycpy.body: 2573 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2574 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 2575 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 2576 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 2577 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 2578 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 2579 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]] 2580 // CHECK15: omp.arraycpy.done10: 2581 // CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 4 2582 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false) 2583 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]] 2584 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2585 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2 2586 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2587 // CHECK15: arraydestroy.body: 2588 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2589 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2590 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2591 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]] 2592 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]] 2593 // CHECK15: arraydestroy.done12: 2594 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2595 // CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2596 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 2 2597 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY14:%.*]] 2598 // CHECK15: arraydestroy.body14: 2599 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST15:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT16:%.*]], [[ARRAYDESTROY_BODY14]] ] 2600 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT16]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST15]], i32 -1 2601 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT16]]) #[[ATTR3]] 2602 // CHECK15-NEXT: [[ARRAYDESTROY_DONE17:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT16]], [[ARRAY_BEGIN13]] 2603 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE17]], label [[ARRAYDESTROY_DONE18:%.*]], label [[ARRAYDESTROY_BODY14]] 2604 // CHECK15: arraydestroy.done18: 2605 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2606 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 4 2607 // CHECK15-NEXT: ret i32 [[TMP18]] 2608 // 2609 // 2610 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2611 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2612 // CHECK15-NEXT: entry: 2613 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2614 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2615 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2616 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2617 // CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2618 // CHECK15-NEXT: ret void 2619 // 2620 // 2621 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2622 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2623 // CHECK15-NEXT: entry: 2624 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2625 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2626 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2627 // CHECK15-NEXT: ret void 2628 // 2629 // 2630 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2631 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2632 // CHECK15-NEXT: entry: 2633 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2634 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2635 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2636 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2637 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2638 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2639 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2640 // CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 4 2641 // CHECK15-NEXT: ret void 2642 // 2643 // 2644 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2645 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2646 // CHECK15-NEXT: entry: 2647 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2648 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2649 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2650 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2651 // CHECK15-NEXT: ret void 2652 // 2653 // 2654 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2655 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2656 // CHECK15-NEXT: entry: 2657 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2658 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2659 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2660 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2661 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2662 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2663 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2664 // CHECK15-NEXT: ret void 2665 // 2666 // 2667 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2668 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2669 // CHECK15-NEXT: entry: 2670 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2671 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2672 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2673 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2674 // CHECK15-NEXT: ret void 2675 // 2676 // 2677 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2678 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2679 // CHECK15-NEXT: entry: 2680 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2681 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2682 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2683 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2684 // CHECK15-NEXT: store i32 0, ptr [[F]], align 4 2685 // CHECK15-NEXT: ret void 2686 // 2687 // 2688 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2689 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2690 // CHECK15-NEXT: entry: 2691 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2692 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2693 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2694 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2695 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2696 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2697 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2698 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2699 // CHECK15-NEXT: ret void 2700 // 2701 // 2702 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2703 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2704 // CHECK15-NEXT: entry: 2705 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2706 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2707 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2708 // CHECK15-NEXT: ret void 2709 // 2710