1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target teams distribute simd 29 for(int i = 0; i < X; i++) { 30 a[i] = (T)0; 31 } 32 #pragma omp target teams distribute simd dist_schedule(static) 33 for(int i = 0; i < X; i++) { 34 a[i] = (T)0; 35 } 36 #pragma omp target teams distribute simd dist_schedule(static, X/2) 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 41 42 43 44 45 46 return a[0]; 47 } 48 }; 49 50 int teams_template_struct(void) { 51 SS<int, 123, 456> V; 52 return V.foo(); 53 54 } 55 #endif // CK1 56 57 // Test host codegen. 58 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 61 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 62 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 64 65 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 68 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 69 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 71 #ifdef CK2 72 73 template <typename T, int n> 74 int tmain(T argc) { 75 T a[n]; 76 #pragma omp target teams distribute simd 77 for(int i = 0; i < n; i++) { 78 a[i] = (T)0; 79 } 80 #pragma omp target teams distribute simd dist_schedule(static) 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target teams distribute simd dist_schedule(static, n) 85 for(int i = 0; i < n; i++) { 86 a[i] = (T)0; 87 } 88 return 0; 89 } 90 91 int main (int argc, char **argv) { 92 int n = 100; 93 int a[n]; 94 #pragma omp target teams distribute simd 95 for(int i = 0; i < n; i++) { 96 a[i] = 0; 97 } 98 #pragma omp target teams distribute simd dist_schedule(static) 99 for(int i = 0; i < n; i++) { 100 a[i] = 0; 101 } 102 #pragma omp target teams distribute simd dist_schedule(static, n) 103 for(int i = 0; i < n; i++) { 104 a[i] = 0; 105 } 106 return tmain<int, 10>(argc); 107 } 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 #endif // CK2 124 #endif // #ifndef HEADER 125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 127 // CHECK1-NEXT: entry: 128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 130 // CHECK1-NEXT: ret i32 [[CALL]] 131 // 132 // 133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 134 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 135 // CHECK1-NEXT: entry: 136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 142 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8 143 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8 144 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8 145 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 146 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8 148 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8 149 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8 150 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 151 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 152 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 153 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 154 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 155 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 156 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 157 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 158 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 159 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 160 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 161 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 162 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 163 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 164 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 165 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 166 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 167 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 168 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 169 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 170 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 172 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 173 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 174 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 175 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 176 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 177 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 178 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 179 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 180 // CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8 181 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 182 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 183 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 184 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 185 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 186 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4 187 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 188 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 189 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 190 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 191 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 192 // CHECK1: omp_offload.failed: 193 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 194 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 195 // CHECK1: omp_offload.cont: 196 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 197 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 198 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8 199 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 200 // CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8 201 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 202 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 203 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 204 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 205 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 206 // CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4 207 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 208 // CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4 209 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 210 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 211 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 212 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 213 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 214 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 215 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 216 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 217 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 218 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 219 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 220 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 221 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 222 // CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8 223 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 224 // CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8 225 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 226 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 227 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 228 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4 229 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 230 // CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4 231 // CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, ptr [[KERNEL_ARGS7]]) 232 // CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 233 // CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 234 // CHECK1: omp_offload.failed8: 235 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(ptr [[THIS1]]) #[[ATTR2]] 236 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 237 // CHECK1: omp_offload.cont9: 238 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 239 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 240 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8 241 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 242 // CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8 243 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 244 // CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8 245 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 246 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 247 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 248 // CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4 249 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 250 // CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4 251 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 252 // CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 253 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 254 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 255 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 256 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 257 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 258 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 259 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 260 // CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8 261 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 262 // CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8 263 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 264 // CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8 265 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 266 // CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8 267 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 268 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 269 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 270 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4 271 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 272 // CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4 273 // CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS15]]) 274 // CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 275 // CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 276 // CHECK1: omp_offload.failed16: 277 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2]] 278 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]] 279 // CHECK1: omp_offload.cont17: 280 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 281 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i64 0, i64 0 282 // CHECK1-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 283 // CHECK1-NEXT: ret i32 [[TMP60]] 284 // 285 // 286 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 287 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 288 // CHECK1-NEXT: entry: 289 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 290 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 291 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 292 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 293 // CHECK1-NEXT: ret void 294 // 295 // 296 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 297 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 298 // CHECK1-NEXT: entry: 299 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 300 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 301 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 302 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 304 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 305 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 306 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 307 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 308 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 310 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 311 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 312 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 313 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 314 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 316 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 317 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 318 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 319 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 320 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 321 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 322 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 323 // CHECK1: cond.true: 324 // CHECK1-NEXT: br label [[COND_END:%.*]] 325 // CHECK1: cond.false: 326 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 327 // CHECK1-NEXT: br label [[COND_END]] 328 // CHECK1: cond.end: 329 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 330 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 331 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 332 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 334 // CHECK1: omp.inner.for.cond: 335 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 336 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 337 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 338 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 339 // CHECK1: omp.inner.for.body: 340 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 341 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 342 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 343 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 344 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 345 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 346 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 347 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 348 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 349 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 350 // CHECK1: omp.body.continue: 351 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 352 // CHECK1: omp.inner.for.inc: 353 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 354 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 355 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 356 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 357 // CHECK1: omp.inner.for.end: 358 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 359 // CHECK1: omp.loop.exit: 360 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 361 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 362 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 363 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 364 // CHECK1: .omp.final.then: 365 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 366 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 367 // CHECK1: .omp.final.done: 368 // CHECK1-NEXT: ret void 369 // 370 // 371 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 372 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 373 // CHECK1-NEXT: entry: 374 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 375 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 376 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 377 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined, ptr [[TMP0]]) 378 // CHECK1-NEXT: ret void 379 // 380 // 381 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined 382 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 383 // CHECK1-NEXT: entry: 384 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 385 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 386 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 387 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 388 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 389 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 390 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 391 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 392 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 393 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 394 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 395 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 396 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 397 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 398 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 399 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 400 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 401 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 402 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 403 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 404 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 405 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 406 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 407 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 408 // CHECK1: cond.true: 409 // CHECK1-NEXT: br label [[COND_END:%.*]] 410 // CHECK1: cond.false: 411 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 412 // CHECK1-NEXT: br label [[COND_END]] 413 // CHECK1: cond.end: 414 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 415 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 416 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 417 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 418 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 419 // CHECK1: omp.inner.for.cond: 420 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 421 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 422 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 423 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 424 // CHECK1: omp.inner.for.body: 425 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 426 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 427 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 428 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 429 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 430 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 431 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 432 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 433 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 434 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 435 // CHECK1: omp.body.continue: 436 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 437 // CHECK1: omp.inner.for.inc: 438 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 439 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 440 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 441 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 442 // CHECK1: omp.inner.for.end: 443 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 444 // CHECK1: omp.loop.exit: 445 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 446 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 447 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 448 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 449 // CHECK1: .omp.final.then: 450 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 451 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 452 // CHECK1: .omp.final.done: 453 // CHECK1-NEXT: ret void 454 // 455 // 456 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 457 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 458 // CHECK1-NEXT: entry: 459 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 460 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 461 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 462 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 463 // CHECK1-NEXT: ret void 464 // 465 // 466 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 467 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 468 // CHECK1-NEXT: entry: 469 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 470 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 471 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 472 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 475 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 476 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 477 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 478 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 479 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 480 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 481 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 482 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 483 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 484 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 485 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 486 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 487 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 488 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 489 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 490 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 491 // CHECK1: omp.dispatch.cond: 492 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 493 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 494 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 495 // CHECK1: cond.true: 496 // CHECK1-NEXT: br label [[COND_END:%.*]] 497 // CHECK1: cond.false: 498 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 499 // CHECK1-NEXT: br label [[COND_END]] 500 // CHECK1: cond.end: 501 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 502 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 503 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 504 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 505 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 506 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 507 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 508 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 509 // CHECK1: omp.dispatch.body: 510 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 511 // CHECK1: omp.inner.for.cond: 512 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 513 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 514 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 515 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 516 // CHECK1: omp.inner.for.body: 517 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 518 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 519 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 520 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 521 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 522 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 523 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 524 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 525 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 526 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 527 // CHECK1: omp.body.continue: 528 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 529 // CHECK1: omp.inner.for.inc: 530 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 531 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 532 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 533 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 534 // CHECK1: omp.inner.for.end: 535 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 536 // CHECK1: omp.dispatch.inc: 537 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 538 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 539 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 540 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 541 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 542 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 543 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 544 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 545 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 546 // CHECK1: omp.dispatch.end: 547 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 548 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 549 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 550 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 551 // CHECK1: .omp.final.then: 552 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 553 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 554 // CHECK1: .omp.final.done: 555 // CHECK1-NEXT: ret void 556 // 557 // 558 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 559 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 560 // CHECK3-NEXT: entry: 561 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 562 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 563 // CHECK3-NEXT: ret i32 [[CALL]] 564 // 565 // 566 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 567 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 568 // CHECK3-NEXT: entry: 569 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 570 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 571 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 572 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 573 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 574 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 575 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4 576 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4 577 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4 578 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 579 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 580 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4 581 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4 582 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4 583 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 584 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 585 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 586 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 587 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 588 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 589 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 590 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 591 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 592 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 593 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 594 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 595 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 596 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 597 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 598 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 599 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 600 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 601 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 602 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 603 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 604 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 605 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 606 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 607 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 608 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 609 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 610 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 611 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 612 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 613 // CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 8 614 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 615 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 616 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 617 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 618 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 619 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4 620 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 621 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 622 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 623 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 624 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 625 // CHECK3: omp_offload.failed: 626 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 627 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 628 // CHECK3: omp_offload.cont: 629 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 630 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 631 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4 632 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 633 // CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4 634 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 635 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4 636 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 637 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 638 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 639 // CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 4 640 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 641 // CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4 642 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 643 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 644 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 645 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 646 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 647 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 648 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 649 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 650 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 651 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 652 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 653 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4 654 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 655 // CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 8 656 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 657 // CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8 658 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 659 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 660 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 661 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4 662 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 663 // CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4 664 // CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, ptr [[KERNEL_ARGS7]]) 665 // CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 666 // CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 667 // CHECK3: omp_offload.failed8: 668 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(ptr [[THIS1]]) #[[ATTR2]] 669 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]] 670 // CHECK3: omp_offload.cont9: 671 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 672 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 673 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4 674 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 675 // CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4 676 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 677 // CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4 678 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 679 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 680 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 681 // CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 4 682 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 683 // CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4 684 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 685 // CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 686 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 687 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 688 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 689 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 690 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 691 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 692 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 693 // CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4 694 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 695 // CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4 696 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 697 // CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 8 698 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 699 // CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8 700 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 701 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 702 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 703 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4 704 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 705 // CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4 706 // CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS15]]) 707 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 708 // CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 709 // CHECK3: omp_offload.failed16: 710 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2]] 711 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 712 // CHECK3: omp_offload.cont17: 713 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 714 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i32 0, i32 0 715 // CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 716 // CHECK3-NEXT: ret i32 [[TMP60]] 717 // 718 // 719 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 720 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 721 // CHECK3-NEXT: entry: 722 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 723 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 724 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 725 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 726 // CHECK3-NEXT: ret void 727 // 728 // 729 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 730 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 731 // CHECK3-NEXT: entry: 732 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 733 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 734 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 735 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 736 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 737 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 738 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 739 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 740 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 741 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 742 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 743 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 744 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 745 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 746 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 747 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 748 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 749 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 750 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 751 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 752 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 753 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 754 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 755 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 756 // CHECK3: cond.true: 757 // CHECK3-NEXT: br label [[COND_END:%.*]] 758 // CHECK3: cond.false: 759 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 760 // CHECK3-NEXT: br label [[COND_END]] 761 // CHECK3: cond.end: 762 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 763 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 764 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 765 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 766 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 767 // CHECK3: omp.inner.for.cond: 768 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 769 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 770 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 771 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 772 // CHECK3: omp.inner.for.body: 773 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 774 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 775 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 776 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 777 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 778 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 779 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]] 780 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]] 781 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 782 // CHECK3: omp.body.continue: 783 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 784 // CHECK3: omp.inner.for.inc: 785 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 786 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 787 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 788 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 789 // CHECK3: omp.inner.for.end: 790 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 791 // CHECK3: omp.loop.exit: 792 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 793 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 794 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 795 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 796 // CHECK3: .omp.final.then: 797 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 798 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 799 // CHECK3: .omp.final.done: 800 // CHECK3-NEXT: ret void 801 // 802 // 803 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 804 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 805 // CHECK3-NEXT: entry: 806 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 807 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 808 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 809 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined, ptr [[TMP0]]) 810 // CHECK3-NEXT: ret void 811 // 812 // 813 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined 814 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 815 // CHECK3-NEXT: entry: 816 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 817 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 818 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 819 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 820 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 821 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 822 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 823 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 824 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 825 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 826 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 827 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 828 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 829 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 830 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 831 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 832 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 833 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 834 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 835 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 836 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 837 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 838 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 839 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 840 // CHECK3: cond.true: 841 // CHECK3-NEXT: br label [[COND_END:%.*]] 842 // CHECK3: cond.false: 843 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 844 // CHECK3-NEXT: br label [[COND_END]] 845 // CHECK3: cond.end: 846 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 847 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 848 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 849 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 850 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 851 // CHECK3: omp.inner.for.cond: 852 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 853 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 854 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 855 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 856 // CHECK3: omp.inner.for.body: 857 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 858 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 859 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 860 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 861 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 862 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 863 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]] 864 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 865 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 866 // CHECK3: omp.body.continue: 867 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 868 // CHECK3: omp.inner.for.inc: 869 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 870 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 871 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 872 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 873 // CHECK3: omp.inner.for.end: 874 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 875 // CHECK3: omp.loop.exit: 876 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 877 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 878 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 879 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 880 // CHECK3: .omp.final.then: 881 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 882 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 883 // CHECK3: .omp.final.done: 884 // CHECK3-NEXT: ret void 885 // 886 // 887 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 888 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 889 // CHECK3-NEXT: entry: 890 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 891 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 892 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 893 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 894 // CHECK3-NEXT: ret void 895 // 896 // 897 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 898 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 899 // CHECK3-NEXT: entry: 900 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 901 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 902 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 903 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 904 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 905 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 906 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 907 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 908 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 909 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 910 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 911 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 912 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 913 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 914 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 915 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 916 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 917 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 918 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 919 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 920 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 921 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 922 // CHECK3: omp.dispatch.cond: 923 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 924 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 925 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 926 // CHECK3: cond.true: 927 // CHECK3-NEXT: br label [[COND_END:%.*]] 928 // CHECK3: cond.false: 929 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 930 // CHECK3-NEXT: br label [[COND_END]] 931 // CHECK3: cond.end: 932 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 933 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 934 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 935 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 936 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 937 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 938 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 939 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 940 // CHECK3: omp.dispatch.body: 941 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 942 // CHECK3: omp.inner.for.cond: 943 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 944 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 945 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 946 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 947 // CHECK3: omp.inner.for.body: 948 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 949 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 950 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 951 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 952 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 953 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 954 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 955 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]] 956 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 957 // CHECK3: omp.body.continue: 958 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 959 // CHECK3: omp.inner.for.inc: 960 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 961 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 962 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 963 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 964 // CHECK3: omp.inner.for.end: 965 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 966 // CHECK3: omp.dispatch.inc: 967 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 968 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 969 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 970 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 971 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 972 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 973 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 974 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 975 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 976 // CHECK3: omp.dispatch.end: 977 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 978 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 979 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 980 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 981 // CHECK3: .omp.final.then: 982 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 983 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 984 // CHECK3: .omp.final.done: 985 // CHECK3-NEXT: ret void 986 // 987 // 988 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 989 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 990 // CHECK5-NEXT: entry: 991 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 992 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 993 // CHECK5-NEXT: ret i32 [[CALL]] 994 // 995 // 996 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 997 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 998 // CHECK5-NEXT: entry: 999 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1000 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1001 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1002 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1003 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1004 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1005 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1006 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1007 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1008 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1009 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4 1010 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1011 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 1012 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 1013 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1014 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1015 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1016 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1017 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1018 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1019 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1020 // CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 1021 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1022 // CHECK5: omp.inner.for.cond: 1023 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 1024 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 1025 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1026 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1027 // CHECK5: omp.inner.for.body: 1028 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1029 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1030 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1031 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1032 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1033 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1034 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 1035 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 1036 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 1037 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1038 // CHECK5: omp.body.continue: 1039 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1040 // CHECK5: omp.inner.for.inc: 1041 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1042 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1043 // CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1044 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1045 // CHECK5: omp.inner.for.end: 1046 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 1047 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 4 1048 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 4 1049 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4 1050 // CHECK5-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4 1051 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1052 // CHECK5: omp.inner.for.cond8: 1053 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1054 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]] 1055 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1056 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 1057 // CHECK5: omp.inner.for.body10: 1058 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 1059 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1060 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1061 // CHECK5-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]] 1062 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1063 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]] 1064 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 1065 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i64 0, i64 [[IDXPROM14]] 1066 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP6]] 1067 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 1068 // CHECK5: omp.body.continue16: 1069 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 1070 // CHECK5: omp.inner.for.inc17: 1071 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 1072 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 1073 // CHECK5-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 1074 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 1075 // CHECK5: omp.inner.for.end19: 1076 // CHECK5-NEXT: store i32 123, ptr [[I7]], align 4 1077 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB21]], align 4 1078 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB22]], align 4 1079 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4 1080 // CHECK5-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV23]], align 4 1081 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 1082 // CHECK5: omp.inner.for.cond25: 1083 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 1084 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP9]] 1085 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1086 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1087 // CHECK5: omp.inner.for.body27: 1088 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 1089 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 1090 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 1091 // CHECK5-NEXT: store i32 [[ADD29]], ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]] 1092 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1093 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]] 1094 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 1095 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], ptr [[A30]], i64 0, i64 [[IDXPROM31]] 1096 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP9]] 1097 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1098 // CHECK5: omp.body.continue33: 1099 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1100 // CHECK5: omp.inner.for.inc34: 1101 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 1102 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 1103 // CHECK5-NEXT: store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 1104 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 1105 // CHECK5: omp.inner.for.end36: 1106 // CHECK5-NEXT: store i32 123, ptr [[I24]], align 4 1107 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1108 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], ptr [[A37]], i64 0, i64 0 1109 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX38]], align 4 1110 // CHECK5-NEXT: ret i32 [[TMP18]] 1111 // 1112 // 1113 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1114 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1115 // CHECK7-NEXT: entry: 1116 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1117 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 1118 // CHECK7-NEXT: ret i32 [[CALL]] 1119 // 1120 // 1121 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1122 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1123 // CHECK7-NEXT: entry: 1124 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1125 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1126 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1127 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1128 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1129 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1130 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1131 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1132 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1133 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1134 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4 1135 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1136 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1137 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1138 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1139 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4 1140 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1141 // CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1142 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1143 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1144 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1145 // CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 1146 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1147 // CHECK7: omp.inner.for.cond: 1148 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 1149 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 1150 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1151 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1152 // CHECK7: omp.inner.for.body: 1153 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1154 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1155 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1156 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 1157 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1158 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 1159 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 1160 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 1161 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1162 // CHECK7: omp.body.continue: 1163 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1164 // CHECK7: omp.inner.for.inc: 1165 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1166 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1167 // CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 1168 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1169 // CHECK7: omp.inner.for.end: 1170 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 1171 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 4 1172 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 4 1173 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4 1174 // CHECK7-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4 1175 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1176 // CHECK7: omp.inner.for.cond8: 1177 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 1178 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP7]] 1179 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1180 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 1181 // CHECK7: omp.inner.for.body10: 1182 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 1183 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1184 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1185 // CHECK7-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]] 1186 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1187 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]] 1188 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i32 0, i32 [[TMP10]] 1189 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP7]] 1190 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 1191 // CHECK7: omp.body.continue15: 1192 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 1193 // CHECK7: omp.inner.for.inc16: 1194 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 1195 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 1196 // CHECK7-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 1197 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 1198 // CHECK7: omp.inner.for.end18: 1199 // CHECK7-NEXT: store i32 123, ptr [[I7]], align 4 1200 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB20]], align 4 1201 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB21]], align 4 1202 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB20]], align 4 1203 // CHECK7-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV22]], align 4 1204 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 1205 // CHECK7: omp.inner.for.cond24: 1206 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 1207 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB21]], align 4, !llvm.access.group [[ACC_GRP10]] 1208 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1209 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 1210 // CHECK7: omp.inner.for.body26: 1211 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 1212 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 1213 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 1214 // CHECK7-NEXT: store i32 [[ADD28]], ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]] 1215 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1216 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]] 1217 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], ptr [[A29]], i32 0, i32 [[TMP16]] 1218 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX30]], align 4, !llvm.access.group [[ACC_GRP10]] 1219 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 1220 // CHECK7: omp.body.continue31: 1221 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 1222 // CHECK7: omp.inner.for.inc32: 1223 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 1224 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 1225 // CHECK7-NEXT: store i32 [[ADD33]], ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 1226 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 1227 // CHECK7: omp.inner.for.end34: 1228 // CHECK7-NEXT: store i32 123, ptr [[I23]], align 4 1229 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1230 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], ptr [[A35]], i32 0, i32 0 1231 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX36]], align 4 1232 // CHECK7-NEXT: ret i32 [[TMP18]] 1233 // 1234 // 1235 // CHECK9-LABEL: define {{[^@]+}}@main 1236 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1237 // CHECK9-NEXT: entry: 1238 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1239 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1240 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 1241 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1242 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 1243 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1244 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1245 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 1246 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 1247 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 1248 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1249 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1250 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1251 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1252 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1253 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1254 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8 1255 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8 1256 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8 1257 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8 1258 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1259 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1260 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1261 // CHECK9-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1262 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 1263 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 1264 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1265 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8 1266 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8 1267 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8 1268 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8 1269 // CHECK9-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 1270 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 1271 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 1272 // CHECK9-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1273 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 1274 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1275 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 1276 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4 1277 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 1278 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1279 // CHECK9-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 1280 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 1281 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1282 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 1283 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 1284 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 1285 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 1286 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1287 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false) 1288 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1289 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8 1290 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1291 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8 1292 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1293 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8 1294 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1295 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 1296 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1297 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8 1298 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1299 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 1300 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1301 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 1302 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1303 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8 1304 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1305 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8 1306 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1307 // CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8 1308 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1309 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1310 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1311 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 1312 // CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 1313 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1314 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 1315 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1316 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1317 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1318 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1319 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 1320 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 1321 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1322 // CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4 1323 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1324 // CHECK9-NEXT: store i32 3, ptr [[TMP24]], align 4 1325 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1326 // CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8 1327 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1328 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8 1329 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1330 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8 1331 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1332 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 1333 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1334 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 1335 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1336 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8 1337 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1338 // CHECK9-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 1339 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1340 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8 1341 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1342 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 1343 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1344 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4 1345 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1346 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4 1347 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]]) 1348 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1349 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1350 // CHECK9: omp_offload.failed: 1351 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 1352 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1353 // CHECK9: omp_offload.cont: 1354 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 1355 // CHECK9-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 1356 // CHECK9-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 1357 // CHECK9-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4 1358 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false) 1359 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1360 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8 1361 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1362 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8 1363 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 1364 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8 1365 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 1366 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8 1367 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 1368 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8 1369 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 1370 // CHECK9-NEXT: store ptr null, ptr [[TMP46]], align 8 1371 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 1372 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8 1373 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 1374 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8 1375 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 1376 // CHECK9-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8 1377 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 1378 // CHECK9-NEXT: store ptr null, ptr [[TMP50]], align 8 1379 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1380 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1381 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 1382 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 1383 // CHECK9-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4 1384 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 1385 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0 1386 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1387 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1388 // CHECK9-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 1389 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 1390 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1 1391 // CHECK9-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64 1392 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 1393 // CHECK9-NEXT: store i32 3, ptr [[TMP58]], align 4 1394 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 1395 // CHECK9-NEXT: store i32 3, ptr [[TMP59]], align 4 1396 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 1397 // CHECK9-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8 1398 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 1399 // CHECK9-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8 1400 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 1401 // CHECK9-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8 1402 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 1403 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8 1404 // CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 1405 // CHECK9-NEXT: store ptr null, ptr [[TMP64]], align 8 1406 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 1407 // CHECK9-NEXT: store ptr null, ptr [[TMP65]], align 8 1408 // CHECK9-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 1409 // CHECK9-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8 1410 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 1411 // CHECK9-NEXT: store i64 0, ptr [[TMP67]], align 8 1412 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 1413 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4 1414 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 1415 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP69]], align 4 1416 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 1417 // CHECK9-NEXT: store i32 0, ptr [[TMP70]], align 4 1418 // CHECK9-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS15]]) 1419 // CHECK9-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 1420 // CHECK9-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1421 // CHECK9: omp_offload.failed16: 1422 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 1423 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1424 // CHECK9: omp_offload.cont17: 1425 // CHECK9-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 4 1426 // CHECK9-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4 1427 // CHECK9-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4 1428 // CHECK9-NEXT: store i32 [[TMP74]], ptr [[N_CASTED19]], align 4 1429 // CHECK9-NEXT: [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8 1430 // CHECK9-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 1431 // CHECK9-NEXT: store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 1432 // CHECK9-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 1433 // CHECK9-NEXT: [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4 1434 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false) 1435 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1436 // CHECK9-NEXT: store i64 [[TMP75]], ptr [[TMP79]], align 8 1437 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1438 // CHECK9-NEXT: store i64 [[TMP75]], ptr [[TMP80]], align 8 1439 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 1440 // CHECK9-NEXT: store ptr null, ptr [[TMP81]], align 8 1441 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 1442 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP82]], align 8 1443 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 1444 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP83]], align 8 1445 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 1446 // CHECK9-NEXT: store ptr null, ptr [[TMP84]], align 8 1447 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 1448 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 8 1449 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 1450 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP86]], align 8 1451 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 1452 // CHECK9-NEXT: store i64 [[TMP78]], ptr [[TMP87]], align 8 1453 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 1454 // CHECK9-NEXT: store ptr null, ptr [[TMP88]], align 8 1455 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 1456 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8 1457 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 1458 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP90]], align 8 1459 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 1460 // CHECK9-NEXT: store ptr null, ptr [[TMP91]], align 8 1461 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 1462 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 1463 // CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 1464 // CHECK9-NEXT: [[TMP95:%.*]] = load i32, ptr [[N]], align 4 1465 // CHECK9-NEXT: store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4 1466 // CHECK9-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 1467 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0 1468 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1469 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 1470 // CHECK9-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 1471 // CHECK9-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 1472 // CHECK9-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1 1473 // CHECK9-NEXT: [[TMP98:%.*]] = zext i32 [[ADD30]] to i64 1474 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 1475 // CHECK9-NEXT: store i32 3, ptr [[TMP99]], align 4 1476 // CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 1477 // CHECK9-NEXT: store i32 4, ptr [[TMP100]], align 4 1478 // CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 1479 // CHECK9-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8 1480 // CHECK9-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 1481 // CHECK9-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8 1482 // CHECK9-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 1483 // CHECK9-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 8 1484 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 1485 // CHECK9-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8 1486 // CHECK9-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 1487 // CHECK9-NEXT: store ptr null, ptr [[TMP105]], align 8 1488 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 1489 // CHECK9-NEXT: store ptr null, ptr [[TMP106]], align 8 1490 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 1491 // CHECK9-NEXT: store i64 [[TMP98]], ptr [[TMP107]], align 8 1492 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 1493 // CHECK9-NEXT: store i64 0, ptr [[TMP108]], align 8 1494 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 1495 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4 1496 // CHECK9-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 1497 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP110]], align 4 1498 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 1499 // CHECK9-NEXT: store i32 0, ptr [[TMP111]], align 4 1500 // CHECK9-NEXT: [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS31]]) 1501 // CHECK9-NEXT: [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0 1502 // CHECK9-NEXT: br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 1503 // CHECK9: omp_offload.failed32: 1504 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]] 1505 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT33]] 1506 // CHECK9: omp_offload.cont33: 1507 // CHECK9-NEXT: [[TMP114:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 1508 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP114]]) 1509 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1510 // CHECK9-NEXT: [[TMP115:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 1511 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP115]]) 1512 // CHECK9-NEXT: [[TMP116:%.*]] = load i32, ptr [[RETVAL]], align 4 1513 // CHECK9-NEXT: ret i32 [[TMP116]] 1514 // 1515 // 1516 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1517 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1518 // CHECK9-NEXT: entry: 1519 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1520 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1521 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1522 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1523 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1524 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1525 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1526 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1527 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1528 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 1529 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 1530 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 1531 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 1532 // CHECK9-NEXT: ret void 1533 // 1534 // 1535 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 1536 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1537 // CHECK9-NEXT: entry: 1538 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1539 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1540 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1541 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1542 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1543 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1544 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1545 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1546 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1547 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1548 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1549 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1550 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1551 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1552 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1553 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1554 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1555 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1556 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1557 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1558 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1559 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1560 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 1561 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 1562 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1563 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1564 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1565 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1566 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1567 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 1568 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1569 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1570 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1571 // CHECK9: omp.precond.then: 1572 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1573 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1574 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 1575 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1576 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1577 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1578 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 1579 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1580 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1581 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1582 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1583 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1584 // CHECK9: cond.true: 1585 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1586 // CHECK9-NEXT: br label [[COND_END:%.*]] 1587 // CHECK9: cond.false: 1588 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1589 // CHECK9-NEXT: br label [[COND_END]] 1590 // CHECK9: cond.end: 1591 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1592 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1593 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1594 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 1595 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1596 // CHECK9: omp.inner.for.cond: 1597 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 1598 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 1599 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1600 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1601 // CHECK9: omp.inner.for.body: 1602 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1603 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1604 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1605 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]] 1606 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]] 1607 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1608 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 1609 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]] 1610 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1611 // CHECK9: omp.body.continue: 1612 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1613 // CHECK9: omp.inner.for.inc: 1614 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1615 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1616 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1617 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1618 // CHECK9: omp.inner.for.end: 1619 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1620 // CHECK9: omp.loop.exit: 1621 // CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1622 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 1623 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]]) 1624 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1625 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1626 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1627 // CHECK9: .omp.final.then: 1628 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1629 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 1630 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1631 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1632 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1633 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 1634 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1635 // CHECK9: .omp.final.done: 1636 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1637 // CHECK9: omp.precond.end: 1638 // CHECK9-NEXT: ret void 1639 // 1640 // 1641 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 1642 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1643 // CHECK9-NEXT: entry: 1644 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1645 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1646 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1647 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1648 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1649 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1650 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1651 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1652 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1653 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 1654 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 1655 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 1656 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 1657 // CHECK9-NEXT: ret void 1658 // 1659 // 1660 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined 1661 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1662 // CHECK9-NEXT: entry: 1663 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1664 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1665 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1666 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1667 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1668 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1669 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1670 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1671 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1672 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1673 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1674 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1675 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1676 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1677 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1678 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1679 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1680 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1681 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1682 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1683 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1684 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1685 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 1686 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 1687 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1688 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1689 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1690 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1691 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1692 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 1693 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1694 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1695 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1696 // CHECK9: omp.precond.then: 1697 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1698 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1699 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 1700 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1701 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1702 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1703 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 1704 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1705 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1706 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1707 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1708 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1709 // CHECK9: cond.true: 1710 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1711 // CHECK9-NEXT: br label [[COND_END:%.*]] 1712 // CHECK9: cond.false: 1713 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1714 // CHECK9-NEXT: br label [[COND_END]] 1715 // CHECK9: cond.end: 1716 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1717 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1718 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1719 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 1720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1721 // CHECK9: omp.inner.for.cond: 1722 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 1723 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 1724 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1725 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1726 // CHECK9: omp.inner.for.body: 1727 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 1728 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1729 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1730 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]] 1731 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]] 1732 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1733 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 1734 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 1735 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1736 // CHECK9: omp.body.continue: 1737 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1738 // CHECK9: omp.inner.for.inc: 1739 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 1740 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1741 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 1742 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1743 // CHECK9: omp.inner.for.end: 1744 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1745 // CHECK9: omp.loop.exit: 1746 // CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1747 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 1748 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]]) 1749 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1750 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1751 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1752 // CHECK9: .omp.final.then: 1753 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1754 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 1755 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1756 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1757 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1758 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 1759 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1760 // CHECK9: .omp.final.done: 1761 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1762 // CHECK9: omp.precond.end: 1763 // CHECK9-NEXT: ret void 1764 // 1765 // 1766 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1767 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1768 // CHECK9-NEXT: entry: 1769 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1770 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1771 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1772 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1773 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1774 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1775 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1776 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1777 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1778 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1779 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1780 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1781 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 1782 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 1783 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 1784 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1785 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 1786 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 1787 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 1788 // CHECK9-NEXT: ret void 1789 // 1790 // 1791 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined 1792 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1793 // CHECK9-NEXT: entry: 1794 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1795 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1796 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1797 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1798 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1799 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1800 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1801 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1802 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1803 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1804 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1805 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1806 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1807 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1808 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1809 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 1810 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1811 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1812 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1813 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 1814 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1815 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1816 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 1817 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1818 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 1819 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1820 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1821 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1822 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1823 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1824 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1825 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 1826 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1827 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1828 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1829 // CHECK9: omp.precond.then: 1830 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1831 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1832 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 1833 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1834 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1835 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1836 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1837 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1838 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 1839 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1840 // CHECK9: omp.dispatch.cond: 1841 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1842 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1843 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1844 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1845 // CHECK9: cond.true: 1846 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1847 // CHECK9-NEXT: br label [[COND_END:%.*]] 1848 // CHECK9: cond.false: 1849 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1850 // CHECK9-NEXT: br label [[COND_END]] 1851 // CHECK9: cond.end: 1852 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1853 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1854 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1855 // CHECK9-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 1856 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1857 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1858 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1859 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1860 // CHECK9: omp.dispatch.body: 1861 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1862 // CHECK9: omp.inner.for.cond: 1863 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 1864 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 1865 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1866 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1867 // CHECK9: omp.inner.for.body: 1868 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1869 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1870 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1871 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]] 1872 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]] 1873 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1874 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 1875 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 1876 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1877 // CHECK9: omp.body.continue: 1878 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1879 // CHECK9: omp.inner.for.inc: 1880 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1881 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 1882 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1883 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 1884 // CHECK9: omp.inner.for.end: 1885 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1886 // CHECK9: omp.dispatch.inc: 1887 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1888 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1889 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1890 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4 1891 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1892 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1893 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1894 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4 1895 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1896 // CHECK9: omp.dispatch.end: 1897 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1898 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 1899 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 1900 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1901 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 1902 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1903 // CHECK9: .omp.final.then: 1904 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1905 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0 1906 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1907 // CHECK9-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 1908 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 1909 // CHECK9-NEXT: store i32 [[ADD14]], ptr [[I4]], align 4 1910 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1911 // CHECK9: .omp.final.done: 1912 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1913 // CHECK9: omp.precond.end: 1914 // CHECK9-NEXT: ret void 1915 // 1916 // 1917 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 1918 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1919 // CHECK9-NEXT: entry: 1920 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1921 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 1922 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1923 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1924 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1925 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1926 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1927 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 1928 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 1929 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 1930 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1931 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1932 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 8 1933 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 8 1934 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 8 1935 // CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 1936 // CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1937 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1938 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1939 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 1940 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1941 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 1942 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1943 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 1944 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1945 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1946 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1947 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4 1948 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1949 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4 1950 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1951 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 1952 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1953 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 1954 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1955 // CHECK9-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 8 1956 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1957 // CHECK9-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 8 1958 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1959 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 1960 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1961 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 1962 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1963 // CHECK9-NEXT: store i64 10, ptr [[TMP13]], align 8 1964 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1965 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 1966 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1967 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1968 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1969 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4 1970 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1971 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4 1972 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, ptr [[KERNEL_ARGS]]) 1973 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1974 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1975 // CHECK9: omp_offload.failed: 1976 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76(ptr [[A]]) #[[ATTR3]] 1977 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1978 // CHECK9: omp_offload.cont: 1979 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1980 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP20]], align 8 1981 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1982 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP21]], align 8 1983 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 1984 // CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8 1985 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1986 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1987 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 1988 // CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4 1989 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 1990 // CHECK9-NEXT: store i32 1, ptr [[TMP26]], align 4 1991 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 1992 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 1993 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 1994 // CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 1995 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 1996 // CHECK9-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 8 1997 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 1998 // CHECK9-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 8 1999 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 2000 // CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8 2001 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 2002 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8 2003 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 2004 // CHECK9-NEXT: store i64 10, ptr [[TMP33]], align 8 2005 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 2006 // CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8 2007 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 2008 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 2009 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 2010 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4 2011 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 2012 // CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4 2013 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, ptr [[KERNEL_ARGS5]]) 2014 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 2015 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 2016 // CHECK9: omp_offload.failed6: 2017 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80(ptr [[A]]) #[[ATTR3]] 2018 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]] 2019 // CHECK9: omp_offload.cont7: 2020 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 2021 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP40]], align 8 2022 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 2023 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP41]], align 8 2024 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 2025 // CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 8 2026 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 2027 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 2028 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 2029 // CHECK9-NEXT: store i32 3, ptr [[TMP45]], align 4 2030 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 2031 // CHECK9-NEXT: store i32 1, ptr [[TMP46]], align 4 2032 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 2033 // CHECK9-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 2034 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 2035 // CHECK9-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 2036 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 2037 // CHECK9-NEXT: store ptr @.offload_sizes.9, ptr [[TMP49]], align 8 2038 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 2039 // CHECK9-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP50]], align 8 2040 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 2041 // CHECK9-NEXT: store ptr null, ptr [[TMP51]], align 8 2042 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 2043 // CHECK9-NEXT: store ptr null, ptr [[TMP52]], align 8 2044 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 2045 // CHECK9-NEXT: store i64 10, ptr [[TMP53]], align 8 2046 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 2047 // CHECK9-NEXT: store i64 0, ptr [[TMP54]], align 8 2048 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 2049 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 2050 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 2051 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4 2052 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 2053 // CHECK9-NEXT: store i32 0, ptr [[TMP57]], align 4 2054 // CHECK9-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS12]]) 2055 // CHECK9-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 2056 // CHECK9-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 2057 // CHECK9: omp_offload.failed13: 2058 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]] 2059 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]] 2060 // CHECK9: omp_offload.cont14: 2061 // CHECK9-NEXT: ret i32 0 2062 // 2063 // 2064 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 2065 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2066 // CHECK9-NEXT: entry: 2067 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2068 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2069 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2070 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined, ptr [[TMP0]]) 2071 // CHECK9-NEXT: ret void 2072 // 2073 // 2074 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined 2075 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2076 // CHECK9-NEXT: entry: 2077 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2078 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2079 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2080 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2081 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2082 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2083 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2084 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2085 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2086 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2087 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2088 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2089 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2090 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2091 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2092 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 2093 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2094 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2095 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2096 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2097 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2098 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2099 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2100 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2101 // CHECK9: cond.true: 2102 // CHECK9-NEXT: br label [[COND_END:%.*]] 2103 // CHECK9: cond.false: 2104 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2105 // CHECK9-NEXT: br label [[COND_END]] 2106 // CHECK9: cond.end: 2107 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2108 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2109 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2110 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2111 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2112 // CHECK9: omp.inner.for.cond: 2113 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 2114 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 2115 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2116 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2117 // CHECK9: omp.inner.for.body: 2118 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 2119 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2120 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2121 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 2122 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 2123 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2124 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 2125 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]] 2126 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2127 // CHECK9: omp.body.continue: 2128 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2129 // CHECK9: omp.inner.for.inc: 2130 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 2131 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2132 // CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 2133 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 2134 // CHECK9: omp.inner.for.end: 2135 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2136 // CHECK9: omp.loop.exit: 2137 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2138 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2139 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2140 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2141 // CHECK9: .omp.final.then: 2142 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 2143 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2144 // CHECK9: .omp.final.done: 2145 // CHECK9-NEXT: ret void 2146 // 2147 // 2148 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 2149 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2150 // CHECK9-NEXT: entry: 2151 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2152 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2153 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2154 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined, ptr [[TMP0]]) 2155 // CHECK9-NEXT: ret void 2156 // 2157 // 2158 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined 2159 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2160 // CHECK9-NEXT: entry: 2161 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2162 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2163 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2164 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2165 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2166 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2167 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2168 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2169 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2170 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2171 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2172 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2173 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2174 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2175 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2176 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 2177 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2178 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2179 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2180 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2181 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2182 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2183 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2184 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2185 // CHECK9: cond.true: 2186 // CHECK9-NEXT: br label [[COND_END:%.*]] 2187 // CHECK9: cond.false: 2188 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2189 // CHECK9-NEXT: br label [[COND_END]] 2190 // CHECK9: cond.end: 2191 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2192 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2193 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2194 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2195 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2196 // CHECK9: omp.inner.for.cond: 2197 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 2198 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 2199 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2200 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2201 // CHECK9: omp.inner.for.body: 2202 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 2203 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2204 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2205 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 2206 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 2207 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2208 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 2209 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]] 2210 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2211 // CHECK9: omp.body.continue: 2212 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2213 // CHECK9: omp.inner.for.inc: 2214 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 2215 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2216 // CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 2217 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 2218 // CHECK9: omp.inner.for.end: 2219 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2220 // CHECK9: omp.loop.exit: 2221 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2222 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2223 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2224 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2225 // CHECK9: .omp.final.then: 2226 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 2227 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2228 // CHECK9: .omp.final.done: 2229 // CHECK9-NEXT: ret void 2230 // 2231 // 2232 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2233 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2234 // CHECK9-NEXT: entry: 2235 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2236 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2237 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2238 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]]) 2239 // CHECK9-NEXT: ret void 2240 // 2241 // 2242 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined 2243 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2244 // CHECK9-NEXT: entry: 2245 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2246 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2247 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2248 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2249 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2250 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2251 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2252 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2253 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2254 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2255 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2256 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2257 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2258 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2259 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2260 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 2261 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2262 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2263 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2264 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2265 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10) 2266 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2267 // CHECK9: omp.dispatch.cond: 2268 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2269 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2270 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2271 // CHECK9: cond.true: 2272 // CHECK9-NEXT: br label [[COND_END:%.*]] 2273 // CHECK9: cond.false: 2274 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2275 // CHECK9-NEXT: br label [[COND_END]] 2276 // CHECK9: cond.end: 2277 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2278 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2279 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2280 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2281 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2282 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2283 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2284 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2285 // CHECK9: omp.dispatch.body: 2286 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2287 // CHECK9: omp.inner.for.cond: 2288 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 2289 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 2290 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2291 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2292 // CHECK9: omp.inner.for.body: 2293 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2294 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2295 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2296 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 2297 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 2298 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2299 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 2300 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]] 2301 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2302 // CHECK9: omp.body.continue: 2303 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2304 // CHECK9: omp.inner.for.inc: 2305 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2306 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2307 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2308 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2309 // CHECK9: omp.inner.for.end: 2310 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2311 // CHECK9: omp.dispatch.inc: 2312 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2313 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2314 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2315 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 2316 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2317 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2318 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2319 // CHECK9-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 2320 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2321 // CHECK9: omp.dispatch.end: 2322 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2323 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2324 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2325 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2326 // CHECK9: .omp.final.then: 2327 // CHECK9-NEXT: store i32 10, ptr [[I]], align 4 2328 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2329 // CHECK9: .omp.final.done: 2330 // CHECK9-NEXT: ret void 2331 // 2332 // 2333 // CHECK11-LABEL: define {{[^@]+}}@main 2334 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2335 // CHECK11-NEXT: entry: 2336 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2337 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2338 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 2339 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2340 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 2341 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2342 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2343 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 2344 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 2345 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 2346 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2347 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2348 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2349 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2350 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2351 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 2352 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4 2353 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4 2354 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4 2355 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 2356 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 2357 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 2358 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2359 // CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2360 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 2361 // CHECK11-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4 2362 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2363 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4 2364 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4 2365 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4 2366 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4 2367 // CHECK11-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 2368 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 2369 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 2370 // CHECK11-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2371 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 2372 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 2373 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 2374 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4 2375 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 2376 // CHECK11-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 2377 // CHECK11-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 2378 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2379 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 2380 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 2381 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 2382 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 2383 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2384 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2385 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false) 2386 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2387 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4 2388 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2389 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 2390 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2391 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4 2392 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2393 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 2394 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2395 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4 2396 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2397 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 2398 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2399 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 2400 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2401 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4 2402 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2403 // CHECK11-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4 2404 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2405 // CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 4 2406 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2407 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2408 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2409 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 2410 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 2411 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2412 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 2413 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2414 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2415 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2416 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2417 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 2418 // CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 2419 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2420 // CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 4 2421 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2422 // CHECK11-NEXT: store i32 3, ptr [[TMP24]], align 4 2423 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2424 // CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4 2425 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2426 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4 2427 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2428 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4 2429 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2430 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 2431 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2432 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 2433 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2434 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4 2435 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2436 // CHECK11-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 2437 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2438 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8 2439 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2440 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 2441 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2442 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4 2443 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2444 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4 2445 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]]) 2446 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2447 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2448 // CHECK11: omp_offload.failed: 2449 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 2450 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2451 // CHECK11: omp_offload.cont: 2452 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 2453 // CHECK11-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 2454 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 2455 // CHECK11-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4 2456 // CHECK11-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64 2457 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false) 2458 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2459 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4 2460 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2461 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 2462 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 2463 // CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 4 2464 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 2465 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4 2466 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 2467 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4 2468 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 2469 // CHECK11-NEXT: store ptr null, ptr [[TMP47]], align 4 2470 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 2471 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4 2472 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 2473 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4 2474 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 2475 // CHECK11-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4 2476 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 2477 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4 2478 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2479 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2480 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 2481 // CHECK11-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4 2482 // CHECK11-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4 2483 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 2484 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0 2485 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2486 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 2487 // CHECK11-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 2488 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 2489 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1 2490 // CHECK11-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64 2491 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 2492 // CHECK11-NEXT: store i32 3, ptr [[TMP59]], align 4 2493 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 2494 // CHECK11-NEXT: store i32 3, ptr [[TMP60]], align 4 2495 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 2496 // CHECK11-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4 2497 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 2498 // CHECK11-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4 2499 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 2500 // CHECK11-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4 2501 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 2502 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4 2503 // CHECK11-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 2504 // CHECK11-NEXT: store ptr null, ptr [[TMP65]], align 4 2505 // CHECK11-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 2506 // CHECK11-NEXT: store ptr null, ptr [[TMP66]], align 4 2507 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 2508 // CHECK11-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8 2509 // CHECK11-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 2510 // CHECK11-NEXT: store i64 0, ptr [[TMP68]], align 8 2511 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 2512 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 2513 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 2514 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP70]], align 4 2515 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 2516 // CHECK11-NEXT: store i32 0, ptr [[TMP71]], align 4 2517 // CHECK11-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS15]]) 2518 // CHECK11-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0 2519 // CHECK11-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2520 // CHECK11: omp_offload.failed16: 2521 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 2522 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2523 // CHECK11: omp_offload.cont17: 2524 // CHECK11-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4 2525 // CHECK11-NEXT: store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4 2526 // CHECK11-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4 2527 // CHECK11-NEXT: store i32 [[TMP75]], ptr [[N_CASTED19]], align 4 2528 // CHECK11-NEXT: [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4 2529 // CHECK11-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 2530 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 2531 // CHECK11-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 2532 // CHECK11-NEXT: [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4 2533 // CHECK11-NEXT: [[TMP80:%.*]] = sext i32 [[TMP79]] to i64 2534 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false) 2535 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 2536 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[TMP81]], align 4 2537 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 2538 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[TMP82]], align 4 2539 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 2540 // CHECK11-NEXT: store ptr null, ptr [[TMP83]], align 4 2541 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 2542 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP84]], align 4 2543 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 2544 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP85]], align 4 2545 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 2546 // CHECK11-NEXT: store ptr null, ptr [[TMP86]], align 4 2547 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 2548 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 4 2549 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 2550 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 4 2551 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 2552 // CHECK11-NEXT: store i64 [[TMP80]], ptr [[TMP89]], align 4 2553 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2 2554 // CHECK11-NEXT: store ptr null, ptr [[TMP90]], align 4 2555 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 2556 // CHECK11-NEXT: store i32 [[TMP78]], ptr [[TMP91]], align 4 2557 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 2558 // CHECK11-NEXT: store i32 [[TMP78]], ptr [[TMP92]], align 4 2559 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3 2560 // CHECK11-NEXT: store ptr null, ptr [[TMP93]], align 4 2561 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 2562 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 2563 // CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 2564 // CHECK11-NEXT: [[TMP97:%.*]] = load i32, ptr [[N]], align 4 2565 // CHECK11-NEXT: store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4 2566 // CHECK11-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 2567 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0 2568 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 2569 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 2570 // CHECK11-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 2571 // CHECK11-NEXT: [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 2572 // CHECK11-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1 2573 // CHECK11-NEXT: [[TMP100:%.*]] = zext i32 [[ADD30]] to i64 2574 // CHECK11-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 2575 // CHECK11-NEXT: store i32 3, ptr [[TMP101]], align 4 2576 // CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 2577 // CHECK11-NEXT: store i32 4, ptr [[TMP102]], align 4 2578 // CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 2579 // CHECK11-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4 2580 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 2581 // CHECK11-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4 2582 // CHECK11-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 2583 // CHECK11-NEXT: store ptr [[TMP96]], ptr [[TMP105]], align 4 2584 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 2585 // CHECK11-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4 2586 // CHECK11-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 2587 // CHECK11-NEXT: store ptr null, ptr [[TMP107]], align 4 2588 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 2589 // CHECK11-NEXT: store ptr null, ptr [[TMP108]], align 4 2590 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 2591 // CHECK11-NEXT: store i64 [[TMP100]], ptr [[TMP109]], align 8 2592 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 2593 // CHECK11-NEXT: store i64 0, ptr [[TMP110]], align 8 2594 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 2595 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4 2596 // CHECK11-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 2597 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP112]], align 4 2598 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 2599 // CHECK11-NEXT: store i32 0, ptr [[TMP113]], align 4 2600 // CHECK11-NEXT: [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS31]]) 2601 // CHECK11-NEXT: [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0 2602 // CHECK11-NEXT: br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 2603 // CHECK11: omp_offload.failed32: 2604 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]] 2605 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT33]] 2606 // CHECK11: omp_offload.cont33: 2607 // CHECK11-NEXT: [[TMP116:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 2608 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP116]]) 2609 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2610 // CHECK11-NEXT: [[TMP117:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 2611 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP117]]) 2612 // CHECK11-NEXT: [[TMP118:%.*]] = load i32, ptr [[RETVAL]], align 4 2613 // CHECK11-NEXT: ret i32 [[TMP118]] 2614 // 2615 // 2616 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 2617 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2618 // CHECK11-NEXT: entry: 2619 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2620 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2621 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2622 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2623 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2624 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2625 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2626 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2627 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2628 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 2629 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 2630 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 2631 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 2632 // CHECK11-NEXT: ret void 2633 // 2634 // 2635 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 2636 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2637 // CHECK11-NEXT: entry: 2638 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2639 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2640 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2641 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2642 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2643 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2644 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2645 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2646 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2647 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2648 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2649 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2650 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2651 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2652 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2653 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2654 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2655 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2656 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2657 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2658 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2659 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2660 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 2661 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 2662 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2663 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2664 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2665 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2666 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2667 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 2668 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2669 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2670 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2671 // CHECK11: omp.precond.then: 2672 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2673 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2674 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 2675 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2676 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2677 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2678 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 2679 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2680 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2681 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2682 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2683 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2684 // CHECK11: cond.true: 2685 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2686 // CHECK11-NEXT: br label [[COND_END:%.*]] 2687 // CHECK11: cond.false: 2688 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2689 // CHECK11-NEXT: br label [[COND_END]] 2690 // CHECK11: cond.end: 2691 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2692 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2693 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2694 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 2695 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2696 // CHECK11: omp.inner.for.cond: 2697 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 2698 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 2699 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2700 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2701 // CHECK11: omp.inner.for.body: 2702 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 2703 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2704 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2705 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]] 2706 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]] 2707 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP16]] 2708 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 2709 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2710 // CHECK11: omp.body.continue: 2711 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2712 // CHECK11: omp.inner.for.inc: 2713 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 2714 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2715 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 2716 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2717 // CHECK11: omp.inner.for.end: 2718 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2719 // CHECK11: omp.loop.exit: 2720 // CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2721 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 2722 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]]) 2723 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2724 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2725 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2726 // CHECK11: .omp.final.then: 2727 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2728 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 2729 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2730 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2731 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2732 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 2733 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2734 // CHECK11: .omp.final.done: 2735 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2736 // CHECK11: omp.precond.end: 2737 // CHECK11-NEXT: ret void 2738 // 2739 // 2740 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 2741 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2742 // CHECK11-NEXT: entry: 2743 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2744 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2745 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2746 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2747 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2748 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2749 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2750 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2751 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2752 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 2753 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 2754 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 2755 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 2756 // CHECK11-NEXT: ret void 2757 // 2758 // 2759 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined 2760 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2761 // CHECK11-NEXT: entry: 2762 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2763 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2764 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2765 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2766 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2767 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2768 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2769 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2770 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2771 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2772 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2773 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2774 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2775 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2776 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2777 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2778 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2779 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2780 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2781 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2782 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2783 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2784 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 2785 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 2786 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2787 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2788 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2789 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2790 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2791 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 2792 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2793 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2794 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2795 // CHECK11: omp.precond.then: 2796 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2797 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2798 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 2799 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2800 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2801 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2802 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 2803 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2804 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2805 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2806 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2807 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2808 // CHECK11: cond.true: 2809 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2810 // CHECK11-NEXT: br label [[COND_END:%.*]] 2811 // CHECK11: cond.false: 2812 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2813 // CHECK11-NEXT: br label [[COND_END]] 2814 // CHECK11: cond.end: 2815 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2816 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2817 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2818 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 2819 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2820 // CHECK11: omp.inner.for.cond: 2821 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 2822 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 2823 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2824 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2825 // CHECK11: omp.inner.for.body: 2826 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 2827 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2828 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2829 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]] 2830 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]] 2831 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP16]] 2832 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]] 2833 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2834 // CHECK11: omp.body.continue: 2835 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2836 // CHECK11: omp.inner.for.inc: 2837 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 2838 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2839 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 2840 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 2841 // CHECK11: omp.inner.for.end: 2842 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2843 // CHECK11: omp.loop.exit: 2844 // CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2845 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 2846 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]]) 2847 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2848 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2849 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2850 // CHECK11: .omp.final.then: 2851 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2852 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 2853 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2854 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2855 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2856 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 2857 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2858 // CHECK11: .omp.final.done: 2859 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2860 // CHECK11: omp.precond.end: 2861 // CHECK11-NEXT: ret void 2862 // 2863 // 2864 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2865 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2866 // CHECK11-NEXT: entry: 2867 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2868 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2869 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2870 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2871 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2872 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2873 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2874 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2875 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2876 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2877 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2878 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2879 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 2880 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 2881 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 2882 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2883 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 2884 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 2885 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 2886 // CHECK11-NEXT: ret void 2887 // 2888 // 2889 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined 2890 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2891 // CHECK11-NEXT: entry: 2892 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2893 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2894 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2895 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2896 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2897 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2898 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2899 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2900 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2901 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2902 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2903 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2904 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2905 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2906 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2907 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2908 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2909 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2910 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2911 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 2912 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2913 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2914 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 2915 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2916 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 2917 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2918 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2919 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2920 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2921 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2922 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2923 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 2924 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2925 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2926 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2927 // CHECK11: omp.precond.then: 2928 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2929 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2930 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 2931 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2932 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2933 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2934 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2935 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2936 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 2937 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2938 // CHECK11: omp.dispatch.cond: 2939 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2940 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2941 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2942 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2943 // CHECK11: cond.true: 2944 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2945 // CHECK11-NEXT: br label [[COND_END:%.*]] 2946 // CHECK11: cond.false: 2947 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2948 // CHECK11-NEXT: br label [[COND_END]] 2949 // CHECK11: cond.end: 2950 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2951 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2952 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2953 // CHECK11-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2954 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2955 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2956 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2957 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2958 // CHECK11: omp.dispatch.body: 2959 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2960 // CHECK11: omp.inner.for.cond: 2961 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 2962 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 2963 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2964 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2965 // CHECK11: omp.inner.for.body: 2966 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 2967 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2968 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2969 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]] 2970 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]] 2971 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]] 2972 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]] 2973 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2974 // CHECK11: omp.body.continue: 2975 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2976 // CHECK11: omp.inner.for.inc: 2977 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 2978 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 2979 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 2980 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 2981 // CHECK11: omp.inner.for.end: 2982 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2983 // CHECK11: omp.dispatch.inc: 2984 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2985 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2986 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2987 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4 2988 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2989 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2990 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2991 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4 2992 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2993 // CHECK11: omp.dispatch.end: 2994 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2995 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 2996 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 2997 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2998 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2999 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3000 // CHECK11: .omp.final.then: 3001 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3002 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0 3003 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 3004 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 3005 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 3006 // CHECK11-NEXT: store i32 [[ADD14]], ptr [[I4]], align 4 3007 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3008 // CHECK11: .omp.final.done: 3009 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3010 // CHECK11: omp.precond.end: 3011 // CHECK11-NEXT: ret void 3012 // 3013 // 3014 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3015 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3016 // CHECK11-NEXT: entry: 3017 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3018 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3019 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 3020 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 3021 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 3022 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3023 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3024 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 3025 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 3026 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 3027 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3028 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3029 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 4 3030 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 4 3031 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 4 3032 // CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 3033 // CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3034 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3035 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3036 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 3037 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3038 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 3039 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3040 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 3041 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3042 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3043 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 3044 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4 3045 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 3046 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4 3047 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 3048 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 3049 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 3050 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 3051 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 3052 // CHECK11-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 4 3053 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 3054 // CHECK11-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 4 3055 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3056 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 3057 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3058 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 3059 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3060 // CHECK11-NEXT: store i64 10, ptr [[TMP13]], align 8 3061 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3062 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 3063 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3064 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 3065 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3066 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4 3067 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3068 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4 3069 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, ptr [[KERNEL_ARGS]]) 3070 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 3071 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3072 // CHECK11: omp_offload.failed: 3073 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76(ptr [[A]]) #[[ATTR3]] 3074 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3075 // CHECK11: omp_offload.cont: 3076 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3077 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP20]], align 4 3078 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3079 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP21]], align 4 3080 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 3081 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 3082 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3083 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3084 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 3085 // CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 4 3086 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 3087 // CHECK11-NEXT: store i32 1, ptr [[TMP26]], align 4 3088 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 3089 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 3090 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 3091 // CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 3092 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 3093 // CHECK11-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 4 3094 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 3095 // CHECK11-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 4 3096 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 3097 // CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 4 3098 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 3099 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 4 3100 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 3101 // CHECK11-NEXT: store i64 10, ptr [[TMP33]], align 8 3102 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 3103 // CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 8 3104 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 3105 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 3106 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 3107 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4 3108 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 3109 // CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 4 3110 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, ptr [[KERNEL_ARGS5]]) 3111 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 3112 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 3113 // CHECK11: omp_offload.failed6: 3114 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80(ptr [[A]]) #[[ATTR3]] 3115 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]] 3116 // CHECK11: omp_offload.cont7: 3117 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 3118 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP40]], align 4 3119 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 3120 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP41]], align 4 3121 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 3122 // CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 4 3123 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 3124 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 3125 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 3126 // CHECK11-NEXT: store i32 3, ptr [[TMP45]], align 4 3127 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 3128 // CHECK11-NEXT: store i32 1, ptr [[TMP46]], align 4 3129 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 3130 // CHECK11-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 3131 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 3132 // CHECK11-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 3133 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 3134 // CHECK11-NEXT: store ptr @.offload_sizes.9, ptr [[TMP49]], align 4 3135 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 3136 // CHECK11-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP50]], align 4 3137 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 3138 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4 3139 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 3140 // CHECK11-NEXT: store ptr null, ptr [[TMP52]], align 4 3141 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 3142 // CHECK11-NEXT: store i64 10, ptr [[TMP53]], align 8 3143 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 3144 // CHECK11-NEXT: store i64 0, ptr [[TMP54]], align 8 3145 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 3146 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 3147 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 3148 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4 3149 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 3150 // CHECK11-NEXT: store i32 0, ptr [[TMP57]], align 4 3151 // CHECK11-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS12]]) 3152 // CHECK11-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 3153 // CHECK11-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 3154 // CHECK11: omp_offload.failed13: 3155 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]] 3156 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]] 3157 // CHECK11: omp_offload.cont14: 3158 // CHECK11-NEXT: ret i32 0 3159 // 3160 // 3161 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 3162 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3163 // CHECK11-NEXT: entry: 3164 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3165 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3166 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3167 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined, ptr [[TMP0]]) 3168 // CHECK11-NEXT: ret void 3169 // 3170 // 3171 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined 3172 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3173 // CHECK11-NEXT: entry: 3174 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3175 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3176 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3177 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3178 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3179 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3180 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3181 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3182 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3183 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3184 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3185 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3186 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3187 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3188 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3189 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3190 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3191 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3192 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3193 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3194 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3195 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3196 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3197 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3198 // CHECK11: cond.true: 3199 // CHECK11-NEXT: br label [[COND_END:%.*]] 3200 // CHECK11: cond.false: 3201 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3202 // CHECK11-NEXT: br label [[COND_END]] 3203 // CHECK11: cond.end: 3204 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3205 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3206 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3207 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3208 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3209 // CHECK11: omp.inner.for.cond: 3210 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 3211 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 3212 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3213 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3214 // CHECK11: omp.inner.for.body: 3215 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 3216 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3217 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3218 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 3219 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 3220 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]] 3221 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]] 3222 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3223 // CHECK11: omp.body.continue: 3224 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3225 // CHECK11: omp.inner.for.inc: 3226 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 3227 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3228 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 3229 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 3230 // CHECK11: omp.inner.for.end: 3231 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3232 // CHECK11: omp.loop.exit: 3233 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3234 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3235 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3236 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3237 // CHECK11: .omp.final.then: 3238 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 3239 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3240 // CHECK11: .omp.final.done: 3241 // CHECK11-NEXT: ret void 3242 // 3243 // 3244 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 3245 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3246 // CHECK11-NEXT: entry: 3247 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3248 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3249 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3250 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined, ptr [[TMP0]]) 3251 // CHECK11-NEXT: ret void 3252 // 3253 // 3254 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined 3255 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3256 // CHECK11-NEXT: entry: 3257 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3258 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3259 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3260 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3261 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3262 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3263 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3264 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3265 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3266 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3267 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3268 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3269 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3270 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3271 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3272 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3273 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3274 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3275 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3276 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3277 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3278 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3279 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3280 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3281 // CHECK11: cond.true: 3282 // CHECK11-NEXT: br label [[COND_END:%.*]] 3283 // CHECK11: cond.false: 3284 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3285 // CHECK11-NEXT: br label [[COND_END]] 3286 // CHECK11: cond.end: 3287 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3288 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3289 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3290 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3291 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3292 // CHECK11: omp.inner.for.cond: 3293 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 3294 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 3295 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3296 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3297 // CHECK11: omp.inner.for.body: 3298 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 3299 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3300 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3301 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 3302 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 3303 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]] 3304 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 3305 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3306 // CHECK11: omp.body.continue: 3307 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3308 // CHECK11: omp.inner.for.inc: 3309 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 3310 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3311 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 3312 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 3313 // CHECK11: omp.inner.for.end: 3314 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3315 // CHECK11: omp.loop.exit: 3316 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3317 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3318 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3319 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3320 // CHECK11: .omp.final.then: 3321 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 3322 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3323 // CHECK11: .omp.final.done: 3324 // CHECK11-NEXT: ret void 3325 // 3326 // 3327 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 3328 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3329 // CHECK11-NEXT: entry: 3330 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3331 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3332 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3333 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]]) 3334 // CHECK11-NEXT: ret void 3335 // 3336 // 3337 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined 3338 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3339 // CHECK11-NEXT: entry: 3340 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3341 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3342 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3343 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3344 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3345 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3346 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3347 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3348 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3349 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3350 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3351 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3352 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3353 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3354 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3355 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3356 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3357 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3358 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3359 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3360 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10) 3361 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3362 // CHECK11: omp.dispatch.cond: 3363 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3364 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3365 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3366 // CHECK11: cond.true: 3367 // CHECK11-NEXT: br label [[COND_END:%.*]] 3368 // CHECK11: cond.false: 3369 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3370 // CHECK11-NEXT: br label [[COND_END]] 3371 // CHECK11: cond.end: 3372 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3373 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3374 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3375 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3376 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3377 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3378 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3379 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3380 // CHECK11: omp.dispatch.body: 3381 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3382 // CHECK11: omp.inner.for.cond: 3383 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 3384 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 3385 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3386 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3387 // CHECK11: omp.inner.for.body: 3388 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 3389 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3390 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3391 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]] 3392 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]] 3393 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 3394 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP28]] 3395 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3396 // CHECK11: omp.body.continue: 3397 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3398 // CHECK11: omp.inner.for.inc: 3399 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 3400 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3401 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 3402 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 3403 // CHECK11: omp.inner.for.end: 3404 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3405 // CHECK11: omp.dispatch.inc: 3406 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3407 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3408 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3409 // CHECK11-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 3410 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3411 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3412 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3413 // CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 3414 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 3415 // CHECK11: omp.dispatch.end: 3416 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3417 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3418 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3419 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3420 // CHECK11: .omp.final.then: 3421 // CHECK11-NEXT: store i32 10, ptr [[I]], align 4 3422 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3423 // CHECK11: .omp.final.done: 3424 // CHECK11-NEXT: ret void 3425 // 3426 // 3427 // CHECK13-LABEL: define {{[^@]+}}@main 3428 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3429 // CHECK13-NEXT: entry: 3430 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3431 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3432 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 3433 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3434 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 3435 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3436 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3437 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3438 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3439 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3440 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3441 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3442 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3443 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 3444 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3445 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3446 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3447 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3448 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3449 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4 3450 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3451 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3452 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 3453 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 3454 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3455 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 3456 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 3457 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 3458 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4 3459 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 3460 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4 3461 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 3462 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3463 // CHECK13-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 3464 // CHECK13-NEXT: store i32 100, ptr [[N]], align 4 3465 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 3466 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3467 // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 3468 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 3469 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3470 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 3471 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 3472 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 3473 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3474 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3475 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3476 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3477 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3478 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3479 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3480 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 3481 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 3482 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3483 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3484 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3485 // CHECK13: simd.if.then: 3486 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3487 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3488 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3489 // CHECK13: omp.inner.for.cond: 3490 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 3491 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 3492 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3493 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3494 // CHECK13: omp.inner.for.body: 3495 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3496 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3497 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3498 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 3499 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 3500 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3501 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]] 3502 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 3503 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3504 // CHECK13: omp.body.continue: 3505 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3506 // CHECK13: omp.inner.for.inc: 3507 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3508 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 3509 // CHECK13-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3510 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3511 // CHECK13: omp.inner.for.end: 3512 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3513 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 3514 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3515 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3516 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3517 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 3518 // CHECK13-NEXT: br label [[SIMD_IF_END]] 3519 // CHECK13: simd.if.end: 3520 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[N]], align 4 3521 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTCAPTURE_EXPR_11]], align 4 3522 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 3523 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 3524 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3525 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3526 // CHECK13-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4 3527 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 4 3528 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 3529 // CHECK13-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_UB17]], align 4 3530 // CHECK13-NEXT: store i32 0, ptr [[I18]], align 4 3531 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 3532 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 3533 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 3534 // CHECK13: simd.if.then20: 3535 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4 3536 // CHECK13-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV21]], align 4 3537 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3538 // CHECK13: omp.inner.for.cond23: 3539 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 3540 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP6]] 3541 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3542 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3543 // CHECK13: omp.inner.for.body25: 3544 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 3545 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 3546 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3547 // CHECK13-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]] 3548 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]] 3549 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 3550 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM28]] 3551 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP6]] 3552 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3553 // CHECK13: omp.body.continue30: 3554 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3555 // CHECK13: omp.inner.for.inc31: 3556 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 3557 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 3558 // CHECK13-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 3559 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 3560 // CHECK13: omp.inner.for.end33: 3561 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 3562 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 3563 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 3564 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 3565 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 3566 // CHECK13-NEXT: store i32 [[ADD37]], ptr [[I22]], align 4 3567 // CHECK13-NEXT: br label [[SIMD_IF_END38]] 3568 // CHECK13: simd.if.end38: 3569 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 4 3570 // CHECK13-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_39]], align 4 3571 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[N]], align 4 3572 // CHECK13-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR_41]], align 4 3573 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 3574 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 3575 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 3576 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 3577 // CHECK13-NEXT: store i32 [[SUB45]], ptr [[DOTCAPTURE_EXPR_42]], align 4 3578 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB46]], align 4 3579 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_42]], align 4 3580 // CHECK13-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_UB47]], align 4 3581 // CHECK13-NEXT: store i32 0, ptr [[I48]], align 4 3582 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 3583 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 3584 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 3585 // CHECK13: simd.if.then50: 3586 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_LB46]], align 4 3587 // CHECK13-NEXT: store i32 [[TMP30]], ptr [[DOTOMP_IV51]], align 4 3588 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 3589 // CHECK13: omp.inner.for.cond53: 3590 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 3591 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_UB47]], align 4, !llvm.access.group [[ACC_GRP9]] 3592 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 3593 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 3594 // CHECK13: omp.inner.for.body55: 3595 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 3596 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 3597 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 3598 // CHECK13-NEXT: store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]] 3599 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]] 3600 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 3601 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM58]] 3602 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX59]], align 4, !llvm.access.group [[ACC_GRP9]] 3603 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 3604 // CHECK13: omp.body.continue60: 3605 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 3606 // CHECK13: omp.inner.for.inc61: 3607 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 3608 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 3609 // CHECK13-NEXT: store i32 [[ADD62]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 3610 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 3611 // CHECK13: omp.inner.for.end63: 3612 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 3613 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 3614 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 3615 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 3616 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 3617 // CHECK13-NEXT: store i32 [[ADD67]], ptr [[I52]], align 4 3618 // CHECK13-NEXT: br label [[SIMD_IF_END68]] 3619 // CHECK13: simd.if.end68: 3620 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 3621 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 3622 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 3623 // CHECK13-NEXT: [[TMP38:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 3624 // CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP38]]) 3625 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4 3626 // CHECK13-NEXT: ret i32 [[TMP39]] 3627 // 3628 // 3629 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3630 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3631 // CHECK13-NEXT: entry: 3632 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3633 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3634 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3635 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3636 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3637 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3638 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3639 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3640 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3641 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3642 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3643 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 3644 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 3645 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 3646 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 3647 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3648 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3649 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3650 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3651 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3652 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3653 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3654 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3655 // CHECK13: omp.inner.for.cond: 3656 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 3657 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 3658 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3659 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3660 // CHECK13: omp.inner.for.body: 3661 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 3662 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3663 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3664 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 3665 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 3666 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 3667 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 3668 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 3669 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3670 // CHECK13: omp.body.continue: 3671 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3672 // CHECK13: omp.inner.for.inc: 3673 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 3674 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3675 // CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 3676 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3677 // CHECK13: omp.inner.for.end: 3678 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 3679 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3680 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 4 3681 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3682 // CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4 3683 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3684 // CHECK13: omp.inner.for.cond7: 3685 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 3686 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP15]] 3687 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3688 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 3689 // CHECK13: omp.inner.for.body9: 3690 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]] 3691 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3692 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3693 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]] 3694 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]] 3695 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 3696 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM12]] 3697 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX13]], align 4, !llvm.access.group [[ACC_GRP15]] 3698 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 3699 // CHECK13: omp.body.continue14: 3700 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 3701 // CHECK13: omp.inner.for.inc15: 3702 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]] 3703 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 3704 // CHECK13-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]] 3705 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 3706 // CHECK13: omp.inner.for.end17: 3707 // CHECK13-NEXT: store i32 10, ptr [[I6]], align 4 3708 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB19]], align 4 3709 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB20]], align 4 3710 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 4 3711 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV21]], align 4 3712 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3713 // CHECK13: omp.inner.for.cond23: 3714 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 3715 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP18]] 3716 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3717 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3718 // CHECK13: omp.inner.for.body25: 3719 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]] 3720 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1 3721 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3722 // CHECK13-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]] 3723 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]] 3724 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64 3725 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM28]] 3726 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP18]] 3727 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3728 // CHECK13: omp.body.continue30: 3729 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3730 // CHECK13: omp.inner.for.inc31: 3731 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]] 3732 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1 3733 // CHECK13-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]] 3734 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 3735 // CHECK13: omp.inner.for.end33: 3736 // CHECK13-NEXT: store i32 10, ptr [[I22]], align 4 3737 // CHECK13-NEXT: ret i32 0 3738 // 3739 // 3740 // CHECK15-LABEL: define {{[^@]+}}@main 3741 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3742 // CHECK15-NEXT: entry: 3743 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3744 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3745 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 3746 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 3747 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 3748 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3749 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3750 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3751 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3752 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3753 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3754 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3755 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3756 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 3757 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3758 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3759 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3760 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3761 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3762 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4 3763 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3764 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4 3765 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 3766 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 3767 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 3768 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3769 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 3770 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 3771 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4 3772 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 3773 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4 3774 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 3775 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3776 // CHECK15-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 3777 // CHECK15-NEXT: store i32 100, ptr [[N]], align 4 3778 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 3779 // CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 3780 // CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 3781 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3782 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 3783 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 3784 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 3785 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3786 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3787 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3788 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3789 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3790 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3791 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3792 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 3793 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 3794 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3795 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3796 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3797 // CHECK15: simd.if.then: 3798 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3799 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3800 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3801 // CHECK15: omp.inner.for.cond: 3802 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 3803 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 3804 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3805 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3806 // CHECK15: omp.inner.for.body: 3807 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 3808 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3809 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3810 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 3811 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 3812 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP10]] 3813 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 3814 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3815 // CHECK15: omp.body.continue: 3816 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3817 // CHECK15: omp.inner.for.inc: 3818 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 3819 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 3820 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 3821 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3822 // CHECK15: omp.inner.for.end: 3823 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3824 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 3825 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3826 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3827 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3828 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 3829 // CHECK15-NEXT: br label [[SIMD_IF_END]] 3830 // CHECK15: simd.if.end: 3831 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[N]], align 4 3832 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTCAPTURE_EXPR_11]], align 4 3833 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 3834 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 3835 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3836 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3837 // CHECK15-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4 3838 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 4 3839 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 3840 // CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_UB17]], align 4 3841 // CHECK15-NEXT: store i32 0, ptr [[I18]], align 4 3842 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 3843 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 3844 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 3845 // CHECK15: simd.if.then20: 3846 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4 3847 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV21]], align 4 3848 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3849 // CHECK15: omp.inner.for.cond23: 3850 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 3851 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP7]] 3852 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3853 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 3854 // CHECK15: omp.inner.for.body25: 3855 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 3856 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 3857 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3858 // CHECK15-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]] 3859 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]] 3860 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP21]] 3861 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX28]], align 4, !llvm.access.group [[ACC_GRP7]] 3862 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 3863 // CHECK15: omp.body.continue29: 3864 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 3865 // CHECK15: omp.inner.for.inc30: 3866 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 3867 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 3868 // CHECK15-NEXT: store i32 [[ADD31]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 3869 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 3870 // CHECK15: omp.inner.for.end32: 3871 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 3872 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 3873 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 3874 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 3875 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 3876 // CHECK15-NEXT: store i32 [[ADD36]], ptr [[I22]], align 4 3877 // CHECK15-NEXT: br label [[SIMD_IF_END37]] 3878 // CHECK15: simd.if.end37: 3879 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[N]], align 4 3880 // CHECK15-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_38]], align 4 3881 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 4 3882 // CHECK15-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_40]], align 4 3883 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 3884 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 3885 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 3886 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 3887 // CHECK15-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 3888 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB45]], align 4 3889 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 3890 // CHECK15-NEXT: store i32 [[TMP27]], ptr [[DOTOMP_UB46]], align 4 3891 // CHECK15-NEXT: store i32 0, ptr [[I47]], align 4 3892 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 3893 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 3894 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 3895 // CHECK15: simd.if.then49: 3896 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_LB45]], align 4 3897 // CHECK15-NEXT: store i32 [[TMP29]], ptr [[DOTOMP_IV50]], align 4 3898 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 3899 // CHECK15: omp.inner.for.cond52: 3900 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 3901 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_UB46]], align 4, !llvm.access.group [[ACC_GRP10]] 3902 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 3903 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 3904 // CHECK15: omp.inner.for.body54: 3905 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 3906 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 3907 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 3908 // CHECK15-NEXT: store i32 [[ADD56]], ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]] 3909 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]] 3910 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP33]] 3911 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX57]], align 4, !llvm.access.group [[ACC_GRP10]] 3912 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 3913 // CHECK15: omp.body.continue58: 3914 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 3915 // CHECK15: omp.inner.for.inc59: 3916 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 3917 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 3918 // CHECK15-NEXT: store i32 [[ADD60]], ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 3919 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 3920 // CHECK15: omp.inner.for.end61: 3921 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 3922 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 3923 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 3924 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 3925 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 3926 // CHECK15-NEXT: store i32 [[ADD65]], ptr [[I51]], align 4 3927 // CHECK15-NEXT: br label [[SIMD_IF_END66]] 3928 // CHECK15: simd.if.end66: 3929 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 3930 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 3931 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 3932 // CHECK15-NEXT: [[TMP37:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 3933 // CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP37]]) 3934 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 4 3935 // CHECK15-NEXT: ret i32 [[TMP38]] 3936 // 3937 // 3938 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3939 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3940 // CHECK15-NEXT: entry: 3941 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3942 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3943 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3944 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3945 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3946 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3947 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3948 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3949 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3950 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3951 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3952 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 3953 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 3954 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 3955 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 3956 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 3957 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 3958 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 3959 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3960 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 3961 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3962 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3963 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3964 // CHECK15: omp.inner.for.cond: 3965 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 3966 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 3967 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3968 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3969 // CHECK15: omp.inner.for.body: 3970 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3971 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3972 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3973 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 3974 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 3975 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 3976 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 3977 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3978 // CHECK15: omp.body.continue: 3979 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3980 // CHECK15: omp.inner.for.inc: 3981 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3982 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3983 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3984 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3985 // CHECK15: omp.inner.for.end: 3986 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 3987 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3988 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 4 3989 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3990 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4 3991 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3992 // CHECK15: omp.inner.for.cond7: 3993 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 3994 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP16]] 3995 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3996 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 3997 // CHECK15: omp.inner.for.body9: 3998 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]] 3999 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 4000 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4001 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]] 4002 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]] 4003 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP10]] 4004 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP16]] 4005 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 4006 // CHECK15: omp.body.continue13: 4007 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 4008 // CHECK15: omp.inner.for.inc14: 4009 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]] 4010 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 4011 // CHECK15-NEXT: store i32 [[ADD15]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]] 4012 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 4013 // CHECK15: omp.inner.for.end16: 4014 // CHECK15-NEXT: store i32 10, ptr [[I6]], align 4 4015 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 4 4016 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB19]], align 4 4017 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 4 4018 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV20]], align 4 4019 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 4020 // CHECK15: omp.inner.for.cond22: 4021 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 4022 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4, !llvm.access.group [[ACC_GRP19]] 4023 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4024 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 4025 // CHECK15: omp.inner.for.body24: 4026 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]] 4027 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1 4028 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 4029 // CHECK15-NEXT: store i32 [[ADD26]], ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]] 4030 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]] 4031 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP16]] 4032 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX27]], align 4, !llvm.access.group [[ACC_GRP19]] 4033 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 4034 // CHECK15: omp.body.continue28: 4035 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 4036 // CHECK15: omp.inner.for.inc29: 4037 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]] 4038 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1 4039 // CHECK15-NEXT: store i32 [[ADD30]], ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]] 4040 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 4041 // CHECK15: omp.inner.for.end31: 4042 // CHECK15-NEXT: store i32 10, ptr [[I21]], align 4 4043 // CHECK15-NEXT: ret i32 0 4044 // 4045