1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target teams distribute reduction(+: t_var) 33 for (int i = 0; i < 2; ++i) { 34 t_var += (T) i; 35 } 36 37 #pragma omp target teams distribute reduction(-: t_var) 38 for (int i = 0; i < 2; ++i) { 39 t_var -= vec[i]; 40 } 41 42 t_var = T(1); 43 #pragma omp target teams distribute reduction(*: t_var) 44 for (int i = 0; i < 2; ++i) { 45 t_var = t_var * vec[i]; 46 } 47 48 bool and_var = true; 49 #pragma omp target teams distribute reduction(&&: and_var) 50 for (int i = 0; i < 2; ++i) { 51 and_var = and_var && (vec[i]%2 == 0); 52 } 53 54 bool or_var = false; 55 #pragma omp target teams distribute reduction(||: or_var) 56 for (int i = 0; i < 2; ++i) { 57 or_var = or_var || (vec[i]%2 == 0); 58 } 59 60 unsigned int bit_var = 1; 61 #pragma omp target teams distribute reduction(&: bit_var) 62 for (int i = 0; i < 2; ++i) { 63 bit_var = (bit_var & vec[i]); 64 } 65 66 #pragma omp target teams distribute reduction(|: bit_var) 67 for (int i = 0; i < 2; ++i) { 68 bit_var = (bit_var | vec[i]); 69 } 70 71 #pragma omp target teams distribute reduction(^: bit_var) 72 for (int i = 0; i < 2; ++i) { 73 bit_var = (bit_var ^ vec[i]); 74 } 75 76 t_var = T(0); 77 #pragma omp target teams distribute reduction(max: t_var) 78 for (int i = 0; i < 2; ++i) { 79 t_var = t_var >= vec[i] ? t_var : vec[i]; 80 } 81 82 t_var = T(10); 83 #pragma omp target teams distribute reduction(min: t_var) 84 for (int i = 0; i < 2; ++i) { 85 t_var = t_var <= vec[i] ? t_var : vec[i]; 86 } 87 88 return T(); 89 } 90 91 int main() { 92 static int sivar; 93 #ifdef LAMBDA 94 95 [&]() { 96 #pragma omp target teams distribute reduction(+: sivar) 97 for (int i = 0; i < 2; ++i) { 98 99 // Skip global and bound tid vars 100 101 sivar += i; 102 103 [&]() { 104 105 sivar += 4; 106 107 }(); 108 } 109 }(); 110 111 [&]() { 112 #pragma omp target teams distribute reduction(-: sivar) 113 for (int i = 0; i < 2; ++i) { 114 sivar -= i; 115 [&]() { 116 sivar += 4; 117 }(); 118 } 119 }(); 120 121 [&]() { 122 #pragma omp target teams distribute reduction(*: sivar) 123 for (int i = 0; i < 2; ++i) { 124 sivar *= i; 125 [&]() { 126 sivar += 4; 127 }(); 128 } 129 }(); 130 131 [&]() { 132 bool and_var = true; 133 #pragma omp target teams distribute reduction(&&: and_var) 134 for (int i = 0; i < 2; ++i) { 135 and_var = and_var && (i == 0); 136 [&]() { 137 sivar += 4; 138 }(); 139 } 140 }(); 141 142 [&]() { 143 bool or_var = true; 144 #pragma omp target teams distribute reduction(||: or_var) 145 for (int i = 0; i < 2; ++i) { 146 or_var = or_var || (i == 0); 147 [&]() { 148 sivar += 4; 149 }(); 150 } 151 }(); 152 153 [&]() { 154 unsigned int bit_var = true; 155 #pragma omp target teams distribute reduction(&: bit_var) 156 for (int i = 0; i < 2; ++i) { 157 bit_var = (bit_var & i); 158 [&]() { 159 sivar += 4; 160 }(); 161 } 162 }(); 163 164 [&]() { 165 unsigned int bit_var = false; 166 #pragma omp target teams distribute reduction(|: bit_var) 167 for (int i = 0; i < 2; ++i) { 168 bit_var = (bit_var | i); 169 [&]() { 170 sivar += 4; 171 }(); 172 } 173 }(); 174 175 [&]() { 176 unsigned int bit_var = false; 177 #pragma omp target teams distribute reduction(^: bit_var) 178 for (int i = 0; i < 2; ++i) { 179 bit_var = (bit_var ^ i); 180 [&]() { 181 sivar += 4; 182 }(); 183 } 184 }(); 185 186 [&]() { 187 int max_var = 0; 188 #pragma omp target teams distribute reduction(max: max_var) 189 for (int i = 0; i < 2; ++i) { 190 max_var = max_var >= i ? max_var : i; 191 [&]() { 192 max_var += 4; 193 }(); 194 } 195 }(); 196 197 [&]() { 198 int min_var = 10; 199 #pragma omp target teams distribute reduction(min: min_var) 200 for (int i = 0; i < 2; ++i) { 201 min_var = min_var <= i ? min_var : i; 202 [&]() { 203 min_var += 4; 204 }(); 205 } 206 }(); 207 return 0; 208 #else 209 #pragma omp target teams distribute reduction(+: sivar) 210 for (int i = 0; i < 2; ++i) { 211 sivar += i; 212 } 213 214 #pragma omp target teams distribute reduction(-: sivar) 215 for (int i = 0; i < 2; ++i) { 216 sivar -= i; 217 } 218 219 sivar = 1; 220 #pragma omp target teams distribute reduction(*: sivar) 221 for (int i = 0; i < 2; ++i) { 222 sivar = sivar * i; 223 } 224 225 bool and_var = true; 226 #pragma omp target teams distribute reduction(&&: and_var) 227 for (int i = 0; i < 2; ++i) { 228 and_var = and_var && (i == 0); 229 } 230 231 bool or_var = false; 232 #pragma omp target teams distribute reduction(||: or_var) 233 for (int i = 0; i < 2; ++i) { 234 or_var = or_var || (i == 0); 235 } 236 237 unsigned int bit_var = 1; 238 #pragma omp target teams distribute reduction(&: bit_var) 239 for (int i = 0; i < 2; ++i) { 240 bit_var = (bit_var & i); 241 } 242 243 #pragma omp target teams distribute reduction(|: bit_var) 244 for (int i = 0; i < 2; ++i) { 245 bit_var = (bit_var | i); 246 } 247 248 #pragma omp target teams distribute reduction(^: bit_var) 249 for (int i = 0; i < 2; ++i) { 250 bit_var = (bit_var ^ i); 251 } 252 253 sivar = 0; 254 #pragma omp target teams distribute reduction(max: sivar) 255 for (int i = 0; i < 2; ++i) { 256 sivar = sivar >= i ? sivar : i; 257 } 258 259 sivar = 10; 260 #pragma omp target teams distribute reduction(min: sivar) 261 for (int i = 0; i < 2; ++i) { 262 sivar = sivar <= i ? sivar : i; 263 } 264 265 return tmain<int>(); 266 #endif 267 } 268 269 270 #endif 271 // CHECK1-LABEL: define {{[^@]+}}@main 272 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 275 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 276 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 277 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 278 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 279 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 280 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 281 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 282 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 283 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 284 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 285 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 8 286 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 8 287 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 8 288 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 290 // CHECK1-NEXT: [[AND_VAR:%.*]] = alloca i8, align 1 291 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8 292 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8 293 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8 294 // CHECK1-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 296 // CHECK1-NEXT: [[OR_VAR:%.*]] = alloca i8, align 1 297 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [1 x ptr], align 8 298 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [1 x ptr], align 8 299 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [1 x ptr], align 8 300 // CHECK1-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 302 // CHECK1-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [1 x ptr], align 8 304 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [1 x ptr], align 8 305 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [1 x ptr], align 8 306 // CHECK1-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 307 // CHECK1-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 308 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [1 x ptr], align 8 309 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [1 x ptr], align 8 310 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [1 x ptr], align 8 311 // CHECK1-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 312 // CHECK1-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 313 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [1 x ptr], align 8 314 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [1 x ptr], align 8 315 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [1 x ptr], align 8 316 // CHECK1-NEXT: [[_TMP46:%.*]] = alloca i32, align 4 317 // CHECK1-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 318 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [1 x ptr], align 8 319 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [1 x ptr], align 8 320 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [1 x ptr], align 8 321 // CHECK1-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 323 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [1 x ptr], align 8 324 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [1 x ptr], align 8 325 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [1 x ptr], align 8 326 // CHECK1-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 327 // CHECK1-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 328 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 329 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 330 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 8 331 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 332 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP1]], align 8 333 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 334 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 335 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 336 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 337 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 338 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 339 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 340 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 341 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 342 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 343 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 344 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 345 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 346 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 347 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 348 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 349 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 350 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 351 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 352 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 353 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 354 // CHECK1-NEXT: store i64 2, ptr [[TMP13]], align 8 355 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 356 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 357 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 358 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 359 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 360 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 361 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 362 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 363 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.region_id, ptr [[KERNEL_ARGS]]) 364 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 365 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 366 // CHECK1: omp_offload.failed: 367 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209(ptr @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 368 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 369 // CHECK1: omp_offload.cont: 370 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 371 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP20]], align 8 372 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 373 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP21]], align 8 374 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 375 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 376 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 377 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 378 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 379 // CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4 380 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 381 // CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4 382 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 383 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 384 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 385 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 386 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 387 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 388 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 389 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 390 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 391 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 392 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 393 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 394 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 395 // CHECK1-NEXT: store i64 2, ptr [[TMP33]], align 8 396 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 397 // CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8 398 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 399 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 400 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 401 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 402 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 403 // CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4 404 // CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.region_id, ptr [[KERNEL_ARGS5]]) 405 // CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 406 // CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 407 // CHECK1: omp_offload.failed6: 408 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 409 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 410 // CHECK1: omp_offload.cont7: 411 // CHECK1-NEXT: store i32 1, ptr @_ZZ4mainE5sivar, align 4 412 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 413 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP40]], align 8 414 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 415 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP41]], align 8 416 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 417 // CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8 418 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 419 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 420 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 421 // CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4 422 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 423 // CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4 424 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 425 // CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 426 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 427 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 428 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 429 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 430 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 431 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 432 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 433 // CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8 434 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 435 // CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8 436 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 437 // CHECK1-NEXT: store i64 2, ptr [[TMP53]], align 8 438 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 439 // CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8 440 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 441 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 442 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 443 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 444 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 445 // CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4 446 // CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.region_id, ptr [[KERNEL_ARGS12]]) 447 // CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 448 // CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 449 // CHECK1: omp_offload.failed13: 450 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 451 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT14]] 452 // CHECK1: omp_offload.cont14: 453 // CHECK1-NEXT: store i8 1, ptr [[AND_VAR]], align 1 454 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 455 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP60]], align 8 456 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 457 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP61]], align 8 458 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0 459 // CHECK1-NEXT: store ptr null, ptr [[TMP62]], align 8 460 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 461 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 462 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 463 // CHECK1-NEXT: store i32 3, ptr [[TMP65]], align 4 464 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 465 // CHECK1-NEXT: store i32 1, ptr [[TMP66]], align 4 466 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 467 // CHECK1-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8 468 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 469 // CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8 470 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 471 // CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8 472 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 473 // CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8 474 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 475 // CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 8 476 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 477 // CHECK1-NEXT: store ptr null, ptr [[TMP72]], align 8 478 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 479 // CHECK1-NEXT: store i64 2, ptr [[TMP73]], align 8 480 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 481 // CHECK1-NEXT: store i64 0, ptr [[TMP74]], align 8 482 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 483 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 484 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 485 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 486 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 487 // CHECK1-NEXT: store i32 0, ptr [[TMP77]], align 4 488 // CHECK1-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.region_id, ptr [[KERNEL_ARGS19]]) 489 // CHECK1-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 490 // CHECK1-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 491 // CHECK1: omp_offload.failed20: 492 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226(ptr [[AND_VAR]]) #[[ATTR2]] 493 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]] 494 // CHECK1: omp_offload.cont21: 495 // CHECK1-NEXT: store i8 0, ptr [[OR_VAR]], align 1 496 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 497 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP80]], align 8 498 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 499 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP81]], align 8 500 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 501 // CHECK1-NEXT: store ptr null, ptr [[TMP82]], align 8 502 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 503 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 504 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 0 505 // CHECK1-NEXT: store i32 3, ptr [[TMP85]], align 4 506 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 1 507 // CHECK1-NEXT: store i32 1, ptr [[TMP86]], align 4 508 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 2 509 // CHECK1-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8 510 // CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 3 511 // CHECK1-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8 512 // CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 4 513 // CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8 514 // CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 5 515 // CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8 516 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 6 517 // CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 8 518 // CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 7 519 // CHECK1-NEXT: store ptr null, ptr [[TMP92]], align 8 520 // CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 8 521 // CHECK1-NEXT: store i64 2, ptr [[TMP93]], align 8 522 // CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 9 523 // CHECK1-NEXT: store i64 0, ptr [[TMP94]], align 8 524 // CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 10 525 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 526 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 11 527 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 528 // CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 12 529 // CHECK1-NEXT: store i32 0, ptr [[TMP97]], align 4 530 // CHECK1-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.region_id, ptr [[KERNEL_ARGS26]]) 531 // CHECK1-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 532 // CHECK1-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 533 // CHECK1: omp_offload.failed27: 534 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232(ptr [[OR_VAR]]) #[[ATTR2]] 535 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT28]] 536 // CHECK1: omp_offload.cont28: 537 // CHECK1-NEXT: store i32 1, ptr [[BIT_VAR]], align 4 538 // CHECK1-NEXT: [[TMP100:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 539 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP100]], align 8 540 // CHECK1-NEXT: [[TMP101:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 541 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP101]], align 8 542 // CHECK1-NEXT: [[TMP102:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0 543 // CHECK1-NEXT: store ptr null, ptr [[TMP102]], align 8 544 // CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 545 // CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 546 // CHECK1-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 0 547 // CHECK1-NEXT: store i32 3, ptr [[TMP105]], align 4 548 // CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 1 549 // CHECK1-NEXT: store i32 1, ptr [[TMP106]], align 4 550 // CHECK1-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 2 551 // CHECK1-NEXT: store ptr [[TMP103]], ptr [[TMP107]], align 8 552 // CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 3 553 // CHECK1-NEXT: store ptr [[TMP104]], ptr [[TMP108]], align 8 554 // CHECK1-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 4 555 // CHECK1-NEXT: store ptr @.offload_sizes.9, ptr [[TMP109]], align 8 556 // CHECK1-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 5 557 // CHECK1-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP110]], align 8 558 // CHECK1-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 6 559 // CHECK1-NEXT: store ptr null, ptr [[TMP111]], align 8 560 // CHECK1-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 7 561 // CHECK1-NEXT: store ptr null, ptr [[TMP112]], align 8 562 // CHECK1-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 8 563 // CHECK1-NEXT: store i64 2, ptr [[TMP113]], align 8 564 // CHECK1-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 9 565 // CHECK1-NEXT: store i64 0, ptr [[TMP114]], align 8 566 // CHECK1-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 10 567 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4 568 // CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 11 569 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP116]], align 4 570 // CHECK1-NEXT: [[TMP117:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 12 571 // CHECK1-NEXT: store i32 0, ptr [[TMP117]], align 4 572 // CHECK1-NEXT: [[TMP118:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.region_id, ptr [[KERNEL_ARGS33]]) 573 // CHECK1-NEXT: [[TMP119:%.*]] = icmp ne i32 [[TMP118]], 0 574 // CHECK1-NEXT: br i1 [[TMP119]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]] 575 // CHECK1: omp_offload.failed34: 576 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238(ptr [[BIT_VAR]]) #[[ATTR2]] 577 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT35]] 578 // CHECK1: omp_offload.cont35: 579 // CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 580 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP120]], align 8 581 // CHECK1-NEXT: [[TMP121:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 582 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP121]], align 8 583 // CHECK1-NEXT: [[TMP122:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 584 // CHECK1-NEXT: store ptr null, ptr [[TMP122]], align 8 585 // CHECK1-NEXT: [[TMP123:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 586 // CHECK1-NEXT: [[TMP124:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 587 // CHECK1-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 0 588 // CHECK1-NEXT: store i32 3, ptr [[TMP125]], align 4 589 // CHECK1-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 1 590 // CHECK1-NEXT: store i32 1, ptr [[TMP126]], align 4 591 // CHECK1-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 2 592 // CHECK1-NEXT: store ptr [[TMP123]], ptr [[TMP127]], align 8 593 // CHECK1-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 3 594 // CHECK1-NEXT: store ptr [[TMP124]], ptr [[TMP128]], align 8 595 // CHECK1-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 4 596 // CHECK1-NEXT: store ptr @.offload_sizes.11, ptr [[TMP129]], align 8 597 // CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 5 598 // CHECK1-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP130]], align 8 599 // CHECK1-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 6 600 // CHECK1-NEXT: store ptr null, ptr [[TMP131]], align 8 601 // CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 7 602 // CHECK1-NEXT: store ptr null, ptr [[TMP132]], align 8 603 // CHECK1-NEXT: [[TMP133:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 8 604 // CHECK1-NEXT: store i64 2, ptr [[TMP133]], align 8 605 // CHECK1-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 9 606 // CHECK1-NEXT: store i64 0, ptr [[TMP134]], align 8 607 // CHECK1-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 10 608 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP135]], align 4 609 // CHECK1-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 11 610 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP136]], align 4 611 // CHECK1-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 12 612 // CHECK1-NEXT: store i32 0, ptr [[TMP137]], align 4 613 // CHECK1-NEXT: [[TMP138:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.region_id, ptr [[KERNEL_ARGS40]]) 614 // CHECK1-NEXT: [[TMP139:%.*]] = icmp ne i32 [[TMP138]], 0 615 // CHECK1-NEXT: br i1 [[TMP139]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]] 616 // CHECK1: omp_offload.failed41: 617 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243(ptr [[BIT_VAR]]) #[[ATTR2]] 618 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT42]] 619 // CHECK1: omp_offload.cont42: 620 // CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 621 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP140]], align 8 622 // CHECK1-NEXT: [[TMP141:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 623 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP141]], align 8 624 // CHECK1-NEXT: [[TMP142:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i64 0, i64 0 625 // CHECK1-NEXT: store ptr null, ptr [[TMP142]], align 8 626 // CHECK1-NEXT: [[TMP143:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 627 // CHECK1-NEXT: [[TMP144:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 628 // CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 0 629 // CHECK1-NEXT: store i32 3, ptr [[TMP145]], align 4 630 // CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 1 631 // CHECK1-NEXT: store i32 1, ptr [[TMP146]], align 4 632 // CHECK1-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 2 633 // CHECK1-NEXT: store ptr [[TMP143]], ptr [[TMP147]], align 8 634 // CHECK1-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 3 635 // CHECK1-NEXT: store ptr [[TMP144]], ptr [[TMP148]], align 8 636 // CHECK1-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 4 637 // CHECK1-NEXT: store ptr @.offload_sizes.13, ptr [[TMP149]], align 8 638 // CHECK1-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 5 639 // CHECK1-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP150]], align 8 640 // CHECK1-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 6 641 // CHECK1-NEXT: store ptr null, ptr [[TMP151]], align 8 642 // CHECK1-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 7 643 // CHECK1-NEXT: store ptr null, ptr [[TMP152]], align 8 644 // CHECK1-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 8 645 // CHECK1-NEXT: store i64 2, ptr [[TMP153]], align 8 646 // CHECK1-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 9 647 // CHECK1-NEXT: store i64 0, ptr [[TMP154]], align 8 648 // CHECK1-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 10 649 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP155]], align 4 650 // CHECK1-NEXT: [[TMP156:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 11 651 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP156]], align 4 652 // CHECK1-NEXT: [[TMP157:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 12 653 // CHECK1-NEXT: store i32 0, ptr [[TMP157]], align 4 654 // CHECK1-NEXT: [[TMP158:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.region_id, ptr [[KERNEL_ARGS47]]) 655 // CHECK1-NEXT: [[TMP159:%.*]] = icmp ne i32 [[TMP158]], 0 656 // CHECK1-NEXT: br i1 [[TMP159]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]] 657 // CHECK1: omp_offload.failed48: 658 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248(ptr [[BIT_VAR]]) #[[ATTR2]] 659 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT49]] 660 // CHECK1: omp_offload.cont49: 661 // CHECK1-NEXT: store i32 0, ptr @_ZZ4mainE5sivar, align 4 662 // CHECK1-NEXT: [[TMP160:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 663 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP160]], align 8 664 // CHECK1-NEXT: [[TMP161:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 665 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP161]], align 8 666 // CHECK1-NEXT: [[TMP162:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 667 // CHECK1-NEXT: store ptr null, ptr [[TMP162]], align 8 668 // CHECK1-NEXT: [[TMP163:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 669 // CHECK1-NEXT: [[TMP164:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 670 // CHECK1-NEXT: [[TMP165:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 0 671 // CHECK1-NEXT: store i32 3, ptr [[TMP165]], align 4 672 // CHECK1-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 1 673 // CHECK1-NEXT: store i32 1, ptr [[TMP166]], align 4 674 // CHECK1-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 2 675 // CHECK1-NEXT: store ptr [[TMP163]], ptr [[TMP167]], align 8 676 // CHECK1-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 3 677 // CHECK1-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 8 678 // CHECK1-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 4 679 // CHECK1-NEXT: store ptr @.offload_sizes.15, ptr [[TMP169]], align 8 680 // CHECK1-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 5 681 // CHECK1-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP170]], align 8 682 // CHECK1-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 6 683 // CHECK1-NEXT: store ptr null, ptr [[TMP171]], align 8 684 // CHECK1-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 7 685 // CHECK1-NEXT: store ptr null, ptr [[TMP172]], align 8 686 // CHECK1-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 8 687 // CHECK1-NEXT: store i64 2, ptr [[TMP173]], align 8 688 // CHECK1-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 9 689 // CHECK1-NEXT: store i64 0, ptr [[TMP174]], align 8 690 // CHECK1-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 10 691 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP175]], align 4 692 // CHECK1-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 11 693 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 4 694 // CHECK1-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 12 695 // CHECK1-NEXT: store i32 0, ptr [[TMP177]], align 4 696 // CHECK1-NEXT: [[TMP178:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.region_id, ptr [[KERNEL_ARGS54]]) 697 // CHECK1-NEXT: [[TMP179:%.*]] = icmp ne i32 [[TMP178]], 0 698 // CHECK1-NEXT: br i1 [[TMP179]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]] 699 // CHECK1: omp_offload.failed55: 700 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 701 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT56]] 702 // CHECK1: omp_offload.cont56: 703 // CHECK1-NEXT: store i32 10, ptr @_ZZ4mainE5sivar, align 4 704 // CHECK1-NEXT: [[TMP180:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 705 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP180]], align 8 706 // CHECK1-NEXT: [[TMP181:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 707 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP181]], align 8 708 // CHECK1-NEXT: [[TMP182:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i64 0, i64 0 709 // CHECK1-NEXT: store ptr null, ptr [[TMP182]], align 8 710 // CHECK1-NEXT: [[TMP183:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 711 // CHECK1-NEXT: [[TMP184:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 712 // CHECK1-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0 713 // CHECK1-NEXT: store i32 3, ptr [[TMP185]], align 4 714 // CHECK1-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1 715 // CHECK1-NEXT: store i32 1, ptr [[TMP186]], align 4 716 // CHECK1-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2 717 // CHECK1-NEXT: store ptr [[TMP183]], ptr [[TMP187]], align 8 718 // CHECK1-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3 719 // CHECK1-NEXT: store ptr [[TMP184]], ptr [[TMP188]], align 8 720 // CHECK1-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4 721 // CHECK1-NEXT: store ptr @.offload_sizes.17, ptr [[TMP189]], align 8 722 // CHECK1-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5 723 // CHECK1-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP190]], align 8 724 // CHECK1-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6 725 // CHECK1-NEXT: store ptr null, ptr [[TMP191]], align 8 726 // CHECK1-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7 727 // CHECK1-NEXT: store ptr null, ptr [[TMP192]], align 8 728 // CHECK1-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8 729 // CHECK1-NEXT: store i64 2, ptr [[TMP193]], align 8 730 // CHECK1-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9 731 // CHECK1-NEXT: store i64 0, ptr [[TMP194]], align 8 732 // CHECK1-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10 733 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4 734 // CHECK1-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11 735 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4 736 // CHECK1-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12 737 // CHECK1-NEXT: store i32 0, ptr [[TMP197]], align 4 738 // CHECK1-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.region_id, ptr [[KERNEL_ARGS61]]) 739 // CHECK1-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0 740 // CHECK1-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]] 741 // CHECK1: omp_offload.failed62: 742 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 743 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT63]] 744 // CHECK1: omp_offload.cont63: 745 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 746 // CHECK1-NEXT: ret i32 [[CALL]] 747 // 748 // 749 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209 750 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 751 // CHECK1-NEXT: entry: 752 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 753 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 754 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 755 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined, ptr [[TMP0]]) 756 // CHECK1-NEXT: ret void 757 // 758 // 759 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined 760 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 761 // CHECK1-NEXT: entry: 762 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 763 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 764 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 765 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 766 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 767 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 768 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 769 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 770 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 771 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 772 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 773 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 774 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 775 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 776 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 777 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 778 // CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4 779 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 780 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 781 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 782 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 783 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 784 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 785 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 786 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 787 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 788 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 789 // CHECK1: cond.true: 790 // CHECK1-NEXT: br label [[COND_END:%.*]] 791 // CHECK1: cond.false: 792 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 793 // CHECK1-NEXT: br label [[COND_END]] 794 // CHECK1: cond.end: 795 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 796 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 797 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 798 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 799 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 800 // CHECK1: omp.inner.for.cond: 801 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 802 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 803 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 804 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 805 // CHECK1: omp.inner.for.body: 806 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 807 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 808 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 809 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 810 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 811 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 812 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 813 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 814 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 815 // CHECK1: omp.body.continue: 816 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 817 // CHECK1: omp.inner.for.inc: 818 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 819 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 820 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 821 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 822 // CHECK1: omp.inner.for.end: 823 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 824 // CHECK1: omp.loop.exit: 825 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 826 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 827 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 8 828 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 829 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 830 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 831 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 832 // CHECK1-NEXT: ] 833 // CHECK1: .omp.reduction.case1: 834 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 835 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 836 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 837 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 838 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 839 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 840 // CHECK1: .omp.reduction.case2: 841 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 842 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 843 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 844 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 845 // CHECK1: .omp.reduction.default: 846 // CHECK1-NEXT: ret void 847 // 848 // 849 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func 850 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 851 // CHECK1-NEXT: entry: 852 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 853 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 854 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 855 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 856 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 857 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 858 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 859 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 860 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 861 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 862 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 863 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 864 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 865 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 866 // CHECK1-NEXT: ret void 867 // 868 // 869 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214 870 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 871 // CHECK1-NEXT: entry: 872 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 873 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 874 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 875 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined, ptr [[TMP0]]) 876 // CHECK1-NEXT: ret void 877 // 878 // 879 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined 880 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 881 // CHECK1-NEXT: entry: 882 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 883 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 884 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 885 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 886 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 887 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 888 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 889 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 890 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 891 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 892 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 893 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 894 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 895 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 896 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 897 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 898 // CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4 899 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 900 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 901 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 902 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 903 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 904 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 905 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 906 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 907 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 908 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 909 // CHECK1: cond.true: 910 // CHECK1-NEXT: br label [[COND_END:%.*]] 911 // CHECK1: cond.false: 912 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 913 // CHECK1-NEXT: br label [[COND_END]] 914 // CHECK1: cond.end: 915 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 916 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 917 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 918 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 919 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 920 // CHECK1: omp.inner.for.cond: 921 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 922 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 923 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 924 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 925 // CHECK1: omp.inner.for.body: 926 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 927 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 928 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 929 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 930 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 931 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 932 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], [[TMP9]] 933 // CHECK1-NEXT: store i32 [[SUB]], ptr [[SIVAR1]], align 4 934 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 935 // CHECK1: omp.body.continue: 936 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 937 // CHECK1: omp.inner.for.inc: 938 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 939 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 940 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 941 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 942 // CHECK1: omp.inner.for.end: 943 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 944 // CHECK1: omp.loop.exit: 945 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 946 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 947 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 8 948 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 949 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 950 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 951 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 952 // CHECK1-NEXT: ] 953 // CHECK1: .omp.reduction.case1: 954 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 955 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 956 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 957 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 4 958 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 959 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 960 // CHECK1: .omp.reduction.case2: 961 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 962 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 963 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 964 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 965 // CHECK1: .omp.reduction.default: 966 // CHECK1-NEXT: ret void 967 // 968 // 969 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func 970 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 971 // CHECK1-NEXT: entry: 972 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 973 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 974 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 975 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 976 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 977 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 978 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 979 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 980 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 981 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 982 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 983 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 984 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 985 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 986 // CHECK1-NEXT: ret void 987 // 988 // 989 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220 990 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 991 // CHECK1-NEXT: entry: 992 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 993 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 994 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 995 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined, ptr [[TMP0]]) 996 // CHECK1-NEXT: ret void 997 // 998 // 999 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined 1000 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1001 // CHECK1-NEXT: entry: 1002 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1003 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1004 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1005 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1006 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1007 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1008 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1009 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1010 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1011 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1012 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1013 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1014 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 1015 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1016 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1017 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1018 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1019 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1020 // CHECK1-NEXT: store i32 1, ptr [[SIVAR1]], align 4 1021 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1022 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1023 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1024 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1025 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1026 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1027 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1028 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1029 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1030 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1031 // CHECK1: cond.true: 1032 // CHECK1-NEXT: br label [[COND_END:%.*]] 1033 // CHECK1: cond.false: 1034 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1035 // CHECK1-NEXT: br label [[COND_END]] 1036 // CHECK1: cond.end: 1037 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1038 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1039 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1040 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1041 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1042 // CHECK1: omp.inner.for.cond: 1043 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1044 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1045 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1046 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1047 // CHECK1: omp.inner.for.body: 1048 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1049 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1050 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1051 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1052 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 4 1053 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1054 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP9]], [[TMP10]] 1055 // CHECK1-NEXT: store i32 [[MUL3]], ptr [[SIVAR1]], align 4 1056 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1057 // CHECK1: omp.body.continue: 1058 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1059 // CHECK1: omp.inner.for.inc: 1060 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1061 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 1062 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1063 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1064 // CHECK1: omp.inner.for.end: 1065 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1066 // CHECK1: omp.loop.exit: 1067 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1068 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1069 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 8 1070 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1071 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1072 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1073 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1074 // CHECK1-NEXT: ] 1075 // CHECK1: .omp.reduction.case1: 1076 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 1077 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 1078 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP14]], [[TMP15]] 1079 // CHECK1-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 4 1080 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1081 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1082 // CHECK1: .omp.reduction.case2: 1083 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 1084 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 4 1085 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1086 // CHECK1: atomic_cont: 1087 // CHECK1-NEXT: [[TMP17:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP22:%.*]], [[ATOMIC_CONT]] ] 1088 // CHECK1-NEXT: store i32 [[TMP17]], ptr [[_TMP6]], align 4 1089 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[_TMP6]], align 4 1090 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 4 1091 // CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP18]], [[TMP19]] 1092 // CHECK1-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 4 1093 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4 1094 // CHECK1-NEXT: [[TMP21:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP17]], i32 [[TMP20]] monotonic monotonic, align 4 1095 // CHECK1-NEXT: [[TMP22]] = extractvalue { i32, i1 } [[TMP21]], 0 1096 // CHECK1-NEXT: [[TMP23:%.*]] = extractvalue { i32, i1 } [[TMP21]], 1 1097 // CHECK1-NEXT: br i1 [[TMP23]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1098 // CHECK1: atomic_exit: 1099 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1100 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1101 // CHECK1: .omp.reduction.default: 1102 // CHECK1-NEXT: ret void 1103 // 1104 // 1105 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func 1106 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1107 // CHECK1-NEXT: entry: 1108 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1109 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1110 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1111 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1112 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1113 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1114 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1115 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1116 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1117 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1118 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1119 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1120 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]] 1121 // CHECK1-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 4 1122 // CHECK1-NEXT: ret void 1123 // 1124 // 1125 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226 1126 // CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] { 1127 // CHECK1-NEXT: entry: 1128 // CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 8 1129 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 8 1130 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 8 1131 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined, ptr [[TMP0]]) 1132 // CHECK1-NEXT: ret void 1133 // 1134 // 1135 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined 1136 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] { 1137 // CHECK1-NEXT: entry: 1138 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1139 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1140 // CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 8 1141 // CHECK1-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 1 1142 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1143 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1144 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1145 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1146 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1147 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1148 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1149 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1150 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 1151 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 1152 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1153 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1154 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 8 1155 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 8 1156 // CHECK1-NEXT: store i8 1, ptr [[AND_VAR1]], align 1 1157 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1158 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1159 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1160 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1161 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1162 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1163 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1164 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1165 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1166 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1167 // CHECK1: cond.true: 1168 // CHECK1-NEXT: br label [[COND_END:%.*]] 1169 // CHECK1: cond.false: 1170 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1171 // CHECK1-NEXT: br label [[COND_END]] 1172 // CHECK1: cond.end: 1173 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1174 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1175 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1176 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1177 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1178 // CHECK1: omp.inner.for.cond: 1179 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1180 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1181 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1182 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1183 // CHECK1: omp.inner.for.body: 1184 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1185 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1186 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1187 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1188 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 1 1189 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1 1190 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 1191 // CHECK1: land.rhs: 1192 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1193 // CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 0 1194 // CHECK1-NEXT: br label [[LAND_END]] 1195 // CHECK1: land.end: 1196 // CHECK1-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ] 1197 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i8 1198 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 1 1199 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1200 // CHECK1: omp.body.continue: 1201 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1202 // CHECK1: omp.inner.for.inc: 1203 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1204 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 1205 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1206 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1207 // CHECK1: omp.inner.for.end: 1208 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1209 // CHECK1: omp.loop.exit: 1210 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1211 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1212 // CHECK1-NEXT: store ptr [[AND_VAR1]], ptr [[TMP13]], align 8 1213 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1214 // CHECK1-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1215 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1216 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1217 // CHECK1-NEXT: ] 1218 // CHECK1: .omp.reduction.case1: 1219 // CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1 1220 // CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1 1221 // CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]] 1222 // CHECK1: land.rhs6: 1223 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[AND_VAR1]], align 1 1224 // CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1 1225 // CHECK1-NEXT: br label [[LAND_END8]] 1226 // CHECK1: land.end8: 1227 // CHECK1-NEXT: [[TMP17:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ] 1228 // CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i8 1229 // CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 1230 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1231 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1232 // CHECK1: .omp.reduction.case2: 1233 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1 1234 // CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1 1235 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 1236 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1237 // CHECK1: atomic_cont: 1238 // CHECK1-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LAND_END17:%.*]] ] 1239 // CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1 1240 // CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 1241 // CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 1242 // CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1 1243 // CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1 1244 // CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]] 1245 // CHECK1: land.rhs15: 1246 // CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[AND_VAR1]], align 1 1247 // CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1 1248 // CHECK1-NEXT: br label [[LAND_END17]] 1249 // CHECK1: land.end17: 1250 // CHECK1-NEXT: [[TMP22:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ] 1251 // CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i8 1252 // CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 1253 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 1254 // CHECK1-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 1 1255 // CHECK1-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 0 1256 // CHECK1-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 1 1257 // CHECK1-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1258 // CHECK1: atomic_exit: 1259 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1260 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1261 // CHECK1: .omp.reduction.default: 1262 // CHECK1-NEXT: ret void 1263 // 1264 // 1265 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func 1266 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1267 // CHECK1-NEXT: entry: 1268 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1269 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1270 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1271 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1272 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1273 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1274 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1275 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1276 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1277 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1278 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 1279 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 1280 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 1281 // CHECK1: land.rhs: 1282 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 1283 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 1284 // CHECK1-NEXT: br label [[LAND_END]] 1285 // CHECK1: land.end: 1286 // CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ] 1287 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 1288 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 1289 // CHECK1-NEXT: ret void 1290 // 1291 // 1292 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232 1293 // CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] { 1294 // CHECK1-NEXT: entry: 1295 // CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 8 1296 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 8 1297 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 8 1298 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined, ptr [[TMP0]]) 1299 // CHECK1-NEXT: ret void 1300 // 1301 // 1302 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined 1303 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] { 1304 // CHECK1-NEXT: entry: 1305 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1306 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1307 // CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 8 1308 // CHECK1-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 1 1309 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1310 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1311 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1312 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1313 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1314 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1315 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1316 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1317 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 1318 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 1319 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1320 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1321 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 8 1322 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 8 1323 // CHECK1-NEXT: store i8 0, ptr [[OR_VAR1]], align 1 1324 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1325 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1326 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1327 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1328 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1329 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1330 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1331 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1332 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1333 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1334 // CHECK1: cond.true: 1335 // CHECK1-NEXT: br label [[COND_END:%.*]] 1336 // CHECK1: cond.false: 1337 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1338 // CHECK1-NEXT: br label [[COND_END]] 1339 // CHECK1: cond.end: 1340 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1341 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1342 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1343 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1344 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1345 // CHECK1: omp.inner.for.cond: 1346 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1347 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1348 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1349 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1350 // CHECK1: omp.inner.for.body: 1351 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1352 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1353 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1354 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1355 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 1 1356 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1 1357 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 1358 // CHECK1: lor.rhs: 1359 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1360 // CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 0 1361 // CHECK1-NEXT: br label [[LOR_END]] 1362 // CHECK1: lor.end: 1363 // CHECK1-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ] 1364 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i8 1365 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 1 1366 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1367 // CHECK1: omp.body.continue: 1368 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1369 // CHECK1: omp.inner.for.inc: 1370 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1371 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 1372 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1373 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1374 // CHECK1: omp.inner.for.end: 1375 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1376 // CHECK1: omp.loop.exit: 1377 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1378 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1379 // CHECK1-NEXT: store ptr [[OR_VAR1]], ptr [[TMP13]], align 8 1380 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1381 // CHECK1-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1382 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1383 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1384 // CHECK1-NEXT: ] 1385 // CHECK1: .omp.reduction.case1: 1386 // CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1 1387 // CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1 1388 // CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]] 1389 // CHECK1: lor.rhs6: 1390 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[OR_VAR1]], align 1 1391 // CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1 1392 // CHECK1-NEXT: br label [[LOR_END8]] 1393 // CHECK1: lor.end8: 1394 // CHECK1-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ] 1395 // CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i8 1396 // CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 1397 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1398 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1399 // CHECK1: .omp.reduction.case2: 1400 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1 1401 // CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1 1402 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 1403 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1404 // CHECK1: atomic_cont: 1405 // CHECK1-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LOR_END17:%.*]] ] 1406 // CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1 1407 // CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 1408 // CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 1409 // CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1 1410 // CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1 1411 // CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]] 1412 // CHECK1: lor.rhs15: 1413 // CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[OR_VAR1]], align 1 1414 // CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1 1415 // CHECK1-NEXT: br label [[LOR_END17]] 1416 // CHECK1: lor.end17: 1417 // CHECK1-NEXT: [[TMP22:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ] 1418 // CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i8 1419 // CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 1420 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 1421 // CHECK1-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 1 1422 // CHECK1-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 0 1423 // CHECK1-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 1 1424 // CHECK1-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1425 // CHECK1: atomic_exit: 1426 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1427 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1428 // CHECK1: .omp.reduction.default: 1429 // CHECK1-NEXT: ret void 1430 // 1431 // 1432 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func 1433 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1434 // CHECK1-NEXT: entry: 1435 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1436 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1437 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1438 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1439 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1440 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1441 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1442 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1443 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1444 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1445 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 1446 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 1447 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 1448 // CHECK1: lor.rhs: 1449 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 1450 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 1451 // CHECK1-NEXT: br label [[LOR_END]] 1452 // CHECK1: lor.end: 1453 // CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ] 1454 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 1455 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 1456 // CHECK1-NEXT: ret void 1457 // 1458 // 1459 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238 1460 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 1461 // CHECK1-NEXT: entry: 1462 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 1463 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 1464 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 1465 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined, ptr [[TMP0]]) 1466 // CHECK1-NEXT: ret void 1467 // 1468 // 1469 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined 1470 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 1471 // CHECK1-NEXT: entry: 1472 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1473 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1474 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 1475 // CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 1476 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1477 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1478 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1479 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1480 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1481 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1482 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1483 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1484 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1485 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1486 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 1487 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 1488 // CHECK1-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 4 1489 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1490 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1491 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1492 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1493 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1494 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1495 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1496 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1497 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1498 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1499 // CHECK1: cond.true: 1500 // CHECK1-NEXT: br label [[COND_END:%.*]] 1501 // CHECK1: cond.false: 1502 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1503 // CHECK1-NEXT: br label [[COND_END]] 1504 // CHECK1: cond.end: 1505 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1506 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1507 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1508 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1509 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1510 // CHECK1: omp.inner.for.cond: 1511 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1512 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1513 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1514 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1515 // CHECK1: omp.inner.for.body: 1516 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1517 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1518 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1519 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1520 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1521 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1522 // CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP9]], [[TMP10]] 1523 // CHECK1-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 4 1524 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1525 // CHECK1: omp.body.continue: 1526 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1527 // CHECK1: omp.inner.for.inc: 1528 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1529 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 1530 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1531 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1532 // CHECK1: omp.inner.for.end: 1533 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1534 // CHECK1: omp.loop.exit: 1535 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1536 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1537 // CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 8 1538 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1539 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1540 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1541 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1542 // CHECK1-NEXT: ] 1543 // CHECK1: .omp.reduction.case1: 1544 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 1545 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1546 // CHECK1-NEXT: [[AND4:%.*]] = and i32 [[TMP14]], [[TMP15]] 1547 // CHECK1-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 4 1548 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1549 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1550 // CHECK1: .omp.reduction.case2: 1551 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1552 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 1553 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1554 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1555 // CHECK1: .omp.reduction.default: 1556 // CHECK1-NEXT: ret void 1557 // 1558 // 1559 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func 1560 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1561 // CHECK1-NEXT: entry: 1562 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1563 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1564 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1565 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1566 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1567 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1568 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1569 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1570 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1571 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1572 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1573 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1574 // CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]] 1575 // CHECK1-NEXT: store i32 [[AND]], ptr [[TMP7]], align 4 1576 // CHECK1-NEXT: ret void 1577 // 1578 // 1579 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243 1580 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 1581 // CHECK1-NEXT: entry: 1582 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 1583 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 1584 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 1585 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined, ptr [[TMP0]]) 1586 // CHECK1-NEXT: ret void 1587 // 1588 // 1589 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined 1590 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 1591 // CHECK1-NEXT: entry: 1592 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1593 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1594 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 1595 // CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 1596 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1597 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1598 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1599 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1600 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1601 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1602 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1603 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1604 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1605 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1606 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 1607 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 1608 // CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 1609 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1610 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1611 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1612 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1613 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1614 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1615 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1616 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1617 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1618 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1619 // CHECK1: cond.true: 1620 // CHECK1-NEXT: br label [[COND_END:%.*]] 1621 // CHECK1: cond.false: 1622 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1623 // CHECK1-NEXT: br label [[COND_END]] 1624 // CHECK1: cond.end: 1625 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1626 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1627 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1628 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1629 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1630 // CHECK1: omp.inner.for.cond: 1631 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1632 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1633 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1634 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1635 // CHECK1: omp.inner.for.body: 1636 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1637 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1638 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1639 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1640 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1641 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1642 // CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP9]], [[TMP10]] 1643 // CHECK1-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 4 1644 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1645 // CHECK1: omp.body.continue: 1646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1647 // CHECK1: omp.inner.for.inc: 1648 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1649 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 1650 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1651 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1652 // CHECK1: omp.inner.for.end: 1653 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1654 // CHECK1: omp.loop.exit: 1655 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1656 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1657 // CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 8 1658 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1659 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1660 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1661 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1662 // CHECK1-NEXT: ] 1663 // CHECK1: .omp.reduction.case1: 1664 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 1665 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1666 // CHECK1-NEXT: [[OR4:%.*]] = or i32 [[TMP14]], [[TMP15]] 1667 // CHECK1-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 4 1668 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1669 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1670 // CHECK1: .omp.reduction.case2: 1671 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1672 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 1673 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1674 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1675 // CHECK1: .omp.reduction.default: 1676 // CHECK1-NEXT: ret void 1677 // 1678 // 1679 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func 1680 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1681 // CHECK1-NEXT: entry: 1682 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1683 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1684 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1685 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1686 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1687 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1688 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1689 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1690 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1691 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1692 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1693 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1694 // CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]] 1695 // CHECK1-NEXT: store i32 [[OR]], ptr [[TMP7]], align 4 1696 // CHECK1-NEXT: ret void 1697 // 1698 // 1699 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248 1700 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 1701 // CHECK1-NEXT: entry: 1702 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 1703 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 1704 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 1705 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined, ptr [[TMP0]]) 1706 // CHECK1-NEXT: ret void 1707 // 1708 // 1709 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined 1710 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 1711 // CHECK1-NEXT: entry: 1712 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1713 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1714 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 1715 // CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 1716 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1717 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1718 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1719 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1720 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1721 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1722 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1723 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1724 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1725 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1726 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 1727 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 1728 // CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 1729 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1730 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1731 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1732 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1733 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1734 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1735 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1736 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1737 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1738 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1739 // CHECK1: cond.true: 1740 // CHECK1-NEXT: br label [[COND_END:%.*]] 1741 // CHECK1: cond.false: 1742 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1743 // CHECK1-NEXT: br label [[COND_END]] 1744 // CHECK1: cond.end: 1745 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1746 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1747 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1748 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1749 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1750 // CHECK1: omp.inner.for.cond: 1751 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1752 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1753 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1754 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1755 // CHECK1: omp.inner.for.body: 1756 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1757 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1758 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1759 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1760 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1761 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1762 // CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP9]], [[TMP10]] 1763 // CHECK1-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 4 1764 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1765 // CHECK1: omp.body.continue: 1766 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1767 // CHECK1: omp.inner.for.inc: 1768 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1769 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 1770 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1771 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1772 // CHECK1: omp.inner.for.end: 1773 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1774 // CHECK1: omp.loop.exit: 1775 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1776 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1777 // CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 8 1778 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1779 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1780 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1781 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1782 // CHECK1-NEXT: ] 1783 // CHECK1: .omp.reduction.case1: 1784 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 1785 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1786 // CHECK1-NEXT: [[XOR4:%.*]] = xor i32 [[TMP14]], [[TMP15]] 1787 // CHECK1-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 4 1788 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1789 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1790 // CHECK1: .omp.reduction.case2: 1791 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 1792 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 1793 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1794 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1795 // CHECK1: .omp.reduction.default: 1796 // CHECK1-NEXT: ret void 1797 // 1798 // 1799 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func 1800 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1801 // CHECK1-NEXT: entry: 1802 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1803 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1804 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1805 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1806 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1807 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1808 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1809 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1810 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1811 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1812 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1813 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1814 // CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]] 1815 // CHECK1-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 4 1816 // CHECK1-NEXT: ret void 1817 // 1818 // 1819 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254 1820 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1821 // CHECK1-NEXT: entry: 1822 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1823 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1824 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1825 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined, ptr [[TMP0]]) 1826 // CHECK1-NEXT: ret void 1827 // 1828 // 1829 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined 1830 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1831 // CHECK1-NEXT: entry: 1832 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1833 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1834 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1835 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1836 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1837 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1838 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1839 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1840 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1841 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1842 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1843 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1844 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1845 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1846 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1847 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1848 // CHECK1-NEXT: store i32 -2147483648, ptr [[SIVAR1]], align 4 1849 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1850 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1851 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1852 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1853 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1854 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1855 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1856 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1857 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1858 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1859 // CHECK1: cond.true: 1860 // CHECK1-NEXT: br label [[COND_END:%.*]] 1861 // CHECK1: cond.false: 1862 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1863 // CHECK1-NEXT: br label [[COND_END]] 1864 // CHECK1: cond.end: 1865 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1866 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1867 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1868 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1869 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1870 // CHECK1: omp.inner.for.cond: 1871 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1872 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1873 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1874 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1875 // CHECK1: omp.inner.for.body: 1876 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1877 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1878 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1879 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1880 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 4 1881 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1882 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP9]], [[TMP10]] 1883 // CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 1884 // CHECK1: cond.true4: 1885 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 4 1886 // CHECK1-NEXT: br label [[COND_END6:%.*]] 1887 // CHECK1: cond.false5: 1888 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 1889 // CHECK1-NEXT: br label [[COND_END6]] 1890 // CHECK1: cond.end6: 1891 // CHECK1-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ] 1892 // CHECK1-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 4 1893 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1894 // CHECK1: omp.body.continue: 1895 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1896 // CHECK1: omp.inner.for.inc: 1897 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1898 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 1899 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 1900 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1901 // CHECK1: omp.inner.for.end: 1902 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1903 // CHECK1: omp.loop.exit: 1904 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1905 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1906 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 8 1907 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1908 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1909 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1910 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1911 // CHECK1-NEXT: ] 1912 // CHECK1: .omp.reduction.case1: 1913 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 1914 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 1915 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP16]], [[TMP17]] 1916 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 1917 // CHECK1: cond.true10: 1918 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 4 1919 // CHECK1-NEXT: br label [[COND_END12:%.*]] 1920 // CHECK1: cond.false11: 1921 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 4 1922 // CHECK1-NEXT: br label [[COND_END12]] 1923 // CHECK1: cond.end12: 1924 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ] 1925 // CHECK1-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 4 1926 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1927 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1928 // CHECK1: .omp.reduction.case2: 1929 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 4 1930 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP20]] monotonic, align 4 1931 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1932 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1933 // CHECK1: .omp.reduction.default: 1934 // CHECK1-NEXT: ret void 1935 // 1936 // 1937 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func 1938 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1939 // CHECK1-NEXT: entry: 1940 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1941 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1942 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1943 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1944 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1945 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1946 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1947 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1948 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1949 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1950 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1951 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1952 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1953 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1954 // CHECK1: cond.true: 1955 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 1956 // CHECK1-NEXT: br label [[COND_END:%.*]] 1957 // CHECK1: cond.false: 1958 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 1959 // CHECK1-NEXT: br label [[COND_END]] 1960 // CHECK1: cond.end: 1961 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1962 // CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 1963 // CHECK1-NEXT: ret void 1964 // 1965 // 1966 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260 1967 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1968 // CHECK1-NEXT: entry: 1969 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1970 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1971 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1972 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined, ptr [[TMP0]]) 1973 // CHECK1-NEXT: ret void 1974 // 1975 // 1976 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined 1977 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1978 // CHECK1-NEXT: entry: 1979 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1980 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1981 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1982 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1983 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1984 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1985 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1986 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1987 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1988 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1989 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1990 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1991 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1992 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1993 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1994 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1995 // CHECK1-NEXT: store i32 2147483647, ptr [[SIVAR1]], align 4 1996 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1997 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1998 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1999 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2000 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2001 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2002 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2003 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2004 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2005 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2006 // CHECK1: cond.true: 2007 // CHECK1-NEXT: br label [[COND_END:%.*]] 2008 // CHECK1: cond.false: 2009 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2010 // CHECK1-NEXT: br label [[COND_END]] 2011 // CHECK1: cond.end: 2012 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2013 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2014 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2015 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2016 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2017 // CHECK1: omp.inner.for.cond: 2018 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2019 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2020 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2021 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2022 // CHECK1: omp.inner.for.body: 2023 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2024 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2025 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2026 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2027 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 4 2028 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 2029 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2030 // CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 2031 // CHECK1: cond.true4: 2032 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 4 2033 // CHECK1-NEXT: br label [[COND_END6:%.*]] 2034 // CHECK1: cond.false5: 2035 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 2036 // CHECK1-NEXT: br label [[COND_END6]] 2037 // CHECK1: cond.end6: 2038 // CHECK1-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ] 2039 // CHECK1-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 4 2040 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2041 // CHECK1: omp.body.continue: 2042 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2043 // CHECK1: omp.inner.for.inc: 2044 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2045 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 2046 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 2047 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2048 // CHECK1: omp.inner.for.end: 2049 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2050 // CHECK1: omp.loop.exit: 2051 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2052 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2053 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 8 2054 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 2055 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2056 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2057 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2058 // CHECK1-NEXT: ] 2059 // CHECK1: .omp.reduction.case1: 2060 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 2061 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 2062 // CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP16]], [[TMP17]] 2063 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 2064 // CHECK1: cond.true10: 2065 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 4 2066 // CHECK1-NEXT: br label [[COND_END12:%.*]] 2067 // CHECK1: cond.false11: 2068 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 4 2069 // CHECK1-NEXT: br label [[COND_END12]] 2070 // CHECK1: cond.end12: 2071 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ] 2072 // CHECK1-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 4 2073 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 2074 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2075 // CHECK1: .omp.reduction.case2: 2076 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 4 2077 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP20]] monotonic, align 4 2078 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 2079 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2080 // CHECK1: .omp.reduction.default: 2081 // CHECK1-NEXT: ret void 2082 // 2083 // 2084 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func 2085 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 2086 // CHECK1-NEXT: entry: 2087 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 2088 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 2089 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 2090 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 2091 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 2092 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 2093 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 2094 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 2095 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 2096 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 2097 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2098 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 2099 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 2100 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2101 // CHECK1: cond.true: 2102 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 2103 // CHECK1-NEXT: br label [[COND_END:%.*]] 2104 // CHECK1: cond.false: 2105 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 2106 // CHECK1-NEXT: br label [[COND_END]] 2107 // CHECK1: cond.end: 2108 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2109 // CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 2110 // CHECK1-NEXT: ret void 2111 // 2112 // 2113 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2114 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 2115 // CHECK1-NEXT: entry: 2116 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2117 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2118 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 2119 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 2120 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 2121 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2122 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2123 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [2 x ptr], align 8 2124 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [2 x ptr], align 8 2125 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [2 x ptr], align 8 2126 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2127 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2128 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8 2129 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8 2130 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8 2131 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 2132 // CHECK1-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2133 // CHECK1-NEXT: [[AND_VAR:%.*]] = alloca i8, align 1 2134 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [2 x ptr], align 8 2135 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [2 x ptr], align 8 2136 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [2 x ptr], align 8 2137 // CHECK1-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 2138 // CHECK1-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2139 // CHECK1-NEXT: [[OR_VAR:%.*]] = alloca i8, align 1 2140 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x ptr], align 8 2141 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x ptr], align 8 2142 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x ptr], align 8 2143 // CHECK1-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 2144 // CHECK1-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2145 // CHECK1-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 4 2146 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [2 x ptr], align 8 2147 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [2 x ptr], align 8 2148 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [2 x ptr], align 8 2149 // CHECK1-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 2150 // CHECK1-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2151 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [2 x ptr], align 8 2152 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [2 x ptr], align 8 2153 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [2 x ptr], align 8 2154 // CHECK1-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 2155 // CHECK1-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2156 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [2 x ptr], align 8 2157 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [2 x ptr], align 8 2158 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [2 x ptr], align 8 2159 // CHECK1-NEXT: [[_TMP46:%.*]] = alloca i32, align 4 2160 // CHECK1-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2161 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [2 x ptr], align 8 2162 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [2 x ptr], align 8 2163 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [2 x ptr], align 8 2164 // CHECK1-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 2165 // CHECK1-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2166 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [2 x ptr], align 8 2167 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [2 x ptr], align 8 2168 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [2 x ptr], align 8 2169 // CHECK1-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 2170 // CHECK1-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2171 // CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4 2172 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 2173 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2174 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP0]], align 8 2175 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2176 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP1]], align 8 2177 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2178 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 2179 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2180 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2181 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2182 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 2183 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2184 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 2185 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2186 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 2187 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2188 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 2189 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2190 // CHECK1-NEXT: store ptr @.offload_sizes.19, ptr [[TMP9]], align 8 2191 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2192 // CHECK1-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP10]], align 8 2193 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2194 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 2195 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2196 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 2197 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2198 // CHECK1-NEXT: store i64 2, ptr [[TMP13]], align 8 2199 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2200 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 2201 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2202 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 2203 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2204 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 2205 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2206 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 2207 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 2208 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 2209 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2210 // CHECK1: omp_offload.failed: 2211 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]]) #[[ATTR2]] 2212 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 2213 // CHECK1: omp_offload.cont: 2214 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2215 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP20]], align 8 2216 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2217 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP21]], align 8 2218 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 2219 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 2220 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 1 2221 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP23]], align 8 2222 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 1 2223 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP24]], align 8 2224 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 1 2225 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8 2226 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2227 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2228 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 2229 // CHECK1-NEXT: store i32 3, ptr [[TMP28]], align 4 2230 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 2231 // CHECK1-NEXT: store i32 2, ptr [[TMP29]], align 4 2232 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 2233 // CHECK1-NEXT: store ptr [[TMP26]], ptr [[TMP30]], align 8 2234 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 2235 // CHECK1-NEXT: store ptr [[TMP27]], ptr [[TMP31]], align 8 2236 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 2237 // CHECK1-NEXT: store ptr @.offload_sizes.21, ptr [[TMP32]], align 8 2238 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 2239 // CHECK1-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP33]], align 8 2240 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 2241 // CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8 2242 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 2243 // CHECK1-NEXT: store ptr null, ptr [[TMP35]], align 8 2244 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 2245 // CHECK1-NEXT: store i64 2, ptr [[TMP36]], align 8 2246 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 2247 // CHECK1-NEXT: store i64 0, ptr [[TMP37]], align 8 2248 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 2249 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 4 2250 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 2251 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 2252 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 2253 // CHECK1-NEXT: store i32 0, ptr [[TMP40]], align 4 2254 // CHECK1-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.region_id, ptr [[KERNEL_ARGS5]]) 2255 // CHECK1-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 2256 // CHECK1-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 2257 // CHECK1: omp_offload.failed6: 2258 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 2259 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 2260 // CHECK1: omp_offload.cont7: 2261 // CHECK1-NEXT: store i32 1, ptr [[T_VAR]], align 4 2262 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 2263 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP43]], align 8 2264 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 2265 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP44]], align 8 2266 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 2267 // CHECK1-NEXT: store ptr null, ptr [[TMP45]], align 8 2268 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 2269 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP46]], align 8 2270 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 2271 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP47]], align 8 2272 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 2273 // CHECK1-NEXT: store ptr null, ptr [[TMP48]], align 8 2274 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 2275 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 2276 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 2277 // CHECK1-NEXT: store i32 3, ptr [[TMP51]], align 4 2278 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 2279 // CHECK1-NEXT: store i32 2, ptr [[TMP52]], align 4 2280 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 2281 // CHECK1-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 8 2282 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 2283 // CHECK1-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 8 2284 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 2285 // CHECK1-NEXT: store ptr @.offload_sizes.23, ptr [[TMP55]], align 8 2286 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 2287 // CHECK1-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP56]], align 8 2288 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 2289 // CHECK1-NEXT: store ptr null, ptr [[TMP57]], align 8 2290 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 2291 // CHECK1-NEXT: store ptr null, ptr [[TMP58]], align 8 2292 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 2293 // CHECK1-NEXT: store i64 2, ptr [[TMP59]], align 8 2294 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 2295 // CHECK1-NEXT: store i64 0, ptr [[TMP60]], align 8 2296 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 2297 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 2298 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 2299 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 2300 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 2301 // CHECK1-NEXT: store i32 0, ptr [[TMP63]], align 4 2302 // CHECK1-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.region_id, ptr [[KERNEL_ARGS12]]) 2303 // CHECK1-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 2304 // CHECK1-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 2305 // CHECK1: omp_offload.failed13: 2306 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 2307 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT14]] 2308 // CHECK1: omp_offload.cont14: 2309 // CHECK1-NEXT: store i8 1, ptr [[AND_VAR]], align 1 2310 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 2311 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP66]], align 8 2312 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 2313 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP67]], align 8 2314 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0 2315 // CHECK1-NEXT: store ptr null, ptr [[TMP68]], align 8 2316 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 1 2317 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP69]], align 8 2318 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 1 2319 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP70]], align 8 2320 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 1 2321 // CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 8 2322 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 2323 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 2324 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 2325 // CHECK1-NEXT: store i32 3, ptr [[TMP74]], align 4 2326 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 2327 // CHECK1-NEXT: store i32 2, ptr [[TMP75]], align 4 2328 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 2329 // CHECK1-NEXT: store ptr [[TMP72]], ptr [[TMP76]], align 8 2330 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 2331 // CHECK1-NEXT: store ptr [[TMP73]], ptr [[TMP77]], align 8 2332 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 2333 // CHECK1-NEXT: store ptr @.offload_sizes.25, ptr [[TMP78]], align 8 2334 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 2335 // CHECK1-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP79]], align 8 2336 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 2337 // CHECK1-NEXT: store ptr null, ptr [[TMP80]], align 8 2338 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 2339 // CHECK1-NEXT: store ptr null, ptr [[TMP81]], align 8 2340 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 2341 // CHECK1-NEXT: store i64 2, ptr [[TMP82]], align 8 2342 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 2343 // CHECK1-NEXT: store i64 0, ptr [[TMP83]], align 8 2344 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 2345 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP84]], align 4 2346 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 2347 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP85]], align 4 2348 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 2349 // CHECK1-NEXT: store i32 0, ptr [[TMP86]], align 4 2350 // CHECK1-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS19]]) 2351 // CHECK1-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 2352 // CHECK1-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 2353 // CHECK1: omp_offload.failed20: 2354 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[AND_VAR]], ptr [[VEC]]) #[[ATTR2]] 2355 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]] 2356 // CHECK1: omp_offload.cont21: 2357 // CHECK1-NEXT: store i8 0, ptr [[OR_VAR]], align 1 2358 // CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 2359 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP89]], align 8 2360 // CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 2361 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP90]], align 8 2362 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 2363 // CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 8 2364 // CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 2365 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP92]], align 8 2366 // CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 2367 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP93]], align 8 2368 // CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 2369 // CHECK1-NEXT: store ptr null, ptr [[TMP94]], align 8 2370 // CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 2371 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 2372 // CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 0 2373 // CHECK1-NEXT: store i32 3, ptr [[TMP97]], align 4 2374 // CHECK1-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 1 2375 // CHECK1-NEXT: store i32 2, ptr [[TMP98]], align 4 2376 // CHECK1-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 2 2377 // CHECK1-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 8 2378 // CHECK1-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 3 2379 // CHECK1-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 8 2380 // CHECK1-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 4 2381 // CHECK1-NEXT: store ptr @.offload_sizes.27, ptr [[TMP101]], align 8 2382 // CHECK1-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 5 2383 // CHECK1-NEXT: store ptr @.offload_maptypes.28, ptr [[TMP102]], align 8 2384 // CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 6 2385 // CHECK1-NEXT: store ptr null, ptr [[TMP103]], align 8 2386 // CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 7 2387 // CHECK1-NEXT: store ptr null, ptr [[TMP104]], align 8 2388 // CHECK1-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 8 2389 // CHECK1-NEXT: store i64 2, ptr [[TMP105]], align 8 2390 // CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 9 2391 // CHECK1-NEXT: store i64 0, ptr [[TMP106]], align 8 2392 // CHECK1-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 10 2393 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 2394 // CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 11 2395 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 2396 // CHECK1-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 12 2397 // CHECK1-NEXT: store i32 0, ptr [[TMP109]], align 4 2398 // CHECK1-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.region_id, ptr [[KERNEL_ARGS26]]) 2399 // CHECK1-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 2400 // CHECK1-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 2401 // CHECK1: omp_offload.failed27: 2402 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55(ptr [[OR_VAR]], ptr [[VEC]]) #[[ATTR2]] 2403 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT28]] 2404 // CHECK1: omp_offload.cont28: 2405 // CHECK1-NEXT: store i32 1, ptr [[BIT_VAR]], align 4 2406 // CHECK1-NEXT: [[TMP112:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 2407 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP112]], align 8 2408 // CHECK1-NEXT: [[TMP113:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 2409 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP113]], align 8 2410 // CHECK1-NEXT: [[TMP114:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0 2411 // CHECK1-NEXT: store ptr null, ptr [[TMP114]], align 8 2412 // CHECK1-NEXT: [[TMP115:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1 2413 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP115]], align 8 2414 // CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 1 2415 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP116]], align 8 2416 // CHECK1-NEXT: [[TMP117:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 1 2417 // CHECK1-NEXT: store ptr null, ptr [[TMP117]], align 8 2418 // CHECK1-NEXT: [[TMP118:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 2419 // CHECK1-NEXT: [[TMP119:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 2420 // CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 0 2421 // CHECK1-NEXT: store i32 3, ptr [[TMP120]], align 4 2422 // CHECK1-NEXT: [[TMP121:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 1 2423 // CHECK1-NEXT: store i32 2, ptr [[TMP121]], align 4 2424 // CHECK1-NEXT: [[TMP122:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 2 2425 // CHECK1-NEXT: store ptr [[TMP118]], ptr [[TMP122]], align 8 2426 // CHECK1-NEXT: [[TMP123:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 3 2427 // CHECK1-NEXT: store ptr [[TMP119]], ptr [[TMP123]], align 8 2428 // CHECK1-NEXT: [[TMP124:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 4 2429 // CHECK1-NEXT: store ptr @.offload_sizes.29, ptr [[TMP124]], align 8 2430 // CHECK1-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 5 2431 // CHECK1-NEXT: store ptr @.offload_maptypes.30, ptr [[TMP125]], align 8 2432 // CHECK1-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 6 2433 // CHECK1-NEXT: store ptr null, ptr [[TMP126]], align 8 2434 // CHECK1-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 7 2435 // CHECK1-NEXT: store ptr null, ptr [[TMP127]], align 8 2436 // CHECK1-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 8 2437 // CHECK1-NEXT: store i64 2, ptr [[TMP128]], align 8 2438 // CHECK1-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 9 2439 // CHECK1-NEXT: store i64 0, ptr [[TMP129]], align 8 2440 // CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 10 2441 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP130]], align 4 2442 // CHECK1-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 11 2443 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP131]], align 4 2444 // CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 12 2445 // CHECK1-NEXT: store i32 0, ptr [[TMP132]], align 4 2446 // CHECK1-NEXT: [[TMP133:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.region_id, ptr [[KERNEL_ARGS33]]) 2447 // CHECK1-NEXT: [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 0 2448 // CHECK1-NEXT: br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]] 2449 // CHECK1: omp_offload.failed34: 2450 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]] 2451 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT35]] 2452 // CHECK1: omp_offload.cont35: 2453 // CHECK1-NEXT: [[TMP135:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 2454 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP135]], align 8 2455 // CHECK1-NEXT: [[TMP136:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 2456 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP136]], align 8 2457 // CHECK1-NEXT: [[TMP137:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 2458 // CHECK1-NEXT: store ptr null, ptr [[TMP137]], align 8 2459 // CHECK1-NEXT: [[TMP138:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 2460 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP138]], align 8 2461 // CHECK1-NEXT: [[TMP139:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 2462 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP139]], align 8 2463 // CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 2464 // CHECK1-NEXT: store ptr null, ptr [[TMP140]], align 8 2465 // CHECK1-NEXT: [[TMP141:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 2466 // CHECK1-NEXT: [[TMP142:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 2467 // CHECK1-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 0 2468 // CHECK1-NEXT: store i32 3, ptr [[TMP143]], align 4 2469 // CHECK1-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 1 2470 // CHECK1-NEXT: store i32 2, ptr [[TMP144]], align 4 2471 // CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 2 2472 // CHECK1-NEXT: store ptr [[TMP141]], ptr [[TMP145]], align 8 2473 // CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 3 2474 // CHECK1-NEXT: store ptr [[TMP142]], ptr [[TMP146]], align 8 2475 // CHECK1-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 4 2476 // CHECK1-NEXT: store ptr @.offload_sizes.31, ptr [[TMP147]], align 8 2477 // CHECK1-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 5 2478 // CHECK1-NEXT: store ptr @.offload_maptypes.32, ptr [[TMP148]], align 8 2479 // CHECK1-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 6 2480 // CHECK1-NEXT: store ptr null, ptr [[TMP149]], align 8 2481 // CHECK1-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 7 2482 // CHECK1-NEXT: store ptr null, ptr [[TMP150]], align 8 2483 // CHECK1-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 8 2484 // CHECK1-NEXT: store i64 2, ptr [[TMP151]], align 8 2485 // CHECK1-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 9 2486 // CHECK1-NEXT: store i64 0, ptr [[TMP152]], align 8 2487 // CHECK1-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 10 2488 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 4 2489 // CHECK1-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 11 2490 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP154]], align 4 2491 // CHECK1-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 12 2492 // CHECK1-NEXT: store i32 0, ptr [[TMP155]], align 4 2493 // CHECK1-NEXT: [[TMP156:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.region_id, ptr [[KERNEL_ARGS40]]) 2494 // CHECK1-NEXT: [[TMP157:%.*]] = icmp ne i32 [[TMP156]], 0 2495 // CHECK1-NEXT: br i1 [[TMP157]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]] 2496 // CHECK1: omp_offload.failed41: 2497 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]] 2498 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT42]] 2499 // CHECK1: omp_offload.cont42: 2500 // CHECK1-NEXT: [[TMP158:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 2501 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP158]], align 8 2502 // CHECK1-NEXT: [[TMP159:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 2503 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP159]], align 8 2504 // CHECK1-NEXT: [[TMP160:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i64 0, i64 0 2505 // CHECK1-NEXT: store ptr null, ptr [[TMP160]], align 8 2506 // CHECK1-NEXT: [[TMP161:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 1 2507 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP161]], align 8 2508 // CHECK1-NEXT: [[TMP162:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 1 2509 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP162]], align 8 2510 // CHECK1-NEXT: [[TMP163:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i64 0, i64 1 2511 // CHECK1-NEXT: store ptr null, ptr [[TMP163]], align 8 2512 // CHECK1-NEXT: [[TMP164:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 2513 // CHECK1-NEXT: [[TMP165:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 2514 // CHECK1-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 0 2515 // CHECK1-NEXT: store i32 3, ptr [[TMP166]], align 4 2516 // CHECK1-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 1 2517 // CHECK1-NEXT: store i32 2, ptr [[TMP167]], align 4 2518 // CHECK1-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 2 2519 // CHECK1-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 8 2520 // CHECK1-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 3 2521 // CHECK1-NEXT: store ptr [[TMP165]], ptr [[TMP169]], align 8 2522 // CHECK1-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 4 2523 // CHECK1-NEXT: store ptr @.offload_sizes.33, ptr [[TMP170]], align 8 2524 // CHECK1-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 5 2525 // CHECK1-NEXT: store ptr @.offload_maptypes.34, ptr [[TMP171]], align 8 2526 // CHECK1-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 6 2527 // CHECK1-NEXT: store ptr null, ptr [[TMP172]], align 8 2528 // CHECK1-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 7 2529 // CHECK1-NEXT: store ptr null, ptr [[TMP173]], align 8 2530 // CHECK1-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 8 2531 // CHECK1-NEXT: store i64 2, ptr [[TMP174]], align 8 2532 // CHECK1-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 9 2533 // CHECK1-NEXT: store i64 0, ptr [[TMP175]], align 8 2534 // CHECK1-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 10 2535 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 4 2536 // CHECK1-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 11 2537 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP177]], align 4 2538 // CHECK1-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 12 2539 // CHECK1-NEXT: store i32 0, ptr [[TMP178]], align 4 2540 // CHECK1-NEXT: [[TMP179:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.region_id, ptr [[KERNEL_ARGS47]]) 2541 // CHECK1-NEXT: [[TMP180:%.*]] = icmp ne i32 [[TMP179]], 0 2542 // CHECK1-NEXT: br i1 [[TMP180]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]] 2543 // CHECK1: omp_offload.failed48: 2544 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]] 2545 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT49]] 2546 // CHECK1: omp_offload.cont49: 2547 // CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4 2548 // CHECK1-NEXT: [[TMP181:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 2549 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP181]], align 8 2550 // CHECK1-NEXT: [[TMP182:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 2551 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP182]], align 8 2552 // CHECK1-NEXT: [[TMP183:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0 2553 // CHECK1-NEXT: store ptr null, ptr [[TMP183]], align 8 2554 // CHECK1-NEXT: [[TMP184:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 2555 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP184]], align 8 2556 // CHECK1-NEXT: [[TMP185:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 2557 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP185]], align 8 2558 // CHECK1-NEXT: [[TMP186:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1 2559 // CHECK1-NEXT: store ptr null, ptr [[TMP186]], align 8 2560 // CHECK1-NEXT: [[TMP187:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 2561 // CHECK1-NEXT: [[TMP188:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 2562 // CHECK1-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 0 2563 // CHECK1-NEXT: store i32 3, ptr [[TMP189]], align 4 2564 // CHECK1-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 1 2565 // CHECK1-NEXT: store i32 2, ptr [[TMP190]], align 4 2566 // CHECK1-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 2 2567 // CHECK1-NEXT: store ptr [[TMP187]], ptr [[TMP191]], align 8 2568 // CHECK1-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 3 2569 // CHECK1-NEXT: store ptr [[TMP188]], ptr [[TMP192]], align 8 2570 // CHECK1-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 4 2571 // CHECK1-NEXT: store ptr @.offload_sizes.35, ptr [[TMP193]], align 8 2572 // CHECK1-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 5 2573 // CHECK1-NEXT: store ptr @.offload_maptypes.36, ptr [[TMP194]], align 8 2574 // CHECK1-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 6 2575 // CHECK1-NEXT: store ptr null, ptr [[TMP195]], align 8 2576 // CHECK1-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 7 2577 // CHECK1-NEXT: store ptr null, ptr [[TMP196]], align 8 2578 // CHECK1-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 8 2579 // CHECK1-NEXT: store i64 2, ptr [[TMP197]], align 8 2580 // CHECK1-NEXT: [[TMP198:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 9 2581 // CHECK1-NEXT: store i64 0, ptr [[TMP198]], align 8 2582 // CHECK1-NEXT: [[TMP199:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 10 2583 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP199]], align 4 2584 // CHECK1-NEXT: [[TMP200:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 11 2585 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP200]], align 4 2586 // CHECK1-NEXT: [[TMP201:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 12 2587 // CHECK1-NEXT: store i32 0, ptr [[TMP201]], align 4 2588 // CHECK1-NEXT: [[TMP202:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.region_id, ptr [[KERNEL_ARGS54]]) 2589 // CHECK1-NEXT: [[TMP203:%.*]] = icmp ne i32 [[TMP202]], 0 2590 // CHECK1-NEXT: br i1 [[TMP203]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]] 2591 // CHECK1: omp_offload.failed55: 2592 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 2593 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT56]] 2594 // CHECK1: omp_offload.cont56: 2595 // CHECK1-NEXT: store i32 10, ptr [[T_VAR]], align 4 2596 // CHECK1-NEXT: [[TMP204:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 2597 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP204]], align 8 2598 // CHECK1-NEXT: [[TMP205:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 2599 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP205]], align 8 2600 // CHECK1-NEXT: [[TMP206:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i64 0, i64 0 2601 // CHECK1-NEXT: store ptr null, ptr [[TMP206]], align 8 2602 // CHECK1-NEXT: [[TMP207:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 2603 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP207]], align 8 2604 // CHECK1-NEXT: [[TMP208:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 2605 // CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP208]], align 8 2606 // CHECK1-NEXT: [[TMP209:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i64 0, i64 1 2607 // CHECK1-NEXT: store ptr null, ptr [[TMP209]], align 8 2608 // CHECK1-NEXT: [[TMP210:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 2609 // CHECK1-NEXT: [[TMP211:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 2610 // CHECK1-NEXT: [[TMP212:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0 2611 // CHECK1-NEXT: store i32 3, ptr [[TMP212]], align 4 2612 // CHECK1-NEXT: [[TMP213:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1 2613 // CHECK1-NEXT: store i32 2, ptr [[TMP213]], align 4 2614 // CHECK1-NEXT: [[TMP214:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2 2615 // CHECK1-NEXT: store ptr [[TMP210]], ptr [[TMP214]], align 8 2616 // CHECK1-NEXT: [[TMP215:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3 2617 // CHECK1-NEXT: store ptr [[TMP211]], ptr [[TMP215]], align 8 2618 // CHECK1-NEXT: [[TMP216:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4 2619 // CHECK1-NEXT: store ptr @.offload_sizes.37, ptr [[TMP216]], align 8 2620 // CHECK1-NEXT: [[TMP217:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5 2621 // CHECK1-NEXT: store ptr @.offload_maptypes.38, ptr [[TMP217]], align 8 2622 // CHECK1-NEXT: [[TMP218:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6 2623 // CHECK1-NEXT: store ptr null, ptr [[TMP218]], align 8 2624 // CHECK1-NEXT: [[TMP219:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7 2625 // CHECK1-NEXT: store ptr null, ptr [[TMP219]], align 8 2626 // CHECK1-NEXT: [[TMP220:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8 2627 // CHECK1-NEXT: store i64 2, ptr [[TMP220]], align 8 2628 // CHECK1-NEXT: [[TMP221:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9 2629 // CHECK1-NEXT: store i64 0, ptr [[TMP221]], align 8 2630 // CHECK1-NEXT: [[TMP222:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10 2631 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP222]], align 4 2632 // CHECK1-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11 2633 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP223]], align 4 2634 // CHECK1-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12 2635 // CHECK1-NEXT: store i32 0, ptr [[TMP224]], align 4 2636 // CHECK1-NEXT: [[TMP225:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, ptr [[KERNEL_ARGS61]]) 2637 // CHECK1-NEXT: [[TMP226:%.*]] = icmp ne i32 [[TMP225]], 0 2638 // CHECK1-NEXT: br i1 [[TMP226]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]] 2639 // CHECK1: omp_offload.failed62: 2640 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 2641 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT63]] 2642 // CHECK1: omp_offload.cont63: 2643 // CHECK1-NEXT: ret i32 0 2644 // 2645 // 2646 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 2647 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 2648 // CHECK1-NEXT: entry: 2649 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 2650 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 2651 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 2652 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[TMP0]]) 2653 // CHECK1-NEXT: ret void 2654 // 2655 // 2656 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 2657 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 2658 // CHECK1-NEXT: entry: 2659 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2660 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2661 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 2662 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2663 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2664 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2665 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2666 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2667 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2668 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2669 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2670 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 2671 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2672 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2673 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 2674 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 2675 // CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 4 2676 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2677 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2678 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2679 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2680 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2681 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2682 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2683 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2684 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2685 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2686 // CHECK1: cond.true: 2687 // CHECK1-NEXT: br label [[COND_END:%.*]] 2688 // CHECK1: cond.false: 2689 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2690 // CHECK1-NEXT: br label [[COND_END]] 2691 // CHECK1: cond.end: 2692 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2693 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2694 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2695 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2696 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2697 // CHECK1: omp.inner.for.cond: 2698 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2699 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2700 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2701 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2702 // CHECK1: omp.inner.for.body: 2703 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2704 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2705 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2706 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2707 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 2708 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 2709 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 2710 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 4 2711 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2712 // CHECK1: omp.body.continue: 2713 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2714 // CHECK1: omp.inner.for.inc: 2715 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2716 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 2717 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 2718 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2719 // CHECK1: omp.inner.for.end: 2720 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2721 // CHECK1: omp.loop.exit: 2722 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2723 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2724 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 8 2725 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 2726 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2727 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2728 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2729 // CHECK1-NEXT: ] 2730 // CHECK1: .omp.reduction.case1: 2731 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 2732 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4 2733 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 2734 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 2735 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 2736 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2737 // CHECK1: .omp.reduction.case2: 2738 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4 2739 // CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 2740 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 2741 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2742 // CHECK1: .omp.reduction.default: 2743 // CHECK1-NEXT: ret void 2744 // 2745 // 2746 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 2747 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 2748 // CHECK1-NEXT: entry: 2749 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 2750 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 2751 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 2752 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 2753 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 2754 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 2755 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 2756 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 2757 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 2758 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 2759 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2760 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 2761 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 2762 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 2763 // CHECK1-NEXT: ret void 2764 // 2765 // 2766 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37 2767 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 2768 // CHECK1-NEXT: entry: 2769 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 2770 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 2771 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 2772 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 2773 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 2774 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 2775 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 2776 // CHECK1-NEXT: ret void 2777 // 2778 // 2779 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined 2780 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 2781 // CHECK1-NEXT: entry: 2782 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2783 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2784 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 2785 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 2786 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2787 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2788 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2789 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2790 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2791 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2792 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2793 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2794 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 2795 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2796 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2797 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 2798 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 2799 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 2800 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 2801 // CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 4 2802 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2803 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2804 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2805 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2806 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2807 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2808 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2809 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2810 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2811 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2812 // CHECK1: cond.true: 2813 // CHECK1-NEXT: br label [[COND_END:%.*]] 2814 // CHECK1: cond.false: 2815 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2816 // CHECK1-NEXT: br label [[COND_END]] 2817 // CHECK1: cond.end: 2818 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2819 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2820 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2821 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2822 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2823 // CHECK1: omp.inner.for.cond: 2824 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2825 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2826 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2827 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2828 // CHECK1: omp.inner.for.body: 2829 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2830 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2831 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2832 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2833 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 2834 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64 2835 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 2836 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2837 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR1]], align 4 2838 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP12]], [[TMP11]] 2839 // CHECK1-NEXT: store i32 [[SUB]], ptr [[T_VAR1]], align 4 2840 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2841 // CHECK1: omp.body.continue: 2842 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2843 // CHECK1: omp.inner.for.inc: 2844 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2845 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 2846 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 2847 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2848 // CHECK1: omp.inner.for.end: 2849 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2850 // CHECK1: omp.loop.exit: 2851 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 2852 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2853 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 8 2854 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 2855 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2856 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2857 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2858 // CHECK1-NEXT: ] 2859 // CHECK1: .omp.reduction.case1: 2860 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 2861 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 2862 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 2863 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 4 2864 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 2865 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2866 // CHECK1: .omp.reduction.case2: 2867 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 2868 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 2869 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 2870 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2871 // CHECK1: .omp.reduction.default: 2872 // CHECK1-NEXT: ret void 2873 // 2874 // 2875 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func 2876 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 2877 // CHECK1-NEXT: entry: 2878 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 2879 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 2880 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 2881 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 2882 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 2883 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 2884 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 2885 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 2886 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 2887 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 2888 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2889 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 2890 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 2891 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 2892 // CHECK1-NEXT: ret void 2893 // 2894 // 2895 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43 2896 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 2897 // CHECK1-NEXT: entry: 2898 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 2899 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 2900 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 2901 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 2902 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 2903 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 2904 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 2905 // CHECK1-NEXT: ret void 2906 // 2907 // 2908 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined 2909 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 2910 // CHECK1-NEXT: entry: 2911 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2912 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2913 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 2914 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 2915 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2916 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2917 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2918 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2919 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2920 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2921 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2922 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2923 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 2924 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 2925 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2926 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2927 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2928 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 2929 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 2930 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 2931 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 2932 // CHECK1-NEXT: store i32 1, ptr [[T_VAR1]], align 4 2933 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2934 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2935 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2936 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2937 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2938 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2939 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2940 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2941 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2942 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2943 // CHECK1: cond.true: 2944 // CHECK1-NEXT: br label [[COND_END:%.*]] 2945 // CHECK1: cond.false: 2946 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2947 // CHECK1-NEXT: br label [[COND_END]] 2948 // CHECK1: cond.end: 2949 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2950 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2951 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2952 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2953 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2954 // CHECK1: omp.inner.for.cond: 2955 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2956 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2957 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2958 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2959 // CHECK1: omp.inner.for.body: 2960 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2961 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2962 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2963 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2964 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 2965 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2966 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2967 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 2968 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2969 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP10]], [[TMP12]] 2970 // CHECK1-NEXT: store i32 [[MUL3]], ptr [[T_VAR1]], align 4 2971 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2972 // CHECK1: omp.body.continue: 2973 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2974 // CHECK1: omp.inner.for.inc: 2975 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2976 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 2977 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 2978 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 2979 // CHECK1: omp.inner.for.end: 2980 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2981 // CHECK1: omp.loop.exit: 2982 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 2983 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2984 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 8 2985 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 2986 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2987 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2988 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2989 // CHECK1-NEXT: ] 2990 // CHECK1: .omp.reduction.case1: 2991 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 2992 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 2993 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], [[TMP17]] 2994 // CHECK1-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 4 2995 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 2996 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2997 // CHECK1: .omp.reduction.case2: 2998 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 2999 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 4 3000 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 3001 // CHECK1: atomic_cont: 3002 // CHECK1-NEXT: [[TMP19:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP24:%.*]], [[ATOMIC_CONT]] ] 3003 // CHECK1-NEXT: store i32 [[TMP19]], ptr [[_TMP6]], align 4 3004 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[_TMP6]], align 4 3005 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR1]], align 4 3006 // CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP20]], [[TMP21]] 3007 // CHECK1-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 4 3008 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4 3009 // CHECK1-NEXT: [[TMP23:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP19]], i32 [[TMP22]] monotonic monotonic, align 4 3010 // CHECK1-NEXT: [[TMP24]] = extractvalue { i32, i1 } [[TMP23]], 0 3011 // CHECK1-NEXT: [[TMP25:%.*]] = extractvalue { i32, i1 } [[TMP23]], 1 3012 // CHECK1-NEXT: br i1 [[TMP25]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 3013 // CHECK1: atomic_exit: 3014 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3015 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3016 // CHECK1: .omp.reduction.default: 3017 // CHECK1-NEXT: ret void 3018 // 3019 // 3020 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func 3021 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3022 // CHECK1-NEXT: entry: 3023 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3024 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3025 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3026 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3027 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3028 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3029 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3030 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3031 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3032 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3033 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 3034 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 3035 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]] 3036 // CHECK1-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 4 3037 // CHECK1-NEXT: ret void 3038 // 3039 // 3040 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 3041 // CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3042 // CHECK1-NEXT: entry: 3043 // CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 8 3044 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3045 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 8 3046 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3047 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 8 3048 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3049 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3050 // CHECK1-NEXT: ret void 3051 // 3052 // 3053 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 3054 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3055 // CHECK1-NEXT: entry: 3056 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3057 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3058 // CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 8 3059 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3060 // CHECK1-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 1 3061 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3062 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3063 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3064 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3065 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3066 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3067 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3068 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3069 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 3070 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 3071 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3072 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3073 // CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 8 3074 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3075 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 8 3076 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3077 // CHECK1-NEXT: store i8 1, ptr [[AND_VAR1]], align 1 3078 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3079 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3080 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3081 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3082 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3083 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3084 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3085 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3086 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3087 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3088 // CHECK1: cond.true: 3089 // CHECK1-NEXT: br label [[COND_END:%.*]] 3090 // CHECK1: cond.false: 3091 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3092 // CHECK1-NEXT: br label [[COND_END]] 3093 // CHECK1: cond.end: 3094 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3095 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3096 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3097 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3098 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3099 // CHECK1: omp.inner.for.cond: 3100 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3101 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3102 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3103 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3104 // CHECK1: omp.inner.for.body: 3105 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3106 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3107 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3108 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3109 // CHECK1-NEXT: [[TMP10:%.*]] = load i8, ptr [[AND_VAR1]], align 1 3110 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1 3111 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 3112 // CHECK1: land.rhs: 3113 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3114 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3115 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 3116 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3117 // CHECK1-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 2 3118 // CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 0 3119 // CHECK1-NEXT: br label [[LAND_END]] 3120 // CHECK1: land.end: 3121 // CHECK1-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ] 3122 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i8 3123 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 1 3124 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3125 // CHECK1: omp.body.continue: 3126 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3127 // CHECK1: omp.inner.for.inc: 3128 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3129 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 3130 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 3131 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 3132 // CHECK1: omp.inner.for.end: 3133 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3134 // CHECK1: omp.loop.exit: 3135 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3136 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3137 // CHECK1-NEXT: store ptr [[AND_VAR1]], ptr [[TMP15]], align 8 3138 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 3139 // CHECK1-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3140 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3141 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3142 // CHECK1-NEXT: ] 3143 // CHECK1: .omp.reduction.case1: 3144 // CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1 3145 // CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1 3146 // CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]] 3147 // CHECK1: land.rhs6: 3148 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1 3149 // CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1 3150 // CHECK1-NEXT: br label [[LAND_END8]] 3151 // CHECK1: land.end8: 3152 // CHECK1-NEXT: [[TMP19:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ] 3153 // CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i8 3154 // CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 3155 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3156 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3157 // CHECK1: .omp.reduction.case2: 3158 // CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[AND_VAR1]], align 1 3159 // CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1 3160 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 3161 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 3162 // CHECK1: atomic_cont: 3163 // CHECK1-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LAND_END17:%.*]] ] 3164 // CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1 3165 // CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 3166 // CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 3167 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1 3168 // CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1 3169 // CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]] 3170 // CHECK1: land.rhs15: 3171 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[AND_VAR1]], align 1 3172 // CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1 3173 // CHECK1-NEXT: br label [[LAND_END17]] 3174 // CHECK1: land.end17: 3175 // CHECK1-NEXT: [[TMP24:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ] 3176 // CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i8 3177 // CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 3178 // CHECK1-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 3179 // CHECK1-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 1 3180 // CHECK1-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 0 3181 // CHECK1-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 1 3182 // CHECK1-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 3183 // CHECK1: atomic_exit: 3184 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3185 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3186 // CHECK1: .omp.reduction.default: 3187 // CHECK1-NEXT: ret void 3188 // 3189 // 3190 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func 3191 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3192 // CHECK1-NEXT: entry: 3193 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3194 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3195 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3196 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3197 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3198 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3199 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3200 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3201 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3202 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3203 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 3204 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 3205 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 3206 // CHECK1: land.rhs: 3207 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 3208 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 3209 // CHECK1-NEXT: br label [[LAND_END]] 3210 // CHECK1: land.end: 3211 // CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ] 3212 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 3213 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 3214 // CHECK1-NEXT: ret void 3215 // 3216 // 3217 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55 3218 // CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3219 // CHECK1-NEXT: entry: 3220 // CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 8 3221 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3222 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 8 3223 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3224 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 8 3225 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3226 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3227 // CHECK1-NEXT: ret void 3228 // 3229 // 3230 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined 3231 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3232 // CHECK1-NEXT: entry: 3233 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3234 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3235 // CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 8 3236 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3237 // CHECK1-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 1 3238 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3239 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3240 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3241 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3242 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3243 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3244 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3245 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3246 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 3247 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 3248 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3249 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3250 // CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 8 3251 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3252 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 8 3253 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3254 // CHECK1-NEXT: store i8 0, ptr [[OR_VAR1]], align 1 3255 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3256 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3257 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3258 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3259 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3260 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3261 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3262 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3263 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3264 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3265 // CHECK1: cond.true: 3266 // CHECK1-NEXT: br label [[COND_END:%.*]] 3267 // CHECK1: cond.false: 3268 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3269 // CHECK1-NEXT: br label [[COND_END]] 3270 // CHECK1: cond.end: 3271 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3272 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3273 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3274 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3275 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3276 // CHECK1: omp.inner.for.cond: 3277 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3278 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3279 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3280 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3281 // CHECK1: omp.inner.for.body: 3282 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3283 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3284 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3285 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3286 // CHECK1-NEXT: [[TMP10:%.*]] = load i8, ptr [[OR_VAR1]], align 1 3287 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1 3288 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 3289 // CHECK1: lor.rhs: 3290 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3291 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3292 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 3293 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3294 // CHECK1-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 2 3295 // CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 0 3296 // CHECK1-NEXT: br label [[LOR_END]] 3297 // CHECK1: lor.end: 3298 // CHECK1-NEXT: [[TMP13:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ] 3299 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i8 3300 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 1 3301 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3302 // CHECK1: omp.body.continue: 3303 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3304 // CHECK1: omp.inner.for.inc: 3305 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3306 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 3307 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 3308 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 3309 // CHECK1: omp.inner.for.end: 3310 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3311 // CHECK1: omp.loop.exit: 3312 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3313 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3314 // CHECK1-NEXT: store ptr [[OR_VAR1]], ptr [[TMP15]], align 8 3315 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 3316 // CHECK1-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3317 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3318 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3319 // CHECK1-NEXT: ] 3320 // CHECK1: .omp.reduction.case1: 3321 // CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1 3322 // CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1 3323 // CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]] 3324 // CHECK1: lor.rhs6: 3325 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1 3326 // CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1 3327 // CHECK1-NEXT: br label [[LOR_END8]] 3328 // CHECK1: lor.end8: 3329 // CHECK1-NEXT: [[TMP19:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ] 3330 // CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i8 3331 // CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 3332 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3333 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3334 // CHECK1: .omp.reduction.case2: 3335 // CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[OR_VAR1]], align 1 3336 // CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1 3337 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 3338 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 3339 // CHECK1: atomic_cont: 3340 // CHECK1-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LOR_END17:%.*]] ] 3341 // CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1 3342 // CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 3343 // CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 3344 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1 3345 // CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1 3346 // CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]] 3347 // CHECK1: lor.rhs15: 3348 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[OR_VAR1]], align 1 3349 // CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1 3350 // CHECK1-NEXT: br label [[LOR_END17]] 3351 // CHECK1: lor.end17: 3352 // CHECK1-NEXT: [[TMP24:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ] 3353 // CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i8 3354 // CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 3355 // CHECK1-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 3356 // CHECK1-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 1 3357 // CHECK1-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 0 3358 // CHECK1-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 1 3359 // CHECK1-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 3360 // CHECK1: atomic_exit: 3361 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3362 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3363 // CHECK1: .omp.reduction.default: 3364 // CHECK1-NEXT: ret void 3365 // 3366 // 3367 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func 3368 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3369 // CHECK1-NEXT: entry: 3370 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3371 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3372 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3373 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3374 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3375 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3376 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3377 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3378 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3379 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3380 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 3381 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 3382 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 3383 // CHECK1: lor.rhs: 3384 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 3385 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 3386 // CHECK1-NEXT: br label [[LOR_END]] 3387 // CHECK1: lor.end: 3388 // CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ] 3389 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 3390 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 3391 // CHECK1-NEXT: ret void 3392 // 3393 // 3394 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61 3395 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3396 // CHECK1-NEXT: entry: 3397 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 3398 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3399 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 3400 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3401 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 3402 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3403 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3404 // CHECK1-NEXT: ret void 3405 // 3406 // 3407 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined 3408 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3409 // CHECK1-NEXT: entry: 3410 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3411 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3412 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 3413 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3414 // CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 3415 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3416 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3417 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3418 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3419 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3420 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3421 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3422 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3423 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3424 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3425 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 3426 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3427 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 3428 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3429 // CHECK1-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 4 3430 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3431 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3432 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3433 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3434 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3435 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3436 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3437 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3438 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3439 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3440 // CHECK1: cond.true: 3441 // CHECK1-NEXT: br label [[COND_END:%.*]] 3442 // CHECK1: cond.false: 3443 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3444 // CHECK1-NEXT: br label [[COND_END]] 3445 // CHECK1: cond.end: 3446 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3447 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3448 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3449 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3450 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3451 // CHECK1: omp.inner.for.cond: 3452 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3453 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3454 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3455 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3456 // CHECK1: omp.inner.for.body: 3457 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3458 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3459 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3460 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3461 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3462 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3463 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3464 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 3465 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3466 // CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP10]], [[TMP12]] 3467 // CHECK1-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 4 3468 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3469 // CHECK1: omp.body.continue: 3470 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3471 // CHECK1: omp.inner.for.inc: 3472 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3473 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 3474 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 3475 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 3476 // CHECK1: omp.inner.for.end: 3477 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3478 // CHECK1: omp.loop.exit: 3479 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3480 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3481 // CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 8 3482 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 3483 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3484 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3485 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3486 // CHECK1-NEXT: ] 3487 // CHECK1: .omp.reduction.case1: 3488 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 3489 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3490 // CHECK1-NEXT: [[AND4:%.*]] = and i32 [[TMP16]], [[TMP17]] 3491 // CHECK1-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 4 3492 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3493 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3494 // CHECK1: .omp.reduction.case2: 3495 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3496 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 3497 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3498 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3499 // CHECK1: .omp.reduction.default: 3500 // CHECK1-NEXT: ret void 3501 // 3502 // 3503 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func 3504 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3505 // CHECK1-NEXT: entry: 3506 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3507 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3508 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3509 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3510 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3511 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3512 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3513 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3514 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3515 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3516 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 3517 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 3518 // CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]] 3519 // CHECK1-NEXT: store i32 [[AND]], ptr [[TMP7]], align 4 3520 // CHECK1-NEXT: ret void 3521 // 3522 // 3523 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 3524 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3525 // CHECK1-NEXT: entry: 3526 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 3527 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3528 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 3529 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3530 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 3531 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3532 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3533 // CHECK1-NEXT: ret void 3534 // 3535 // 3536 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined 3537 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3538 // CHECK1-NEXT: entry: 3539 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3540 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3541 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 3542 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3543 // CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 3544 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3545 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3546 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3547 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3548 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3549 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3550 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3551 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3552 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3553 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3554 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 3555 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3556 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 3557 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3558 // CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 3559 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3560 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3561 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3562 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3563 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3564 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3565 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3566 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3567 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3568 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3569 // CHECK1: cond.true: 3570 // CHECK1-NEXT: br label [[COND_END:%.*]] 3571 // CHECK1: cond.false: 3572 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3573 // CHECK1-NEXT: br label [[COND_END]] 3574 // CHECK1: cond.end: 3575 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3576 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3577 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3578 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3579 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3580 // CHECK1: omp.inner.for.cond: 3581 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3582 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3583 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3584 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3585 // CHECK1: omp.inner.for.body: 3586 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3587 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3588 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3589 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3590 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3591 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3592 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3593 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 3594 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3595 // CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP10]], [[TMP12]] 3596 // CHECK1-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 4 3597 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3598 // CHECK1: omp.body.continue: 3599 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3600 // CHECK1: omp.inner.for.inc: 3601 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3602 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 3603 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 3604 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 3605 // CHECK1: omp.inner.for.end: 3606 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3607 // CHECK1: omp.loop.exit: 3608 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3609 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3610 // CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 8 3611 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 3612 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3613 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3614 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3615 // CHECK1-NEXT: ] 3616 // CHECK1: .omp.reduction.case1: 3617 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 3618 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3619 // CHECK1-NEXT: [[OR4:%.*]] = or i32 [[TMP16]], [[TMP17]] 3620 // CHECK1-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 4 3621 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3622 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3623 // CHECK1: .omp.reduction.case2: 3624 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3625 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 3626 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3627 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3628 // CHECK1: .omp.reduction.default: 3629 // CHECK1-NEXT: ret void 3630 // 3631 // 3632 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func 3633 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3634 // CHECK1-NEXT: entry: 3635 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3636 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3637 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3638 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3639 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3640 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3641 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3642 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3643 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3644 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3645 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 3646 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 3647 // CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]] 3648 // CHECK1-NEXT: store i32 [[OR]], ptr [[TMP7]], align 4 3649 // CHECK1-NEXT: ret void 3650 // 3651 // 3652 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71 3653 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3654 // CHECK1-NEXT: entry: 3655 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 3656 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3657 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 3658 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3659 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 3660 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3661 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3662 // CHECK1-NEXT: ret void 3663 // 3664 // 3665 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined 3666 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3667 // CHECK1-NEXT: entry: 3668 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3669 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3670 // CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 3671 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3672 // CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 3673 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3674 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3675 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3676 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3677 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3678 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3679 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3680 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3681 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3682 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3683 // CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 3684 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3685 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 3686 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3687 // CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 3688 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3689 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3690 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3691 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3692 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3693 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3694 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3695 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3696 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3697 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3698 // CHECK1: cond.true: 3699 // CHECK1-NEXT: br label [[COND_END:%.*]] 3700 // CHECK1: cond.false: 3701 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3702 // CHECK1-NEXT: br label [[COND_END]] 3703 // CHECK1: cond.end: 3704 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3705 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3706 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3707 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3708 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3709 // CHECK1: omp.inner.for.cond: 3710 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3711 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3712 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3713 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3714 // CHECK1: omp.inner.for.body: 3715 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3716 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3717 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3718 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3719 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3720 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3721 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3722 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 3723 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3724 // CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP10]], [[TMP12]] 3725 // CHECK1-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 4 3726 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3727 // CHECK1: omp.body.continue: 3728 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3729 // CHECK1: omp.inner.for.inc: 3730 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3731 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 3732 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 3733 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 3734 // CHECK1: omp.inner.for.end: 3735 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3736 // CHECK1: omp.loop.exit: 3737 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3738 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3739 // CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 8 3740 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 3741 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3742 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3743 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3744 // CHECK1-NEXT: ] 3745 // CHECK1: .omp.reduction.case1: 3746 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 3747 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3748 // CHECK1-NEXT: [[XOR4:%.*]] = xor i32 [[TMP16]], [[TMP17]] 3749 // CHECK1-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 4 3750 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3751 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3752 // CHECK1: .omp.reduction.case2: 3753 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 3754 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 3755 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3756 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3757 // CHECK1: .omp.reduction.default: 3758 // CHECK1-NEXT: ret void 3759 // 3760 // 3761 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func 3762 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3763 // CHECK1-NEXT: entry: 3764 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3765 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3766 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3767 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3768 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3769 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3770 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3771 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3772 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3773 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3774 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 3775 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 3776 // CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]] 3777 // CHECK1-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 4 3778 // CHECK1-NEXT: ret void 3779 // 3780 // 3781 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77 3782 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3783 // CHECK1-NEXT: entry: 3784 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 3785 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3786 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 3787 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3788 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 3789 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3790 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3791 // CHECK1-NEXT: ret void 3792 // 3793 // 3794 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined 3795 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3796 // CHECK1-NEXT: entry: 3797 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3798 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3799 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 3800 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3801 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3802 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3803 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3804 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3805 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3806 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3807 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3808 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3809 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3810 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3811 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3812 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 3813 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3814 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 3815 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3816 // CHECK1-NEXT: store i32 -2147483648, ptr [[T_VAR1]], align 4 3817 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3818 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3819 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3820 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3821 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3822 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3823 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3824 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3825 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3826 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3827 // CHECK1: cond.true: 3828 // CHECK1-NEXT: br label [[COND_END:%.*]] 3829 // CHECK1: cond.false: 3830 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3831 // CHECK1-NEXT: br label [[COND_END]] 3832 // CHECK1: cond.end: 3833 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3834 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3835 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3836 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3837 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3838 // CHECK1: omp.inner.for.cond: 3839 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3840 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3841 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3842 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3843 // CHECK1: omp.inner.for.body: 3844 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3845 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3846 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3847 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3848 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 3849 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3850 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3851 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 3852 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3853 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP10]], [[TMP12]] 3854 // CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 3855 // CHECK1: cond.true4: 3856 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4 3857 // CHECK1-NEXT: br label [[COND_END8:%.*]] 3858 // CHECK1: cond.false5: 3859 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4 3860 // CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP14]] to i64 3861 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM6]] 3862 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4 3863 // CHECK1-NEXT: br label [[COND_END8]] 3864 // CHECK1: cond.end8: 3865 // CHECK1-NEXT: [[COND9:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ] 3866 // CHECK1-NEXT: store i32 [[COND9]], ptr [[T_VAR1]], align 4 3867 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3868 // CHECK1: omp.body.continue: 3869 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3870 // CHECK1: omp.inner.for.inc: 3871 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3872 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 3873 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 3874 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 3875 // CHECK1: omp.inner.for.end: 3876 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3877 // CHECK1: omp.loop.exit: 3878 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 3879 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3880 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 8 3881 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 3882 // CHECK1-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3883 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3884 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3885 // CHECK1-NEXT: ] 3886 // CHECK1: .omp.reduction.case1: 3887 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 4 3888 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 4 3889 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP19]], [[TMP20]] 3890 // CHECK1-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 3891 // CHECK1: cond.true12: 3892 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 4 3893 // CHECK1-NEXT: br label [[COND_END14:%.*]] 3894 // CHECK1: cond.false13: 3895 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 4 3896 // CHECK1-NEXT: br label [[COND_END14]] 3897 // CHECK1: cond.end14: 3898 // CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE12]] ], [ [[TMP22]], [[COND_FALSE13]] ] 3899 // CHECK1-NEXT: store i32 [[COND15]], ptr [[TMP0]], align 4 3900 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3901 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3902 // CHECK1: .omp.reduction.case2: 3903 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4 3904 // CHECK1-NEXT: [[TMP24:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP23]] monotonic, align 4 3905 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 3906 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3907 // CHECK1: .omp.reduction.default: 3908 // CHECK1-NEXT: ret void 3909 // 3910 // 3911 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func 3912 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 3913 // CHECK1-NEXT: entry: 3914 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 3915 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 3916 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 3917 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 3918 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 3919 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 3920 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 3921 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 3922 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 3923 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 3924 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 3925 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 3926 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 3927 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3928 // CHECK1: cond.true: 3929 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 3930 // CHECK1-NEXT: br label [[COND_END:%.*]] 3931 // CHECK1: cond.false: 3932 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 3933 // CHECK1-NEXT: br label [[COND_END]] 3934 // CHECK1: cond.end: 3935 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 3936 // CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 3937 // CHECK1-NEXT: ret void 3938 // 3939 // 3940 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 3941 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3942 // CHECK1-NEXT: entry: 3943 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 3944 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3945 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 3946 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3947 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 3948 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3949 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 3950 // CHECK1-NEXT: ret void 3951 // 3952 // 3953 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined 3954 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 3955 // CHECK1-NEXT: entry: 3956 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3957 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3958 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 3959 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 3960 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 3961 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3962 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 3963 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3964 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3965 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3966 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3967 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 3968 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 3969 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3970 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3971 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 3972 // CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 3973 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 3974 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 3975 // CHECK1-NEXT: store i32 2147483647, ptr [[T_VAR1]], align 4 3976 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3977 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3978 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3979 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3980 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3981 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3982 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3983 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3984 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3985 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3986 // CHECK1: cond.true: 3987 // CHECK1-NEXT: br label [[COND_END:%.*]] 3988 // CHECK1: cond.false: 3989 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3990 // CHECK1-NEXT: br label [[COND_END]] 3991 // CHECK1: cond.end: 3992 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3993 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3994 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3995 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3996 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3997 // CHECK1: omp.inner.for.cond: 3998 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3999 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4000 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4001 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4002 // CHECK1: omp.inner.for.body: 4003 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4004 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4005 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4006 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 4007 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 4008 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 4009 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4010 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]] 4011 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 4012 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP12]] 4013 // CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 4014 // CHECK1: cond.true4: 4015 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4 4016 // CHECK1-NEXT: br label [[COND_END8:%.*]] 4017 // CHECK1: cond.false5: 4018 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4 4019 // CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP14]] to i64 4020 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM6]] 4021 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4 4022 // CHECK1-NEXT: br label [[COND_END8]] 4023 // CHECK1: cond.end8: 4024 // CHECK1-NEXT: [[COND9:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ] 4025 // CHECK1-NEXT: store i32 [[COND9]], ptr [[T_VAR1]], align 4 4026 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4027 // CHECK1: omp.body.continue: 4028 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4029 // CHECK1: omp.inner.for.inc: 4030 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4031 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 4032 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 4033 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 4034 // CHECK1: omp.inner.for.end: 4035 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4036 // CHECK1: omp.loop.exit: 4037 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 4038 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 4039 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 8 4040 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 4041 // CHECK1-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4042 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4043 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4044 // CHECK1-NEXT: ] 4045 // CHECK1: .omp.reduction.case1: 4046 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 4 4047 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 4 4048 // CHECK1-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP19]], [[TMP20]] 4049 // CHECK1-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 4050 // CHECK1: cond.true12: 4051 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 4 4052 // CHECK1-NEXT: br label [[COND_END14:%.*]] 4053 // CHECK1: cond.false13: 4054 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 4 4055 // CHECK1-NEXT: br label [[COND_END14]] 4056 // CHECK1: cond.end14: 4057 // CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE12]] ], [ [[TMP22]], [[COND_FALSE13]] ] 4058 // CHECK1-NEXT: store i32 [[COND15]], ptr [[TMP0]], align 4 4059 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 4060 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4061 // CHECK1: .omp.reduction.case2: 4062 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4 4063 // CHECK1-NEXT: [[TMP24:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP23]] monotonic, align 4 4064 // CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 4065 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4066 // CHECK1: .omp.reduction.default: 4067 // CHECK1-NEXT: ret void 4068 // 4069 // 4070 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func 4071 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 4072 // CHECK1-NEXT: entry: 4073 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 4074 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 4075 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 4076 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 4077 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 4078 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 4079 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 4080 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 4081 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 4082 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 4083 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 4084 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 4085 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 4086 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4087 // CHECK1: cond.true: 4088 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 4089 // CHECK1-NEXT: br label [[COND_END:%.*]] 4090 // CHECK1: cond.false: 4091 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 4092 // CHECK1-NEXT: br label [[COND_END]] 4093 // CHECK1: cond.end: 4094 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4095 // CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 4096 // CHECK1-NEXT: ret void 4097 // 4098 // 4099 // CHECK3-LABEL: define {{[^@]+}}@main 4100 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 4101 // CHECK3-NEXT: entry: 4102 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4103 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 4104 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 4105 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 4106 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4107 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4108 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 4109 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 4110 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 4111 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4112 // CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4113 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 4 4114 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 4 4115 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 4 4116 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 4117 // CHECK3-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4118 // CHECK3-NEXT: [[AND_VAR:%.*]] = alloca i8, align 1 4119 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4 4120 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4 4121 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4 4122 // CHECK3-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 4123 // CHECK3-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4124 // CHECK3-NEXT: [[OR_VAR:%.*]] = alloca i8, align 1 4125 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [1 x ptr], align 4 4126 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [1 x ptr], align 4 4127 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [1 x ptr], align 4 4128 // CHECK3-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 4129 // CHECK3-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4130 // CHECK3-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 4 4131 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [1 x ptr], align 4 4132 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [1 x ptr], align 4 4133 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [1 x ptr], align 4 4134 // CHECK3-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 4135 // CHECK3-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4136 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [1 x ptr], align 4 4137 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [1 x ptr], align 4 4138 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [1 x ptr], align 4 4139 // CHECK3-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 4140 // CHECK3-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4141 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [1 x ptr], align 4 4142 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [1 x ptr], align 4 4143 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [1 x ptr], align 4 4144 // CHECK3-NEXT: [[_TMP46:%.*]] = alloca i32, align 4 4145 // CHECK3-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4146 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [1 x ptr], align 4 4147 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [1 x ptr], align 4 4148 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [1 x ptr], align 4 4149 // CHECK3-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 4150 // CHECK3-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4151 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [1 x ptr], align 4 4152 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [1 x ptr], align 4 4153 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [1 x ptr], align 4 4154 // CHECK3-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 4155 // CHECK3-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4156 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 4157 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4158 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 4 4159 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4160 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP1]], align 4 4161 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4162 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 4163 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4164 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4165 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4166 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 4167 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4168 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 4169 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4170 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 4171 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4172 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 4173 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4174 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 4175 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4176 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 4177 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4178 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 4179 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4180 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 4181 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4182 // CHECK3-NEXT: store i64 2, ptr [[TMP13]], align 8 4183 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4184 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 4185 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4186 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 4187 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4188 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 4189 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4190 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 4191 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.region_id, ptr [[KERNEL_ARGS]]) 4192 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 4193 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4194 // CHECK3: omp_offload.failed: 4195 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209(ptr @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 4196 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 4197 // CHECK3: omp_offload.cont: 4198 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4199 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP20]], align 4 4200 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4201 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP21]], align 4 4202 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 4203 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4 4204 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4205 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4206 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 4207 // CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 4 4208 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 4209 // CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4 4210 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 4211 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 4212 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 4213 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 4214 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 4215 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 4216 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 4217 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 4218 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 4219 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 4220 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 4221 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4 4222 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 4223 // CHECK3-NEXT: store i64 2, ptr [[TMP33]], align 8 4224 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 4225 // CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8 4226 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 4227 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 4228 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 4229 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 4230 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 4231 // CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4 4232 // CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.region_id, ptr [[KERNEL_ARGS5]]) 4233 // CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 4234 // CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 4235 // CHECK3: omp_offload.failed6: 4236 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 4237 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]] 4238 // CHECK3: omp_offload.cont7: 4239 // CHECK3-NEXT: store i32 1, ptr @_ZZ4mainE5sivar, align 4 4240 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 4241 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP40]], align 4 4242 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 4243 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP41]], align 4 4244 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 4245 // CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4 4246 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 4247 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 4248 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 4249 // CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 4 4250 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 4251 // CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4 4252 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 4253 // CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 4254 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 4255 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 4256 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 4257 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 4258 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 4259 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 4260 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 4261 // CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4 4262 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 4263 // CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4 4264 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 4265 // CHECK3-NEXT: store i64 2, ptr [[TMP53]], align 8 4266 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 4267 // CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8 4268 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 4269 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 4270 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 4271 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 4272 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 4273 // CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4 4274 // CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.region_id, ptr [[KERNEL_ARGS12]]) 4275 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 4276 // CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 4277 // CHECK3: omp_offload.failed13: 4278 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 4279 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT14]] 4280 // CHECK3: omp_offload.cont14: 4281 // CHECK3-NEXT: store i8 1, ptr [[AND_VAR]], align 1 4282 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 4283 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP60]], align 4 4284 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 4285 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP61]], align 4 4286 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0 4287 // CHECK3-NEXT: store ptr null, ptr [[TMP62]], align 4 4288 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 4289 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 4290 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 4291 // CHECK3-NEXT: store i32 3, ptr [[TMP65]], align 4 4292 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 4293 // CHECK3-NEXT: store i32 1, ptr [[TMP66]], align 4 4294 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 4295 // CHECK3-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 4 4296 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 4297 // CHECK3-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 4 4298 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 4299 // CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 4 4300 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 4301 // CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4 4302 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 4303 // CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 4 4304 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 4305 // CHECK3-NEXT: store ptr null, ptr [[TMP72]], align 4 4306 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 4307 // CHECK3-NEXT: store i64 2, ptr [[TMP73]], align 8 4308 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 4309 // CHECK3-NEXT: store i64 0, ptr [[TMP74]], align 8 4310 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 4311 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 4312 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 4313 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 4314 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 4315 // CHECK3-NEXT: store i32 0, ptr [[TMP77]], align 4 4316 // CHECK3-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.region_id, ptr [[KERNEL_ARGS19]]) 4317 // CHECK3-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 4318 // CHECK3-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 4319 // CHECK3: omp_offload.failed20: 4320 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226(ptr [[AND_VAR]]) #[[ATTR2]] 4321 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT21]] 4322 // CHECK3: omp_offload.cont21: 4323 // CHECK3-NEXT: store i8 0, ptr [[OR_VAR]], align 1 4324 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 4325 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP80]], align 4 4326 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 4327 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP81]], align 4 4328 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i32 0, i32 0 4329 // CHECK3-NEXT: store ptr null, ptr [[TMP82]], align 4 4330 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 4331 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 4332 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 0 4333 // CHECK3-NEXT: store i32 3, ptr [[TMP85]], align 4 4334 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 1 4335 // CHECK3-NEXT: store i32 1, ptr [[TMP86]], align 4 4336 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 2 4337 // CHECK3-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 4 4338 // CHECK3-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 3 4339 // CHECK3-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 4 4340 // CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 4 4341 // CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 4 4342 // CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 5 4343 // CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4 4344 // CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 6 4345 // CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 4 4346 // CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 7 4347 // CHECK3-NEXT: store ptr null, ptr [[TMP92]], align 4 4348 // CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 8 4349 // CHECK3-NEXT: store i64 2, ptr [[TMP93]], align 8 4350 // CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 9 4351 // CHECK3-NEXT: store i64 0, ptr [[TMP94]], align 8 4352 // CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 10 4353 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 4354 // CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 11 4355 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 4356 // CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 12 4357 // CHECK3-NEXT: store i32 0, ptr [[TMP97]], align 4 4358 // CHECK3-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.region_id, ptr [[KERNEL_ARGS26]]) 4359 // CHECK3-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 4360 // CHECK3-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 4361 // CHECK3: omp_offload.failed27: 4362 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232(ptr [[OR_VAR]]) #[[ATTR2]] 4363 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT28]] 4364 // CHECK3: omp_offload.cont28: 4365 // CHECK3-NEXT: store i32 1, ptr [[BIT_VAR]], align 4 4366 // CHECK3-NEXT: [[TMP100:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 4367 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP100]], align 4 4368 // CHECK3-NEXT: [[TMP101:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 4369 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP101]], align 4 4370 // CHECK3-NEXT: [[TMP102:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i32 0, i32 0 4371 // CHECK3-NEXT: store ptr null, ptr [[TMP102]], align 4 4372 // CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 4373 // CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 4374 // CHECK3-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 0 4375 // CHECK3-NEXT: store i32 3, ptr [[TMP105]], align 4 4376 // CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 1 4377 // CHECK3-NEXT: store i32 1, ptr [[TMP106]], align 4 4378 // CHECK3-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 2 4379 // CHECK3-NEXT: store ptr [[TMP103]], ptr [[TMP107]], align 4 4380 // CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 3 4381 // CHECK3-NEXT: store ptr [[TMP104]], ptr [[TMP108]], align 4 4382 // CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 4 4383 // CHECK3-NEXT: store ptr @.offload_sizes.9, ptr [[TMP109]], align 4 4384 // CHECK3-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 5 4385 // CHECK3-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP110]], align 4 4386 // CHECK3-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 6 4387 // CHECK3-NEXT: store ptr null, ptr [[TMP111]], align 4 4388 // CHECK3-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 7 4389 // CHECK3-NEXT: store ptr null, ptr [[TMP112]], align 4 4390 // CHECK3-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 8 4391 // CHECK3-NEXT: store i64 2, ptr [[TMP113]], align 8 4392 // CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 9 4393 // CHECK3-NEXT: store i64 0, ptr [[TMP114]], align 8 4394 // CHECK3-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 10 4395 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4 4396 // CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 11 4397 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP116]], align 4 4398 // CHECK3-NEXT: [[TMP117:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 12 4399 // CHECK3-NEXT: store i32 0, ptr [[TMP117]], align 4 4400 // CHECK3-NEXT: [[TMP118:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.region_id, ptr [[KERNEL_ARGS33]]) 4401 // CHECK3-NEXT: [[TMP119:%.*]] = icmp ne i32 [[TMP118]], 0 4402 // CHECK3-NEXT: br i1 [[TMP119]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]] 4403 // CHECK3: omp_offload.failed34: 4404 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238(ptr [[BIT_VAR]]) #[[ATTR2]] 4405 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT35]] 4406 // CHECK3: omp_offload.cont35: 4407 // CHECK3-NEXT: [[TMP120:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 4408 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP120]], align 4 4409 // CHECK3-NEXT: [[TMP121:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 4410 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP121]], align 4 4411 // CHECK3-NEXT: [[TMP122:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i32 0, i32 0 4412 // CHECK3-NEXT: store ptr null, ptr [[TMP122]], align 4 4413 // CHECK3-NEXT: [[TMP123:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 4414 // CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 4415 // CHECK3-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 0 4416 // CHECK3-NEXT: store i32 3, ptr [[TMP125]], align 4 4417 // CHECK3-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 1 4418 // CHECK3-NEXT: store i32 1, ptr [[TMP126]], align 4 4419 // CHECK3-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 2 4420 // CHECK3-NEXT: store ptr [[TMP123]], ptr [[TMP127]], align 4 4421 // CHECK3-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 3 4422 // CHECK3-NEXT: store ptr [[TMP124]], ptr [[TMP128]], align 4 4423 // CHECK3-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 4 4424 // CHECK3-NEXT: store ptr @.offload_sizes.11, ptr [[TMP129]], align 4 4425 // CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 5 4426 // CHECK3-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP130]], align 4 4427 // CHECK3-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 6 4428 // CHECK3-NEXT: store ptr null, ptr [[TMP131]], align 4 4429 // CHECK3-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 7 4430 // CHECK3-NEXT: store ptr null, ptr [[TMP132]], align 4 4431 // CHECK3-NEXT: [[TMP133:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 8 4432 // CHECK3-NEXT: store i64 2, ptr [[TMP133]], align 8 4433 // CHECK3-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 9 4434 // CHECK3-NEXT: store i64 0, ptr [[TMP134]], align 8 4435 // CHECK3-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 10 4436 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP135]], align 4 4437 // CHECK3-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 11 4438 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP136]], align 4 4439 // CHECK3-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 12 4440 // CHECK3-NEXT: store i32 0, ptr [[TMP137]], align 4 4441 // CHECK3-NEXT: [[TMP138:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.region_id, ptr [[KERNEL_ARGS40]]) 4442 // CHECK3-NEXT: [[TMP139:%.*]] = icmp ne i32 [[TMP138]], 0 4443 // CHECK3-NEXT: br i1 [[TMP139]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]] 4444 // CHECK3: omp_offload.failed41: 4445 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243(ptr [[BIT_VAR]]) #[[ATTR2]] 4446 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT42]] 4447 // CHECK3: omp_offload.cont42: 4448 // CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 4449 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP140]], align 4 4450 // CHECK3-NEXT: [[TMP141:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 4451 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP141]], align 4 4452 // CHECK3-NEXT: [[TMP142:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i32 0, i32 0 4453 // CHECK3-NEXT: store ptr null, ptr [[TMP142]], align 4 4454 // CHECK3-NEXT: [[TMP143:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 4455 // CHECK3-NEXT: [[TMP144:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 4456 // CHECK3-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 0 4457 // CHECK3-NEXT: store i32 3, ptr [[TMP145]], align 4 4458 // CHECK3-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 1 4459 // CHECK3-NEXT: store i32 1, ptr [[TMP146]], align 4 4460 // CHECK3-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 2 4461 // CHECK3-NEXT: store ptr [[TMP143]], ptr [[TMP147]], align 4 4462 // CHECK3-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 3 4463 // CHECK3-NEXT: store ptr [[TMP144]], ptr [[TMP148]], align 4 4464 // CHECK3-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 4 4465 // CHECK3-NEXT: store ptr @.offload_sizes.13, ptr [[TMP149]], align 4 4466 // CHECK3-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 5 4467 // CHECK3-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP150]], align 4 4468 // CHECK3-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 6 4469 // CHECK3-NEXT: store ptr null, ptr [[TMP151]], align 4 4470 // CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 7 4471 // CHECK3-NEXT: store ptr null, ptr [[TMP152]], align 4 4472 // CHECK3-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 8 4473 // CHECK3-NEXT: store i64 2, ptr [[TMP153]], align 8 4474 // CHECK3-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 9 4475 // CHECK3-NEXT: store i64 0, ptr [[TMP154]], align 8 4476 // CHECK3-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 10 4477 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP155]], align 4 4478 // CHECK3-NEXT: [[TMP156:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 11 4479 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP156]], align 4 4480 // CHECK3-NEXT: [[TMP157:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 12 4481 // CHECK3-NEXT: store i32 0, ptr [[TMP157]], align 4 4482 // CHECK3-NEXT: [[TMP158:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.region_id, ptr [[KERNEL_ARGS47]]) 4483 // CHECK3-NEXT: [[TMP159:%.*]] = icmp ne i32 [[TMP158]], 0 4484 // CHECK3-NEXT: br i1 [[TMP159]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]] 4485 // CHECK3: omp_offload.failed48: 4486 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248(ptr [[BIT_VAR]]) #[[ATTR2]] 4487 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT49]] 4488 // CHECK3: omp_offload.cont49: 4489 // CHECK3-NEXT: store i32 0, ptr @_ZZ4mainE5sivar, align 4 4490 // CHECK3-NEXT: [[TMP160:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 4491 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP160]], align 4 4492 // CHECK3-NEXT: [[TMP161:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 4493 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP161]], align 4 4494 // CHECK3-NEXT: [[TMP162:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 0 4495 // CHECK3-NEXT: store ptr null, ptr [[TMP162]], align 4 4496 // CHECK3-NEXT: [[TMP163:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 4497 // CHECK3-NEXT: [[TMP164:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 4498 // CHECK3-NEXT: [[TMP165:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 0 4499 // CHECK3-NEXT: store i32 3, ptr [[TMP165]], align 4 4500 // CHECK3-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 1 4501 // CHECK3-NEXT: store i32 1, ptr [[TMP166]], align 4 4502 // CHECK3-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 2 4503 // CHECK3-NEXT: store ptr [[TMP163]], ptr [[TMP167]], align 4 4504 // CHECK3-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 3 4505 // CHECK3-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 4 4506 // CHECK3-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 4 4507 // CHECK3-NEXT: store ptr @.offload_sizes.15, ptr [[TMP169]], align 4 4508 // CHECK3-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 5 4509 // CHECK3-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP170]], align 4 4510 // CHECK3-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 6 4511 // CHECK3-NEXT: store ptr null, ptr [[TMP171]], align 4 4512 // CHECK3-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 7 4513 // CHECK3-NEXT: store ptr null, ptr [[TMP172]], align 4 4514 // CHECK3-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 8 4515 // CHECK3-NEXT: store i64 2, ptr [[TMP173]], align 8 4516 // CHECK3-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 9 4517 // CHECK3-NEXT: store i64 0, ptr [[TMP174]], align 8 4518 // CHECK3-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 10 4519 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP175]], align 4 4520 // CHECK3-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 11 4521 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 4 4522 // CHECK3-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 12 4523 // CHECK3-NEXT: store i32 0, ptr [[TMP177]], align 4 4524 // CHECK3-NEXT: [[TMP178:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.region_id, ptr [[KERNEL_ARGS54]]) 4525 // CHECK3-NEXT: [[TMP179:%.*]] = icmp ne i32 [[TMP178]], 0 4526 // CHECK3-NEXT: br i1 [[TMP179]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]] 4527 // CHECK3: omp_offload.failed55: 4528 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 4529 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT56]] 4530 // CHECK3: omp_offload.cont56: 4531 // CHECK3-NEXT: store i32 10, ptr @_ZZ4mainE5sivar, align 4 4532 // CHECK3-NEXT: [[TMP180:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 4533 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP180]], align 4 4534 // CHECK3-NEXT: [[TMP181:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 4535 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP181]], align 4 4536 // CHECK3-NEXT: [[TMP182:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 4537 // CHECK3-NEXT: store ptr null, ptr [[TMP182]], align 4 4538 // CHECK3-NEXT: [[TMP183:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 4539 // CHECK3-NEXT: [[TMP184:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 4540 // CHECK3-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0 4541 // CHECK3-NEXT: store i32 3, ptr [[TMP185]], align 4 4542 // CHECK3-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1 4543 // CHECK3-NEXT: store i32 1, ptr [[TMP186]], align 4 4544 // CHECK3-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2 4545 // CHECK3-NEXT: store ptr [[TMP183]], ptr [[TMP187]], align 4 4546 // CHECK3-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3 4547 // CHECK3-NEXT: store ptr [[TMP184]], ptr [[TMP188]], align 4 4548 // CHECK3-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4 4549 // CHECK3-NEXT: store ptr @.offload_sizes.17, ptr [[TMP189]], align 4 4550 // CHECK3-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5 4551 // CHECK3-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP190]], align 4 4552 // CHECK3-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6 4553 // CHECK3-NEXT: store ptr null, ptr [[TMP191]], align 4 4554 // CHECK3-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7 4555 // CHECK3-NEXT: store ptr null, ptr [[TMP192]], align 4 4556 // CHECK3-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8 4557 // CHECK3-NEXT: store i64 2, ptr [[TMP193]], align 8 4558 // CHECK3-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9 4559 // CHECK3-NEXT: store i64 0, ptr [[TMP194]], align 8 4560 // CHECK3-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10 4561 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4 4562 // CHECK3-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11 4563 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4 4564 // CHECK3-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12 4565 // CHECK3-NEXT: store i32 0, ptr [[TMP197]], align 4 4566 // CHECK3-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.region_id, ptr [[KERNEL_ARGS61]]) 4567 // CHECK3-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0 4568 // CHECK3-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]] 4569 // CHECK3: omp_offload.failed62: 4570 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260(ptr @_ZZ4mainE5sivar) #[[ATTR2]] 4571 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT63]] 4572 // CHECK3: omp_offload.cont63: 4573 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 4574 // CHECK3-NEXT: ret i32 [[CALL]] 4575 // 4576 // 4577 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209 4578 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 4579 // CHECK3-NEXT: entry: 4580 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 4581 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 4582 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 4583 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined, ptr [[TMP0]]) 4584 // CHECK3-NEXT: ret void 4585 // 4586 // 4587 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined 4588 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 4589 // CHECK3-NEXT: entry: 4590 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4591 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4592 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 4593 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 4594 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4595 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4596 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4597 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4598 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4599 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4600 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4601 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 4602 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4603 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4604 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 4605 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 4606 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 4607 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4608 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 4609 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4610 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4611 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4612 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4613 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4614 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4615 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 4616 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4617 // CHECK3: cond.true: 4618 // CHECK3-NEXT: br label [[COND_END:%.*]] 4619 // CHECK3: cond.false: 4620 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4621 // CHECK3-NEXT: br label [[COND_END]] 4622 // CHECK3: cond.end: 4623 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4624 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4625 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4626 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4627 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4628 // CHECK3: omp.inner.for.cond: 4629 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4630 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4631 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4632 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4633 // CHECK3: omp.inner.for.body: 4634 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4635 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4636 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4637 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 4638 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 4639 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 4640 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 4641 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 4642 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4643 // CHECK3: omp.body.continue: 4644 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4645 // CHECK3: omp.inner.for.inc: 4646 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4647 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 4648 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 4649 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4650 // CHECK3: omp.inner.for.end: 4651 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4652 // CHECK3: omp.loop.exit: 4653 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4654 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 4655 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 4 4656 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 4657 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4658 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4659 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4660 // CHECK3-NEXT: ] 4661 // CHECK3: .omp.reduction.case1: 4662 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 4663 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 4664 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 4665 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 4666 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 4667 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4668 // CHECK3: .omp.reduction.case2: 4669 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 4670 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 4671 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 4672 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4673 // CHECK3: .omp.reduction.default: 4674 // CHECK3-NEXT: ret void 4675 // 4676 // 4677 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func 4678 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 4679 // CHECK3-NEXT: entry: 4680 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 4681 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 4682 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 4683 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 4684 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 4685 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 4686 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 4687 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 4688 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 4689 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 4690 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 4691 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 4692 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 4693 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 4694 // CHECK3-NEXT: ret void 4695 // 4696 // 4697 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214 4698 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 4699 // CHECK3-NEXT: entry: 4700 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 4701 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 4702 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 4703 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined, ptr [[TMP0]]) 4704 // CHECK3-NEXT: ret void 4705 // 4706 // 4707 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined 4708 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 4709 // CHECK3-NEXT: entry: 4710 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4711 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4712 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 4713 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 4714 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4715 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4716 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4717 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4718 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4719 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4720 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4721 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 4722 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4723 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4724 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 4725 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 4726 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 4727 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4728 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 4729 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4730 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4731 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4732 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4733 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4734 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4735 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 4736 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4737 // CHECK3: cond.true: 4738 // CHECK3-NEXT: br label [[COND_END:%.*]] 4739 // CHECK3: cond.false: 4740 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4741 // CHECK3-NEXT: br label [[COND_END]] 4742 // CHECK3: cond.end: 4743 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4744 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4745 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4746 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4747 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4748 // CHECK3: omp.inner.for.cond: 4749 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4750 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4751 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4752 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4753 // CHECK3: omp.inner.for.body: 4754 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4755 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4756 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4757 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 4758 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 4759 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 4760 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], [[TMP9]] 4761 // CHECK3-NEXT: store i32 [[SUB]], ptr [[SIVAR1]], align 4 4762 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4763 // CHECK3: omp.body.continue: 4764 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4765 // CHECK3: omp.inner.for.inc: 4766 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4767 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 4768 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 4769 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4770 // CHECK3: omp.inner.for.end: 4771 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4772 // CHECK3: omp.loop.exit: 4773 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4774 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 4775 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 4 4776 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 4777 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4778 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4779 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4780 // CHECK3-NEXT: ] 4781 // CHECK3: .omp.reduction.case1: 4782 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 4783 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 4784 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 4785 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 4 4786 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 4787 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4788 // CHECK3: .omp.reduction.case2: 4789 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 4790 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 4791 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 4792 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4793 // CHECK3: .omp.reduction.default: 4794 // CHECK3-NEXT: ret void 4795 // 4796 // 4797 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func 4798 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 4799 // CHECK3-NEXT: entry: 4800 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 4801 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 4802 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 4803 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 4804 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 4805 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 4806 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 4807 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 4808 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 4809 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 4810 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 4811 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 4812 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 4813 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 4814 // CHECK3-NEXT: ret void 4815 // 4816 // 4817 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220 4818 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 4819 // CHECK3-NEXT: entry: 4820 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 4821 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 4822 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 4823 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined, ptr [[TMP0]]) 4824 // CHECK3-NEXT: ret void 4825 // 4826 // 4827 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined 4828 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 4829 // CHECK3-NEXT: entry: 4830 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4831 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4832 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 4833 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 4834 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4835 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4836 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4837 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4838 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4839 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4840 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4841 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 4842 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 4843 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 4844 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4845 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4846 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 4847 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 4848 // CHECK3-NEXT: store i32 1, ptr [[SIVAR1]], align 4 4849 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4850 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 4851 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4852 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4853 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4854 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4855 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4856 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4857 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 4858 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4859 // CHECK3: cond.true: 4860 // CHECK3-NEXT: br label [[COND_END:%.*]] 4861 // CHECK3: cond.false: 4862 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4863 // CHECK3-NEXT: br label [[COND_END]] 4864 // CHECK3: cond.end: 4865 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4866 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4867 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4868 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4869 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4870 // CHECK3: omp.inner.for.cond: 4871 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4872 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4873 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4874 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4875 // CHECK3: omp.inner.for.body: 4876 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4877 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4878 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4879 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 4880 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 4 4881 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 4882 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP9]], [[TMP10]] 4883 // CHECK3-NEXT: store i32 [[MUL3]], ptr [[SIVAR1]], align 4 4884 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4885 // CHECK3: omp.body.continue: 4886 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4887 // CHECK3: omp.inner.for.inc: 4888 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4889 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 4890 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 4891 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 4892 // CHECK3: omp.inner.for.end: 4893 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4894 // CHECK3: omp.loop.exit: 4895 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4896 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 4897 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 4 4898 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 4899 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4900 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4901 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4902 // CHECK3-NEXT: ] 4903 // CHECK3: .omp.reduction.case1: 4904 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 4905 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 4906 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP14]], [[TMP15]] 4907 // CHECK3-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 4 4908 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 4909 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4910 // CHECK3: .omp.reduction.case2: 4911 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 4912 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 4 4913 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 4914 // CHECK3: atomic_cont: 4915 // CHECK3-NEXT: [[TMP17:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP22:%.*]], [[ATOMIC_CONT]] ] 4916 // CHECK3-NEXT: store i32 [[TMP17]], ptr [[_TMP6]], align 4 4917 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[_TMP6]], align 4 4918 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 4 4919 // CHECK3-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP18]], [[TMP19]] 4920 // CHECK3-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 4 4921 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4 4922 // CHECK3-NEXT: [[TMP21:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP17]], i32 [[TMP20]] monotonic monotonic, align 4 4923 // CHECK3-NEXT: [[TMP22]] = extractvalue { i32, i1 } [[TMP21]], 0 4924 // CHECK3-NEXT: [[TMP23:%.*]] = extractvalue { i32, i1 } [[TMP21]], 1 4925 // CHECK3-NEXT: br i1 [[TMP23]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 4926 // CHECK3: atomic_exit: 4927 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 4928 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4929 // CHECK3: .omp.reduction.default: 4930 // CHECK3-NEXT: ret void 4931 // 4932 // 4933 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func 4934 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 4935 // CHECK3-NEXT: entry: 4936 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 4937 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 4938 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 4939 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 4940 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 4941 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 4942 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 4943 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 4944 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 4945 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 4946 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 4947 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 4948 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]] 4949 // CHECK3-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 4 4950 // CHECK3-NEXT: ret void 4951 // 4952 // 4953 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226 4954 // CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] { 4955 // CHECK3-NEXT: entry: 4956 // CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 4 4957 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 4 4958 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 4 4959 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined, ptr [[TMP0]]) 4960 // CHECK3-NEXT: ret void 4961 // 4962 // 4963 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined 4964 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] { 4965 // CHECK3-NEXT: entry: 4966 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4967 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4968 // CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 4 4969 // CHECK3-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 1 4970 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4971 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4972 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4973 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4974 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4975 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4976 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4977 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 4978 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 4979 // CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 4980 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4981 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4982 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 4 4983 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 4 4984 // CHECK3-NEXT: store i8 1, ptr [[AND_VAR1]], align 1 4985 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4986 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 4987 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4988 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4989 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4990 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4991 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4992 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4993 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 4994 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4995 // CHECK3: cond.true: 4996 // CHECK3-NEXT: br label [[COND_END:%.*]] 4997 // CHECK3: cond.false: 4998 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4999 // CHECK3-NEXT: br label [[COND_END]] 5000 // CHECK3: cond.end: 5001 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5002 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5003 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5004 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5005 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5006 // CHECK3: omp.inner.for.cond: 5007 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5008 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5009 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5010 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5011 // CHECK3: omp.inner.for.body: 5012 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5013 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5014 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5015 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5016 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 1 5017 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1 5018 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 5019 // CHECK3: land.rhs: 5020 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5021 // CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 0 5022 // CHECK3-NEXT: br label [[LAND_END]] 5023 // CHECK3: land.end: 5024 // CHECK3-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ] 5025 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i8 5026 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 1 5027 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5028 // CHECK3: omp.body.continue: 5029 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5030 // CHECK3: omp.inner.for.inc: 5031 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5032 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 5033 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 5034 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5035 // CHECK3: omp.inner.for.end: 5036 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5037 // CHECK3: omp.loop.exit: 5038 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5039 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5040 // CHECK3-NEXT: store ptr [[AND_VAR1]], ptr [[TMP13]], align 4 5041 // CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5042 // CHECK3-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5043 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5044 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5045 // CHECK3-NEXT: ] 5046 // CHECK3: .omp.reduction.case1: 5047 // CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1 5048 // CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1 5049 // CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]] 5050 // CHECK3: land.rhs6: 5051 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[AND_VAR1]], align 1 5052 // CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1 5053 // CHECK3-NEXT: br label [[LAND_END8]] 5054 // CHECK3: land.end8: 5055 // CHECK3-NEXT: [[TMP17:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ] 5056 // CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i8 5057 // CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 5058 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5059 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5060 // CHECK3: .omp.reduction.case2: 5061 // CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1 5062 // CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1 5063 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 5064 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 5065 // CHECK3: atomic_cont: 5066 // CHECK3-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LAND_END17:%.*]] ] 5067 // CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1 5068 // CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 5069 // CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 5070 // CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1 5071 // CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1 5072 // CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]] 5073 // CHECK3: land.rhs15: 5074 // CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[AND_VAR1]], align 1 5075 // CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1 5076 // CHECK3-NEXT: br label [[LAND_END17]] 5077 // CHECK3: land.end17: 5078 // CHECK3-NEXT: [[TMP22:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ] 5079 // CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i8 5080 // CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 5081 // CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 5082 // CHECK3-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 1 5083 // CHECK3-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 0 5084 // CHECK3-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 1 5085 // CHECK3-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 5086 // CHECK3: atomic_exit: 5087 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5088 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5089 // CHECK3: .omp.reduction.default: 5090 // CHECK3-NEXT: ret void 5091 // 5092 // 5093 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func 5094 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5095 // CHECK3-NEXT: entry: 5096 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5097 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5098 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5099 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5100 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5101 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5102 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5103 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5104 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5105 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5106 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 5107 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 5108 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 5109 // CHECK3: land.rhs: 5110 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 5111 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 5112 // CHECK3-NEXT: br label [[LAND_END]] 5113 // CHECK3: land.end: 5114 // CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ] 5115 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 5116 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 5117 // CHECK3-NEXT: ret void 5118 // 5119 // 5120 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232 5121 // CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] { 5122 // CHECK3-NEXT: entry: 5123 // CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 4 5124 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 4 5125 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 4 5126 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined, ptr [[TMP0]]) 5127 // CHECK3-NEXT: ret void 5128 // 5129 // 5130 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined 5131 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] { 5132 // CHECK3-NEXT: entry: 5133 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5134 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5135 // CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 4 5136 // CHECK3-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 1 5137 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5138 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5139 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5140 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5141 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5142 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5143 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5144 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 5145 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 5146 // CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 5147 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5148 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5149 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 4 5150 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 4 5151 // CHECK3-NEXT: store i8 0, ptr [[OR_VAR1]], align 1 5152 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5153 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 5154 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5155 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5156 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5157 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 5158 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5159 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5160 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 5161 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5162 // CHECK3: cond.true: 5163 // CHECK3-NEXT: br label [[COND_END:%.*]] 5164 // CHECK3: cond.false: 5165 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5166 // CHECK3-NEXT: br label [[COND_END]] 5167 // CHECK3: cond.end: 5168 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5169 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5170 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5171 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5172 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5173 // CHECK3: omp.inner.for.cond: 5174 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5175 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5176 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5177 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5178 // CHECK3: omp.inner.for.body: 5179 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5180 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5181 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5182 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5183 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 1 5184 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1 5185 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 5186 // CHECK3: lor.rhs: 5187 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5188 // CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 0 5189 // CHECK3-NEXT: br label [[LOR_END]] 5190 // CHECK3: lor.end: 5191 // CHECK3-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ] 5192 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i8 5193 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 1 5194 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5195 // CHECK3: omp.body.continue: 5196 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5197 // CHECK3: omp.inner.for.inc: 5198 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5199 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 5200 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 5201 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5202 // CHECK3: omp.inner.for.end: 5203 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5204 // CHECK3: omp.loop.exit: 5205 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5206 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5207 // CHECK3-NEXT: store ptr [[OR_VAR1]], ptr [[TMP13]], align 4 5208 // CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5209 // CHECK3-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5210 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5211 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5212 // CHECK3-NEXT: ] 5213 // CHECK3: .omp.reduction.case1: 5214 // CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 1 5215 // CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i1 5216 // CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]] 5217 // CHECK3: lor.rhs6: 5218 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[OR_VAR1]], align 1 5219 // CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i1 5220 // CHECK3-NEXT: br label [[LOR_END8]] 5221 // CHECK3: lor.end8: 5222 // CHECK3-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ] 5223 // CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i8 5224 // CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 5225 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5226 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5227 // CHECK3: .omp.reduction.case2: 5228 // CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1 5229 // CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i1 5230 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 5231 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 5232 // CHECK3: atomic_cont: 5233 // CHECK3-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LOR_END17:%.*]] ] 5234 // CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i1 5235 // CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 5236 // CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 5237 // CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 1 5238 // CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i1 5239 // CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]] 5240 // CHECK3: lor.rhs15: 5241 // CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[OR_VAR1]], align 1 5242 // CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i1 5243 // CHECK3-NEXT: br label [[LOR_END17]] 5244 // CHECK3: lor.end17: 5245 // CHECK3-NEXT: [[TMP22:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ] 5246 // CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i8 5247 // CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 5248 // CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 5249 // CHECK3-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 1 5250 // CHECK3-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 0 5251 // CHECK3-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 1 5252 // CHECK3-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 5253 // CHECK3: atomic_exit: 5254 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5255 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5256 // CHECK3: .omp.reduction.default: 5257 // CHECK3-NEXT: ret void 5258 // 5259 // 5260 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func 5261 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5262 // CHECK3-NEXT: entry: 5263 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5264 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5265 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5266 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5267 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5268 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5269 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5270 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5271 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5272 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5273 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 5274 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 5275 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 5276 // CHECK3: lor.rhs: 5277 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 5278 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 5279 // CHECK3-NEXT: br label [[LOR_END]] 5280 // CHECK3: lor.end: 5281 // CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ] 5282 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 5283 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 5284 // CHECK3-NEXT: ret void 5285 // 5286 // 5287 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238 5288 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 5289 // CHECK3-NEXT: entry: 5290 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 5291 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 5292 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 5293 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined, ptr [[TMP0]]) 5294 // CHECK3-NEXT: ret void 5295 // 5296 // 5297 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined 5298 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 5299 // CHECK3-NEXT: entry: 5300 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5301 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5302 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 5303 // CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 5304 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5305 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5306 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5307 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5308 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5309 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5310 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5311 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 5312 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5313 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5314 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 5315 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 5316 // CHECK3-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 4 5317 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5318 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 5319 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5320 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5321 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5322 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 5323 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5324 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5325 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 5326 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5327 // CHECK3: cond.true: 5328 // CHECK3-NEXT: br label [[COND_END:%.*]] 5329 // CHECK3: cond.false: 5330 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5331 // CHECK3-NEXT: br label [[COND_END]] 5332 // CHECK3: cond.end: 5333 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5334 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5335 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5336 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5337 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5338 // CHECK3: omp.inner.for.cond: 5339 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5340 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5341 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5342 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5343 // CHECK3: omp.inner.for.body: 5344 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5345 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5346 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5347 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5348 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5349 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5350 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP9]], [[TMP10]] 5351 // CHECK3-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 4 5352 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5353 // CHECK3: omp.body.continue: 5354 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5355 // CHECK3: omp.inner.for.inc: 5356 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5357 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 5358 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 5359 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5360 // CHECK3: omp.inner.for.end: 5361 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5362 // CHECK3: omp.loop.exit: 5363 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5364 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5365 // CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 4 5366 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5367 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5368 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5369 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5370 // CHECK3-NEXT: ] 5371 // CHECK3: .omp.reduction.case1: 5372 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 5373 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5374 // CHECK3-NEXT: [[AND4:%.*]] = and i32 [[TMP14]], [[TMP15]] 5375 // CHECK3-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 4 5376 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5377 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5378 // CHECK3: .omp.reduction.case2: 5379 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5380 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 5381 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5382 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5383 // CHECK3: .omp.reduction.default: 5384 // CHECK3-NEXT: ret void 5385 // 5386 // 5387 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func 5388 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5389 // CHECK3-NEXT: entry: 5390 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5391 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5392 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5393 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5394 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5395 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5396 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5397 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5398 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5399 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5400 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5401 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 5402 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]] 5403 // CHECK3-NEXT: store i32 [[AND]], ptr [[TMP7]], align 4 5404 // CHECK3-NEXT: ret void 5405 // 5406 // 5407 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243 5408 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 5409 // CHECK3-NEXT: entry: 5410 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 5411 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 5412 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 5413 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined, ptr [[TMP0]]) 5414 // CHECK3-NEXT: ret void 5415 // 5416 // 5417 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined 5418 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 5419 // CHECK3-NEXT: entry: 5420 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5421 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5422 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 5423 // CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 5424 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5425 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5426 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5427 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5428 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5429 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5430 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5431 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 5432 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5433 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5434 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 5435 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 5436 // CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 5437 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5438 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 5439 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5440 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5441 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5442 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 5443 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5444 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5445 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 5446 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5447 // CHECK3: cond.true: 5448 // CHECK3-NEXT: br label [[COND_END:%.*]] 5449 // CHECK3: cond.false: 5450 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5451 // CHECK3-NEXT: br label [[COND_END]] 5452 // CHECK3: cond.end: 5453 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5454 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5455 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5456 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5457 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5458 // CHECK3: omp.inner.for.cond: 5459 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5460 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5461 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5462 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5463 // CHECK3: omp.inner.for.body: 5464 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5465 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5466 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5467 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5468 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5469 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5470 // CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP9]], [[TMP10]] 5471 // CHECK3-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 4 5472 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5473 // CHECK3: omp.body.continue: 5474 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5475 // CHECK3: omp.inner.for.inc: 5476 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5477 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 5478 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 5479 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5480 // CHECK3: omp.inner.for.end: 5481 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5482 // CHECK3: omp.loop.exit: 5483 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5484 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5485 // CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 4 5486 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5487 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5488 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5489 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5490 // CHECK3-NEXT: ] 5491 // CHECK3: .omp.reduction.case1: 5492 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 5493 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5494 // CHECK3-NEXT: [[OR4:%.*]] = or i32 [[TMP14]], [[TMP15]] 5495 // CHECK3-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 4 5496 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5497 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5498 // CHECK3: .omp.reduction.case2: 5499 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5500 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 5501 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5502 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5503 // CHECK3: .omp.reduction.default: 5504 // CHECK3-NEXT: ret void 5505 // 5506 // 5507 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func 5508 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5509 // CHECK3-NEXT: entry: 5510 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5511 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5512 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5513 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5514 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5515 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5516 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5517 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5518 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5519 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5520 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5521 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 5522 // CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]] 5523 // CHECK3-NEXT: store i32 [[OR]], ptr [[TMP7]], align 4 5524 // CHECK3-NEXT: ret void 5525 // 5526 // 5527 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248 5528 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 5529 // CHECK3-NEXT: entry: 5530 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 5531 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 5532 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 5533 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined, ptr [[TMP0]]) 5534 // CHECK3-NEXT: ret void 5535 // 5536 // 5537 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined 5538 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] { 5539 // CHECK3-NEXT: entry: 5540 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5541 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5542 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 5543 // CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 5544 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5545 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5546 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5547 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5548 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5549 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5550 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5551 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 5552 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5553 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5554 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 5555 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 5556 // CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 5557 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5558 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 5559 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5560 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5561 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5562 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 5563 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5564 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5565 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 5566 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5567 // CHECK3: cond.true: 5568 // CHECK3-NEXT: br label [[COND_END:%.*]] 5569 // CHECK3: cond.false: 5570 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5571 // CHECK3-NEXT: br label [[COND_END]] 5572 // CHECK3: cond.end: 5573 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5574 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5575 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5576 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5577 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5578 // CHECK3: omp.inner.for.cond: 5579 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5580 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5581 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5582 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5583 // CHECK3: omp.inner.for.body: 5584 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5585 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5586 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5587 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5588 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5589 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5590 // CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP9]], [[TMP10]] 5591 // CHECK3-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 4 5592 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5593 // CHECK3: omp.body.continue: 5594 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5595 // CHECK3: omp.inner.for.inc: 5596 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5597 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 5598 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 5599 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5600 // CHECK3: omp.inner.for.end: 5601 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5602 // CHECK3: omp.loop.exit: 5603 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5604 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5605 // CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 4 5606 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5607 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5608 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5609 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5610 // CHECK3-NEXT: ] 5611 // CHECK3: .omp.reduction.case1: 5612 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 5613 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5614 // CHECK3-NEXT: [[XOR4:%.*]] = xor i32 [[TMP14]], [[TMP15]] 5615 // CHECK3-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 4 5616 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5617 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5618 // CHECK3: .omp.reduction.case2: 5619 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 5620 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 5621 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5622 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5623 // CHECK3: .omp.reduction.default: 5624 // CHECK3-NEXT: ret void 5625 // 5626 // 5627 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func 5628 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5629 // CHECK3-NEXT: entry: 5630 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5631 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5632 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5633 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5634 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5635 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5636 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5637 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5638 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5639 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5640 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5641 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 5642 // CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]] 5643 // CHECK3-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 4 5644 // CHECK3-NEXT: ret void 5645 // 5646 // 5647 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254 5648 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 5649 // CHECK3-NEXT: entry: 5650 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 5651 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 5652 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 5653 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined, ptr [[TMP0]]) 5654 // CHECK3-NEXT: ret void 5655 // 5656 // 5657 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined 5658 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 5659 // CHECK3-NEXT: entry: 5660 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5661 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5662 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 5663 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 5664 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5665 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5666 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5667 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5668 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5669 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5670 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5671 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 5672 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5673 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5674 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 5675 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 5676 // CHECK3-NEXT: store i32 -2147483648, ptr [[SIVAR1]], align 4 5677 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5678 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 5679 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5680 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5681 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5682 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 5683 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5684 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5685 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 5686 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5687 // CHECK3: cond.true: 5688 // CHECK3-NEXT: br label [[COND_END:%.*]] 5689 // CHECK3: cond.false: 5690 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5691 // CHECK3-NEXT: br label [[COND_END]] 5692 // CHECK3: cond.end: 5693 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5694 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5695 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5696 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5697 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5698 // CHECK3: omp.inner.for.cond: 5699 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5700 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5701 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5702 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5703 // CHECK3: omp.inner.for.body: 5704 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5705 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5706 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5707 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5708 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 4 5709 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5710 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP9]], [[TMP10]] 5711 // CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 5712 // CHECK3: cond.true4: 5713 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 4 5714 // CHECK3-NEXT: br label [[COND_END6:%.*]] 5715 // CHECK3: cond.false5: 5716 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 5717 // CHECK3-NEXT: br label [[COND_END6]] 5718 // CHECK3: cond.end6: 5719 // CHECK3-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ] 5720 // CHECK3-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 4 5721 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5722 // CHECK3: omp.body.continue: 5723 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5724 // CHECK3: omp.inner.for.inc: 5725 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5726 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 5727 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 5728 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5729 // CHECK3: omp.inner.for.end: 5730 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5731 // CHECK3: omp.loop.exit: 5732 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5733 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5734 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 4 5735 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5736 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5737 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5738 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5739 // CHECK3-NEXT: ] 5740 // CHECK3: .omp.reduction.case1: 5741 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 5742 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 5743 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP16]], [[TMP17]] 5744 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 5745 // CHECK3: cond.true10: 5746 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 4 5747 // CHECK3-NEXT: br label [[COND_END12:%.*]] 5748 // CHECK3: cond.false11: 5749 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 4 5750 // CHECK3-NEXT: br label [[COND_END12]] 5751 // CHECK3: cond.end12: 5752 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ] 5753 // CHECK3-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 4 5754 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5755 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5756 // CHECK3: .omp.reduction.case2: 5757 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 4 5758 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP20]] monotonic, align 4 5759 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5760 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5761 // CHECK3: .omp.reduction.default: 5762 // CHECK3-NEXT: ret void 5763 // 5764 // 5765 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func 5766 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5767 // CHECK3-NEXT: entry: 5768 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5769 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5770 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5771 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5772 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5773 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5774 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5775 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5776 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5777 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5778 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5779 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 5780 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5781 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5782 // CHECK3: cond.true: 5783 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 5784 // CHECK3-NEXT: br label [[COND_END:%.*]] 5785 // CHECK3: cond.false: 5786 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 5787 // CHECK3-NEXT: br label [[COND_END]] 5788 // CHECK3: cond.end: 5789 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5790 // CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 5791 // CHECK3-NEXT: ret void 5792 // 5793 // 5794 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260 5795 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 5796 // CHECK3-NEXT: entry: 5797 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 5798 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 5799 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 5800 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined, ptr [[TMP0]]) 5801 // CHECK3-NEXT: ret void 5802 // 5803 // 5804 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined 5805 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 5806 // CHECK3-NEXT: entry: 5807 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 5808 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 5809 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 5810 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 5811 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5812 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5813 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5814 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5815 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5816 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5817 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 5818 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 5819 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 5820 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 5821 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 5822 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 5823 // CHECK3-NEXT: store i32 2147483647, ptr [[SIVAR1]], align 4 5824 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5825 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 5826 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5827 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5828 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 5829 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 5830 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5831 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5832 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 5833 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5834 // CHECK3: cond.true: 5835 // CHECK3-NEXT: br label [[COND_END:%.*]] 5836 // CHECK3: cond.false: 5837 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5838 // CHECK3-NEXT: br label [[COND_END]] 5839 // CHECK3: cond.end: 5840 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5841 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5842 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5843 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 5844 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5845 // CHECK3: omp.inner.for.cond: 5846 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5847 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5848 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5849 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5850 // CHECK3: omp.inner.for.body: 5851 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5852 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5853 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5854 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 5855 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 4 5856 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 5857 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 5858 // CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 5859 // CHECK3: cond.true4: 5860 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 4 5861 // CHECK3-NEXT: br label [[COND_END6:%.*]] 5862 // CHECK3: cond.false5: 5863 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 5864 // CHECK3-NEXT: br label [[COND_END6]] 5865 // CHECK3: cond.end6: 5866 // CHECK3-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ] 5867 // CHECK3-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 4 5868 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5869 // CHECK3: omp.body.continue: 5870 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5871 // CHECK3: omp.inner.for.inc: 5872 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5873 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 5874 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 5875 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 5876 // CHECK3: omp.inner.for.end: 5877 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5878 // CHECK3: omp.loop.exit: 5879 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 5880 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 5881 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 4 5882 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 5883 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 5884 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 5885 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 5886 // CHECK3-NEXT: ] 5887 // CHECK3: .omp.reduction.case1: 5888 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 5889 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 5890 // CHECK3-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP16]], [[TMP17]] 5891 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 5892 // CHECK3: cond.true10: 5893 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 4 5894 // CHECK3-NEXT: br label [[COND_END12:%.*]] 5895 // CHECK3: cond.false11: 5896 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 4 5897 // CHECK3-NEXT: br label [[COND_END12]] 5898 // CHECK3: cond.end12: 5899 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ] 5900 // CHECK3-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 4 5901 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5902 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5903 // CHECK3: .omp.reduction.case2: 5904 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 4 5905 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP20]] monotonic, align 4 5906 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 5907 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 5908 // CHECK3: .omp.reduction.default: 5909 // CHECK3-NEXT: ret void 5910 // 5911 // 5912 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func 5913 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 5914 // CHECK3-NEXT: entry: 5915 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 5916 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 5917 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 5918 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 5919 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 5920 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 5921 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 5922 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 5923 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 5924 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 5925 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5926 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 5927 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 5928 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5929 // CHECK3: cond.true: 5930 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 5931 // CHECK3-NEXT: br label [[COND_END:%.*]] 5932 // CHECK3: cond.false: 5933 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 5934 // CHECK3-NEXT: br label [[COND_END]] 5935 // CHECK3: cond.end: 5936 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5937 // CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 5938 // CHECK3-NEXT: ret void 5939 // 5940 // 5941 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 5942 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 5943 // CHECK3-NEXT: entry: 5944 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 5945 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 5946 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 5947 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 5948 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 5949 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 5950 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 5951 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [2 x ptr], align 4 5952 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [2 x ptr], align 4 5953 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [2 x ptr], align 4 5954 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 5955 // CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5956 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4 5957 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4 5958 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4 5959 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 5960 // CHECK3-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5961 // CHECK3-NEXT: [[AND_VAR:%.*]] = alloca i8, align 1 5962 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [2 x ptr], align 4 5963 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [2 x ptr], align 4 5964 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [2 x ptr], align 4 5965 // CHECK3-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 5966 // CHECK3-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5967 // CHECK3-NEXT: [[OR_VAR:%.*]] = alloca i8, align 1 5968 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x ptr], align 4 5969 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x ptr], align 4 5970 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x ptr], align 4 5971 // CHECK3-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 5972 // CHECK3-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5973 // CHECK3-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 4 5974 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [2 x ptr], align 4 5975 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [2 x ptr], align 4 5976 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [2 x ptr], align 4 5977 // CHECK3-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 5978 // CHECK3-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5979 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [2 x ptr], align 4 5980 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [2 x ptr], align 4 5981 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [2 x ptr], align 4 5982 // CHECK3-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 5983 // CHECK3-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5984 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [2 x ptr], align 4 5985 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [2 x ptr], align 4 5986 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [2 x ptr], align 4 5987 // CHECK3-NEXT: [[_TMP46:%.*]] = alloca i32, align 4 5988 // CHECK3-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5989 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [2 x ptr], align 4 5990 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [2 x ptr], align 4 5991 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [2 x ptr], align 4 5992 // CHECK3-NEXT: [[_TMP53:%.*]] = alloca i32, align 4 5993 // CHECK3-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5994 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [2 x ptr], align 4 5995 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [2 x ptr], align 4 5996 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [2 x ptr], align 4 5997 // CHECK3-NEXT: [[_TMP60:%.*]] = alloca i32, align 4 5998 // CHECK3-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5999 // CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4 6000 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 6001 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6002 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP0]], align 4 6003 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6004 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP1]], align 4 6005 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6006 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 6007 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6008 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6009 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 6010 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 6011 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 6012 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 6013 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 6014 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 6015 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 6016 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 6017 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 6018 // CHECK3-NEXT: store ptr @.offload_sizes.19, ptr [[TMP9]], align 4 6019 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 6020 // CHECK3-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP10]], align 4 6021 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 6022 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 6023 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 6024 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 6025 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 6026 // CHECK3-NEXT: store i64 2, ptr [[TMP13]], align 8 6027 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 6028 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 6029 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 6030 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 6031 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 6032 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 6033 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 6034 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 6035 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 6036 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 6037 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6038 // CHECK3: omp_offload.failed: 6039 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]]) #[[ATTR2]] 6040 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 6041 // CHECK3: omp_offload.cont: 6042 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 6043 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP20]], align 4 6044 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 6045 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP21]], align 4 6046 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 6047 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4 6048 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 1 6049 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP23]], align 4 6050 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 1 6051 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP24]], align 4 6052 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 1 6053 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4 6054 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 6055 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 6056 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 6057 // CHECK3-NEXT: store i32 3, ptr [[TMP28]], align 4 6058 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 6059 // CHECK3-NEXT: store i32 2, ptr [[TMP29]], align 4 6060 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 6061 // CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP30]], align 4 6062 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 6063 // CHECK3-NEXT: store ptr [[TMP27]], ptr [[TMP31]], align 4 6064 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 6065 // CHECK3-NEXT: store ptr @.offload_sizes.21, ptr [[TMP32]], align 4 6066 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 6067 // CHECK3-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP33]], align 4 6068 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 6069 // CHECK3-NEXT: store ptr null, ptr [[TMP34]], align 4 6070 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 6071 // CHECK3-NEXT: store ptr null, ptr [[TMP35]], align 4 6072 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 6073 // CHECK3-NEXT: store i64 2, ptr [[TMP36]], align 8 6074 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 6075 // CHECK3-NEXT: store i64 0, ptr [[TMP37]], align 8 6076 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 6077 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 4 6078 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 6079 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 6080 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 6081 // CHECK3-NEXT: store i32 0, ptr [[TMP40]], align 4 6082 // CHECK3-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.region_id, ptr [[KERNEL_ARGS5]]) 6083 // CHECK3-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 6084 // CHECK3-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 6085 // CHECK3: omp_offload.failed6: 6086 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 6087 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]] 6088 // CHECK3: omp_offload.cont7: 6089 // CHECK3-NEXT: store i32 1, ptr [[T_VAR]], align 4 6090 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 6091 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP43]], align 4 6092 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 6093 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP44]], align 4 6094 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 6095 // CHECK3-NEXT: store ptr null, ptr [[TMP45]], align 4 6096 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 6097 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP46]], align 4 6098 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 6099 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP47]], align 4 6100 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 6101 // CHECK3-NEXT: store ptr null, ptr [[TMP48]], align 4 6102 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 6103 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 6104 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 6105 // CHECK3-NEXT: store i32 3, ptr [[TMP51]], align 4 6106 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 6107 // CHECK3-NEXT: store i32 2, ptr [[TMP52]], align 4 6108 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 6109 // CHECK3-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 4 6110 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 6111 // CHECK3-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 4 6112 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 6113 // CHECK3-NEXT: store ptr @.offload_sizes.23, ptr [[TMP55]], align 4 6114 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 6115 // CHECK3-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP56]], align 4 6116 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 6117 // CHECK3-NEXT: store ptr null, ptr [[TMP57]], align 4 6118 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 6119 // CHECK3-NEXT: store ptr null, ptr [[TMP58]], align 4 6120 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 6121 // CHECK3-NEXT: store i64 2, ptr [[TMP59]], align 8 6122 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 6123 // CHECK3-NEXT: store i64 0, ptr [[TMP60]], align 8 6124 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 6125 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 6126 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 6127 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 6128 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 6129 // CHECK3-NEXT: store i32 0, ptr [[TMP63]], align 4 6130 // CHECK3-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.region_id, ptr [[KERNEL_ARGS12]]) 6131 // CHECK3-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 6132 // CHECK3-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 6133 // CHECK3: omp_offload.failed13: 6134 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 6135 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT14]] 6136 // CHECK3: omp_offload.cont14: 6137 // CHECK3-NEXT: store i8 1, ptr [[AND_VAR]], align 1 6138 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 6139 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP66]], align 4 6140 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 6141 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP67]], align 4 6142 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0 6143 // CHECK3-NEXT: store ptr null, ptr [[TMP68]], align 4 6144 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 1 6145 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP69]], align 4 6146 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 1 6147 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP70]], align 4 6148 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 1 6149 // CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 4 6150 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 6151 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 6152 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 6153 // CHECK3-NEXT: store i32 3, ptr [[TMP74]], align 4 6154 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 6155 // CHECK3-NEXT: store i32 2, ptr [[TMP75]], align 4 6156 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 6157 // CHECK3-NEXT: store ptr [[TMP72]], ptr [[TMP76]], align 4 6158 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 6159 // CHECK3-NEXT: store ptr [[TMP73]], ptr [[TMP77]], align 4 6160 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 6161 // CHECK3-NEXT: store ptr @.offload_sizes.25, ptr [[TMP78]], align 4 6162 // CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 6163 // CHECK3-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP79]], align 4 6164 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 6165 // CHECK3-NEXT: store ptr null, ptr [[TMP80]], align 4 6166 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 6167 // CHECK3-NEXT: store ptr null, ptr [[TMP81]], align 4 6168 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 6169 // CHECK3-NEXT: store i64 2, ptr [[TMP82]], align 8 6170 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 6171 // CHECK3-NEXT: store i64 0, ptr [[TMP83]], align 8 6172 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 6173 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP84]], align 4 6174 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 6175 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP85]], align 4 6176 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 6177 // CHECK3-NEXT: store i32 0, ptr [[TMP86]], align 4 6178 // CHECK3-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS19]]) 6179 // CHECK3-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 6180 // CHECK3-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 6181 // CHECK3: omp_offload.failed20: 6182 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[AND_VAR]], ptr [[VEC]]) #[[ATTR2]] 6183 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT21]] 6184 // CHECK3: omp_offload.cont21: 6185 // CHECK3-NEXT: store i8 0, ptr [[OR_VAR]], align 1 6186 // CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 6187 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP89]], align 4 6188 // CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 6189 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP90]], align 4 6190 // CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i32 0, i32 0 6191 // CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 4 6192 // CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 6193 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP92]], align 4 6194 // CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 6195 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP93]], align 4 6196 // CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i32 0, i32 1 6197 // CHECK3-NEXT: store ptr null, ptr [[TMP94]], align 4 6198 // CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 6199 // CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 6200 // CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 0 6201 // CHECK3-NEXT: store i32 3, ptr [[TMP97]], align 4 6202 // CHECK3-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 1 6203 // CHECK3-NEXT: store i32 2, ptr [[TMP98]], align 4 6204 // CHECK3-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 2 6205 // CHECK3-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 4 6206 // CHECK3-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 3 6207 // CHECK3-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 4 6208 // CHECK3-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 4 6209 // CHECK3-NEXT: store ptr @.offload_sizes.27, ptr [[TMP101]], align 4 6210 // CHECK3-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 5 6211 // CHECK3-NEXT: store ptr @.offload_maptypes.28, ptr [[TMP102]], align 4 6212 // CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 6 6213 // CHECK3-NEXT: store ptr null, ptr [[TMP103]], align 4 6214 // CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 7 6215 // CHECK3-NEXT: store ptr null, ptr [[TMP104]], align 4 6216 // CHECK3-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 8 6217 // CHECK3-NEXT: store i64 2, ptr [[TMP105]], align 8 6218 // CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 9 6219 // CHECK3-NEXT: store i64 0, ptr [[TMP106]], align 8 6220 // CHECK3-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 10 6221 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 6222 // CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 11 6223 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 6224 // CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 12 6225 // CHECK3-NEXT: store i32 0, ptr [[TMP109]], align 4 6226 // CHECK3-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.region_id, ptr [[KERNEL_ARGS26]]) 6227 // CHECK3-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 6228 // CHECK3-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]] 6229 // CHECK3: omp_offload.failed27: 6230 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55(ptr [[OR_VAR]], ptr [[VEC]]) #[[ATTR2]] 6231 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT28]] 6232 // CHECK3: omp_offload.cont28: 6233 // CHECK3-NEXT: store i32 1, ptr [[BIT_VAR]], align 4 6234 // CHECK3-NEXT: [[TMP112:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 6235 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP112]], align 4 6236 // CHECK3-NEXT: [[TMP113:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 6237 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP113]], align 4 6238 // CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i32 0, i32 0 6239 // CHECK3-NEXT: store ptr null, ptr [[TMP114]], align 4 6240 // CHECK3-NEXT: [[TMP115:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 1 6241 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP115]], align 4 6242 // CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 1 6243 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP116]], align 4 6244 // CHECK3-NEXT: [[TMP117:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i32 0, i32 1 6245 // CHECK3-NEXT: store ptr null, ptr [[TMP117]], align 4 6246 // CHECK3-NEXT: [[TMP118:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0 6247 // CHECK3-NEXT: [[TMP119:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0 6248 // CHECK3-NEXT: [[TMP120:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 0 6249 // CHECK3-NEXT: store i32 3, ptr [[TMP120]], align 4 6250 // CHECK3-NEXT: [[TMP121:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 1 6251 // CHECK3-NEXT: store i32 2, ptr [[TMP121]], align 4 6252 // CHECK3-NEXT: [[TMP122:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 2 6253 // CHECK3-NEXT: store ptr [[TMP118]], ptr [[TMP122]], align 4 6254 // CHECK3-NEXT: [[TMP123:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 3 6255 // CHECK3-NEXT: store ptr [[TMP119]], ptr [[TMP123]], align 4 6256 // CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 4 6257 // CHECK3-NEXT: store ptr @.offload_sizes.29, ptr [[TMP124]], align 4 6258 // CHECK3-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 5 6259 // CHECK3-NEXT: store ptr @.offload_maptypes.30, ptr [[TMP125]], align 4 6260 // CHECK3-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 6 6261 // CHECK3-NEXT: store ptr null, ptr [[TMP126]], align 4 6262 // CHECK3-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 7 6263 // CHECK3-NEXT: store ptr null, ptr [[TMP127]], align 4 6264 // CHECK3-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 8 6265 // CHECK3-NEXT: store i64 2, ptr [[TMP128]], align 8 6266 // CHECK3-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 9 6267 // CHECK3-NEXT: store i64 0, ptr [[TMP129]], align 8 6268 // CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 10 6269 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP130]], align 4 6270 // CHECK3-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 11 6271 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP131]], align 4 6272 // CHECK3-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 12 6273 // CHECK3-NEXT: store i32 0, ptr [[TMP132]], align 4 6274 // CHECK3-NEXT: [[TMP133:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.region_id, ptr [[KERNEL_ARGS33]]) 6275 // CHECK3-NEXT: [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 0 6276 // CHECK3-NEXT: br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]] 6277 // CHECK3: omp_offload.failed34: 6278 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]] 6279 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT35]] 6280 // CHECK3: omp_offload.cont35: 6281 // CHECK3-NEXT: [[TMP135:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 6282 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP135]], align 4 6283 // CHECK3-NEXT: [[TMP136:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 6284 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP136]], align 4 6285 // CHECK3-NEXT: [[TMP137:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i32 0, i32 0 6286 // CHECK3-NEXT: store ptr null, ptr [[TMP137]], align 4 6287 // CHECK3-NEXT: [[TMP138:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 6288 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP138]], align 4 6289 // CHECK3-NEXT: [[TMP139:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 6290 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP139]], align 4 6291 // CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i32 0, i32 1 6292 // CHECK3-NEXT: store ptr null, ptr [[TMP140]], align 4 6293 // CHECK3-NEXT: [[TMP141:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 6294 // CHECK3-NEXT: [[TMP142:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 6295 // CHECK3-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 0 6296 // CHECK3-NEXT: store i32 3, ptr [[TMP143]], align 4 6297 // CHECK3-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 1 6298 // CHECK3-NEXT: store i32 2, ptr [[TMP144]], align 4 6299 // CHECK3-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 2 6300 // CHECK3-NEXT: store ptr [[TMP141]], ptr [[TMP145]], align 4 6301 // CHECK3-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 3 6302 // CHECK3-NEXT: store ptr [[TMP142]], ptr [[TMP146]], align 4 6303 // CHECK3-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 4 6304 // CHECK3-NEXT: store ptr @.offload_sizes.31, ptr [[TMP147]], align 4 6305 // CHECK3-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 5 6306 // CHECK3-NEXT: store ptr @.offload_maptypes.32, ptr [[TMP148]], align 4 6307 // CHECK3-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 6 6308 // CHECK3-NEXT: store ptr null, ptr [[TMP149]], align 4 6309 // CHECK3-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 7 6310 // CHECK3-NEXT: store ptr null, ptr [[TMP150]], align 4 6311 // CHECK3-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 8 6312 // CHECK3-NEXT: store i64 2, ptr [[TMP151]], align 8 6313 // CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 9 6314 // CHECK3-NEXT: store i64 0, ptr [[TMP152]], align 8 6315 // CHECK3-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 10 6316 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 4 6317 // CHECK3-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 11 6318 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP154]], align 4 6319 // CHECK3-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 12 6320 // CHECK3-NEXT: store i32 0, ptr [[TMP155]], align 4 6321 // CHECK3-NEXT: [[TMP156:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.region_id, ptr [[KERNEL_ARGS40]]) 6322 // CHECK3-NEXT: [[TMP157:%.*]] = icmp ne i32 [[TMP156]], 0 6323 // CHECK3-NEXT: br i1 [[TMP157]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]] 6324 // CHECK3: omp_offload.failed41: 6325 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]] 6326 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT42]] 6327 // CHECK3: omp_offload.cont42: 6328 // CHECK3-NEXT: [[TMP158:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 6329 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP158]], align 4 6330 // CHECK3-NEXT: [[TMP159:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 6331 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP159]], align 4 6332 // CHECK3-NEXT: [[TMP160:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i32 0, i32 0 6333 // CHECK3-NEXT: store ptr null, ptr [[TMP160]], align 4 6334 // CHECK3-NEXT: [[TMP161:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 1 6335 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP161]], align 4 6336 // CHECK3-NEXT: [[TMP162:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 1 6337 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP162]], align 4 6338 // CHECK3-NEXT: [[TMP163:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i32 0, i32 1 6339 // CHECK3-NEXT: store ptr null, ptr [[TMP163]], align 4 6340 // CHECK3-NEXT: [[TMP164:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0 6341 // CHECK3-NEXT: [[TMP165:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0 6342 // CHECK3-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 0 6343 // CHECK3-NEXT: store i32 3, ptr [[TMP166]], align 4 6344 // CHECK3-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 1 6345 // CHECK3-NEXT: store i32 2, ptr [[TMP167]], align 4 6346 // CHECK3-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 2 6347 // CHECK3-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 4 6348 // CHECK3-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 3 6349 // CHECK3-NEXT: store ptr [[TMP165]], ptr [[TMP169]], align 4 6350 // CHECK3-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 4 6351 // CHECK3-NEXT: store ptr @.offload_sizes.33, ptr [[TMP170]], align 4 6352 // CHECK3-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 5 6353 // CHECK3-NEXT: store ptr @.offload_maptypes.34, ptr [[TMP171]], align 4 6354 // CHECK3-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 6 6355 // CHECK3-NEXT: store ptr null, ptr [[TMP172]], align 4 6356 // CHECK3-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 7 6357 // CHECK3-NEXT: store ptr null, ptr [[TMP173]], align 4 6358 // CHECK3-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 8 6359 // CHECK3-NEXT: store i64 2, ptr [[TMP174]], align 8 6360 // CHECK3-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 9 6361 // CHECK3-NEXT: store i64 0, ptr [[TMP175]], align 8 6362 // CHECK3-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 10 6363 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 4 6364 // CHECK3-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 11 6365 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP177]], align 4 6366 // CHECK3-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 12 6367 // CHECK3-NEXT: store i32 0, ptr [[TMP178]], align 4 6368 // CHECK3-NEXT: [[TMP179:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.region_id, ptr [[KERNEL_ARGS47]]) 6369 // CHECK3-NEXT: [[TMP180:%.*]] = icmp ne i32 [[TMP179]], 0 6370 // CHECK3-NEXT: br i1 [[TMP180]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]] 6371 // CHECK3: omp_offload.failed48: 6372 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]] 6373 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT49]] 6374 // CHECK3: omp_offload.cont49: 6375 // CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4 6376 // CHECK3-NEXT: [[TMP181:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 6377 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP181]], align 4 6378 // CHECK3-NEXT: [[TMP182:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 6379 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP182]], align 4 6380 // CHECK3-NEXT: [[TMP183:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 0 6381 // CHECK3-NEXT: store ptr null, ptr [[TMP183]], align 4 6382 // CHECK3-NEXT: [[TMP184:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1 6383 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP184]], align 4 6384 // CHECK3-NEXT: [[TMP185:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 1 6385 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP185]], align 4 6386 // CHECK3-NEXT: [[TMP186:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 1 6387 // CHECK3-NEXT: store ptr null, ptr [[TMP186]], align 4 6388 // CHECK3-NEXT: [[TMP187:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0 6389 // CHECK3-NEXT: [[TMP188:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0 6390 // CHECK3-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 0 6391 // CHECK3-NEXT: store i32 3, ptr [[TMP189]], align 4 6392 // CHECK3-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 1 6393 // CHECK3-NEXT: store i32 2, ptr [[TMP190]], align 4 6394 // CHECK3-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 2 6395 // CHECK3-NEXT: store ptr [[TMP187]], ptr [[TMP191]], align 4 6396 // CHECK3-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 3 6397 // CHECK3-NEXT: store ptr [[TMP188]], ptr [[TMP192]], align 4 6398 // CHECK3-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 4 6399 // CHECK3-NEXT: store ptr @.offload_sizes.35, ptr [[TMP193]], align 4 6400 // CHECK3-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 5 6401 // CHECK3-NEXT: store ptr @.offload_maptypes.36, ptr [[TMP194]], align 4 6402 // CHECK3-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 6 6403 // CHECK3-NEXT: store ptr null, ptr [[TMP195]], align 4 6404 // CHECK3-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 7 6405 // CHECK3-NEXT: store ptr null, ptr [[TMP196]], align 4 6406 // CHECK3-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 8 6407 // CHECK3-NEXT: store i64 2, ptr [[TMP197]], align 8 6408 // CHECK3-NEXT: [[TMP198:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 9 6409 // CHECK3-NEXT: store i64 0, ptr [[TMP198]], align 8 6410 // CHECK3-NEXT: [[TMP199:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 10 6411 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP199]], align 4 6412 // CHECK3-NEXT: [[TMP200:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 11 6413 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP200]], align 4 6414 // CHECK3-NEXT: [[TMP201:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 12 6415 // CHECK3-NEXT: store i32 0, ptr [[TMP201]], align 4 6416 // CHECK3-NEXT: [[TMP202:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.region_id, ptr [[KERNEL_ARGS54]]) 6417 // CHECK3-NEXT: [[TMP203:%.*]] = icmp ne i32 [[TMP202]], 0 6418 // CHECK3-NEXT: br i1 [[TMP203]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]] 6419 // CHECK3: omp_offload.failed55: 6420 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 6421 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT56]] 6422 // CHECK3: omp_offload.cont56: 6423 // CHECK3-NEXT: store i32 10, ptr [[T_VAR]], align 4 6424 // CHECK3-NEXT: [[TMP204:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 6425 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP204]], align 4 6426 // CHECK3-NEXT: [[TMP205:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 6427 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP205]], align 4 6428 // CHECK3-NEXT: [[TMP206:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 0 6429 // CHECK3-NEXT: store ptr null, ptr [[TMP206]], align 4 6430 // CHECK3-NEXT: [[TMP207:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 1 6431 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP207]], align 4 6432 // CHECK3-NEXT: [[TMP208:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 1 6433 // CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP208]], align 4 6434 // CHECK3-NEXT: [[TMP209:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 1 6435 // CHECK3-NEXT: store ptr null, ptr [[TMP209]], align 4 6436 // CHECK3-NEXT: [[TMP210:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0 6437 // CHECK3-NEXT: [[TMP211:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0 6438 // CHECK3-NEXT: [[TMP212:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0 6439 // CHECK3-NEXT: store i32 3, ptr [[TMP212]], align 4 6440 // CHECK3-NEXT: [[TMP213:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1 6441 // CHECK3-NEXT: store i32 2, ptr [[TMP213]], align 4 6442 // CHECK3-NEXT: [[TMP214:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2 6443 // CHECK3-NEXT: store ptr [[TMP210]], ptr [[TMP214]], align 4 6444 // CHECK3-NEXT: [[TMP215:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3 6445 // CHECK3-NEXT: store ptr [[TMP211]], ptr [[TMP215]], align 4 6446 // CHECK3-NEXT: [[TMP216:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4 6447 // CHECK3-NEXT: store ptr @.offload_sizes.37, ptr [[TMP216]], align 4 6448 // CHECK3-NEXT: [[TMP217:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5 6449 // CHECK3-NEXT: store ptr @.offload_maptypes.38, ptr [[TMP217]], align 4 6450 // CHECK3-NEXT: [[TMP218:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6 6451 // CHECK3-NEXT: store ptr null, ptr [[TMP218]], align 4 6452 // CHECK3-NEXT: [[TMP219:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7 6453 // CHECK3-NEXT: store ptr null, ptr [[TMP219]], align 4 6454 // CHECK3-NEXT: [[TMP220:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8 6455 // CHECK3-NEXT: store i64 2, ptr [[TMP220]], align 8 6456 // CHECK3-NEXT: [[TMP221:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9 6457 // CHECK3-NEXT: store i64 0, ptr [[TMP221]], align 8 6458 // CHECK3-NEXT: [[TMP222:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10 6459 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP222]], align 4 6460 // CHECK3-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11 6461 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP223]], align 4 6462 // CHECK3-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12 6463 // CHECK3-NEXT: store i32 0, ptr [[TMP224]], align 4 6464 // CHECK3-NEXT: [[TMP225:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, ptr [[KERNEL_ARGS61]]) 6465 // CHECK3-NEXT: [[TMP226:%.*]] = icmp ne i32 [[TMP225]], 0 6466 // CHECK3-NEXT: br i1 [[TMP226]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]] 6467 // CHECK3: omp_offload.failed62: 6468 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]] 6469 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT63]] 6470 // CHECK3: omp_offload.cont63: 6471 // CHECK3-NEXT: ret i32 0 6472 // 6473 // 6474 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 6475 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 6476 // CHECK3-NEXT: entry: 6477 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 6478 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 6479 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 6480 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[TMP0]]) 6481 // CHECK3-NEXT: ret void 6482 // 6483 // 6484 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 6485 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 6486 // CHECK3-NEXT: entry: 6487 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 6488 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 6489 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 6490 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 6491 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6492 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 6493 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6494 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6495 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6496 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6497 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 6498 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 6499 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 6500 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 6501 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 6502 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 6503 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 6504 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6505 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 6506 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6507 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6508 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 6509 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6510 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6511 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6512 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 6513 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6514 // CHECK3: cond.true: 6515 // CHECK3-NEXT: br label [[COND_END:%.*]] 6516 // CHECK3: cond.false: 6517 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6518 // CHECK3-NEXT: br label [[COND_END]] 6519 // CHECK3: cond.end: 6520 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6521 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6522 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6523 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6524 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6525 // CHECK3: omp.inner.for.cond: 6526 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6527 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6528 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6529 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6530 // CHECK3: omp.inner.for.body: 6531 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6532 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 6533 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6534 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6535 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 6536 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 6537 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 6538 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 4 6539 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6540 // CHECK3: omp.body.continue: 6541 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6542 // CHECK3: omp.inner.for.inc: 6543 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6544 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 6545 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 6546 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 6547 // CHECK3: omp.inner.for.end: 6548 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6549 // CHECK3: omp.loop.exit: 6550 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6551 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 6552 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 4 6553 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 6554 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 6555 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 6556 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 6557 // CHECK3-NEXT: ] 6558 // CHECK3: .omp.reduction.case1: 6559 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 6560 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4 6561 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 6562 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 6563 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 6564 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6565 // CHECK3: .omp.reduction.case2: 6566 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4 6567 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 6568 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 6569 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6570 // CHECK3: .omp.reduction.default: 6571 // CHECK3-NEXT: ret void 6572 // 6573 // 6574 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 6575 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 6576 // CHECK3-NEXT: entry: 6577 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 6578 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 6579 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 6580 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 6581 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 6582 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 6583 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 6584 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 6585 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 6586 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 6587 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 6588 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 6589 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 6590 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 6591 // CHECK3-NEXT: ret void 6592 // 6593 // 6594 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37 6595 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 6596 // CHECK3-NEXT: entry: 6597 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 6598 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 6599 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 6600 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 6601 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 6602 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 6603 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 6604 // CHECK3-NEXT: ret void 6605 // 6606 // 6607 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined 6608 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 6609 // CHECK3-NEXT: entry: 6610 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 6611 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 6612 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 6613 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 6614 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 6615 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6616 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 6617 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6618 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6619 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6620 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6621 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 6622 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 6623 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 6624 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 6625 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 6626 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 6627 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 6628 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 6629 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 6630 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6631 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 6632 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6633 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6634 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 6635 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 6636 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6637 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6638 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 6639 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6640 // CHECK3: cond.true: 6641 // CHECK3-NEXT: br label [[COND_END:%.*]] 6642 // CHECK3: cond.false: 6643 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6644 // CHECK3-NEXT: br label [[COND_END]] 6645 // CHECK3: cond.end: 6646 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6647 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6648 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6649 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 6650 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6651 // CHECK3: omp.inner.for.cond: 6652 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6653 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6654 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6655 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6656 // CHECK3: omp.inner.for.body: 6657 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6658 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6659 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6660 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6661 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 6662 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP10]] 6663 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 6664 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR1]], align 4 6665 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP12]], [[TMP11]] 6666 // CHECK3-NEXT: store i32 [[SUB]], ptr [[T_VAR1]], align 4 6667 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6668 // CHECK3: omp.body.continue: 6669 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6670 // CHECK3: omp.inner.for.inc: 6671 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6672 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 6673 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 6674 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 6675 // CHECK3: omp.inner.for.end: 6676 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6677 // CHECK3: omp.loop.exit: 6678 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 6679 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 6680 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 4 6681 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 6682 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 6683 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 6684 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 6685 // CHECK3-NEXT: ] 6686 // CHECK3: .omp.reduction.case1: 6687 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 6688 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 6689 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 6690 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 4 6691 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 6692 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6693 // CHECK3: .omp.reduction.case2: 6694 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 6695 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 6696 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 6697 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6698 // CHECK3: .omp.reduction.default: 6699 // CHECK3-NEXT: ret void 6700 // 6701 // 6702 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func 6703 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 6704 // CHECK3-NEXT: entry: 6705 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 6706 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 6707 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 6708 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 6709 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 6710 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 6711 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 6712 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 6713 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 6714 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 6715 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 6716 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 6717 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 6718 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 6719 // CHECK3-NEXT: ret void 6720 // 6721 // 6722 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43 6723 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 6724 // CHECK3-NEXT: entry: 6725 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 6726 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 6727 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 6728 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 6729 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 6730 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 6731 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 6732 // CHECK3-NEXT: ret void 6733 // 6734 // 6735 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined 6736 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 6737 // CHECK3-NEXT: entry: 6738 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 6739 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 6740 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 6741 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 6742 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 6743 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6744 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 6745 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6746 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6747 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6748 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6749 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 6750 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 6751 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 6752 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 6753 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 6754 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 6755 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 6756 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 6757 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 6758 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 6759 // CHECK3-NEXT: store i32 1, ptr [[T_VAR1]], align 4 6760 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6761 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 6762 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6763 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6764 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 6765 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 6766 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6767 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6768 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 6769 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6770 // CHECK3: cond.true: 6771 // CHECK3-NEXT: br label [[COND_END:%.*]] 6772 // CHECK3: cond.false: 6773 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6774 // CHECK3-NEXT: br label [[COND_END]] 6775 // CHECK3: cond.end: 6776 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6777 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6778 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6779 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 6780 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6781 // CHECK3: omp.inner.for.cond: 6782 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6783 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6784 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6785 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6786 // CHECK3: omp.inner.for.body: 6787 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6788 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6789 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6790 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6791 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 6792 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 6793 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 6794 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 6795 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP10]], [[TMP12]] 6796 // CHECK3-NEXT: store i32 [[MUL3]], ptr [[T_VAR1]], align 4 6797 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6798 // CHECK3: omp.body.continue: 6799 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6800 // CHECK3: omp.inner.for.inc: 6801 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6802 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 6803 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 6804 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 6805 // CHECK3: omp.inner.for.end: 6806 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6807 // CHECK3: omp.loop.exit: 6808 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 6809 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 6810 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 4 6811 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 6812 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 6813 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 6814 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 6815 // CHECK3-NEXT: ] 6816 // CHECK3: .omp.reduction.case1: 6817 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 6818 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 6819 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], [[TMP17]] 6820 // CHECK3-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 4 6821 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 6822 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6823 // CHECK3: .omp.reduction.case2: 6824 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 6825 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 4 6826 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 6827 // CHECK3: atomic_cont: 6828 // CHECK3-NEXT: [[TMP19:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP24:%.*]], [[ATOMIC_CONT]] ] 6829 // CHECK3-NEXT: store i32 [[TMP19]], ptr [[_TMP6]], align 4 6830 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[_TMP6]], align 4 6831 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR1]], align 4 6832 // CHECK3-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP20]], [[TMP21]] 6833 // CHECK3-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 4 6834 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4 6835 // CHECK3-NEXT: [[TMP23:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP19]], i32 [[TMP22]] monotonic monotonic, align 4 6836 // CHECK3-NEXT: [[TMP24]] = extractvalue { i32, i1 } [[TMP23]], 0 6837 // CHECK3-NEXT: [[TMP25:%.*]] = extractvalue { i32, i1 } [[TMP23]], 1 6838 // CHECK3-NEXT: br i1 [[TMP25]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 6839 // CHECK3: atomic_exit: 6840 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 6841 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6842 // CHECK3: .omp.reduction.default: 6843 // CHECK3-NEXT: ret void 6844 // 6845 // 6846 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func 6847 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 6848 // CHECK3-NEXT: entry: 6849 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 6850 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 6851 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 6852 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 6853 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 6854 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 6855 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 6856 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 6857 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 6858 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 6859 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 6860 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 6861 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]] 6862 // CHECK3-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 4 6863 // CHECK3-NEXT: ret void 6864 // 6865 // 6866 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 6867 // CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 6868 // CHECK3-NEXT: entry: 6869 // CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 4 6870 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 6871 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 4 6872 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 6873 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 4 6874 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 6875 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 6876 // CHECK3-NEXT: ret void 6877 // 6878 // 6879 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 6880 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 6881 // CHECK3-NEXT: entry: 6882 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 6883 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 6884 // CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 4 6885 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 6886 // CHECK3-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 1 6887 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6888 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 6889 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6890 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6891 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6892 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6893 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 6894 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 6895 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 6896 // CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 6897 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 6898 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 6899 // CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 4 6900 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 6901 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 4 6902 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 6903 // CHECK3-NEXT: store i8 1, ptr [[AND_VAR1]], align 1 6904 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6905 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 6906 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6907 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6908 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 6909 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 6910 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6911 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6912 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 6913 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6914 // CHECK3: cond.true: 6915 // CHECK3-NEXT: br label [[COND_END:%.*]] 6916 // CHECK3: cond.false: 6917 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6918 // CHECK3-NEXT: br label [[COND_END]] 6919 // CHECK3: cond.end: 6920 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6921 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6922 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6923 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 6924 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6925 // CHECK3: omp.inner.for.cond: 6926 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6927 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6928 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6929 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6930 // CHECK3: omp.inner.for.body: 6931 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6932 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6933 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6934 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6935 // CHECK3-NEXT: [[TMP10:%.*]] = load i8, ptr [[AND_VAR1]], align 1 6936 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1 6937 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 6938 // CHECK3: land.rhs: 6939 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 6940 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 6941 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 6942 // CHECK3-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 2 6943 // CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 0 6944 // CHECK3-NEXT: br label [[LAND_END]] 6945 // CHECK3: land.end: 6946 // CHECK3-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ] 6947 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i8 6948 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 1 6949 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6950 // CHECK3: omp.body.continue: 6951 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6952 // CHECK3: omp.inner.for.inc: 6953 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6954 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 6955 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 6956 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 6957 // CHECK3: omp.inner.for.end: 6958 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6959 // CHECK3: omp.loop.exit: 6960 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 6961 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 6962 // CHECK3-NEXT: store ptr [[AND_VAR1]], ptr [[TMP15]], align 4 6963 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 6964 // CHECK3-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 6965 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 6966 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 6967 // CHECK3-NEXT: ] 6968 // CHECK3: .omp.reduction.case1: 6969 // CHECK3-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1 6970 // CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1 6971 // CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]] 6972 // CHECK3: land.rhs6: 6973 // CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 1 6974 // CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1 6975 // CHECK3-NEXT: br label [[LAND_END8]] 6976 // CHECK3: land.end8: 6977 // CHECK3-NEXT: [[TMP19:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ] 6978 // CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i8 6979 // CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 6980 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 6981 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 6982 // CHECK3: .omp.reduction.case2: 6983 // CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[AND_VAR1]], align 1 6984 // CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1 6985 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 6986 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 6987 // CHECK3: atomic_cont: 6988 // CHECK3-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LAND_END17:%.*]] ] 6989 // CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1 6990 // CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 6991 // CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 6992 // CHECK3-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1 6993 // CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1 6994 // CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]] 6995 // CHECK3: land.rhs15: 6996 // CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[AND_VAR1]], align 1 6997 // CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1 6998 // CHECK3-NEXT: br label [[LAND_END17]] 6999 // CHECK3: land.end17: 7000 // CHECK3-NEXT: [[TMP24:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ] 7001 // CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i8 7002 // CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 7003 // CHECK3-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 7004 // CHECK3-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 1 7005 // CHECK3-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 0 7006 // CHECK3-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 1 7007 // CHECK3-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 7008 // CHECK3: atomic_exit: 7009 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7010 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7011 // CHECK3: .omp.reduction.default: 7012 // CHECK3-NEXT: ret void 7013 // 7014 // 7015 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func 7016 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7017 // CHECK3-NEXT: entry: 7018 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7019 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7020 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7021 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7022 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7023 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7024 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7025 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7026 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7027 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7028 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 7029 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 7030 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 7031 // CHECK3: land.rhs: 7032 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 7033 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 7034 // CHECK3-NEXT: br label [[LAND_END]] 7035 // CHECK3: land.end: 7036 // CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ] 7037 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 7038 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 7039 // CHECK3-NEXT: ret void 7040 // 7041 // 7042 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55 7043 // CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7044 // CHECK3-NEXT: entry: 7045 // CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 4 7046 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7047 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 4 7048 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7049 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 4 7050 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7051 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 7052 // CHECK3-NEXT: ret void 7053 // 7054 // 7055 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined 7056 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7057 // CHECK3-NEXT: entry: 7058 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7059 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7060 // CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 4 7061 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7062 // CHECK3-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 1 7063 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7064 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 7065 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7066 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7067 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7068 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7069 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 7070 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 7071 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 7072 // CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 7073 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7074 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7075 // CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 4 7076 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7077 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 4 7078 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7079 // CHECK3-NEXT: store i8 0, ptr [[OR_VAR1]], align 1 7080 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7081 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7082 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7083 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7084 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7085 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7086 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7087 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7088 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 7089 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7090 // CHECK3: cond.true: 7091 // CHECK3-NEXT: br label [[COND_END:%.*]] 7092 // CHECK3: cond.false: 7093 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7094 // CHECK3-NEXT: br label [[COND_END]] 7095 // CHECK3: cond.end: 7096 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7097 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7098 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7099 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7100 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7101 // CHECK3: omp.inner.for.cond: 7102 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7103 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7104 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7105 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7106 // CHECK3: omp.inner.for.body: 7107 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7108 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7109 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7110 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7111 // CHECK3-NEXT: [[TMP10:%.*]] = load i8, ptr [[OR_VAR1]], align 1 7112 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i1 7113 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 7114 // CHECK3: lor.rhs: 7115 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 7116 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 7117 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 7118 // CHECK3-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 2 7119 // CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 0 7120 // CHECK3-NEXT: br label [[LOR_END]] 7121 // CHECK3: lor.end: 7122 // CHECK3-NEXT: [[TMP13:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ] 7123 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i8 7124 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 1 7125 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7126 // CHECK3: omp.body.continue: 7127 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7128 // CHECK3: omp.inner.for.inc: 7129 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7130 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 7131 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 7132 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 7133 // CHECK3: omp.inner.for.end: 7134 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7135 // CHECK3: omp.loop.exit: 7136 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 7137 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 7138 // CHECK3-NEXT: store ptr [[OR_VAR1]], ptr [[TMP15]], align 4 7139 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 7140 // CHECK3-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 7141 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 7142 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 7143 // CHECK3-NEXT: ] 7144 // CHECK3: .omp.reduction.case1: 7145 // CHECK3-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 1 7146 // CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i1 7147 // CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]] 7148 // CHECK3: lor.rhs6: 7149 // CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 1 7150 // CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i1 7151 // CHECK3-NEXT: br label [[LOR_END8]] 7152 // CHECK3: lor.end8: 7153 // CHECK3-NEXT: [[TMP19:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ] 7154 // CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i8 7155 // CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 7156 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7157 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7158 // CHECK3: .omp.reduction.case2: 7159 // CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[OR_VAR1]], align 1 7160 // CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i1 7161 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 7162 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 7163 // CHECK3: atomic_cont: 7164 // CHECK3-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LOR_END17:%.*]] ] 7165 // CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i1 7166 // CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 7167 // CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 7168 // CHECK3-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 1 7169 // CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i1 7170 // CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]] 7171 // CHECK3: lor.rhs15: 7172 // CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[OR_VAR1]], align 1 7173 // CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i1 7174 // CHECK3-NEXT: br label [[LOR_END17]] 7175 // CHECK3: lor.end17: 7176 // CHECK3-NEXT: [[TMP24:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ] 7177 // CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i8 7178 // CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 7179 // CHECK3-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 7180 // CHECK3-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 1 7181 // CHECK3-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 0 7182 // CHECK3-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 1 7183 // CHECK3-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 7184 // CHECK3: atomic_exit: 7185 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7186 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7187 // CHECK3: .omp.reduction.default: 7188 // CHECK3-NEXT: ret void 7189 // 7190 // 7191 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func 7192 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7193 // CHECK3-NEXT: entry: 7194 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7195 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7196 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7197 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7198 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7199 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7200 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7201 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7202 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7203 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7204 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 7205 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 7206 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 7207 // CHECK3: lor.rhs: 7208 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 7209 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 7210 // CHECK3-NEXT: br label [[LOR_END]] 7211 // CHECK3: lor.end: 7212 // CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ] 7213 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 7214 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 7215 // CHECK3-NEXT: ret void 7216 // 7217 // 7218 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61 7219 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7220 // CHECK3-NEXT: entry: 7221 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 7222 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7223 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 7224 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7225 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 7226 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7227 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 7228 // CHECK3-NEXT: ret void 7229 // 7230 // 7231 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined 7232 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7233 // CHECK3-NEXT: entry: 7234 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7235 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7236 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 7237 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7238 // CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 7239 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7240 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 7241 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7242 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7243 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7244 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7245 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 7246 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 7247 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7248 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7249 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 7250 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7251 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 7252 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7253 // CHECK3-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 4 7254 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7255 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7256 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7257 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7258 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7259 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7260 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7261 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7262 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 7263 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7264 // CHECK3: cond.true: 7265 // CHECK3-NEXT: br label [[COND_END:%.*]] 7266 // CHECK3: cond.false: 7267 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7268 // CHECK3-NEXT: br label [[COND_END]] 7269 // CHECK3: cond.end: 7270 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7271 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7272 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7273 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7274 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7275 // CHECK3: omp.inner.for.cond: 7276 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7277 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7278 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7279 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7280 // CHECK3: omp.inner.for.body: 7281 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7282 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7283 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7284 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7285 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7286 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 7287 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 7288 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 7289 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP10]], [[TMP12]] 7290 // CHECK3-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 4 7291 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7292 // CHECK3: omp.body.continue: 7293 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7294 // CHECK3: omp.inner.for.inc: 7295 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7296 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 7297 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 7298 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 7299 // CHECK3: omp.inner.for.end: 7300 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7301 // CHECK3: omp.loop.exit: 7302 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 7303 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 7304 // CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 4 7305 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 7306 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 7307 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 7308 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 7309 // CHECK3-NEXT: ] 7310 // CHECK3: .omp.reduction.case1: 7311 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 7312 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7313 // CHECK3-NEXT: [[AND4:%.*]] = and i32 [[TMP16]], [[TMP17]] 7314 // CHECK3-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 4 7315 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7316 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7317 // CHECK3: .omp.reduction.case2: 7318 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7319 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 7320 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7321 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7322 // CHECK3: .omp.reduction.default: 7323 // CHECK3-NEXT: ret void 7324 // 7325 // 7326 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func 7327 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7328 // CHECK3-NEXT: entry: 7329 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7330 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7331 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7332 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7333 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7334 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7335 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7336 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7337 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7338 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7339 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 7340 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 7341 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]] 7342 // CHECK3-NEXT: store i32 [[AND]], ptr [[TMP7]], align 4 7343 // CHECK3-NEXT: ret void 7344 // 7345 // 7346 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 7347 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7348 // CHECK3-NEXT: entry: 7349 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 7350 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7351 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 7352 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7353 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 7354 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7355 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 7356 // CHECK3-NEXT: ret void 7357 // 7358 // 7359 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined 7360 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7361 // CHECK3-NEXT: entry: 7362 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7363 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7364 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 7365 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7366 // CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 7367 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7368 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 7369 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7370 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7371 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7372 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7373 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 7374 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 7375 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7376 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7377 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 7378 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7379 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 7380 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7381 // CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 7382 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7383 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7384 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7385 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7386 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7387 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7388 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7389 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7390 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 7391 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7392 // CHECK3: cond.true: 7393 // CHECK3-NEXT: br label [[COND_END:%.*]] 7394 // CHECK3: cond.false: 7395 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7396 // CHECK3-NEXT: br label [[COND_END]] 7397 // CHECK3: cond.end: 7398 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7399 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7400 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7401 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7402 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7403 // CHECK3: omp.inner.for.cond: 7404 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7405 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7406 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7407 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7408 // CHECK3: omp.inner.for.body: 7409 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7410 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7411 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7412 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7413 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7414 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 7415 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 7416 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 7417 // CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP10]], [[TMP12]] 7418 // CHECK3-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 4 7419 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7420 // CHECK3: omp.body.continue: 7421 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7422 // CHECK3: omp.inner.for.inc: 7423 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7424 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 7425 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 7426 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 7427 // CHECK3: omp.inner.for.end: 7428 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7429 // CHECK3: omp.loop.exit: 7430 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 7431 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 7432 // CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 4 7433 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 7434 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 7435 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 7436 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 7437 // CHECK3-NEXT: ] 7438 // CHECK3: .omp.reduction.case1: 7439 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 7440 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7441 // CHECK3-NEXT: [[OR4:%.*]] = or i32 [[TMP16]], [[TMP17]] 7442 // CHECK3-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 4 7443 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7444 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7445 // CHECK3: .omp.reduction.case2: 7446 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7447 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 7448 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7449 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7450 // CHECK3: .omp.reduction.default: 7451 // CHECK3-NEXT: ret void 7452 // 7453 // 7454 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func 7455 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7456 // CHECK3-NEXT: entry: 7457 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7458 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7459 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7460 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7461 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7462 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7463 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7464 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7465 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7466 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7467 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 7468 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 7469 // CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]] 7470 // CHECK3-NEXT: store i32 [[OR]], ptr [[TMP7]], align 4 7471 // CHECK3-NEXT: ret void 7472 // 7473 // 7474 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71 7475 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7476 // CHECK3-NEXT: entry: 7477 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 7478 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7479 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 7480 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7481 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 7482 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7483 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 7484 // CHECK3-NEXT: ret void 7485 // 7486 // 7487 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined 7488 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7489 // CHECK3-NEXT: entry: 7490 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7491 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7492 // CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 4 7493 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7494 // CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 7495 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7496 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 7497 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7498 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7499 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7500 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7501 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 7502 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 7503 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7504 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7505 // CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 4 7506 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7507 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 4 7508 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7509 // CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 7510 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7511 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7512 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7513 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7514 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7515 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7516 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7517 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7518 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 7519 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7520 // CHECK3: cond.true: 7521 // CHECK3-NEXT: br label [[COND_END:%.*]] 7522 // CHECK3: cond.false: 7523 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7524 // CHECK3-NEXT: br label [[COND_END]] 7525 // CHECK3: cond.end: 7526 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7527 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7528 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7529 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7530 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7531 // CHECK3: omp.inner.for.cond: 7532 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7533 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7534 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7535 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7536 // CHECK3: omp.inner.for.body: 7537 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7538 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7539 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7540 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7541 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7542 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 7543 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 7544 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 7545 // CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP10]], [[TMP12]] 7546 // CHECK3-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 4 7547 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7548 // CHECK3: omp.body.continue: 7549 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7550 // CHECK3: omp.inner.for.inc: 7551 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7552 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 1 7553 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 7554 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 7555 // CHECK3: omp.inner.for.end: 7556 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7557 // CHECK3: omp.loop.exit: 7558 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 7559 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 7560 // CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 4 7561 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 7562 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 7563 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 7564 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 7565 // CHECK3-NEXT: ] 7566 // CHECK3: .omp.reduction.case1: 7567 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 7568 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7569 // CHECK3-NEXT: [[XOR4:%.*]] = xor i32 [[TMP16]], [[TMP17]] 7570 // CHECK3-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 4 7571 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7572 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7573 // CHECK3: .omp.reduction.case2: 7574 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 7575 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 7576 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7577 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7578 // CHECK3: .omp.reduction.default: 7579 // CHECK3-NEXT: ret void 7580 // 7581 // 7582 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func 7583 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7584 // CHECK3-NEXT: entry: 7585 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7586 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7587 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7588 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7589 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7590 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7591 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7592 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7593 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7594 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7595 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 7596 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 7597 // CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]] 7598 // CHECK3-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 4 7599 // CHECK3-NEXT: ret void 7600 // 7601 // 7602 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77 7603 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7604 // CHECK3-NEXT: entry: 7605 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 7606 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7607 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 7608 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7609 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 7610 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7611 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 7612 // CHECK3-NEXT: ret void 7613 // 7614 // 7615 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined 7616 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7617 // CHECK3-NEXT: entry: 7618 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7619 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7620 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 7621 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7622 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 7623 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7624 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 7625 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7626 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7627 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7628 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7629 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 7630 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 7631 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7632 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7633 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 7634 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7635 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 7636 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7637 // CHECK3-NEXT: store i32 -2147483648, ptr [[T_VAR1]], align 4 7638 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7639 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7640 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7641 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7642 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7643 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7644 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7645 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7646 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 7647 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7648 // CHECK3: cond.true: 7649 // CHECK3-NEXT: br label [[COND_END:%.*]] 7650 // CHECK3: cond.false: 7651 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7652 // CHECK3-NEXT: br label [[COND_END]] 7653 // CHECK3: cond.end: 7654 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7655 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7656 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7657 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7658 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7659 // CHECK3: omp.inner.for.cond: 7660 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7661 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7662 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7663 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7664 // CHECK3: omp.inner.for.body: 7665 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7666 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7667 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7668 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7669 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 7670 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 7671 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 7672 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 7673 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP10]], [[TMP12]] 7674 // CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 7675 // CHECK3: cond.true4: 7676 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4 7677 // CHECK3-NEXT: br label [[COND_END7:%.*]] 7678 // CHECK3: cond.false5: 7679 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4 7680 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP14]] 7681 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4 7682 // CHECK3-NEXT: br label [[COND_END7]] 7683 // CHECK3: cond.end7: 7684 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ] 7685 // CHECK3-NEXT: store i32 [[COND8]], ptr [[T_VAR1]], align 4 7686 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7687 // CHECK3: omp.body.continue: 7688 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7689 // CHECK3: omp.inner.for.inc: 7690 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7691 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1 7692 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 7693 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 7694 // CHECK3: omp.inner.for.end: 7695 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7696 // CHECK3: omp.loop.exit: 7697 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 7698 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 7699 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 4 7700 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 7701 // CHECK3-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 7702 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 7703 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 7704 // CHECK3-NEXT: ] 7705 // CHECK3: .omp.reduction.case1: 7706 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 4 7707 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 4 7708 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP19]], [[TMP20]] 7709 // CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 7710 // CHECK3: cond.true11: 7711 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 4 7712 // CHECK3-NEXT: br label [[COND_END13:%.*]] 7713 // CHECK3: cond.false12: 7714 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 4 7715 // CHECK3-NEXT: br label [[COND_END13]] 7716 // CHECK3: cond.end13: 7717 // CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE11]] ], [ [[TMP22]], [[COND_FALSE12]] ] 7718 // CHECK3-NEXT: store i32 [[COND14]], ptr [[TMP0]], align 4 7719 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7720 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7721 // CHECK3: .omp.reduction.case2: 7722 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4 7723 // CHECK3-NEXT: [[TMP24:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP23]] monotonic, align 4 7724 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7725 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7726 // CHECK3: .omp.reduction.default: 7727 // CHECK3-NEXT: ret void 7728 // 7729 // 7730 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func 7731 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7732 // CHECK3-NEXT: entry: 7733 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7734 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7735 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7736 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7737 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7738 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7739 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7740 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7741 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7742 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7743 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 7744 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 7745 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 7746 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7747 // CHECK3: cond.true: 7748 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 7749 // CHECK3-NEXT: br label [[COND_END:%.*]] 7750 // CHECK3: cond.false: 7751 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 7752 // CHECK3-NEXT: br label [[COND_END]] 7753 // CHECK3: cond.end: 7754 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 7755 // CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 7756 // CHECK3-NEXT: ret void 7757 // 7758 // 7759 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83 7760 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7761 // CHECK3-NEXT: entry: 7762 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 7763 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7764 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 7765 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7766 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 7767 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7768 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 7769 // CHECK3-NEXT: ret void 7770 // 7771 // 7772 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined 7773 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] { 7774 // CHECK3-NEXT: entry: 7775 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7776 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7777 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 7778 // CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 7779 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 7780 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7781 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 7782 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7783 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7784 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7785 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7786 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 7787 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 7788 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7789 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7790 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 7791 // CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 7792 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 7793 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 7794 // CHECK3-NEXT: store i32 2147483647, ptr [[T_VAR1]], align 4 7795 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7796 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7797 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7798 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7799 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7800 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7801 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7802 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7803 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 7804 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7805 // CHECK3: cond.true: 7806 // CHECK3-NEXT: br label [[COND_END:%.*]] 7807 // CHECK3: cond.false: 7808 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7809 // CHECK3-NEXT: br label [[COND_END]] 7810 // CHECK3: cond.end: 7811 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7812 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7813 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7814 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7815 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7816 // CHECK3: omp.inner.for.cond: 7817 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7818 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7819 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7820 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7821 // CHECK3: omp.inner.for.body: 7822 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7823 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7824 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7825 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7826 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 4 7827 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 7828 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]] 7829 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 7830 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP12]] 7831 // CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 7832 // CHECK3: cond.true4: 7833 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4 7834 // CHECK3-NEXT: br label [[COND_END7:%.*]] 7835 // CHECK3: cond.false5: 7836 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 4 7837 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP14]] 7838 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4 7839 // CHECK3-NEXT: br label [[COND_END7]] 7840 // CHECK3: cond.end7: 7841 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ] 7842 // CHECK3-NEXT: store i32 [[COND8]], ptr [[T_VAR1]], align 4 7843 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7844 // CHECK3: omp.body.continue: 7845 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7846 // CHECK3: omp.inner.for.inc: 7847 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7848 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1 7849 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 7850 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 7851 // CHECK3: omp.inner.for.end: 7852 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7853 // CHECK3: omp.loop.exit: 7854 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]]) 7855 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 7856 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 4 7857 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 7858 // CHECK3-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 7859 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 7860 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 7861 // CHECK3-NEXT: ] 7862 // CHECK3: .omp.reduction.case1: 7863 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 4 7864 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 4 7865 // CHECK3-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP19]], [[TMP20]] 7866 // CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 7867 // CHECK3: cond.true11: 7868 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 4 7869 // CHECK3-NEXT: br label [[COND_END13:%.*]] 7870 // CHECK3: cond.false12: 7871 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 4 7872 // CHECK3-NEXT: br label [[COND_END13]] 7873 // CHECK3: cond.end13: 7874 // CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE11]] ], [ [[TMP22]], [[COND_FALSE12]] ] 7875 // CHECK3-NEXT: store i32 [[COND14]], ptr [[TMP0]], align 4 7876 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7877 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7878 // CHECK3: .omp.reduction.case2: 7879 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4 7880 // CHECK3-NEXT: [[TMP24:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP23]] monotonic, align 4 7881 // CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var) 7882 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 7883 // CHECK3: .omp.reduction.default: 7884 // CHECK3-NEXT: ret void 7885 // 7886 // 7887 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func 7888 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 7889 // CHECK3-NEXT: entry: 7890 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 7891 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 7892 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 7893 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 7894 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 7895 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 7896 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 7897 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 7898 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 7899 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 7900 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 7901 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 7902 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 7903 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7904 // CHECK3: cond.true: 7905 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 7906 // CHECK3-NEXT: br label [[COND_END:%.*]] 7907 // CHECK3: cond.false: 7908 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 7909 // CHECK3-NEXT: br label [[COND_END]] 7910 // CHECK3: cond.end: 7911 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 7912 // CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 7913 // CHECK3-NEXT: ret void 7914 // 7915 // 7916 // CHECK9-LABEL: define {{[^@]+}}@main 7917 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 7918 // CHECK9-NEXT: entry: 7919 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7920 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 7921 // CHECK9-NEXT: [[REF_TMP1:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 1 7922 // CHECK9-NEXT: [[REF_TMP2:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 1 7923 // CHECK9-NEXT: [[REF_TMP3:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 1 7924 // CHECK9-NEXT: [[REF_TMP4:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 1 7925 // CHECK9-NEXT: [[REF_TMP5:%.*]] = alloca [[CLASS_ANON_8:%.*]], align 1 7926 // CHECK9-NEXT: [[REF_TMP6:%.*]] = alloca [[CLASS_ANON_10:%.*]], align 1 7927 // CHECK9-NEXT: [[REF_TMP7:%.*]] = alloca [[CLASS_ANON_12:%.*]], align 1 7928 // CHECK9-NEXT: [[REF_TMP8:%.*]] = alloca [[CLASS_ANON_14:%.*]], align 1 7929 // CHECK9-NEXT: [[REF_TMP9:%.*]] = alloca [[CLASS_ANON_16:%.*]], align 1 7930 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 7931 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 7932 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_1clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP1]]) 7933 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_2clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP2]]) 7934 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_3clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP3]]) 7935 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_4clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP4]]) 7936 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_5clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP5]]) 7937 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_6clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP6]]) 7938 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_7clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP7]]) 7939 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_8clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP8]]) 7940 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_9clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP9]]) 7941 // CHECK9-NEXT: ret i32 0 7942 // 7943 // 7944 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96 7945 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 7946 // CHECK9-NEXT: entry: 7947 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 7948 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 7949 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 7950 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined, ptr [[TMP0]]) 7951 // CHECK9-NEXT: ret void 7952 // 7953 // 7954 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined 7955 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 7956 // CHECK9-NEXT: entry: 7957 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7958 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7959 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 7960 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 7961 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7962 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7963 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7964 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7965 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7966 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7967 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7968 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_18:%.*]], align 8 7969 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 7970 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7971 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7972 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 7973 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 7974 // CHECK9-NEXT: store i32 0, ptr [[SIVAR1]], align 4 7975 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7976 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 7977 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7978 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7979 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7980 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 7981 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7982 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7983 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 7984 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7985 // CHECK9: cond.true: 7986 // CHECK9-NEXT: br label [[COND_END:%.*]] 7987 // CHECK9: cond.false: 7988 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7989 // CHECK9-NEXT: br label [[COND_END]] 7990 // CHECK9: cond.end: 7991 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7992 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7993 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7994 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 7995 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7996 // CHECK9: omp.inner.for.cond: 7997 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7998 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7999 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8000 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8001 // CHECK9: omp.inner.for.body: 8002 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8003 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8004 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8005 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8006 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 8007 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 8008 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]] 8009 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 8010 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_18]], ptr [[REF_TMP]], i32 0, i32 0 8011 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 8 8012 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8013 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8014 // CHECK9: omp.body.continue: 8015 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8016 // CHECK9: omp.inner.for.inc: 8017 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8018 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 8019 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 8020 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8021 // CHECK9: omp.inner.for.end: 8022 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8023 // CHECK9: omp.loop.exit: 8024 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8025 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8026 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 8 8027 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8028 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8029 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8030 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8031 // CHECK9-NEXT: ] 8032 // CHECK9: .omp.reduction.case1: 8033 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 8034 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 8035 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 8036 // CHECK9-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 8037 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8038 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8039 // CHECK9: .omp.reduction.case2: 8040 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 8041 // CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4 8042 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8043 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8044 // CHECK9: .omp.reduction.default: 8045 // CHECK9-NEXT: ret void 8046 // 8047 // 8048 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp.reduction.reduction_func 8049 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 8050 // CHECK9-NEXT: entry: 8051 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8052 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8053 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8054 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8055 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8056 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8057 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8058 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8059 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8060 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8061 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 8062 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 8063 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 8064 // CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 8065 // CHECK9-NEXT: ret void 8066 // 8067 // 8068 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112 8069 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 8070 // CHECK9-NEXT: entry: 8071 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 8072 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8073 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 8074 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined, ptr [[TMP0]]) 8075 // CHECK9-NEXT: ret void 8076 // 8077 // 8078 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined 8079 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 8080 // CHECK9-NEXT: entry: 8081 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8082 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8083 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 8084 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 8085 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8086 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8087 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8088 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8089 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8090 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8091 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8092 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_19:%.*]], align 8 8093 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8094 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8095 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8096 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8097 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 8098 // CHECK9-NEXT: store i32 0, ptr [[SIVAR1]], align 4 8099 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8100 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8101 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8102 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8103 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8104 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8105 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8106 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8107 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 8108 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8109 // CHECK9: cond.true: 8110 // CHECK9-NEXT: br label [[COND_END:%.*]] 8111 // CHECK9: cond.false: 8112 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8113 // CHECK9-NEXT: br label [[COND_END]] 8114 // CHECK9: cond.end: 8115 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8116 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8117 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8118 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8119 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8120 // CHECK9: omp.inner.for.cond: 8121 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8122 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8123 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8124 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8125 // CHECK9: omp.inner.for.body: 8126 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8127 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8128 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8129 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8130 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 8131 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 8132 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], [[TMP9]] 8133 // CHECK9-NEXT: store i32 [[SUB]], ptr [[SIVAR1]], align 4 8134 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_19]], ptr [[REF_TMP]], i32 0, i32 0 8135 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 8 8136 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_1clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8137 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8138 // CHECK9: omp.body.continue: 8139 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8140 // CHECK9: omp.inner.for.inc: 8141 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8142 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 8143 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 8144 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8145 // CHECK9: omp.inner.for.end: 8146 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8147 // CHECK9: omp.loop.exit: 8148 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8149 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8150 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 8 8151 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8152 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8153 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8154 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8155 // CHECK9-NEXT: ] 8156 // CHECK9: .omp.reduction.case1: 8157 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 8158 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 8159 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 8160 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 4 8161 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8162 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8163 // CHECK9: .omp.reduction.case2: 8164 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 8165 // CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4 8166 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8167 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8168 // CHECK9: .omp.reduction.default: 8169 // CHECK9-NEXT: ret void 8170 // 8171 // 8172 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined.omp.reduction.reduction_func 8173 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 8174 // CHECK9-NEXT: entry: 8175 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8176 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8177 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8178 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8179 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8180 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8181 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8182 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8183 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8184 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8185 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 8186 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 8187 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 8188 // CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 8189 // CHECK9-NEXT: ret void 8190 // 8191 // 8192 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122 8193 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 8194 // CHECK9-NEXT: entry: 8195 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 8196 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8197 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 8198 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined, ptr [[TMP0]]) 8199 // CHECK9-NEXT: ret void 8200 // 8201 // 8202 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined 8203 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 8204 // CHECK9-NEXT: entry: 8205 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8206 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8207 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 8208 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 8209 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8210 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8211 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8212 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8213 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8214 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8215 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8216 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_20:%.*]], align 8 8217 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8218 // CHECK9-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 8219 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 8220 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8221 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8222 // CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8223 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 8224 // CHECK9-NEXT: store i32 1, ptr [[SIVAR1]], align 4 8225 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8226 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8227 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8228 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8229 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8230 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8231 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8232 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8233 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 8234 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8235 // CHECK9: cond.true: 8236 // CHECK9-NEXT: br label [[COND_END:%.*]] 8237 // CHECK9: cond.false: 8238 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8239 // CHECK9-NEXT: br label [[COND_END]] 8240 // CHECK9: cond.end: 8241 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8242 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8243 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8244 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8245 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8246 // CHECK9: omp.inner.for.cond: 8247 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8248 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8249 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8250 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8251 // CHECK9: omp.inner.for.body: 8252 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8253 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8254 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8255 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8256 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 8257 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4 8258 // CHECK9-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP10]], [[TMP9]] 8259 // CHECK9-NEXT: store i32 [[MUL3]], ptr [[SIVAR1]], align 4 8260 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_20]], ptr [[REF_TMP]], i32 0, i32 0 8261 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 8 8262 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_2clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8263 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8264 // CHECK9: omp.body.continue: 8265 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8266 // CHECK9: omp.inner.for.inc: 8267 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8268 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 1 8269 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 8270 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8271 // CHECK9: omp.inner.for.end: 8272 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8273 // CHECK9: omp.loop.exit: 8274 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8275 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8276 // CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 8 8277 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8278 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8279 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8280 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8281 // CHECK9-NEXT: ] 8282 // CHECK9: .omp.reduction.case1: 8283 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 8284 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 8285 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], [[TMP16]] 8286 // CHECK9-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 4 8287 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8288 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8289 // CHECK9: .omp.reduction.case2: 8290 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 8291 // CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 4 8292 // CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]] 8293 // CHECK9: atomic_cont: 8294 // CHECK9-NEXT: [[TMP18:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP23:%.*]], [[ATOMIC_CONT]] ] 8295 // CHECK9-NEXT: store i32 [[TMP18]], ptr [[_TMP6]], align 4 8296 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[_TMP6]], align 4 8297 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 4 8298 // CHECK9-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP19]], [[TMP20]] 8299 // CHECK9-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 4 8300 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4 8301 // CHECK9-NEXT: [[TMP22:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP18]], i32 [[TMP21]] monotonic monotonic, align 4 8302 // CHECK9-NEXT: [[TMP23]] = extractvalue { i32, i1 } [[TMP22]], 0 8303 // CHECK9-NEXT: [[TMP24:%.*]] = extractvalue { i32, i1 } [[TMP22]], 1 8304 // CHECK9-NEXT: br i1 [[TMP24]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 8305 // CHECK9: atomic_exit: 8306 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8307 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8308 // CHECK9: .omp.reduction.default: 8309 // CHECK9-NEXT: ret void 8310 // 8311 // 8312 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp.reduction.reduction_func 8313 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 8314 // CHECK9-NEXT: entry: 8315 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8316 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8317 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8318 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8319 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8320 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8321 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8322 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8323 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8324 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8325 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 8326 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 8327 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]] 8328 // CHECK9-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 4 8329 // CHECK9-NEXT: ret void 8330 // 8331 // 8332 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133 8333 // CHECK9-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8334 // CHECK9-NEXT: entry: 8335 // CHECK9-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 8 8336 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8337 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 8338 // CHECK9-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 8 8339 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8340 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 8 8341 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 4 8342 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 4 8343 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 8344 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 8345 // CHECK9-NEXT: ret void 8346 // 8347 // 8348 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined 8349 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8350 // CHECK9-NEXT: entry: 8351 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8352 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8353 // CHECK9-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 8 8354 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8355 // CHECK9-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 1 8356 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8357 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8358 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8359 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8360 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8361 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8362 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8363 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_21:%.*]], align 8 8364 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8365 // CHECK9-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 8366 // CHECK9-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 8367 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8368 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8369 // CHECK9-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 8 8370 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8371 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 8 8372 // CHECK9-NEXT: store i8 1, ptr [[AND_VAR1]], align 1 8373 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8374 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8375 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8376 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8377 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8378 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8379 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8380 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8381 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 8382 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8383 // CHECK9: cond.true: 8384 // CHECK9-NEXT: br label [[COND_END:%.*]] 8385 // CHECK9: cond.false: 8386 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8387 // CHECK9-NEXT: br label [[COND_END]] 8388 // CHECK9: cond.end: 8389 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8390 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8391 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8392 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8393 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8394 // CHECK9: omp.inner.for.cond: 8395 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8396 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8397 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8398 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8399 // CHECK9: omp.inner.for.body: 8400 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8401 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8402 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8403 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8404 // CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 1 8405 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1 8406 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 8407 // CHECK9: land.rhs: 8408 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 8409 // CHECK9-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 0 8410 // CHECK9-NEXT: br label [[LAND_END]] 8411 // CHECK9: land.end: 8412 // CHECK9-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ] 8413 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i8 8414 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 1 8415 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_21]], ptr [[REF_TMP]], i32 0, i32 0 8416 // CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP12]], align 8 8417 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_3clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8418 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8419 // CHECK9: omp.body.continue: 8420 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8421 // CHECK9: omp.inner.for.inc: 8422 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8423 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 8424 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 8425 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8426 // CHECK9: omp.inner.for.end: 8427 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8428 // CHECK9: omp.loop.exit: 8429 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8430 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8431 // CHECK9-NEXT: store ptr [[AND_VAR1]], ptr [[TMP14]], align 8 8432 // CHECK9-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8433 // CHECK9-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8434 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8435 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8436 // CHECK9-NEXT: ] 8437 // CHECK9: .omp.reduction.case1: 8438 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP0]], align 1 8439 // CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP16]] to i1 8440 // CHECK9-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]] 8441 // CHECK9: land.rhs6: 8442 // CHECK9-NEXT: [[TMP17:%.*]] = load i8, ptr [[AND_VAR1]], align 1 8443 // CHECK9-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP17]] to i1 8444 // CHECK9-NEXT: br label [[LAND_END8]] 8445 // CHECK9: land.end8: 8446 // CHECK9-NEXT: [[TMP18:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ] 8447 // CHECK9-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP18]] to i8 8448 // CHECK9-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 8449 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8450 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8451 // CHECK9: .omp.reduction.case2: 8452 // CHECK9-NEXT: [[TMP19:%.*]] = load i8, ptr [[AND_VAR1]], align 1 8453 // CHECK9-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP19]] to i1 8454 // CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 8455 // CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]] 8456 // CHECK9: atomic_cont: 8457 // CHECK9-NEXT: [[TMP20:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP26:%.*]], [[LAND_END17:%.*]] ] 8458 // CHECK9-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP20]] to i1 8459 // CHECK9-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 8460 // CHECK9-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 8461 // CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[_TMP12]], align 1 8462 // CHECK9-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP21]] to i1 8463 // CHECK9-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]] 8464 // CHECK9: land.rhs15: 8465 // CHECK9-NEXT: [[TMP22:%.*]] = load i8, ptr [[AND_VAR1]], align 1 8466 // CHECK9-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP22]] to i1 8467 // CHECK9-NEXT: br label [[LAND_END17]] 8468 // CHECK9: land.end17: 8469 // CHECK9-NEXT: [[TMP23:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ] 8470 // CHECK9-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP23]] to i8 8471 // CHECK9-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 8472 // CHECK9-NEXT: [[TMP24:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 8473 // CHECK9-NEXT: [[TMP25:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP20]], i8 [[TMP24]] monotonic monotonic, align 1 8474 // CHECK9-NEXT: [[TMP26]] = extractvalue { i8, i1 } [[TMP25]], 0 8475 // CHECK9-NEXT: [[TMP27:%.*]] = extractvalue { i8, i1 } [[TMP25]], 1 8476 // CHECK9-NEXT: br i1 [[TMP27]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 8477 // CHECK9: atomic_exit: 8478 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8479 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8480 // CHECK9: .omp.reduction.default: 8481 // CHECK9-NEXT: ret void 8482 // 8483 // 8484 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined.omp.reduction.reduction_func 8485 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 8486 // CHECK9-NEXT: entry: 8487 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8488 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8489 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8490 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8491 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8492 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8493 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8494 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8495 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8496 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8497 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 8498 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 8499 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 8500 // CHECK9: land.rhs: 8501 // CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 8502 // CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 8503 // CHECK9-NEXT: br label [[LAND_END]] 8504 // CHECK9: land.end: 8505 // CHECK9-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ] 8506 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 8507 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 8508 // CHECK9-NEXT: ret void 8509 // 8510 // 8511 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144 8512 // CHECK9-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8513 // CHECK9-NEXT: entry: 8514 // CHECK9-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 8 8515 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8516 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 8517 // CHECK9-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 8 8518 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8519 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 8 8520 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 4 8521 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 4 8522 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 8523 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 8524 // CHECK9-NEXT: ret void 8525 // 8526 // 8527 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined 8528 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8529 // CHECK9-NEXT: entry: 8530 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8531 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8532 // CHECK9-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 8 8533 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8534 // CHECK9-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 1 8535 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8536 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8537 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8538 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8539 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8540 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8541 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8542 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_22:%.*]], align 8 8543 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8544 // CHECK9-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 8545 // CHECK9-NEXT: [[_TMP12:%.*]] = alloca i8, align 1 8546 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8547 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8548 // CHECK9-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 8 8549 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8550 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 8 8551 // CHECK9-NEXT: store i8 0, ptr [[OR_VAR1]], align 1 8552 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8553 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8554 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8555 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8556 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8557 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8558 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8559 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8560 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 8561 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8562 // CHECK9: cond.true: 8563 // CHECK9-NEXT: br label [[COND_END:%.*]] 8564 // CHECK9: cond.false: 8565 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8566 // CHECK9-NEXT: br label [[COND_END]] 8567 // CHECK9: cond.end: 8568 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8569 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8570 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8571 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8572 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8573 // CHECK9: omp.inner.for.cond: 8574 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8575 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8576 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8577 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8578 // CHECK9: omp.inner.for.body: 8579 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8580 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8581 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8582 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8583 // CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 1 8584 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i1 8585 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 8586 // CHECK9: lor.rhs: 8587 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 8588 // CHECK9-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 0 8589 // CHECK9-NEXT: br label [[LOR_END]] 8590 // CHECK9: lor.end: 8591 // CHECK9-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ] 8592 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i8 8593 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 1 8594 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_22]], ptr [[REF_TMP]], i32 0, i32 0 8595 // CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP12]], align 8 8596 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_4clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8597 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8598 // CHECK9: omp.body.continue: 8599 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8600 // CHECK9: omp.inner.for.inc: 8601 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8602 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 8603 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 8604 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8605 // CHECK9: omp.inner.for.end: 8606 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8607 // CHECK9: omp.loop.exit: 8608 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8609 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8610 // CHECK9-NEXT: store ptr [[OR_VAR1]], ptr [[TMP14]], align 8 8611 // CHECK9-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8612 // CHECK9-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8613 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8614 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8615 // CHECK9-NEXT: ] 8616 // CHECK9: .omp.reduction.case1: 8617 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP0]], align 1 8618 // CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP16]] to i1 8619 // CHECK9-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]] 8620 // CHECK9: lor.rhs6: 8621 // CHECK9-NEXT: [[TMP17:%.*]] = load i8, ptr [[OR_VAR1]], align 1 8622 // CHECK9-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP17]] to i1 8623 // CHECK9-NEXT: br label [[LOR_END8]] 8624 // CHECK9: lor.end8: 8625 // CHECK9-NEXT: [[TMP18:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ] 8626 // CHECK9-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP18]] to i8 8627 // CHECK9-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 1 8628 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8629 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8630 // CHECK9: .omp.reduction.case2: 8631 // CHECK9-NEXT: [[TMP19:%.*]] = load i8, ptr [[OR_VAR1]], align 1 8632 // CHECK9-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP19]] to i1 8633 // CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 1 8634 // CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]] 8635 // CHECK9: atomic_cont: 8636 // CHECK9-NEXT: [[TMP20:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP26:%.*]], [[LOR_END17:%.*]] ] 8637 // CHECK9-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP20]] to i1 8638 // CHECK9-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i8 8639 // CHECK9-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 1 8640 // CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[_TMP12]], align 1 8641 // CHECK9-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP21]] to i1 8642 // CHECK9-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]] 8643 // CHECK9: lor.rhs15: 8644 // CHECK9-NEXT: [[TMP22:%.*]] = load i8, ptr [[OR_VAR1]], align 1 8645 // CHECK9-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP22]] to i1 8646 // CHECK9-NEXT: br label [[LOR_END17]] 8647 // CHECK9: lor.end17: 8648 // CHECK9-NEXT: [[TMP23:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ] 8649 // CHECK9-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP23]] to i8 8650 // CHECK9-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 1 8651 // CHECK9-NEXT: [[TMP24:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 8652 // CHECK9-NEXT: [[TMP25:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP20]], i8 [[TMP24]] monotonic monotonic, align 1 8653 // CHECK9-NEXT: [[TMP26]] = extractvalue { i8, i1 } [[TMP25]], 0 8654 // CHECK9-NEXT: [[TMP27:%.*]] = extractvalue { i8, i1 } [[TMP25]], 1 8655 // CHECK9-NEXT: br i1 [[TMP27]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 8656 // CHECK9: atomic_exit: 8657 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8658 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8659 // CHECK9: .omp.reduction.default: 8660 // CHECK9-NEXT: ret void 8661 // 8662 // 8663 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined.omp.reduction.reduction_func 8664 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 8665 // CHECK9-NEXT: entry: 8666 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8667 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8668 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8669 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8670 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8671 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8672 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8673 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8674 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8675 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8676 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1 8677 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1 8678 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]] 8679 // CHECK9: lor.rhs: 8680 // CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 1 8681 // CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i1 8682 // CHECK9-NEXT: br label [[LOR_END]] 8683 // CHECK9: lor.end: 8684 // CHECK9-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ] 8685 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i8 8686 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 1 8687 // CHECK9-NEXT: ret void 8688 // 8689 // 8690 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 8691 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8692 // CHECK9-NEXT: entry: 8693 // CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 8694 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8695 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 8696 // CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 8697 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8698 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 8699 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 4 8700 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 4 8701 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 8702 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 8703 // CHECK9-NEXT: ret void 8704 // 8705 // 8706 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 8707 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8708 // CHECK9-NEXT: entry: 8709 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8710 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8711 // CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 8712 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8713 // CHECK9-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 8714 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8715 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8716 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8717 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8718 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8719 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8720 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8721 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_23:%.*]], align 8 8722 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8723 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8724 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8725 // CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 8726 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8727 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 8728 // CHECK9-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 4 8729 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8730 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8731 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8732 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8733 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8734 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8735 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8736 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8737 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 8738 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8739 // CHECK9: cond.true: 8740 // CHECK9-NEXT: br label [[COND_END:%.*]] 8741 // CHECK9: cond.false: 8742 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8743 // CHECK9-NEXT: br label [[COND_END]] 8744 // CHECK9: cond.end: 8745 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8746 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8747 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8748 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8749 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8750 // CHECK9: omp.inner.for.cond: 8751 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8752 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8753 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8754 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8755 // CHECK9: omp.inner.for.body: 8756 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8757 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8758 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8759 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8760 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 8761 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 8762 // CHECK9-NEXT: [[AND:%.*]] = and i32 [[TMP9]], [[TMP10]] 8763 // CHECK9-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 4 8764 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_23]], ptr [[REF_TMP]], i32 0, i32 0 8765 // CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP11]], align 8 8766 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_5clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8767 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8768 // CHECK9: omp.body.continue: 8769 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8770 // CHECK9: omp.inner.for.inc: 8771 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8772 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 8773 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 8774 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8775 // CHECK9: omp.inner.for.end: 8776 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8777 // CHECK9: omp.loop.exit: 8778 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8779 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8780 // CHECK9-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP13]], align 8 8781 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8782 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8783 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8784 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8785 // CHECK9-NEXT: ] 8786 // CHECK9: .omp.reduction.case1: 8787 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 8788 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 8789 // CHECK9-NEXT: [[AND4:%.*]] = and i32 [[TMP15]], [[TMP16]] 8790 // CHECK9-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 4 8791 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8792 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8793 // CHECK9: .omp.reduction.case2: 8794 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 8795 // CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4 8796 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8797 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8798 // CHECK9: .omp.reduction.default: 8799 // CHECK9-NEXT: ret void 8800 // 8801 // 8802 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp.reduction.reduction_func 8803 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 8804 // CHECK9-NEXT: entry: 8805 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8806 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8807 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8808 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8809 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8810 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8811 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8812 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8813 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8814 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8815 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 8816 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 8817 // CHECK9-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]] 8818 // CHECK9-NEXT: store i32 [[AND]], ptr [[TMP7]], align 4 8819 // CHECK9-NEXT: ret void 8820 // 8821 // 8822 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166 8823 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8824 // CHECK9-NEXT: entry: 8825 // CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 8826 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8827 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 8828 // CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 8829 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8830 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 8831 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 4 8832 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 4 8833 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 8834 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 8835 // CHECK9-NEXT: ret void 8836 // 8837 // 8838 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined 8839 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8840 // CHECK9-NEXT: entry: 8841 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8842 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8843 // CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 8844 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8845 // CHECK9-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 8846 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8847 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8848 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8849 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8850 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8851 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8852 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8853 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_24:%.*]], align 8 8854 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8855 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8856 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8857 // CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 8858 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8859 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 8860 // CHECK9-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 8861 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8862 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8863 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8864 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8865 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8866 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8867 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8868 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8869 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 8870 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8871 // CHECK9: cond.true: 8872 // CHECK9-NEXT: br label [[COND_END:%.*]] 8873 // CHECK9: cond.false: 8874 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8875 // CHECK9-NEXT: br label [[COND_END]] 8876 // CHECK9: cond.end: 8877 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8878 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8879 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8880 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8881 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8882 // CHECK9: omp.inner.for.cond: 8883 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8884 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8885 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8886 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8887 // CHECK9: omp.inner.for.body: 8888 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8889 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 8890 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8891 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8892 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 8893 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 8894 // CHECK9-NEXT: [[OR:%.*]] = or i32 [[TMP9]], [[TMP10]] 8895 // CHECK9-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 4 8896 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_24]], ptr [[REF_TMP]], i32 0, i32 0 8897 // CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP11]], align 8 8898 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_6clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 8899 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8900 // CHECK9: omp.body.continue: 8901 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8902 // CHECK9: omp.inner.for.inc: 8903 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8904 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 8905 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 8906 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 8907 // CHECK9: omp.inner.for.end: 8908 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8909 // CHECK9: omp.loop.exit: 8910 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8911 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 8912 // CHECK9-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP13]], align 8 8913 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 8914 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 8915 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 8916 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 8917 // CHECK9-NEXT: ] 8918 // CHECK9: .omp.reduction.case1: 8919 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 8920 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 8921 // CHECK9-NEXT: [[OR4:%.*]] = or i32 [[TMP15]], [[TMP16]] 8922 // CHECK9-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 4 8923 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8924 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8925 // CHECK9: .omp.reduction.case2: 8926 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 8927 // CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4 8928 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 8929 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 8930 // CHECK9: .omp.reduction.default: 8931 // CHECK9-NEXT: ret void 8932 // 8933 // 8934 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp.reduction.reduction_func 8935 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 8936 // CHECK9-NEXT: entry: 8937 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 8938 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 8939 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 8940 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 8941 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 8942 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 8943 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 8944 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 8945 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 8946 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 8947 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 8948 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 8949 // CHECK9-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]] 8950 // CHECK9-NEXT: store i32 [[OR]], ptr [[TMP7]], align 4 8951 // CHECK9-NEXT: ret void 8952 // 8953 // 8954 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177 8955 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8956 // CHECK9-NEXT: entry: 8957 // CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 8958 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8959 // CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 8960 // CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 8961 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8962 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 8963 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 4 8964 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 4 8965 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 8 8966 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 8967 // CHECK9-NEXT: ret void 8968 // 8969 // 8970 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined 8971 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] { 8972 // CHECK9-NEXT: entry: 8973 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8974 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8975 // CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 8 8976 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 8977 // CHECK9-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 4 8978 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8979 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8980 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8981 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8982 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8983 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8984 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8985 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_25:%.*]], align 8 8986 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 8987 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8988 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8989 // CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 8 8990 // CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 8991 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 8 8992 // CHECK9-NEXT: store i32 0, ptr [[BIT_VAR1]], align 4 8993 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8994 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 8995 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8996 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8997 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8998 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8999 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9000 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9001 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 9002 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9003 // CHECK9: cond.true: 9004 // CHECK9-NEXT: br label [[COND_END:%.*]] 9005 // CHECK9: cond.false: 9006 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9007 // CHECK9-NEXT: br label [[COND_END]] 9008 // CHECK9: cond.end: 9009 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9010 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9011 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9012 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9013 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9014 // CHECK9: omp.inner.for.cond: 9015 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9016 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9017 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9018 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9019 // CHECK9: omp.inner.for.body: 9020 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9021 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 9022 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9023 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 9024 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 9025 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 9026 // CHECK9-NEXT: [[XOR:%.*]] = xor i32 [[TMP9]], [[TMP10]] 9027 // CHECK9-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 4 9028 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_25]], ptr [[REF_TMP]], i32 0, i32 0 9029 // CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP11]], align 8 9030 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_7clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 9031 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9032 // CHECK9: omp.body.continue: 9033 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9034 // CHECK9: omp.inner.for.inc: 9035 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9036 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 9037 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 9038 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9039 // CHECK9: omp.inner.for.end: 9040 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9041 // CHECK9: omp.loop.exit: 9042 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9043 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 9044 // CHECK9-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP13]], align 8 9045 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 9046 // CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 9047 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 9048 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 9049 // CHECK9-NEXT: ] 9050 // CHECK9: .omp.reduction.case1: 9051 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 4 9052 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 9053 // CHECK9-NEXT: [[XOR4:%.*]] = xor i32 [[TMP15]], [[TMP16]] 9054 // CHECK9-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 4 9055 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 9056 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 9057 // CHECK9: .omp.reduction.case2: 9058 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 4 9059 // CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP17]] monotonic, align 4 9060 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 9061 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 9062 // CHECK9: .omp.reduction.default: 9063 // CHECK9-NEXT: ret void 9064 // 9065 // 9066 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined.omp.reduction.reduction_func 9067 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 9068 // CHECK9-NEXT: entry: 9069 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 9070 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 9071 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 9072 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 9073 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 9074 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 9075 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 9076 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 9077 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 9078 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 9079 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 9080 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 9081 // CHECK9-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]] 9082 // CHECK9-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 4 9083 // CHECK9-NEXT: ret void 9084 // 9085 // 9086 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188 9087 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[MAX_VAR:%.*]]) #[[ATTR2]] { 9088 // CHECK9-NEXT: entry: 9089 // CHECK9-NEXT: [[MAX_VAR_ADDR:%.*]] = alloca ptr, align 8 9090 // CHECK9-NEXT: store ptr [[MAX_VAR]], ptr [[MAX_VAR_ADDR]], align 8 9091 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MAX_VAR_ADDR]], align 8 9092 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined, ptr [[TMP0]]) 9093 // CHECK9-NEXT: ret void 9094 // 9095 // 9096 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined 9097 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[MAX_VAR:%.*]]) #[[ATTR2]] { 9098 // CHECK9-NEXT: entry: 9099 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 9100 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 9101 // CHECK9-NEXT: [[MAX_VAR_ADDR:%.*]] = alloca ptr, align 8 9102 // CHECK9-NEXT: [[MAX_VAR1:%.*]] = alloca i32, align 4 9103 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9104 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9105 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9106 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9107 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9108 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9109 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9110 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_26:%.*]], align 8 9111 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 9112 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 9113 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 9114 // CHECK9-NEXT: store ptr [[MAX_VAR]], ptr [[MAX_VAR_ADDR]], align 8 9115 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MAX_VAR_ADDR]], align 8 9116 // CHECK9-NEXT: store i32 -2147483648, ptr [[MAX_VAR1]], align 4 9117 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9118 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 9119 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9120 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9121 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9122 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9123 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9124 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9125 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 9126 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9127 // CHECK9: cond.true: 9128 // CHECK9-NEXT: br label [[COND_END:%.*]] 9129 // CHECK9: cond.false: 9130 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9131 // CHECK9-NEXT: br label [[COND_END]] 9132 // CHECK9: cond.end: 9133 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9134 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9135 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9136 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9137 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9138 // CHECK9: omp.inner.for.cond: 9139 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9140 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9141 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9142 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9143 // CHECK9: omp.inner.for.body: 9144 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9145 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 9146 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9147 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 9148 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[MAX_VAR1]], align 4 9149 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 9150 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP9]], [[TMP10]] 9151 // CHECK9-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 9152 // CHECK9: cond.true4: 9153 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[MAX_VAR1]], align 4 9154 // CHECK9-NEXT: br label [[COND_END6:%.*]] 9155 // CHECK9: cond.false5: 9156 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 9157 // CHECK9-NEXT: br label [[COND_END6]] 9158 // CHECK9: cond.end6: 9159 // CHECK9-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ] 9160 // CHECK9-NEXT: store i32 [[COND7]], ptr [[MAX_VAR1]], align 4 9161 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_26]], ptr [[REF_TMP]], i32 0, i32 0 9162 // CHECK9-NEXT: store ptr [[MAX_VAR1]], ptr [[TMP13]], align 8 9163 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_8clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 9164 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9165 // CHECK9: omp.body.continue: 9166 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9167 // CHECK9: omp.inner.for.inc: 9168 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9169 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP14]], 1 9170 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 9171 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9172 // CHECK9: omp.inner.for.end: 9173 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9174 // CHECK9: omp.loop.exit: 9175 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9176 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 9177 // CHECK9-NEXT: store ptr [[MAX_VAR1]], ptr [[TMP15]], align 8 9178 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 9179 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 9180 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 9181 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 9182 // CHECK9-NEXT: ] 9183 // CHECK9: .omp.reduction.case1: 9184 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP0]], align 4 9185 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[MAX_VAR1]], align 4 9186 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]] 9187 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 9188 // CHECK9: cond.true10: 9189 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 4 9190 // CHECK9-NEXT: br label [[COND_END12:%.*]] 9191 // CHECK9: cond.false11: 9192 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[MAX_VAR1]], align 4 9193 // CHECK9-NEXT: br label [[COND_END12]] 9194 // CHECK9: cond.end12: 9195 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE10]] ], [ [[TMP20]], [[COND_FALSE11]] ] 9196 // CHECK9-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 4 9197 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 9198 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 9199 // CHECK9: .omp.reduction.case2: 9200 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[MAX_VAR1]], align 4 9201 // CHECK9-NEXT: [[TMP22:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP21]] monotonic, align 4 9202 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 9203 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 9204 // CHECK9: .omp.reduction.default: 9205 // CHECK9-NEXT: ret void 9206 // 9207 // 9208 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined.omp.reduction.reduction_func 9209 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 9210 // CHECK9-NEXT: entry: 9211 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 9212 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 9213 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 9214 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 9215 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 9216 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 9217 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 9218 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 9219 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 9220 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 9221 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 9222 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 9223 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 9224 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9225 // CHECK9: cond.true: 9226 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 9227 // CHECK9-NEXT: br label [[COND_END:%.*]] 9228 // CHECK9: cond.false: 9229 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 9230 // CHECK9-NEXT: br label [[COND_END]] 9231 // CHECK9: cond.end: 9232 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 9233 // CHECK9-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 9234 // CHECK9-NEXT: ret void 9235 // 9236 // 9237 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199 9238 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[MIN_VAR:%.*]]) #[[ATTR2]] { 9239 // CHECK9-NEXT: entry: 9240 // CHECK9-NEXT: [[MIN_VAR_ADDR:%.*]] = alloca ptr, align 8 9241 // CHECK9-NEXT: store ptr [[MIN_VAR]], ptr [[MIN_VAR_ADDR]], align 8 9242 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MIN_VAR_ADDR]], align 8 9243 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined, ptr [[TMP0]]) 9244 // CHECK9-NEXT: ret void 9245 // 9246 // 9247 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined 9248 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[MIN_VAR:%.*]]) #[[ATTR2]] { 9249 // CHECK9-NEXT: entry: 9250 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 9251 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 9252 // CHECK9-NEXT: [[MIN_VAR_ADDR:%.*]] = alloca ptr, align 8 9253 // CHECK9-NEXT: [[MIN_VAR1:%.*]] = alloca i32, align 4 9254 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9255 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9256 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9257 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9258 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9259 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9260 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9261 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_27:%.*]], align 8 9262 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 9263 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 9264 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 9265 // CHECK9-NEXT: store ptr [[MIN_VAR]], ptr [[MIN_VAR_ADDR]], align 8 9266 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MIN_VAR_ADDR]], align 8 9267 // CHECK9-NEXT: store i32 2147483647, ptr [[MIN_VAR1]], align 4 9268 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9269 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 9270 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9271 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9272 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9273 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9274 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9275 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9276 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 9277 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9278 // CHECK9: cond.true: 9279 // CHECK9-NEXT: br label [[COND_END:%.*]] 9280 // CHECK9: cond.false: 9281 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9282 // CHECK9-NEXT: br label [[COND_END]] 9283 // CHECK9: cond.end: 9284 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9285 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9286 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9287 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9288 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9289 // CHECK9: omp.inner.for.cond: 9290 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9291 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9292 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9293 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9294 // CHECK9: omp.inner.for.body: 9295 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9296 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 9297 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9298 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 9299 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[MIN_VAR1]], align 4 9300 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 9301 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 9302 // CHECK9-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]] 9303 // CHECK9: cond.true4: 9304 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[MIN_VAR1]], align 4 9305 // CHECK9-NEXT: br label [[COND_END6:%.*]] 9306 // CHECK9: cond.false5: 9307 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 9308 // CHECK9-NEXT: br label [[COND_END6]] 9309 // CHECK9: cond.end6: 9310 // CHECK9-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ] 9311 // CHECK9-NEXT: store i32 [[COND7]], ptr [[MIN_VAR1]], align 4 9312 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_27]], ptr [[REF_TMP]], i32 0, i32 0 9313 // CHECK9-NEXT: store ptr [[MIN_VAR1]], ptr [[TMP13]], align 8 9314 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_9clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 9315 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9316 // CHECK9: omp.body.continue: 9317 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9318 // CHECK9: omp.inner.for.inc: 9319 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9320 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP14]], 1 9321 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 9322 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 9323 // CHECK9: omp.inner.for.end: 9324 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9325 // CHECK9: omp.loop.exit: 9326 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9327 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 9328 // CHECK9-NEXT: store ptr [[MIN_VAR1]], ptr [[TMP15]], align 8 9329 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 9330 // CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 9331 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 9332 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 9333 // CHECK9-NEXT: ] 9334 // CHECK9: .omp.reduction.case1: 9335 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP0]], align 4 9336 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[MIN_VAR1]], align 4 9337 // CHECK9-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP17]], [[TMP18]] 9338 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 9339 // CHECK9: cond.true10: 9340 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 4 9341 // CHECK9-NEXT: br label [[COND_END12:%.*]] 9342 // CHECK9: cond.false11: 9343 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[MIN_VAR1]], align 4 9344 // CHECK9-NEXT: br label [[COND_END12]] 9345 // CHECK9: cond.end12: 9346 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE10]] ], [ [[TMP20]], [[COND_FALSE11]] ] 9347 // CHECK9-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 4 9348 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 9349 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 9350 // CHECK9: .omp.reduction.case2: 9351 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[MIN_VAR1]], align 4 9352 // CHECK9-NEXT: [[TMP22:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP21]] monotonic, align 4 9353 // CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 9354 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 9355 // CHECK9: .omp.reduction.default: 9356 // CHECK9-NEXT: ret void 9357 // 9358 // 9359 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined.omp.reduction.reduction_func 9360 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 9361 // CHECK9-NEXT: entry: 9362 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 9363 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 9364 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 9365 // CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 9366 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 9367 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 9368 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 9369 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 9370 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 9371 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 9372 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 9373 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 9374 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] 9375 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9376 // CHECK9: cond.true: 9377 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 9378 // CHECK9-NEXT: br label [[COND_END:%.*]] 9379 // CHECK9: cond.false: 9380 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 4 9381 // CHECK9-NEXT: br label [[COND_END]] 9382 // CHECK9: cond.end: 9383 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 9384 // CHECK9-NEXT: store i32 [[COND]], ptr [[TMP7]], align 4 9385 // CHECK9-NEXT: ret void 9386 // 9387