1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 21 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 24 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 27 28 #ifdef CK1 29 30 template <typename T, int X, long long Y> 31 struct SS{ 32 T a[X]; 33 float b; 34 int foo(void) { 35 36 #pragma omp target teams distribute parallel for simd 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 #pragma omp target teams distribute parallel for simd schedule(static) 41 for(int i = 0; i < X; i++) { 42 a[i] = (T)0; 43 } 44 #pragma omp target teams distribute parallel for simd schedule(static, X/2) 45 for(int i = 0; i < X; i++) { 46 a[i] = (T)0; 47 } 48 49 #pragma omp target teams distribute parallel for simd schedule(dynamic) 50 for(int i = 0; i < X; i++) { 51 a[i] = (T)0; 52 } 53 54 #pragma omp target teams distribute parallel for simd schedule(dynamic, X/2) 55 for(int i = 0; i < X; i++) { 56 a[i] = (T)0; 57 } 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 return a[0]; 75 } 76 }; 77 78 int teams_template_struct(void) { 79 SS<int, 123, 456> V; 80 return V.foo(); 81 82 } 83 #endif // CK1 84 85 // Test host codegen. 86 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 87 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 88 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 89 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 90 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 91 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 92 93 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17 96 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 97 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 98 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19 99 100 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21 101 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21 103 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23 104 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK23 106 #ifdef CK2 107 108 template <typename T, int n> 109 int tmain(T argc) { 110 T a[n]; 111 int m = 10; 112 #pragma omp target teams distribute parallel for simd 113 for(int i = 0; i < n; i++) { 114 a[i] = (T)0; 115 } 116 #pragma omp target teams distribute parallel for simd schedule(static) 117 for(int i = 0; i < n; i++) { 118 a[i] = (T)0; 119 } 120 #pragma omp target teams distribute parallel for simd schedule(static, m) 121 for(int i = 0; i < n; i++) { 122 a[i] = (T)0; 123 } 124 #pragma omp target teams distribute parallel for simd schedule(dynamic) 125 for(int i = 0; i < n; i++) { 126 a[i] = (T)0; 127 } 128 #pragma omp target teams distribute parallel for simd schedule(dynamic, m) 129 for(int i = 0; i < n; i++) { 130 a[i] = (T)0; 131 } 132 return 0; 133 } 134 135 int main (int argc, char **argv) { 136 int n = 100; 137 int a[n]; 138 int m = 10; 139 #pragma omp target teams distribute parallel for simd 140 for(int i = 0; i < n; i++) { 141 a[i] = 0; 142 } 143 #pragma omp target teams distribute parallel for simd dist_schedule(static) 144 for(int i = 0; i < n; i++) { 145 a[i] = 0; 146 } 147 #pragma omp target teams distribute parallel for simd dist_schedule(static, m) 148 for(int i = 0; i < n; i++) { 149 a[i] = 0; 150 } 151 #pragma omp target teams distribute parallel for simd schedule(dynamic) 152 for(int i = 0; i < n; i++) { 153 a[i] = 0; 154 } 155 #pragma omp target teams distribute parallel for simd schedule(dynamic, m) 156 for(int i = 0; i < n; i++) { 157 a[i] = 0; 158 } 159 return tmain<int, 10>(argc); 160 } 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 #endif // CK2 196 #endif // #ifndef HEADER 197 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 198 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 199 // CHECK1-NEXT: entry: 200 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 201 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 202 // CHECK1-NEXT: ret i32 [[CALL]] 203 // 204 // 205 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 206 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 207 // CHECK1-NEXT: entry: 208 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 209 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 210 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 211 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 212 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 214 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8 215 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8 216 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8 217 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 219 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8 220 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8 221 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8 222 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 223 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 224 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8 225 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8 226 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8 227 // CHECK1-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 228 // CHECK1-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8 230 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8 231 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8 232 // CHECK1-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 234 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 235 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 236 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 237 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 238 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 239 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 240 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 241 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 242 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 243 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 244 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 245 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 246 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 247 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 248 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 249 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 250 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 251 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 252 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 253 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 254 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 255 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 256 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 257 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 258 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 259 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 260 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 261 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 262 // CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8 263 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 264 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 265 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 266 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 267 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 268 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 269 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 270 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 271 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 272 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 273 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 274 // CHECK1: omp_offload.failed: 275 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 276 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 277 // CHECK1: omp_offload.cont: 278 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 279 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 280 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8 281 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 282 // CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8 283 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 284 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 285 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 286 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 287 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 288 // CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4 289 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 290 // CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4 291 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 292 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 293 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 294 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 295 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 296 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 297 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 298 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 299 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 300 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 301 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 302 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 303 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 304 // CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8 305 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 306 // CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8 307 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 308 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 309 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 310 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 311 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 312 // CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4 313 // CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 314 // CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 315 // CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 316 // CHECK1: omp_offload.failed8: 317 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 318 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 319 // CHECK1: omp_offload.cont9: 320 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 321 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 322 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8 323 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 324 // CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8 325 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 326 // CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8 327 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 328 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 329 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 330 // CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4 331 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 332 // CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4 333 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 334 // CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 335 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 336 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 337 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 338 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 339 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 340 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 341 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 342 // CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8 343 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 344 // CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8 345 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 346 // CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8 347 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 348 // CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8 349 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 350 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 351 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 352 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 353 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 354 // CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4 355 // CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 356 // CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 357 // CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 358 // CHECK1: omp_offload.failed16: 359 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 360 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]] 361 // CHECK1: omp_offload.cont17: 362 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 363 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 364 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 8 365 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 366 // CHECK1-NEXT: store ptr [[A18]], ptr [[TMP61]], align 8 367 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0 368 // CHECK1-NEXT: store ptr null, ptr [[TMP62]], align 8 369 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 370 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 371 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 372 // CHECK1-NEXT: store i32 3, ptr [[TMP65]], align 4 373 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 374 // CHECK1-NEXT: store i32 1, ptr [[TMP66]], align 4 375 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 376 // CHECK1-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8 377 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 378 // CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8 379 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 380 // CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8 381 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 382 // CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8 383 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 384 // CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 8 385 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 386 // CHECK1-NEXT: store ptr null, ptr [[TMP72]], align 8 387 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 388 // CHECK1-NEXT: store i64 123, ptr [[TMP73]], align 8 389 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 390 // CHECK1-NEXT: store i64 0, ptr [[TMP74]], align 8 391 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 392 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 393 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 394 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 395 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 396 // CHECK1-NEXT: store i32 0, ptr [[TMP77]], align 4 397 // CHECK1-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 398 // CHECK1-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 399 // CHECK1-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 400 // CHECK1: omp_offload.failed24: 401 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 402 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT25]] 403 // CHECK1: omp_offload.cont25: 404 // CHECK1-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 405 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 406 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 8 407 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 408 // CHECK1-NEXT: store ptr [[A26]], ptr [[TMP81]], align 8 409 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0 410 // CHECK1-NEXT: store ptr null, ptr [[TMP82]], align 8 411 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 412 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 413 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 414 // CHECK1-NEXT: store i32 3, ptr [[TMP85]], align 4 415 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 416 // CHECK1-NEXT: store i32 1, ptr [[TMP86]], align 4 417 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 418 // CHECK1-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8 419 // CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 420 // CHECK1-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8 421 // CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 422 // CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8 423 // CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 424 // CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8 425 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 426 // CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 8 427 // CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 428 // CHECK1-NEXT: store ptr null, ptr [[TMP92]], align 8 429 // CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 430 // CHECK1-NEXT: store i64 123, ptr [[TMP93]], align 8 431 // CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 432 // CHECK1-NEXT: store i64 0, ptr [[TMP94]], align 8 433 // CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 434 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 435 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 436 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 437 // CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 438 // CHECK1-NEXT: store i32 0, ptr [[TMP97]], align 4 439 // CHECK1-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 440 // CHECK1-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 441 // CHECK1-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 442 // CHECK1: omp_offload.failed32: 443 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 444 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT33]] 445 // CHECK1: omp_offload.cont33: 446 // CHECK1-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 447 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0 448 // CHECK1-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 449 // CHECK1-NEXT: ret i32 [[TMP100]] 450 // 451 // 452 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 453 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 454 // CHECK1-NEXT: entry: 455 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 456 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 457 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 458 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 459 // CHECK1-NEXT: ret void 460 // 461 // 462 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 463 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 464 // CHECK1-NEXT: entry: 465 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 466 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 467 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 468 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 471 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 472 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 475 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 476 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 477 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 478 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 479 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 480 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 481 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 482 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 483 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 484 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 485 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 486 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 487 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 488 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 489 // CHECK1: cond.true: 490 // CHECK1-NEXT: br label [[COND_END:%.*]] 491 // CHECK1: cond.false: 492 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 493 // CHECK1-NEXT: br label [[COND_END]] 494 // CHECK1: cond.end: 495 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 496 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 497 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 498 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 499 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 500 // CHECK1: omp.inner.for.cond: 501 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]] 502 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]] 503 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 504 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 505 // CHECK1: omp.inner.for.body: 506 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP8]] 507 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 508 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]] 509 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 510 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP8]] 511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 512 // CHECK1: omp.inner.for.inc: 513 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 514 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP8]] 515 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 516 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 517 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 518 // CHECK1: omp.inner.for.end: 519 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 520 // CHECK1: omp.loop.exit: 521 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 522 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 523 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 524 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 525 // CHECK1: .omp.final.then: 526 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 527 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 528 // CHECK1: .omp.final.done: 529 // CHECK1-NEXT: ret void 530 // 531 // 532 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 533 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 534 // CHECK1-NEXT: entry: 535 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 536 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 537 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 538 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 539 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 540 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 541 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 542 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 543 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 544 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 545 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 546 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 547 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 548 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 549 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 550 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 551 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 552 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 553 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 554 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 555 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 556 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 557 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 558 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 559 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 560 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 561 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 562 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 563 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 564 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 565 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 566 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 567 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 568 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 569 // CHECK1: cond.true: 570 // CHECK1-NEXT: br label [[COND_END:%.*]] 571 // CHECK1: cond.false: 572 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 573 // CHECK1-NEXT: br label [[COND_END]] 574 // CHECK1: cond.end: 575 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 576 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 577 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 578 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 579 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 580 // CHECK1: omp.inner.for.cond: 581 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 582 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 583 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 584 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 585 // CHECK1: omp.inner.for.body: 586 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 587 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 588 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 589 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 590 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 591 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 592 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 593 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 594 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 595 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 596 // CHECK1: omp.body.continue: 597 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 598 // CHECK1: omp.inner.for.inc: 599 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 600 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 601 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 602 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 603 // CHECK1: omp.inner.for.end: 604 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 605 // CHECK1: omp.loop.exit: 606 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 607 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 608 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 609 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 610 // CHECK1: .omp.final.then: 611 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 612 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 613 // CHECK1: .omp.final.done: 614 // CHECK1-NEXT: ret void 615 // 616 // 617 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 618 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 619 // CHECK1-NEXT: entry: 620 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 621 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 622 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 623 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 624 // CHECK1-NEXT: ret void 625 // 626 // 627 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 628 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 629 // CHECK1-NEXT: entry: 630 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 631 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 632 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 633 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 637 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 638 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 639 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 640 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 641 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 642 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 643 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 644 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 645 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 646 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 647 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 648 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 649 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 650 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 651 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 652 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 653 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 654 // CHECK1: cond.true: 655 // CHECK1-NEXT: br label [[COND_END:%.*]] 656 // CHECK1: cond.false: 657 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 658 // CHECK1-NEXT: br label [[COND_END]] 659 // CHECK1: cond.end: 660 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 661 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 662 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 663 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 664 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 665 // CHECK1: omp.inner.for.cond: 666 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]] 667 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 668 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 669 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 670 // CHECK1: omp.inner.for.body: 671 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP17]] 672 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 673 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 674 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 675 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP17]] 676 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 677 // CHECK1: omp.inner.for.inc: 678 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 679 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP17]] 680 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 681 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 682 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 683 // CHECK1: omp.inner.for.end: 684 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 685 // CHECK1: omp.loop.exit: 686 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 687 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 688 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 689 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 690 // CHECK1: .omp.final.then: 691 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 692 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 693 // CHECK1: .omp.final.done: 694 // CHECK1-NEXT: ret void 695 // 696 // 697 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 698 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 699 // CHECK1-NEXT: entry: 700 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 701 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 702 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 703 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 704 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 705 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 706 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 707 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 708 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 709 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 710 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 711 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 712 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 713 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 714 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 715 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 716 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 717 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 718 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 719 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 720 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 721 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 722 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 723 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 724 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 725 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 726 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 727 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 728 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 729 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 730 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 731 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 732 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 733 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 734 // CHECK1: cond.true: 735 // CHECK1-NEXT: br label [[COND_END:%.*]] 736 // CHECK1: cond.false: 737 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 738 // CHECK1-NEXT: br label [[COND_END]] 739 // CHECK1: cond.end: 740 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 741 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 742 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 743 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 744 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 745 // CHECK1: omp.inner.for.cond: 746 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]] 747 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP20]] 748 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 749 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 750 // CHECK1: omp.inner.for.body: 751 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 752 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 753 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 754 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]] 755 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 756 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]] 757 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 758 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 759 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP20]] 760 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 761 // CHECK1: omp.body.continue: 762 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 763 // CHECK1: omp.inner.for.inc: 764 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 765 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 766 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 767 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 768 // CHECK1: omp.inner.for.end: 769 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 770 // CHECK1: omp.loop.exit: 771 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 772 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 773 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 774 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 775 // CHECK1: .omp.final.then: 776 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 777 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 778 // CHECK1: .omp.final.done: 779 // CHECK1-NEXT: ret void 780 // 781 // 782 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 783 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 784 // CHECK1-NEXT: entry: 785 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 786 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 787 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 788 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 789 // CHECK1-NEXT: ret void 790 // 791 // 792 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 793 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 794 // CHECK1-NEXT: entry: 795 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 796 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 797 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 798 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 799 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 800 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 801 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 802 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 803 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 804 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 805 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 806 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 807 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 808 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 809 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 810 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 811 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 812 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 813 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 814 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 815 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 816 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 817 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 818 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 819 // CHECK1: cond.true: 820 // CHECK1-NEXT: br label [[COND_END:%.*]] 821 // CHECK1: cond.false: 822 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 823 // CHECK1-NEXT: br label [[COND_END]] 824 // CHECK1: cond.end: 825 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 826 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 827 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 828 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 829 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 830 // CHECK1: omp.inner.for.cond: 831 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 832 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 833 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 834 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 835 // CHECK1: omp.inner.for.body: 836 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP23]] 837 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 838 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 839 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 840 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP23]] 841 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 842 // CHECK1: omp.inner.for.inc: 843 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 844 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP23]] 845 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 846 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 847 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 848 // CHECK1: omp.inner.for.end: 849 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 850 // CHECK1: omp.loop.exit: 851 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 852 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 853 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 854 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 855 // CHECK1: .omp.final.then: 856 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 857 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 858 // CHECK1: .omp.final.done: 859 // CHECK1-NEXT: ret void 860 // 861 // 862 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 863 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 864 // CHECK1-NEXT: entry: 865 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 866 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 867 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 868 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 869 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 870 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 871 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 872 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 873 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 874 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 875 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 876 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 877 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 878 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 879 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 880 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 881 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 882 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 883 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 884 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 885 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 886 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 887 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 888 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 889 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 890 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 891 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 892 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 893 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 894 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 895 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 896 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 897 // CHECK1: omp.dispatch.cond: 898 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 899 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 900 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 901 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 902 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 903 // CHECK1: cond.true: 904 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 905 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 906 // CHECK1-NEXT: br label [[COND_END:%.*]] 907 // CHECK1: cond.false: 908 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 909 // CHECK1-NEXT: br label [[COND_END]] 910 // CHECK1: cond.end: 911 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 912 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 913 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 914 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 915 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 916 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 917 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 918 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 919 // CHECK1: omp.dispatch.body: 920 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 921 // CHECK1: omp.inner.for.cond: 922 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]] 923 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 924 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 925 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 926 // CHECK1: omp.inner.for.body: 927 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 928 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 929 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 930 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP26]] 931 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 932 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP26]] 933 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 934 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 935 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP26]] 936 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 937 // CHECK1: omp.body.continue: 938 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 939 // CHECK1: omp.inner.for.inc: 940 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 941 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 942 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 943 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 944 // CHECK1: omp.inner.for.end: 945 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 946 // CHECK1: omp.dispatch.inc: 947 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 948 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 949 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 950 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 951 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 952 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 953 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 954 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 955 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 956 // CHECK1: omp.dispatch.end: 957 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 958 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 959 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 960 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 961 // CHECK1: .omp.final.then: 962 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 963 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 964 // CHECK1: .omp.final.done: 965 // CHECK1-NEXT: ret void 966 // 967 // 968 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 969 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 970 // CHECK1-NEXT: entry: 971 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 972 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 973 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 974 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 975 // CHECK1-NEXT: ret void 976 // 977 // 978 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 979 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 980 // CHECK1-NEXT: entry: 981 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 982 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 983 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 984 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 985 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 986 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 992 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 993 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 994 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 995 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 996 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 997 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 998 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 999 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1000 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1001 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1002 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1003 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1004 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1005 // CHECK1: cond.true: 1006 // CHECK1-NEXT: br label [[COND_END:%.*]] 1007 // CHECK1: cond.false: 1008 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1009 // CHECK1-NEXT: br label [[COND_END]] 1010 // CHECK1: cond.end: 1011 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1012 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1013 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1014 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1016 // CHECK1: omp.inner.for.cond: 1017 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]] 1018 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 1019 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1020 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1021 // CHECK1: omp.inner.for.body: 1022 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 1023 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1024 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 1025 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1026 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP29]] 1027 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1028 // CHECK1: omp.inner.for.inc: 1029 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 1030 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 1031 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1032 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 1033 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 1034 // CHECK1: omp.inner.for.end: 1035 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1036 // CHECK1: omp.loop.exit: 1037 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1038 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1039 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1040 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1041 // CHECK1: .omp.final.then: 1042 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 1043 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1044 // CHECK1: .omp.final.done: 1045 // CHECK1-NEXT: ret void 1046 // 1047 // 1048 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 1049 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1050 // CHECK1-NEXT: entry: 1051 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1052 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1053 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1054 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1055 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1056 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1057 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1058 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1059 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1060 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1061 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1062 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1063 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1064 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1065 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1066 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1067 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1068 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1069 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1070 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1071 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1072 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1073 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1074 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1075 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1076 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1077 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1078 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1079 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1080 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1081 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1082 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1083 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 1084 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1085 // CHECK1: omp.dispatch.cond: 1086 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 1087 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1088 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1089 // CHECK1: omp.dispatch.body: 1090 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1091 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1092 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1093 // CHECK1: omp.inner.for.cond: 1094 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]] 1095 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 1096 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1097 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1098 // CHECK1: omp.inner.for.body: 1099 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 1100 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1101 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1102 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP32]] 1103 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1104 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP32]] 1105 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1106 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 1107 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP32]] 1108 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1109 // CHECK1: omp.body.continue: 1110 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1111 // CHECK1: omp.inner.for.inc: 1112 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 1113 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1114 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 1115 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 1116 // CHECK1: omp.inner.for.end: 1117 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1118 // CHECK1: omp.dispatch.inc: 1119 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1120 // CHECK1: omp.dispatch.end: 1121 // CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 1122 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1123 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1124 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1125 // CHECK1: .omp.final.then: 1126 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 1127 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1128 // CHECK1: .omp.final.done: 1129 // CHECK1-NEXT: ret void 1130 // 1131 // 1132 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 1133 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1134 // CHECK1-NEXT: entry: 1135 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1136 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1137 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1138 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 1139 // CHECK1-NEXT: ret void 1140 // 1141 // 1142 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 1143 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1144 // CHECK1-NEXT: entry: 1145 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1146 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1147 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1148 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1149 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1150 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1151 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1152 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1153 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1154 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1155 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1156 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1157 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1158 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1159 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1160 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1161 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1162 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1163 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1164 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1165 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1166 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1167 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1168 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1169 // CHECK1: cond.true: 1170 // CHECK1-NEXT: br label [[COND_END:%.*]] 1171 // CHECK1: cond.false: 1172 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1173 // CHECK1-NEXT: br label [[COND_END]] 1174 // CHECK1: cond.end: 1175 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1176 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1177 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1178 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1179 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1180 // CHECK1: omp.inner.for.cond: 1181 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]] 1182 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 1183 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1184 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1185 // CHECK1: omp.inner.for.body: 1186 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]] 1187 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1188 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 1189 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1190 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP35]] 1191 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1192 // CHECK1: omp.inner.for.inc: 1193 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 1194 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]] 1195 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1196 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 1197 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] 1198 // CHECK1: omp.inner.for.end: 1199 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1200 // CHECK1: omp.loop.exit: 1201 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1202 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1203 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1204 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1205 // CHECK1: .omp.final.then: 1206 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 1207 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1208 // CHECK1: .omp.final.done: 1209 // CHECK1-NEXT: ret void 1210 // 1211 // 1212 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 1213 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1214 // CHECK1-NEXT: entry: 1215 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1216 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1217 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1218 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1219 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1220 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1221 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1222 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1223 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1224 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1225 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1226 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1227 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1228 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1229 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1230 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1231 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1232 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1233 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1234 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1235 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1236 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1237 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1238 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1239 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1240 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1241 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1242 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1243 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1244 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1245 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1246 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1247 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1248 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1249 // CHECK1: omp.dispatch.cond: 1250 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 1251 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1252 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1253 // CHECK1: omp.dispatch.body: 1254 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1255 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1256 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1257 // CHECK1: omp.inner.for.cond: 1258 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 1259 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 1260 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1261 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1262 // CHECK1: omp.inner.for.body: 1263 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 1264 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1265 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1266 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP38]] 1267 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1268 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP38]] 1269 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1270 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 1271 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP38]] 1272 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1273 // CHECK1: omp.body.continue: 1274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1275 // CHECK1: omp.inner.for.inc: 1276 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 1277 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1278 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 1279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 1280 // CHECK1: omp.inner.for.end: 1281 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1282 // CHECK1: omp.dispatch.inc: 1283 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1284 // CHECK1: omp.dispatch.end: 1285 // CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 1286 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1287 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1288 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1289 // CHECK1: .omp.final.then: 1290 // CHECK1-NEXT: store i32 123, ptr [[I]], align 4 1291 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1292 // CHECK1: .omp.final.done: 1293 // CHECK1-NEXT: ret void 1294 // 1295 // 1296 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1297 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1298 // CHECK3-NEXT: entry: 1299 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1300 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 1301 // CHECK3-NEXT: ret i32 [[CALL]] 1302 // 1303 // 1304 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1305 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1306 // CHECK3-NEXT: entry: 1307 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1308 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1309 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1310 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1311 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1312 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1313 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4 1314 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4 1315 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4 1316 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1317 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1318 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4 1319 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4 1320 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4 1321 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 1322 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1323 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4 1324 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4 1325 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4 1326 // CHECK3-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 1327 // CHECK3-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1328 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4 1329 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4 1330 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4 1331 // CHECK3-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 1332 // CHECK3-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1333 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1334 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1335 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1336 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1337 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 1338 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1339 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 1340 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1341 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 1342 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1343 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1344 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1345 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 1346 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1347 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 1348 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1349 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 1350 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1351 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1352 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1353 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 1354 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1355 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 1356 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1357 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 1358 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1359 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 1360 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1361 // CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 8 1362 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1363 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 1364 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1365 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1366 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1367 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1368 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1369 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 1370 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 1371 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1372 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1373 // CHECK3: omp_offload.failed: 1374 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 1375 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1376 // CHECK3: omp_offload.cont: 1377 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1378 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1379 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4 1380 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1381 // CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4 1382 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 1383 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4 1384 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1385 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1386 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 1387 // CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 4 1388 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 1389 // CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4 1390 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 1391 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 1392 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 1393 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 1394 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 1395 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 1396 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 1397 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 1398 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 1399 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 1400 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 1401 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4 1402 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 1403 // CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 8 1404 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 1405 // CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8 1406 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 1407 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 1408 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 1409 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 1410 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 1411 // CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4 1412 // CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 1413 // CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 1414 // CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 1415 // CHECK3: omp_offload.failed8: 1416 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 1417 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]] 1418 // CHECK3: omp_offload.cont9: 1419 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1420 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 1421 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4 1422 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 1423 // CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4 1424 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 1425 // CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4 1426 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 1427 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 1428 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 1429 // CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 4 1430 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 1431 // CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4 1432 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 1433 // CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 1434 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 1435 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 1436 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 1437 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 1438 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 1439 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 1440 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 1441 // CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4 1442 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 1443 // CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4 1444 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 1445 // CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 8 1446 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 1447 // CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8 1448 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 1449 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 1450 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 1451 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 1452 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 1453 // CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4 1454 // CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 1455 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 1456 // CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1457 // CHECK3: omp_offload.failed16: 1458 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 1459 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1460 // CHECK3: omp_offload.cont17: 1461 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1462 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1463 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 4 1464 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1465 // CHECK3-NEXT: store ptr [[A18]], ptr [[TMP61]], align 4 1466 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 1467 // CHECK3-NEXT: store ptr null, ptr [[TMP62]], align 4 1468 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1469 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1470 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 1471 // CHECK3-NEXT: store i32 3, ptr [[TMP65]], align 4 1472 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 1473 // CHECK3-NEXT: store i32 1, ptr [[TMP66]], align 4 1474 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 1475 // CHECK3-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 4 1476 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 1477 // CHECK3-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 4 1478 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 1479 // CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 4 1480 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 1481 // CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4 1482 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 1483 // CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 4 1484 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 1485 // CHECK3-NEXT: store ptr null, ptr [[TMP72]], align 4 1486 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 1487 // CHECK3-NEXT: store i64 123, ptr [[TMP73]], align 8 1488 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 1489 // CHECK3-NEXT: store i64 0, ptr [[TMP74]], align 8 1490 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 1491 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 1492 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 1493 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 1494 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 1495 // CHECK3-NEXT: store i32 0, ptr [[TMP77]], align 4 1496 // CHECK3-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 1497 // CHECK3-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 1498 // CHECK3-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 1499 // CHECK3: omp_offload.failed24: 1500 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 1501 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT25]] 1502 // CHECK3: omp_offload.cont25: 1503 // CHECK3-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1504 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 1505 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 4 1506 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 1507 // CHECK3-NEXT: store ptr [[A26]], ptr [[TMP81]], align 4 1508 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0 1509 // CHECK3-NEXT: store ptr null, ptr [[TMP82]], align 4 1510 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 1511 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 1512 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 1513 // CHECK3-NEXT: store i32 3, ptr [[TMP85]], align 4 1514 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 1515 // CHECK3-NEXT: store i32 1, ptr [[TMP86]], align 4 1516 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 1517 // CHECK3-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 4 1518 // CHECK3-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 1519 // CHECK3-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 4 1520 // CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 1521 // CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 4 1522 // CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 1523 // CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4 1524 // CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 1525 // CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 4 1526 // CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 1527 // CHECK3-NEXT: store ptr null, ptr [[TMP92]], align 4 1528 // CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 1529 // CHECK3-NEXT: store i64 123, ptr [[TMP93]], align 8 1530 // CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 1531 // CHECK3-NEXT: store i64 0, ptr [[TMP94]], align 8 1532 // CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 1533 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 1534 // CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 1535 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 1536 // CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 1537 // CHECK3-NEXT: store i32 0, ptr [[TMP97]], align 4 1538 // CHECK3-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 1539 // CHECK3-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 1540 // CHECK3-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 1541 // CHECK3: omp_offload.failed32: 1542 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 1543 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT33]] 1544 // CHECK3: omp_offload.cont33: 1545 // CHECK3-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1546 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0 1547 // CHECK3-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 1548 // CHECK3-NEXT: ret i32 [[TMP100]] 1549 // 1550 // 1551 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 1552 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1553 // CHECK3-NEXT: entry: 1554 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1555 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1556 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1557 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 1558 // CHECK3-NEXT: ret void 1559 // 1560 // 1561 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 1562 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1563 // CHECK3-NEXT: entry: 1564 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1565 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1566 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1567 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1568 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1569 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1570 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1571 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1572 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1573 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1574 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1575 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1576 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1577 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1578 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1579 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1580 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1581 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1582 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1583 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1584 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1585 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1586 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1587 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1588 // CHECK3: cond.true: 1589 // CHECK3-NEXT: br label [[COND_END:%.*]] 1590 // CHECK3: cond.false: 1591 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1592 // CHECK3-NEXT: br label [[COND_END]] 1593 // CHECK3: cond.end: 1594 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1595 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1596 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1597 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1598 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1599 // CHECK3: omp.inner.for.cond: 1600 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 1601 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 1602 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1603 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1604 // CHECK3: omp.inner.for.body: 1605 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 1606 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 1607 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP9]] 1608 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1609 // CHECK3: omp.inner.for.inc: 1610 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1611 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 1612 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1613 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1614 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1615 // CHECK3: omp.inner.for.end: 1616 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1617 // CHECK3: omp.loop.exit: 1618 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1619 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1620 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1621 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1622 // CHECK3: .omp.final.then: 1623 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1624 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1625 // CHECK3: .omp.final.done: 1626 // CHECK3-NEXT: ret void 1627 // 1628 // 1629 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 1630 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1631 // CHECK3-NEXT: entry: 1632 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1633 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1634 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1635 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1636 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1637 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1638 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1639 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1640 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1641 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1642 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1643 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1644 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1645 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1646 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1647 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1648 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1649 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1650 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1651 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1652 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1653 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1654 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1655 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1656 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1657 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1658 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1659 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1660 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1661 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1662 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1663 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1664 // CHECK3: cond.true: 1665 // CHECK3-NEXT: br label [[COND_END:%.*]] 1666 // CHECK3: cond.false: 1667 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1668 // CHECK3-NEXT: br label [[COND_END]] 1669 // CHECK3: cond.end: 1670 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1671 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1672 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1673 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1674 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1675 // CHECK3: omp.inner.for.cond: 1676 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 1677 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 1678 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1679 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1680 // CHECK3: omp.inner.for.body: 1681 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1682 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1683 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1684 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 1685 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1686 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 1687 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1688 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 1689 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1690 // CHECK3: omp.body.continue: 1691 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1692 // CHECK3: omp.inner.for.inc: 1693 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1694 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1695 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1696 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1697 // CHECK3: omp.inner.for.end: 1698 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1699 // CHECK3: omp.loop.exit: 1700 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1701 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1702 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1703 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1704 // CHECK3: .omp.final.then: 1705 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1706 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1707 // CHECK3: .omp.final.done: 1708 // CHECK3-NEXT: ret void 1709 // 1710 // 1711 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 1712 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1713 // CHECK3-NEXT: entry: 1714 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1715 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1716 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1717 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 1718 // CHECK3-NEXT: ret void 1719 // 1720 // 1721 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 1722 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1723 // CHECK3-NEXT: entry: 1724 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1725 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1726 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1727 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1728 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1729 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1730 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1731 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1732 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1733 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1734 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1735 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1736 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1737 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1738 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1739 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1740 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1741 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1742 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1743 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1744 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1745 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1746 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1747 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1748 // CHECK3: cond.true: 1749 // CHECK3-NEXT: br label [[COND_END:%.*]] 1750 // CHECK3: cond.false: 1751 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1752 // CHECK3-NEXT: br label [[COND_END]] 1753 // CHECK3: cond.end: 1754 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1755 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1756 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1757 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1758 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1759 // CHECK3: omp.inner.for.cond: 1760 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 1761 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 1762 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1763 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1764 // CHECK3: omp.inner.for.body: 1765 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]] 1766 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 1767 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP18]] 1768 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1769 // CHECK3: omp.inner.for.inc: 1770 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1771 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]] 1772 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1773 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1774 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 1775 // CHECK3: omp.inner.for.end: 1776 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1777 // CHECK3: omp.loop.exit: 1778 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1779 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1780 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1781 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1782 // CHECK3: .omp.final.then: 1783 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1784 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1785 // CHECK3: .omp.final.done: 1786 // CHECK3-NEXT: ret void 1787 // 1788 // 1789 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 1790 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1791 // CHECK3-NEXT: entry: 1792 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1793 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1794 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1795 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1796 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1797 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1798 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1799 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1800 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1801 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1802 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1803 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1804 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1805 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1806 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1807 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1808 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1809 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1810 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1811 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1812 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1813 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1814 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1815 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1816 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1817 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1818 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1819 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1820 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1821 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1822 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1823 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1824 // CHECK3: cond.true: 1825 // CHECK3-NEXT: br label [[COND_END:%.*]] 1826 // CHECK3: cond.false: 1827 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1828 // CHECK3-NEXT: br label [[COND_END]] 1829 // CHECK3: cond.end: 1830 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1831 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1832 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1833 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1834 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1835 // CHECK3: omp.inner.for.cond: 1836 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 1837 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 1838 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1839 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1840 // CHECK3: omp.inner.for.body: 1841 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 1842 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1843 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1844 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 1845 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1846 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 1847 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1848 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]] 1849 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1850 // CHECK3: omp.body.continue: 1851 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1852 // CHECK3: omp.inner.for.inc: 1853 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 1854 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1855 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 1856 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 1857 // CHECK3: omp.inner.for.end: 1858 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1859 // CHECK3: omp.loop.exit: 1860 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1861 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1862 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1863 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1864 // CHECK3: .omp.final.then: 1865 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1866 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1867 // CHECK3: .omp.final.done: 1868 // CHECK3-NEXT: ret void 1869 // 1870 // 1871 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 1872 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1873 // CHECK3-NEXT: entry: 1874 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1875 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1876 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1877 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 1878 // CHECK3-NEXT: ret void 1879 // 1880 // 1881 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 1882 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1883 // CHECK3-NEXT: entry: 1884 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1885 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1886 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1887 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1888 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1889 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1890 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1891 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1892 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1893 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1894 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1895 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1896 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1897 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1898 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1899 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1900 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1901 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1902 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1903 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1904 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1905 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1906 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1907 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1908 // CHECK3: cond.true: 1909 // CHECK3-NEXT: br label [[COND_END:%.*]] 1910 // CHECK3: cond.false: 1911 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1912 // CHECK3-NEXT: br label [[COND_END]] 1913 // CHECK3: cond.end: 1914 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1915 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1916 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1917 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1918 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1919 // CHECK3: omp.inner.for.cond: 1920 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 1921 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 1922 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1923 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1924 // CHECK3: omp.inner.for.body: 1925 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 1926 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 1927 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP24]] 1928 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1929 // CHECK3: omp.inner.for.inc: 1930 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 1931 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 1932 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1933 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 1934 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 1935 // CHECK3: omp.inner.for.end: 1936 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1937 // CHECK3: omp.loop.exit: 1938 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1939 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1940 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 1941 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1942 // CHECK3: .omp.final.then: 1943 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 1944 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1945 // CHECK3: .omp.final.done: 1946 // CHECK3-NEXT: ret void 1947 // 1948 // 1949 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 1950 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1951 // CHECK3-NEXT: entry: 1952 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1953 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1954 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1955 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1956 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1957 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1958 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1959 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1960 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1961 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1962 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1963 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1964 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1965 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1966 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1967 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1968 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1969 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1970 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1971 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1972 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1973 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1974 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1975 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1976 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1977 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1978 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1979 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1980 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 1981 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1982 // CHECK3: omp.dispatch.cond: 1983 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1984 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1985 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 1986 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1987 // CHECK3: cond.true: 1988 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1989 // CHECK3-NEXT: br label [[COND_END:%.*]] 1990 // CHECK3: cond.false: 1991 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1992 // CHECK3-NEXT: br label [[COND_END]] 1993 // CHECK3: cond.end: 1994 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1995 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1996 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1997 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 1998 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1999 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2000 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2001 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2002 // CHECK3: omp.dispatch.body: 2003 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2004 // CHECK3: omp.inner.for.cond: 2005 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 2006 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 2007 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2008 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2009 // CHECK3: omp.inner.for.body: 2010 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2011 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 2012 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2013 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 2014 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2015 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 2016 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]] 2017 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]] 2018 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2019 // CHECK3: omp.body.continue: 2020 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2021 // CHECK3: omp.inner.for.inc: 2022 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2023 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 2024 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 2025 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2026 // CHECK3: omp.inner.for.end: 2027 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2028 // CHECK3: omp.dispatch.inc: 2029 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2030 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2031 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2032 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 2033 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2034 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2035 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2036 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 2037 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2038 // CHECK3: omp.dispatch.end: 2039 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 2040 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2041 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 2042 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2043 // CHECK3: .omp.final.then: 2044 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 2045 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2046 // CHECK3: .omp.final.done: 2047 // CHECK3-NEXT: ret void 2048 // 2049 // 2050 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 2051 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2052 // CHECK3-NEXT: entry: 2053 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2054 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2055 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2056 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 2057 // CHECK3-NEXT: ret void 2058 // 2059 // 2060 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 2061 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2062 // CHECK3-NEXT: entry: 2063 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2064 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2065 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2066 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2067 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2068 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2069 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2070 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2071 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2072 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2073 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2074 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2075 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2076 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2077 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2078 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2079 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2080 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2081 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2082 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2083 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2084 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2085 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2086 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2087 // CHECK3: cond.true: 2088 // CHECK3-NEXT: br label [[COND_END:%.*]] 2089 // CHECK3: cond.false: 2090 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2091 // CHECK3-NEXT: br label [[COND_END]] 2092 // CHECK3: cond.end: 2093 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2094 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2095 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2096 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2097 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2098 // CHECK3: omp.inner.for.cond: 2099 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 2100 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 2101 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2102 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2103 // CHECK3: omp.inner.for.body: 2104 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]] 2105 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 2106 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP30]] 2107 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2108 // CHECK3: omp.inner.for.inc: 2109 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 2110 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]] 2111 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2112 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 2113 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 2114 // CHECK3: omp.inner.for.end: 2115 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2116 // CHECK3: omp.loop.exit: 2117 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2118 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2119 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 2120 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2121 // CHECK3: .omp.final.then: 2122 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 2123 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2124 // CHECK3: .omp.final.done: 2125 // CHECK3-NEXT: ret void 2126 // 2127 // 2128 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 2129 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2130 // CHECK3-NEXT: entry: 2131 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2132 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2133 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2134 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2135 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2136 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2137 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2138 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2139 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2140 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2141 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2142 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2143 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2144 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2145 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2146 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2147 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2148 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2149 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2150 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2151 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2152 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2153 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 2154 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 2155 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2156 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2157 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2158 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2159 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2160 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2161 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 2162 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2163 // CHECK3: omp.dispatch.cond: 2164 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 2165 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2166 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2167 // CHECK3: omp.dispatch.body: 2168 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2169 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 2170 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2171 // CHECK3: omp.inner.for.cond: 2172 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 2173 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 2174 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2175 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2176 // CHECK3: omp.inner.for.body: 2177 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 2178 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2179 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2180 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 2181 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2182 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 2183 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 2184 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP33]] 2185 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2186 // CHECK3: omp.body.continue: 2187 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2188 // CHECK3: omp.inner.for.inc: 2189 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 2190 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2191 // CHECK3-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 2192 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] 2193 // CHECK3: omp.inner.for.end: 2194 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2195 // CHECK3: omp.dispatch.inc: 2196 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2197 // CHECK3: omp.dispatch.end: 2198 // CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 2199 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2200 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2201 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2202 // CHECK3: .omp.final.then: 2203 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 2204 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2205 // CHECK3: .omp.final.done: 2206 // CHECK3-NEXT: ret void 2207 // 2208 // 2209 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 2210 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2211 // CHECK3-NEXT: entry: 2212 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2213 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2214 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2215 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 2216 // CHECK3-NEXT: ret void 2217 // 2218 // 2219 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 2220 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2221 // CHECK3-NEXT: entry: 2222 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2223 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2224 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2225 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2226 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2227 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2228 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2229 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2230 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2231 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2232 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2233 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2234 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2235 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2236 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2237 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2238 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2239 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2240 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2241 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2242 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2243 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2244 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2245 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2246 // CHECK3: cond.true: 2247 // CHECK3-NEXT: br label [[COND_END:%.*]] 2248 // CHECK3: cond.false: 2249 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2250 // CHECK3-NEXT: br label [[COND_END]] 2251 // CHECK3: cond.end: 2252 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2253 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2254 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2255 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2256 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2257 // CHECK3: omp.inner.for.cond: 2258 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 2259 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 2260 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2261 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2262 // CHECK3: omp.inner.for.body: 2263 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]] 2264 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 2265 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP36]] 2266 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2267 // CHECK3: omp.inner.for.inc: 2268 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 2269 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]] 2270 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2271 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 2272 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] 2273 // CHECK3: omp.inner.for.end: 2274 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2275 // CHECK3: omp.loop.exit: 2276 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2277 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2278 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 2279 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2280 // CHECK3: .omp.final.then: 2281 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 2282 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2283 // CHECK3: .omp.final.done: 2284 // CHECK3-NEXT: ret void 2285 // 2286 // 2287 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 2288 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2289 // CHECK3-NEXT: entry: 2290 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2291 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2292 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2293 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2294 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2295 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2296 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2297 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2298 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2299 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2300 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2301 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2302 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2303 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2304 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2305 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2306 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2307 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2308 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2309 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2310 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2311 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2312 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 2313 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 2314 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2315 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2316 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2317 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2318 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2319 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2320 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 2321 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2322 // CHECK3: omp.dispatch.cond: 2323 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 2324 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2325 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2326 // CHECK3: omp.dispatch.body: 2327 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2328 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 2329 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2330 // CHECK3: omp.inner.for.cond: 2331 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 2332 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 2333 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2334 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2335 // CHECK3: omp.inner.for.body: 2336 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 2337 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2338 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2339 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 2340 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2341 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 2342 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 2343 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP39]] 2344 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2345 // CHECK3: omp.body.continue: 2346 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2347 // CHECK3: omp.inner.for.inc: 2348 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 2349 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2350 // CHECK3-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 2351 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] 2352 // CHECK3: omp.inner.for.end: 2353 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2354 // CHECK3: omp.dispatch.inc: 2355 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2356 // CHECK3: omp.dispatch.end: 2357 // CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 2358 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2359 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2360 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2361 // CHECK3: .omp.final.then: 2362 // CHECK3-NEXT: store i32 123, ptr [[I]], align 4 2363 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2364 // CHECK3: .omp.final.done: 2365 // CHECK3-NEXT: ret void 2366 // 2367 // 2368 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2369 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 2370 // CHECK5-NEXT: entry: 2371 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2372 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 2373 // CHECK5-NEXT: ret i32 [[CALL]] 2374 // 2375 // 2376 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2377 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 2378 // CHECK5-NEXT: entry: 2379 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2380 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 2381 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 2382 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 2383 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2384 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2385 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8 2386 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8 2387 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8 2388 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2389 // CHECK5-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2390 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8 2391 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8 2392 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8 2393 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 2394 // CHECK5-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2395 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8 2396 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8 2397 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8 2398 // CHECK5-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 2399 // CHECK5-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2400 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8 2401 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8 2402 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8 2403 // CHECK5-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 2404 // CHECK5-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2405 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2406 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2407 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 2408 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2409 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 2410 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2411 // CHECK5-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 2412 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2413 // CHECK5-NEXT: store ptr null, ptr [[TMP2]], align 8 2414 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2415 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2416 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2417 // CHECK5-NEXT: store i32 3, ptr [[TMP5]], align 4 2418 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2419 // CHECK5-NEXT: store i32 1, ptr [[TMP6]], align 4 2420 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2421 // CHECK5-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 2422 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2423 // CHECK5-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 2424 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2425 // CHECK5-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 2426 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2427 // CHECK5-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 2428 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2429 // CHECK5-NEXT: store ptr null, ptr [[TMP11]], align 8 2430 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2431 // CHECK5-NEXT: store ptr null, ptr [[TMP12]], align 8 2432 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2433 // CHECK5-NEXT: store i64 123, ptr [[TMP13]], align 8 2434 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2435 // CHECK5-NEXT: store i64 0, ptr [[TMP14]], align 8 2436 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2437 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 2438 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2439 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 2440 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2441 // CHECK5-NEXT: store i32 0, ptr [[TMP17]], align 4 2442 // CHECK5-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 2443 // CHECK5-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 2444 // CHECK5-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2445 // CHECK5: omp_offload.failed: 2446 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 2447 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2448 // CHECK5: omp_offload.cont: 2449 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2450 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2451 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8 2452 // CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2453 // CHECK5-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8 2454 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 2455 // CHECK5-NEXT: store ptr null, ptr [[TMP22]], align 8 2456 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2457 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2458 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 2459 // CHECK5-NEXT: store i32 3, ptr [[TMP25]], align 4 2460 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 2461 // CHECK5-NEXT: store i32 1, ptr [[TMP26]], align 4 2462 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 2463 // CHECK5-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 2464 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 2465 // CHECK5-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 2466 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 2467 // CHECK5-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 2468 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 2469 // CHECK5-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 2470 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 2471 // CHECK5-NEXT: store ptr null, ptr [[TMP31]], align 8 2472 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 2473 // CHECK5-NEXT: store ptr null, ptr [[TMP32]], align 8 2474 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 2475 // CHECK5-NEXT: store i64 123, ptr [[TMP33]], align 8 2476 // CHECK5-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 2477 // CHECK5-NEXT: store i64 0, ptr [[TMP34]], align 8 2478 // CHECK5-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 2479 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 2480 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 2481 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 2482 // CHECK5-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 2483 // CHECK5-NEXT: store i32 0, ptr [[TMP37]], align 4 2484 // CHECK5-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 2485 // CHECK5-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 2486 // CHECK5-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 2487 // CHECK5: omp_offload.failed8: 2488 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 2489 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT9]] 2490 // CHECK5: omp_offload.cont9: 2491 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2492 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 2493 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8 2494 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 2495 // CHECK5-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8 2496 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 2497 // CHECK5-NEXT: store ptr null, ptr [[TMP42]], align 8 2498 // CHECK5-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 2499 // CHECK5-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 2500 // CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 2501 // CHECK5-NEXT: store i32 3, ptr [[TMP45]], align 4 2502 // CHECK5-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 2503 // CHECK5-NEXT: store i32 1, ptr [[TMP46]], align 4 2504 // CHECK5-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 2505 // CHECK5-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 2506 // CHECK5-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 2507 // CHECK5-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 2508 // CHECK5-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 2509 // CHECK5-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 2510 // CHECK5-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 2511 // CHECK5-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 2512 // CHECK5-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 2513 // CHECK5-NEXT: store ptr null, ptr [[TMP51]], align 8 2514 // CHECK5-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 2515 // CHECK5-NEXT: store ptr null, ptr [[TMP52]], align 8 2516 // CHECK5-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 2517 // CHECK5-NEXT: store i64 123, ptr [[TMP53]], align 8 2518 // CHECK5-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 2519 // CHECK5-NEXT: store i64 0, ptr [[TMP54]], align 8 2520 // CHECK5-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 2521 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 2522 // CHECK5-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 2523 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 2524 // CHECK5-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 2525 // CHECK5-NEXT: store i32 0, ptr [[TMP57]], align 4 2526 // CHECK5-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 2527 // CHECK5-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 2528 // CHECK5-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2529 // CHECK5: omp_offload.failed16: 2530 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 2531 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2532 // CHECK5: omp_offload.cont17: 2533 // CHECK5-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2534 // CHECK5-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2535 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 8 2536 // CHECK5-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2537 // CHECK5-NEXT: store ptr [[A18]], ptr [[TMP61]], align 8 2538 // CHECK5-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0 2539 // CHECK5-NEXT: store ptr null, ptr [[TMP62]], align 8 2540 // CHECK5-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2541 // CHECK5-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2542 // CHECK5-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 2543 // CHECK5-NEXT: store i32 3, ptr [[TMP65]], align 4 2544 // CHECK5-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 2545 // CHECK5-NEXT: store i32 1, ptr [[TMP66]], align 4 2546 // CHECK5-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 2547 // CHECK5-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8 2548 // CHECK5-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 2549 // CHECK5-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8 2550 // CHECK5-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 2551 // CHECK5-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8 2552 // CHECK5-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 2553 // CHECK5-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8 2554 // CHECK5-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 2555 // CHECK5-NEXT: store ptr null, ptr [[TMP71]], align 8 2556 // CHECK5-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 2557 // CHECK5-NEXT: store ptr null, ptr [[TMP72]], align 8 2558 // CHECK5-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 2559 // CHECK5-NEXT: store i64 123, ptr [[TMP73]], align 8 2560 // CHECK5-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 2561 // CHECK5-NEXT: store i64 0, ptr [[TMP74]], align 8 2562 // CHECK5-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 2563 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 2564 // CHECK5-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 2565 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 2566 // CHECK5-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 2567 // CHECK5-NEXT: store i32 0, ptr [[TMP77]], align 4 2568 // CHECK5-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 2569 // CHECK5-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 2570 // CHECK5-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 2571 // CHECK5: omp_offload.failed24: 2572 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 2573 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT25]] 2574 // CHECK5: omp_offload.cont25: 2575 // CHECK5-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2576 // CHECK5-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 2577 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 8 2578 // CHECK5-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 2579 // CHECK5-NEXT: store ptr [[A26]], ptr [[TMP81]], align 8 2580 // CHECK5-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0 2581 // CHECK5-NEXT: store ptr null, ptr [[TMP82]], align 8 2582 // CHECK5-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 2583 // CHECK5-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 2584 // CHECK5-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 2585 // CHECK5-NEXT: store i32 3, ptr [[TMP85]], align 4 2586 // CHECK5-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 2587 // CHECK5-NEXT: store i32 1, ptr [[TMP86]], align 4 2588 // CHECK5-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 2589 // CHECK5-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8 2590 // CHECK5-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 2591 // CHECK5-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8 2592 // CHECK5-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 2593 // CHECK5-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8 2594 // CHECK5-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 2595 // CHECK5-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8 2596 // CHECK5-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 2597 // CHECK5-NEXT: store ptr null, ptr [[TMP91]], align 8 2598 // CHECK5-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 2599 // CHECK5-NEXT: store ptr null, ptr [[TMP92]], align 8 2600 // CHECK5-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 2601 // CHECK5-NEXT: store i64 123, ptr [[TMP93]], align 8 2602 // CHECK5-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 2603 // CHECK5-NEXT: store i64 0, ptr [[TMP94]], align 8 2604 // CHECK5-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 2605 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 2606 // CHECK5-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 2607 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 2608 // CHECK5-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 2609 // CHECK5-NEXT: store i32 0, ptr [[TMP97]], align 4 2610 // CHECK5-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 2611 // CHECK5-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 2612 // CHECK5-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 2613 // CHECK5: omp_offload.failed32: 2614 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 2615 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT33]] 2616 // CHECK5: omp_offload.cont33: 2617 // CHECK5-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2618 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0 2619 // CHECK5-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2620 // CHECK5-NEXT: ret i32 [[TMP100]] 2621 // 2622 // 2623 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 2624 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2625 // CHECK5-NEXT: entry: 2626 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2627 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2628 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2629 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 2630 // CHECK5-NEXT: ret void 2631 // 2632 // 2633 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 2634 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2635 // CHECK5-NEXT: entry: 2636 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2637 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2638 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2639 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2640 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2641 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2642 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2643 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2644 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2645 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2646 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2647 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2648 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2649 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2650 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2651 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2652 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2653 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2654 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2655 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2656 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2657 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2658 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2659 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2660 // CHECK5: cond.true: 2661 // CHECK5-NEXT: br label [[COND_END:%.*]] 2662 // CHECK5: cond.false: 2663 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2664 // CHECK5-NEXT: br label [[COND_END]] 2665 // CHECK5: cond.end: 2666 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2667 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2668 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2669 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2670 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2671 // CHECK5: omp.inner.for.cond: 2672 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]] 2673 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]] 2674 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2675 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2676 // CHECK5: omp.inner.for.body: 2677 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP8]] 2678 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2679 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]] 2680 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2681 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP8]] 2682 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2683 // CHECK5: omp.inner.for.inc: 2684 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 2685 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP8]] 2686 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2687 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 2688 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 2689 // CHECK5: omp.inner.for.end: 2690 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2691 // CHECK5: omp.loop.exit: 2692 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2693 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2694 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2695 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2696 // CHECK5: .omp.final.then: 2697 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 2698 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 2699 // CHECK5: .omp.final.done: 2700 // CHECK5-NEXT: ret void 2701 // 2702 // 2703 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 2704 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2705 // CHECK5-NEXT: entry: 2706 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2707 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2708 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2709 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2710 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2711 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2712 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2713 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2714 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2715 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2716 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2717 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2718 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2719 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2720 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2721 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2722 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2723 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2724 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2725 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2726 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2727 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2728 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2729 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2730 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2731 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2732 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2733 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2734 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2735 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2736 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2737 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2738 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2739 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2740 // CHECK5: cond.true: 2741 // CHECK5-NEXT: br label [[COND_END:%.*]] 2742 // CHECK5: cond.false: 2743 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2744 // CHECK5-NEXT: br label [[COND_END]] 2745 // CHECK5: cond.end: 2746 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2747 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2748 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2749 // CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2750 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2751 // CHECK5: omp.inner.for.cond: 2752 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 2753 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 2754 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2755 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2756 // CHECK5: omp.inner.for.body: 2757 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 2758 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2759 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2760 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 2761 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2762 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]] 2763 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2764 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 2765 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]] 2766 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2767 // CHECK5: omp.body.continue: 2768 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2769 // CHECK5: omp.inner.for.inc: 2770 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 2771 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2772 // CHECK5-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 2773 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2774 // CHECK5: omp.inner.for.end: 2775 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2776 // CHECK5: omp.loop.exit: 2777 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 2778 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2779 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2780 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2781 // CHECK5: .omp.final.then: 2782 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 2783 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 2784 // CHECK5: .omp.final.done: 2785 // CHECK5-NEXT: ret void 2786 // 2787 // 2788 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 2789 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2790 // CHECK5-NEXT: entry: 2791 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2792 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2793 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2794 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 2795 // CHECK5-NEXT: ret void 2796 // 2797 // 2798 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 2799 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2800 // CHECK5-NEXT: entry: 2801 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2802 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2803 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2804 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2805 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2806 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2807 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2808 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2809 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2810 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2811 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2812 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2813 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2814 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2815 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2816 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2817 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2818 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2819 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2820 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2821 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2822 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2823 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2824 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2825 // CHECK5: cond.true: 2826 // CHECK5-NEXT: br label [[COND_END:%.*]] 2827 // CHECK5: cond.false: 2828 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2829 // CHECK5-NEXT: br label [[COND_END]] 2830 // CHECK5: cond.end: 2831 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2832 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2833 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2834 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2835 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2836 // CHECK5: omp.inner.for.cond: 2837 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]] 2838 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 2839 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2840 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2841 // CHECK5: omp.inner.for.body: 2842 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP17]] 2843 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2844 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 2845 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2846 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP17]] 2847 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2848 // CHECK5: omp.inner.for.inc: 2849 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 2850 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP17]] 2851 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2852 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 2853 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 2854 // CHECK5: omp.inner.for.end: 2855 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2856 // CHECK5: omp.loop.exit: 2857 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2858 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2859 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2860 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2861 // CHECK5: .omp.final.then: 2862 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 2863 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 2864 // CHECK5: .omp.final.done: 2865 // CHECK5-NEXT: ret void 2866 // 2867 // 2868 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 2869 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2870 // CHECK5-NEXT: entry: 2871 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2872 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2873 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2874 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2875 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2876 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2877 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2878 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2879 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2880 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2881 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2882 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2883 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2884 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2885 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2886 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2887 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2888 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2889 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2890 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2891 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2892 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2893 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2894 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2895 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2896 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2897 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2898 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2899 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2900 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2901 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2902 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2903 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2904 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2905 // CHECK5: cond.true: 2906 // CHECK5-NEXT: br label [[COND_END:%.*]] 2907 // CHECK5: cond.false: 2908 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2909 // CHECK5-NEXT: br label [[COND_END]] 2910 // CHECK5: cond.end: 2911 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2912 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2913 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2914 // CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2915 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2916 // CHECK5: omp.inner.for.cond: 2917 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]] 2918 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP20]] 2919 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2920 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2921 // CHECK5: omp.inner.for.body: 2922 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 2923 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2924 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2925 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]] 2926 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2927 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]] 2928 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2929 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 2930 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP20]] 2931 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2932 // CHECK5: omp.body.continue: 2933 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2934 // CHECK5: omp.inner.for.inc: 2935 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 2936 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2937 // CHECK5-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 2938 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 2939 // CHECK5: omp.inner.for.end: 2940 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2941 // CHECK5: omp.loop.exit: 2942 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 2943 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2944 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2945 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2946 // CHECK5: .omp.final.then: 2947 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 2948 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 2949 // CHECK5: .omp.final.done: 2950 // CHECK5-NEXT: ret void 2951 // 2952 // 2953 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 2954 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2955 // CHECK5-NEXT: entry: 2956 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2957 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2958 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2959 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 2960 // CHECK5-NEXT: ret void 2961 // 2962 // 2963 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 2964 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2965 // CHECK5-NEXT: entry: 2966 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2967 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2968 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2969 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2970 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2971 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2972 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2973 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2974 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2975 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2976 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2977 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2978 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2979 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2980 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2981 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2982 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2983 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2984 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2985 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2986 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2987 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2988 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2989 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2990 // CHECK5: cond.true: 2991 // CHECK5-NEXT: br label [[COND_END:%.*]] 2992 // CHECK5: cond.false: 2993 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2994 // CHECK5-NEXT: br label [[COND_END]] 2995 // CHECK5: cond.end: 2996 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2997 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2998 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2999 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3000 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3001 // CHECK5: omp.inner.for.cond: 3002 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 3003 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 3004 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3005 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3006 // CHECK5: omp.inner.for.body: 3007 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP23]] 3008 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3009 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 3010 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3011 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP23]] 3012 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3013 // CHECK5: omp.inner.for.inc: 3014 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 3015 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP23]] 3016 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3017 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 3018 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 3019 // CHECK5: omp.inner.for.end: 3020 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3021 // CHECK5: omp.loop.exit: 3022 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3023 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3024 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3025 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3026 // CHECK5: .omp.final.then: 3027 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 3028 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 3029 // CHECK5: .omp.final.done: 3030 // CHECK5-NEXT: ret void 3031 // 3032 // 3033 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 3034 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3035 // CHECK5-NEXT: entry: 3036 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3037 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3038 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3039 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3040 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3041 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3042 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3043 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3044 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3045 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3046 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3047 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3048 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3049 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3050 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3051 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3052 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3053 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3054 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3055 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3056 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3057 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3058 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3059 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3060 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3061 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3062 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3063 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3064 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3065 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3066 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 3067 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3068 // CHECK5: omp.dispatch.cond: 3069 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3070 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3071 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 3072 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 3073 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3074 // CHECK5: cond.true: 3075 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3076 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 3077 // CHECK5-NEXT: br label [[COND_END:%.*]] 3078 // CHECK5: cond.false: 3079 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3080 // CHECK5-NEXT: br label [[COND_END]] 3081 // CHECK5: cond.end: 3082 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3083 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3084 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3085 // CHECK5-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 3086 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3087 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3088 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3089 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3090 // CHECK5: omp.dispatch.body: 3091 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3092 // CHECK5: omp.inner.for.cond: 3093 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]] 3094 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3095 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3096 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3097 // CHECK5: omp.inner.for.body: 3098 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 3099 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 3100 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3101 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP26]] 3102 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3103 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP26]] 3104 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 3105 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 3106 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP26]] 3107 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3108 // CHECK5: omp.body.continue: 3109 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3110 // CHECK5: omp.inner.for.inc: 3111 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 3112 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 3113 // CHECK5-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 3114 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 3115 // CHECK5: omp.inner.for.end: 3116 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3117 // CHECK5: omp.dispatch.inc: 3118 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3119 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3120 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 3121 // CHECK5-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 3122 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3123 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3124 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3125 // CHECK5-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 3126 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 3127 // CHECK5: omp.dispatch.end: 3128 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3129 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3130 // CHECK5-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 3131 // CHECK5-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3132 // CHECK5: .omp.final.then: 3133 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 3134 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 3135 // CHECK5: .omp.final.done: 3136 // CHECK5-NEXT: ret void 3137 // 3138 // 3139 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 3140 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3141 // CHECK5-NEXT: entry: 3142 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3143 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3144 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3145 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 3146 // CHECK5-NEXT: ret void 3147 // 3148 // 3149 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 3150 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3151 // CHECK5-NEXT: entry: 3152 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3153 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3154 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3155 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3156 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3157 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3158 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3159 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3160 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3161 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3162 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3163 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3164 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3165 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3166 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3167 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3168 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3169 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3170 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3171 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3172 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3173 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3174 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3175 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3176 // CHECK5: cond.true: 3177 // CHECK5-NEXT: br label [[COND_END:%.*]] 3178 // CHECK5: cond.false: 3179 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3180 // CHECK5-NEXT: br label [[COND_END]] 3181 // CHECK5: cond.end: 3182 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3183 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3184 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3185 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3186 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3187 // CHECK5: omp.inner.for.cond: 3188 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]] 3189 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 3190 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3191 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3192 // CHECK5: omp.inner.for.body: 3193 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 3194 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3195 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 3196 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3197 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP29]] 3198 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3199 // CHECK5: omp.inner.for.inc: 3200 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 3201 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 3202 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3203 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 3204 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 3205 // CHECK5: omp.inner.for.end: 3206 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3207 // CHECK5: omp.loop.exit: 3208 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3209 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3210 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3211 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3212 // CHECK5: .omp.final.then: 3213 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 3214 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 3215 // CHECK5: .omp.final.done: 3216 // CHECK5-NEXT: ret void 3217 // 3218 // 3219 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 3220 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3221 // CHECK5-NEXT: entry: 3222 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3223 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3224 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3225 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3226 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3227 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3228 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3229 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3230 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3231 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3232 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3233 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3234 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3235 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3236 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3237 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3238 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3239 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3240 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3241 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3242 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3243 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3244 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3245 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3246 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3247 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3248 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3249 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3250 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3251 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3252 // CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3253 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 3254 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 3255 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3256 // CHECK5: omp.dispatch.cond: 3257 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 3258 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3259 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3260 // CHECK5: omp.dispatch.body: 3261 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3262 // CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 3263 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3264 // CHECK5: omp.inner.for.cond: 3265 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]] 3266 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 3267 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3268 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3269 // CHECK5: omp.inner.for.body: 3270 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 3271 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3272 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3273 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP32]] 3274 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3275 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP32]] 3276 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 3277 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 3278 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP32]] 3279 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3280 // CHECK5: omp.body.continue: 3281 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3282 // CHECK5: omp.inner.for.inc: 3283 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 3284 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 3285 // CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 3286 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 3287 // CHECK5: omp.inner.for.end: 3288 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3289 // CHECK5: omp.dispatch.inc: 3290 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 3291 // CHECK5: omp.dispatch.end: 3292 // CHECK5-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 3293 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3294 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3295 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3296 // CHECK5: .omp.final.then: 3297 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 3298 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 3299 // CHECK5: .omp.final.done: 3300 // CHECK5-NEXT: ret void 3301 // 3302 // 3303 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 3304 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3305 // CHECK5-NEXT: entry: 3306 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3307 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3308 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3309 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 3310 // CHECK5-NEXT: ret void 3311 // 3312 // 3313 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 3314 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3315 // CHECK5-NEXT: entry: 3316 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3317 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3318 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3319 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3320 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3321 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3322 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3323 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3324 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3325 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3326 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3327 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3328 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3329 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3330 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3331 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3332 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3333 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3334 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3335 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3336 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3337 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3338 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3339 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3340 // CHECK5: cond.true: 3341 // CHECK5-NEXT: br label [[COND_END:%.*]] 3342 // CHECK5: cond.false: 3343 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3344 // CHECK5-NEXT: br label [[COND_END]] 3345 // CHECK5: cond.end: 3346 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3347 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3348 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3349 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3350 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3351 // CHECK5: omp.inner.for.cond: 3352 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]] 3353 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 3354 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3355 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3356 // CHECK5: omp.inner.for.body: 3357 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]] 3358 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3359 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 3360 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3361 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP35]] 3362 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3363 // CHECK5: omp.inner.for.inc: 3364 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 3365 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]] 3366 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3367 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 3368 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] 3369 // CHECK5: omp.inner.for.end: 3370 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3371 // CHECK5: omp.loop.exit: 3372 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3373 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3374 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3375 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3376 // CHECK5: .omp.final.then: 3377 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 3378 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 3379 // CHECK5: .omp.final.done: 3380 // CHECK5-NEXT: ret void 3381 // 3382 // 3383 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 3384 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3385 // CHECK5-NEXT: entry: 3386 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3387 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3388 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3389 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3390 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3391 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3392 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3393 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3394 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3395 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3396 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3397 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3398 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3399 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3400 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3401 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3402 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3403 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3404 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3405 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3406 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3407 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3408 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3409 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3410 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3411 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3412 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3413 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3414 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3415 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3416 // CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3417 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 3418 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 3419 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3420 // CHECK5: omp.dispatch.cond: 3421 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 3422 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3423 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3424 // CHECK5: omp.dispatch.body: 3425 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3426 // CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 3427 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3428 // CHECK5: omp.inner.for.cond: 3429 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 3430 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 3431 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3432 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3433 // CHECK5: omp.inner.for.body: 3434 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 3435 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3436 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3437 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP38]] 3438 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3439 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP38]] 3440 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 3441 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 3442 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP38]] 3443 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3444 // CHECK5: omp.body.continue: 3445 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3446 // CHECK5: omp.inner.for.inc: 3447 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 3448 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 3449 // CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 3450 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 3451 // CHECK5: omp.inner.for.end: 3452 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3453 // CHECK5: omp.dispatch.inc: 3454 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 3455 // CHECK5: omp.dispatch.end: 3456 // CHECK5-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 3457 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3458 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3459 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3460 // CHECK5: .omp.final.then: 3461 // CHECK5-NEXT: store i32 123, ptr [[I]], align 4 3462 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]] 3463 // CHECK5: .omp.final.done: 3464 // CHECK5-NEXT: ret void 3465 // 3466 // 3467 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3468 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 3469 // CHECK7-NEXT: entry: 3470 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3471 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 3472 // CHECK7-NEXT: ret i32 [[CALL]] 3473 // 3474 // 3475 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3476 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3477 // CHECK7-NEXT: entry: 3478 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3479 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 3480 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 3481 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 3482 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3483 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3484 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4 3485 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4 3486 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4 3487 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 3488 // CHECK7-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3489 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4 3490 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4 3491 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4 3492 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 3493 // CHECK7-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3494 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4 3495 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4 3496 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4 3497 // CHECK7-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 3498 // CHECK7-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3499 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4 3500 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4 3501 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4 3502 // CHECK7-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 3503 // CHECK7-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3504 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3505 // CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3506 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 3507 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3508 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 3509 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3510 // CHECK7-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 3511 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3512 // CHECK7-NEXT: store ptr null, ptr [[TMP2]], align 4 3513 // CHECK7-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3514 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3515 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 3516 // CHECK7-NEXT: store i32 3, ptr [[TMP5]], align 4 3517 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 3518 // CHECK7-NEXT: store i32 1, ptr [[TMP6]], align 4 3519 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 3520 // CHECK7-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 3521 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 3522 // CHECK7-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 3523 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 3524 // CHECK7-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 3525 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 3526 // CHECK7-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 3527 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3528 // CHECK7-NEXT: store ptr null, ptr [[TMP11]], align 4 3529 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3530 // CHECK7-NEXT: store ptr null, ptr [[TMP12]], align 4 3531 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3532 // CHECK7-NEXT: store i64 123, ptr [[TMP13]], align 8 3533 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3534 // CHECK7-NEXT: store i64 0, ptr [[TMP14]], align 8 3535 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3536 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 3537 // CHECK7-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3538 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 3539 // CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3540 // CHECK7-NEXT: store i32 0, ptr [[TMP17]], align 4 3541 // CHECK7-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 3542 // CHECK7-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 3543 // CHECK7-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3544 // CHECK7: omp_offload.failed: 3545 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 3546 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]] 3547 // CHECK7: omp_offload.cont: 3548 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3549 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3550 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4 3551 // CHECK7-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3552 // CHECK7-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4 3553 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 3554 // CHECK7-NEXT: store ptr null, ptr [[TMP22]], align 4 3555 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3556 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3557 // CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 3558 // CHECK7-NEXT: store i32 3, ptr [[TMP25]], align 4 3559 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 3560 // CHECK7-NEXT: store i32 1, ptr [[TMP26]], align 4 3561 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 3562 // CHECK7-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 3563 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 3564 // CHECK7-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 3565 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 3566 // CHECK7-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 3567 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 3568 // CHECK7-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 3569 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 3570 // CHECK7-NEXT: store ptr null, ptr [[TMP31]], align 4 3571 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 3572 // CHECK7-NEXT: store ptr null, ptr [[TMP32]], align 4 3573 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 3574 // CHECK7-NEXT: store i64 123, ptr [[TMP33]], align 8 3575 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 3576 // CHECK7-NEXT: store i64 0, ptr [[TMP34]], align 8 3577 // CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 3578 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 3579 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 3580 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 3581 // CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 3582 // CHECK7-NEXT: store i32 0, ptr [[TMP37]], align 4 3583 // CHECK7-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 3584 // CHECK7-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 3585 // CHECK7-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 3586 // CHECK7: omp_offload.failed8: 3587 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 3588 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT9]] 3589 // CHECK7: omp_offload.cont9: 3590 // CHECK7-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3591 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 3592 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4 3593 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 3594 // CHECK7-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4 3595 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 3596 // CHECK7-NEXT: store ptr null, ptr [[TMP42]], align 4 3597 // CHECK7-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 3598 // CHECK7-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 3599 // CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 3600 // CHECK7-NEXT: store i32 3, ptr [[TMP45]], align 4 3601 // CHECK7-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 3602 // CHECK7-NEXT: store i32 1, ptr [[TMP46]], align 4 3603 // CHECK7-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 3604 // CHECK7-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 3605 // CHECK7-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 3606 // CHECK7-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 3607 // CHECK7-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 3608 // CHECK7-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 3609 // CHECK7-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 3610 // CHECK7-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 3611 // CHECK7-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 3612 // CHECK7-NEXT: store ptr null, ptr [[TMP51]], align 4 3613 // CHECK7-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 3614 // CHECK7-NEXT: store ptr null, ptr [[TMP52]], align 4 3615 // CHECK7-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 3616 // CHECK7-NEXT: store i64 123, ptr [[TMP53]], align 8 3617 // CHECK7-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 3618 // CHECK7-NEXT: store i64 0, ptr [[TMP54]], align 8 3619 // CHECK7-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 3620 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 3621 // CHECK7-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 3622 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 3623 // CHECK7-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 3624 // CHECK7-NEXT: store i32 0, ptr [[TMP57]], align 4 3625 // CHECK7-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 3626 // CHECK7-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 3627 // CHECK7-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3628 // CHECK7: omp_offload.failed16: 3629 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 3630 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3631 // CHECK7: omp_offload.cont17: 3632 // CHECK7-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3633 // CHECK7-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3634 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 4 3635 // CHECK7-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3636 // CHECK7-NEXT: store ptr [[A18]], ptr [[TMP61]], align 4 3637 // CHECK7-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 3638 // CHECK7-NEXT: store ptr null, ptr [[TMP62]], align 4 3639 // CHECK7-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3640 // CHECK7-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3641 // CHECK7-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 3642 // CHECK7-NEXT: store i32 3, ptr [[TMP65]], align 4 3643 // CHECK7-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 3644 // CHECK7-NEXT: store i32 1, ptr [[TMP66]], align 4 3645 // CHECK7-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 3646 // CHECK7-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 4 3647 // CHECK7-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 3648 // CHECK7-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 4 3649 // CHECK7-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 3650 // CHECK7-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 4 3651 // CHECK7-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 3652 // CHECK7-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4 3653 // CHECK7-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 3654 // CHECK7-NEXT: store ptr null, ptr [[TMP71]], align 4 3655 // CHECK7-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 3656 // CHECK7-NEXT: store ptr null, ptr [[TMP72]], align 4 3657 // CHECK7-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 3658 // CHECK7-NEXT: store i64 123, ptr [[TMP73]], align 8 3659 // CHECK7-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 3660 // CHECK7-NEXT: store i64 0, ptr [[TMP74]], align 8 3661 // CHECK7-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 3662 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 3663 // CHECK7-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 3664 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 3665 // CHECK7-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 3666 // CHECK7-NEXT: store i32 0, ptr [[TMP77]], align 4 3667 // CHECK7-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 3668 // CHECK7-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 3669 // CHECK7-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 3670 // CHECK7: omp_offload.failed24: 3671 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 3672 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT25]] 3673 // CHECK7: omp_offload.cont25: 3674 // CHECK7-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3675 // CHECK7-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 3676 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 4 3677 // CHECK7-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 3678 // CHECK7-NEXT: store ptr [[A26]], ptr [[TMP81]], align 4 3679 // CHECK7-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0 3680 // CHECK7-NEXT: store ptr null, ptr [[TMP82]], align 4 3681 // CHECK7-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 3682 // CHECK7-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 3683 // CHECK7-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 3684 // CHECK7-NEXT: store i32 3, ptr [[TMP85]], align 4 3685 // CHECK7-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 3686 // CHECK7-NEXT: store i32 1, ptr [[TMP86]], align 4 3687 // CHECK7-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 3688 // CHECK7-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 4 3689 // CHECK7-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 3690 // CHECK7-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 4 3691 // CHECK7-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 3692 // CHECK7-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 4 3693 // CHECK7-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 3694 // CHECK7-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4 3695 // CHECK7-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 3696 // CHECK7-NEXT: store ptr null, ptr [[TMP91]], align 4 3697 // CHECK7-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 3698 // CHECK7-NEXT: store ptr null, ptr [[TMP92]], align 4 3699 // CHECK7-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 3700 // CHECK7-NEXT: store i64 123, ptr [[TMP93]], align 8 3701 // CHECK7-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 3702 // CHECK7-NEXT: store i64 0, ptr [[TMP94]], align 8 3703 // CHECK7-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 3704 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 3705 // CHECK7-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 3706 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 3707 // CHECK7-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 3708 // CHECK7-NEXT: store i32 0, ptr [[TMP97]], align 4 3709 // CHECK7-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 3710 // CHECK7-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 3711 // CHECK7-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 3712 // CHECK7: omp_offload.failed32: 3713 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 3714 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT33]] 3715 // CHECK7: omp_offload.cont33: 3716 // CHECK7-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3717 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0 3718 // CHECK7-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3719 // CHECK7-NEXT: ret i32 [[TMP100]] 3720 // 3721 // 3722 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 3723 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3724 // CHECK7-NEXT: entry: 3725 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3726 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3727 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3728 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 3729 // CHECK7-NEXT: ret void 3730 // 3731 // 3732 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 3733 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3734 // CHECK7-NEXT: entry: 3735 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3736 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3737 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3738 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3739 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3740 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3741 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3742 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3743 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3744 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3745 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3746 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3747 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3748 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3749 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3750 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3751 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3752 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3753 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3754 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3755 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3756 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3757 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3758 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3759 // CHECK7: cond.true: 3760 // CHECK7-NEXT: br label [[COND_END:%.*]] 3761 // CHECK7: cond.false: 3762 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3763 // CHECK7-NEXT: br label [[COND_END]] 3764 // CHECK7: cond.end: 3765 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3766 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3767 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3768 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3769 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3770 // CHECK7: omp.inner.for.cond: 3771 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 3772 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 3773 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3774 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3775 // CHECK7: omp.inner.for.body: 3776 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 3777 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 3778 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP9]] 3779 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3780 // CHECK7: omp.inner.for.inc: 3781 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 3782 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 3783 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3784 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 3785 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 3786 // CHECK7: omp.inner.for.end: 3787 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3788 // CHECK7: omp.loop.exit: 3789 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3790 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3791 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 3792 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3793 // CHECK7: .omp.final.then: 3794 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 3795 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 3796 // CHECK7: .omp.final.done: 3797 // CHECK7-NEXT: ret void 3798 // 3799 // 3800 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 3801 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3802 // CHECK7-NEXT: entry: 3803 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3804 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3805 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3806 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3807 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3808 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3809 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3810 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3811 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3812 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3813 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3814 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3815 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3816 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3817 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3818 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3819 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3820 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3821 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3822 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3823 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3824 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3825 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 3826 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 3827 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3828 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3829 // CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3830 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3831 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3832 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3833 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3834 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3835 // CHECK7: cond.true: 3836 // CHECK7-NEXT: br label [[COND_END:%.*]] 3837 // CHECK7: cond.false: 3838 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3839 // CHECK7-NEXT: br label [[COND_END]] 3840 // CHECK7: cond.end: 3841 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3842 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3843 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3844 // CHECK7-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3845 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3846 // CHECK7: omp.inner.for.cond: 3847 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 3848 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 3849 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3850 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3851 // CHECK7: omp.inner.for.body: 3852 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3853 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3854 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3855 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 3856 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3857 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 3858 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 3859 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 3860 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3861 // CHECK7: omp.body.continue: 3862 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3863 // CHECK7: omp.inner.for.inc: 3864 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3865 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3866 // CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3867 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3868 // CHECK7: omp.inner.for.end: 3869 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3870 // CHECK7: omp.loop.exit: 3871 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3872 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3873 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3874 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3875 // CHECK7: .omp.final.then: 3876 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 3877 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 3878 // CHECK7: .omp.final.done: 3879 // CHECK7-NEXT: ret void 3880 // 3881 // 3882 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 3883 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3884 // CHECK7-NEXT: entry: 3885 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3886 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3887 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3888 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 3889 // CHECK7-NEXT: ret void 3890 // 3891 // 3892 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 3893 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3894 // CHECK7-NEXT: entry: 3895 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3896 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3897 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3898 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3899 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3900 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3901 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3902 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3903 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3904 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3905 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3906 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3907 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3908 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3909 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3910 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3911 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3912 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3913 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3914 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3915 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3916 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3917 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3918 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3919 // CHECK7: cond.true: 3920 // CHECK7-NEXT: br label [[COND_END:%.*]] 3921 // CHECK7: cond.false: 3922 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3923 // CHECK7-NEXT: br label [[COND_END]] 3924 // CHECK7: cond.end: 3925 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3926 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3927 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3928 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3929 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3930 // CHECK7: omp.inner.for.cond: 3931 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 3932 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 3933 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3934 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3935 // CHECK7: omp.inner.for.body: 3936 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]] 3937 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 3938 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP18]] 3939 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3940 // CHECK7: omp.inner.for.inc: 3941 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 3942 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]] 3943 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3944 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 3945 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 3946 // CHECK7: omp.inner.for.end: 3947 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3948 // CHECK7: omp.loop.exit: 3949 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3950 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3951 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 3952 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3953 // CHECK7: .omp.final.then: 3954 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 3955 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 3956 // CHECK7: .omp.final.done: 3957 // CHECK7-NEXT: ret void 3958 // 3959 // 3960 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 3961 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3962 // CHECK7-NEXT: entry: 3963 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3964 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3965 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3966 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3967 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3968 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3969 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3970 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3971 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3972 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3973 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3974 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3975 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3976 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3977 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3978 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3979 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3980 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3981 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3982 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3983 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3984 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3985 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 3986 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 3987 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3988 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3989 // CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3990 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3991 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3992 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3993 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3994 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3995 // CHECK7: cond.true: 3996 // CHECK7-NEXT: br label [[COND_END:%.*]] 3997 // CHECK7: cond.false: 3998 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3999 // CHECK7-NEXT: br label [[COND_END]] 4000 // CHECK7: cond.end: 4001 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4002 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4003 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4004 // CHECK7-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 4005 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4006 // CHECK7: omp.inner.for.cond: 4007 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 4008 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 4009 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4010 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4011 // CHECK7: omp.inner.for.body: 4012 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 4013 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4014 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4015 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 4016 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 4017 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 4018 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 4019 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]] 4020 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4021 // CHECK7: omp.body.continue: 4022 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4023 // CHECK7: omp.inner.for.inc: 4024 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 4025 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 4026 // CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 4027 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 4028 // CHECK7: omp.inner.for.end: 4029 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4030 // CHECK7: omp.loop.exit: 4031 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 4032 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4033 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4034 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4035 // CHECK7: .omp.final.then: 4036 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4037 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4038 // CHECK7: .omp.final.done: 4039 // CHECK7-NEXT: ret void 4040 // 4041 // 4042 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 4043 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4044 // CHECK7-NEXT: entry: 4045 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4046 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4047 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4048 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 4049 // CHECK7-NEXT: ret void 4050 // 4051 // 4052 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 4053 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4054 // CHECK7-NEXT: entry: 4055 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4056 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4057 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4058 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4059 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4060 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4061 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4062 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4063 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4064 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4065 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4066 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4067 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4068 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4069 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4070 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 4071 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4072 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4073 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4074 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4075 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4076 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4077 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4078 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4079 // CHECK7: cond.true: 4080 // CHECK7-NEXT: br label [[COND_END:%.*]] 4081 // CHECK7: cond.false: 4082 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4083 // CHECK7-NEXT: br label [[COND_END]] 4084 // CHECK7: cond.end: 4085 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4086 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4087 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4088 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4089 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4090 // CHECK7: omp.inner.for.cond: 4091 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 4092 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 4093 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4094 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4095 // CHECK7: omp.inner.for.body: 4096 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 4097 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 4098 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP24]] 4099 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4100 // CHECK7: omp.inner.for.inc: 4101 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 4102 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 4103 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4104 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 4105 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 4106 // CHECK7: omp.inner.for.end: 4107 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4108 // CHECK7: omp.loop.exit: 4109 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4110 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4111 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4112 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4113 // CHECK7: .omp.final.then: 4114 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4115 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4116 // CHECK7: .omp.final.done: 4117 // CHECK7-NEXT: ret void 4118 // 4119 // 4120 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 4121 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4122 // CHECK7-NEXT: entry: 4123 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4124 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4125 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4126 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4127 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4128 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4129 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4130 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4131 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4132 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4133 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4134 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4135 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4136 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4137 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4138 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4139 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4140 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4141 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4142 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4143 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4144 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4145 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4146 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4147 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4148 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4149 // CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4150 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 4151 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 4152 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4153 // CHECK7: omp.dispatch.cond: 4154 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4155 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4156 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 4157 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4158 // CHECK7: cond.true: 4159 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4160 // CHECK7-NEXT: br label [[COND_END:%.*]] 4161 // CHECK7: cond.false: 4162 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4163 // CHECK7-NEXT: br label [[COND_END]] 4164 // CHECK7: cond.end: 4165 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 4166 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4167 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4168 // CHECK7-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 4169 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4170 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4171 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 4172 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4173 // CHECK7: omp.dispatch.body: 4174 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4175 // CHECK7: omp.inner.for.cond: 4176 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 4177 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 4178 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 4179 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4180 // CHECK7: omp.inner.for.body: 4181 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 4182 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 4183 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4184 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 4185 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 4186 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 4187 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]] 4188 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]] 4189 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4190 // CHECK7: omp.body.continue: 4191 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4192 // CHECK7: omp.inner.for.inc: 4193 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 4194 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 4195 // CHECK7-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 4196 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 4197 // CHECK7: omp.inner.for.end: 4198 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4199 // CHECK7: omp.dispatch.inc: 4200 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4201 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4202 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 4203 // CHECK7-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 4204 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4205 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4206 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4207 // CHECK7-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 4208 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 4209 // CHECK7: omp.dispatch.end: 4210 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 4211 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4212 // CHECK7-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 4213 // CHECK7-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4214 // CHECK7: .omp.final.then: 4215 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4216 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4217 // CHECK7: .omp.final.done: 4218 // CHECK7-NEXT: ret void 4219 // 4220 // 4221 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 4222 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4223 // CHECK7-NEXT: entry: 4224 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4225 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4226 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4227 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 4228 // CHECK7-NEXT: ret void 4229 // 4230 // 4231 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 4232 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4233 // CHECK7-NEXT: entry: 4234 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4235 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4236 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4237 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4238 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4239 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4240 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4241 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4242 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4243 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4244 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4245 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4246 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4247 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4248 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4249 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 4250 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4251 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4252 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4253 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4254 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4255 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4256 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4257 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4258 // CHECK7: cond.true: 4259 // CHECK7-NEXT: br label [[COND_END:%.*]] 4260 // CHECK7: cond.false: 4261 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4262 // CHECK7-NEXT: br label [[COND_END]] 4263 // CHECK7: cond.end: 4264 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4265 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4266 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4267 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4268 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4269 // CHECK7: omp.inner.for.cond: 4270 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 4271 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 4272 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4273 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4274 // CHECK7: omp.inner.for.body: 4275 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]] 4276 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 4277 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP30]] 4278 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4279 // CHECK7: omp.inner.for.inc: 4280 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 4281 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]] 4282 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4283 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 4284 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 4285 // CHECK7: omp.inner.for.end: 4286 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4287 // CHECK7: omp.loop.exit: 4288 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4289 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4290 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4291 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4292 // CHECK7: .omp.final.then: 4293 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4294 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4295 // CHECK7: .omp.final.done: 4296 // CHECK7-NEXT: ret void 4297 // 4298 // 4299 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 4300 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4301 // CHECK7-NEXT: entry: 4302 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4303 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4304 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4305 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4306 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4307 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4308 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4309 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4310 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4311 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4312 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4313 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4314 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4315 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4316 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4317 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4318 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4319 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4320 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4321 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4322 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4323 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4324 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4325 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4326 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4327 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4328 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4329 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4330 // CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4331 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 4332 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 4333 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4334 // CHECK7: omp.dispatch.cond: 4335 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 4336 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4337 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4338 // CHECK7: omp.dispatch.body: 4339 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4340 // CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 4341 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4342 // CHECK7: omp.inner.for.cond: 4343 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 4344 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 4345 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4346 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4347 // CHECK7: omp.inner.for.body: 4348 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 4349 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4350 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4351 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 4352 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 4353 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 4354 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 4355 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP33]] 4356 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4357 // CHECK7: omp.body.continue: 4358 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4359 // CHECK7: omp.inner.for.inc: 4360 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 4361 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 4362 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 4363 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] 4364 // CHECK7: omp.inner.for.end: 4365 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4366 // CHECK7: omp.dispatch.inc: 4367 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 4368 // CHECK7: omp.dispatch.end: 4369 // CHECK7-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 4370 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4371 // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4372 // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4373 // CHECK7: .omp.final.then: 4374 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4375 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4376 // CHECK7: .omp.final.done: 4377 // CHECK7-NEXT: ret void 4378 // 4379 // 4380 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 4381 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4382 // CHECK7-NEXT: entry: 4383 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4384 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4385 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4386 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 4387 // CHECK7-NEXT: ret void 4388 // 4389 // 4390 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 4391 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4392 // CHECK7-NEXT: entry: 4393 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4394 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4395 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4396 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4397 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4398 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4399 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4400 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4401 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4402 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4403 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4404 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4405 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4406 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4407 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4408 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 4409 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4410 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4411 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4412 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4413 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4414 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4415 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4416 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4417 // CHECK7: cond.true: 4418 // CHECK7-NEXT: br label [[COND_END:%.*]] 4419 // CHECK7: cond.false: 4420 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4421 // CHECK7-NEXT: br label [[COND_END]] 4422 // CHECK7: cond.end: 4423 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4424 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4425 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4426 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4427 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4428 // CHECK7: omp.inner.for.cond: 4429 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 4430 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 4431 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4432 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4433 // CHECK7: omp.inner.for.body: 4434 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]] 4435 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 4436 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP36]] 4437 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4438 // CHECK7: omp.inner.for.inc: 4439 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 4440 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]] 4441 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4442 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 4443 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] 4444 // CHECK7: omp.inner.for.end: 4445 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4446 // CHECK7: omp.loop.exit: 4447 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4448 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4449 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 4450 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4451 // CHECK7: .omp.final.then: 4452 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4453 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4454 // CHECK7: .omp.final.done: 4455 // CHECK7-NEXT: ret void 4456 // 4457 // 4458 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 4459 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4460 // CHECK7-NEXT: entry: 4461 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4462 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4463 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4464 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4465 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4466 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4467 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4468 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4469 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4470 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4471 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4472 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4473 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4474 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4475 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4476 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4477 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4478 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4479 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4480 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4481 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4482 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4483 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4484 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4485 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4486 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4487 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4488 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4489 // CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4490 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 4491 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 4492 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4493 // CHECK7: omp.dispatch.cond: 4494 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 4495 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4496 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4497 // CHECK7: omp.dispatch.body: 4498 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4499 // CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 4500 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4501 // CHECK7: omp.inner.for.cond: 4502 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 4503 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 4504 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4505 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4506 // CHECK7: omp.inner.for.body: 4507 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 4508 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4509 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4510 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 4511 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 4512 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 4513 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 4514 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP39]] 4515 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4516 // CHECK7: omp.body.continue: 4517 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4518 // CHECK7: omp.inner.for.inc: 4519 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 4520 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 4521 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 4522 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] 4523 // CHECK7: omp.inner.for.end: 4524 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4525 // CHECK7: omp.dispatch.inc: 4526 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 4527 // CHECK7: omp.dispatch.end: 4528 // CHECK7-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 4529 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4530 // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4531 // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4532 // CHECK7: .omp.final.then: 4533 // CHECK7-NEXT: store i32 123, ptr [[I]], align 4 4534 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]] 4535 // CHECK7: .omp.final.done: 4536 // CHECK7-NEXT: ret void 4537 // 4538 // 4539 // CHECK9-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4540 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 4541 // CHECK9-NEXT: entry: 4542 // CHECK9-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4543 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 4544 // CHECK9-NEXT: ret i32 [[CALL]] 4545 // 4546 // 4547 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4548 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 4549 // CHECK9-NEXT: entry: 4550 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 4551 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4552 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4553 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4554 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4555 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4556 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4557 // CHECK9-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 4558 // CHECK9-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 4559 // CHECK9-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 4560 // CHECK9-NEXT: [[I7:%.*]] = alloca i32, align 4 4561 // CHECK9-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 4562 // CHECK9-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 4563 // CHECK9-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 4564 // CHECK9-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 4565 // CHECK9-NEXT: [[I24:%.*]] = alloca i32, align 4 4566 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4 4567 // CHECK9-NEXT: [[DOTOMP_LB38:%.*]] = alloca i32, align 4 4568 // CHECK9-NEXT: [[DOTOMP_UB39:%.*]] = alloca i32, align 4 4569 // CHECK9-NEXT: [[DOTOMP_IV40:%.*]] = alloca i32, align 4 4570 // CHECK9-NEXT: [[I41:%.*]] = alloca i32, align 4 4571 // CHECK9-NEXT: [[_TMP54:%.*]] = alloca i32, align 4 4572 // CHECK9-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4 4573 // CHECK9-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4 4574 // CHECK9-NEXT: [[DOTOMP_IV57:%.*]] = alloca i32, align 4 4575 // CHECK9-NEXT: [[I58:%.*]] = alloca i32, align 4 4576 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 4577 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 4578 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4579 // CHECK9-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4580 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4581 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 4582 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4583 // CHECK9: omp.inner.for.cond: 4584 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 4585 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 4586 // CHECK9-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4587 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4588 // CHECK9: omp.inner.for.body: 4589 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 4590 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4591 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4592 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 4593 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 4594 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 4595 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 4596 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 4597 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 4598 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4599 // CHECK9: omp.body.continue: 4600 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4601 // CHECK9: omp.inner.for.inc: 4602 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 4603 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 4604 // CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 4605 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 4606 // CHECK9: omp.inner.for.end: 4607 // CHECK9-NEXT: store i32 123, ptr [[I]], align 4 4608 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 4 4609 // CHECK9-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 4 4610 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4 4611 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4 4612 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 4613 // CHECK9: omp.inner.for.cond8: 4614 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 4615 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]] 4616 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4617 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 4618 // CHECK9: omp.inner.for.body10: 4619 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 4620 // CHECK9-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 4621 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 4622 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]] 4623 // CHECK9-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4624 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]] 4625 // CHECK9-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 4626 // CHECK9-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i64 0, i64 [[IDXPROM14]] 4627 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP6]] 4628 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 4629 // CHECK9: omp.body.continue16: 4630 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 4631 // CHECK9: omp.inner.for.inc17: 4632 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 4633 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 4634 // CHECK9-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]] 4635 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 4636 // CHECK9: omp.inner.for.end19: 4637 // CHECK9-NEXT: store i32 123, ptr [[I7]], align 4 4638 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB21]], align 4 4639 // CHECK9-NEXT: store i32 122, ptr [[DOTOMP_UB22]], align 4 4640 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4 4641 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV23]], align 4 4642 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 4643 // CHECK9: omp.inner.for.cond25: 4644 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 4645 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP9]] 4646 // CHECK9-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4647 // CHECK9-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 4648 // CHECK9: omp.inner.for.body27: 4649 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 4650 // CHECK9-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 4651 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 4652 // CHECK9-NEXT: store i32 [[ADD29]], ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]] 4653 // CHECK9-NEXT: [[A30:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4654 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]] 4655 // CHECK9-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 4656 // CHECK9-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], ptr [[A30]], i64 0, i64 [[IDXPROM31]] 4657 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP9]] 4658 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 4659 // CHECK9: omp.body.continue33: 4660 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 4661 // CHECK9: omp.inner.for.inc34: 4662 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 4663 // CHECK9-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 4664 // CHECK9-NEXT: store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]] 4665 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 4666 // CHECK9: omp.inner.for.end36: 4667 // CHECK9-NEXT: store i32 123, ptr [[I24]], align 4 4668 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB38]], align 4 4669 // CHECK9-NEXT: store i32 122, ptr [[DOTOMP_UB39]], align 4 4670 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB38]], align 4 4671 // CHECK9-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV40]], align 4 4672 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42:%.*]] 4673 // CHECK9: omp.inner.for.cond42: 4674 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV40]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 4675 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB39]], align 4, !llvm.access.group [[ACC_GRP12]] 4676 // CHECK9-NEXT: [[CMP43:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4677 // CHECK9-NEXT: br i1 [[CMP43]], label [[OMP_INNER_FOR_BODY44:%.*]], label [[OMP_INNER_FOR_END53:%.*]] 4678 // CHECK9: omp.inner.for.body44: 4679 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV40]], align 4, !llvm.access.group [[ACC_GRP12]] 4680 // CHECK9-NEXT: [[MUL45:%.*]] = mul nsw i32 [[TMP21]], 1 4681 // CHECK9-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]] 4682 // CHECK9-NEXT: store i32 [[ADD46]], ptr [[I41]], align 4, !llvm.access.group [[ACC_GRP12]] 4683 // CHECK9-NEXT: [[A47:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4684 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[I41]], align 4, !llvm.access.group [[ACC_GRP12]] 4685 // CHECK9-NEXT: [[IDXPROM48:%.*]] = sext i32 [[TMP22]] to i64 4686 // CHECK9-NEXT: [[ARRAYIDX49:%.*]] = getelementptr inbounds [123 x i32], ptr [[A47]], i64 0, i64 [[IDXPROM48]] 4687 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX49]], align 4, !llvm.access.group [[ACC_GRP12]] 4688 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE50:%.*]] 4689 // CHECK9: omp.body.continue50: 4690 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC51:%.*]] 4691 // CHECK9: omp.inner.for.inc51: 4692 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV40]], align 4, !llvm.access.group [[ACC_GRP12]] 4693 // CHECK9-NEXT: [[ADD52:%.*]] = add nsw i32 [[TMP23]], 1 4694 // CHECK9-NEXT: store i32 [[ADD52]], ptr [[DOTOMP_IV40]], align 4, !llvm.access.group [[ACC_GRP12]] 4695 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42]], !llvm.loop [[LOOP13:![0-9]+]] 4696 // CHECK9: omp.inner.for.end53: 4697 // CHECK9-NEXT: store i32 123, ptr [[I41]], align 4 4698 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB55]], align 4 4699 // CHECK9-NEXT: store i32 122, ptr [[DOTOMP_UB56]], align 4 4700 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_LB55]], align 4 4701 // CHECK9-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV57]], align 4 4702 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59:%.*]] 4703 // CHECK9: omp.inner.for.cond59: 4704 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV57]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 4705 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_UB56]], align 4, !llvm.access.group [[ACC_GRP15]] 4706 // CHECK9-NEXT: [[CMP60:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]] 4707 // CHECK9-NEXT: br i1 [[CMP60]], label [[OMP_INNER_FOR_BODY61:%.*]], label [[OMP_INNER_FOR_END70:%.*]] 4708 // CHECK9: omp.inner.for.body61: 4709 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV57]], align 4, !llvm.access.group [[ACC_GRP15]] 4710 // CHECK9-NEXT: [[MUL62:%.*]] = mul nsw i32 [[TMP27]], 1 4711 // CHECK9-NEXT: [[ADD63:%.*]] = add nsw i32 0, [[MUL62]] 4712 // CHECK9-NEXT: store i32 [[ADD63]], ptr [[I58]], align 4, !llvm.access.group [[ACC_GRP15]] 4713 // CHECK9-NEXT: [[A64:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4714 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[I58]], align 4, !llvm.access.group [[ACC_GRP15]] 4715 // CHECK9-NEXT: [[IDXPROM65:%.*]] = sext i32 [[TMP28]] to i64 4716 // CHECK9-NEXT: [[ARRAYIDX66:%.*]] = getelementptr inbounds [123 x i32], ptr [[A64]], i64 0, i64 [[IDXPROM65]] 4717 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX66]], align 4, !llvm.access.group [[ACC_GRP15]] 4718 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE67:%.*]] 4719 // CHECK9: omp.body.continue67: 4720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC68:%.*]] 4721 // CHECK9: omp.inner.for.inc68: 4722 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV57]], align 4, !llvm.access.group [[ACC_GRP15]] 4723 // CHECK9-NEXT: [[ADD69:%.*]] = add nsw i32 [[TMP29]], 1 4724 // CHECK9-NEXT: store i32 [[ADD69]], ptr [[DOTOMP_IV57]], align 4, !llvm.access.group [[ACC_GRP15]] 4725 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59]], !llvm.loop [[LOOP16:![0-9]+]] 4726 // CHECK9: omp.inner.for.end70: 4727 // CHECK9-NEXT: store i32 123, ptr [[I58]], align 4 4728 // CHECK9-NEXT: [[A71:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4729 // CHECK9-NEXT: [[ARRAYIDX72:%.*]] = getelementptr inbounds [123 x i32], ptr [[A71]], i64 0, i64 0 4730 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARRAYIDX72]], align 4 4731 // CHECK9-NEXT: ret i32 [[TMP30]] 4732 // 4733 // 4734 // CHECK11-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4735 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 4736 // CHECK11-NEXT: entry: 4737 // CHECK11-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4738 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 4739 // CHECK11-NEXT: ret i32 [[CALL]] 4740 // 4741 // 4742 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4743 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4744 // CHECK11-NEXT: entry: 4745 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4746 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4747 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4748 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4749 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4750 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4751 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 4752 // CHECK11-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 4753 // CHECK11-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 4754 // CHECK11-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 4755 // CHECK11-NEXT: [[I7:%.*]] = alloca i32, align 4 4756 // CHECK11-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 4757 // CHECK11-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 4758 // CHECK11-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 4759 // CHECK11-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 4760 // CHECK11-NEXT: [[I23:%.*]] = alloca i32, align 4 4761 // CHECK11-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 4762 // CHECK11-NEXT: [[DOTOMP_LB36:%.*]] = alloca i32, align 4 4763 // CHECK11-NEXT: [[DOTOMP_UB37:%.*]] = alloca i32, align 4 4764 // CHECK11-NEXT: [[DOTOMP_IV38:%.*]] = alloca i32, align 4 4765 // CHECK11-NEXT: [[I39:%.*]] = alloca i32, align 4 4766 // CHECK11-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 4767 // CHECK11-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4 4768 // CHECK11-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4 4769 // CHECK11-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4 4770 // CHECK11-NEXT: [[I55:%.*]] = alloca i32, align 4 4771 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4772 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4773 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4774 // CHECK11-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4775 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4776 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 4777 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4778 // CHECK11: omp.inner.for.cond: 4779 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 4780 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 4781 // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4782 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4783 // CHECK11: omp.inner.for.body: 4784 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 4785 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4786 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4787 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 4788 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 4789 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 4790 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 4791 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 4792 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4793 // CHECK11: omp.body.continue: 4794 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4795 // CHECK11: omp.inner.for.inc: 4796 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 4797 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 4798 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 4799 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 4800 // CHECK11: omp.inner.for.end: 4801 // CHECK11-NEXT: store i32 123, ptr [[I]], align 4 4802 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB4]], align 4 4803 // CHECK11-NEXT: store i32 122, ptr [[DOTOMP_UB5]], align 4 4804 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4 4805 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4 4806 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 4807 // CHECK11: omp.inner.for.cond8: 4808 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 4809 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP7]] 4810 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4811 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 4812 // CHECK11: omp.inner.for.body10: 4813 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 4814 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 4815 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 4816 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]] 4817 // CHECK11-NEXT: [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4818 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]] 4819 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i32 0, i32 [[TMP10]] 4820 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP7]] 4821 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 4822 // CHECK11: omp.body.continue15: 4823 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 4824 // CHECK11: omp.inner.for.inc16: 4825 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 4826 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 4827 // CHECK11-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]] 4828 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 4829 // CHECK11: omp.inner.for.end18: 4830 // CHECK11-NEXT: store i32 123, ptr [[I7]], align 4 4831 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB20]], align 4 4832 // CHECK11-NEXT: store i32 122, ptr [[DOTOMP_UB21]], align 4 4833 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB20]], align 4 4834 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV22]], align 4 4835 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 4836 // CHECK11: omp.inner.for.cond24: 4837 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 4838 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB21]], align 4, !llvm.access.group [[ACC_GRP10]] 4839 // CHECK11-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4840 // CHECK11-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 4841 // CHECK11: omp.inner.for.body26: 4842 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 4843 // CHECK11-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 4844 // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 4845 // CHECK11-NEXT: store i32 [[ADD28]], ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]] 4846 // CHECK11-NEXT: [[A29:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4847 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]] 4848 // CHECK11-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], ptr [[A29]], i32 0, i32 [[TMP16]] 4849 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX30]], align 4, !llvm.access.group [[ACC_GRP10]] 4850 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 4851 // CHECK11: omp.body.continue31: 4852 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 4853 // CHECK11: omp.inner.for.inc32: 4854 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 4855 // CHECK11-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 4856 // CHECK11-NEXT: store i32 [[ADD33]], ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]] 4857 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 4858 // CHECK11: omp.inner.for.end34: 4859 // CHECK11-NEXT: store i32 123, ptr [[I23]], align 4 4860 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB36]], align 4 4861 // CHECK11-NEXT: store i32 122, ptr [[DOTOMP_UB37]], align 4 4862 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB36]], align 4 4863 // CHECK11-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV38]], align 4 4864 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40:%.*]] 4865 // CHECK11: omp.inner.for.cond40: 4866 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV38]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 4867 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB37]], align 4, !llvm.access.group [[ACC_GRP13]] 4868 // CHECK11-NEXT: [[CMP41:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4869 // CHECK11-NEXT: br i1 [[CMP41]], label [[OMP_INNER_FOR_BODY42:%.*]], label [[OMP_INNER_FOR_END50:%.*]] 4870 // CHECK11: omp.inner.for.body42: 4871 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV38]], align 4, !llvm.access.group [[ACC_GRP13]] 4872 // CHECK11-NEXT: [[MUL43:%.*]] = mul nsw i32 [[TMP21]], 1 4873 // CHECK11-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]] 4874 // CHECK11-NEXT: store i32 [[ADD44]], ptr [[I39]], align 4, !llvm.access.group [[ACC_GRP13]] 4875 // CHECK11-NEXT: [[A45:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4876 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[I39]], align 4, !llvm.access.group [[ACC_GRP13]] 4877 // CHECK11-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds [123 x i32], ptr [[A45]], i32 0, i32 [[TMP22]] 4878 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX46]], align 4, !llvm.access.group [[ACC_GRP13]] 4879 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE47:%.*]] 4880 // CHECK11: omp.body.continue47: 4881 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC48:%.*]] 4882 // CHECK11: omp.inner.for.inc48: 4883 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV38]], align 4, !llvm.access.group [[ACC_GRP13]] 4884 // CHECK11-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP23]], 1 4885 // CHECK11-NEXT: store i32 [[ADD49]], ptr [[DOTOMP_IV38]], align 4, !llvm.access.group [[ACC_GRP13]] 4886 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40]], !llvm.loop [[LOOP14:![0-9]+]] 4887 // CHECK11: omp.inner.for.end50: 4888 // CHECK11-NEXT: store i32 123, ptr [[I39]], align 4 4889 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB52]], align 4 4890 // CHECK11-NEXT: store i32 122, ptr [[DOTOMP_UB53]], align 4 4891 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_LB52]], align 4 4892 // CHECK11-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV54]], align 4 4893 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]] 4894 // CHECK11: omp.inner.for.cond56: 4895 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 4896 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_UB53]], align 4, !llvm.access.group [[ACC_GRP16]] 4897 // CHECK11-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]] 4898 // CHECK11-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]] 4899 // CHECK11: omp.inner.for.body58: 4900 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP16]] 4901 // CHECK11-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP27]], 1 4902 // CHECK11-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]] 4903 // CHECK11-NEXT: store i32 [[ADD60]], ptr [[I55]], align 4, !llvm.access.group [[ACC_GRP16]] 4904 // CHECK11-NEXT: [[A61:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4905 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[I55]], align 4, !llvm.access.group [[ACC_GRP16]] 4906 // CHECK11-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [123 x i32], ptr [[A61]], i32 0, i32 [[TMP28]] 4907 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX62]], align 4, !llvm.access.group [[ACC_GRP16]] 4908 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]] 4909 // CHECK11: omp.body.continue63: 4910 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]] 4911 // CHECK11: omp.inner.for.inc64: 4912 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP16]] 4913 // CHECK11-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP29]], 1 4914 // CHECK11-NEXT: store i32 [[ADD65]], ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP16]] 4915 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP17:![0-9]+]] 4916 // CHECK11: omp.inner.for.end66: 4917 // CHECK11-NEXT: store i32 123, ptr [[I55]], align 4 4918 // CHECK11-NEXT: [[A67:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 4919 // CHECK11-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds [123 x i32], ptr [[A67]], i32 0, i32 0 4920 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARRAYIDX68]], align 4 4921 // CHECK11-NEXT: ret i32 [[TMP30]] 4922 // 4923 // 4924 // CHECK13-LABEL: define {{[^@]+}}@main 4925 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4926 // CHECK13-NEXT: entry: 4927 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4928 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4929 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 4930 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 4931 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 4932 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4933 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 4934 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4935 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 4936 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 4937 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 4938 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 4939 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4940 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4941 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4942 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4943 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 4944 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8 4945 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8 4946 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8 4947 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8 4948 // CHECK13-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 4949 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4950 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 4951 // CHECK13-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4952 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 4953 // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 4954 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4955 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8 4956 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8 4957 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8 4958 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8 4959 // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 4960 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4961 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 4962 // CHECK13-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4963 // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 4964 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 8 4965 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 8 4966 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 8 4967 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 8 4968 // CHECK13-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 4969 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 4970 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 4971 // CHECK13-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4972 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 4973 // CHECK13-NEXT: [[N_CASTED50:%.*]] = alloca i64, align 8 4974 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i64, align 8 4975 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 8 4976 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 8 4977 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 8 4978 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 8 4979 // CHECK13-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 4980 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 4981 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 4982 // CHECK13-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4983 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 4984 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4985 // CHECK13-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 4986 // CHECK13-NEXT: store i32 100, ptr [[N]], align 4 4987 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 4988 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4989 // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 4990 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 4991 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4992 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 4993 // CHECK13-NEXT: store i32 10, ptr [[M]], align 4 4994 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 4995 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 4996 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 4997 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 4998 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false) 4999 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5000 // CHECK13-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8 5001 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5002 // CHECK13-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8 5003 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5004 // CHECK13-NEXT: store ptr null, ptr [[TMP8]], align 8 5005 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5006 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 5007 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5008 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8 5009 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 5010 // CHECK13-NEXT: store ptr null, ptr [[TMP11]], align 8 5011 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5012 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 5013 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5014 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8 5015 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 5016 // CHECK13-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8 5017 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 5018 // CHECK13-NEXT: store ptr null, ptr [[TMP15]], align 8 5019 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5020 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5021 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 5022 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 5023 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 5024 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5025 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 5026 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5027 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5028 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5029 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5030 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 5031 // CHECK13-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 5032 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 5033 // CHECK13-NEXT: store i32 3, ptr [[TMP23]], align 4 5034 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 5035 // CHECK13-NEXT: store i32 3, ptr [[TMP24]], align 4 5036 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 5037 // CHECK13-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8 5038 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 5039 // CHECK13-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8 5040 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 5041 // CHECK13-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8 5042 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 5043 // CHECK13-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 5044 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 5045 // CHECK13-NEXT: store ptr null, ptr [[TMP29]], align 8 5046 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 5047 // CHECK13-NEXT: store ptr null, ptr [[TMP30]], align 8 5048 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 5049 // CHECK13-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 5050 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 5051 // CHECK13-NEXT: store i64 0, ptr [[TMP32]], align 8 5052 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 5053 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 5054 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 5055 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 5056 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 5057 // CHECK13-NEXT: store i32 0, ptr [[TMP35]], align 4 5058 // CHECK13-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 5059 // CHECK13-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 5060 // CHECK13-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5061 // CHECK13: omp_offload.failed: 5062 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 5063 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 5064 // CHECK13: omp_offload.cont: 5065 // CHECK13-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 5066 // CHECK13-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 5067 // CHECK13-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 5068 // CHECK13-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4 5069 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false) 5070 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 5071 // CHECK13-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8 5072 // CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 5073 // CHECK13-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8 5074 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 5075 // CHECK13-NEXT: store ptr null, ptr [[TMP43]], align 8 5076 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 5077 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8 5078 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 5079 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8 5080 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 5081 // CHECK13-NEXT: store ptr null, ptr [[TMP46]], align 8 5082 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 5083 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8 5084 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 5085 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8 5086 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 5087 // CHECK13-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8 5088 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 5089 // CHECK13-NEXT: store ptr null, ptr [[TMP50]], align 8 5090 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 5091 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 5092 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 5093 // CHECK13-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 5094 // CHECK13-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4 5095 // CHECK13-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 5096 // CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0 5097 // CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 5098 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 5099 // CHECK13-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 5100 // CHECK13-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 5101 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1 5102 // CHECK13-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64 5103 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 5104 // CHECK13-NEXT: store i32 3, ptr [[TMP58]], align 4 5105 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 5106 // CHECK13-NEXT: store i32 3, ptr [[TMP59]], align 4 5107 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 5108 // CHECK13-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8 5109 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 5110 // CHECK13-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8 5111 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 5112 // CHECK13-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8 5113 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 5114 // CHECK13-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8 5115 // CHECK13-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 5116 // CHECK13-NEXT: store ptr null, ptr [[TMP64]], align 8 5117 // CHECK13-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 5118 // CHECK13-NEXT: store ptr null, ptr [[TMP65]], align 8 5119 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 5120 // CHECK13-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8 5121 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 5122 // CHECK13-NEXT: store i64 0, ptr [[TMP67]], align 8 5123 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 5124 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4 5125 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 5126 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 5127 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 5128 // CHECK13-NEXT: store i32 0, ptr [[TMP70]], align 4 5129 // CHECK13-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 5130 // CHECK13-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 5131 // CHECK13-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 5132 // CHECK13: omp_offload.failed16: 5133 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 5134 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]] 5135 // CHECK13: omp_offload.cont17: 5136 // CHECK13-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 4 5137 // CHECK13-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4 5138 // CHECK13-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4 5139 // CHECK13-NEXT: store i32 [[TMP74]], ptr [[N_CASTED19]], align 4 5140 // CHECK13-NEXT: [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8 5141 // CHECK13-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 5142 // CHECK13-NEXT: store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5143 // CHECK13-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5144 // CHECK13-NEXT: [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4 5145 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false) 5146 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 5147 // CHECK13-NEXT: store i64 [[TMP75]], ptr [[TMP79]], align 8 5148 // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 5149 // CHECK13-NEXT: store i64 [[TMP75]], ptr [[TMP80]], align 8 5150 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 5151 // CHECK13-NEXT: store ptr null, ptr [[TMP81]], align 8 5152 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 5153 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP82]], align 8 5154 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 5155 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP83]], align 8 5156 // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 5157 // CHECK13-NEXT: store ptr null, ptr [[TMP84]], align 8 5158 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 5159 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 8 5160 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 5161 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP86]], align 8 5162 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 5163 // CHECK13-NEXT: store i64 [[TMP78]], ptr [[TMP87]], align 8 5164 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 5165 // CHECK13-NEXT: store ptr null, ptr [[TMP88]], align 8 5166 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 5167 // CHECK13-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8 5168 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 5169 // CHECK13-NEXT: store i64 [[TMP77]], ptr [[TMP90]], align 8 5170 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 5171 // CHECK13-NEXT: store ptr null, ptr [[TMP91]], align 8 5172 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 5173 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 5174 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 5175 // CHECK13-NEXT: [[TMP95:%.*]] = load i32, ptr [[N]], align 4 5176 // CHECK13-NEXT: store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4 5177 // CHECK13-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 5178 // CHECK13-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0 5179 // CHECK13-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 5180 // CHECK13-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 5181 // CHECK13-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 5182 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 5183 // CHECK13-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1 5184 // CHECK13-NEXT: [[TMP98:%.*]] = zext i32 [[ADD30]] to i64 5185 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 5186 // CHECK13-NEXT: store i32 3, ptr [[TMP99]], align 4 5187 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 5188 // CHECK13-NEXT: store i32 4, ptr [[TMP100]], align 4 5189 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 5190 // CHECK13-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8 5191 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 5192 // CHECK13-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8 5193 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 5194 // CHECK13-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 8 5195 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 5196 // CHECK13-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8 5197 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 5198 // CHECK13-NEXT: store ptr null, ptr [[TMP105]], align 8 5199 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 5200 // CHECK13-NEXT: store ptr null, ptr [[TMP106]], align 8 5201 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 5202 // CHECK13-NEXT: store i64 [[TMP98]], ptr [[TMP107]], align 8 5203 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 5204 // CHECK13-NEXT: store i64 0, ptr [[TMP108]], align 8 5205 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 5206 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4 5207 // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 5208 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4 5209 // CHECK13-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 5210 // CHECK13-NEXT: store i32 0, ptr [[TMP111]], align 4 5211 // CHECK13-NEXT: [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 5212 // CHECK13-NEXT: [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0 5213 // CHECK13-NEXT: br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 5214 // CHECK13: omp_offload.failed32: 5215 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]] 5216 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]] 5217 // CHECK13: omp_offload.cont33: 5218 // CHECK13-NEXT: [[TMP114:%.*]] = load i32, ptr [[N]], align 4 5219 // CHECK13-NEXT: store i32 [[TMP114]], ptr [[N_CASTED34]], align 4 5220 // CHECK13-NEXT: [[TMP115:%.*]] = load i64, ptr [[N_CASTED34]], align 8 5221 // CHECK13-NEXT: [[TMP116:%.*]] = mul nuw i64 [[TMP1]], 4 5222 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES38]], ptr align 8 @.offload_sizes.5, i64 24, i1 false) 5223 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 5224 // CHECK13-NEXT: store i64 [[TMP115]], ptr [[TMP117]], align 8 5225 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 5226 // CHECK13-NEXT: store i64 [[TMP115]], ptr [[TMP118]], align 8 5227 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 0 5228 // CHECK13-NEXT: store ptr null, ptr [[TMP119]], align 8 5229 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 5230 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP120]], align 8 5231 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 5232 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP121]], align 8 5233 // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 1 5234 // CHECK13-NEXT: store ptr null, ptr [[TMP122]], align 8 5235 // CHECK13-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 5236 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP123]], align 8 5237 // CHECK13-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 5238 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP124]], align 8 5239 // CHECK13-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 5240 // CHECK13-NEXT: store i64 [[TMP116]], ptr [[TMP125]], align 8 5241 // CHECK13-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 2 5242 // CHECK13-NEXT: store ptr null, ptr [[TMP126]], align 8 5243 // CHECK13-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 5244 // CHECK13-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 5245 // CHECK13-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 5246 // CHECK13-NEXT: [[TMP130:%.*]] = load i32, ptr [[N]], align 4 5247 // CHECK13-NEXT: store i32 [[TMP130]], ptr [[DOTCAPTURE_EXPR_40]], align 4 5248 // CHECK13-NEXT: [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 5249 // CHECK13-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP131]], 0 5250 // CHECK13-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 5251 // CHECK13-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 5252 // CHECK13-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 5253 // CHECK13-NEXT: [[TMP132:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 5254 // CHECK13-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP132]], 1 5255 // CHECK13-NEXT: [[TMP133:%.*]] = zext i32 [[ADD45]] to i64 5256 // CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 5257 // CHECK13-NEXT: store i32 3, ptr [[TMP134]], align 4 5258 // CHECK13-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 5259 // CHECK13-NEXT: store i32 3, ptr [[TMP135]], align 4 5260 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 5261 // CHECK13-NEXT: store ptr [[TMP127]], ptr [[TMP136]], align 8 5262 // CHECK13-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 5263 // CHECK13-NEXT: store ptr [[TMP128]], ptr [[TMP137]], align 8 5264 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 5265 // CHECK13-NEXT: store ptr [[TMP129]], ptr [[TMP138]], align 8 5266 // CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 5267 // CHECK13-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP139]], align 8 5268 // CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 5269 // CHECK13-NEXT: store ptr null, ptr [[TMP140]], align 8 5270 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 5271 // CHECK13-NEXT: store ptr null, ptr [[TMP141]], align 8 5272 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 5273 // CHECK13-NEXT: store i64 [[TMP133]], ptr [[TMP142]], align 8 5274 // CHECK13-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 5275 // CHECK13-NEXT: store i64 0, ptr [[TMP143]], align 8 5276 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 5277 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4 5278 // CHECK13-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 5279 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP145]], align 4 5280 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 5281 // CHECK13-NEXT: store i32 0, ptr [[TMP146]], align 4 5282 // CHECK13-NEXT: [[TMP147:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 5283 // CHECK13-NEXT: [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0 5284 // CHECK13-NEXT: br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 5285 // CHECK13: omp_offload.failed47: 5286 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP115]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 5287 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]] 5288 // CHECK13: omp_offload.cont48: 5289 // CHECK13-NEXT: [[TMP149:%.*]] = load i32, ptr [[M]], align 4 5290 // CHECK13-NEXT: store i32 [[TMP149]], ptr [[DOTCAPTURE_EXPR_49]], align 4 5291 // CHECK13-NEXT: [[TMP150:%.*]] = load i32, ptr [[N]], align 4 5292 // CHECK13-NEXT: store i32 [[TMP150]], ptr [[N_CASTED50]], align 4 5293 // CHECK13-NEXT: [[TMP151:%.*]] = load i64, ptr [[N_CASTED50]], align 8 5294 // CHECK13-NEXT: [[TMP152:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 5295 // CHECK13-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 5296 // CHECK13-NEXT: [[TMP153:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 8 5297 // CHECK13-NEXT: [[TMP154:%.*]] = mul nuw i64 [[TMP1]], 4 5298 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES55]], ptr align 8 @.offload_sizes.7, i64 32, i1 false) 5299 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 5300 // CHECK13-NEXT: store i64 [[TMP151]], ptr [[TMP155]], align 8 5301 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 5302 // CHECK13-NEXT: store i64 [[TMP151]], ptr [[TMP156]], align 8 5303 // CHECK13-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 0 5304 // CHECK13-NEXT: store ptr null, ptr [[TMP157]], align 8 5305 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 5306 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP158]], align 8 5307 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 5308 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP159]], align 8 5309 // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 1 5310 // CHECK13-NEXT: store ptr null, ptr [[TMP160]], align 8 5311 // CHECK13-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 5312 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP161]], align 8 5313 // CHECK13-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 5314 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP162]], align 8 5315 // CHECK13-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 5316 // CHECK13-NEXT: store i64 [[TMP154]], ptr [[TMP163]], align 8 5317 // CHECK13-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 2 5318 // CHECK13-NEXT: store ptr null, ptr [[TMP164]], align 8 5319 // CHECK13-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 5320 // CHECK13-NEXT: store i64 [[TMP153]], ptr [[TMP165]], align 8 5321 // CHECK13-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 5322 // CHECK13-NEXT: store i64 [[TMP153]], ptr [[TMP166]], align 8 5323 // CHECK13-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 3 5324 // CHECK13-NEXT: store ptr null, ptr [[TMP167]], align 8 5325 // CHECK13-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 5326 // CHECK13-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 5327 // CHECK13-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 5328 // CHECK13-NEXT: [[TMP171:%.*]] = load i32, ptr [[N]], align 4 5329 // CHECK13-NEXT: store i32 [[TMP171]], ptr [[DOTCAPTURE_EXPR_57]], align 4 5330 // CHECK13-NEXT: [[TMP172:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 5331 // CHECK13-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP172]], 0 5332 // CHECK13-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 5333 // CHECK13-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 5334 // CHECK13-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 5335 // CHECK13-NEXT: [[TMP173:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 5336 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP173]], 1 5337 // CHECK13-NEXT: [[TMP174:%.*]] = zext i32 [[ADD62]] to i64 5338 // CHECK13-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 5339 // CHECK13-NEXT: store i32 3, ptr [[TMP175]], align 4 5340 // CHECK13-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 5341 // CHECK13-NEXT: store i32 4, ptr [[TMP176]], align 4 5342 // CHECK13-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 5343 // CHECK13-NEXT: store ptr [[TMP168]], ptr [[TMP177]], align 8 5344 // CHECK13-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 5345 // CHECK13-NEXT: store ptr [[TMP169]], ptr [[TMP178]], align 8 5346 // CHECK13-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 5347 // CHECK13-NEXT: store ptr [[TMP170]], ptr [[TMP179]], align 8 5348 // CHECK13-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 5349 // CHECK13-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP180]], align 8 5350 // CHECK13-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 5351 // CHECK13-NEXT: store ptr null, ptr [[TMP181]], align 8 5352 // CHECK13-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 5353 // CHECK13-NEXT: store ptr null, ptr [[TMP182]], align 8 5354 // CHECK13-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 5355 // CHECK13-NEXT: store i64 [[TMP174]], ptr [[TMP183]], align 8 5356 // CHECK13-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 5357 // CHECK13-NEXT: store i64 0, ptr [[TMP184]], align 8 5358 // CHECK13-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 5359 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP185]], align 4 5360 // CHECK13-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 5361 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP186]], align 4 5362 // CHECK13-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 5363 // CHECK13-NEXT: store i32 0, ptr [[TMP187]], align 4 5364 // CHECK13-NEXT: [[TMP188:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 5365 // CHECK13-NEXT: [[TMP189:%.*]] = icmp ne i32 [[TMP188]], 0 5366 // CHECK13-NEXT: br i1 [[TMP189]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 5367 // CHECK13: omp_offload.failed64: 5368 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP153]]) #[[ATTR3]] 5369 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]] 5370 // CHECK13: omp_offload.cont65: 5371 // CHECK13-NEXT: [[TMP190:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 5372 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP190]]) 5373 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 5374 // CHECK13-NEXT: [[TMP191:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 5375 // CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP191]]) 5376 // CHECK13-NEXT: [[TMP192:%.*]] = load i32, ptr [[RETVAL]], align 4 5377 // CHECK13-NEXT: ret i32 [[TMP192]] 5378 // 5379 // 5380 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 5381 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 5382 // CHECK13-NEXT: entry: 5383 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5384 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5385 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5386 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5387 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5388 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5389 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5390 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5391 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5392 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5393 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 5394 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 5395 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 5396 // CHECK13-NEXT: ret void 5397 // 5398 // 5399 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 5400 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5401 // CHECK13-NEXT: entry: 5402 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5403 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5404 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5405 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5406 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5407 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5408 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5409 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5410 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5411 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5412 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5413 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5414 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5415 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5416 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 5417 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5418 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5419 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5420 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5421 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5422 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5423 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5424 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5425 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5426 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5427 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5428 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5429 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5430 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5431 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5432 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5433 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5434 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5435 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5436 // CHECK13: omp.precond.then: 5437 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5438 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5439 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 5440 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5441 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5442 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5443 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 5444 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5445 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5446 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5447 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5448 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5449 // CHECK13: cond.true: 5450 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5451 // CHECK13-NEXT: br label [[COND_END:%.*]] 5452 // CHECK13: cond.false: 5453 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5454 // CHECK13-NEXT: br label [[COND_END]] 5455 // CHECK13: cond.end: 5456 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5457 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5458 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5459 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 5460 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5461 // CHECK13: omp.inner.for.cond: 5462 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 5463 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 5464 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5465 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5466 // CHECK13: omp.inner.for.body: 5467 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP13]] 5468 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 5469 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 5470 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5471 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]] 5472 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP13]] 5473 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP13]] 5474 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP13]] 5475 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5476 // CHECK13: omp.inner.for.inc: 5477 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 5478 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP13]] 5479 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5480 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 5481 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 5482 // CHECK13: omp.inner.for.end: 5483 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5484 // CHECK13: omp.loop.exit: 5485 // CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5486 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 5487 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 5488 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5489 // CHECK13-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5490 // CHECK13-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5491 // CHECK13: .omp.final.then: 5492 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5493 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 5494 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 5495 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 5496 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 5497 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 5498 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 5499 // CHECK13: .omp.final.done: 5500 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5501 // CHECK13: omp.precond.end: 5502 // CHECK13-NEXT: ret void 5503 // 5504 // 5505 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 5506 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5507 // CHECK13-NEXT: entry: 5508 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5509 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5510 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5511 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5512 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5513 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5514 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5515 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5516 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5517 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5518 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5519 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5520 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5521 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5522 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5523 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5524 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5525 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5526 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5527 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5528 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5529 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5530 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5531 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5532 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5533 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5534 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5535 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5536 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5537 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5538 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5539 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5540 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5541 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5542 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5543 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5544 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5545 // CHECK13: omp.precond.then: 5546 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5547 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5548 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5549 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5550 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 5551 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5552 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 5553 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5554 // CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 5555 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5556 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5557 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5558 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 5559 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5560 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5561 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5562 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5563 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5564 // CHECK13: cond.true: 5565 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5566 // CHECK13-NEXT: br label [[COND_END:%.*]] 5567 // CHECK13: cond.false: 5568 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5569 // CHECK13-NEXT: br label [[COND_END]] 5570 // CHECK13: cond.end: 5571 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5572 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5573 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5574 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 5575 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5576 // CHECK13: omp.inner.for.cond: 5577 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]] 5578 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 5579 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5580 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5581 // CHECK13: omp.inner.for.body: 5582 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 5583 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 5584 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5585 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP17]] 5586 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP17]] 5587 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 5588 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 5589 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]] 5590 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5591 // CHECK13: omp.body.continue: 5592 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5593 // CHECK13: omp.inner.for.inc: 5594 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 5595 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 5596 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 5597 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 5598 // CHECK13: omp.inner.for.end: 5599 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5600 // CHECK13: omp.loop.exit: 5601 // CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5602 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 5603 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 5604 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5605 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 5606 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5607 // CHECK13: .omp.final.then: 5608 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5609 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 5610 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 5611 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 5612 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 5613 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 5614 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 5615 // CHECK13: .omp.final.done: 5616 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5617 // CHECK13: omp.precond.end: 5618 // CHECK13-NEXT: ret void 5619 // 5620 // 5621 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 5622 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5623 // CHECK13-NEXT: entry: 5624 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5625 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5626 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5627 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5628 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5629 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5630 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5631 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5632 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5633 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5634 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 5635 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 5636 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 5637 // CHECK13-NEXT: ret void 5638 // 5639 // 5640 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 5641 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5642 // CHECK13-NEXT: entry: 5643 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5644 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5645 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5646 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5647 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5648 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5649 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5650 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5651 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5652 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5653 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5654 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5655 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5656 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5657 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 5658 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5659 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5660 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5661 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5662 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5663 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5664 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5665 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5666 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5667 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5668 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5669 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5670 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5671 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5672 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5673 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5674 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5675 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5676 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5677 // CHECK13: omp.precond.then: 5678 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5679 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5680 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 5681 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5682 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5683 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5684 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 5685 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5686 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5687 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5688 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5689 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5690 // CHECK13: cond.true: 5691 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5692 // CHECK13-NEXT: br label [[COND_END:%.*]] 5693 // CHECK13: cond.false: 5694 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5695 // CHECK13-NEXT: br label [[COND_END]] 5696 // CHECK13: cond.end: 5697 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5698 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5699 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5700 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 5701 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5702 // CHECK13: omp.inner.for.cond: 5703 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 5704 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 5705 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5706 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5707 // CHECK13: omp.inner.for.body: 5708 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP22]] 5709 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 5710 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 5711 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5712 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP22]] 5713 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP22]] 5714 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP22]] 5715 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP22]] 5716 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5717 // CHECK13: omp.inner.for.inc: 5718 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 5719 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP22]] 5720 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5721 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 5722 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 5723 // CHECK13: omp.inner.for.end: 5724 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5725 // CHECK13: omp.loop.exit: 5726 // CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5727 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 5728 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 5729 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5730 // CHECK13-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5731 // CHECK13-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5732 // CHECK13: .omp.final.then: 5733 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5734 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 5735 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 5736 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 5737 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 5738 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 5739 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 5740 // CHECK13: .omp.final.done: 5741 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5742 // CHECK13: omp.precond.end: 5743 // CHECK13-NEXT: ret void 5744 // 5745 // 5746 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 5747 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5748 // CHECK13-NEXT: entry: 5749 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5750 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5751 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5752 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5753 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5754 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5755 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5756 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5757 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5758 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5759 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5760 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5761 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5762 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5763 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5764 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5765 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5766 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5767 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5768 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5769 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5770 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5771 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5772 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5773 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5774 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5775 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5776 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5777 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5778 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5779 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5780 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5781 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5782 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5783 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5784 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5785 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5786 // CHECK13: omp.precond.then: 5787 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5788 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5789 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5790 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5791 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 5792 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5793 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 5794 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5795 // CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 5796 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5797 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5798 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5799 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 5800 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5801 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5802 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5803 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5804 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5805 // CHECK13: cond.true: 5806 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5807 // CHECK13-NEXT: br label [[COND_END:%.*]] 5808 // CHECK13: cond.false: 5809 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5810 // CHECK13-NEXT: br label [[COND_END]] 5811 // CHECK13: cond.end: 5812 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5813 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5814 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5815 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 5816 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5817 // CHECK13: omp.inner.for.cond: 5818 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 5819 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 5820 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5821 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5822 // CHECK13: omp.inner.for.body: 5823 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 5824 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 5825 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5826 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP25]] 5827 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP25]] 5828 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 5829 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 5830 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 5831 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5832 // CHECK13: omp.body.continue: 5833 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5834 // CHECK13: omp.inner.for.inc: 5835 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 5836 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 5837 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 5838 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 5839 // CHECK13: omp.inner.for.end: 5840 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5841 // CHECK13: omp.loop.exit: 5842 // CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5843 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 5844 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 5845 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5846 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 5847 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5848 // CHECK13: .omp.final.then: 5849 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5850 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 5851 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 5852 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 5853 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 5854 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 5855 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 5856 // CHECK13: .omp.final.done: 5857 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5858 // CHECK13: omp.precond.end: 5859 // CHECK13-NEXT: ret void 5860 // 5861 // 5862 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 5863 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5864 // CHECK13-NEXT: entry: 5865 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5866 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5867 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5868 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5869 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5870 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5871 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5872 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5873 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5874 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5875 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5876 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5877 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5878 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 5879 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 5880 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5881 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5882 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5883 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 5884 // CHECK13-NEXT: ret void 5885 // 5886 // 5887 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 5888 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5889 // CHECK13-NEXT: entry: 5890 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5891 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5892 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5893 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5894 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5895 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5896 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5897 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5898 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5899 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5900 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5901 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5902 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5903 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5904 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5905 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5906 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5907 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5908 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5909 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5910 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5911 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5912 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5913 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5914 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5915 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5916 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5917 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5918 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5919 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5920 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5921 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5922 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 5923 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5924 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5925 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5926 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5927 // CHECK13: omp.precond.then: 5928 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5929 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5930 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 5931 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5932 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5933 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5934 // CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5935 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5936 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 5937 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5938 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5939 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 5940 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5941 // CHECK13: cond.true: 5942 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5943 // CHECK13-NEXT: br label [[COND_END:%.*]] 5944 // CHECK13: cond.false: 5945 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5946 // CHECK13-NEXT: br label [[COND_END]] 5947 // CHECK13: cond.end: 5948 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 5949 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5950 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5951 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 5952 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5953 // CHECK13: omp.inner.for.cond: 5954 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 5955 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP28]] 5956 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 5957 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 5958 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5959 // CHECK13: omp.inner.for.body: 5960 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 5961 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 5962 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 5963 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 5964 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP28]] 5965 // CHECK13-NEXT: store i32 [[TMP20]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP28]] 5966 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP28]] 5967 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP28]] 5968 // CHECK13-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP28]] 5969 // CHECK13-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP28]] 5970 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP23]]), !llvm.access.group [[ACC_GRP28]] 5971 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5972 // CHECK13: omp.inner.for.inc: 5973 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 5974 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP28]] 5975 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 5976 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 5977 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 5978 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP28]] 5979 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 5980 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 5981 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 5982 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP28]] 5983 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 5984 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 5985 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 5986 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP28]] 5987 // CHECK13-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]] 5988 // CHECK13-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 5989 // CHECK13: cond.true11: 5990 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP28]] 5991 // CHECK13-NEXT: br label [[COND_END13:%.*]] 5992 // CHECK13: cond.false12: 5993 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 5994 // CHECK13-NEXT: br label [[COND_END13]] 5995 // CHECK13: cond.end13: 5996 // CHECK13-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE11]] ], [ [[TMP33]], [[COND_FALSE12]] ] 5997 // CHECK13-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 5998 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 5999 // CHECK13-NEXT: store i32 [[TMP34]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 6000 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 6001 // CHECK13: omp.inner.for.end: 6002 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6003 // CHECK13: omp.loop.exit: 6004 // CHECK13-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6005 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 6006 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP36]]) 6007 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6008 // CHECK13-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 6009 // CHECK13-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6010 // CHECK13: .omp.final.then: 6011 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6012 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP39]], 0 6013 // CHECK13-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 6014 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1 6015 // CHECK13-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]] 6016 // CHECK13-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 6017 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6018 // CHECK13: .omp.final.done: 6019 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 6020 // CHECK13: omp.precond.end: 6021 // CHECK13-NEXT: ret void 6022 // 6023 // 6024 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 6025 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6026 // CHECK13-NEXT: entry: 6027 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6028 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6029 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6030 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6031 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6032 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6033 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6034 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6035 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6036 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6037 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6038 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6039 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6040 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6041 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6042 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6043 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6044 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 6045 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6046 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6047 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6048 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6049 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6050 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6051 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6052 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6053 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6054 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6055 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6056 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6057 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6058 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 6059 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6060 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6061 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 6062 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 6063 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6064 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 6065 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6066 // CHECK13: omp.precond.then: 6067 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6068 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6069 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 6070 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6071 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 6072 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6073 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 6074 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6075 // CHECK13-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 6076 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6077 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6078 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6079 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 6080 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6081 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6082 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6083 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6084 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6085 // CHECK13: cond.true: 6086 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6087 // CHECK13-NEXT: br label [[COND_END:%.*]] 6088 // CHECK13: cond.false: 6089 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6090 // CHECK13-NEXT: br label [[COND_END]] 6091 // CHECK13: cond.end: 6092 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6093 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6094 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6095 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 6096 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6097 // CHECK13: omp.inner.for.cond: 6098 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31:![0-9]+]] 6099 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP31]] 6100 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6101 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6102 // CHECK13: omp.inner.for.body: 6103 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 6104 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 6105 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6106 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP31]] 6107 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP31]] 6108 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 6109 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 6110 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP31]] 6111 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6112 // CHECK13: omp.body.continue: 6113 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6114 // CHECK13: omp.inner.for.inc: 6115 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 6116 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 6117 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 6118 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] 6119 // CHECK13: omp.inner.for.end: 6120 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6121 // CHECK13: omp.loop.exit: 6122 // CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6123 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 6124 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 6125 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6126 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 6127 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6128 // CHECK13: .omp.final.then: 6129 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6130 // CHECK13-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP24]], 0 6131 // CHECK13-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 6132 // CHECK13-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 6133 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 6134 // CHECK13-NEXT: store i32 [[ADD12]], ptr [[I5]], align 4 6135 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6136 // CHECK13: .omp.final.done: 6137 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 6138 // CHECK13: omp.precond.end: 6139 // CHECK13-NEXT: ret void 6140 // 6141 // 6142 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 6143 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6144 // CHECK13-NEXT: entry: 6145 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6146 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6147 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6148 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 6149 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6150 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6151 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6152 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6153 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6154 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6155 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 6156 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 6157 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 6158 // CHECK13-NEXT: ret void 6159 // 6160 // 6161 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 6162 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6163 // CHECK13-NEXT: entry: 6164 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6165 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6166 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6167 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6168 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6169 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6170 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6171 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6172 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6173 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6174 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6175 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6176 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6177 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6178 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 6179 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 6180 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6181 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6182 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6183 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6184 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6185 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6186 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6187 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6188 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 6189 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6190 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 6191 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6192 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6193 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6194 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 6195 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6196 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 6197 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6198 // CHECK13: omp.precond.then: 6199 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6200 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6201 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 6202 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6203 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6204 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6205 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 6206 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6207 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6208 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6209 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 6210 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6211 // CHECK13: cond.true: 6212 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6213 // CHECK13-NEXT: br label [[COND_END:%.*]] 6214 // CHECK13: cond.false: 6215 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6216 // CHECK13-NEXT: br label [[COND_END]] 6217 // CHECK13: cond.end: 6218 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 6219 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6220 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6221 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 6222 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6223 // CHECK13: omp.inner.for.cond: 6224 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 6225 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 6226 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 6227 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6228 // CHECK13: omp.inner.for.body: 6229 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP34]] 6230 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 6231 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 6232 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 6233 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP34]] 6234 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP34]] 6235 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP34]] 6236 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP34]] 6237 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6238 // CHECK13: omp.inner.for.inc: 6239 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 6240 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP34]] 6241 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 6242 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 6243 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] 6244 // CHECK13: omp.inner.for.end: 6245 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6246 // CHECK13: omp.loop.exit: 6247 // CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6248 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 6249 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 6250 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6251 // CHECK13-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 6252 // CHECK13-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6253 // CHECK13: .omp.final.then: 6254 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6255 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 6256 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 6257 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 6258 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 6259 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 6260 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6261 // CHECK13: .omp.final.done: 6262 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 6263 // CHECK13: omp.precond.end: 6264 // CHECK13-NEXT: ret void 6265 // 6266 // 6267 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 6268 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6269 // CHECK13-NEXT: entry: 6270 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6271 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6272 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6273 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6274 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6275 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6276 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6277 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6278 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6279 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6280 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6281 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6282 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6283 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6284 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6285 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6286 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 6287 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6288 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6289 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6290 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6291 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6292 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6293 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6294 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6295 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6296 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6297 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 6298 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6299 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 6300 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6301 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6302 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6303 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 6304 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6305 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 6306 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6307 // CHECK13: omp.precond.then: 6308 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6309 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6310 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 6311 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6312 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 6313 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6314 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 6315 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6316 // CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 6317 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6318 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6319 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6320 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6321 // CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6322 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 6323 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 6324 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6325 // CHECK13: omp.dispatch.cond: 6326 // CHECK13-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6327 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 6328 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 6329 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 6330 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6331 // CHECK13: omp.dispatch.body: 6332 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6333 // CHECK13-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 6334 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6335 // CHECK13: omp.inner.for.cond: 6336 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37:![0-9]+]] 6337 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP37]] 6338 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 6339 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6340 // CHECK13: omp.inner.for.body: 6341 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 6342 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 6343 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6344 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP37]] 6345 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP37]] 6346 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 6347 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 6348 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP37]] 6349 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6350 // CHECK13: omp.body.continue: 6351 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6352 // CHECK13: omp.inner.for.inc: 6353 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 6354 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 6355 // CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 6356 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] 6357 // CHECK13: omp.inner.for.end: 6358 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6359 // CHECK13: omp.dispatch.inc: 6360 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6361 // CHECK13: omp.dispatch.end: 6362 // CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6363 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 6364 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 6365 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6366 // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 6367 // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6368 // CHECK13: .omp.final.then: 6369 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6370 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 6371 // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 6372 // CHECK13-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 6373 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 6374 // CHECK13-NEXT: store i32 [[ADD10]], ptr [[I4]], align 4 6375 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6376 // CHECK13: .omp.final.done: 6377 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 6378 // CHECK13: omp.precond.end: 6379 // CHECK13-NEXT: ret void 6380 // 6381 // 6382 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 6383 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6384 // CHECK13-NEXT: entry: 6385 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6386 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6387 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6388 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6389 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 6390 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6391 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6392 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6393 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6394 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6395 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6396 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6397 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6398 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 6399 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 6400 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6401 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 6402 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6403 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 6404 // CHECK13-NEXT: ret void 6405 // 6406 // 6407 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 6408 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6409 // CHECK13-NEXT: entry: 6410 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6411 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6412 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6413 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6414 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6415 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6416 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6417 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6418 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6419 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6420 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6421 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6422 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6423 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6424 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6425 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 6426 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 6427 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6428 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6429 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6430 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6431 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6432 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6433 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6434 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6435 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6436 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6437 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6438 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6439 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 6440 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6441 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6442 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 6443 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 6444 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6445 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 6446 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6447 // CHECK13: omp.precond.then: 6448 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6449 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6450 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 6451 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6452 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6453 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6454 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 6455 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6456 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6457 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6458 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 6459 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6460 // CHECK13: cond.true: 6461 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6462 // CHECK13-NEXT: br label [[COND_END:%.*]] 6463 // CHECK13: cond.false: 6464 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6465 // CHECK13-NEXT: br label [[COND_END]] 6466 // CHECK13: cond.end: 6467 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 6468 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6469 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6470 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 6471 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6472 // CHECK13: omp.inner.for.cond: 6473 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40:![0-9]+]] 6474 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP40]] 6475 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 6476 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6477 // CHECK13: omp.inner.for.body: 6478 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP40]] 6479 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 6480 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP40]] 6481 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 6482 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP40]] 6483 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP40]] 6484 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP40]] 6485 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP40]] 6486 // CHECK13-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP40]] 6487 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP40]] 6488 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP22]]), !llvm.access.group [[ACC_GRP40]] 6489 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6490 // CHECK13: omp.inner.for.inc: 6491 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 6492 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP40]] 6493 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 6494 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 6495 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] 6496 // CHECK13: omp.inner.for.end: 6497 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6498 // CHECK13: omp.loop.exit: 6499 // CHECK13-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6500 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 6501 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 6502 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6503 // CHECK13-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 6504 // CHECK13-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6505 // CHECK13: .omp.final.then: 6506 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6507 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 6508 // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 6509 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 6510 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 6511 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 6512 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6513 // CHECK13: .omp.final.done: 6514 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 6515 // CHECK13: omp.precond.end: 6516 // CHECK13-NEXT: ret void 6517 // 6518 // 6519 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 6520 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6521 // CHECK13-NEXT: entry: 6522 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6523 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6524 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6525 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6526 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6527 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 6528 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6529 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6530 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6531 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6532 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6533 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6534 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6535 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6536 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6537 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6538 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6539 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 6540 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6541 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6542 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6543 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6544 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6545 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 6546 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6547 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6548 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 6549 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6550 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 6551 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6552 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6553 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 6554 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6555 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6556 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 6557 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 6558 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6559 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 6560 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6561 // CHECK13: omp.precond.then: 6562 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6563 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6564 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 6565 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6566 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 6567 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6568 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 6569 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6570 // CHECK13-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 6571 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6572 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6573 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6574 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6575 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6576 // CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6577 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 6578 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 6579 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6580 // CHECK13: omp.dispatch.cond: 6581 // CHECK13-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6582 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 6583 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 6584 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 6585 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6586 // CHECK13: omp.dispatch.body: 6587 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6588 // CHECK13-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6589 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6590 // CHECK13: omp.inner.for.cond: 6591 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]] 6592 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 6593 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6594 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6595 // CHECK13: omp.inner.for.body: 6596 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 6597 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 6598 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6599 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP43]] 6600 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP43]] 6601 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 6602 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 6603 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP43]] 6604 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6605 // CHECK13: omp.body.continue: 6606 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6607 // CHECK13: omp.inner.for.inc: 6608 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 6609 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 6610 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 6611 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] 6612 // CHECK13: omp.inner.for.end: 6613 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6614 // CHECK13: omp.dispatch.inc: 6615 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6616 // CHECK13: omp.dispatch.end: 6617 // CHECK13-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6618 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 6619 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 6620 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6621 // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 6622 // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6623 // CHECK13: .omp.final.then: 6624 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6625 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP26]], 0 6626 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 6627 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 6628 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 6629 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I5]], align 4 6630 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6631 // CHECK13: .omp.final.done: 6632 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 6633 // CHECK13: omp.precond.end: 6634 // CHECK13-NEXT: ret void 6635 // 6636 // 6637 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 6638 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 6639 // CHECK13-NEXT: entry: 6640 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6641 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 6642 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 6643 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 6644 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 6645 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 6646 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6647 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 6648 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 6649 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 6650 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 6651 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 6652 // CHECK13-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6653 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6654 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6655 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8 6656 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8 6657 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8 6658 // CHECK13-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 6659 // CHECK13-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6660 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8 6661 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8 6662 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8 6663 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 6664 // CHECK13-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6665 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 6666 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8 6667 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 8 6668 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 8 6669 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 8 6670 // CHECK13-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 6671 // CHECK13-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6672 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 6673 // CHECK13-NEXT: store i32 10, ptr [[M]], align 4 6674 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6675 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 6676 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6677 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 6678 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6679 // CHECK13-NEXT: store ptr null, ptr [[TMP2]], align 8 6680 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6681 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6682 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 6683 // CHECK13-NEXT: store i32 3, ptr [[TMP5]], align 4 6684 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 6685 // CHECK13-NEXT: store i32 1, ptr [[TMP6]], align 4 6686 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 6687 // CHECK13-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 6688 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 6689 // CHECK13-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 6690 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 6691 // CHECK13-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 8 6692 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 6693 // CHECK13-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8 6694 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 6695 // CHECK13-NEXT: store ptr null, ptr [[TMP11]], align 8 6696 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 6697 // CHECK13-NEXT: store ptr null, ptr [[TMP12]], align 8 6698 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 6699 // CHECK13-NEXT: store i64 10, ptr [[TMP13]], align 8 6700 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 6701 // CHECK13-NEXT: store i64 0, ptr [[TMP14]], align 8 6702 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 6703 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 6704 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 6705 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 6706 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 6707 // CHECK13-NEXT: store i32 0, ptr [[TMP17]], align 4 6708 // CHECK13-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 6709 // CHECK13-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 6710 // CHECK13-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6711 // CHECK13: omp_offload.failed: 6712 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 6713 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 6714 // CHECK13: omp_offload.cont: 6715 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 6716 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP20]], align 8 6717 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 6718 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP21]], align 8 6719 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 6720 // CHECK13-NEXT: store ptr null, ptr [[TMP22]], align 8 6721 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 6722 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 6723 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 6724 // CHECK13-NEXT: store i32 3, ptr [[TMP25]], align 4 6725 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 6726 // CHECK13-NEXT: store i32 1, ptr [[TMP26]], align 4 6727 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 6728 // CHECK13-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 6729 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 6730 // CHECK13-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 6731 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 6732 // CHECK13-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 8 6733 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 6734 // CHECK13-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8 6735 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 6736 // CHECK13-NEXT: store ptr null, ptr [[TMP31]], align 8 6737 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 6738 // CHECK13-NEXT: store ptr null, ptr [[TMP32]], align 8 6739 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 6740 // CHECK13-NEXT: store i64 10, ptr [[TMP33]], align 8 6741 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 6742 // CHECK13-NEXT: store i64 0, ptr [[TMP34]], align 8 6743 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 6744 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 6745 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 6746 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 6747 // CHECK13-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 6748 // CHECK13-NEXT: store i32 0, ptr [[TMP37]], align 4 6749 // CHECK13-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 6750 // CHECK13-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 6751 // CHECK13-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 6752 // CHECK13: omp_offload.failed6: 6753 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 6754 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]] 6755 // CHECK13: omp_offload.cont7: 6756 // CHECK13-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 6757 // CHECK13-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 6758 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6759 // CHECK13-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 6760 // CHECK13-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6761 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 6762 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP43]], align 8 6763 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 6764 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP44]], align 8 6765 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 6766 // CHECK13-NEXT: store ptr null, ptr [[TMP45]], align 8 6767 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 6768 // CHECK13-NEXT: store i64 [[TMP42]], ptr [[TMP46]], align 8 6769 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 6770 // CHECK13-NEXT: store i64 [[TMP42]], ptr [[TMP47]], align 8 6771 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 6772 // CHECK13-NEXT: store ptr null, ptr [[TMP48]], align 8 6773 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 6774 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 6775 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 6776 // CHECK13-NEXT: store i32 3, ptr [[TMP51]], align 4 6777 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 6778 // CHECK13-NEXT: store i32 2, ptr [[TMP52]], align 4 6779 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 6780 // CHECK13-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 8 6781 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 6782 // CHECK13-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 8 6783 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 6784 // CHECK13-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 8 6785 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 6786 // CHECK13-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 8 6787 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 6788 // CHECK13-NEXT: store ptr null, ptr [[TMP57]], align 8 6789 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 6790 // CHECK13-NEXT: store ptr null, ptr [[TMP58]], align 8 6791 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 6792 // CHECK13-NEXT: store i64 10, ptr [[TMP59]], align 8 6793 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 6794 // CHECK13-NEXT: store i64 0, ptr [[TMP60]], align 8 6795 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 6796 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 6797 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 6798 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 6799 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 6800 // CHECK13-NEXT: store i32 0, ptr [[TMP63]], align 4 6801 // CHECK13-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 6802 // CHECK13-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 6803 // CHECK13-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 6804 // CHECK13: omp_offload.failed13: 6805 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i64 [[TMP42]]) #[[ATTR3]] 6806 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT14]] 6807 // CHECK13: omp_offload.cont14: 6808 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 6809 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP66]], align 8 6810 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 6811 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP67]], align 8 6812 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0 6813 // CHECK13-NEXT: store ptr null, ptr [[TMP68]], align 8 6814 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 6815 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 6816 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 6817 // CHECK13-NEXT: store i32 3, ptr [[TMP71]], align 4 6818 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 6819 // CHECK13-NEXT: store i32 1, ptr [[TMP72]], align 4 6820 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 6821 // CHECK13-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 8 6822 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 6823 // CHECK13-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 8 6824 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 6825 // CHECK13-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 8 6826 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 6827 // CHECK13-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 8 6828 // CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 6829 // CHECK13-NEXT: store ptr null, ptr [[TMP77]], align 8 6830 // CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 6831 // CHECK13-NEXT: store ptr null, ptr [[TMP78]], align 8 6832 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 6833 // CHECK13-NEXT: store i64 10, ptr [[TMP79]], align 8 6834 // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 6835 // CHECK13-NEXT: store i64 0, ptr [[TMP80]], align 8 6836 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 6837 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 6838 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 6839 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 6840 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 6841 // CHECK13-NEXT: store i32 0, ptr [[TMP83]], align 4 6842 // CHECK13-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 6843 // CHECK13-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 6844 // CHECK13-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 6845 // CHECK13: omp_offload.failed20: 6846 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 6847 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT21]] 6848 // CHECK13: omp_offload.cont21: 6849 // CHECK13-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 6850 // CHECK13-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 6851 // CHECK13-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 6852 // CHECK13-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 6853 // CHECK13-NEXT: [[TMP88:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 8 6854 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6855 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP89]], align 8 6856 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6857 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP90]], align 8 6858 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 6859 // CHECK13-NEXT: store ptr null, ptr [[TMP91]], align 8 6860 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 6861 // CHECK13-NEXT: store i64 [[TMP88]], ptr [[TMP92]], align 8 6862 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 6863 // CHECK13-NEXT: store i64 [[TMP88]], ptr [[TMP93]], align 8 6864 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1 6865 // CHECK13-NEXT: store ptr null, ptr [[TMP94]], align 8 6866 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6867 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6868 // CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 6869 // CHECK13-NEXT: store i32 3, ptr [[TMP97]], align 4 6870 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 6871 // CHECK13-NEXT: store i32 2, ptr [[TMP98]], align 4 6872 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 6873 // CHECK13-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 8 6874 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 6875 // CHECK13-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 8 6876 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 6877 // CHECK13-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 8 6878 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 6879 // CHECK13-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 8 6880 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 6881 // CHECK13-NEXT: store ptr null, ptr [[TMP103]], align 8 6882 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 6883 // CHECK13-NEXT: store ptr null, ptr [[TMP104]], align 8 6884 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 6885 // CHECK13-NEXT: store i64 10, ptr [[TMP105]], align 8 6886 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 6887 // CHECK13-NEXT: store i64 0, ptr [[TMP106]], align 8 6888 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 6889 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 6890 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 6891 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 6892 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 6893 // CHECK13-NEXT: store i32 0, ptr [[TMP109]], align 4 6894 // CHECK13-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 6895 // CHECK13-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 6896 // CHECK13-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 6897 // CHECK13: omp_offload.failed29: 6898 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i64 [[TMP88]]) #[[ATTR3]] 6899 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT30]] 6900 // CHECK13: omp_offload.cont30: 6901 // CHECK13-NEXT: ret i32 0 6902 // 6903 // 6904 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 6905 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6906 // CHECK13-NEXT: entry: 6907 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6908 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6909 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6910 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 6911 // CHECK13-NEXT: ret void 6912 // 6913 // 6914 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 6915 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6916 // CHECK13-NEXT: entry: 6917 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6918 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6919 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6920 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6921 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6922 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6923 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6924 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6925 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6926 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6927 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6928 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6929 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6930 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6931 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6932 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 6933 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6934 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6935 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6936 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6937 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6938 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6939 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6940 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6941 // CHECK13: cond.true: 6942 // CHECK13-NEXT: br label [[COND_END:%.*]] 6943 // CHECK13: cond.false: 6944 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6945 // CHECK13-NEXT: br label [[COND_END]] 6946 // CHECK13: cond.end: 6947 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6948 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6949 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6950 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6951 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6952 // CHECK13: omp.inner.for.cond: 6953 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]] 6954 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 6955 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6956 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6957 // CHECK13: omp.inner.for.body: 6958 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP46]] 6959 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6960 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 6961 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6962 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP46]] 6963 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6964 // CHECK13: omp.inner.for.inc: 6965 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 6966 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP46]] 6967 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6968 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 6969 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] 6970 // CHECK13: omp.inner.for.end: 6971 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6972 // CHECK13: omp.loop.exit: 6973 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6974 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6975 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 6976 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6977 // CHECK13: .omp.final.then: 6978 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 6979 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 6980 // CHECK13: .omp.final.done: 6981 // CHECK13-NEXT: ret void 6982 // 6983 // 6984 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 6985 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6986 // CHECK13-NEXT: entry: 6987 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6988 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6989 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6990 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6991 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6992 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6993 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6994 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6995 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6996 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6997 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6998 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6999 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7000 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7001 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7002 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7003 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7004 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7005 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7006 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 7007 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7008 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 7009 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7010 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 7011 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7012 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7013 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7014 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7015 // CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7016 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 7017 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7018 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7019 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 7020 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7021 // CHECK13: cond.true: 7022 // CHECK13-NEXT: br label [[COND_END:%.*]] 7023 // CHECK13: cond.false: 7024 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7025 // CHECK13-NEXT: br label [[COND_END]] 7026 // CHECK13: cond.end: 7027 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 7028 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7029 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7030 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 7031 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7032 // CHECK13: omp.inner.for.cond: 7033 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]] 7034 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP49]] 7035 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 7036 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7037 // CHECK13: omp.inner.for.body: 7038 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 7039 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 7040 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7041 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP49]] 7042 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP49]] 7043 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 7044 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 7045 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP49]] 7046 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7047 // CHECK13: omp.body.continue: 7048 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7049 // CHECK13: omp.inner.for.inc: 7050 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 7051 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 7052 // CHECK13-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 7053 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] 7054 // CHECK13: omp.inner.for.end: 7055 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7056 // CHECK13: omp.loop.exit: 7057 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 7058 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7059 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 7060 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7061 // CHECK13: .omp.final.then: 7062 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7063 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7064 // CHECK13: .omp.final.done: 7065 // CHECK13-NEXT: ret void 7066 // 7067 // 7068 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 7069 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7070 // CHECK13-NEXT: entry: 7071 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7072 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7073 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7074 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 7075 // CHECK13-NEXT: ret void 7076 // 7077 // 7078 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 7079 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7080 // CHECK13-NEXT: entry: 7081 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7082 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7083 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7084 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7085 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7086 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7087 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7088 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7089 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7090 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7091 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7092 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7093 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7094 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7095 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7096 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 7097 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7098 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7099 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7100 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 7101 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7102 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7103 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 7104 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7105 // CHECK13: cond.true: 7106 // CHECK13-NEXT: br label [[COND_END:%.*]] 7107 // CHECK13: cond.false: 7108 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7109 // CHECK13-NEXT: br label [[COND_END]] 7110 // CHECK13: cond.end: 7111 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7112 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7113 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7114 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 7115 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7116 // CHECK13: omp.inner.for.cond: 7117 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52:![0-9]+]] 7118 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP52]] 7119 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7120 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7121 // CHECK13: omp.inner.for.body: 7122 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP52]] 7123 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7124 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP52]] 7125 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7126 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP52]] 7127 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7128 // CHECK13: omp.inner.for.inc: 7129 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 7130 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP52]] 7131 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7132 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 7133 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] 7134 // CHECK13: omp.inner.for.end: 7135 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7136 // CHECK13: omp.loop.exit: 7137 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 7138 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7139 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 7140 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7141 // CHECK13: .omp.final.then: 7142 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7143 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7144 // CHECK13: .omp.final.done: 7145 // CHECK13-NEXT: ret void 7146 // 7147 // 7148 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 7149 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7150 // CHECK13-NEXT: entry: 7151 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7152 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7153 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7154 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7155 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7156 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7157 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7158 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7159 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7160 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7161 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7162 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7163 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7164 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7165 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7166 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7167 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7168 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7169 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7170 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 7171 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7172 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 7173 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7174 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 7175 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7176 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7177 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7178 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7179 // CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7180 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 7181 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7182 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7183 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 7184 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7185 // CHECK13: cond.true: 7186 // CHECK13-NEXT: br label [[COND_END:%.*]] 7187 // CHECK13: cond.false: 7188 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7189 // CHECK13-NEXT: br label [[COND_END]] 7190 // CHECK13: cond.end: 7191 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 7192 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7193 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7194 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 7195 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7196 // CHECK13: omp.inner.for.cond: 7197 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]] 7198 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP55]] 7199 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 7200 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7201 // CHECK13: omp.inner.for.body: 7202 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]] 7203 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 7204 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7205 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP55]] 7206 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP55]] 7207 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 7208 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 7209 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP55]] 7210 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7211 // CHECK13: omp.body.continue: 7212 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7213 // CHECK13: omp.inner.for.inc: 7214 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]] 7215 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 7216 // CHECK13-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]] 7217 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]] 7218 // CHECK13: omp.inner.for.end: 7219 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7220 // CHECK13: omp.loop.exit: 7221 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 7222 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7223 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 7224 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7225 // CHECK13: .omp.final.then: 7226 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7227 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7228 // CHECK13: .omp.final.done: 7229 // CHECK13-NEXT: ret void 7230 // 7231 // 7232 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 7233 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7234 // CHECK13-NEXT: entry: 7235 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7236 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7237 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7238 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7239 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7240 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7241 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7242 // CHECK13-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7243 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 7244 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 7245 // CHECK13-NEXT: ret void 7246 // 7247 // 7248 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 7249 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7250 // CHECK13-NEXT: entry: 7251 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7252 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7253 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7254 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7255 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7256 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7257 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7258 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7259 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7260 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7261 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7262 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7263 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7264 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7265 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7266 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7267 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7268 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7269 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 7270 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7271 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7272 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7273 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 7274 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7275 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7276 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 7277 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7278 // CHECK13: cond.true: 7279 // CHECK13-NEXT: br label [[COND_END:%.*]] 7280 // CHECK13: cond.false: 7281 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7282 // CHECK13-NEXT: br label [[COND_END]] 7283 // CHECK13: cond.end: 7284 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7285 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7286 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7287 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 7288 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7289 // CHECK13: omp.inner.for.cond: 7290 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]] 7291 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP58]] 7292 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7293 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7294 // CHECK13: omp.inner.for.body: 7295 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP58]] 7296 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7297 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP58]] 7298 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7299 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP58]] 7300 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP58]] 7301 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP58]] 7302 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP58]] 7303 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7304 // CHECK13: omp.inner.for.inc: 7305 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]] 7306 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP58]] 7307 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 7308 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]] 7309 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]] 7310 // CHECK13: omp.inner.for.end: 7311 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7312 // CHECK13: omp.loop.exit: 7313 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 7314 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7315 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 7316 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7317 // CHECK13: .omp.final.then: 7318 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7319 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7320 // CHECK13: .omp.final.done: 7321 // CHECK13-NEXT: ret void 7322 // 7323 // 7324 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 7325 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7326 // CHECK13-NEXT: entry: 7327 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7328 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7329 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7330 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7331 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7332 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7333 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7334 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7335 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7336 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7337 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7338 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7339 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7340 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7341 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7342 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7343 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7344 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7345 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7346 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7347 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7348 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 7349 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7350 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 7351 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7352 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 7353 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7354 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7355 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7356 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7357 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7358 // CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7359 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 7360 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 7361 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7362 // CHECK13: omp.dispatch.cond: 7363 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7364 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7365 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32 7366 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]] 7367 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7368 // CHECK13: cond.true: 7369 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7370 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 7371 // CHECK13-NEXT: br label [[COND_END:%.*]] 7372 // CHECK13: cond.false: 7373 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7374 // CHECK13-NEXT: br label [[COND_END]] 7375 // CHECK13: cond.end: 7376 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 7377 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7378 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7379 // CHECK13-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 7380 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7381 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7382 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 7383 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7384 // CHECK13: omp.dispatch.body: 7385 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7386 // CHECK13: omp.inner.for.cond: 7387 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61:![0-9]+]] 7388 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP61]] 7389 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 7390 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7391 // CHECK13: omp.inner.for.body: 7392 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61]] 7393 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 7394 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7395 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP61]] 7396 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP61]] 7397 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 7398 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 7399 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP61]] 7400 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7401 // CHECK13: omp.body.continue: 7402 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7403 // CHECK13: omp.inner.for.inc: 7404 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61]] 7405 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 7406 // CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61]] 7407 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] 7408 // CHECK13: omp.inner.for.end: 7409 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7410 // CHECK13: omp.dispatch.inc: 7411 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7412 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7413 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 7414 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 7415 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7416 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7417 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 7418 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 7419 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 7420 // CHECK13: omp.dispatch.end: 7421 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 7422 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7423 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 7424 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7425 // CHECK13: .omp.final.then: 7426 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7427 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7428 // CHECK13: .omp.final.done: 7429 // CHECK13-NEXT: ret void 7430 // 7431 // 7432 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 7433 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7434 // CHECK13-NEXT: entry: 7435 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7436 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7437 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7438 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 7439 // CHECK13-NEXT: ret void 7440 // 7441 // 7442 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 7443 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7444 // CHECK13-NEXT: entry: 7445 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7446 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7447 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7448 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7449 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7450 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7451 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7452 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7453 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7454 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7455 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7456 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7457 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7458 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7459 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7460 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 7461 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7462 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7463 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7464 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 7465 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7466 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7467 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 7468 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7469 // CHECK13: cond.true: 7470 // CHECK13-NEXT: br label [[COND_END:%.*]] 7471 // CHECK13: cond.false: 7472 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7473 // CHECK13-NEXT: br label [[COND_END]] 7474 // CHECK13: cond.end: 7475 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7476 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7477 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7478 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 7479 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7480 // CHECK13: omp.inner.for.cond: 7481 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP64:![0-9]+]] 7482 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP64]] 7483 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7484 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7485 // CHECK13: omp.inner.for.body: 7486 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP64]] 7487 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7488 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP64]] 7489 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7490 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP64]] 7491 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7492 // CHECK13: omp.inner.for.inc: 7493 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP64]] 7494 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP64]] 7495 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7496 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP64]] 7497 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]] 7498 // CHECK13: omp.inner.for.end: 7499 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7500 // CHECK13: omp.loop.exit: 7501 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 7502 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7503 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 7504 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7505 // CHECK13: .omp.final.then: 7506 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7507 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7508 // CHECK13: .omp.final.done: 7509 // CHECK13-NEXT: ret void 7510 // 7511 // 7512 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 7513 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7514 // CHECK13-NEXT: entry: 7515 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7516 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7517 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7518 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7519 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7520 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7521 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7522 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7523 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7524 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7525 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7526 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7527 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7528 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7529 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7530 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7531 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7532 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7533 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7534 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 7535 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7536 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 7537 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7538 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 7539 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7540 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7541 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7542 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7543 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7544 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7545 // CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7546 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 7547 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 7548 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7549 // CHECK13: omp.dispatch.cond: 7550 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 7551 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 7552 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7553 // CHECK13: omp.dispatch.body: 7554 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7555 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 7556 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7557 // CHECK13: omp.inner.for.cond: 7558 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67:![0-9]+]] 7559 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP67]] 7560 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 7561 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7562 // CHECK13: omp.inner.for.body: 7563 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67]] 7564 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 7565 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7566 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP67]] 7567 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP67]] 7568 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 7569 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 7570 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP67]] 7571 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7572 // CHECK13: omp.body.continue: 7573 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7574 // CHECK13: omp.inner.for.inc: 7575 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67]] 7576 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 7577 // CHECK13-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67]] 7578 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]] 7579 // CHECK13: omp.inner.for.end: 7580 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7581 // CHECK13: omp.dispatch.inc: 7582 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 7583 // CHECK13: omp.dispatch.end: 7584 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 7585 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7586 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 7587 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7588 // CHECK13: .omp.final.then: 7589 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7590 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7591 // CHECK13: .omp.final.done: 7592 // CHECK13-NEXT: ret void 7593 // 7594 // 7595 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 7596 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7597 // CHECK13-NEXT: entry: 7598 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7599 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7600 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7601 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7602 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7603 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7604 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7605 // CHECK13-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7606 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 7607 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 7608 // CHECK13-NEXT: ret void 7609 // 7610 // 7611 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 7612 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7613 // CHECK13-NEXT: entry: 7614 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7615 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7616 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7617 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7618 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7619 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7620 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7621 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7622 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7623 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7624 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7625 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7626 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7627 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7628 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7629 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7630 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7631 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7632 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 7633 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7634 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7635 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7636 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 7637 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7638 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7639 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 7640 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7641 // CHECK13: cond.true: 7642 // CHECK13-NEXT: br label [[COND_END:%.*]] 7643 // CHECK13: cond.false: 7644 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7645 // CHECK13-NEXT: br label [[COND_END]] 7646 // CHECK13: cond.end: 7647 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7648 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7649 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7650 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 7651 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7652 // CHECK13: omp.inner.for.cond: 7653 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP70:![0-9]+]] 7654 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP70]] 7655 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7656 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7657 // CHECK13: omp.inner.for.body: 7658 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP70]] 7659 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 7660 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP70]] 7661 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 7662 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP70]] 7663 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP70]] 7664 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP70]] 7665 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP70]] 7666 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7667 // CHECK13: omp.inner.for.inc: 7668 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP70]] 7669 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP70]] 7670 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 7671 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP70]] 7672 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]] 7673 // CHECK13: omp.inner.for.end: 7674 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7675 // CHECK13: omp.loop.exit: 7676 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 7677 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7678 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 7679 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7680 // CHECK13: .omp.final.then: 7681 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7682 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7683 // CHECK13: .omp.final.done: 7684 // CHECK13-NEXT: ret void 7685 // 7686 // 7687 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 7688 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7689 // CHECK13-NEXT: entry: 7690 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7691 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7692 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7693 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7694 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7695 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7696 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7697 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7698 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7699 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7700 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7701 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7702 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7703 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7704 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7705 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7706 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7707 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7708 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7709 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7710 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7711 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 7712 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7713 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 7714 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7715 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 7716 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7717 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7718 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7719 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7720 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7721 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7722 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7723 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7724 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 7725 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 7726 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7727 // CHECK13: omp.dispatch.cond: 7728 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 7729 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 7730 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7731 // CHECK13: omp.dispatch.body: 7732 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7733 // CHECK13-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 7734 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7735 // CHECK13: omp.inner.for.cond: 7736 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73:![0-9]+]] 7737 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP73]] 7738 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 7739 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7740 // CHECK13: omp.inner.for.body: 7741 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73]] 7742 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 7743 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7744 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP73]] 7745 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP73]] 7746 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 7747 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 7748 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP73]] 7749 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7750 // CHECK13: omp.body.continue: 7751 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7752 // CHECK13: omp.inner.for.inc: 7753 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73]] 7754 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 7755 // CHECK13-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73]] 7756 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]] 7757 // CHECK13: omp.inner.for.end: 7758 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7759 // CHECK13: omp.dispatch.inc: 7760 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 7761 // CHECK13: omp.dispatch.end: 7762 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 7763 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7764 // CHECK13-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 7765 // CHECK13-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7766 // CHECK13: .omp.final.then: 7767 // CHECK13-NEXT: store i32 10, ptr [[I]], align 4 7768 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]] 7769 // CHECK13: .omp.final.done: 7770 // CHECK13-NEXT: ret void 7771 // 7772 // 7773 // CHECK15-LABEL: define {{[^@]+}}@main 7774 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7775 // CHECK15-NEXT: entry: 7776 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7777 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7778 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 7779 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 7780 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 7781 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 7782 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 7783 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7784 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 7785 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 7786 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 7787 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 7788 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7789 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7790 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7791 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 7792 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 7793 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4 7794 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4 7795 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4 7796 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 7797 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 7798 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 7799 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 7800 // CHECK15-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7801 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 7802 // CHECK15-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4 7803 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7804 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4 7805 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4 7806 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4 7807 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4 7808 // CHECK15-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 7809 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 7810 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 7811 // CHECK15-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7812 // CHECK15-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4 7813 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 4 7814 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 4 7815 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 4 7816 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4 7817 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 7818 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 7819 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 7820 // CHECK15-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7821 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 7822 // CHECK15-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4 7823 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4 7824 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 4 7825 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 4 7826 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 4 7827 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4 7828 // CHECK15-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 7829 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 7830 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 7831 // CHECK15-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7832 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 7833 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 7834 // CHECK15-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 7835 // CHECK15-NEXT: store i32 100, ptr [[N]], align 4 7836 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 7837 // CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 7838 // CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 7839 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 7840 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 7841 // CHECK15-NEXT: store i32 10, ptr [[M]], align 4 7842 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 7843 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 7844 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 7845 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 7846 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 7847 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false) 7848 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7849 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4 7850 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7851 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 7852 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 7853 // CHECK15-NEXT: store ptr null, ptr [[TMP8]], align 4 7854 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7855 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 7856 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7857 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4 7858 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 7859 // CHECK15-NEXT: store ptr null, ptr [[TMP11]], align 4 7860 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7861 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 7862 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7863 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4 7864 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 7865 // CHECK15-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4 7866 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 7867 // CHECK15-NEXT: store ptr null, ptr [[TMP15]], align 4 7868 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7869 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7870 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7871 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 7872 // CHECK15-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 7873 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7874 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 7875 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7876 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7877 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7878 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7879 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 7880 // CHECK15-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 7881 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 7882 // CHECK15-NEXT: store i32 3, ptr [[TMP23]], align 4 7883 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 7884 // CHECK15-NEXT: store i32 3, ptr [[TMP24]], align 4 7885 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 7886 // CHECK15-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4 7887 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 7888 // CHECK15-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4 7889 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 7890 // CHECK15-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4 7891 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 7892 // CHECK15-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 7893 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 7894 // CHECK15-NEXT: store ptr null, ptr [[TMP29]], align 4 7895 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 7896 // CHECK15-NEXT: store ptr null, ptr [[TMP30]], align 4 7897 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 7898 // CHECK15-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 7899 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 7900 // CHECK15-NEXT: store i64 0, ptr [[TMP32]], align 8 7901 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 7902 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 7903 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 7904 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 7905 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 7906 // CHECK15-NEXT: store i32 0, ptr [[TMP35]], align 4 7907 // CHECK15-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 7908 // CHECK15-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 7909 // CHECK15-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7910 // CHECK15: omp_offload.failed: 7911 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 7912 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 7913 // CHECK15: omp_offload.cont: 7914 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 7915 // CHECK15-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 7916 // CHECK15-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 7917 // CHECK15-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4 7918 // CHECK15-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64 7919 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false) 7920 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 7921 // CHECK15-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4 7922 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 7923 // CHECK15-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 7924 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 7925 // CHECK15-NEXT: store ptr null, ptr [[TMP44]], align 4 7926 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 7927 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4 7928 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 7929 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4 7930 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 7931 // CHECK15-NEXT: store ptr null, ptr [[TMP47]], align 4 7932 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 7933 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4 7934 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 7935 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4 7936 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 7937 // CHECK15-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4 7938 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 7939 // CHECK15-NEXT: store ptr null, ptr [[TMP51]], align 4 7940 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 7941 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 7942 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 7943 // CHECK15-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4 7944 // CHECK15-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4 7945 // CHECK15-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 7946 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0 7947 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 7948 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 7949 // CHECK15-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 7950 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 7951 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1 7952 // CHECK15-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64 7953 // CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 7954 // CHECK15-NEXT: store i32 3, ptr [[TMP59]], align 4 7955 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 7956 // CHECK15-NEXT: store i32 3, ptr [[TMP60]], align 4 7957 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 7958 // CHECK15-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4 7959 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 7960 // CHECK15-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4 7961 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 7962 // CHECK15-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4 7963 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 7964 // CHECK15-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4 7965 // CHECK15-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 7966 // CHECK15-NEXT: store ptr null, ptr [[TMP65]], align 4 7967 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 7968 // CHECK15-NEXT: store ptr null, ptr [[TMP66]], align 4 7969 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 7970 // CHECK15-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8 7971 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 7972 // CHECK15-NEXT: store i64 0, ptr [[TMP68]], align 8 7973 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 7974 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 7975 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 7976 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4 7977 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 7978 // CHECK15-NEXT: store i32 0, ptr [[TMP71]], align 4 7979 // CHECK15-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 7980 // CHECK15-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0 7981 // CHECK15-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 7982 // CHECK15: omp_offload.failed16: 7983 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 7984 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]] 7985 // CHECK15: omp_offload.cont17: 7986 // CHECK15-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 4 7987 // CHECK15-NEXT: store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4 7988 // CHECK15-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4 7989 // CHECK15-NEXT: store i32 [[TMP75]], ptr [[N_CASTED19]], align 4 7990 // CHECK15-NEXT: [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4 7991 // CHECK15-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 7992 // CHECK15-NEXT: store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7993 // CHECK15-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7994 // CHECK15-NEXT: [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4 7995 // CHECK15-NEXT: [[TMP80:%.*]] = sext i32 [[TMP79]] to i64 7996 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false) 7997 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 7998 // CHECK15-NEXT: store i32 [[TMP76]], ptr [[TMP81]], align 4 7999 // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 8000 // CHECK15-NEXT: store i32 [[TMP76]], ptr [[TMP82]], align 4 8001 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 8002 // CHECK15-NEXT: store ptr null, ptr [[TMP83]], align 4 8003 // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 8004 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP84]], align 4 8005 // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 8006 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP85]], align 4 8007 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 8008 // CHECK15-NEXT: store ptr null, ptr [[TMP86]], align 4 8009 // CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 8010 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 4 8011 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 8012 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 4 8013 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 8014 // CHECK15-NEXT: store i64 [[TMP80]], ptr [[TMP89]], align 4 8015 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2 8016 // CHECK15-NEXT: store ptr null, ptr [[TMP90]], align 4 8017 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 8018 // CHECK15-NEXT: store i32 [[TMP78]], ptr [[TMP91]], align 4 8019 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 8020 // CHECK15-NEXT: store i32 [[TMP78]], ptr [[TMP92]], align 4 8021 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3 8022 // CHECK15-NEXT: store ptr null, ptr [[TMP93]], align 4 8023 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 8024 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 8025 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 8026 // CHECK15-NEXT: [[TMP97:%.*]] = load i32, ptr [[N]], align 4 8027 // CHECK15-NEXT: store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4 8028 // CHECK15-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 8029 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0 8030 // CHECK15-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 8031 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 8032 // CHECK15-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 8033 // CHECK15-NEXT: [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 8034 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1 8035 // CHECK15-NEXT: [[TMP100:%.*]] = zext i32 [[ADD30]] to i64 8036 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 8037 // CHECK15-NEXT: store i32 3, ptr [[TMP101]], align 4 8038 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 8039 // CHECK15-NEXT: store i32 4, ptr [[TMP102]], align 4 8040 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 8041 // CHECK15-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4 8042 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 8043 // CHECK15-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4 8044 // CHECK15-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 8045 // CHECK15-NEXT: store ptr [[TMP96]], ptr [[TMP105]], align 4 8046 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 8047 // CHECK15-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4 8048 // CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 8049 // CHECK15-NEXT: store ptr null, ptr [[TMP107]], align 4 8050 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 8051 // CHECK15-NEXT: store ptr null, ptr [[TMP108]], align 4 8052 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 8053 // CHECK15-NEXT: store i64 [[TMP100]], ptr [[TMP109]], align 8 8054 // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 8055 // CHECK15-NEXT: store i64 0, ptr [[TMP110]], align 8 8056 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 8057 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4 8058 // CHECK15-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 8059 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4 8060 // CHECK15-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 8061 // CHECK15-NEXT: store i32 0, ptr [[TMP113]], align 4 8062 // CHECK15-NEXT: [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 8063 // CHECK15-NEXT: [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0 8064 // CHECK15-NEXT: br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 8065 // CHECK15: omp_offload.failed32: 8066 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]] 8067 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT33]] 8068 // CHECK15: omp_offload.cont33: 8069 // CHECK15-NEXT: [[TMP116:%.*]] = load i32, ptr [[N]], align 4 8070 // CHECK15-NEXT: store i32 [[TMP116]], ptr [[N_CASTED34]], align 4 8071 // CHECK15-NEXT: [[TMP117:%.*]] = load i32, ptr [[N_CASTED34]], align 4 8072 // CHECK15-NEXT: [[TMP118:%.*]] = mul nuw i32 [[TMP0]], 4 8073 // CHECK15-NEXT: [[TMP119:%.*]] = sext i32 [[TMP118]] to i64 8074 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES38]], ptr align 4 @.offload_sizes.5, i32 24, i1 false) 8075 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 8076 // CHECK15-NEXT: store i32 [[TMP117]], ptr [[TMP120]], align 4 8077 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 8078 // CHECK15-NEXT: store i32 [[TMP117]], ptr [[TMP121]], align 4 8079 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0 8080 // CHECK15-NEXT: store ptr null, ptr [[TMP122]], align 4 8081 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 8082 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP123]], align 4 8083 // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 8084 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP124]], align 4 8085 // CHECK15-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1 8086 // CHECK15-NEXT: store ptr null, ptr [[TMP125]], align 4 8087 // CHECK15-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 8088 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP126]], align 4 8089 // CHECK15-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 8090 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP127]], align 4 8091 // CHECK15-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 8092 // CHECK15-NEXT: store i64 [[TMP119]], ptr [[TMP128]], align 4 8093 // CHECK15-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2 8094 // CHECK15-NEXT: store ptr null, ptr [[TMP129]], align 4 8095 // CHECK15-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 8096 // CHECK15-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 8097 // CHECK15-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 8098 // CHECK15-NEXT: [[TMP133:%.*]] = load i32, ptr [[N]], align 4 8099 // CHECK15-NEXT: store i32 [[TMP133]], ptr [[DOTCAPTURE_EXPR_40]], align 4 8100 // CHECK15-NEXT: [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 8101 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP134]], 0 8102 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 8103 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 8104 // CHECK15-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 8105 // CHECK15-NEXT: [[TMP135:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 8106 // CHECK15-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP135]], 1 8107 // CHECK15-NEXT: [[TMP136:%.*]] = zext i32 [[ADD45]] to i64 8108 // CHECK15-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 8109 // CHECK15-NEXT: store i32 3, ptr [[TMP137]], align 4 8110 // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 8111 // CHECK15-NEXT: store i32 3, ptr [[TMP138]], align 4 8112 // CHECK15-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 8113 // CHECK15-NEXT: store ptr [[TMP130]], ptr [[TMP139]], align 4 8114 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 8115 // CHECK15-NEXT: store ptr [[TMP131]], ptr [[TMP140]], align 4 8116 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 8117 // CHECK15-NEXT: store ptr [[TMP132]], ptr [[TMP141]], align 4 8118 // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 8119 // CHECK15-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP142]], align 4 8120 // CHECK15-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 8121 // CHECK15-NEXT: store ptr null, ptr [[TMP143]], align 4 8122 // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 8123 // CHECK15-NEXT: store ptr null, ptr [[TMP144]], align 4 8124 // CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 8125 // CHECK15-NEXT: store i64 [[TMP136]], ptr [[TMP145]], align 8 8126 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 8127 // CHECK15-NEXT: store i64 0, ptr [[TMP146]], align 8 8128 // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 8129 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4 8130 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 8131 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP148]], align 4 8132 // CHECK15-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 8133 // CHECK15-NEXT: store i32 0, ptr [[TMP149]], align 4 8134 // CHECK15-NEXT: [[TMP150:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 8135 // CHECK15-NEXT: [[TMP151:%.*]] = icmp ne i32 [[TMP150]], 0 8136 // CHECK15-NEXT: br i1 [[TMP151]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 8137 // CHECK15: omp_offload.failed47: 8138 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP117]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 8139 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT48]] 8140 // CHECK15: omp_offload.cont48: 8141 // CHECK15-NEXT: [[TMP152:%.*]] = load i32, ptr [[M]], align 4 8142 // CHECK15-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR_49]], align 4 8143 // CHECK15-NEXT: [[TMP153:%.*]] = load i32, ptr [[N]], align 4 8144 // CHECK15-NEXT: store i32 [[TMP153]], ptr [[N_CASTED50]], align 4 8145 // CHECK15-NEXT: [[TMP154:%.*]] = load i32, ptr [[N_CASTED50]], align 4 8146 // CHECK15-NEXT: [[TMP155:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 8147 // CHECK15-NEXT: store i32 [[TMP155]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 8148 // CHECK15-NEXT: [[TMP156:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 8149 // CHECK15-NEXT: [[TMP157:%.*]] = mul nuw i32 [[TMP0]], 4 8150 // CHECK15-NEXT: [[TMP158:%.*]] = sext i32 [[TMP157]] to i64 8151 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES55]], ptr align 4 @.offload_sizes.7, i32 32, i1 false) 8152 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 8153 // CHECK15-NEXT: store i32 [[TMP154]], ptr [[TMP159]], align 4 8154 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 8155 // CHECK15-NEXT: store i32 [[TMP154]], ptr [[TMP160]], align 4 8156 // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0 8157 // CHECK15-NEXT: store ptr null, ptr [[TMP161]], align 4 8158 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 8159 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP162]], align 4 8160 // CHECK15-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 8161 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP163]], align 4 8162 // CHECK15-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1 8163 // CHECK15-NEXT: store ptr null, ptr [[TMP164]], align 4 8164 // CHECK15-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 8165 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP165]], align 4 8166 // CHECK15-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 8167 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP166]], align 4 8168 // CHECK15-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 8169 // CHECK15-NEXT: store i64 [[TMP158]], ptr [[TMP167]], align 4 8170 // CHECK15-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2 8171 // CHECK15-NEXT: store ptr null, ptr [[TMP168]], align 4 8172 // CHECK15-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 8173 // CHECK15-NEXT: store i32 [[TMP156]], ptr [[TMP169]], align 4 8174 // CHECK15-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 8175 // CHECK15-NEXT: store i32 [[TMP156]], ptr [[TMP170]], align 4 8176 // CHECK15-NEXT: [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3 8177 // CHECK15-NEXT: store ptr null, ptr [[TMP171]], align 4 8178 // CHECK15-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 8179 // CHECK15-NEXT: [[TMP173:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 8180 // CHECK15-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 8181 // CHECK15-NEXT: [[TMP175:%.*]] = load i32, ptr [[N]], align 4 8182 // CHECK15-NEXT: store i32 [[TMP175]], ptr [[DOTCAPTURE_EXPR_57]], align 4 8183 // CHECK15-NEXT: [[TMP176:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 8184 // CHECK15-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP176]], 0 8185 // CHECK15-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 8186 // CHECK15-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 8187 // CHECK15-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 8188 // CHECK15-NEXT: [[TMP177:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 8189 // CHECK15-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP177]], 1 8190 // CHECK15-NEXT: [[TMP178:%.*]] = zext i32 [[ADD62]] to i64 8191 // CHECK15-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 8192 // CHECK15-NEXT: store i32 3, ptr [[TMP179]], align 4 8193 // CHECK15-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 8194 // CHECK15-NEXT: store i32 4, ptr [[TMP180]], align 4 8195 // CHECK15-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 8196 // CHECK15-NEXT: store ptr [[TMP172]], ptr [[TMP181]], align 4 8197 // CHECK15-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 8198 // CHECK15-NEXT: store ptr [[TMP173]], ptr [[TMP182]], align 4 8199 // CHECK15-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 8200 // CHECK15-NEXT: store ptr [[TMP174]], ptr [[TMP183]], align 4 8201 // CHECK15-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 8202 // CHECK15-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP184]], align 4 8203 // CHECK15-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 8204 // CHECK15-NEXT: store ptr null, ptr [[TMP185]], align 4 8205 // CHECK15-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 8206 // CHECK15-NEXT: store ptr null, ptr [[TMP186]], align 4 8207 // CHECK15-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 8208 // CHECK15-NEXT: store i64 [[TMP178]], ptr [[TMP187]], align 8 8209 // CHECK15-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 8210 // CHECK15-NEXT: store i64 0, ptr [[TMP188]], align 8 8211 // CHECK15-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 8212 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP189]], align 4 8213 // CHECK15-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 8214 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP190]], align 4 8215 // CHECK15-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 8216 // CHECK15-NEXT: store i32 0, ptr [[TMP191]], align 4 8217 // CHECK15-NEXT: [[TMP192:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 8218 // CHECK15-NEXT: [[TMP193:%.*]] = icmp ne i32 [[TMP192]], 0 8219 // CHECK15-NEXT: br i1 [[TMP193]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 8220 // CHECK15: omp_offload.failed64: 8221 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP156]]) #[[ATTR3]] 8222 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT65]] 8223 // CHECK15: omp_offload.cont65: 8224 // CHECK15-NEXT: [[TMP194:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 8225 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP194]]) 8226 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 8227 // CHECK15-NEXT: [[TMP195:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 8228 // CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP195]]) 8229 // CHECK15-NEXT: [[TMP196:%.*]] = load i32, ptr [[RETVAL]], align 4 8230 // CHECK15-NEXT: ret i32 [[TMP196]] 8231 // 8232 // 8233 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 8234 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 8235 // CHECK15-NEXT: entry: 8236 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8237 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8238 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8239 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8240 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8241 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8242 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8243 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8244 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8245 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8246 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 8247 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 8248 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 8249 // CHECK15-NEXT: ret void 8250 // 8251 // 8252 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 8253 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8254 // CHECK15-NEXT: entry: 8255 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8256 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8257 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8258 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8259 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8260 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8261 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8262 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8263 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8264 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8265 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8266 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8267 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8268 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8269 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 8270 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8271 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8272 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8273 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8274 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8275 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8276 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8277 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8278 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8279 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 8280 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8281 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8282 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8283 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8284 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8285 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8286 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8287 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8288 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8289 // CHECK15: omp.precond.then: 8290 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8291 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8292 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 8293 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8294 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8295 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8296 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 8297 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8298 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8299 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8300 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 8301 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8302 // CHECK15: cond.true: 8303 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8304 // CHECK15-NEXT: br label [[COND_END:%.*]] 8305 // CHECK15: cond.false: 8306 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8307 // CHECK15-NEXT: br label [[COND_END]] 8308 // CHECK15: cond.end: 8309 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 8310 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8311 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8312 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 8313 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8314 // CHECK15: omp.inner.for.cond: 8315 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 8316 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 8317 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 8318 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8319 // CHECK15: omp.inner.for.body: 8320 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]] 8321 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 8322 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP14]] 8323 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP14]] 8324 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP14]] 8325 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP14]] 8326 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8327 // CHECK15: omp.inner.for.inc: 8328 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 8329 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]] 8330 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 8331 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 8332 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 8333 // CHECK15: omp.inner.for.end: 8334 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8335 // CHECK15: omp.loop.exit: 8336 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8337 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 8338 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 8339 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8340 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 8341 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8342 // CHECK15: .omp.final.then: 8343 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8344 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 8345 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 8346 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 8347 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 8348 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 8349 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 8350 // CHECK15: .omp.final.done: 8351 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8352 // CHECK15: omp.precond.end: 8353 // CHECK15-NEXT: ret void 8354 // 8355 // 8356 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 8357 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8358 // CHECK15-NEXT: entry: 8359 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8360 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8361 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8362 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8363 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8364 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8365 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8366 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8367 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8368 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8369 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8370 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8371 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8372 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8373 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8374 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8375 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 8376 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8377 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8378 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8379 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8380 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8381 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8382 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8383 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8384 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8385 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8386 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 8387 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8388 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8389 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8390 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8391 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8392 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8393 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8394 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8395 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8396 // CHECK15: omp.precond.then: 8397 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8398 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8399 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 8400 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8401 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8402 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 8403 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8404 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8405 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8406 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8407 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 8408 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8409 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8410 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8411 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8412 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8413 // CHECK15: cond.true: 8414 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8415 // CHECK15-NEXT: br label [[COND_END:%.*]] 8416 // CHECK15: cond.false: 8417 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8418 // CHECK15-NEXT: br label [[COND_END]] 8419 // CHECK15: cond.end: 8420 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8421 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8422 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8423 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 8424 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8425 // CHECK15: omp.inner.for.cond: 8426 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 8427 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 8428 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8429 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8430 // CHECK15: omp.inner.for.body: 8431 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 8432 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 8433 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8434 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP18]] 8435 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP18]] 8436 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 8437 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 8438 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8439 // CHECK15: omp.body.continue: 8440 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8441 // CHECK15: omp.inner.for.inc: 8442 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 8443 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 8444 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 8445 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 8446 // CHECK15: omp.inner.for.end: 8447 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8448 // CHECK15: omp.loop.exit: 8449 // CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8450 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 8451 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 8452 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8453 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 8454 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8455 // CHECK15: .omp.final.then: 8456 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8457 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 8458 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 8459 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 8460 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 8461 // CHECK15-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 8462 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 8463 // CHECK15: .omp.final.done: 8464 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8465 // CHECK15: omp.precond.end: 8466 // CHECK15-NEXT: ret void 8467 // 8468 // 8469 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 8470 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8471 // CHECK15-NEXT: entry: 8472 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8473 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8474 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8475 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8476 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8477 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8478 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8479 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8480 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8481 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8482 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 8483 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 8484 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 8485 // CHECK15-NEXT: ret void 8486 // 8487 // 8488 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 8489 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8490 // CHECK15-NEXT: entry: 8491 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8492 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8493 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8494 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8495 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8496 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8497 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8498 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8499 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8500 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8501 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8502 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8503 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8504 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8505 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 8506 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8507 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8508 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8509 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8510 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8511 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8512 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8513 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8514 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8515 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 8516 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8517 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8518 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8519 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8520 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8521 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8522 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8523 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8524 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8525 // CHECK15: omp.precond.then: 8526 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8527 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8528 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 8529 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8530 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8531 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8532 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 8533 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8534 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8535 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8536 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 8537 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8538 // CHECK15: cond.true: 8539 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8540 // CHECK15-NEXT: br label [[COND_END:%.*]] 8541 // CHECK15: cond.false: 8542 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8543 // CHECK15-NEXT: br label [[COND_END]] 8544 // CHECK15: cond.end: 8545 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 8546 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8547 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8548 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 8549 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8550 // CHECK15: omp.inner.for.cond: 8551 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 8552 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 8553 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 8554 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8555 // CHECK15: omp.inner.for.body: 8556 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP23]] 8557 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 8558 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP23]] 8559 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP23]] 8560 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP23]] 8561 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP23]] 8562 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8563 // CHECK15: omp.inner.for.inc: 8564 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 8565 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP23]] 8566 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 8567 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 8568 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 8569 // CHECK15: omp.inner.for.end: 8570 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8571 // CHECK15: omp.loop.exit: 8572 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8573 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 8574 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 8575 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8576 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 8577 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8578 // CHECK15: .omp.final.then: 8579 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8580 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 8581 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 8582 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 8583 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 8584 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 8585 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 8586 // CHECK15: .omp.final.done: 8587 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8588 // CHECK15: omp.precond.end: 8589 // CHECK15-NEXT: ret void 8590 // 8591 // 8592 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 8593 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8594 // CHECK15-NEXT: entry: 8595 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8596 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8597 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8598 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8599 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8600 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8601 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8602 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8603 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8604 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8605 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8606 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8607 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8608 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8609 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8610 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8611 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 8612 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8613 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8614 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8615 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8616 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8617 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8618 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8619 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8620 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8621 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8622 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 8623 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8624 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8625 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8626 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8627 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8628 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8629 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8630 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8631 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8632 // CHECK15: omp.precond.then: 8633 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8634 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8635 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 8636 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8637 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8638 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 8639 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8640 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8641 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8642 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8643 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 8644 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8645 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8646 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8647 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8648 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8649 // CHECK15: cond.true: 8650 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8651 // CHECK15-NEXT: br label [[COND_END:%.*]] 8652 // CHECK15: cond.false: 8653 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8654 // CHECK15-NEXT: br label [[COND_END]] 8655 // CHECK15: cond.end: 8656 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8657 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8658 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8659 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 8660 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8661 // CHECK15: omp.inner.for.cond: 8662 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]] 8663 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 8664 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8665 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8666 // CHECK15: omp.inner.for.body: 8667 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 8668 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 8669 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8670 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP26]] 8671 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP26]] 8672 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 8673 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP26]] 8674 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8675 // CHECK15: omp.body.continue: 8676 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8677 // CHECK15: omp.inner.for.inc: 8678 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 8679 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 8680 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 8681 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 8682 // CHECK15: omp.inner.for.end: 8683 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8684 // CHECK15: omp.loop.exit: 8685 // CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8686 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 8687 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 8688 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8689 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 8690 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8691 // CHECK15: .omp.final.then: 8692 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8693 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 8694 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 8695 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 8696 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 8697 // CHECK15-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 8698 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 8699 // CHECK15: .omp.final.done: 8700 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8701 // CHECK15: omp.precond.end: 8702 // CHECK15-NEXT: ret void 8703 // 8704 // 8705 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 8706 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8707 // CHECK15-NEXT: entry: 8708 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8709 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8710 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8711 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8712 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8713 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8714 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8715 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8716 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8717 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8718 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8719 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8720 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8721 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 8722 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 8723 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8724 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8725 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8726 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 8727 // CHECK15-NEXT: ret void 8728 // 8729 // 8730 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 8731 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8732 // CHECK15-NEXT: entry: 8733 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8734 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8735 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8736 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8737 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8738 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8739 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8740 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8741 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8742 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8743 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8744 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8745 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8746 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8747 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8748 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 8749 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8750 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8751 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8752 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8753 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8754 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8755 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8756 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8757 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8758 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8759 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8760 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8761 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8762 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8763 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8764 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8765 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 8766 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8767 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8768 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8769 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8770 // CHECK15: omp.precond.then: 8771 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8772 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8773 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 8774 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8775 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8776 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8777 // CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8778 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 8779 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 8780 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8781 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8782 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8783 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8784 // CHECK15: cond.true: 8785 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8786 // CHECK15-NEXT: br label [[COND_END:%.*]] 8787 // CHECK15: cond.false: 8788 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8789 // CHECK15-NEXT: br label [[COND_END]] 8790 // CHECK15: cond.end: 8791 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8792 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8793 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8794 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 8795 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8796 // CHECK15: omp.inner.for.cond: 8797 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]] 8798 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP29]] 8799 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 8800 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 8801 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8802 // CHECK15: omp.inner.for.body: 8803 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 8804 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 8805 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP29]] 8806 // CHECK15-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 8807 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 8808 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP29]] 8809 // CHECK15-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 8810 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 8811 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP21]]), !llvm.access.group [[ACC_GRP29]] 8812 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8813 // CHECK15: omp.inner.for.inc: 8814 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 8815 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 8816 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 8817 // CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 8818 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 8819 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 8820 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 8821 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 8822 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 8823 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 8824 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 8825 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 8826 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 8827 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP29]] 8828 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]] 8829 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 8830 // CHECK15: cond.true11: 8831 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP29]] 8832 // CHECK15-NEXT: br label [[COND_END13:%.*]] 8833 // CHECK15: cond.false12: 8834 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 8835 // CHECK15-NEXT: br label [[COND_END13]] 8836 // CHECK15: cond.end13: 8837 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ] 8838 // CHECK15-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 8839 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 8840 // CHECK15-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 8841 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 8842 // CHECK15: omp.inner.for.end: 8843 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8844 // CHECK15: omp.loop.exit: 8845 // CHECK15-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8846 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 8847 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP34]]) 8848 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8849 // CHECK15-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 8850 // CHECK15-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8851 // CHECK15: .omp.final.then: 8852 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8853 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP37]], 0 8854 // CHECK15-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 8855 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1 8856 // CHECK15-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]] 8857 // CHECK15-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 8858 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 8859 // CHECK15: .omp.final.done: 8860 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8861 // CHECK15: omp.precond.end: 8862 // CHECK15-NEXT: ret void 8863 // 8864 // 8865 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 8866 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8867 // CHECK15-NEXT: entry: 8868 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8869 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8870 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8871 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8872 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8873 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8874 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8875 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8876 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8877 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8878 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8879 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8880 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8881 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8882 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8883 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8884 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8885 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 8886 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8887 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8888 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8889 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8890 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8891 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8892 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8893 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8894 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8895 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8896 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8897 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8898 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8899 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8900 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8901 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8902 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 8903 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8904 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8905 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8906 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8907 // CHECK15: omp.precond.then: 8908 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8909 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8910 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 8911 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8912 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8913 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 8914 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8915 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8916 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8917 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8918 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 8919 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8920 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8921 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8922 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8923 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8924 // CHECK15: cond.true: 8925 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8926 // CHECK15-NEXT: br label [[COND_END:%.*]] 8927 // CHECK15: cond.false: 8928 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8929 // CHECK15-NEXT: br label [[COND_END]] 8930 // CHECK15: cond.end: 8931 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8932 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8933 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8934 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 8935 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8936 // CHECK15: omp.inner.for.cond: 8937 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]] 8938 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 8939 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8940 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8941 // CHECK15: omp.inner.for.body: 8942 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 8943 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 8944 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8945 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP32]] 8946 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP32]] 8947 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 8948 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP32]] 8949 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8950 // CHECK15: omp.body.continue: 8951 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8952 // CHECK15: omp.inner.for.inc: 8953 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 8954 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 8955 // CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 8956 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 8957 // CHECK15: omp.inner.for.end: 8958 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8959 // CHECK15: omp.loop.exit: 8960 // CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8961 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 8962 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 8963 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8964 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 8965 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8966 // CHECK15: .omp.final.then: 8967 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8968 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 8969 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 8970 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 8971 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 8972 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 8973 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 8974 // CHECK15: .omp.final.done: 8975 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8976 // CHECK15: omp.precond.end: 8977 // CHECK15-NEXT: ret void 8978 // 8979 // 8980 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 8981 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8982 // CHECK15-NEXT: entry: 8983 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8984 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8985 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8986 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8987 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8988 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8989 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8990 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8991 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8992 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8993 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 8994 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 8995 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 8996 // CHECK15-NEXT: ret void 8997 // 8998 // 8999 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 9000 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9001 // CHECK15-NEXT: entry: 9002 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9003 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9004 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9005 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9006 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9007 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9008 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9009 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9010 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9011 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9012 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9013 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9014 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9015 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9016 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 9017 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 9018 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9019 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9020 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 9021 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 9022 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9023 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 9024 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9025 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 9026 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 9027 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9028 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 9029 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9030 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9031 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9032 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 9033 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9034 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 9035 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9036 // CHECK15: omp.precond.then: 9037 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9038 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9039 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 9040 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9041 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9042 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9043 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 9044 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9045 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9046 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9047 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 9048 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9049 // CHECK15: cond.true: 9050 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9051 // CHECK15-NEXT: br label [[COND_END:%.*]] 9052 // CHECK15: cond.false: 9053 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9054 // CHECK15-NEXT: br label [[COND_END]] 9055 // CHECK15: cond.end: 9056 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 9057 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9058 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9059 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 9060 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9061 // CHECK15: omp.inner.for.cond: 9062 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]] 9063 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 9064 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 9065 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9066 // CHECK15: omp.inner.for.body: 9067 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]] 9068 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 9069 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]] 9070 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP35]] 9071 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP35]] 9072 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP35]] 9073 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9074 // CHECK15: omp.inner.for.inc: 9075 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 9076 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]] 9077 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 9078 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 9079 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] 9080 // CHECK15: omp.inner.for.end: 9081 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9082 // CHECK15: omp.loop.exit: 9083 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9084 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 9085 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 9086 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9087 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 9088 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9089 // CHECK15: .omp.final.then: 9090 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9091 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 9092 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 9093 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 9094 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 9095 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 9096 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9097 // CHECK15: .omp.final.done: 9098 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 9099 // CHECK15: omp.precond.end: 9100 // CHECK15-NEXT: ret void 9101 // 9102 // 9103 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 9104 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9105 // CHECK15-NEXT: entry: 9106 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9107 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9108 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9109 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9110 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9111 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9112 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9113 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9114 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9115 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9116 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9117 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9118 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9119 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9120 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9121 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9122 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 9123 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9124 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9125 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9126 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9127 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 9128 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 9129 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9130 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 9131 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9132 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 9133 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 9134 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9135 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 9136 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9137 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9138 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9139 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 9140 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9141 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 9142 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9143 // CHECK15: omp.precond.then: 9144 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9145 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9146 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 9147 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9148 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9149 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 9150 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 9151 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9152 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9153 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9154 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9155 // CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9156 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 9157 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 9158 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9159 // CHECK15: omp.dispatch.cond: 9160 // CHECK15-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9161 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 9162 // CHECK15-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 9163 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 9164 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9165 // CHECK15: omp.dispatch.body: 9166 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9167 // CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 9168 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9169 // CHECK15: omp.inner.for.cond: 9170 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 9171 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 9172 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 9173 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9174 // CHECK15: omp.inner.for.body: 9175 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 9176 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 9177 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9178 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP38]] 9179 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP38]] 9180 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]] 9181 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP38]] 9182 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9183 // CHECK15: omp.body.continue: 9184 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9185 // CHECK15: omp.inner.for.inc: 9186 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 9187 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1 9188 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 9189 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 9190 // CHECK15: omp.inner.for.end: 9191 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9192 // CHECK15: omp.dispatch.inc: 9193 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 9194 // CHECK15: omp.dispatch.end: 9195 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9196 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 9197 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 9198 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9199 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 9200 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9201 // CHECK15: .omp.final.then: 9202 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9203 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 9204 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 9205 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 9206 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 9207 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 9208 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9209 // CHECK15: .omp.final.done: 9210 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 9211 // CHECK15: omp.precond.end: 9212 // CHECK15-NEXT: ret void 9213 // 9214 // 9215 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 9216 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9217 // CHECK15-NEXT: entry: 9218 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9219 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9220 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9221 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9222 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 9223 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9224 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 9225 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 9226 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9227 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9228 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 9229 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9230 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 9231 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 9232 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 9233 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9234 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9235 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9236 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 9237 // CHECK15-NEXT: ret void 9238 // 9239 // 9240 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 9241 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9242 // CHECK15-NEXT: entry: 9243 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9244 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9245 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9246 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9247 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9248 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9249 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9250 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9251 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9252 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9253 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9254 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9255 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9256 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9257 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9258 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 9259 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 9260 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9261 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9262 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9263 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 9264 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 9265 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9266 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9267 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 9268 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9269 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 9270 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9271 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9272 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 9273 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9274 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9275 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 9276 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 9277 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9278 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 9279 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9280 // CHECK15: omp.precond.then: 9281 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9282 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9283 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 9284 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9285 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9286 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9287 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 9288 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9289 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9290 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9291 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 9292 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9293 // CHECK15: cond.true: 9294 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9295 // CHECK15-NEXT: br label [[COND_END:%.*]] 9296 // CHECK15: cond.false: 9297 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9298 // CHECK15-NEXT: br label [[COND_END]] 9299 // CHECK15: cond.end: 9300 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 9301 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9302 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9303 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 9304 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9305 // CHECK15: omp.inner.for.cond: 9306 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]] 9307 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP41]] 9308 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 9309 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9310 // CHECK15: omp.inner.for.body: 9311 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP41]] 9312 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP41]] 9313 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP41]] 9314 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 9315 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 9316 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP41]] 9317 // CHECK15-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 9318 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 9319 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP20]]), !llvm.access.group [[ACC_GRP41]] 9320 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9321 // CHECK15: omp.inner.for.inc: 9322 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 9323 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP41]] 9324 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 9325 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 9326 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]] 9327 // CHECK15: omp.inner.for.end: 9328 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9329 // CHECK15: omp.loop.exit: 9330 // CHECK15-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9331 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 9332 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 9333 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9334 // CHECK15-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 9335 // CHECK15-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9336 // CHECK15: .omp.final.then: 9337 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9338 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 9339 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 9340 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 9341 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 9342 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 9343 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9344 // CHECK15: .omp.final.done: 9345 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 9346 // CHECK15: omp.precond.end: 9347 // CHECK15-NEXT: ret void 9348 // 9349 // 9350 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 9351 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9352 // CHECK15-NEXT: entry: 9353 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9354 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9355 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9356 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9357 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 9358 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 9359 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9360 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9361 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9362 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9363 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9364 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9365 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9366 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9367 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9368 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9369 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9370 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 9371 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9372 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9373 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9374 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9375 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 9376 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 9377 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9378 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9379 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 9380 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9381 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 9382 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9383 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9384 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 9385 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9386 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9387 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 9388 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 9389 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9390 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 9391 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9392 // CHECK15: omp.precond.then: 9393 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9394 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9395 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 9396 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9397 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9398 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 9399 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 9400 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9401 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9402 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9403 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9404 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9405 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9406 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 9407 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 9408 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9409 // CHECK15: omp.dispatch.cond: 9410 // CHECK15-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9411 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 9412 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 9413 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 9414 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9415 // CHECK15: omp.dispatch.body: 9416 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9417 // CHECK15-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 9418 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9419 // CHECK15: omp.inner.for.cond: 9420 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]] 9421 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP44]] 9422 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9423 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9424 // CHECK15: omp.inner.for.body: 9425 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 9426 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9427 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9428 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP44]] 9429 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP44]] 9430 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP20]] 9431 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP44]] 9432 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9433 // CHECK15: omp.body.continue: 9434 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9435 // CHECK15: omp.inner.for.inc: 9436 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 9437 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 9438 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 9439 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]] 9440 // CHECK15: omp.inner.for.end: 9441 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9442 // CHECK15: omp.dispatch.inc: 9443 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 9444 // CHECK15: omp.dispatch.end: 9445 // CHECK15-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9446 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 9447 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 9448 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9449 // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 9450 // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9451 // CHECK15: .omp.final.then: 9452 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9453 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0 9454 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 9455 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 9456 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 9457 // CHECK15-NEXT: store i32 [[ADD10]], ptr [[I4]], align 4 9458 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9459 // CHECK15: .omp.final.done: 9460 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 9461 // CHECK15: omp.precond.end: 9462 // CHECK15-NEXT: ret void 9463 // 9464 // 9465 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 9466 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 9467 // CHECK15-NEXT: entry: 9468 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 9469 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 9470 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 9471 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 9472 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 9473 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 9474 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9475 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 9476 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 9477 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 9478 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 9479 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 9480 // CHECK15-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9481 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9482 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9483 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4 9484 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4 9485 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4 9486 // CHECK15-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 9487 // CHECK15-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9488 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4 9489 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4 9490 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4 9491 // CHECK15-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 9492 // CHECK15-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9493 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 9494 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4 9495 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 4 9496 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 4 9497 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 4 9498 // CHECK15-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 9499 // CHECK15-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9500 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 9501 // CHECK15-NEXT: store i32 10, ptr [[M]], align 4 9502 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9503 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 9504 // CHECK15-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9505 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 9506 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 9507 // CHECK15-NEXT: store ptr null, ptr [[TMP2]], align 4 9508 // CHECK15-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9509 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9510 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 9511 // CHECK15-NEXT: store i32 3, ptr [[TMP5]], align 4 9512 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 9513 // CHECK15-NEXT: store i32 1, ptr [[TMP6]], align 4 9514 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 9515 // CHECK15-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 9516 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 9517 // CHECK15-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 9518 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 9519 // CHECK15-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 4 9520 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 9521 // CHECK15-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4 9522 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 9523 // CHECK15-NEXT: store ptr null, ptr [[TMP11]], align 4 9524 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 9525 // CHECK15-NEXT: store ptr null, ptr [[TMP12]], align 4 9526 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 9527 // CHECK15-NEXT: store i64 10, ptr [[TMP13]], align 8 9528 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 9529 // CHECK15-NEXT: store i64 0, ptr [[TMP14]], align 8 9530 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 9531 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 9532 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 9533 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 9534 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 9535 // CHECK15-NEXT: store i32 0, ptr [[TMP17]], align 4 9536 // CHECK15-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 9537 // CHECK15-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 9538 // CHECK15-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9539 // CHECK15: omp_offload.failed: 9540 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 9541 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 9542 // CHECK15: omp_offload.cont: 9543 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 9544 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP20]], align 4 9545 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 9546 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP21]], align 4 9547 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 9548 // CHECK15-NEXT: store ptr null, ptr [[TMP22]], align 4 9549 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 9550 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 9551 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 9552 // CHECK15-NEXT: store i32 3, ptr [[TMP25]], align 4 9553 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 9554 // CHECK15-NEXT: store i32 1, ptr [[TMP26]], align 4 9555 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 9556 // CHECK15-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 9557 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 9558 // CHECK15-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 9559 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 9560 // CHECK15-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 4 9561 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 9562 // CHECK15-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4 9563 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 9564 // CHECK15-NEXT: store ptr null, ptr [[TMP31]], align 4 9565 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 9566 // CHECK15-NEXT: store ptr null, ptr [[TMP32]], align 4 9567 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 9568 // CHECK15-NEXT: store i64 10, ptr [[TMP33]], align 8 9569 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 9570 // CHECK15-NEXT: store i64 0, ptr [[TMP34]], align 8 9571 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 9572 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 9573 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 9574 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 9575 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 9576 // CHECK15-NEXT: store i32 0, ptr [[TMP37]], align 4 9577 // CHECK15-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 9578 // CHECK15-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 9579 // CHECK15-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 9580 // CHECK15: omp_offload.failed6: 9581 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 9582 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT7]] 9583 // CHECK15: omp_offload.cont7: 9584 // CHECK15-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 9585 // CHECK15-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 9586 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9587 // CHECK15-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9588 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9589 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 9590 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP43]], align 4 9591 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 9592 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP44]], align 4 9593 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 9594 // CHECK15-NEXT: store ptr null, ptr [[TMP45]], align 4 9595 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 9596 // CHECK15-NEXT: store i32 [[TMP42]], ptr [[TMP46]], align 4 9597 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 9598 // CHECK15-NEXT: store i32 [[TMP42]], ptr [[TMP47]], align 4 9599 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 9600 // CHECK15-NEXT: store ptr null, ptr [[TMP48]], align 4 9601 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 9602 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 9603 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 9604 // CHECK15-NEXT: store i32 3, ptr [[TMP51]], align 4 9605 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 9606 // CHECK15-NEXT: store i32 2, ptr [[TMP52]], align 4 9607 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 9608 // CHECK15-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 4 9609 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 9610 // CHECK15-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 4 9611 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 9612 // CHECK15-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 4 9613 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 9614 // CHECK15-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 4 9615 // CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 9616 // CHECK15-NEXT: store ptr null, ptr [[TMP57]], align 4 9617 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 9618 // CHECK15-NEXT: store ptr null, ptr [[TMP58]], align 4 9619 // CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 9620 // CHECK15-NEXT: store i64 10, ptr [[TMP59]], align 8 9621 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 9622 // CHECK15-NEXT: store i64 0, ptr [[TMP60]], align 8 9623 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 9624 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 9625 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 9626 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 9627 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 9628 // CHECK15-NEXT: store i32 0, ptr [[TMP63]], align 4 9629 // CHECK15-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 9630 // CHECK15-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 9631 // CHECK15-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 9632 // CHECK15: omp_offload.failed13: 9633 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i32 [[TMP42]]) #[[ATTR3]] 9634 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT14]] 9635 // CHECK15: omp_offload.cont14: 9636 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 9637 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP66]], align 4 9638 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 9639 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP67]], align 4 9640 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0 9641 // CHECK15-NEXT: store ptr null, ptr [[TMP68]], align 4 9642 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 9643 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 9644 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 9645 // CHECK15-NEXT: store i32 3, ptr [[TMP71]], align 4 9646 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 9647 // CHECK15-NEXT: store i32 1, ptr [[TMP72]], align 4 9648 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 9649 // CHECK15-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 4 9650 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 9651 // CHECK15-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 4 9652 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 9653 // CHECK15-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 4 9654 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 9655 // CHECK15-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 4 9656 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 9657 // CHECK15-NEXT: store ptr null, ptr [[TMP77]], align 4 9658 // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 9659 // CHECK15-NEXT: store ptr null, ptr [[TMP78]], align 4 9660 // CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 9661 // CHECK15-NEXT: store i64 10, ptr [[TMP79]], align 8 9662 // CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 9663 // CHECK15-NEXT: store i64 0, ptr [[TMP80]], align 8 9664 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 9665 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 9666 // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 9667 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 9668 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 9669 // CHECK15-NEXT: store i32 0, ptr [[TMP83]], align 4 9670 // CHECK15-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 9671 // CHECK15-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 9672 // CHECK15-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 9673 // CHECK15: omp_offload.failed20: 9674 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 9675 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT21]] 9676 // CHECK15: omp_offload.cont21: 9677 // CHECK15-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 9678 // CHECK15-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 9679 // CHECK15-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 9680 // CHECK15-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 9681 // CHECK15-NEXT: [[TMP88:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 9682 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 9683 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP89]], align 4 9684 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 9685 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP90]], align 4 9686 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 9687 // CHECK15-NEXT: store ptr null, ptr [[TMP91]], align 4 9688 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 9689 // CHECK15-NEXT: store i32 [[TMP88]], ptr [[TMP92]], align 4 9690 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 9691 // CHECK15-NEXT: store i32 [[TMP88]], ptr [[TMP93]], align 4 9692 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1 9693 // CHECK15-NEXT: store ptr null, ptr [[TMP94]], align 4 9694 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 9695 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 9696 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 9697 // CHECK15-NEXT: store i32 3, ptr [[TMP97]], align 4 9698 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 9699 // CHECK15-NEXT: store i32 2, ptr [[TMP98]], align 4 9700 // CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 9701 // CHECK15-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 4 9702 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 9703 // CHECK15-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 4 9704 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 9705 // CHECK15-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 4 9706 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 9707 // CHECK15-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 4 9708 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 9709 // CHECK15-NEXT: store ptr null, ptr [[TMP103]], align 4 9710 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 9711 // CHECK15-NEXT: store ptr null, ptr [[TMP104]], align 4 9712 // CHECK15-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 9713 // CHECK15-NEXT: store i64 10, ptr [[TMP105]], align 8 9714 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 9715 // CHECK15-NEXT: store i64 0, ptr [[TMP106]], align 8 9716 // CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 9717 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 9718 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 9719 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 9720 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 9721 // CHECK15-NEXT: store i32 0, ptr [[TMP109]], align 4 9722 // CHECK15-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 9723 // CHECK15-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 9724 // CHECK15-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 9725 // CHECK15: omp_offload.failed29: 9726 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i32 [[TMP88]]) #[[ATTR3]] 9727 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]] 9728 // CHECK15: omp_offload.cont30: 9729 // CHECK15-NEXT: ret i32 0 9730 // 9731 // 9732 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 9733 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9734 // CHECK15-NEXT: entry: 9735 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9736 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9737 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9738 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 9739 // CHECK15-NEXT: ret void 9740 // 9741 // 9742 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 9743 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9744 // CHECK15-NEXT: entry: 9745 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9746 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9747 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9748 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9749 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9750 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9751 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9752 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9753 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9754 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9755 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9756 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9757 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9758 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9759 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9760 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 9761 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9762 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9763 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9764 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9765 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9766 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9767 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9768 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9769 // CHECK15: cond.true: 9770 // CHECK15-NEXT: br label [[COND_END:%.*]] 9771 // CHECK15: cond.false: 9772 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9773 // CHECK15-NEXT: br label [[COND_END]] 9774 // CHECK15: cond.end: 9775 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9776 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9777 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9778 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9779 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9780 // CHECK15: omp.inner.for.cond: 9781 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]] 9782 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]] 9783 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9784 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9785 // CHECK15: omp.inner.for.body: 9786 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]] 9787 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]] 9788 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP47]] 9789 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9790 // CHECK15: omp.inner.for.inc: 9791 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 9792 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]] 9793 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 9794 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 9795 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]] 9796 // CHECK15: omp.inner.for.end: 9797 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9798 // CHECK15: omp.loop.exit: 9799 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9800 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9801 // CHECK15-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 9802 // CHECK15-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9803 // CHECK15: .omp.final.then: 9804 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 9805 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9806 // CHECK15: .omp.final.done: 9807 // CHECK15-NEXT: ret void 9808 // 9809 // 9810 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 9811 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9812 // CHECK15-NEXT: entry: 9813 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9814 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9815 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9816 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9817 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9818 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9819 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9820 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9821 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9822 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9823 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9824 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9825 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9826 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9827 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9828 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9829 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9830 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9831 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9832 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 9833 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9834 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9835 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 9836 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 9837 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9838 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9839 // CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9840 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 9841 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9842 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9843 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 9844 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9845 // CHECK15: cond.true: 9846 // CHECK15-NEXT: br label [[COND_END:%.*]] 9847 // CHECK15: cond.false: 9848 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9849 // CHECK15-NEXT: br label [[COND_END]] 9850 // CHECK15: cond.end: 9851 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 9852 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9853 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9854 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 9855 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9856 // CHECK15: omp.inner.for.cond: 9857 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]] 9858 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]] 9859 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 9860 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9861 // CHECK15: omp.inner.for.body: 9862 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 9863 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 9864 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9865 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]] 9866 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]] 9867 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 9868 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP50]] 9869 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9870 // CHECK15: omp.body.continue: 9871 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9872 // CHECK15: omp.inner.for.inc: 9873 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 9874 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 9875 // CHECK15-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 9876 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]] 9877 // CHECK15: omp.inner.for.end: 9878 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9879 // CHECK15: omp.loop.exit: 9880 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 9881 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9882 // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 9883 // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9884 // CHECK15: .omp.final.then: 9885 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 9886 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9887 // CHECK15: .omp.final.done: 9888 // CHECK15-NEXT: ret void 9889 // 9890 // 9891 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 9892 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9893 // CHECK15-NEXT: entry: 9894 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9895 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9896 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9897 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 9898 // CHECK15-NEXT: ret void 9899 // 9900 // 9901 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 9902 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9903 // CHECK15-NEXT: entry: 9904 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9905 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9906 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9907 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9908 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9909 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9910 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9911 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9912 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9913 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9914 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9915 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9916 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9917 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9918 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9919 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 9920 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9921 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9922 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9923 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9924 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9925 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9926 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9927 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9928 // CHECK15: cond.true: 9929 // CHECK15-NEXT: br label [[COND_END:%.*]] 9930 // CHECK15: cond.false: 9931 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9932 // CHECK15-NEXT: br label [[COND_END]] 9933 // CHECK15: cond.end: 9934 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9935 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9936 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9937 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9938 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9939 // CHECK15: omp.inner.for.cond: 9940 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]] 9941 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP53]] 9942 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9943 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9944 // CHECK15: omp.inner.for.body: 9945 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP53]] 9946 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP53]] 9947 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP53]] 9948 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9949 // CHECK15: omp.inner.for.inc: 9950 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 9951 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP53]] 9952 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 9953 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 9954 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]] 9955 // CHECK15: omp.inner.for.end: 9956 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9957 // CHECK15: omp.loop.exit: 9958 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9959 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9960 // CHECK15-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 9961 // CHECK15-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9962 // CHECK15: .omp.final.then: 9963 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 9964 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 9965 // CHECK15: .omp.final.done: 9966 // CHECK15-NEXT: ret void 9967 // 9968 // 9969 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 9970 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9971 // CHECK15-NEXT: entry: 9972 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9973 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9974 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9975 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9976 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9977 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9978 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9979 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9980 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9981 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9982 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9983 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9984 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9985 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9986 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9987 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9988 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9989 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9990 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9991 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 9992 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9993 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9994 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 9995 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 9996 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9997 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9998 // CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9999 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 10000 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10001 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10002 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 10003 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10004 // CHECK15: cond.true: 10005 // CHECK15-NEXT: br label [[COND_END:%.*]] 10006 // CHECK15: cond.false: 10007 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10008 // CHECK15-NEXT: br label [[COND_END]] 10009 // CHECK15: cond.end: 10010 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 10011 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10012 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10013 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 10014 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10015 // CHECK15: omp.inner.for.cond: 10016 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]] 10017 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP56]] 10018 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 10019 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10020 // CHECK15: omp.inner.for.body: 10021 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 10022 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 10023 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10024 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP56]] 10025 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP56]] 10026 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 10027 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP56]] 10028 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10029 // CHECK15: omp.body.continue: 10030 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10031 // CHECK15: omp.inner.for.inc: 10032 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 10033 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 10034 // CHECK15-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 10035 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]] 10036 // CHECK15: omp.inner.for.end: 10037 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10038 // CHECK15: omp.loop.exit: 10039 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 10040 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10041 // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 10042 // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10043 // CHECK15: .omp.final.then: 10044 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10045 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10046 // CHECK15: .omp.final.done: 10047 // CHECK15-NEXT: ret void 10048 // 10049 // 10050 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 10051 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10052 // CHECK15-NEXT: entry: 10053 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10054 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10055 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 10056 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10057 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10058 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10059 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10060 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10061 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10062 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 10063 // CHECK15-NEXT: ret void 10064 // 10065 // 10066 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 10067 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10068 // CHECK15-NEXT: entry: 10069 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10070 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10071 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10072 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10073 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10074 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 10075 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10076 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10077 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10078 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10079 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10080 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 10081 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10082 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10083 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10084 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10085 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10086 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10087 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 10088 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10089 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10090 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10091 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 10092 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10093 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10094 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10095 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10096 // CHECK15: cond.true: 10097 // CHECK15-NEXT: br label [[COND_END:%.*]] 10098 // CHECK15: cond.false: 10099 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10100 // CHECK15-NEXT: br label [[COND_END]] 10101 // CHECK15: cond.end: 10102 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10103 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10104 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10105 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 10106 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10107 // CHECK15: omp.inner.for.cond: 10108 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]] 10109 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]] 10110 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10111 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10112 // CHECK15: omp.inner.for.body: 10113 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP59]] 10114 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]] 10115 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP59]] 10116 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP59]] 10117 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP59]] 10118 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]), !llvm.access.group [[ACC_GRP59]] 10119 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10120 // CHECK15: omp.inner.for.inc: 10121 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 10122 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP59]] 10123 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10124 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 10125 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]] 10126 // CHECK15: omp.inner.for.end: 10127 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10128 // CHECK15: omp.loop.exit: 10129 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 10130 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10131 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 10132 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10133 // CHECK15: .omp.final.then: 10134 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10135 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10136 // CHECK15: .omp.final.done: 10137 // CHECK15-NEXT: ret void 10138 // 10139 // 10140 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 10141 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10142 // CHECK15-NEXT: entry: 10143 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10144 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10145 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10146 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10147 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10148 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10149 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10150 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 10151 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10152 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10153 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10154 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10155 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10156 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10157 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10158 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10159 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10160 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10161 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10162 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10163 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10164 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 10165 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10166 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10167 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 10168 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 10169 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10170 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10171 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10172 // CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10173 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 10174 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 10175 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10176 // CHECK15: omp.dispatch.cond: 10177 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10178 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10179 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 10180 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10181 // CHECK15: cond.true: 10182 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10183 // CHECK15-NEXT: br label [[COND_END:%.*]] 10184 // CHECK15: cond.false: 10185 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10186 // CHECK15-NEXT: br label [[COND_END]] 10187 // CHECK15: cond.end: 10188 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 10189 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10190 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10191 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 10192 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10193 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10194 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 10195 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10196 // CHECK15: omp.dispatch.body: 10197 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10198 // CHECK15: omp.inner.for.cond: 10199 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62:![0-9]+]] 10200 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP62]] 10201 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 10202 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10203 // CHECK15: omp.inner.for.body: 10204 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 10205 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 10206 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10207 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP62]] 10208 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP62]] 10209 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]] 10210 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP62]] 10211 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10212 // CHECK15: omp.body.continue: 10213 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10214 // CHECK15: omp.inner.for.inc: 10215 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 10216 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 10217 // CHECK15-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 10218 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]] 10219 // CHECK15: omp.inner.for.end: 10220 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10221 // CHECK15: omp.dispatch.inc: 10222 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10223 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10224 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 10225 // CHECK15-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 10226 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10227 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10228 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 10229 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 10230 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 10231 // CHECK15: omp.dispatch.end: 10232 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 10233 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10234 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 10235 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10236 // CHECK15: .omp.final.then: 10237 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10238 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10239 // CHECK15: .omp.final.done: 10240 // CHECK15-NEXT: ret void 10241 // 10242 // 10243 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 10244 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10245 // CHECK15-NEXT: entry: 10246 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10247 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10248 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10249 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 10250 // CHECK15-NEXT: ret void 10251 // 10252 // 10253 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 10254 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10255 // CHECK15-NEXT: entry: 10256 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10257 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10258 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10259 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10260 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 10261 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10262 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10263 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10264 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10265 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10266 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10267 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10268 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10269 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10270 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10271 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 10272 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10273 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10274 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10275 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 10276 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10277 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10278 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10279 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10280 // CHECK15: cond.true: 10281 // CHECK15-NEXT: br label [[COND_END:%.*]] 10282 // CHECK15: cond.false: 10283 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10284 // CHECK15-NEXT: br label [[COND_END]] 10285 // CHECK15: cond.end: 10286 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10287 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10288 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10289 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 10290 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10291 // CHECK15: omp.inner.for.cond: 10292 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65:![0-9]+]] 10293 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP65]] 10294 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10295 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10296 // CHECK15: omp.inner.for.body: 10297 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP65]] 10298 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP65]] 10299 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP65]] 10300 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10301 // CHECK15: omp.inner.for.inc: 10302 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 10303 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP65]] 10304 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 10305 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 10306 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]] 10307 // CHECK15: omp.inner.for.end: 10308 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10309 // CHECK15: omp.loop.exit: 10310 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 10311 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10312 // CHECK15-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 10313 // CHECK15-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10314 // CHECK15: .omp.final.then: 10315 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10316 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10317 // CHECK15: .omp.final.done: 10318 // CHECK15-NEXT: ret void 10319 // 10320 // 10321 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 10322 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10323 // CHECK15-NEXT: entry: 10324 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10325 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10326 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10327 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10328 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10329 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10330 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 10331 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10332 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10333 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10334 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10335 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10336 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10337 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10338 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10339 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10340 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10341 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10342 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10343 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 10344 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10345 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10346 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 10347 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 10348 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10349 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10350 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10351 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10352 // CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10353 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 10354 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 10355 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10356 // CHECK15: omp.dispatch.cond: 10357 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 10358 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 10359 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10360 // CHECK15: omp.dispatch.body: 10361 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10362 // CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 10363 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10364 // CHECK15: omp.inner.for.cond: 10365 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68:![0-9]+]] 10366 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP68]] 10367 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 10368 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10369 // CHECK15: omp.inner.for.body: 10370 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 10371 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 10372 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10373 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP68]] 10374 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP68]] 10375 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]] 10376 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP68]] 10377 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10378 // CHECK15: omp.body.continue: 10379 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10380 // CHECK15: omp.inner.for.inc: 10381 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 10382 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 10383 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 10384 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]] 10385 // CHECK15: omp.inner.for.end: 10386 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10387 // CHECK15: omp.dispatch.inc: 10388 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 10389 // CHECK15: omp.dispatch.end: 10390 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 10391 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10392 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 10393 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10394 // CHECK15: .omp.final.then: 10395 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10396 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10397 // CHECK15: .omp.final.done: 10398 // CHECK15-NEXT: ret void 10399 // 10400 // 10401 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 10402 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10403 // CHECK15-NEXT: entry: 10404 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10405 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10406 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 10407 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10408 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10409 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10410 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10411 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10412 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10413 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 10414 // CHECK15-NEXT: ret void 10415 // 10416 // 10417 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 10418 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10419 // CHECK15-NEXT: entry: 10420 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10421 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10422 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10423 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10424 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10425 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 10426 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10427 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10428 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10429 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10430 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10431 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 10432 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10433 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10434 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10435 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10436 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10437 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10438 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 10439 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10440 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10441 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10442 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 10443 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10444 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10445 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10446 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10447 // CHECK15: cond.true: 10448 // CHECK15-NEXT: br label [[COND_END:%.*]] 10449 // CHECK15: cond.false: 10450 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10451 // CHECK15-NEXT: br label [[COND_END]] 10452 // CHECK15: cond.end: 10453 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10454 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10455 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10456 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 10457 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10458 // CHECK15: omp.inner.for.cond: 10459 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71:![0-9]+]] 10460 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP71]] 10461 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10462 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10463 // CHECK15: omp.inner.for.body: 10464 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP71]] 10465 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP71]] 10466 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP71]] 10467 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP71]] 10468 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP71]] 10469 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]), !llvm.access.group [[ACC_GRP71]] 10470 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10471 // CHECK15: omp.inner.for.inc: 10472 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 10473 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP71]] 10474 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10475 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 10476 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]] 10477 // CHECK15: omp.inner.for.end: 10478 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10479 // CHECK15: omp.loop.exit: 10480 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 10481 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10482 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 10483 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10484 // CHECK15: .omp.final.then: 10485 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10486 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10487 // CHECK15: .omp.final.done: 10488 // CHECK15-NEXT: ret void 10489 // 10490 // 10491 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 10492 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10493 // CHECK15-NEXT: entry: 10494 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10495 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10496 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10497 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10498 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10499 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 10500 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10501 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 10502 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10503 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10504 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10505 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10506 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 10507 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10508 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10509 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10510 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10511 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10512 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10513 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10514 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10515 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 10516 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10517 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10518 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 10519 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 10520 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10521 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10522 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10523 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10524 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10525 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10526 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 10527 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 10528 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10529 // CHECK15: omp.dispatch.cond: 10530 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 10531 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 10532 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10533 // CHECK15: omp.dispatch.body: 10534 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10535 // CHECK15-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 10536 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10537 // CHECK15: omp.inner.for.cond: 10538 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74:![0-9]+]] 10539 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 10540 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 10541 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10542 // CHECK15: omp.inner.for.body: 10543 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 10544 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 10545 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10546 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP74]] 10547 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP74]] 10548 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]] 10549 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP74]] 10550 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10551 // CHECK15: omp.body.continue: 10552 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10553 // CHECK15: omp.inner.for.inc: 10554 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 10555 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 10556 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 10557 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]] 10558 // CHECK15: omp.inner.for.end: 10559 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10560 // CHECK15: omp.dispatch.inc: 10561 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 10562 // CHECK15: omp.dispatch.end: 10563 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 10564 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10565 // CHECK15-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 10566 // CHECK15-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10567 // CHECK15: .omp.final.then: 10568 // CHECK15-NEXT: store i32 10, ptr [[I]], align 4 10569 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]] 10570 // CHECK15: .omp.final.done: 10571 // CHECK15-NEXT: ret void 10572 // 10573 // 10574 // CHECK17-LABEL: define {{[^@]+}}@main 10575 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 10576 // CHECK17-NEXT: entry: 10577 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 10578 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 10579 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 10580 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4 10581 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 10582 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 10583 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 10584 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10585 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 10586 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 10587 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 10588 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 10589 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10590 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10591 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10592 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 10593 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 10594 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8 10595 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8 10596 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8 10597 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8 10598 // CHECK17-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 10599 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 10600 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 10601 // CHECK17-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 10602 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 10603 // CHECK17-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 10604 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10605 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8 10606 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8 10607 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8 10608 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8 10609 // CHECK17-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 10610 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 10611 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 10612 // CHECK17-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 10613 // CHECK17-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 10614 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 8 10615 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 8 10616 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 8 10617 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 8 10618 // CHECK17-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 10619 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 10620 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 10621 // CHECK17-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 10622 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 10623 // CHECK17-NEXT: [[N_CASTED50:%.*]] = alloca i64, align 8 10624 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i64, align 8 10625 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 8 10626 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 8 10627 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 8 10628 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 8 10629 // CHECK17-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 10630 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 10631 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 10632 // CHECK17-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 10633 // CHECK17-NEXT: store i32 0, ptr [[RETVAL]], align 4 10634 // CHECK17-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 10635 // CHECK17-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 10636 // CHECK17-NEXT: store i32 100, ptr [[N]], align 4 10637 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 10638 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 10639 // CHECK17-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 10640 // CHECK17-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 10641 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 10642 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 10643 // CHECK17-NEXT: store i32 10, ptr [[M]], align 4 10644 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 10645 // CHECK17-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 10646 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 10647 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 10648 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false) 10649 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10650 // CHECK17-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8 10651 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10652 // CHECK17-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8 10653 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 10654 // CHECK17-NEXT: store ptr null, ptr [[TMP8]], align 8 10655 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 10656 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 10657 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 10658 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8 10659 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 10660 // CHECK17-NEXT: store ptr null, ptr [[TMP11]], align 8 10661 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 10662 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 10663 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 10664 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8 10665 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 10666 // CHECK17-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8 10667 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 10668 // CHECK17-NEXT: store ptr null, ptr [[TMP15]], align 8 10669 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10670 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10671 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 10672 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 10673 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 10674 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10675 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 10676 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10677 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10678 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10679 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10680 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 10681 // CHECK17-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 10682 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 10683 // CHECK17-NEXT: store i32 3, ptr [[TMP23]], align 4 10684 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 10685 // CHECK17-NEXT: store i32 3, ptr [[TMP24]], align 4 10686 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 10687 // CHECK17-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8 10688 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 10689 // CHECK17-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8 10690 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 10691 // CHECK17-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8 10692 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 10693 // CHECK17-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 10694 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 10695 // CHECK17-NEXT: store ptr null, ptr [[TMP29]], align 8 10696 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 10697 // CHECK17-NEXT: store ptr null, ptr [[TMP30]], align 8 10698 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 10699 // CHECK17-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 10700 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 10701 // CHECK17-NEXT: store i64 0, ptr [[TMP32]], align 8 10702 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 10703 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 10704 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 10705 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 10706 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 10707 // CHECK17-NEXT: store i32 0, ptr [[TMP35]], align 4 10708 // CHECK17-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 10709 // CHECK17-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 10710 // CHECK17-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10711 // CHECK17: omp_offload.failed: 10712 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 10713 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 10714 // CHECK17: omp_offload.cont: 10715 // CHECK17-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 10716 // CHECK17-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 10717 // CHECK17-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 10718 // CHECK17-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4 10719 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false) 10720 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 10721 // CHECK17-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8 10722 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 10723 // CHECK17-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8 10724 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 10725 // CHECK17-NEXT: store ptr null, ptr [[TMP43]], align 8 10726 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 10727 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8 10728 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 10729 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8 10730 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 10731 // CHECK17-NEXT: store ptr null, ptr [[TMP46]], align 8 10732 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 10733 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8 10734 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 10735 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8 10736 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 10737 // CHECK17-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8 10738 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 10739 // CHECK17-NEXT: store ptr null, ptr [[TMP50]], align 8 10740 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 10741 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 10742 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 10743 // CHECK17-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 10744 // CHECK17-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4 10745 // CHECK17-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 10746 // CHECK17-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0 10747 // CHECK17-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 10748 // CHECK17-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 10749 // CHECK17-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 10750 // CHECK17-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 10751 // CHECK17-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1 10752 // CHECK17-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64 10753 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 10754 // CHECK17-NEXT: store i32 3, ptr [[TMP58]], align 4 10755 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 10756 // CHECK17-NEXT: store i32 3, ptr [[TMP59]], align 4 10757 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 10758 // CHECK17-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8 10759 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 10760 // CHECK17-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8 10761 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 10762 // CHECK17-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8 10763 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 10764 // CHECK17-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8 10765 // CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 10766 // CHECK17-NEXT: store ptr null, ptr [[TMP64]], align 8 10767 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 10768 // CHECK17-NEXT: store ptr null, ptr [[TMP65]], align 8 10769 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 10770 // CHECK17-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8 10771 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 10772 // CHECK17-NEXT: store i64 0, ptr [[TMP67]], align 8 10773 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 10774 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4 10775 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 10776 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 10777 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 10778 // CHECK17-NEXT: store i32 0, ptr [[TMP70]], align 4 10779 // CHECK17-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 10780 // CHECK17-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 10781 // CHECK17-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 10782 // CHECK17: omp_offload.failed16: 10783 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 10784 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT17]] 10785 // CHECK17: omp_offload.cont17: 10786 // CHECK17-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 4 10787 // CHECK17-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4 10788 // CHECK17-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4 10789 // CHECK17-NEXT: store i32 [[TMP74]], ptr [[N_CASTED19]], align 4 10790 // CHECK17-NEXT: [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8 10791 // CHECK17-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 10792 // CHECK17-NEXT: store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10793 // CHECK17-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 10794 // CHECK17-NEXT: [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4 10795 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false) 10796 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 10797 // CHECK17-NEXT: store i64 [[TMP75]], ptr [[TMP79]], align 8 10798 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 10799 // CHECK17-NEXT: store i64 [[TMP75]], ptr [[TMP80]], align 8 10800 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 10801 // CHECK17-NEXT: store ptr null, ptr [[TMP81]], align 8 10802 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 10803 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP82]], align 8 10804 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 10805 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP83]], align 8 10806 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 10807 // CHECK17-NEXT: store ptr null, ptr [[TMP84]], align 8 10808 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 10809 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 8 10810 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 10811 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP86]], align 8 10812 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 10813 // CHECK17-NEXT: store i64 [[TMP78]], ptr [[TMP87]], align 8 10814 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 10815 // CHECK17-NEXT: store ptr null, ptr [[TMP88]], align 8 10816 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 10817 // CHECK17-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8 10818 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 10819 // CHECK17-NEXT: store i64 [[TMP77]], ptr [[TMP90]], align 8 10820 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 10821 // CHECK17-NEXT: store ptr null, ptr [[TMP91]], align 8 10822 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 10823 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 10824 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 10825 // CHECK17-NEXT: [[TMP95:%.*]] = load i32, ptr [[N]], align 4 10826 // CHECK17-NEXT: store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4 10827 // CHECK17-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 10828 // CHECK17-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0 10829 // CHECK17-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 10830 // CHECK17-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 10831 // CHECK17-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 10832 // CHECK17-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 10833 // CHECK17-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1 10834 // CHECK17-NEXT: [[TMP98:%.*]] = zext i32 [[ADD30]] to i64 10835 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 10836 // CHECK17-NEXT: store i32 3, ptr [[TMP99]], align 4 10837 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 10838 // CHECK17-NEXT: store i32 4, ptr [[TMP100]], align 4 10839 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 10840 // CHECK17-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8 10841 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 10842 // CHECK17-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8 10843 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 10844 // CHECK17-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 8 10845 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 10846 // CHECK17-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8 10847 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 10848 // CHECK17-NEXT: store ptr null, ptr [[TMP105]], align 8 10849 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 10850 // CHECK17-NEXT: store ptr null, ptr [[TMP106]], align 8 10851 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 10852 // CHECK17-NEXT: store i64 [[TMP98]], ptr [[TMP107]], align 8 10853 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 10854 // CHECK17-NEXT: store i64 0, ptr [[TMP108]], align 8 10855 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 10856 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4 10857 // CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 10858 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4 10859 // CHECK17-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 10860 // CHECK17-NEXT: store i32 0, ptr [[TMP111]], align 4 10861 // CHECK17-NEXT: [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 10862 // CHECK17-NEXT: [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0 10863 // CHECK17-NEXT: br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 10864 // CHECK17: omp_offload.failed32: 10865 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]] 10866 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT33]] 10867 // CHECK17: omp_offload.cont33: 10868 // CHECK17-NEXT: [[TMP114:%.*]] = load i32, ptr [[N]], align 4 10869 // CHECK17-NEXT: store i32 [[TMP114]], ptr [[N_CASTED34]], align 4 10870 // CHECK17-NEXT: [[TMP115:%.*]] = load i64, ptr [[N_CASTED34]], align 8 10871 // CHECK17-NEXT: [[TMP116:%.*]] = mul nuw i64 [[TMP1]], 4 10872 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES38]], ptr align 8 @.offload_sizes.5, i64 24, i1 false) 10873 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 10874 // CHECK17-NEXT: store i64 [[TMP115]], ptr [[TMP117]], align 8 10875 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 10876 // CHECK17-NEXT: store i64 [[TMP115]], ptr [[TMP118]], align 8 10877 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 0 10878 // CHECK17-NEXT: store ptr null, ptr [[TMP119]], align 8 10879 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 10880 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP120]], align 8 10881 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 10882 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP121]], align 8 10883 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 1 10884 // CHECK17-NEXT: store ptr null, ptr [[TMP122]], align 8 10885 // CHECK17-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 10886 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP123]], align 8 10887 // CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 10888 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP124]], align 8 10889 // CHECK17-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 10890 // CHECK17-NEXT: store i64 [[TMP116]], ptr [[TMP125]], align 8 10891 // CHECK17-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 2 10892 // CHECK17-NEXT: store ptr null, ptr [[TMP126]], align 8 10893 // CHECK17-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 10894 // CHECK17-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 10895 // CHECK17-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 10896 // CHECK17-NEXT: [[TMP130:%.*]] = load i32, ptr [[N]], align 4 10897 // CHECK17-NEXT: store i32 [[TMP130]], ptr [[DOTCAPTURE_EXPR_40]], align 4 10898 // CHECK17-NEXT: [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 10899 // CHECK17-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP131]], 0 10900 // CHECK17-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 10901 // CHECK17-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 10902 // CHECK17-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 10903 // CHECK17-NEXT: [[TMP132:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 10904 // CHECK17-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP132]], 1 10905 // CHECK17-NEXT: [[TMP133:%.*]] = zext i32 [[ADD45]] to i64 10906 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 10907 // CHECK17-NEXT: store i32 3, ptr [[TMP134]], align 4 10908 // CHECK17-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 10909 // CHECK17-NEXT: store i32 3, ptr [[TMP135]], align 4 10910 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 10911 // CHECK17-NEXT: store ptr [[TMP127]], ptr [[TMP136]], align 8 10912 // CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 10913 // CHECK17-NEXT: store ptr [[TMP128]], ptr [[TMP137]], align 8 10914 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 10915 // CHECK17-NEXT: store ptr [[TMP129]], ptr [[TMP138]], align 8 10916 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 10917 // CHECK17-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP139]], align 8 10918 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 10919 // CHECK17-NEXT: store ptr null, ptr [[TMP140]], align 8 10920 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 10921 // CHECK17-NEXT: store ptr null, ptr [[TMP141]], align 8 10922 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 10923 // CHECK17-NEXT: store i64 [[TMP133]], ptr [[TMP142]], align 8 10924 // CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 10925 // CHECK17-NEXT: store i64 0, ptr [[TMP143]], align 8 10926 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 10927 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4 10928 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 10929 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP145]], align 4 10930 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 10931 // CHECK17-NEXT: store i32 0, ptr [[TMP146]], align 4 10932 // CHECK17-NEXT: [[TMP147:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 10933 // CHECK17-NEXT: [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0 10934 // CHECK17-NEXT: br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 10935 // CHECK17: omp_offload.failed47: 10936 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP115]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 10937 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT48]] 10938 // CHECK17: omp_offload.cont48: 10939 // CHECK17-NEXT: [[TMP149:%.*]] = load i32, ptr [[M]], align 4 10940 // CHECK17-NEXT: store i32 [[TMP149]], ptr [[DOTCAPTURE_EXPR_49]], align 4 10941 // CHECK17-NEXT: [[TMP150:%.*]] = load i32, ptr [[N]], align 4 10942 // CHECK17-NEXT: store i32 [[TMP150]], ptr [[N_CASTED50]], align 4 10943 // CHECK17-NEXT: [[TMP151:%.*]] = load i64, ptr [[N_CASTED50]], align 8 10944 // CHECK17-NEXT: [[TMP152:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 10945 // CHECK17-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 10946 // CHECK17-NEXT: [[TMP153:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 8 10947 // CHECK17-NEXT: [[TMP154:%.*]] = mul nuw i64 [[TMP1]], 4 10948 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES55]], ptr align 8 @.offload_sizes.7, i64 32, i1 false) 10949 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 10950 // CHECK17-NEXT: store i64 [[TMP151]], ptr [[TMP155]], align 8 10951 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 10952 // CHECK17-NEXT: store i64 [[TMP151]], ptr [[TMP156]], align 8 10953 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 0 10954 // CHECK17-NEXT: store ptr null, ptr [[TMP157]], align 8 10955 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 10956 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP158]], align 8 10957 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 10958 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP159]], align 8 10959 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 1 10960 // CHECK17-NEXT: store ptr null, ptr [[TMP160]], align 8 10961 // CHECK17-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 10962 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP161]], align 8 10963 // CHECK17-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 10964 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP162]], align 8 10965 // CHECK17-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 10966 // CHECK17-NEXT: store i64 [[TMP154]], ptr [[TMP163]], align 8 10967 // CHECK17-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 2 10968 // CHECK17-NEXT: store ptr null, ptr [[TMP164]], align 8 10969 // CHECK17-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 10970 // CHECK17-NEXT: store i64 [[TMP153]], ptr [[TMP165]], align 8 10971 // CHECK17-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 10972 // CHECK17-NEXT: store i64 [[TMP153]], ptr [[TMP166]], align 8 10973 // CHECK17-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 3 10974 // CHECK17-NEXT: store ptr null, ptr [[TMP167]], align 8 10975 // CHECK17-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 10976 // CHECK17-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 10977 // CHECK17-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 10978 // CHECK17-NEXT: [[TMP171:%.*]] = load i32, ptr [[N]], align 4 10979 // CHECK17-NEXT: store i32 [[TMP171]], ptr [[DOTCAPTURE_EXPR_57]], align 4 10980 // CHECK17-NEXT: [[TMP172:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 10981 // CHECK17-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP172]], 0 10982 // CHECK17-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 10983 // CHECK17-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 10984 // CHECK17-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 10985 // CHECK17-NEXT: [[TMP173:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 10986 // CHECK17-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP173]], 1 10987 // CHECK17-NEXT: [[TMP174:%.*]] = zext i32 [[ADD62]] to i64 10988 // CHECK17-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 10989 // CHECK17-NEXT: store i32 3, ptr [[TMP175]], align 4 10990 // CHECK17-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 10991 // CHECK17-NEXT: store i32 4, ptr [[TMP176]], align 4 10992 // CHECK17-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 10993 // CHECK17-NEXT: store ptr [[TMP168]], ptr [[TMP177]], align 8 10994 // CHECK17-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 10995 // CHECK17-NEXT: store ptr [[TMP169]], ptr [[TMP178]], align 8 10996 // CHECK17-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 10997 // CHECK17-NEXT: store ptr [[TMP170]], ptr [[TMP179]], align 8 10998 // CHECK17-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 10999 // CHECK17-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP180]], align 8 11000 // CHECK17-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 11001 // CHECK17-NEXT: store ptr null, ptr [[TMP181]], align 8 11002 // CHECK17-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 11003 // CHECK17-NEXT: store ptr null, ptr [[TMP182]], align 8 11004 // CHECK17-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 11005 // CHECK17-NEXT: store i64 [[TMP174]], ptr [[TMP183]], align 8 11006 // CHECK17-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 11007 // CHECK17-NEXT: store i64 0, ptr [[TMP184]], align 8 11008 // CHECK17-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 11009 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP185]], align 4 11010 // CHECK17-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 11011 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP186]], align 4 11012 // CHECK17-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 11013 // CHECK17-NEXT: store i32 0, ptr [[TMP187]], align 4 11014 // CHECK17-NEXT: [[TMP188:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 11015 // CHECK17-NEXT: [[TMP189:%.*]] = icmp ne i32 [[TMP188]], 0 11016 // CHECK17-NEXT: br i1 [[TMP189]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 11017 // CHECK17: omp_offload.failed64: 11018 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP153]]) #[[ATTR3]] 11019 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT65]] 11020 // CHECK17: omp_offload.cont65: 11021 // CHECK17-NEXT: [[TMP190:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 11022 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP190]]) 11023 // CHECK17-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 11024 // CHECK17-NEXT: [[TMP191:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 11025 // CHECK17-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP191]]) 11026 // CHECK17-NEXT: [[TMP192:%.*]] = load i32, ptr [[RETVAL]], align 4 11027 // CHECK17-NEXT: ret i32 [[TMP192]] 11028 // 11029 // 11030 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 11031 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 11032 // CHECK17-NEXT: entry: 11033 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11034 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11035 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11036 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11037 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11038 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11039 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11040 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11041 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11042 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11043 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 11044 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 11045 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 11046 // CHECK17-NEXT: ret void 11047 // 11048 // 11049 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 11050 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11051 // CHECK17-NEXT: entry: 11052 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11053 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11054 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11055 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11056 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11057 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11058 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11059 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11060 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11061 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11062 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11063 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11064 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11065 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11066 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 11067 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11068 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11069 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11070 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11071 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11072 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11073 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11074 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11075 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11076 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 11077 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11078 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11079 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11080 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11081 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11082 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11083 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11084 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11085 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11086 // CHECK17: omp.precond.then: 11087 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11088 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11089 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 11090 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11091 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11092 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11093 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 11094 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11095 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11096 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11097 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 11098 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11099 // CHECK17: cond.true: 11100 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11101 // CHECK17-NEXT: br label [[COND_END:%.*]] 11102 // CHECK17: cond.false: 11103 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11104 // CHECK17-NEXT: br label [[COND_END]] 11105 // CHECK17: cond.end: 11106 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 11107 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11108 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11109 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 11110 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11111 // CHECK17: omp.inner.for.cond: 11112 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 11113 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 11114 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 11115 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11116 // CHECK17: omp.inner.for.body: 11117 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP13]] 11118 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 11119 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 11120 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 11121 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]] 11122 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP13]] 11123 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP13]] 11124 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP13]] 11125 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11126 // CHECK17: omp.inner.for.inc: 11127 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 11128 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP13]] 11129 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11130 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 11131 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 11132 // CHECK17: omp.inner.for.end: 11133 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11134 // CHECK17: omp.loop.exit: 11135 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11136 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 11137 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 11138 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11139 // CHECK17-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 11140 // CHECK17-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11141 // CHECK17: .omp.final.then: 11142 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11143 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 11144 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 11145 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 11146 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 11147 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 11148 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11149 // CHECK17: .omp.final.done: 11150 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11151 // CHECK17: omp.precond.end: 11152 // CHECK17-NEXT: ret void 11153 // 11154 // 11155 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 11156 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11157 // CHECK17-NEXT: entry: 11158 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11159 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11160 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11161 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11162 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11163 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11164 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11165 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11166 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11167 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11168 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11169 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11170 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11171 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11172 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11173 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11174 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 11175 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11176 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11177 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11178 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11179 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11180 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11181 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11182 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11183 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11184 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11185 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 11186 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11187 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11188 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11189 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11190 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11191 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11192 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11193 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11194 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11195 // CHECK17: omp.precond.then: 11196 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11197 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11198 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 11199 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11200 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 11201 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11202 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 11203 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11204 // CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 11205 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11206 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11207 // CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11208 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 11209 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11210 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11211 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11212 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11213 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11214 // CHECK17: cond.true: 11215 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11216 // CHECK17-NEXT: br label [[COND_END:%.*]] 11217 // CHECK17: cond.false: 11218 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11219 // CHECK17-NEXT: br label [[COND_END]] 11220 // CHECK17: cond.end: 11221 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11222 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11223 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11224 // CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 11225 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11226 // CHECK17: omp.inner.for.cond: 11227 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]] 11228 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 11229 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11230 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11231 // CHECK17: omp.inner.for.body: 11232 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 11233 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 11234 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11235 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP17]] 11236 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP17]] 11237 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 11238 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 11239 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]] 11240 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11241 // CHECK17: omp.body.continue: 11242 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11243 // CHECK17: omp.inner.for.inc: 11244 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 11245 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 11246 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 11247 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 11248 // CHECK17: omp.inner.for.end: 11249 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11250 // CHECK17: omp.loop.exit: 11251 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11252 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 11253 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 11254 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11255 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 11256 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11257 // CHECK17: .omp.final.then: 11258 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11259 // CHECK17-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 11260 // CHECK17-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 11261 // CHECK17-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 11262 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 11263 // CHECK17-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 11264 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11265 // CHECK17: .omp.final.done: 11266 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11267 // CHECK17: omp.precond.end: 11268 // CHECK17-NEXT: ret void 11269 // 11270 // 11271 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 11272 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11273 // CHECK17-NEXT: entry: 11274 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11275 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11276 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11277 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11278 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11279 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11280 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11281 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11282 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11283 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11284 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 11285 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 11286 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 11287 // CHECK17-NEXT: ret void 11288 // 11289 // 11290 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 11291 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11292 // CHECK17-NEXT: entry: 11293 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11294 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11295 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11296 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11297 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11298 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11299 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11300 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11301 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11302 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11303 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11304 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11305 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11306 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11307 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 11308 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11309 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11310 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11311 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11312 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11313 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11314 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11315 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11316 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11317 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 11318 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11319 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11320 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11321 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11322 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11323 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11324 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11325 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11326 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11327 // CHECK17: omp.precond.then: 11328 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11329 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11330 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 11331 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11332 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11333 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11334 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 11335 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11336 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11337 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11338 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 11339 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11340 // CHECK17: cond.true: 11341 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11342 // CHECK17-NEXT: br label [[COND_END:%.*]] 11343 // CHECK17: cond.false: 11344 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11345 // CHECK17-NEXT: br label [[COND_END]] 11346 // CHECK17: cond.end: 11347 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 11348 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11349 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11350 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 11351 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11352 // CHECK17: omp.inner.for.cond: 11353 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 11354 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 11355 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 11356 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11357 // CHECK17: omp.inner.for.body: 11358 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP22]] 11359 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 11360 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 11361 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 11362 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP22]] 11363 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP22]] 11364 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP22]] 11365 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP22]] 11366 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11367 // CHECK17: omp.inner.for.inc: 11368 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 11369 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP22]] 11370 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11371 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 11372 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 11373 // CHECK17: omp.inner.for.end: 11374 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11375 // CHECK17: omp.loop.exit: 11376 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11377 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 11378 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 11379 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11380 // CHECK17-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 11381 // CHECK17-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11382 // CHECK17: .omp.final.then: 11383 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11384 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 11385 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 11386 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 11387 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 11388 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 11389 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11390 // CHECK17: .omp.final.done: 11391 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11392 // CHECK17: omp.precond.end: 11393 // CHECK17-NEXT: ret void 11394 // 11395 // 11396 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 11397 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11398 // CHECK17-NEXT: entry: 11399 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11400 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11401 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11402 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11403 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11404 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11405 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11406 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11407 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11408 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11409 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11410 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11411 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11412 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11413 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11414 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11415 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 11416 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11417 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11418 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11419 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11420 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11421 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11422 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11423 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11424 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11425 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11426 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 11427 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11428 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11429 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11430 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11431 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11432 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11433 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11434 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11435 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11436 // CHECK17: omp.precond.then: 11437 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11438 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11439 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 11440 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11441 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 11442 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11443 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 11444 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11445 // CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 11446 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11447 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11448 // CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11449 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 11450 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11451 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11452 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11453 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11454 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11455 // CHECK17: cond.true: 11456 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11457 // CHECK17-NEXT: br label [[COND_END:%.*]] 11458 // CHECK17: cond.false: 11459 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11460 // CHECK17-NEXT: br label [[COND_END]] 11461 // CHECK17: cond.end: 11462 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11463 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11464 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11465 // CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 11466 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11467 // CHECK17: omp.inner.for.cond: 11468 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 11469 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 11470 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11471 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11472 // CHECK17: omp.inner.for.body: 11473 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 11474 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 11475 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11476 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP25]] 11477 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP25]] 11478 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 11479 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 11480 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 11481 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11482 // CHECK17: omp.body.continue: 11483 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11484 // CHECK17: omp.inner.for.inc: 11485 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 11486 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 11487 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 11488 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 11489 // CHECK17: omp.inner.for.end: 11490 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11491 // CHECK17: omp.loop.exit: 11492 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11493 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 11494 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 11495 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11496 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 11497 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11498 // CHECK17: .omp.final.then: 11499 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11500 // CHECK17-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 11501 // CHECK17-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 11502 // CHECK17-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 11503 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 11504 // CHECK17-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 11505 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11506 // CHECK17: .omp.final.done: 11507 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11508 // CHECK17: omp.precond.end: 11509 // CHECK17-NEXT: ret void 11510 // 11511 // 11512 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 11513 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11514 // CHECK17-NEXT: entry: 11515 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11516 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11517 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11518 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11519 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11520 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11521 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11522 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11523 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11524 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11525 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11526 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11527 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11528 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 11529 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 11530 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11531 // CHECK17-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 11532 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 11533 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 11534 // CHECK17-NEXT: ret void 11535 // 11536 // 11537 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 11538 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11539 // CHECK17-NEXT: entry: 11540 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11541 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11542 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11543 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11544 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11545 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11546 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11547 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11548 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11549 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11550 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11551 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11552 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11553 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11554 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11555 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 11556 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11557 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11558 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11559 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11560 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11561 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11562 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11563 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11564 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11565 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11566 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11567 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11568 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11569 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11570 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11571 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11572 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11573 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11574 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11575 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11576 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11577 // CHECK17: omp.precond.then: 11578 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11579 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11580 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 11581 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11582 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11583 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11584 // CHECK17-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11585 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 11586 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 11587 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11588 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11589 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 11590 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11591 // CHECK17: cond.true: 11592 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11593 // CHECK17-NEXT: br label [[COND_END:%.*]] 11594 // CHECK17: cond.false: 11595 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11596 // CHECK17-NEXT: br label [[COND_END]] 11597 // CHECK17: cond.end: 11598 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11599 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11600 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11601 // CHECK17-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 11602 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11603 // CHECK17: omp.inner.for.cond: 11604 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 11605 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP28]] 11606 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 11607 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 11608 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11609 // CHECK17: omp.inner.for.body: 11610 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 11611 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 11612 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 11613 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 11614 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP28]] 11615 // CHECK17-NEXT: store i32 [[TMP20]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP28]] 11616 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP28]] 11617 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP28]] 11618 // CHECK17-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP28]] 11619 // CHECK17-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP28]] 11620 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP23]]), !llvm.access.group [[ACC_GRP28]] 11621 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11622 // CHECK17: omp.inner.for.inc: 11623 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 11624 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP28]] 11625 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 11626 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 11627 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 11628 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP28]] 11629 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 11630 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 11631 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 11632 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP28]] 11633 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 11634 // CHECK17-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 11635 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 11636 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP28]] 11637 // CHECK17-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]] 11638 // CHECK17-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 11639 // CHECK17: cond.true11: 11640 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP28]] 11641 // CHECK17-NEXT: br label [[COND_END13:%.*]] 11642 // CHECK17: cond.false12: 11643 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 11644 // CHECK17-NEXT: br label [[COND_END13]] 11645 // CHECK17: cond.end13: 11646 // CHECK17-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE11]] ], [ [[TMP33]], [[COND_FALSE12]] ] 11647 // CHECK17-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 11648 // CHECK17-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP28]] 11649 // CHECK17-NEXT: store i32 [[TMP34]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 11650 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 11651 // CHECK17: omp.inner.for.end: 11652 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11653 // CHECK17: omp.loop.exit: 11654 // CHECK17-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11655 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 11656 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP36]]) 11657 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11658 // CHECK17-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 11659 // CHECK17-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11660 // CHECK17: .omp.final.then: 11661 // CHECK17-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11662 // CHECK17-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP39]], 0 11663 // CHECK17-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 11664 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1 11665 // CHECK17-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]] 11666 // CHECK17-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 11667 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11668 // CHECK17: .omp.final.done: 11669 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11670 // CHECK17: omp.precond.end: 11671 // CHECK17-NEXT: ret void 11672 // 11673 // 11674 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 11675 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11676 // CHECK17-NEXT: entry: 11677 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11678 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11679 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11680 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11681 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11682 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11683 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11684 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11685 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11686 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11687 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11688 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11689 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11690 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11691 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11692 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11693 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11694 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4 11695 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11696 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11697 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11698 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11699 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11700 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11701 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11702 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11703 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11704 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11705 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11706 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11707 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11708 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11709 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11710 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11711 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11712 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11713 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11714 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11715 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11716 // CHECK17: omp.precond.then: 11717 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11718 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11719 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 11720 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11721 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 11722 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11723 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 11724 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11725 // CHECK17-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 11726 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11727 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11728 // CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11729 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 11730 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11731 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11732 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11733 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11734 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11735 // CHECK17: cond.true: 11736 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11737 // CHECK17-NEXT: br label [[COND_END:%.*]] 11738 // CHECK17: cond.false: 11739 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11740 // CHECK17-NEXT: br label [[COND_END]] 11741 // CHECK17: cond.end: 11742 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11743 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11744 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11745 // CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 11746 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11747 // CHECK17: omp.inner.for.cond: 11748 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31:![0-9]+]] 11749 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP31]] 11750 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11751 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11752 // CHECK17: omp.inner.for.body: 11753 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 11754 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 11755 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11756 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP31]] 11757 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP31]] 11758 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 11759 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 11760 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP31]] 11761 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11762 // CHECK17: omp.body.continue: 11763 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11764 // CHECK17: omp.inner.for.inc: 11765 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 11766 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 11767 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 11768 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] 11769 // CHECK17: omp.inner.for.end: 11770 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11771 // CHECK17: omp.loop.exit: 11772 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11773 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 11774 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 11775 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11776 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 11777 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11778 // CHECK17: .omp.final.then: 11779 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11780 // CHECK17-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP24]], 0 11781 // CHECK17-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 11782 // CHECK17-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 11783 // CHECK17-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 11784 // CHECK17-NEXT: store i32 [[ADD12]], ptr [[I5]], align 4 11785 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11786 // CHECK17: .omp.final.done: 11787 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11788 // CHECK17: omp.precond.end: 11789 // CHECK17-NEXT: ret void 11790 // 11791 // 11792 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 11793 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11794 // CHECK17-NEXT: entry: 11795 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11796 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11797 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11798 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11799 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11800 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11801 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11802 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11803 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11804 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11805 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 11806 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 11807 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 11808 // CHECK17-NEXT: ret void 11809 // 11810 // 11811 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 11812 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11813 // CHECK17-NEXT: entry: 11814 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11815 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11816 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11817 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11818 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11819 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11820 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11821 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11822 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11823 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11824 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11825 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11826 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11827 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11828 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 11829 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 11830 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11831 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11832 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11833 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11834 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11835 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11836 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11837 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11838 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 11839 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11840 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11841 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11842 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11843 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11844 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11845 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11846 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11847 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11848 // CHECK17: omp.precond.then: 11849 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11850 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11851 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 11852 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11853 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11854 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11855 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 11856 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11857 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11858 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11859 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 11860 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11861 // CHECK17: cond.true: 11862 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11863 // CHECK17-NEXT: br label [[COND_END:%.*]] 11864 // CHECK17: cond.false: 11865 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11866 // CHECK17-NEXT: br label [[COND_END]] 11867 // CHECK17: cond.end: 11868 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 11869 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11870 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11871 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 11872 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11873 // CHECK17: omp.inner.for.cond: 11874 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 11875 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 11876 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 11877 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11878 // CHECK17: omp.inner.for.body: 11879 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP34]] 11880 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 11881 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 11882 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 11883 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP34]] 11884 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP34]] 11885 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP34]] 11886 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP34]] 11887 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11888 // CHECK17: omp.inner.for.inc: 11889 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 11890 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP34]] 11891 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11892 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 11893 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] 11894 // CHECK17: omp.inner.for.end: 11895 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11896 // CHECK17: omp.loop.exit: 11897 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11898 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 11899 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 11900 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11901 // CHECK17-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 11902 // CHECK17-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11903 // CHECK17: .omp.final.then: 11904 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11905 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 11906 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 11907 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 11908 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 11909 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 11910 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 11911 // CHECK17: .omp.final.done: 11912 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11913 // CHECK17: omp.precond.end: 11914 // CHECK17-NEXT: ret void 11915 // 11916 // 11917 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 11918 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11919 // CHECK17-NEXT: entry: 11920 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11921 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11922 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11923 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11924 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11925 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11926 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11927 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11928 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11929 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11930 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11931 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11932 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11933 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11934 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11935 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11936 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 11937 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11938 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11939 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11940 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11941 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11942 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11943 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11944 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11945 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11946 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11947 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 11948 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11949 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11950 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11951 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11952 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11953 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11954 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11955 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11956 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11957 // CHECK17: omp.precond.then: 11958 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11959 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11960 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 11961 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11962 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 11963 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11964 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 11965 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11966 // CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 11967 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11968 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11969 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11970 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11971 // CHECK17-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11972 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 11973 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 11974 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11975 // CHECK17: omp.dispatch.cond: 11976 // CHECK17-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11977 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 11978 // CHECK17-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 11979 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 11980 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11981 // CHECK17: omp.dispatch.body: 11982 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11983 // CHECK17-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 11984 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11985 // CHECK17: omp.inner.for.cond: 11986 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37:![0-9]+]] 11987 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP37]] 11988 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 11989 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11990 // CHECK17: omp.inner.for.body: 11991 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 11992 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 11993 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11994 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP37]] 11995 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP37]] 11996 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 11997 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 11998 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP37]] 11999 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12000 // CHECK17: omp.body.continue: 12001 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12002 // CHECK17: omp.inner.for.inc: 12003 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 12004 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 12005 // CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 12006 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] 12007 // CHECK17: omp.inner.for.end: 12008 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12009 // CHECK17: omp.dispatch.inc: 12010 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 12011 // CHECK17: omp.dispatch.end: 12012 // CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12013 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 12014 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 12015 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12016 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 12017 // CHECK17-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12018 // CHECK17: .omp.final.then: 12019 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12020 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0 12021 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 12022 // CHECK17-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 12023 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 12024 // CHECK17-NEXT: store i32 [[ADD10]], ptr [[I4]], align 4 12025 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12026 // CHECK17: .omp.final.done: 12027 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 12028 // CHECK17: omp.precond.end: 12029 // CHECK17-NEXT: ret void 12030 // 12031 // 12032 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 12033 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12034 // CHECK17-NEXT: entry: 12035 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 12036 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 12037 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12038 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12039 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 12040 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12041 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 12042 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 12043 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12044 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12045 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 12046 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12047 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12048 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 12049 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 12050 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 12051 // CHECK17-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12052 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 12053 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 12054 // CHECK17-NEXT: ret void 12055 // 12056 // 12057 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 12058 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12059 // CHECK17-NEXT: entry: 12060 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12061 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12062 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 12063 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 12064 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12065 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12066 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12067 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12068 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12069 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12070 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12071 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12072 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12073 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12074 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12075 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 12076 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 12077 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12078 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12079 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12080 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 12081 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 12082 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12083 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12084 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 12085 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12086 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12087 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12088 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12089 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 12090 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12091 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12092 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 12093 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 12094 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12095 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 12096 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12097 // CHECK17: omp.precond.then: 12098 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12099 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 12100 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 12101 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12102 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12103 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12104 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 12105 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12106 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12107 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 12108 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 12109 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12110 // CHECK17: cond.true: 12111 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 12112 // CHECK17-NEXT: br label [[COND_END:%.*]] 12113 // CHECK17: cond.false: 12114 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12115 // CHECK17-NEXT: br label [[COND_END]] 12116 // CHECK17: cond.end: 12117 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 12118 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12119 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12120 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 12121 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12122 // CHECK17: omp.inner.for.cond: 12123 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40:![0-9]+]] 12124 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP40]] 12125 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 12126 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12127 // CHECK17: omp.inner.for.body: 12128 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP40]] 12129 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 12130 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP40]] 12131 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 12132 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP40]] 12133 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP40]] 12134 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP40]] 12135 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP40]] 12136 // CHECK17-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP40]] 12137 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP40]] 12138 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP22]]), !llvm.access.group [[ACC_GRP40]] 12139 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12140 // CHECK17: omp.inner.for.inc: 12141 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 12142 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP40]] 12143 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 12144 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 12145 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] 12146 // CHECK17: omp.inner.for.end: 12147 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12148 // CHECK17: omp.loop.exit: 12149 // CHECK17-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12150 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 12151 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 12152 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12153 // CHECK17-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 12154 // CHECK17-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12155 // CHECK17: .omp.final.then: 12156 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12157 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 12158 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 12159 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 12160 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 12161 // CHECK17-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 12162 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12163 // CHECK17: .omp.final.done: 12164 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 12165 // CHECK17: omp.precond.end: 12166 // CHECK17-NEXT: ret void 12167 // 12168 // 12169 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 12170 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12171 // CHECK17-NEXT: entry: 12172 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12173 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12174 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12175 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12176 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 12177 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 12178 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12179 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12180 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12181 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12182 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12183 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12184 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12185 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12186 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12187 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12188 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12189 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4 12190 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12191 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12192 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12193 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12194 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 12195 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 12196 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12197 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12198 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 12199 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12200 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12201 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12202 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12203 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 12204 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12205 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12206 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 12207 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 12208 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12209 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 12210 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12211 // CHECK17: omp.precond.then: 12212 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12213 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 12214 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 12215 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12216 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 12217 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12218 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 12219 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 12220 // CHECK17-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 12221 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12222 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12223 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 12224 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12225 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12226 // CHECK17-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12227 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 12228 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 12229 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12230 // CHECK17: omp.dispatch.cond: 12231 // CHECK17-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12232 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 12233 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 12234 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 12235 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12236 // CHECK17: omp.dispatch.body: 12237 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12238 // CHECK17-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 12239 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12240 // CHECK17: omp.inner.for.cond: 12241 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]] 12242 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 12243 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12244 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12245 // CHECK17: omp.inner.for.body: 12246 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 12247 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 12248 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12249 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP43]] 12250 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP43]] 12251 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 12252 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 12253 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP43]] 12254 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12255 // CHECK17: omp.body.continue: 12256 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12257 // CHECK17: omp.inner.for.inc: 12258 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 12259 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 12260 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 12261 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] 12262 // CHECK17: omp.inner.for.end: 12263 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12264 // CHECK17: omp.dispatch.inc: 12265 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 12266 // CHECK17: omp.dispatch.end: 12267 // CHECK17-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12268 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 12269 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 12270 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12271 // CHECK17-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 12272 // CHECK17-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12273 // CHECK17: .omp.final.then: 12274 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12275 // CHECK17-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP26]], 0 12276 // CHECK17-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 12277 // CHECK17-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 12278 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 12279 // CHECK17-NEXT: store i32 [[ADD11]], ptr [[I5]], align 4 12280 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12281 // CHECK17: .omp.final.done: 12282 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 12283 // CHECK17: omp.precond.end: 12284 // CHECK17-NEXT: ret void 12285 // 12286 // 12287 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 12288 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 12289 // CHECK17-NEXT: entry: 12290 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 12291 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 12292 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 12293 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 12294 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 12295 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 12296 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12297 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 12298 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 12299 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 12300 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 12301 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 12302 // CHECK17-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12303 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12304 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12305 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8 12306 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8 12307 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8 12308 // CHECK17-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 12309 // CHECK17-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12310 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8 12311 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8 12312 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8 12313 // CHECK17-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 12314 // CHECK17-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12315 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 12316 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8 12317 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 8 12318 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 8 12319 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 8 12320 // CHECK17-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 12321 // CHECK17-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12322 // CHECK17-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 12323 // CHECK17-NEXT: store i32 10, ptr [[M]], align 4 12324 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12325 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 12326 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12327 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 12328 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 12329 // CHECK17-NEXT: store ptr null, ptr [[TMP2]], align 8 12330 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12331 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12332 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 12333 // CHECK17-NEXT: store i32 3, ptr [[TMP5]], align 4 12334 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 12335 // CHECK17-NEXT: store i32 1, ptr [[TMP6]], align 4 12336 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 12337 // CHECK17-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 12338 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 12339 // CHECK17-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 12340 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 12341 // CHECK17-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 8 12342 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 12343 // CHECK17-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8 12344 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 12345 // CHECK17-NEXT: store ptr null, ptr [[TMP11]], align 8 12346 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 12347 // CHECK17-NEXT: store ptr null, ptr [[TMP12]], align 8 12348 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 12349 // CHECK17-NEXT: store i64 10, ptr [[TMP13]], align 8 12350 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 12351 // CHECK17-NEXT: store i64 0, ptr [[TMP14]], align 8 12352 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 12353 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 12354 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 12355 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 12356 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 12357 // CHECK17-NEXT: store i32 0, ptr [[TMP17]], align 4 12358 // CHECK17-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 12359 // CHECK17-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 12360 // CHECK17-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12361 // CHECK17: omp_offload.failed: 12362 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 12363 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 12364 // CHECK17: omp_offload.cont: 12365 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 12366 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP20]], align 8 12367 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 12368 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP21]], align 8 12369 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 12370 // CHECK17-NEXT: store ptr null, ptr [[TMP22]], align 8 12371 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 12372 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 12373 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 12374 // CHECK17-NEXT: store i32 3, ptr [[TMP25]], align 4 12375 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 12376 // CHECK17-NEXT: store i32 1, ptr [[TMP26]], align 4 12377 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 12378 // CHECK17-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 12379 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 12380 // CHECK17-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 12381 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 12382 // CHECK17-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 8 12383 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 12384 // CHECK17-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8 12385 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 12386 // CHECK17-NEXT: store ptr null, ptr [[TMP31]], align 8 12387 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 12388 // CHECK17-NEXT: store ptr null, ptr [[TMP32]], align 8 12389 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 12390 // CHECK17-NEXT: store i64 10, ptr [[TMP33]], align 8 12391 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 12392 // CHECK17-NEXT: store i64 0, ptr [[TMP34]], align 8 12393 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 12394 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 12395 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 12396 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 12397 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 12398 // CHECK17-NEXT: store i32 0, ptr [[TMP37]], align 4 12399 // CHECK17-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 12400 // CHECK17-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 12401 // CHECK17-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 12402 // CHECK17: omp_offload.failed6: 12403 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 12404 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT7]] 12405 // CHECK17: omp_offload.cont7: 12406 // CHECK17-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 12407 // CHECK17-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 12408 // CHECK17-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12409 // CHECK17-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12410 // CHECK17-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 12411 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 12412 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP43]], align 8 12413 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 12414 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP44]], align 8 12415 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 12416 // CHECK17-NEXT: store ptr null, ptr [[TMP45]], align 8 12417 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 12418 // CHECK17-NEXT: store i64 [[TMP42]], ptr [[TMP46]], align 8 12419 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 12420 // CHECK17-NEXT: store i64 [[TMP42]], ptr [[TMP47]], align 8 12421 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 12422 // CHECK17-NEXT: store ptr null, ptr [[TMP48]], align 8 12423 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 12424 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 12425 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 12426 // CHECK17-NEXT: store i32 3, ptr [[TMP51]], align 4 12427 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 12428 // CHECK17-NEXT: store i32 2, ptr [[TMP52]], align 4 12429 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 12430 // CHECK17-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 8 12431 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 12432 // CHECK17-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 8 12433 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 12434 // CHECK17-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 8 12435 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 12436 // CHECK17-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 8 12437 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 12438 // CHECK17-NEXT: store ptr null, ptr [[TMP57]], align 8 12439 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 12440 // CHECK17-NEXT: store ptr null, ptr [[TMP58]], align 8 12441 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 12442 // CHECK17-NEXT: store i64 10, ptr [[TMP59]], align 8 12443 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 12444 // CHECK17-NEXT: store i64 0, ptr [[TMP60]], align 8 12445 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 12446 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 12447 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 12448 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 12449 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 12450 // CHECK17-NEXT: store i32 0, ptr [[TMP63]], align 4 12451 // CHECK17-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 12452 // CHECK17-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 12453 // CHECK17-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 12454 // CHECK17: omp_offload.failed13: 12455 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i64 [[TMP42]]) #[[ATTR3]] 12456 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT14]] 12457 // CHECK17: omp_offload.cont14: 12458 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 12459 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP66]], align 8 12460 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 12461 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP67]], align 8 12462 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0 12463 // CHECK17-NEXT: store ptr null, ptr [[TMP68]], align 8 12464 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 12465 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 12466 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 12467 // CHECK17-NEXT: store i32 3, ptr [[TMP71]], align 4 12468 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 12469 // CHECK17-NEXT: store i32 1, ptr [[TMP72]], align 4 12470 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 12471 // CHECK17-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 8 12472 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 12473 // CHECK17-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 8 12474 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 12475 // CHECK17-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 8 12476 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 12477 // CHECK17-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 8 12478 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 12479 // CHECK17-NEXT: store ptr null, ptr [[TMP77]], align 8 12480 // CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 12481 // CHECK17-NEXT: store ptr null, ptr [[TMP78]], align 8 12482 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 12483 // CHECK17-NEXT: store i64 10, ptr [[TMP79]], align 8 12484 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 12485 // CHECK17-NEXT: store i64 0, ptr [[TMP80]], align 8 12486 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 12487 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 12488 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 12489 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 12490 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 12491 // CHECK17-NEXT: store i32 0, ptr [[TMP83]], align 4 12492 // CHECK17-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 12493 // CHECK17-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 12494 // CHECK17-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 12495 // CHECK17: omp_offload.failed20: 12496 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 12497 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]] 12498 // CHECK17: omp_offload.cont21: 12499 // CHECK17-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 12500 // CHECK17-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 12501 // CHECK17-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 12502 // CHECK17-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 12503 // CHECK17-NEXT: [[TMP88:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 8 12504 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 12505 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP89]], align 8 12506 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 12507 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP90]], align 8 12508 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 12509 // CHECK17-NEXT: store ptr null, ptr [[TMP91]], align 8 12510 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 12511 // CHECK17-NEXT: store i64 [[TMP88]], ptr [[TMP92]], align 8 12512 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 12513 // CHECK17-NEXT: store i64 [[TMP88]], ptr [[TMP93]], align 8 12514 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1 12515 // CHECK17-NEXT: store ptr null, ptr [[TMP94]], align 8 12516 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 12517 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 12518 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 12519 // CHECK17-NEXT: store i32 3, ptr [[TMP97]], align 4 12520 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 12521 // CHECK17-NEXT: store i32 2, ptr [[TMP98]], align 4 12522 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 12523 // CHECK17-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 8 12524 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 12525 // CHECK17-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 8 12526 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 12527 // CHECK17-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 8 12528 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 12529 // CHECK17-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 8 12530 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 12531 // CHECK17-NEXT: store ptr null, ptr [[TMP103]], align 8 12532 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 12533 // CHECK17-NEXT: store ptr null, ptr [[TMP104]], align 8 12534 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 12535 // CHECK17-NEXT: store i64 10, ptr [[TMP105]], align 8 12536 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 12537 // CHECK17-NEXT: store i64 0, ptr [[TMP106]], align 8 12538 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 12539 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 12540 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 12541 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 12542 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 12543 // CHECK17-NEXT: store i32 0, ptr [[TMP109]], align 4 12544 // CHECK17-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 12545 // CHECK17-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 12546 // CHECK17-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 12547 // CHECK17: omp_offload.failed29: 12548 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i64 [[TMP88]]) #[[ATTR3]] 12549 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT30]] 12550 // CHECK17: omp_offload.cont30: 12551 // CHECK17-NEXT: ret i32 0 12552 // 12553 // 12554 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 12555 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12556 // CHECK17-NEXT: entry: 12557 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12558 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12559 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12560 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 12561 // CHECK17-NEXT: ret void 12562 // 12563 // 12564 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 12565 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12566 // CHECK17-NEXT: entry: 12567 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12568 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12569 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12570 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12571 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12572 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12573 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12574 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12575 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12576 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12577 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12578 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12579 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12580 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12581 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12582 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 12583 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12584 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12585 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12586 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 12587 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12588 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12589 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12590 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12591 // CHECK17: cond.true: 12592 // CHECK17-NEXT: br label [[COND_END:%.*]] 12593 // CHECK17: cond.false: 12594 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12595 // CHECK17-NEXT: br label [[COND_END]] 12596 // CHECK17: cond.end: 12597 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12598 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12599 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12600 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 12601 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12602 // CHECK17: omp.inner.for.cond: 12603 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]] 12604 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 12605 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12606 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12607 // CHECK17: omp.inner.for.body: 12608 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP46]] 12609 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12610 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 12611 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12612 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP46]] 12613 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12614 // CHECK17: omp.inner.for.inc: 12615 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 12616 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP46]] 12617 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 12618 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 12619 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] 12620 // CHECK17: omp.inner.for.end: 12621 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12622 // CHECK17: omp.loop.exit: 12623 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 12624 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12625 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 12626 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12627 // CHECK17: .omp.final.then: 12628 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 12629 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12630 // CHECK17: .omp.final.done: 12631 // CHECK17-NEXT: ret void 12632 // 12633 // 12634 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 12635 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12636 // CHECK17-NEXT: entry: 12637 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12638 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12639 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12640 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12641 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12642 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12643 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12644 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12645 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12646 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12647 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12648 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12649 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12650 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12651 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12652 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12653 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12654 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12655 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12656 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 12657 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12658 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 12659 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12660 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 12661 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 12662 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 12663 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12664 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12665 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12666 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 12667 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12668 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12669 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 12670 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12671 // CHECK17: cond.true: 12672 // CHECK17-NEXT: br label [[COND_END:%.*]] 12673 // CHECK17: cond.false: 12674 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12675 // CHECK17-NEXT: br label [[COND_END]] 12676 // CHECK17: cond.end: 12677 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 12678 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 12679 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12680 // CHECK17-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 12681 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12682 // CHECK17: omp.inner.for.cond: 12683 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]] 12684 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP49]] 12685 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 12686 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12687 // CHECK17: omp.inner.for.body: 12688 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 12689 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 12690 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12691 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP49]] 12692 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP49]] 12693 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 12694 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 12695 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP49]] 12696 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12697 // CHECK17: omp.body.continue: 12698 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12699 // CHECK17: omp.inner.for.inc: 12700 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 12701 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 12702 // CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 12703 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] 12704 // CHECK17: omp.inner.for.end: 12705 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12706 // CHECK17: omp.loop.exit: 12707 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 12708 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12709 // CHECK17-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 12710 // CHECK17-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12711 // CHECK17: .omp.final.then: 12712 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 12713 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12714 // CHECK17: .omp.final.done: 12715 // CHECK17-NEXT: ret void 12716 // 12717 // 12718 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 12719 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12720 // CHECK17-NEXT: entry: 12721 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12722 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12723 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12724 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 12725 // CHECK17-NEXT: ret void 12726 // 12727 // 12728 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 12729 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12730 // CHECK17-NEXT: entry: 12731 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12732 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12733 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12734 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12735 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12736 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12737 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12738 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12739 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12740 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12741 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12742 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12743 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12744 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12745 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12746 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 12747 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12748 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12749 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12750 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 12751 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12752 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12753 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12754 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12755 // CHECK17: cond.true: 12756 // CHECK17-NEXT: br label [[COND_END:%.*]] 12757 // CHECK17: cond.false: 12758 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12759 // CHECK17-NEXT: br label [[COND_END]] 12760 // CHECK17: cond.end: 12761 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12762 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12763 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12764 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 12765 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12766 // CHECK17: omp.inner.for.cond: 12767 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52:![0-9]+]] 12768 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP52]] 12769 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12770 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12771 // CHECK17: omp.inner.for.body: 12772 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP52]] 12773 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12774 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP52]] 12775 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12776 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP52]] 12777 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12778 // CHECK17: omp.inner.for.inc: 12779 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 12780 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP52]] 12781 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 12782 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 12783 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] 12784 // CHECK17: omp.inner.for.end: 12785 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12786 // CHECK17: omp.loop.exit: 12787 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 12788 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12789 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 12790 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12791 // CHECK17: .omp.final.then: 12792 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 12793 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12794 // CHECK17: .omp.final.done: 12795 // CHECK17-NEXT: ret void 12796 // 12797 // 12798 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 12799 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12800 // CHECK17-NEXT: entry: 12801 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12802 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12803 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12804 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12805 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12806 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12807 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12808 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12809 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12810 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12811 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12812 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12813 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12814 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12815 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12816 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12817 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12818 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12819 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12820 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 12821 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12822 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 12823 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12824 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 12825 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 12826 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 12827 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12828 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12829 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12830 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 12831 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12832 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12833 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 12834 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12835 // CHECK17: cond.true: 12836 // CHECK17-NEXT: br label [[COND_END:%.*]] 12837 // CHECK17: cond.false: 12838 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12839 // CHECK17-NEXT: br label [[COND_END]] 12840 // CHECK17: cond.end: 12841 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 12842 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 12843 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12844 // CHECK17-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 12845 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12846 // CHECK17: omp.inner.for.cond: 12847 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]] 12848 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP55]] 12849 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 12850 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12851 // CHECK17: omp.inner.for.body: 12852 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]] 12853 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 12854 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12855 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP55]] 12856 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP55]] 12857 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 12858 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 12859 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP55]] 12860 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12861 // CHECK17: omp.body.continue: 12862 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12863 // CHECK17: omp.inner.for.inc: 12864 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]] 12865 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 12866 // CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]] 12867 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]] 12868 // CHECK17: omp.inner.for.end: 12869 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12870 // CHECK17: omp.loop.exit: 12871 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 12872 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12873 // CHECK17-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 12874 // CHECK17-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12875 // CHECK17: .omp.final.then: 12876 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 12877 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12878 // CHECK17: .omp.final.done: 12879 // CHECK17-NEXT: ret void 12880 // 12881 // 12882 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 12883 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12884 // CHECK17-NEXT: entry: 12885 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12886 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12887 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12888 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12889 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12890 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12891 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 12892 // CHECK17-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12893 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 12894 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 12895 // CHECK17-NEXT: ret void 12896 // 12897 // 12898 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 12899 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12900 // CHECK17-NEXT: entry: 12901 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12902 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12903 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12904 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12905 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12906 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12907 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12908 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12909 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12910 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12911 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12912 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12913 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12914 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12915 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12916 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12917 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12918 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12919 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 12920 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12921 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12922 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12923 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 12924 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12925 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12926 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12927 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12928 // CHECK17: cond.true: 12929 // CHECK17-NEXT: br label [[COND_END:%.*]] 12930 // CHECK17: cond.false: 12931 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12932 // CHECK17-NEXT: br label [[COND_END]] 12933 // CHECK17: cond.end: 12934 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12935 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12936 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12937 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 12938 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12939 // CHECK17: omp.inner.for.cond: 12940 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]] 12941 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP58]] 12942 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12943 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12944 // CHECK17: omp.inner.for.body: 12945 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP58]] 12946 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12947 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP58]] 12948 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12949 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP58]] 12950 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP58]] 12951 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP58]] 12952 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP58]] 12953 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12954 // CHECK17: omp.inner.for.inc: 12955 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]] 12956 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP58]] 12957 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 12958 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]] 12959 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]] 12960 // CHECK17: omp.inner.for.end: 12961 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12962 // CHECK17: omp.loop.exit: 12963 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 12964 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12965 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 12966 // CHECK17-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12967 // CHECK17: .omp.final.then: 12968 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 12969 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 12970 // CHECK17: .omp.final.done: 12971 // CHECK17-NEXT: ret void 12972 // 12973 // 12974 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 12975 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12976 // CHECK17-NEXT: entry: 12977 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12978 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12979 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12980 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12981 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12982 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12983 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12984 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12985 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12986 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12987 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12988 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12989 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12990 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12991 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12992 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12993 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12994 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12995 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12996 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12997 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12998 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 12999 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 13000 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 13001 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13002 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 13003 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 13004 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 13005 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13006 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13007 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13008 // CHECK17-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 13009 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 13010 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 13011 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13012 // CHECK17: omp.dispatch.cond: 13013 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13014 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13015 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32 13016 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]] 13017 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13018 // CHECK17: cond.true: 13019 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13020 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 13021 // CHECK17-NEXT: br label [[COND_END:%.*]] 13022 // CHECK17: cond.false: 13023 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13024 // CHECK17-NEXT: br label [[COND_END]] 13025 // CHECK17: cond.end: 13026 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 13027 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13028 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13029 // CHECK17-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 13030 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13031 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13032 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 13033 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13034 // CHECK17: omp.dispatch.body: 13035 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13036 // CHECK17: omp.inner.for.cond: 13037 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61:![0-9]+]] 13038 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP61]] 13039 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 13040 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13041 // CHECK17: omp.inner.for.body: 13042 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61]] 13043 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 13044 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13045 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP61]] 13046 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP61]] 13047 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 13048 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 13049 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP61]] 13050 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13051 // CHECK17: omp.body.continue: 13052 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13053 // CHECK17: omp.inner.for.inc: 13054 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61]] 13055 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 13056 // CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP61]] 13057 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] 13058 // CHECK17: omp.inner.for.end: 13059 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13060 // CHECK17: omp.dispatch.inc: 13061 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13062 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13063 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 13064 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 13065 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13066 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13067 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 13068 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 13069 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 13070 // CHECK17: omp.dispatch.end: 13071 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 13072 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13073 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 13074 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13075 // CHECK17: .omp.final.then: 13076 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 13077 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 13078 // CHECK17: .omp.final.done: 13079 // CHECK17-NEXT: ret void 13080 // 13081 // 13082 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 13083 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13084 // CHECK17-NEXT: entry: 13085 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 13086 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 13087 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 13088 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 13089 // CHECK17-NEXT: ret void 13090 // 13091 // 13092 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 13093 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13094 // CHECK17-NEXT: entry: 13095 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 13096 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 13097 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 13098 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13099 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 13100 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13101 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13102 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13103 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13104 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 13105 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 13106 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 13107 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 13108 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 13109 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13110 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 13111 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13112 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13113 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 13114 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 13115 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13116 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13117 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13118 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13119 // CHECK17: cond.true: 13120 // CHECK17-NEXT: br label [[COND_END:%.*]] 13121 // CHECK17: cond.false: 13122 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13123 // CHECK17-NEXT: br label [[COND_END]] 13124 // CHECK17: cond.end: 13125 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13126 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13127 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13128 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 13129 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13130 // CHECK17: omp.inner.for.cond: 13131 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP64:![0-9]+]] 13132 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP64]] 13133 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13134 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13135 // CHECK17: omp.inner.for.body: 13136 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP64]] 13137 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 13138 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP64]] 13139 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 13140 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP64]] 13141 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13142 // CHECK17: omp.inner.for.inc: 13143 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP64]] 13144 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP64]] 13145 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 13146 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP64]] 13147 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]] 13148 // CHECK17: omp.inner.for.end: 13149 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13150 // CHECK17: omp.loop.exit: 13151 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 13152 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13153 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 13154 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13155 // CHECK17: .omp.final.then: 13156 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 13157 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 13158 // CHECK17: .omp.final.done: 13159 // CHECK17-NEXT: ret void 13160 // 13161 // 13162 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 13163 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13164 // CHECK17-NEXT: entry: 13165 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 13166 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 13167 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 13168 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 13169 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 13170 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13171 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 13172 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13173 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13174 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13175 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13176 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 13177 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 13178 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 13179 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 13180 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13181 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 13182 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 13183 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13184 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 13185 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 13186 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 13187 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13188 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 13189 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 13190 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 13191 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13192 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13193 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13194 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13195 // CHECK17-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 13196 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 13197 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 13198 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13199 // CHECK17: omp.dispatch.cond: 13200 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 13201 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 13202 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13203 // CHECK17: omp.dispatch.body: 13204 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13205 // CHECK17-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 13206 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13207 // CHECK17: omp.inner.for.cond: 13208 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67:![0-9]+]] 13209 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP67]] 13210 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 13211 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13212 // CHECK17: omp.inner.for.body: 13213 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67]] 13214 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 13215 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13216 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP67]] 13217 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP67]] 13218 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 13219 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 13220 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP67]] 13221 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13222 // CHECK17: omp.body.continue: 13223 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13224 // CHECK17: omp.inner.for.inc: 13225 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67]] 13226 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 13227 // CHECK17-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP67]] 13228 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]] 13229 // CHECK17: omp.inner.for.end: 13230 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13231 // CHECK17: omp.dispatch.inc: 13232 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 13233 // CHECK17: omp.dispatch.end: 13234 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 13235 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13236 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 13237 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13238 // CHECK17: .omp.final.then: 13239 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 13240 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 13241 // CHECK17: .omp.final.done: 13242 // CHECK17-NEXT: ret void 13243 // 13244 // 13245 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 13246 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13247 // CHECK17-NEXT: entry: 13248 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 13249 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 13250 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 13251 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 13252 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 13253 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 13254 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13255 // CHECK17-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13256 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 13257 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 13258 // CHECK17-NEXT: ret void 13259 // 13260 // 13261 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 13262 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13263 // CHECK17-NEXT: entry: 13264 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 13265 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 13266 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 13267 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 13268 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13269 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 13270 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13271 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13272 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13273 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13274 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 13275 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 13276 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 13277 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 13278 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 13279 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 13280 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 13281 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13282 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 13283 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13284 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13285 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 13286 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 13287 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13288 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13289 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13290 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13291 // CHECK17: cond.true: 13292 // CHECK17-NEXT: br label [[COND_END:%.*]] 13293 // CHECK17: cond.false: 13294 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13295 // CHECK17-NEXT: br label [[COND_END]] 13296 // CHECK17: cond.end: 13297 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13298 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13299 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13300 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 13301 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13302 // CHECK17: omp.inner.for.cond: 13303 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP70:![0-9]+]] 13304 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP70]] 13305 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13306 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13307 // CHECK17: omp.inner.for.body: 13308 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP70]] 13309 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 13310 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP70]] 13311 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 13312 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP70]] 13313 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP70]] 13314 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP70]] 13315 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP70]] 13316 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13317 // CHECK17: omp.inner.for.inc: 13318 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP70]] 13319 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP70]] 13320 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 13321 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP70]] 13322 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]] 13323 // CHECK17: omp.inner.for.end: 13324 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13325 // CHECK17: omp.loop.exit: 13326 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 13327 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13328 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 13329 // CHECK17-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13330 // CHECK17: .omp.final.then: 13331 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 13332 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 13333 // CHECK17: .omp.final.done: 13334 // CHECK17-NEXT: ret void 13335 // 13336 // 13337 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 13338 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13339 // CHECK17-NEXT: entry: 13340 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 13341 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 13342 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 13343 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 13344 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 13345 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 13346 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13347 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 13348 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13349 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13350 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13351 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13352 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 13353 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 13354 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 13355 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 13356 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13357 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 13358 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 13359 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 13360 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13361 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 13362 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 13363 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 13364 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 13365 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 13366 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 13367 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 13368 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13369 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13370 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13371 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13372 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13373 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 13374 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 13375 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 13376 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13377 // CHECK17: omp.dispatch.cond: 13378 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 13379 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 13380 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13381 // CHECK17: omp.dispatch.body: 13382 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13383 // CHECK17-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 13384 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13385 // CHECK17: omp.inner.for.cond: 13386 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73:![0-9]+]] 13387 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP73]] 13388 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 13389 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13390 // CHECK17: omp.inner.for.body: 13391 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73]] 13392 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 13393 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13394 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP73]] 13395 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP73]] 13396 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 13397 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 13398 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP73]] 13399 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13400 // CHECK17: omp.body.continue: 13401 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13402 // CHECK17: omp.inner.for.inc: 13403 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73]] 13404 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 13405 // CHECK17-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP73]] 13406 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]] 13407 // CHECK17: omp.inner.for.end: 13408 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13409 // CHECK17: omp.dispatch.inc: 13410 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 13411 // CHECK17: omp.dispatch.end: 13412 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 13413 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13414 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 13415 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13416 // CHECK17: .omp.final.then: 13417 // CHECK17-NEXT: store i32 10, ptr [[I]], align 4 13418 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]] 13419 // CHECK17: .omp.final.done: 13420 // CHECK17-NEXT: ret void 13421 // 13422 // 13423 // CHECK19-LABEL: define {{[^@]+}}@main 13424 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 13425 // CHECK19-NEXT: entry: 13426 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 13427 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 13428 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 13429 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4 13430 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 13431 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 13432 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 13433 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13434 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 13435 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 13436 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 13437 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 13438 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13439 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13440 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13441 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 13442 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 13443 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4 13444 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4 13445 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4 13446 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 13447 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 13448 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 13449 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 13450 // CHECK19-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13451 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 13452 // CHECK19-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4 13453 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13454 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4 13455 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4 13456 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4 13457 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4 13458 // CHECK19-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 13459 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 13460 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 13461 // CHECK19-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13462 // CHECK19-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4 13463 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 4 13464 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 4 13465 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 4 13466 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4 13467 // CHECK19-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 13468 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 13469 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 13470 // CHECK19-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13471 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 13472 // CHECK19-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4 13473 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4 13474 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 4 13475 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 4 13476 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 4 13477 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4 13478 // CHECK19-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 13479 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 13480 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 13481 // CHECK19-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13482 // CHECK19-NEXT: store i32 0, ptr [[RETVAL]], align 4 13483 // CHECK19-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 13484 // CHECK19-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 13485 // CHECK19-NEXT: store i32 100, ptr [[N]], align 4 13486 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 13487 // CHECK19-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 13488 // CHECK19-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 13489 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 13490 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 13491 // CHECK19-NEXT: store i32 10, ptr [[M]], align 4 13492 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 13493 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 13494 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 13495 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 13496 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 13497 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false) 13498 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13499 // CHECK19-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4 13500 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13501 // CHECK19-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 13502 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 13503 // CHECK19-NEXT: store ptr null, ptr [[TMP8]], align 4 13504 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 13505 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 13506 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 13507 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4 13508 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 13509 // CHECK19-NEXT: store ptr null, ptr [[TMP11]], align 4 13510 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 13511 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 13512 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 13513 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4 13514 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 13515 // CHECK19-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4 13516 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 13517 // CHECK19-NEXT: store ptr null, ptr [[TMP15]], align 4 13518 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13519 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13520 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 13521 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 13522 // CHECK19-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 13523 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13524 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 13525 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13526 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13527 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13528 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13529 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 13530 // CHECK19-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 13531 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 13532 // CHECK19-NEXT: store i32 3, ptr [[TMP23]], align 4 13533 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 13534 // CHECK19-NEXT: store i32 3, ptr [[TMP24]], align 4 13535 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 13536 // CHECK19-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4 13537 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 13538 // CHECK19-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4 13539 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 13540 // CHECK19-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4 13541 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 13542 // CHECK19-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 13543 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 13544 // CHECK19-NEXT: store ptr null, ptr [[TMP29]], align 4 13545 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 13546 // CHECK19-NEXT: store ptr null, ptr [[TMP30]], align 4 13547 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 13548 // CHECK19-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 13549 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 13550 // CHECK19-NEXT: store i64 0, ptr [[TMP32]], align 8 13551 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 13552 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 13553 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 13554 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 13555 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 13556 // CHECK19-NEXT: store i32 0, ptr [[TMP35]], align 4 13557 // CHECK19-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 13558 // CHECK19-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 13559 // CHECK19-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13560 // CHECK19: omp_offload.failed: 13561 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 13562 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 13563 // CHECK19: omp_offload.cont: 13564 // CHECK19-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 13565 // CHECK19-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 13566 // CHECK19-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 13567 // CHECK19-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4 13568 // CHECK19-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64 13569 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false) 13570 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 13571 // CHECK19-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4 13572 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 13573 // CHECK19-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 13574 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 13575 // CHECK19-NEXT: store ptr null, ptr [[TMP44]], align 4 13576 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 13577 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4 13578 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 13579 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4 13580 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 13581 // CHECK19-NEXT: store ptr null, ptr [[TMP47]], align 4 13582 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 13583 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4 13584 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 13585 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4 13586 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 13587 // CHECK19-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4 13588 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 13589 // CHECK19-NEXT: store ptr null, ptr [[TMP51]], align 4 13590 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 13591 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 13592 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 13593 // CHECK19-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4 13594 // CHECK19-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4 13595 // CHECK19-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 13596 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0 13597 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 13598 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 13599 // CHECK19-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 13600 // CHECK19-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 13601 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1 13602 // CHECK19-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64 13603 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 13604 // CHECK19-NEXT: store i32 3, ptr [[TMP59]], align 4 13605 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 13606 // CHECK19-NEXT: store i32 3, ptr [[TMP60]], align 4 13607 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 13608 // CHECK19-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4 13609 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 13610 // CHECK19-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4 13611 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 13612 // CHECK19-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4 13613 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 13614 // CHECK19-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4 13615 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 13616 // CHECK19-NEXT: store ptr null, ptr [[TMP65]], align 4 13617 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 13618 // CHECK19-NEXT: store ptr null, ptr [[TMP66]], align 4 13619 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 13620 // CHECK19-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8 13621 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 13622 // CHECK19-NEXT: store i64 0, ptr [[TMP68]], align 8 13623 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 13624 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 13625 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 13626 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4 13627 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 13628 // CHECK19-NEXT: store i32 0, ptr [[TMP71]], align 4 13629 // CHECK19-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 13630 // CHECK19-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0 13631 // CHECK19-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 13632 // CHECK19: omp_offload.failed16: 13633 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 13634 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]] 13635 // CHECK19: omp_offload.cont17: 13636 // CHECK19-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 4 13637 // CHECK19-NEXT: store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4 13638 // CHECK19-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4 13639 // CHECK19-NEXT: store i32 [[TMP75]], ptr [[N_CASTED19]], align 4 13640 // CHECK19-NEXT: [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4 13641 // CHECK19-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 13642 // CHECK19-NEXT: store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13643 // CHECK19-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13644 // CHECK19-NEXT: [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4 13645 // CHECK19-NEXT: [[TMP80:%.*]] = sext i32 [[TMP79]] to i64 13646 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false) 13647 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 13648 // CHECK19-NEXT: store i32 [[TMP76]], ptr [[TMP81]], align 4 13649 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 13650 // CHECK19-NEXT: store i32 [[TMP76]], ptr [[TMP82]], align 4 13651 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 13652 // CHECK19-NEXT: store ptr null, ptr [[TMP83]], align 4 13653 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 13654 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP84]], align 4 13655 // CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 13656 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP85]], align 4 13657 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 13658 // CHECK19-NEXT: store ptr null, ptr [[TMP86]], align 4 13659 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 13660 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 4 13661 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 13662 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 4 13663 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 13664 // CHECK19-NEXT: store i64 [[TMP80]], ptr [[TMP89]], align 4 13665 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2 13666 // CHECK19-NEXT: store ptr null, ptr [[TMP90]], align 4 13667 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 13668 // CHECK19-NEXT: store i32 [[TMP78]], ptr [[TMP91]], align 4 13669 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 13670 // CHECK19-NEXT: store i32 [[TMP78]], ptr [[TMP92]], align 4 13671 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3 13672 // CHECK19-NEXT: store ptr null, ptr [[TMP93]], align 4 13673 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 13674 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 13675 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 13676 // CHECK19-NEXT: [[TMP97:%.*]] = load i32, ptr [[N]], align 4 13677 // CHECK19-NEXT: store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4 13678 // CHECK19-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 13679 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0 13680 // CHECK19-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 13681 // CHECK19-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 13682 // CHECK19-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 13683 // CHECK19-NEXT: [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 13684 // CHECK19-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1 13685 // CHECK19-NEXT: [[TMP100:%.*]] = zext i32 [[ADD30]] to i64 13686 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 13687 // CHECK19-NEXT: store i32 3, ptr [[TMP101]], align 4 13688 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 13689 // CHECK19-NEXT: store i32 4, ptr [[TMP102]], align 4 13690 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 13691 // CHECK19-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4 13692 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 13693 // CHECK19-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4 13694 // CHECK19-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 13695 // CHECK19-NEXT: store ptr [[TMP96]], ptr [[TMP105]], align 4 13696 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 13697 // CHECK19-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4 13698 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 13699 // CHECK19-NEXT: store ptr null, ptr [[TMP107]], align 4 13700 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 13701 // CHECK19-NEXT: store ptr null, ptr [[TMP108]], align 4 13702 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 13703 // CHECK19-NEXT: store i64 [[TMP100]], ptr [[TMP109]], align 8 13704 // CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 13705 // CHECK19-NEXT: store i64 0, ptr [[TMP110]], align 8 13706 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 13707 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4 13708 // CHECK19-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 13709 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4 13710 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 13711 // CHECK19-NEXT: store i32 0, ptr [[TMP113]], align 4 13712 // CHECK19-NEXT: [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 13713 // CHECK19-NEXT: [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0 13714 // CHECK19-NEXT: br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 13715 // CHECK19: omp_offload.failed32: 13716 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]] 13717 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT33]] 13718 // CHECK19: omp_offload.cont33: 13719 // CHECK19-NEXT: [[TMP116:%.*]] = load i32, ptr [[N]], align 4 13720 // CHECK19-NEXT: store i32 [[TMP116]], ptr [[N_CASTED34]], align 4 13721 // CHECK19-NEXT: [[TMP117:%.*]] = load i32, ptr [[N_CASTED34]], align 4 13722 // CHECK19-NEXT: [[TMP118:%.*]] = mul nuw i32 [[TMP0]], 4 13723 // CHECK19-NEXT: [[TMP119:%.*]] = sext i32 [[TMP118]] to i64 13724 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES38]], ptr align 4 @.offload_sizes.5, i32 24, i1 false) 13725 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 13726 // CHECK19-NEXT: store i32 [[TMP117]], ptr [[TMP120]], align 4 13727 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 13728 // CHECK19-NEXT: store i32 [[TMP117]], ptr [[TMP121]], align 4 13729 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0 13730 // CHECK19-NEXT: store ptr null, ptr [[TMP122]], align 4 13731 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 13732 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP123]], align 4 13733 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 13734 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP124]], align 4 13735 // CHECK19-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1 13736 // CHECK19-NEXT: store ptr null, ptr [[TMP125]], align 4 13737 // CHECK19-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 13738 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP126]], align 4 13739 // CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 13740 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP127]], align 4 13741 // CHECK19-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 13742 // CHECK19-NEXT: store i64 [[TMP119]], ptr [[TMP128]], align 4 13743 // CHECK19-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2 13744 // CHECK19-NEXT: store ptr null, ptr [[TMP129]], align 4 13745 // CHECK19-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 13746 // CHECK19-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 13747 // CHECK19-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 13748 // CHECK19-NEXT: [[TMP133:%.*]] = load i32, ptr [[N]], align 4 13749 // CHECK19-NEXT: store i32 [[TMP133]], ptr [[DOTCAPTURE_EXPR_40]], align 4 13750 // CHECK19-NEXT: [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 13751 // CHECK19-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP134]], 0 13752 // CHECK19-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 13753 // CHECK19-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 13754 // CHECK19-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 13755 // CHECK19-NEXT: [[TMP135:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 13756 // CHECK19-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP135]], 1 13757 // CHECK19-NEXT: [[TMP136:%.*]] = zext i32 [[ADD45]] to i64 13758 // CHECK19-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 13759 // CHECK19-NEXT: store i32 3, ptr [[TMP137]], align 4 13760 // CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 13761 // CHECK19-NEXT: store i32 3, ptr [[TMP138]], align 4 13762 // CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 13763 // CHECK19-NEXT: store ptr [[TMP130]], ptr [[TMP139]], align 4 13764 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 13765 // CHECK19-NEXT: store ptr [[TMP131]], ptr [[TMP140]], align 4 13766 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 13767 // CHECK19-NEXT: store ptr [[TMP132]], ptr [[TMP141]], align 4 13768 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 13769 // CHECK19-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP142]], align 4 13770 // CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 13771 // CHECK19-NEXT: store ptr null, ptr [[TMP143]], align 4 13772 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 13773 // CHECK19-NEXT: store ptr null, ptr [[TMP144]], align 4 13774 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 13775 // CHECK19-NEXT: store i64 [[TMP136]], ptr [[TMP145]], align 8 13776 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 13777 // CHECK19-NEXT: store i64 0, ptr [[TMP146]], align 8 13778 // CHECK19-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 13779 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4 13780 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 13781 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP148]], align 4 13782 // CHECK19-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 13783 // CHECK19-NEXT: store i32 0, ptr [[TMP149]], align 4 13784 // CHECK19-NEXT: [[TMP150:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 13785 // CHECK19-NEXT: [[TMP151:%.*]] = icmp ne i32 [[TMP150]], 0 13786 // CHECK19-NEXT: br i1 [[TMP151]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 13787 // CHECK19: omp_offload.failed47: 13788 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP117]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 13789 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT48]] 13790 // CHECK19: omp_offload.cont48: 13791 // CHECK19-NEXT: [[TMP152:%.*]] = load i32, ptr [[M]], align 4 13792 // CHECK19-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR_49]], align 4 13793 // CHECK19-NEXT: [[TMP153:%.*]] = load i32, ptr [[N]], align 4 13794 // CHECK19-NEXT: store i32 [[TMP153]], ptr [[N_CASTED50]], align 4 13795 // CHECK19-NEXT: [[TMP154:%.*]] = load i32, ptr [[N_CASTED50]], align 4 13796 // CHECK19-NEXT: [[TMP155:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 13797 // CHECK19-NEXT: store i32 [[TMP155]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 13798 // CHECK19-NEXT: [[TMP156:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 13799 // CHECK19-NEXT: [[TMP157:%.*]] = mul nuw i32 [[TMP0]], 4 13800 // CHECK19-NEXT: [[TMP158:%.*]] = sext i32 [[TMP157]] to i64 13801 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES55]], ptr align 4 @.offload_sizes.7, i32 32, i1 false) 13802 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 13803 // CHECK19-NEXT: store i32 [[TMP154]], ptr [[TMP159]], align 4 13804 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 13805 // CHECK19-NEXT: store i32 [[TMP154]], ptr [[TMP160]], align 4 13806 // CHECK19-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0 13807 // CHECK19-NEXT: store ptr null, ptr [[TMP161]], align 4 13808 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 13809 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP162]], align 4 13810 // CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 13811 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP163]], align 4 13812 // CHECK19-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1 13813 // CHECK19-NEXT: store ptr null, ptr [[TMP164]], align 4 13814 // CHECK19-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 13815 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP165]], align 4 13816 // CHECK19-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 13817 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP166]], align 4 13818 // CHECK19-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 13819 // CHECK19-NEXT: store i64 [[TMP158]], ptr [[TMP167]], align 4 13820 // CHECK19-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2 13821 // CHECK19-NEXT: store ptr null, ptr [[TMP168]], align 4 13822 // CHECK19-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 13823 // CHECK19-NEXT: store i32 [[TMP156]], ptr [[TMP169]], align 4 13824 // CHECK19-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 13825 // CHECK19-NEXT: store i32 [[TMP156]], ptr [[TMP170]], align 4 13826 // CHECK19-NEXT: [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3 13827 // CHECK19-NEXT: store ptr null, ptr [[TMP171]], align 4 13828 // CHECK19-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 13829 // CHECK19-NEXT: [[TMP173:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 13830 // CHECK19-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 13831 // CHECK19-NEXT: [[TMP175:%.*]] = load i32, ptr [[N]], align 4 13832 // CHECK19-NEXT: store i32 [[TMP175]], ptr [[DOTCAPTURE_EXPR_57]], align 4 13833 // CHECK19-NEXT: [[TMP176:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 13834 // CHECK19-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP176]], 0 13835 // CHECK19-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 13836 // CHECK19-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 13837 // CHECK19-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 13838 // CHECK19-NEXT: [[TMP177:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 13839 // CHECK19-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP177]], 1 13840 // CHECK19-NEXT: [[TMP178:%.*]] = zext i32 [[ADD62]] to i64 13841 // CHECK19-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 13842 // CHECK19-NEXT: store i32 3, ptr [[TMP179]], align 4 13843 // CHECK19-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 13844 // CHECK19-NEXT: store i32 4, ptr [[TMP180]], align 4 13845 // CHECK19-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 13846 // CHECK19-NEXT: store ptr [[TMP172]], ptr [[TMP181]], align 4 13847 // CHECK19-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 13848 // CHECK19-NEXT: store ptr [[TMP173]], ptr [[TMP182]], align 4 13849 // CHECK19-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 13850 // CHECK19-NEXT: store ptr [[TMP174]], ptr [[TMP183]], align 4 13851 // CHECK19-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 13852 // CHECK19-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP184]], align 4 13853 // CHECK19-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 13854 // CHECK19-NEXT: store ptr null, ptr [[TMP185]], align 4 13855 // CHECK19-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 13856 // CHECK19-NEXT: store ptr null, ptr [[TMP186]], align 4 13857 // CHECK19-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 13858 // CHECK19-NEXT: store i64 [[TMP178]], ptr [[TMP187]], align 8 13859 // CHECK19-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 13860 // CHECK19-NEXT: store i64 0, ptr [[TMP188]], align 8 13861 // CHECK19-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 13862 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP189]], align 4 13863 // CHECK19-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 13864 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP190]], align 4 13865 // CHECK19-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 13866 // CHECK19-NEXT: store i32 0, ptr [[TMP191]], align 4 13867 // CHECK19-NEXT: [[TMP192:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 13868 // CHECK19-NEXT: [[TMP193:%.*]] = icmp ne i32 [[TMP192]], 0 13869 // CHECK19-NEXT: br i1 [[TMP193]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 13870 // CHECK19: omp_offload.failed64: 13871 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP156]]) #[[ATTR3]] 13872 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT65]] 13873 // CHECK19: omp_offload.cont65: 13874 // CHECK19-NEXT: [[TMP194:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 13875 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP194]]) 13876 // CHECK19-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 13877 // CHECK19-NEXT: [[TMP195:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 13878 // CHECK19-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP195]]) 13879 // CHECK19-NEXT: [[TMP196:%.*]] = load i32, ptr [[RETVAL]], align 4 13880 // CHECK19-NEXT: ret i32 [[TMP196]] 13881 // 13882 // 13883 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 13884 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 13885 // CHECK19-NEXT: entry: 13886 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13887 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13888 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13889 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13890 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13891 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13892 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13893 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13894 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13895 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13896 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 13897 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 13898 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 13899 // CHECK19-NEXT: ret void 13900 // 13901 // 13902 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 13903 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13904 // CHECK19-NEXT: entry: 13905 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13906 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13907 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13908 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13909 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13910 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13911 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13912 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13913 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13914 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13915 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13916 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13917 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13918 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13919 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 13920 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13921 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13922 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13923 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13924 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13925 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13926 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13927 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13928 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13929 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 13930 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13931 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13932 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13933 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13934 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13935 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13936 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13937 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13938 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13939 // CHECK19: omp.precond.then: 13940 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13941 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13942 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 13943 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13944 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13945 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13946 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 13947 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13948 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13949 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13950 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 13951 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13952 // CHECK19: cond.true: 13953 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13954 // CHECK19-NEXT: br label [[COND_END:%.*]] 13955 // CHECK19: cond.false: 13956 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13957 // CHECK19-NEXT: br label [[COND_END]] 13958 // CHECK19: cond.end: 13959 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 13960 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13961 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13962 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 13963 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13964 // CHECK19: omp.inner.for.cond: 13965 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 13966 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 13967 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 13968 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13969 // CHECK19: omp.inner.for.body: 13970 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]] 13971 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 13972 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP14]] 13973 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP14]] 13974 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP14]] 13975 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP14]] 13976 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13977 // CHECK19: omp.inner.for.inc: 13978 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 13979 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]] 13980 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 13981 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 13982 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 13983 // CHECK19: omp.inner.for.end: 13984 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13985 // CHECK19: omp.loop.exit: 13986 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13987 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 13988 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 13989 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13990 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 13991 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13992 // CHECK19: .omp.final.then: 13993 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13994 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 13995 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 13996 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 13997 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 13998 // CHECK19-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 13999 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14000 // CHECK19: .omp.final.done: 14001 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14002 // CHECK19: omp.precond.end: 14003 // CHECK19-NEXT: ret void 14004 // 14005 // 14006 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 14007 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14008 // CHECK19-NEXT: entry: 14009 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14010 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14011 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14012 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14013 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14014 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14015 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14016 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14017 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14018 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14019 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14020 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14021 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14022 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14023 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14024 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14025 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 14026 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14027 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14028 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14029 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14030 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14031 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14032 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14033 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14034 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14035 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14036 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 14037 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14038 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14039 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14040 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14041 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14042 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14043 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14044 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14045 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14046 // CHECK19: omp.precond.then: 14047 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14048 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14049 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 14050 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14051 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14052 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 14053 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 14054 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14055 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14056 // CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14057 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 14058 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14059 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14060 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14061 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 14062 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14063 // CHECK19: cond.true: 14064 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14065 // CHECK19-NEXT: br label [[COND_END:%.*]] 14066 // CHECK19: cond.false: 14067 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14068 // CHECK19-NEXT: br label [[COND_END]] 14069 // CHECK19: cond.end: 14070 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 14071 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 14072 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14073 // CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 14074 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14075 // CHECK19: omp.inner.for.cond: 14076 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 14077 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 14078 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 14079 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14080 // CHECK19: omp.inner.for.body: 14081 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 14082 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 14083 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14084 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP18]] 14085 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP18]] 14086 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 14087 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 14088 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14089 // CHECK19: omp.body.continue: 14090 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14091 // CHECK19: omp.inner.for.inc: 14092 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 14093 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 14094 // CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 14095 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 14096 // CHECK19: omp.inner.for.end: 14097 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14098 // CHECK19: omp.loop.exit: 14099 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14100 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 14101 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 14102 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14103 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 14104 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14105 // CHECK19: .omp.final.then: 14106 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14107 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 14108 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 14109 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 14110 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 14111 // CHECK19-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 14112 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14113 // CHECK19: .omp.final.done: 14114 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14115 // CHECK19: omp.precond.end: 14116 // CHECK19-NEXT: ret void 14117 // 14118 // 14119 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 14120 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14121 // CHECK19-NEXT: entry: 14122 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14123 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14124 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14125 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14126 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14127 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14128 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14129 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14130 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14131 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14132 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 14133 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 14134 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 14135 // CHECK19-NEXT: ret void 14136 // 14137 // 14138 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 14139 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14140 // CHECK19-NEXT: entry: 14141 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14142 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14143 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14144 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14145 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14146 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14147 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14148 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14149 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14150 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14151 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14152 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14153 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14154 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14155 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 14156 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14157 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14158 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14159 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14160 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14161 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14162 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14163 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14164 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14165 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 14166 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14167 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14168 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14169 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14170 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14171 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14172 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14173 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14174 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14175 // CHECK19: omp.precond.then: 14176 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14177 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14178 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 14179 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14180 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14181 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14182 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 14183 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14184 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14185 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14186 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 14187 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14188 // CHECK19: cond.true: 14189 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14190 // CHECK19-NEXT: br label [[COND_END:%.*]] 14191 // CHECK19: cond.false: 14192 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14193 // CHECK19-NEXT: br label [[COND_END]] 14194 // CHECK19: cond.end: 14195 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 14196 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14197 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14198 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 14199 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14200 // CHECK19: omp.inner.for.cond: 14201 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 14202 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 14203 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 14204 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14205 // CHECK19: omp.inner.for.body: 14206 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP23]] 14207 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 14208 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP23]] 14209 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP23]] 14210 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP23]] 14211 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP23]] 14212 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14213 // CHECK19: omp.inner.for.inc: 14214 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 14215 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP23]] 14216 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 14217 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 14218 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 14219 // CHECK19: omp.inner.for.end: 14220 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14221 // CHECK19: omp.loop.exit: 14222 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14223 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 14224 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 14225 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14226 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 14227 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14228 // CHECK19: .omp.final.then: 14229 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14230 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 14231 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 14232 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 14233 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 14234 // CHECK19-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 14235 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14236 // CHECK19: .omp.final.done: 14237 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14238 // CHECK19: omp.precond.end: 14239 // CHECK19-NEXT: ret void 14240 // 14241 // 14242 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 14243 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14244 // CHECK19-NEXT: entry: 14245 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14246 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14247 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14248 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14249 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14250 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14251 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14252 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14253 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14254 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14255 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14256 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14257 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14258 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14259 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14260 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14261 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 14262 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14263 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14264 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14265 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14266 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14267 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14268 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14269 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14270 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14271 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14272 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 14273 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14274 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14275 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14276 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14277 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14278 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14279 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14280 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14281 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14282 // CHECK19: omp.precond.then: 14283 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14284 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14285 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 14286 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14287 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14288 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 14289 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 14290 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14291 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14292 // CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14293 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 14294 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14295 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14296 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14297 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 14298 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14299 // CHECK19: cond.true: 14300 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14301 // CHECK19-NEXT: br label [[COND_END:%.*]] 14302 // CHECK19: cond.false: 14303 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14304 // CHECK19-NEXT: br label [[COND_END]] 14305 // CHECK19: cond.end: 14306 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 14307 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 14308 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14309 // CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 14310 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14311 // CHECK19: omp.inner.for.cond: 14312 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]] 14313 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 14314 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 14315 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14316 // CHECK19: omp.inner.for.body: 14317 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 14318 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 14319 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14320 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP26]] 14321 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP26]] 14322 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 14323 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP26]] 14324 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14325 // CHECK19: omp.body.continue: 14326 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14327 // CHECK19: omp.inner.for.inc: 14328 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 14329 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 14330 // CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 14331 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 14332 // CHECK19: omp.inner.for.end: 14333 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14334 // CHECK19: omp.loop.exit: 14335 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14336 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 14337 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 14338 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14339 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 14340 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14341 // CHECK19: .omp.final.then: 14342 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14343 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0 14344 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 14345 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 14346 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 14347 // CHECK19-NEXT: store i32 [[ADD10]], ptr [[I3]], align 4 14348 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14349 // CHECK19: .omp.final.done: 14350 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14351 // CHECK19: omp.precond.end: 14352 // CHECK19-NEXT: ret void 14353 // 14354 // 14355 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 14356 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14357 // CHECK19-NEXT: entry: 14358 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14359 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14360 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14361 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14362 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14363 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14364 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14365 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14366 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14367 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14368 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14369 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14370 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14371 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 14372 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 14373 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14374 // CHECK19-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14375 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14376 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 14377 // CHECK19-NEXT: ret void 14378 // 14379 // 14380 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 14381 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14382 // CHECK19-NEXT: entry: 14383 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14384 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14385 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14386 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14387 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14388 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14389 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14390 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14391 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14392 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14393 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14394 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14395 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14396 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14397 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14398 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 14399 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14400 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14401 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14402 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14403 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14404 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14405 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14406 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14407 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14408 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14409 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14410 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14411 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14412 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14413 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14414 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14415 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 14416 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14417 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14418 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14419 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14420 // CHECK19: omp.precond.then: 14421 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14422 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14423 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 14424 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14425 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14426 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14427 // CHECK19-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14428 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 14429 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 14430 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14431 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14432 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 14433 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14434 // CHECK19: cond.true: 14435 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14436 // CHECK19-NEXT: br label [[COND_END:%.*]] 14437 // CHECK19: cond.false: 14438 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14439 // CHECK19-NEXT: br label [[COND_END]] 14440 // CHECK19: cond.end: 14441 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 14442 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14443 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14444 // CHECK19-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 14445 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14446 // CHECK19: omp.inner.for.cond: 14447 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]] 14448 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP29]] 14449 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 14450 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 14451 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14452 // CHECK19: omp.inner.for.body: 14453 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 14454 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 14455 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP29]] 14456 // CHECK19-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 14457 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 14458 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP29]] 14459 // CHECK19-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 14460 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP29]] 14461 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP21]]), !llvm.access.group [[ACC_GRP29]] 14462 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14463 // CHECK19: omp.inner.for.inc: 14464 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 14465 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 14466 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 14467 // CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 14468 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 14469 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 14470 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 14471 // CHECK19-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 14472 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 14473 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP29]] 14474 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 14475 // CHECK19-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 14476 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 14477 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP29]] 14478 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]] 14479 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 14480 // CHECK19: cond.true11: 14481 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group [[ACC_GRP29]] 14482 // CHECK19-NEXT: br label [[COND_END13:%.*]] 14483 // CHECK19: cond.false12: 14484 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 14485 // CHECK19-NEXT: br label [[COND_END13]] 14486 // CHECK19: cond.end13: 14487 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ] 14488 // CHECK19-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 14489 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP29]] 14490 // CHECK19-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 14491 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 14492 // CHECK19: omp.inner.for.end: 14493 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14494 // CHECK19: omp.loop.exit: 14495 // CHECK19-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14496 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 14497 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP34]]) 14498 // CHECK19-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14499 // CHECK19-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 14500 // CHECK19-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14501 // CHECK19: .omp.final.then: 14502 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14503 // CHECK19-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP37]], 0 14504 // CHECK19-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 14505 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1 14506 // CHECK19-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]] 14507 // CHECK19-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 14508 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14509 // CHECK19: .omp.final.done: 14510 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14511 // CHECK19: omp.precond.end: 14512 // CHECK19-NEXT: ret void 14513 // 14514 // 14515 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 14516 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14517 // CHECK19-NEXT: entry: 14518 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14519 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14520 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14521 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14522 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14523 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14524 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14525 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14526 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14527 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14528 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14529 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14530 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14531 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14532 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14533 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14534 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14535 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 14536 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14537 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14538 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14539 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14540 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14541 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14542 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14543 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14544 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14545 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14546 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14547 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14548 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14549 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14550 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14551 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14552 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 14553 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14554 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14555 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14556 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14557 // CHECK19: omp.precond.then: 14558 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14559 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14560 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 14561 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14562 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14563 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 14564 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 14565 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14566 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14567 // CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14568 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 14569 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14570 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14571 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14572 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 14573 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14574 // CHECK19: cond.true: 14575 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14576 // CHECK19-NEXT: br label [[COND_END:%.*]] 14577 // CHECK19: cond.false: 14578 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14579 // CHECK19-NEXT: br label [[COND_END]] 14580 // CHECK19: cond.end: 14581 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 14582 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 14583 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14584 // CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 14585 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14586 // CHECK19: omp.inner.for.cond: 14587 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]] 14588 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 14589 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 14590 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14591 // CHECK19: omp.inner.for.body: 14592 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 14593 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 14594 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14595 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP32]] 14596 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP32]] 14597 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 14598 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP32]] 14599 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14600 // CHECK19: omp.body.continue: 14601 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14602 // CHECK19: omp.inner.for.inc: 14603 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 14604 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 14605 // CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 14606 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 14607 // CHECK19: omp.inner.for.end: 14608 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14609 // CHECK19: omp.loop.exit: 14610 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14611 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 14612 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 14613 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14614 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 14615 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14616 // CHECK19: .omp.final.then: 14617 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14618 // CHECK19-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0 14619 // CHECK19-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1 14620 // CHECK19-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1 14621 // CHECK19-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 14622 // CHECK19-NEXT: store i32 [[ADD11]], ptr [[I4]], align 4 14623 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14624 // CHECK19: .omp.final.done: 14625 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14626 // CHECK19: omp.precond.end: 14627 // CHECK19-NEXT: ret void 14628 // 14629 // 14630 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 14631 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14632 // CHECK19-NEXT: entry: 14633 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14634 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14635 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14636 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14637 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14638 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14639 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14640 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14641 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14642 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14643 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 14644 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 14645 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 14646 // CHECK19-NEXT: ret void 14647 // 14648 // 14649 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 14650 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14651 // CHECK19-NEXT: entry: 14652 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14653 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14654 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14655 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14656 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14657 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14658 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14659 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14660 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14661 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14662 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14663 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14664 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14665 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14666 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 14667 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14668 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14669 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14670 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14671 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14672 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14673 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14674 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14675 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14676 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 14677 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14678 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14679 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14680 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14681 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14682 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14683 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14684 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14685 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14686 // CHECK19: omp.precond.then: 14687 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14688 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14689 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 14690 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14691 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14692 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14693 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 14694 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14695 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14696 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14697 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 14698 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14699 // CHECK19: cond.true: 14700 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14701 // CHECK19-NEXT: br label [[COND_END:%.*]] 14702 // CHECK19: cond.false: 14703 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14704 // CHECK19-NEXT: br label [[COND_END]] 14705 // CHECK19: cond.end: 14706 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 14707 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14708 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14709 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 14710 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14711 // CHECK19: omp.inner.for.cond: 14712 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]] 14713 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 14714 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 14715 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14716 // CHECK19: omp.inner.for.body: 14717 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]] 14718 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 14719 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]] 14720 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP35]] 14721 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP35]] 14722 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]), !llvm.access.group [[ACC_GRP35]] 14723 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14724 // CHECK19: omp.inner.for.inc: 14725 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 14726 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]] 14727 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 14728 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 14729 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] 14730 // CHECK19: omp.inner.for.end: 14731 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14732 // CHECK19: omp.loop.exit: 14733 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14734 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 14735 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 14736 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14737 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 14738 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14739 // CHECK19: .omp.final.then: 14740 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14741 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 14742 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 14743 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 14744 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 14745 // CHECK19-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 14746 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14747 // CHECK19: .omp.final.done: 14748 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14749 // CHECK19: omp.precond.end: 14750 // CHECK19-NEXT: ret void 14751 // 14752 // 14753 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 14754 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 14755 // CHECK19-NEXT: entry: 14756 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14757 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14758 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14759 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14760 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14761 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14762 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14763 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14764 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14765 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14766 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14767 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14768 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14769 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14770 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14771 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14772 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 14773 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14774 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14775 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14776 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14777 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14778 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14779 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14780 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14781 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14782 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14783 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 14784 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14785 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14786 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14787 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14788 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14789 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14790 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14791 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14792 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14793 // CHECK19: omp.precond.then: 14794 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14795 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14796 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 14797 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14798 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14799 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 14800 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 14801 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14802 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14803 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14804 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14805 // CHECK19-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14806 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 14807 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 14808 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14809 // CHECK19: omp.dispatch.cond: 14810 // CHECK19-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14811 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 14812 // CHECK19-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 14813 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 14814 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14815 // CHECK19: omp.dispatch.body: 14816 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14817 // CHECK19-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 14818 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14819 // CHECK19: omp.inner.for.cond: 14820 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 14821 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 14822 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 14823 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14824 // CHECK19: omp.inner.for.body: 14825 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 14826 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 14827 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14828 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP38]] 14829 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP38]] 14830 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]] 14831 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP38]] 14832 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14833 // CHECK19: omp.body.continue: 14834 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14835 // CHECK19: omp.inner.for.inc: 14836 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 14837 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1 14838 // CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 14839 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 14840 // CHECK19: omp.inner.for.end: 14841 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14842 // CHECK19: omp.dispatch.inc: 14843 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 14844 // CHECK19: omp.dispatch.end: 14845 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14846 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 14847 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 14848 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14849 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 14850 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14851 // CHECK19: .omp.final.then: 14852 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14853 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 14854 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 14855 // CHECK19-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 14856 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 14857 // CHECK19-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 14858 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14859 // CHECK19: .omp.final.done: 14860 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14861 // CHECK19: omp.precond.end: 14862 // CHECK19-NEXT: ret void 14863 // 14864 // 14865 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 14866 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14867 // CHECK19-NEXT: entry: 14868 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14869 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14870 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14871 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14872 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14873 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14874 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14875 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14876 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14877 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14878 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14879 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14880 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14881 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 14882 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 14883 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14884 // CHECK19-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14885 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14886 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 14887 // CHECK19-NEXT: ret void 14888 // 14889 // 14890 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 14891 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14892 // CHECK19-NEXT: entry: 14893 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14894 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14895 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14896 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 14897 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14898 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14899 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14900 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14901 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14902 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14903 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14904 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14905 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14906 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14907 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14908 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 14909 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14910 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14911 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14912 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14913 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14914 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 14915 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14916 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14917 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 14918 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14919 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 14920 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14921 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14922 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 14923 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14924 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14925 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 14926 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 14927 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14928 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 14929 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14930 // CHECK19: omp.precond.then: 14931 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14932 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14933 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 14934 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14935 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14936 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14937 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 14938 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14939 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14940 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14941 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 14942 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14943 // CHECK19: cond.true: 14944 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14945 // CHECK19-NEXT: br label [[COND_END:%.*]] 14946 // CHECK19: cond.false: 14947 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14948 // CHECK19-NEXT: br label [[COND_END]] 14949 // CHECK19: cond.end: 14950 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 14951 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14952 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14953 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 14954 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14955 // CHECK19: omp.inner.for.cond: 14956 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]] 14957 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP41]] 14958 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 14959 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14960 // CHECK19: omp.inner.for.body: 14961 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP41]] 14962 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP41]] 14963 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP41]] 14964 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 14965 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 14966 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP41]] 14967 // CHECK19-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 14968 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP41]] 14969 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP20]]), !llvm.access.group [[ACC_GRP41]] 14970 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14971 // CHECK19: omp.inner.for.inc: 14972 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 14973 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP41]] 14974 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 14975 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 14976 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]] 14977 // CHECK19: omp.inner.for.end: 14978 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14979 // CHECK19: omp.loop.exit: 14980 // CHECK19-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14981 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 14982 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 14983 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14984 // CHECK19-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 14985 // CHECK19-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14986 // CHECK19: .omp.final.then: 14987 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14988 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0 14989 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 14990 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 14991 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 14992 // CHECK19-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 14993 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 14994 // CHECK19: .omp.final.done: 14995 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 14996 // CHECK19: omp.precond.end: 14997 // CHECK19-NEXT: ret void 14998 // 14999 // 15000 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 15001 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15002 // CHECK19-NEXT: entry: 15003 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15004 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15005 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15006 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15007 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15008 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15009 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15010 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15011 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15012 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15013 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15014 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15015 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15016 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15017 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15018 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15019 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15020 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 15021 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15022 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15023 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15024 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15025 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 15026 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 15027 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15028 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15029 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 15030 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15031 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 15032 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 15033 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 15034 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 15035 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15036 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15037 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 15038 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 15039 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 15040 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 15041 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15042 // CHECK19: omp.precond.then: 15043 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15044 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 15045 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 15046 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15047 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15048 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 15049 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 15050 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15051 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15052 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15053 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15054 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15055 // CHECK19-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15056 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 15057 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 15058 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 15059 // CHECK19: omp.dispatch.cond: 15060 // CHECK19-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15061 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 15062 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 15063 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 15064 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 15065 // CHECK19: omp.dispatch.body: 15066 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15067 // CHECK19-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 15068 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15069 // CHECK19: omp.inner.for.cond: 15070 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]] 15071 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP44]] 15072 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15073 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15074 // CHECK19: omp.inner.for.body: 15075 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 15076 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15077 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15078 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP44]] 15079 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP44]] 15080 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP20]] 15081 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP44]] 15082 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15083 // CHECK19: omp.body.continue: 15084 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15085 // CHECK19: omp.inner.for.inc: 15086 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 15087 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 15088 // CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 15089 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]] 15090 // CHECK19: omp.inner.for.end: 15091 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 15092 // CHECK19: omp.dispatch.inc: 15093 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 15094 // CHECK19: omp.dispatch.end: 15095 // CHECK19-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15096 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 15097 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 15098 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15099 // CHECK19-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 15100 // CHECK19-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15101 // CHECK19: .omp.final.then: 15102 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 15103 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0 15104 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 15105 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 15106 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 15107 // CHECK19-NEXT: store i32 [[ADD10]], ptr [[I4]], align 4 15108 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15109 // CHECK19: .omp.final.done: 15110 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 15111 // CHECK19: omp.precond.end: 15112 // CHECK19-NEXT: ret void 15113 // 15114 // 15115 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 15116 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 15117 // CHECK19-NEXT: entry: 15118 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 15119 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 15120 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 15121 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 15122 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 15123 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 15124 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15125 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 15126 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 15127 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 15128 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 15129 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 15130 // CHECK19-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 15131 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15132 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15133 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4 15134 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4 15135 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4 15136 // CHECK19-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 15137 // CHECK19-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 15138 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4 15139 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4 15140 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4 15141 // CHECK19-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 15142 // CHECK19-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 15143 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 15144 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4 15145 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 4 15146 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 4 15147 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 4 15148 // CHECK19-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 15149 // CHECK19-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 15150 // CHECK19-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 15151 // CHECK19-NEXT: store i32 10, ptr [[M]], align 4 15152 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 15153 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 15154 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 15155 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 15156 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 15157 // CHECK19-NEXT: store ptr null, ptr [[TMP2]], align 4 15158 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 15159 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 15160 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 15161 // CHECK19-NEXT: store i32 3, ptr [[TMP5]], align 4 15162 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 15163 // CHECK19-NEXT: store i32 1, ptr [[TMP6]], align 4 15164 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 15165 // CHECK19-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 15166 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 15167 // CHECK19-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 15168 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 15169 // CHECK19-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 4 15170 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 15171 // CHECK19-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4 15172 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 15173 // CHECK19-NEXT: store ptr null, ptr [[TMP11]], align 4 15174 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 15175 // CHECK19-NEXT: store ptr null, ptr [[TMP12]], align 4 15176 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 15177 // CHECK19-NEXT: store i64 10, ptr [[TMP13]], align 8 15178 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 15179 // CHECK19-NEXT: store i64 0, ptr [[TMP14]], align 8 15180 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 15181 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 15182 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 15183 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 15184 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 15185 // CHECK19-NEXT: store i32 0, ptr [[TMP17]], align 4 15186 // CHECK19-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 15187 // CHECK19-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 15188 // CHECK19-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 15189 // CHECK19: omp_offload.failed: 15190 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 15191 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 15192 // CHECK19: omp_offload.cont: 15193 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 15194 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP20]], align 4 15195 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 15196 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP21]], align 4 15197 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 15198 // CHECK19-NEXT: store ptr null, ptr [[TMP22]], align 4 15199 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 15200 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 15201 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 15202 // CHECK19-NEXT: store i32 3, ptr [[TMP25]], align 4 15203 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 15204 // CHECK19-NEXT: store i32 1, ptr [[TMP26]], align 4 15205 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 15206 // CHECK19-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 15207 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 15208 // CHECK19-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 15209 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 15210 // CHECK19-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 4 15211 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 15212 // CHECK19-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4 15213 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 15214 // CHECK19-NEXT: store ptr null, ptr [[TMP31]], align 4 15215 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 15216 // CHECK19-NEXT: store ptr null, ptr [[TMP32]], align 4 15217 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 15218 // CHECK19-NEXT: store i64 10, ptr [[TMP33]], align 8 15219 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 15220 // CHECK19-NEXT: store i64 0, ptr [[TMP34]], align 8 15221 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 15222 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 15223 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 15224 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 15225 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 15226 // CHECK19-NEXT: store i32 0, ptr [[TMP37]], align 4 15227 // CHECK19-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 15228 // CHECK19-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 15229 // CHECK19-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 15230 // CHECK19: omp_offload.failed6: 15231 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 15232 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT7]] 15233 // CHECK19: omp_offload.cont7: 15234 // CHECK19-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 15235 // CHECK19-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 15236 // CHECK19-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15237 // CHECK19-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 15238 // CHECK19-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 15239 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 15240 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP43]], align 4 15241 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 15242 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP44]], align 4 15243 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 15244 // CHECK19-NEXT: store ptr null, ptr [[TMP45]], align 4 15245 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 15246 // CHECK19-NEXT: store i32 [[TMP42]], ptr [[TMP46]], align 4 15247 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 15248 // CHECK19-NEXT: store i32 [[TMP42]], ptr [[TMP47]], align 4 15249 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 15250 // CHECK19-NEXT: store ptr null, ptr [[TMP48]], align 4 15251 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 15252 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 15253 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 15254 // CHECK19-NEXT: store i32 3, ptr [[TMP51]], align 4 15255 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 15256 // CHECK19-NEXT: store i32 2, ptr [[TMP52]], align 4 15257 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 15258 // CHECK19-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 4 15259 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 15260 // CHECK19-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 4 15261 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 15262 // CHECK19-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 4 15263 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 15264 // CHECK19-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 4 15265 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 15266 // CHECK19-NEXT: store ptr null, ptr [[TMP57]], align 4 15267 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 15268 // CHECK19-NEXT: store ptr null, ptr [[TMP58]], align 4 15269 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 15270 // CHECK19-NEXT: store i64 10, ptr [[TMP59]], align 8 15271 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 15272 // CHECK19-NEXT: store i64 0, ptr [[TMP60]], align 8 15273 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 15274 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 15275 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 15276 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 15277 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 15278 // CHECK19-NEXT: store i32 0, ptr [[TMP63]], align 4 15279 // CHECK19-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 15280 // CHECK19-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 15281 // CHECK19-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 15282 // CHECK19: omp_offload.failed13: 15283 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i32 [[TMP42]]) #[[ATTR3]] 15284 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT14]] 15285 // CHECK19: omp_offload.cont14: 15286 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 15287 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP66]], align 4 15288 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 15289 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP67]], align 4 15290 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0 15291 // CHECK19-NEXT: store ptr null, ptr [[TMP68]], align 4 15292 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 15293 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 15294 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 15295 // CHECK19-NEXT: store i32 3, ptr [[TMP71]], align 4 15296 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 15297 // CHECK19-NEXT: store i32 1, ptr [[TMP72]], align 4 15298 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 15299 // CHECK19-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 4 15300 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 15301 // CHECK19-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 4 15302 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 15303 // CHECK19-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 4 15304 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 15305 // CHECK19-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 4 15306 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 15307 // CHECK19-NEXT: store ptr null, ptr [[TMP77]], align 4 15308 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 15309 // CHECK19-NEXT: store ptr null, ptr [[TMP78]], align 4 15310 // CHECK19-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 15311 // CHECK19-NEXT: store i64 10, ptr [[TMP79]], align 8 15312 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 15313 // CHECK19-NEXT: store i64 0, ptr [[TMP80]], align 8 15314 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 15315 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 15316 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 15317 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 15318 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 15319 // CHECK19-NEXT: store i32 0, ptr [[TMP83]], align 4 15320 // CHECK19-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 15321 // CHECK19-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 15322 // CHECK19-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 15323 // CHECK19: omp_offload.failed20: 15324 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 15325 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT21]] 15326 // CHECK19: omp_offload.cont21: 15327 // CHECK19-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 15328 // CHECK19-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 15329 // CHECK19-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 15330 // CHECK19-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 15331 // CHECK19-NEXT: [[TMP88:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 15332 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 15333 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP89]], align 4 15334 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 15335 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP90]], align 4 15336 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 15337 // CHECK19-NEXT: store ptr null, ptr [[TMP91]], align 4 15338 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 15339 // CHECK19-NEXT: store i32 [[TMP88]], ptr [[TMP92]], align 4 15340 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 15341 // CHECK19-NEXT: store i32 [[TMP88]], ptr [[TMP93]], align 4 15342 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1 15343 // CHECK19-NEXT: store ptr null, ptr [[TMP94]], align 4 15344 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 15345 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 15346 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 15347 // CHECK19-NEXT: store i32 3, ptr [[TMP97]], align 4 15348 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 15349 // CHECK19-NEXT: store i32 2, ptr [[TMP98]], align 4 15350 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 15351 // CHECK19-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 4 15352 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 15353 // CHECK19-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 4 15354 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 15355 // CHECK19-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 4 15356 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 15357 // CHECK19-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 4 15358 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 15359 // CHECK19-NEXT: store ptr null, ptr [[TMP103]], align 4 15360 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 15361 // CHECK19-NEXT: store ptr null, ptr [[TMP104]], align 4 15362 // CHECK19-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 15363 // CHECK19-NEXT: store i64 10, ptr [[TMP105]], align 8 15364 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 15365 // CHECK19-NEXT: store i64 0, ptr [[TMP106]], align 8 15366 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 15367 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 15368 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 15369 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 15370 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 15371 // CHECK19-NEXT: store i32 0, ptr [[TMP109]], align 4 15372 // CHECK19-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 15373 // CHECK19-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 15374 // CHECK19-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 15375 // CHECK19: omp_offload.failed29: 15376 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i32 [[TMP88]]) #[[ATTR3]] 15377 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]] 15378 // CHECK19: omp_offload.cont30: 15379 // CHECK19-NEXT: ret i32 0 15380 // 15381 // 15382 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 15383 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15384 // CHECK19-NEXT: entry: 15385 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15386 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15387 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15388 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 15389 // CHECK19-NEXT: ret void 15390 // 15391 // 15392 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 15393 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15394 // CHECK19-NEXT: entry: 15395 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15396 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15397 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15398 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15399 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15400 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15401 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15402 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15403 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15404 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15405 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15406 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15407 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15408 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15409 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 15410 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 15411 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15412 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15413 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15414 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 15415 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 15416 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15417 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 15418 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15419 // CHECK19: cond.true: 15420 // CHECK19-NEXT: br label [[COND_END:%.*]] 15421 // CHECK19: cond.false: 15422 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15423 // CHECK19-NEXT: br label [[COND_END]] 15424 // CHECK19: cond.end: 15425 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 15426 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 15427 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 15428 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 15429 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15430 // CHECK19: omp.inner.for.cond: 15431 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]] 15432 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]] 15433 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 15434 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15435 // CHECK19: omp.inner.for.body: 15436 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]] 15437 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]] 15438 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP47]] 15439 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15440 // CHECK19: omp.inner.for.inc: 15441 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 15442 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]] 15443 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 15444 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 15445 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]] 15446 // CHECK19: omp.inner.for.end: 15447 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15448 // CHECK19: omp.loop.exit: 15449 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 15450 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15451 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 15452 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15453 // CHECK19: .omp.final.then: 15454 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15455 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15456 // CHECK19: .omp.final.done: 15457 // CHECK19-NEXT: ret void 15458 // 15459 // 15460 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 15461 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15462 // CHECK19-NEXT: entry: 15463 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15464 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15465 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15466 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15467 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15468 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15469 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15470 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15471 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15472 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15473 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15474 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15475 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15476 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15477 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15478 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15479 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15480 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15481 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15482 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 15483 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15484 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15485 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 15486 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 15487 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15488 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15489 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15490 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 15491 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 15492 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15493 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 15494 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15495 // CHECK19: cond.true: 15496 // CHECK19-NEXT: br label [[COND_END:%.*]] 15497 // CHECK19: cond.false: 15498 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15499 // CHECK19-NEXT: br label [[COND_END]] 15500 // CHECK19: cond.end: 15501 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 15502 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 15503 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15504 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 15505 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15506 // CHECK19: omp.inner.for.cond: 15507 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]] 15508 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]] 15509 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 15510 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15511 // CHECK19: omp.inner.for.body: 15512 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 15513 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 15514 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15515 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]] 15516 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]] 15517 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 15518 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP50]] 15519 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15520 // CHECK19: omp.body.continue: 15521 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15522 // CHECK19: omp.inner.for.inc: 15523 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 15524 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 15525 // CHECK19-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 15526 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]] 15527 // CHECK19: omp.inner.for.end: 15528 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15529 // CHECK19: omp.loop.exit: 15530 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 15531 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15532 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 15533 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15534 // CHECK19: .omp.final.then: 15535 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15536 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15537 // CHECK19: .omp.final.done: 15538 // CHECK19-NEXT: ret void 15539 // 15540 // 15541 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 15542 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15543 // CHECK19-NEXT: entry: 15544 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15545 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15546 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15547 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 15548 // CHECK19-NEXT: ret void 15549 // 15550 // 15551 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 15552 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15553 // CHECK19-NEXT: entry: 15554 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15555 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15556 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15557 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15558 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15559 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15560 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15561 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15562 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15563 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15564 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15565 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15566 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15567 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15568 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 15569 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 15570 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15571 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15572 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15573 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 15574 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 15575 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15576 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 15577 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15578 // CHECK19: cond.true: 15579 // CHECK19-NEXT: br label [[COND_END:%.*]] 15580 // CHECK19: cond.false: 15581 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15582 // CHECK19-NEXT: br label [[COND_END]] 15583 // CHECK19: cond.end: 15584 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 15585 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 15586 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 15587 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 15588 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15589 // CHECK19: omp.inner.for.cond: 15590 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]] 15591 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP53]] 15592 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 15593 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15594 // CHECK19: omp.inner.for.body: 15595 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP53]] 15596 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP53]] 15597 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP53]] 15598 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15599 // CHECK19: omp.inner.for.inc: 15600 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 15601 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP53]] 15602 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 15603 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 15604 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]] 15605 // CHECK19: omp.inner.for.end: 15606 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15607 // CHECK19: omp.loop.exit: 15608 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 15609 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15610 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 15611 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15612 // CHECK19: .omp.final.then: 15613 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15614 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15615 // CHECK19: .omp.final.done: 15616 // CHECK19-NEXT: ret void 15617 // 15618 // 15619 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 15620 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15621 // CHECK19-NEXT: entry: 15622 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15623 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15624 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15625 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15626 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15627 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15628 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15629 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15630 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15631 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15632 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15633 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15634 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15635 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15636 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15637 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15638 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15639 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15640 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15641 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 15642 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15643 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15644 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 15645 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 15646 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15647 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15648 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15649 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 15650 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 15651 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15652 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 15653 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15654 // CHECK19: cond.true: 15655 // CHECK19-NEXT: br label [[COND_END:%.*]] 15656 // CHECK19: cond.false: 15657 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15658 // CHECK19-NEXT: br label [[COND_END]] 15659 // CHECK19: cond.end: 15660 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 15661 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 15662 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15663 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 15664 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15665 // CHECK19: omp.inner.for.cond: 15666 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]] 15667 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP56]] 15668 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 15669 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15670 // CHECK19: omp.inner.for.body: 15671 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 15672 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 15673 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15674 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP56]] 15675 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP56]] 15676 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 15677 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP56]] 15678 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15679 // CHECK19: omp.body.continue: 15680 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15681 // CHECK19: omp.inner.for.inc: 15682 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 15683 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 15684 // CHECK19-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 15685 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]] 15686 // CHECK19: omp.inner.for.end: 15687 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15688 // CHECK19: omp.loop.exit: 15689 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 15690 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15691 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 15692 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15693 // CHECK19: .omp.final.then: 15694 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15695 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15696 // CHECK19: .omp.final.done: 15697 // CHECK19-NEXT: ret void 15698 // 15699 // 15700 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 15701 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15702 // CHECK19-NEXT: entry: 15703 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15704 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15705 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15706 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15707 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15708 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15709 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15710 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 15711 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 15712 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 15713 // CHECK19-NEXT: ret void 15714 // 15715 // 15716 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 15717 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15718 // CHECK19-NEXT: entry: 15719 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15720 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15721 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15722 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15723 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15724 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15725 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15726 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15727 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15728 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15729 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15730 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15731 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15732 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15733 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15734 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15735 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15736 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 15737 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 15738 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15739 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15740 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15741 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 15742 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 15743 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15744 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 15745 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15746 // CHECK19: cond.true: 15747 // CHECK19-NEXT: br label [[COND_END:%.*]] 15748 // CHECK19: cond.false: 15749 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15750 // CHECK19-NEXT: br label [[COND_END]] 15751 // CHECK19: cond.end: 15752 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 15753 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 15754 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 15755 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 15756 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15757 // CHECK19: omp.inner.for.cond: 15758 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]] 15759 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]] 15760 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 15761 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15762 // CHECK19: omp.inner.for.body: 15763 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP59]] 15764 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP59]] 15765 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP59]] 15766 // CHECK19-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP59]] 15767 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP59]] 15768 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]), !llvm.access.group [[ACC_GRP59]] 15769 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15770 // CHECK19: omp.inner.for.inc: 15771 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 15772 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP59]] 15773 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 15774 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 15775 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]] 15776 // CHECK19: omp.inner.for.end: 15777 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15778 // CHECK19: omp.loop.exit: 15779 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 15780 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15781 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 15782 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15783 // CHECK19: .omp.final.then: 15784 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15785 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15786 // CHECK19: .omp.final.done: 15787 // CHECK19-NEXT: ret void 15788 // 15789 // 15790 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 15791 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15792 // CHECK19-NEXT: entry: 15793 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15794 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15795 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15796 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15797 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15798 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15799 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15800 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15801 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15802 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15803 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15804 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15805 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15806 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15807 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15808 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15809 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15810 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15811 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15812 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15813 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15814 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 15815 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15816 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15817 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 15818 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 15819 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15820 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15821 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 15822 // CHECK19-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15823 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 15824 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 15825 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 15826 // CHECK19: omp.dispatch.cond: 15827 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15828 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15829 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 15830 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15831 // CHECK19: cond.true: 15832 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15833 // CHECK19-NEXT: br label [[COND_END:%.*]] 15834 // CHECK19: cond.false: 15835 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15836 // CHECK19-NEXT: br label [[COND_END]] 15837 // CHECK19: cond.end: 15838 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 15839 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 15840 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15841 // CHECK19-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 15842 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 15843 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15844 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 15845 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 15846 // CHECK19: omp.dispatch.body: 15847 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15848 // CHECK19: omp.inner.for.cond: 15849 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62:![0-9]+]] 15850 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP62]] 15851 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 15852 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15853 // CHECK19: omp.inner.for.body: 15854 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 15855 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 15856 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15857 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP62]] 15858 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP62]] 15859 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]] 15860 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP62]] 15861 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15862 // CHECK19: omp.body.continue: 15863 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15864 // CHECK19: omp.inner.for.inc: 15865 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 15866 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 15867 // CHECK19-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 15868 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]] 15869 // CHECK19: omp.inner.for.end: 15870 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 15871 // CHECK19: omp.dispatch.inc: 15872 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15873 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 15874 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15875 // CHECK19-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 15876 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 15877 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 15878 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 15879 // CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 15880 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 15881 // CHECK19: omp.dispatch.end: 15882 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 15883 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15884 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 15885 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15886 // CHECK19: .omp.final.then: 15887 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15888 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15889 // CHECK19: .omp.final.done: 15890 // CHECK19-NEXT: ret void 15891 // 15892 // 15893 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 15894 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15895 // CHECK19-NEXT: entry: 15896 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15897 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15898 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15899 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 15900 // CHECK19-NEXT: ret void 15901 // 15902 // 15903 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 15904 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15905 // CHECK19-NEXT: entry: 15906 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15907 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15908 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15909 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15910 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15911 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15912 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15913 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15914 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15915 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15916 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15917 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15918 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15919 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15920 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 15921 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 15922 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15923 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 15924 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 15925 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 15926 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 15927 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15928 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 15929 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15930 // CHECK19: cond.true: 15931 // CHECK19-NEXT: br label [[COND_END:%.*]] 15932 // CHECK19: cond.false: 15933 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 15934 // CHECK19-NEXT: br label [[COND_END]] 15935 // CHECK19: cond.end: 15936 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 15937 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 15938 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 15939 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 15940 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15941 // CHECK19: omp.inner.for.cond: 15942 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65:![0-9]+]] 15943 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP65]] 15944 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 15945 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15946 // CHECK19: omp.inner.for.body: 15947 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP65]] 15948 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP65]] 15949 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP65]] 15950 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15951 // CHECK19: omp.inner.for.inc: 15952 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 15953 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP65]] 15954 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 15955 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 15956 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]] 15957 // CHECK19: omp.inner.for.end: 15958 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15959 // CHECK19: omp.loop.exit: 15960 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 15961 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 15962 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 15963 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 15964 // CHECK19: .omp.final.then: 15965 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 15966 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 15967 // CHECK19: .omp.final.done: 15968 // CHECK19-NEXT: ret void 15969 // 15970 // 15971 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 15972 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 15973 // CHECK19-NEXT: entry: 15974 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 15975 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 15976 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15977 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15978 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 15979 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15980 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 15981 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15982 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15983 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15984 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15985 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 15986 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 15987 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 15988 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15989 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15990 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 15991 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 15992 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15993 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 15994 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 15995 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 15996 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 15997 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 15998 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 15999 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 16000 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16001 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 16002 // CHECK19-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 16003 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 16004 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 16005 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16006 // CHECK19: omp.dispatch.cond: 16007 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 16008 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 16009 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16010 // CHECK19: omp.dispatch.body: 16011 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16012 // CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 16013 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16014 // CHECK19: omp.inner.for.cond: 16015 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68:![0-9]+]] 16016 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP68]] 16017 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 16018 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16019 // CHECK19: omp.inner.for.body: 16020 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 16021 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 16022 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16023 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP68]] 16024 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP68]] 16025 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]] 16026 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP68]] 16027 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16028 // CHECK19: omp.body.continue: 16029 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16030 // CHECK19: omp.inner.for.inc: 16031 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 16032 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 16033 // CHECK19-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 16034 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]] 16035 // CHECK19: omp.inner.for.end: 16036 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16037 // CHECK19: omp.dispatch.inc: 16038 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 16039 // CHECK19: omp.dispatch.end: 16040 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 16041 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 16042 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 16043 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 16044 // CHECK19: .omp.final.then: 16045 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 16046 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 16047 // CHECK19: .omp.final.done: 16048 // CHECK19-NEXT: ret void 16049 // 16050 // 16051 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 16052 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16053 // CHECK19-NEXT: entry: 16054 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 16055 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16056 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16057 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 16058 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 16059 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 16060 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 16061 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 16062 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 16063 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 16064 // CHECK19-NEXT: ret void 16065 // 16066 // 16067 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 16068 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16069 // CHECK19-NEXT: entry: 16070 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 16071 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 16072 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 16073 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16074 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16075 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 16076 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16077 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16078 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16079 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16080 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 16081 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16082 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 16083 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 16084 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 16085 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 16086 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 16087 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 16088 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 16089 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 16090 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 16091 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 16092 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 16093 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 16094 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 16095 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16096 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16097 // CHECK19: cond.true: 16098 // CHECK19-NEXT: br label [[COND_END:%.*]] 16099 // CHECK19: cond.false: 16100 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 16101 // CHECK19-NEXT: br label [[COND_END]] 16102 // CHECK19: cond.end: 16103 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16104 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 16105 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 16106 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 16107 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16108 // CHECK19: omp.inner.for.cond: 16109 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71:![0-9]+]] 16110 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP71]] 16111 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16112 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16113 // CHECK19: omp.inner.for.body: 16114 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP71]] 16115 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP71]] 16116 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group [[ACC_GRP71]] 16117 // CHECK19-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP71]] 16118 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP71]] 16119 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]), !llvm.access.group [[ACC_GRP71]] 16120 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16121 // CHECK19: omp.inner.for.inc: 16122 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 16123 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP71]] 16124 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 16125 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 16126 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]] 16127 // CHECK19: omp.inner.for.end: 16128 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16129 // CHECK19: omp.loop.exit: 16130 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 16131 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 16132 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 16133 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 16134 // CHECK19: .omp.final.then: 16135 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 16136 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 16137 // CHECK19: .omp.final.done: 16138 // CHECK19-NEXT: ret void 16139 // 16140 // 16141 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 16142 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16143 // CHECK19-NEXT: entry: 16144 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 16145 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 16146 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16147 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16148 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 16149 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16150 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16151 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 16152 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16153 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16154 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16155 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16156 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 16157 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 16158 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 16159 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 16160 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 16161 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 16162 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 16163 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 16164 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 16165 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 16166 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 16167 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 16168 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 16169 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 16170 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 16171 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 16172 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 16173 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16174 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 16175 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 16176 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 16177 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 16178 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16179 // CHECK19: omp.dispatch.cond: 16180 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 16181 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 16182 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16183 // CHECK19: omp.dispatch.body: 16184 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16185 // CHECK19-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 16186 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16187 // CHECK19: omp.inner.for.cond: 16188 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74:![0-9]+]] 16189 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 16190 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 16191 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16192 // CHECK19: omp.inner.for.body: 16193 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 16194 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 16195 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16196 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP74]] 16197 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP74]] 16198 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]] 16199 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP74]] 16200 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16201 // CHECK19: omp.body.continue: 16202 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16203 // CHECK19: omp.inner.for.inc: 16204 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 16205 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 16206 // CHECK19-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 16207 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]] 16208 // CHECK19: omp.inner.for.end: 16209 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16210 // CHECK19: omp.dispatch.inc: 16211 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 16212 // CHECK19: omp.dispatch.end: 16213 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 16214 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 16215 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 16216 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 16217 // CHECK19: .omp.final.then: 16218 // CHECK19-NEXT: store i32 10, ptr [[I]], align 4 16219 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]] 16220 // CHECK19: .omp.final.done: 16221 // CHECK19-NEXT: ret void 16222 // 16223 // 16224 // CHECK21-LABEL: define {{[^@]+}}@main 16225 // CHECK21-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 16226 // CHECK21-NEXT: entry: 16227 // CHECK21-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 16228 // CHECK21-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 16229 // CHECK21-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 16230 // CHECK21-NEXT: [[N:%.*]] = alloca i32, align 4 16231 // CHECK21-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 16232 // CHECK21-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 16233 // CHECK21-NEXT: [[M:%.*]] = alloca i32, align 4 16234 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4 16235 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16236 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16237 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16238 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16239 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 16240 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16241 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4 16242 // CHECK21-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 16243 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 16244 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 16245 // CHECK21-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 16246 // CHECK21-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 16247 // CHECK21-NEXT: [[I18:%.*]] = alloca i32, align 4 16248 // CHECK21-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 16249 // CHECK21-NEXT: [[I22:%.*]] = alloca i32, align 4 16250 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 16251 // CHECK21-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 16252 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 16253 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 16254 // CHECK21-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 16255 // CHECK21-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 16256 // CHECK21-NEXT: [[I48:%.*]] = alloca i32, align 4 16257 // CHECK21-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 16258 // CHECK21-NEXT: [[I52:%.*]] = alloca i32, align 4 16259 // CHECK21-NEXT: [[_TMP69:%.*]] = alloca i32, align 4 16260 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_70:%.*]] = alloca i32, align 4 16261 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_71:%.*]] = alloca i32, align 4 16262 // CHECK21-NEXT: [[DOTOMP_LB75:%.*]] = alloca i32, align 4 16263 // CHECK21-NEXT: [[DOTOMP_UB76:%.*]] = alloca i32, align 4 16264 // CHECK21-NEXT: [[I77:%.*]] = alloca i32, align 4 16265 // CHECK21-NEXT: [[DOTOMP_IV80:%.*]] = alloca i32, align 4 16266 // CHECK21-NEXT: [[I81:%.*]] = alloca i32, align 4 16267 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4 16268 // CHECK21-NEXT: [[_TMP99:%.*]] = alloca i32, align 4 16269 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_100:%.*]] = alloca i32, align 4 16270 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_101:%.*]] = alloca i32, align 4 16271 // CHECK21-NEXT: [[DOTOMP_LB105:%.*]] = alloca i32, align 4 16272 // CHECK21-NEXT: [[DOTOMP_UB106:%.*]] = alloca i32, align 4 16273 // CHECK21-NEXT: [[I107:%.*]] = alloca i32, align 4 16274 // CHECK21-NEXT: [[DOTOMP_IV110:%.*]] = alloca i32, align 4 16275 // CHECK21-NEXT: [[I111:%.*]] = alloca i32, align 4 16276 // CHECK21-NEXT: store i32 0, ptr [[RETVAL]], align 4 16277 // CHECK21-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 16278 // CHECK21-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 16279 // CHECK21-NEXT: store i32 100, ptr [[N]], align 4 16280 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 16281 // CHECK21-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 16282 // CHECK21-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 16283 // CHECK21-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 16284 // CHECK21-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 16285 // CHECK21-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 16286 // CHECK21-NEXT: store i32 10, ptr [[M]], align 4 16287 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 16288 // CHECK21-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4 16289 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16290 // CHECK21-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 16291 // CHECK21-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16292 // CHECK21-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 16293 // CHECK21-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 16294 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 16295 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 16296 // CHECK21-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 16297 // CHECK21-NEXT: store i32 0, ptr [[I]], align 4 16298 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16299 // CHECK21-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 16300 // CHECK21-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 16301 // CHECK21: simd.if.then: 16302 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16303 // CHECK21-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 16304 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16305 // CHECK21: omp.inner.for.cond: 16306 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 16307 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 16308 // CHECK21-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 16309 // CHECK21-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16310 // CHECK21: omp.inner.for.body: 16311 // CHECK21-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 16312 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 16313 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16314 // CHECK21-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 16315 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 16316 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 16317 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]] 16318 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 16319 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16320 // CHECK21: omp.body.continue: 16321 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16322 // CHECK21: omp.inner.for.inc: 16323 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 16324 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 16325 // CHECK21-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 16326 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 16327 // CHECK21: omp.inner.for.end: 16328 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16329 // CHECK21-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 16330 // CHECK21-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 16331 // CHECK21-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 16332 // CHECK21-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 16333 // CHECK21-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 16334 // CHECK21-NEXT: br label [[SIMD_IF_END]] 16335 // CHECK21: simd.if.end: 16336 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, ptr [[N]], align 4 16337 // CHECK21-NEXT: store i32 [[TMP14]], ptr [[DOTCAPTURE_EXPR_11]], align 4 16338 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 16339 // CHECK21-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 16340 // CHECK21-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 16341 // CHECK21-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 16342 // CHECK21-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4 16343 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 4 16344 // CHECK21-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 16345 // CHECK21-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_UB17]], align 4 16346 // CHECK21-NEXT: store i32 0, ptr [[I18]], align 4 16347 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 16348 // CHECK21-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 16349 // CHECK21-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 16350 // CHECK21: simd.if.then20: 16351 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4 16352 // CHECK21-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV21]], align 4 16353 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 16354 // CHECK21: omp.inner.for.cond23: 16355 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 16356 // CHECK21-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP6]] 16357 // CHECK21-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 16358 // CHECK21-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 16359 // CHECK21: omp.inner.for.body25: 16360 // CHECK21-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 16361 // CHECK21-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 16362 // CHECK21-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 16363 // CHECK21-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]] 16364 // CHECK21-NEXT: [[TMP22:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]] 16365 // CHECK21-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 16366 // CHECK21-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM28]] 16367 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP6]] 16368 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 16369 // CHECK21: omp.body.continue30: 16370 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 16371 // CHECK21: omp.inner.for.inc31: 16372 // CHECK21-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 16373 // CHECK21-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 16374 // CHECK21-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]] 16375 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 16376 // CHECK21: omp.inner.for.end33: 16377 // CHECK21-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 16378 // CHECK21-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 16379 // CHECK21-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 16380 // CHECK21-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 16381 // CHECK21-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 16382 // CHECK21-NEXT: store i32 [[ADD37]], ptr [[I22]], align 4 16383 // CHECK21-NEXT: br label [[SIMD_IF_END38]] 16384 // CHECK21: simd.if.end38: 16385 // CHECK21-NEXT: [[TMP25:%.*]] = load i32, ptr [[M]], align 4 16386 // CHECK21-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_39]], align 4 16387 // CHECK21-NEXT: [[TMP26:%.*]] = load i32, ptr [[N]], align 4 16388 // CHECK21-NEXT: store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR_41]], align 4 16389 // CHECK21-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 16390 // CHECK21-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 16391 // CHECK21-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 16392 // CHECK21-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 16393 // CHECK21-NEXT: store i32 [[SUB45]], ptr [[DOTCAPTURE_EXPR_42]], align 4 16394 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB46]], align 4 16395 // CHECK21-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_42]], align 4 16396 // CHECK21-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_UB47]], align 4 16397 // CHECK21-NEXT: store i32 0, ptr [[I48]], align 4 16398 // CHECK21-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 16399 // CHECK21-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 16400 // CHECK21-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 16401 // CHECK21: simd.if.then50: 16402 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_LB46]], align 4 16403 // CHECK21-NEXT: store i32 [[TMP30]], ptr [[DOTOMP_IV51]], align 4 16404 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 16405 // CHECK21: omp.inner.for.cond53: 16406 // CHECK21-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 16407 // CHECK21-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_UB47]], align 4, !llvm.access.group [[ACC_GRP9]] 16408 // CHECK21-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 16409 // CHECK21-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 16410 // CHECK21: omp.inner.for.body55: 16411 // CHECK21-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 16412 // CHECK21-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 16413 // CHECK21-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 16414 // CHECK21-NEXT: store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]] 16415 // CHECK21-NEXT: [[TMP34:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]] 16416 // CHECK21-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 16417 // CHECK21-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM58]] 16418 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX59]], align 4, !llvm.access.group [[ACC_GRP9]] 16419 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 16420 // CHECK21: omp.body.continue60: 16421 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 16422 // CHECK21: omp.inner.for.inc61: 16423 // CHECK21-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 16424 // CHECK21-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 16425 // CHECK21-NEXT: store i32 [[ADD62]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]] 16426 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 16427 // CHECK21: omp.inner.for.end63: 16428 // CHECK21-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 16429 // CHECK21-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 16430 // CHECK21-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 16431 // CHECK21-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 16432 // CHECK21-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 16433 // CHECK21-NEXT: store i32 [[ADD67]], ptr [[I52]], align 4 16434 // CHECK21-NEXT: br label [[SIMD_IF_END68]] 16435 // CHECK21: simd.if.end68: 16436 // CHECK21-NEXT: [[TMP37:%.*]] = load i32, ptr [[N]], align 4 16437 // CHECK21-NEXT: store i32 [[TMP37]], ptr [[DOTCAPTURE_EXPR_70]], align 4 16438 // CHECK21-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_70]], align 4 16439 // CHECK21-NEXT: [[SUB72:%.*]] = sub nsw i32 [[TMP38]], 0 16440 // CHECK21-NEXT: [[DIV73:%.*]] = sdiv i32 [[SUB72]], 1 16441 // CHECK21-NEXT: [[SUB74:%.*]] = sub nsw i32 [[DIV73]], 1 16442 // CHECK21-NEXT: store i32 [[SUB74]], ptr [[DOTCAPTURE_EXPR_71]], align 4 16443 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB75]], align 4 16444 // CHECK21-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_71]], align 4 16445 // CHECK21-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_UB76]], align 4 16446 // CHECK21-NEXT: store i32 0, ptr [[I77]], align 4 16447 // CHECK21-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_70]], align 4 16448 // CHECK21-NEXT: [[CMP78:%.*]] = icmp slt i32 0, [[TMP40]] 16449 // CHECK21-NEXT: br i1 [[CMP78]], label [[SIMD_IF_THEN79:%.*]], label [[SIMD_IF_END97:%.*]] 16450 // CHECK21: simd.if.then79: 16451 // CHECK21-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_LB75]], align 4 16452 // CHECK21-NEXT: store i32 [[TMP41]], ptr [[DOTOMP_IV80]], align 4 16453 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND82:%.*]] 16454 // CHECK21: omp.inner.for.cond82: 16455 // CHECK21-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_IV80]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 16456 // CHECK21-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_UB76]], align 4, !llvm.access.group [[ACC_GRP12]] 16457 // CHECK21-NEXT: [[CMP83:%.*]] = icmp sle i32 [[TMP42]], [[TMP43]] 16458 // CHECK21-NEXT: br i1 [[CMP83]], label [[OMP_INNER_FOR_BODY84:%.*]], label [[OMP_INNER_FOR_END92:%.*]] 16459 // CHECK21: omp.inner.for.body84: 16460 // CHECK21-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTOMP_IV80]], align 4, !llvm.access.group [[ACC_GRP12]] 16461 // CHECK21-NEXT: [[MUL85:%.*]] = mul nsw i32 [[TMP44]], 1 16462 // CHECK21-NEXT: [[ADD86:%.*]] = add nsw i32 0, [[MUL85]] 16463 // CHECK21-NEXT: store i32 [[ADD86]], ptr [[I81]], align 4, !llvm.access.group [[ACC_GRP12]] 16464 // CHECK21-NEXT: [[TMP45:%.*]] = load i32, ptr [[I81]], align 4, !llvm.access.group [[ACC_GRP12]] 16465 // CHECK21-NEXT: [[IDXPROM87:%.*]] = sext i32 [[TMP45]] to i64 16466 // CHECK21-NEXT: [[ARRAYIDX88:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM87]] 16467 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX88]], align 4, !llvm.access.group [[ACC_GRP12]] 16468 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE89:%.*]] 16469 // CHECK21: omp.body.continue89: 16470 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC90:%.*]] 16471 // CHECK21: omp.inner.for.inc90: 16472 // CHECK21-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTOMP_IV80]], align 4, !llvm.access.group [[ACC_GRP12]] 16473 // CHECK21-NEXT: [[ADD91:%.*]] = add nsw i32 [[TMP46]], 1 16474 // CHECK21-NEXT: store i32 [[ADD91]], ptr [[DOTOMP_IV80]], align 4, !llvm.access.group [[ACC_GRP12]] 16475 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND82]], !llvm.loop [[LOOP13:![0-9]+]] 16476 // CHECK21: omp.inner.for.end92: 16477 // CHECK21-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_70]], align 4 16478 // CHECK21-NEXT: [[SUB93:%.*]] = sub nsw i32 [[TMP47]], 0 16479 // CHECK21-NEXT: [[DIV94:%.*]] = sdiv i32 [[SUB93]], 1 16480 // CHECK21-NEXT: [[MUL95:%.*]] = mul nsw i32 [[DIV94]], 1 16481 // CHECK21-NEXT: [[ADD96:%.*]] = add nsw i32 0, [[MUL95]] 16482 // CHECK21-NEXT: store i32 [[ADD96]], ptr [[I81]], align 4 16483 // CHECK21-NEXT: br label [[SIMD_IF_END97]] 16484 // CHECK21: simd.if.end97: 16485 // CHECK21-NEXT: [[TMP48:%.*]] = load i32, ptr [[M]], align 4 16486 // CHECK21-NEXT: store i32 [[TMP48]], ptr [[DOTCAPTURE_EXPR_98]], align 4 16487 // CHECK21-NEXT: [[TMP49:%.*]] = load i32, ptr [[N]], align 4 16488 // CHECK21-NEXT: store i32 [[TMP49]], ptr [[DOTCAPTURE_EXPR_100]], align 4 16489 // CHECK21-NEXT: [[TMP50:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_100]], align 4 16490 // CHECK21-NEXT: [[SUB102:%.*]] = sub nsw i32 [[TMP50]], 0 16491 // CHECK21-NEXT: [[DIV103:%.*]] = sdiv i32 [[SUB102]], 1 16492 // CHECK21-NEXT: [[SUB104:%.*]] = sub nsw i32 [[DIV103]], 1 16493 // CHECK21-NEXT: store i32 [[SUB104]], ptr [[DOTCAPTURE_EXPR_101]], align 4 16494 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB105]], align 4 16495 // CHECK21-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_101]], align 4 16496 // CHECK21-NEXT: store i32 [[TMP51]], ptr [[DOTOMP_UB106]], align 4 16497 // CHECK21-NEXT: store i32 0, ptr [[I107]], align 4 16498 // CHECK21-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_100]], align 4 16499 // CHECK21-NEXT: [[CMP108:%.*]] = icmp slt i32 0, [[TMP52]] 16500 // CHECK21-NEXT: br i1 [[CMP108]], label [[SIMD_IF_THEN109:%.*]], label [[SIMD_IF_END127:%.*]] 16501 // CHECK21: simd.if.then109: 16502 // CHECK21-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTOMP_LB105]], align 4 16503 // CHECK21-NEXT: store i32 [[TMP53]], ptr [[DOTOMP_IV110]], align 4 16504 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND112:%.*]] 16505 // CHECK21: omp.inner.for.cond112: 16506 // CHECK21-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTOMP_IV110]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 16507 // CHECK21-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTOMP_UB106]], align 4, !llvm.access.group [[ACC_GRP15]] 16508 // CHECK21-NEXT: [[CMP113:%.*]] = icmp sle i32 [[TMP54]], [[TMP55]] 16509 // CHECK21-NEXT: br i1 [[CMP113]], label [[OMP_INNER_FOR_BODY114:%.*]], label [[OMP_INNER_FOR_END122:%.*]] 16510 // CHECK21: omp.inner.for.body114: 16511 // CHECK21-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTOMP_IV110]], align 4, !llvm.access.group [[ACC_GRP15]] 16512 // CHECK21-NEXT: [[MUL115:%.*]] = mul nsw i32 [[TMP56]], 1 16513 // CHECK21-NEXT: [[ADD116:%.*]] = add nsw i32 0, [[MUL115]] 16514 // CHECK21-NEXT: store i32 [[ADD116]], ptr [[I111]], align 4, !llvm.access.group [[ACC_GRP15]] 16515 // CHECK21-NEXT: [[TMP57:%.*]] = load i32, ptr [[I111]], align 4, !llvm.access.group [[ACC_GRP15]] 16516 // CHECK21-NEXT: [[IDXPROM117:%.*]] = sext i32 [[TMP57]] to i64 16517 // CHECK21-NEXT: [[ARRAYIDX118:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM117]] 16518 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX118]], align 4, !llvm.access.group [[ACC_GRP15]] 16519 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE119:%.*]] 16520 // CHECK21: omp.body.continue119: 16521 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC120:%.*]] 16522 // CHECK21: omp.inner.for.inc120: 16523 // CHECK21-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTOMP_IV110]], align 4, !llvm.access.group [[ACC_GRP15]] 16524 // CHECK21-NEXT: [[ADD121:%.*]] = add nsw i32 [[TMP58]], 1 16525 // CHECK21-NEXT: store i32 [[ADD121]], ptr [[DOTOMP_IV110]], align 4, !llvm.access.group [[ACC_GRP15]] 16526 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND112]], !llvm.loop [[LOOP16:![0-9]+]] 16527 // CHECK21: omp.inner.for.end122: 16528 // CHECK21-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_100]], align 4 16529 // CHECK21-NEXT: [[SUB123:%.*]] = sub nsw i32 [[TMP59]], 0 16530 // CHECK21-NEXT: [[DIV124:%.*]] = sdiv i32 [[SUB123]], 1 16531 // CHECK21-NEXT: [[MUL125:%.*]] = mul nsw i32 [[DIV124]], 1 16532 // CHECK21-NEXT: [[ADD126:%.*]] = add nsw i32 0, [[MUL125]] 16533 // CHECK21-NEXT: store i32 [[ADD126]], ptr [[I111]], align 4 16534 // CHECK21-NEXT: br label [[SIMD_IF_END127]] 16535 // CHECK21: simd.if.end127: 16536 // CHECK21-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 16537 // CHECK21-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP60]]) 16538 // CHECK21-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 16539 // CHECK21-NEXT: [[TMP61:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 16540 // CHECK21-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP61]]) 16541 // CHECK21-NEXT: [[TMP62:%.*]] = load i32, ptr [[RETVAL]], align 4 16542 // CHECK21-NEXT: ret i32 [[TMP62]] 16543 // 16544 // 16545 // CHECK21-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 16546 // CHECK21-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 16547 // CHECK21-NEXT: entry: 16548 // CHECK21-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 16549 // CHECK21-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 16550 // CHECK21-NEXT: [[M:%.*]] = alloca i32, align 4 16551 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4 16552 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16553 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16554 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16555 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4 16556 // CHECK21-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 16557 // CHECK21-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 16558 // CHECK21-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 16559 // CHECK21-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 16560 // CHECK21-NEXT: [[I6:%.*]] = alloca i32, align 4 16561 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16562 // CHECK21-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 16563 // CHECK21-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 16564 // CHECK21-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 16565 // CHECK21-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 16566 // CHECK21-NEXT: [[I22:%.*]] = alloca i32, align 4 16567 // CHECK21-NEXT: [[_TMP34:%.*]] = alloca i32, align 4 16568 // CHECK21-NEXT: [[DOTOMP_LB35:%.*]] = alloca i32, align 4 16569 // CHECK21-NEXT: [[DOTOMP_UB36:%.*]] = alloca i32, align 4 16570 // CHECK21-NEXT: [[DOTOMP_IV37:%.*]] = alloca i32, align 4 16571 // CHECK21-NEXT: [[I38:%.*]] = alloca i32, align 4 16572 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4 16573 // CHECK21-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 16574 // CHECK21-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4 16575 // CHECK21-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4 16576 // CHECK21-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4 16577 // CHECK21-NEXT: [[I55:%.*]] = alloca i32, align 4 16578 // CHECK21-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 16579 // CHECK21-NEXT: store i32 10, ptr [[M]], align 4 16580 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 16581 // CHECK21-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 16582 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16583 // CHECK21-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 16584 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16585 // CHECK21: omp.inner.for.cond: 16586 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 16587 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 16588 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 16589 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16590 // CHECK21: omp.inner.for.body: 16591 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 16592 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 16593 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16594 // CHECK21-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 16595 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 16596 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 16597 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 16598 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 16599 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16600 // CHECK21: omp.body.continue: 16601 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16602 // CHECK21: omp.inner.for.inc: 16603 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 16604 // CHECK21-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 16605 // CHECK21-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 16606 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 16607 // CHECK21: omp.inner.for.end: 16608 // CHECK21-NEXT: store i32 10, ptr [[I]], align 4 16609 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 16610 // CHECK21-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 4 16611 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 16612 // CHECK21-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4 16613 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 16614 // CHECK21: omp.inner.for.cond7: 16615 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 16616 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]] 16617 // CHECK21-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 16618 // CHECK21-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 16619 // CHECK21: omp.inner.for.body9: 16620 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 16621 // CHECK21-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 16622 // CHECK21-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 16623 // CHECK21-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]] 16624 // CHECK21-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]] 16625 // CHECK21-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 16626 // CHECK21-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM12]] 16627 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX13]], align 4, !llvm.access.group [[ACC_GRP21]] 16628 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 16629 // CHECK21: omp.body.continue14: 16630 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 16631 // CHECK21: omp.inner.for.inc15: 16632 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 16633 // CHECK21-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 16634 // CHECK21-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 16635 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]] 16636 // CHECK21: omp.inner.for.end17: 16637 // CHECK21-NEXT: store i32 10, ptr [[I6]], align 4 16638 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, ptr [[M]], align 4 16639 // CHECK21-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 4 16640 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB19]], align 4 16641 // CHECK21-NEXT: store i32 9, ptr [[DOTOMP_UB20]], align 4 16642 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 4 16643 // CHECK21-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV21]], align 4 16644 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 16645 // CHECK21: omp.inner.for.cond23: 16646 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 16647 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP24]] 16648 // CHECK21-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 16649 // CHECK21-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 16650 // CHECK21: omp.inner.for.body25: 16651 // CHECK21-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP24]] 16652 // CHECK21-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP16]], 1 16653 // CHECK21-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 16654 // CHECK21-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP24]] 16655 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP24]] 16656 // CHECK21-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP17]] to i64 16657 // CHECK21-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM28]] 16658 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP24]] 16659 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 16660 // CHECK21: omp.body.continue30: 16661 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 16662 // CHECK21: omp.inner.for.inc31: 16663 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP24]] 16664 // CHECK21-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP18]], 1 16665 // CHECK21-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP24]] 16666 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP25:![0-9]+]] 16667 // CHECK21: omp.inner.for.end33: 16668 // CHECK21-NEXT: store i32 10, ptr [[I22]], align 4 16669 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB35]], align 4 16670 // CHECK21-NEXT: store i32 9, ptr [[DOTOMP_UB36]], align 4 16671 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB35]], align 4 16672 // CHECK21-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV37]], align 4 16673 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND39:%.*]] 16674 // CHECK21: omp.inner.for.cond39: 16675 // CHECK21-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV37]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 16676 // CHECK21-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB36]], align 4, !llvm.access.group [[ACC_GRP27]] 16677 // CHECK21-NEXT: [[CMP40:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 16678 // CHECK21-NEXT: br i1 [[CMP40]], label [[OMP_INNER_FOR_BODY41:%.*]], label [[OMP_INNER_FOR_END49:%.*]] 16679 // CHECK21: omp.inner.for.body41: 16680 // CHECK21-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV37]], align 4, !llvm.access.group [[ACC_GRP27]] 16681 // CHECK21-NEXT: [[MUL42:%.*]] = mul nsw i32 [[TMP22]], 1 16682 // CHECK21-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]] 16683 // CHECK21-NEXT: store i32 [[ADD43]], ptr [[I38]], align 4, !llvm.access.group [[ACC_GRP27]] 16684 // CHECK21-NEXT: [[TMP23:%.*]] = load i32, ptr [[I38]], align 4, !llvm.access.group [[ACC_GRP27]] 16685 // CHECK21-NEXT: [[IDXPROM44:%.*]] = sext i32 [[TMP23]] to i64 16686 // CHECK21-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM44]] 16687 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX45]], align 4, !llvm.access.group [[ACC_GRP27]] 16688 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE46:%.*]] 16689 // CHECK21: omp.body.continue46: 16690 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC47:%.*]] 16691 // CHECK21: omp.inner.for.inc47: 16692 // CHECK21-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV37]], align 4, !llvm.access.group [[ACC_GRP27]] 16693 // CHECK21-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP24]], 1 16694 // CHECK21-NEXT: store i32 [[ADD48]], ptr [[DOTOMP_IV37]], align 4, !llvm.access.group [[ACC_GRP27]] 16695 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND39]], !llvm.loop [[LOOP28:![0-9]+]] 16696 // CHECK21: omp.inner.for.end49: 16697 // CHECK21-NEXT: store i32 10, ptr [[I38]], align 4 16698 // CHECK21-NEXT: [[TMP25:%.*]] = load i32, ptr [[M]], align 4 16699 // CHECK21-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_50]], align 4 16700 // CHECK21-NEXT: store i32 0, ptr [[DOTOMP_LB52]], align 4 16701 // CHECK21-NEXT: store i32 9, ptr [[DOTOMP_UB53]], align 4 16702 // CHECK21-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB52]], align 4 16703 // CHECK21-NEXT: store i32 [[TMP26]], ptr [[DOTOMP_IV54]], align 4 16704 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]] 16705 // CHECK21: omp.inner.for.cond56: 16706 // CHECK21-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 16707 // CHECK21-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB53]], align 4, !llvm.access.group [[ACC_GRP30]] 16708 // CHECK21-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]] 16709 // CHECK21-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]] 16710 // CHECK21: omp.inner.for.body58: 16711 // CHECK21-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP30]] 16712 // CHECK21-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP29]], 1 16713 // CHECK21-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]] 16714 // CHECK21-NEXT: store i32 [[ADD60]], ptr [[I55]], align 4, !llvm.access.group [[ACC_GRP30]] 16715 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, ptr [[I55]], align 4, !llvm.access.group [[ACC_GRP30]] 16716 // CHECK21-NEXT: [[IDXPROM61:%.*]] = sext i32 [[TMP30]] to i64 16717 // CHECK21-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM61]] 16718 // CHECK21-NEXT: store i32 0, ptr [[ARRAYIDX62]], align 4, !llvm.access.group [[ACC_GRP30]] 16719 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]] 16720 // CHECK21: omp.body.continue63: 16721 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]] 16722 // CHECK21: omp.inner.for.inc64: 16723 // CHECK21-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP30]] 16724 // CHECK21-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP31]], 1 16725 // CHECK21-NEXT: store i32 [[ADD65]], ptr [[DOTOMP_IV54]], align 4, !llvm.access.group [[ACC_GRP30]] 16726 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP31:![0-9]+]] 16727 // CHECK21: omp.inner.for.end66: 16728 // CHECK21-NEXT: store i32 10, ptr [[I55]], align 4 16729 // CHECK21-NEXT: ret i32 0 16730 // 16731 // 16732 // CHECK23-LABEL: define {{[^@]+}}@main 16733 // CHECK23-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 16734 // CHECK23-NEXT: entry: 16735 // CHECK23-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 16736 // CHECK23-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 16737 // CHECK23-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 16738 // CHECK23-NEXT: [[N:%.*]] = alloca i32, align 4 16739 // CHECK23-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 16740 // CHECK23-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 16741 // CHECK23-NEXT: [[M:%.*]] = alloca i32, align 4 16742 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4 16743 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16744 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16745 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16746 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16747 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 16748 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16749 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4 16750 // CHECK23-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 16751 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 16752 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 16753 // CHECK23-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 16754 // CHECK23-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 16755 // CHECK23-NEXT: [[I18:%.*]] = alloca i32, align 4 16756 // CHECK23-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 16757 // CHECK23-NEXT: [[I22:%.*]] = alloca i32, align 4 16758 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 16759 // CHECK23-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 16760 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 16761 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 16762 // CHECK23-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 16763 // CHECK23-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 16764 // CHECK23-NEXT: [[I47:%.*]] = alloca i32, align 4 16765 // CHECK23-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 16766 // CHECK23-NEXT: [[I51:%.*]] = alloca i32, align 4 16767 // CHECK23-NEXT: [[_TMP67:%.*]] = alloca i32, align 4 16768 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4 16769 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4 16770 // CHECK23-NEXT: [[DOTOMP_LB73:%.*]] = alloca i32, align 4 16771 // CHECK23-NEXT: [[DOTOMP_UB74:%.*]] = alloca i32, align 4 16772 // CHECK23-NEXT: [[I75:%.*]] = alloca i32, align 4 16773 // CHECK23-NEXT: [[DOTOMP_IV78:%.*]] = alloca i32, align 4 16774 // CHECK23-NEXT: [[I79:%.*]] = alloca i32, align 4 16775 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_95:%.*]] = alloca i32, align 4 16776 // CHECK23-NEXT: [[_TMP96:%.*]] = alloca i32, align 4 16777 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_97:%.*]] = alloca i32, align 4 16778 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4 16779 // CHECK23-NEXT: [[DOTOMP_LB102:%.*]] = alloca i32, align 4 16780 // CHECK23-NEXT: [[DOTOMP_UB103:%.*]] = alloca i32, align 4 16781 // CHECK23-NEXT: [[I104:%.*]] = alloca i32, align 4 16782 // CHECK23-NEXT: [[DOTOMP_IV107:%.*]] = alloca i32, align 4 16783 // CHECK23-NEXT: [[I108:%.*]] = alloca i32, align 4 16784 // CHECK23-NEXT: store i32 0, ptr [[RETVAL]], align 4 16785 // CHECK23-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 16786 // CHECK23-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 16787 // CHECK23-NEXT: store i32 100, ptr [[N]], align 4 16788 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 16789 // CHECK23-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 16790 // CHECK23-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 16791 // CHECK23-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 16792 // CHECK23-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 16793 // CHECK23-NEXT: store i32 10, ptr [[M]], align 4 16794 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 16795 // CHECK23-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 16796 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16797 // CHECK23-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 16798 // CHECK23-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16799 // CHECK23-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 16800 // CHECK23-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 16801 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 16802 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 16803 // CHECK23-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 16804 // CHECK23-NEXT: store i32 0, ptr [[I]], align 4 16805 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16806 // CHECK23-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 16807 // CHECK23-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 16808 // CHECK23: simd.if.then: 16809 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16810 // CHECK23-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 16811 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16812 // CHECK23: omp.inner.for.cond: 16813 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 16814 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 16815 // CHECK23-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 16816 // CHECK23-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16817 // CHECK23: omp.inner.for.body: 16818 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 16819 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 16820 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16821 // CHECK23-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 16822 // CHECK23-NEXT: [[TMP10:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 16823 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP10]] 16824 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 16825 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16826 // CHECK23: omp.body.continue: 16827 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16828 // CHECK23: omp.inner.for.inc: 16829 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 16830 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 16831 // CHECK23-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 16832 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 16833 // CHECK23: omp.inner.for.end: 16834 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16835 // CHECK23-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 16836 // CHECK23-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 16837 // CHECK23-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 16838 // CHECK23-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 16839 // CHECK23-NEXT: store i32 [[ADD9]], ptr [[I3]], align 4 16840 // CHECK23-NEXT: br label [[SIMD_IF_END]] 16841 // CHECK23: simd.if.end: 16842 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, ptr [[N]], align 4 16843 // CHECK23-NEXT: store i32 [[TMP13]], ptr [[DOTCAPTURE_EXPR_11]], align 4 16844 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 16845 // CHECK23-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 16846 // CHECK23-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 16847 // CHECK23-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 16848 // CHECK23-NEXT: store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4 16849 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB16]], align 4 16850 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 16851 // CHECK23-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_UB17]], align 4 16852 // CHECK23-NEXT: store i32 0, ptr [[I18]], align 4 16853 // CHECK23-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 16854 // CHECK23-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 16855 // CHECK23-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 16856 // CHECK23: simd.if.then20: 16857 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4 16858 // CHECK23-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV21]], align 4 16859 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 16860 // CHECK23: omp.inner.for.cond23: 16861 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 16862 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP7]] 16863 // CHECK23-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 16864 // CHECK23-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 16865 // CHECK23: omp.inner.for.body25: 16866 // CHECK23-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 16867 // CHECK23-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 16868 // CHECK23-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 16869 // CHECK23-NEXT: store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]] 16870 // CHECK23-NEXT: [[TMP21:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]] 16871 // CHECK23-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP21]] 16872 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX28]], align 4, !llvm.access.group [[ACC_GRP7]] 16873 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 16874 // CHECK23: omp.body.continue29: 16875 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 16876 // CHECK23: omp.inner.for.inc30: 16877 // CHECK23-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 16878 // CHECK23-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 16879 // CHECK23-NEXT: store i32 [[ADD31]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]] 16880 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 16881 // CHECK23: omp.inner.for.end32: 16882 // CHECK23-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4 16883 // CHECK23-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 16884 // CHECK23-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 16885 // CHECK23-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 16886 // CHECK23-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 16887 // CHECK23-NEXT: store i32 [[ADD36]], ptr [[I22]], align 4 16888 // CHECK23-NEXT: br label [[SIMD_IF_END37]] 16889 // CHECK23: simd.if.end37: 16890 // CHECK23-NEXT: [[TMP24:%.*]] = load i32, ptr [[M]], align 4 16891 // CHECK23-NEXT: store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_38]], align 4 16892 // CHECK23-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 4 16893 // CHECK23-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_40]], align 4 16894 // CHECK23-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 16895 // CHECK23-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 16896 // CHECK23-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 16897 // CHECK23-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 16898 // CHECK23-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 16899 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB45]], align 4 16900 // CHECK23-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 16901 // CHECK23-NEXT: store i32 [[TMP27]], ptr [[DOTOMP_UB46]], align 4 16902 // CHECK23-NEXT: store i32 0, ptr [[I47]], align 4 16903 // CHECK23-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 16904 // CHECK23-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 16905 // CHECK23-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 16906 // CHECK23: simd.if.then49: 16907 // CHECK23-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_LB45]], align 4 16908 // CHECK23-NEXT: store i32 [[TMP29]], ptr [[DOTOMP_IV50]], align 4 16909 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 16910 // CHECK23: omp.inner.for.cond52: 16911 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 16912 // CHECK23-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_UB46]], align 4, !llvm.access.group [[ACC_GRP10]] 16913 // CHECK23-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 16914 // CHECK23-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 16915 // CHECK23: omp.inner.for.body54: 16916 // CHECK23-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 16917 // CHECK23-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 16918 // CHECK23-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 16919 // CHECK23-NEXT: store i32 [[ADD56]], ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]] 16920 // CHECK23-NEXT: [[TMP33:%.*]] = load i32, ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]] 16921 // CHECK23-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP33]] 16922 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX57]], align 4, !llvm.access.group [[ACC_GRP10]] 16923 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 16924 // CHECK23: omp.body.continue58: 16925 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 16926 // CHECK23: omp.inner.for.inc59: 16927 // CHECK23-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 16928 // CHECK23-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 16929 // CHECK23-NEXT: store i32 [[ADD60]], ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]] 16930 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 16931 // CHECK23: omp.inner.for.end61: 16932 // CHECK23-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 16933 // CHECK23-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 16934 // CHECK23-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 16935 // CHECK23-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 16936 // CHECK23-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 16937 // CHECK23-NEXT: store i32 [[ADD65]], ptr [[I51]], align 4 16938 // CHECK23-NEXT: br label [[SIMD_IF_END66]] 16939 // CHECK23: simd.if.end66: 16940 // CHECK23-NEXT: [[TMP36:%.*]] = load i32, ptr [[N]], align 4 16941 // CHECK23-NEXT: store i32 [[TMP36]], ptr [[DOTCAPTURE_EXPR_68]], align 4 16942 // CHECK23-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_68]], align 4 16943 // CHECK23-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP37]], 0 16944 // CHECK23-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 16945 // CHECK23-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1 16946 // CHECK23-NEXT: store i32 [[SUB72]], ptr [[DOTCAPTURE_EXPR_69]], align 4 16947 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB73]], align 4 16948 // CHECK23-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_69]], align 4 16949 // CHECK23-NEXT: store i32 [[TMP38]], ptr [[DOTOMP_UB74]], align 4 16950 // CHECK23-NEXT: store i32 0, ptr [[I75]], align 4 16951 // CHECK23-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_68]], align 4 16952 // CHECK23-NEXT: [[CMP76:%.*]] = icmp slt i32 0, [[TMP39]] 16953 // CHECK23-NEXT: br i1 [[CMP76]], label [[SIMD_IF_THEN77:%.*]], label [[SIMD_IF_END94:%.*]] 16954 // CHECK23: simd.if.then77: 16955 // CHECK23-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_LB73]], align 4 16956 // CHECK23-NEXT: store i32 [[TMP40]], ptr [[DOTOMP_IV78]], align 4 16957 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND80:%.*]] 16958 // CHECK23: omp.inner.for.cond80: 16959 // CHECK23-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV78]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 16960 // CHECK23-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_UB74]], align 4, !llvm.access.group [[ACC_GRP13]] 16961 // CHECK23-NEXT: [[CMP81:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]] 16962 // CHECK23-NEXT: br i1 [[CMP81]], label [[OMP_INNER_FOR_BODY82:%.*]], label [[OMP_INNER_FOR_END89:%.*]] 16963 // CHECK23: omp.inner.for.body82: 16964 // CHECK23-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV78]], align 4, !llvm.access.group [[ACC_GRP13]] 16965 // CHECK23-NEXT: [[MUL83:%.*]] = mul nsw i32 [[TMP43]], 1 16966 // CHECK23-NEXT: [[ADD84:%.*]] = add nsw i32 0, [[MUL83]] 16967 // CHECK23-NEXT: store i32 [[ADD84]], ptr [[I79]], align 4, !llvm.access.group [[ACC_GRP13]] 16968 // CHECK23-NEXT: [[TMP44:%.*]] = load i32, ptr [[I79]], align 4, !llvm.access.group [[ACC_GRP13]] 16969 // CHECK23-NEXT: [[ARRAYIDX85:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP44]] 16970 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX85]], align 4, !llvm.access.group [[ACC_GRP13]] 16971 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE86:%.*]] 16972 // CHECK23: omp.body.continue86: 16973 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC87:%.*]] 16974 // CHECK23: omp.inner.for.inc87: 16975 // CHECK23-NEXT: [[TMP45:%.*]] = load i32, ptr [[DOTOMP_IV78]], align 4, !llvm.access.group [[ACC_GRP13]] 16976 // CHECK23-NEXT: [[ADD88:%.*]] = add nsw i32 [[TMP45]], 1 16977 // CHECK23-NEXT: store i32 [[ADD88]], ptr [[DOTOMP_IV78]], align 4, !llvm.access.group [[ACC_GRP13]] 16978 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND80]], !llvm.loop [[LOOP14:![0-9]+]] 16979 // CHECK23: omp.inner.for.end89: 16980 // CHECK23-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_68]], align 4 16981 // CHECK23-NEXT: [[SUB90:%.*]] = sub nsw i32 [[TMP46]], 0 16982 // CHECK23-NEXT: [[DIV91:%.*]] = sdiv i32 [[SUB90]], 1 16983 // CHECK23-NEXT: [[MUL92:%.*]] = mul nsw i32 [[DIV91]], 1 16984 // CHECK23-NEXT: [[ADD93:%.*]] = add nsw i32 0, [[MUL92]] 16985 // CHECK23-NEXT: store i32 [[ADD93]], ptr [[I79]], align 4 16986 // CHECK23-NEXT: br label [[SIMD_IF_END94]] 16987 // CHECK23: simd.if.end94: 16988 // CHECK23-NEXT: [[TMP47:%.*]] = load i32, ptr [[M]], align 4 16989 // CHECK23-NEXT: store i32 [[TMP47]], ptr [[DOTCAPTURE_EXPR_95]], align 4 16990 // CHECK23-NEXT: [[TMP48:%.*]] = load i32, ptr [[N]], align 4 16991 // CHECK23-NEXT: store i32 [[TMP48]], ptr [[DOTCAPTURE_EXPR_97]], align 4 16992 // CHECK23-NEXT: [[TMP49:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_97]], align 4 16993 // CHECK23-NEXT: [[SUB99:%.*]] = sub nsw i32 [[TMP49]], 0 16994 // CHECK23-NEXT: [[DIV100:%.*]] = sdiv i32 [[SUB99]], 1 16995 // CHECK23-NEXT: [[SUB101:%.*]] = sub nsw i32 [[DIV100]], 1 16996 // CHECK23-NEXT: store i32 [[SUB101]], ptr [[DOTCAPTURE_EXPR_98]], align 4 16997 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB102]], align 4 16998 // CHECK23-NEXT: [[TMP50:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_98]], align 4 16999 // CHECK23-NEXT: store i32 [[TMP50]], ptr [[DOTOMP_UB103]], align 4 17000 // CHECK23-NEXT: store i32 0, ptr [[I104]], align 4 17001 // CHECK23-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_97]], align 4 17002 // CHECK23-NEXT: [[CMP105:%.*]] = icmp slt i32 0, [[TMP51]] 17003 // CHECK23-NEXT: br i1 [[CMP105]], label [[SIMD_IF_THEN106:%.*]], label [[SIMD_IF_END123:%.*]] 17004 // CHECK23: simd.if.then106: 17005 // CHECK23-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_LB102]], align 4 17006 // CHECK23-NEXT: store i32 [[TMP52]], ptr [[DOTOMP_IV107]], align 4 17007 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND109:%.*]] 17008 // CHECK23: omp.inner.for.cond109: 17009 // CHECK23-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTOMP_IV107]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 17010 // CHECK23-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTOMP_UB103]], align 4, !llvm.access.group [[ACC_GRP16]] 17011 // CHECK23-NEXT: [[CMP110:%.*]] = icmp sle i32 [[TMP53]], [[TMP54]] 17012 // CHECK23-NEXT: br i1 [[CMP110]], label [[OMP_INNER_FOR_BODY111:%.*]], label [[OMP_INNER_FOR_END118:%.*]] 17013 // CHECK23: omp.inner.for.body111: 17014 // CHECK23-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTOMP_IV107]], align 4, !llvm.access.group [[ACC_GRP16]] 17015 // CHECK23-NEXT: [[MUL112:%.*]] = mul nsw i32 [[TMP55]], 1 17016 // CHECK23-NEXT: [[ADD113:%.*]] = add nsw i32 0, [[MUL112]] 17017 // CHECK23-NEXT: store i32 [[ADD113]], ptr [[I108]], align 4, !llvm.access.group [[ACC_GRP16]] 17018 // CHECK23-NEXT: [[TMP56:%.*]] = load i32, ptr [[I108]], align 4, !llvm.access.group [[ACC_GRP16]] 17019 // CHECK23-NEXT: [[ARRAYIDX114:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP56]] 17020 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX114]], align 4, !llvm.access.group [[ACC_GRP16]] 17021 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE115:%.*]] 17022 // CHECK23: omp.body.continue115: 17023 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC116:%.*]] 17024 // CHECK23: omp.inner.for.inc116: 17025 // CHECK23-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTOMP_IV107]], align 4, !llvm.access.group [[ACC_GRP16]] 17026 // CHECK23-NEXT: [[ADD117:%.*]] = add nsw i32 [[TMP57]], 1 17027 // CHECK23-NEXT: store i32 [[ADD117]], ptr [[DOTOMP_IV107]], align 4, !llvm.access.group [[ACC_GRP16]] 17028 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND109]], !llvm.loop [[LOOP17:![0-9]+]] 17029 // CHECK23: omp.inner.for.end118: 17030 // CHECK23-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_97]], align 4 17031 // CHECK23-NEXT: [[SUB119:%.*]] = sub nsw i32 [[TMP58]], 0 17032 // CHECK23-NEXT: [[DIV120:%.*]] = sdiv i32 [[SUB119]], 1 17033 // CHECK23-NEXT: [[MUL121:%.*]] = mul nsw i32 [[DIV120]], 1 17034 // CHECK23-NEXT: [[ADD122:%.*]] = add nsw i32 0, [[MUL121]] 17035 // CHECK23-NEXT: store i32 [[ADD122]], ptr [[I108]], align 4 17036 // CHECK23-NEXT: br label [[SIMD_IF_END123]] 17037 // CHECK23: simd.if.end123: 17038 // CHECK23-NEXT: [[TMP59:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 17039 // CHECK23-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP59]]) 17040 // CHECK23-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 17041 // CHECK23-NEXT: [[TMP60:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 17042 // CHECK23-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP60]]) 17043 // CHECK23-NEXT: [[TMP61:%.*]] = load i32, ptr [[RETVAL]], align 4 17044 // CHECK23-NEXT: ret i32 [[TMP61]] 17045 // 17046 // 17047 // CHECK23-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 17048 // CHECK23-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 17049 // CHECK23-NEXT: entry: 17050 // CHECK23-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 17051 // CHECK23-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 17052 // CHECK23-NEXT: [[M:%.*]] = alloca i32, align 4 17053 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4 17054 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17055 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17056 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17057 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4 17058 // CHECK23-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 17059 // CHECK23-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 17060 // CHECK23-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 17061 // CHECK23-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 17062 // CHECK23-NEXT: [[I6:%.*]] = alloca i32, align 4 17063 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17064 // CHECK23-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 17065 // CHECK23-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 17066 // CHECK23-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 17067 // CHECK23-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 17068 // CHECK23-NEXT: [[I21:%.*]] = alloca i32, align 4 17069 // CHECK23-NEXT: [[_TMP32:%.*]] = alloca i32, align 4 17070 // CHECK23-NEXT: [[DOTOMP_LB33:%.*]] = alloca i32, align 4 17071 // CHECK23-NEXT: [[DOTOMP_UB34:%.*]] = alloca i32, align 4 17072 // CHECK23-NEXT: [[DOTOMP_IV35:%.*]] = alloca i32, align 4 17073 // CHECK23-NEXT: [[I36:%.*]] = alloca i32, align 4 17074 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_47:%.*]] = alloca i32, align 4 17075 // CHECK23-NEXT: [[_TMP48:%.*]] = alloca i32, align 4 17076 // CHECK23-NEXT: [[DOTOMP_LB49:%.*]] = alloca i32, align 4 17077 // CHECK23-NEXT: [[DOTOMP_UB50:%.*]] = alloca i32, align 4 17078 // CHECK23-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 17079 // CHECK23-NEXT: [[I52:%.*]] = alloca i32, align 4 17080 // CHECK23-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 17081 // CHECK23-NEXT: store i32 10, ptr [[M]], align 4 17082 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 17083 // CHECK23-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 17084 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 17085 // CHECK23-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 17086 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17087 // CHECK23: omp.inner.for.cond: 17088 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 17089 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 17090 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 17091 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17092 // CHECK23: omp.inner.for.body: 17093 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 17094 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 17095 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17096 // CHECK23-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]] 17097 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]] 17098 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]] 17099 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]] 17100 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17101 // CHECK23: omp.body.continue: 17102 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17103 // CHECK23: omp.inner.for.inc: 17104 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 17105 // CHECK23-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 17106 // CHECK23-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 17107 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 17108 // CHECK23: omp.inner.for.end: 17109 // CHECK23-NEXT: store i32 10, ptr [[I]], align 4 17110 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 17111 // CHECK23-NEXT: store i32 9, ptr [[DOTOMP_UB4]], align 4 17112 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 17113 // CHECK23-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4 17114 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 17115 // CHECK23: omp.inner.for.cond7: 17116 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 17117 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP22]] 17118 // CHECK23-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 17119 // CHECK23-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 17120 // CHECK23: omp.inner.for.body9: 17121 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP22]] 17122 // CHECK23-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 17123 // CHECK23-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 17124 // CHECK23-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP22]] 17125 // CHECK23-NEXT: [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP22]] 17126 // CHECK23-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP10]] 17127 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP22]] 17128 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 17129 // CHECK23: omp.body.continue13: 17130 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 17131 // CHECK23: omp.inner.for.inc14: 17132 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP22]] 17133 // CHECK23-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 17134 // CHECK23-NEXT: store i32 [[ADD15]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP22]] 17135 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]] 17136 // CHECK23: omp.inner.for.end16: 17137 // CHECK23-NEXT: store i32 10, ptr [[I6]], align 4 17138 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, ptr [[M]], align 4 17139 // CHECK23-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 4 17140 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB18]], align 4 17141 // CHECK23-NEXT: store i32 9, ptr [[DOTOMP_UB19]], align 4 17142 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 4 17143 // CHECK23-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV20]], align 4 17144 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 17145 // CHECK23: omp.inner.for.cond22: 17146 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 17147 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4, !llvm.access.group [[ACC_GRP25]] 17148 // CHECK23-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 17149 // CHECK23-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 17150 // CHECK23: omp.inner.for.body24: 17151 // CHECK23-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP25]] 17152 // CHECK23-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP16]], 1 17153 // CHECK23-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 17154 // CHECK23-NEXT: store i32 [[ADD26]], ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP25]] 17155 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP25]] 17156 // CHECK23-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP17]] 17157 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX27]], align 4, !llvm.access.group [[ACC_GRP25]] 17158 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 17159 // CHECK23: omp.body.continue28: 17160 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 17161 // CHECK23: omp.inner.for.inc29: 17162 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP25]] 17163 // CHECK23-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP18]], 1 17164 // CHECK23-NEXT: store i32 [[ADD30]], ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP25]] 17165 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP26:![0-9]+]] 17166 // CHECK23: omp.inner.for.end31: 17167 // CHECK23-NEXT: store i32 10, ptr [[I21]], align 4 17168 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB33]], align 4 17169 // CHECK23-NEXT: store i32 9, ptr [[DOTOMP_UB34]], align 4 17170 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_LB33]], align 4 17171 // CHECK23-NEXT: store i32 [[TMP19]], ptr [[DOTOMP_IV35]], align 4 17172 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND37:%.*]] 17173 // CHECK23: omp.inner.for.cond37: 17174 // CHECK23-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV35]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 17175 // CHECK23-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB34]], align 4, !llvm.access.group [[ACC_GRP28]] 17176 // CHECK23-NEXT: [[CMP38:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 17177 // CHECK23-NEXT: br i1 [[CMP38]], label [[OMP_INNER_FOR_BODY39:%.*]], label [[OMP_INNER_FOR_END46:%.*]] 17178 // CHECK23: omp.inner.for.body39: 17179 // CHECK23-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV35]], align 4, !llvm.access.group [[ACC_GRP28]] 17180 // CHECK23-NEXT: [[MUL40:%.*]] = mul nsw i32 [[TMP22]], 1 17181 // CHECK23-NEXT: [[ADD41:%.*]] = add nsw i32 0, [[MUL40]] 17182 // CHECK23-NEXT: store i32 [[ADD41]], ptr [[I36]], align 4, !llvm.access.group [[ACC_GRP28]] 17183 // CHECK23-NEXT: [[TMP23:%.*]] = load i32, ptr [[I36]], align 4, !llvm.access.group [[ACC_GRP28]] 17184 // CHECK23-NEXT: [[ARRAYIDX42:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP23]] 17185 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX42]], align 4, !llvm.access.group [[ACC_GRP28]] 17186 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE43:%.*]] 17187 // CHECK23: omp.body.continue43: 17188 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC44:%.*]] 17189 // CHECK23: omp.inner.for.inc44: 17190 // CHECK23-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV35]], align 4, !llvm.access.group [[ACC_GRP28]] 17191 // CHECK23-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP24]], 1 17192 // CHECK23-NEXT: store i32 [[ADD45]], ptr [[DOTOMP_IV35]], align 4, !llvm.access.group [[ACC_GRP28]] 17193 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND37]], !llvm.loop [[LOOP29:![0-9]+]] 17194 // CHECK23: omp.inner.for.end46: 17195 // CHECK23-NEXT: store i32 10, ptr [[I36]], align 4 17196 // CHECK23-NEXT: [[TMP25:%.*]] = load i32, ptr [[M]], align 4 17197 // CHECK23-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_47]], align 4 17198 // CHECK23-NEXT: store i32 0, ptr [[DOTOMP_LB49]], align 4 17199 // CHECK23-NEXT: store i32 9, ptr [[DOTOMP_UB50]], align 4 17200 // CHECK23-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB49]], align 4 17201 // CHECK23-NEXT: store i32 [[TMP26]], ptr [[DOTOMP_IV51]], align 4 17202 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 17203 // CHECK23: omp.inner.for.cond53: 17204 // CHECK23-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP31:![0-9]+]] 17205 // CHECK23-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB50]], align 4, !llvm.access.group [[ACC_GRP31]] 17206 // CHECK23-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]] 17207 // CHECK23-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END62:%.*]] 17208 // CHECK23: omp.inner.for.body55: 17209 // CHECK23-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP31]] 17210 // CHECK23-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP29]], 1 17211 // CHECK23-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 17212 // CHECK23-NEXT: store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP31]] 17213 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP31]] 17214 // CHECK23-NEXT: [[ARRAYIDX58:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP30]] 17215 // CHECK23-NEXT: store i32 0, ptr [[ARRAYIDX58]], align 4, !llvm.access.group [[ACC_GRP31]] 17216 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE59:%.*]] 17217 // CHECK23: omp.body.continue59: 17218 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC60:%.*]] 17219 // CHECK23: omp.inner.for.inc60: 17220 // CHECK23-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP31]] 17221 // CHECK23-NEXT: [[ADD61:%.*]] = add nsw i32 [[TMP31]], 1 17222 // CHECK23-NEXT: store i32 [[ADD61]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP31]] 17223 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP32:![0-9]+]] 17224 // CHECK23: omp.inner.for.end62: 17225 // CHECK23-NEXT: store i32 10, ptr [[I52]], align 4 17226 // CHECK23-NEXT: ret i32 0 17227 // 17228