1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 12 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 14 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 15 16 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 26 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 29 30 // expected-no-diagnostics 31 #ifndef HEADER 32 #define HEADER 33 34 void fn1(); 35 void fn2(); 36 void fn3(); 37 void fn4(); 38 void fn5(); 39 void fn6(); 40 41 int Arg; 42 43 void gtid_test() { 44 #ifdef OMP5 45 #pragma omp target teams distribute parallel for simd if(simd: true) nontemporal(Arg) 46 #else 47 #pragma omp target teams distribute parallel for simd 48 #endif // OMP5 49 for (int i = 0; i < 100; i++) { 50 Arg = 0; 51 } 52 53 #pragma omp target teams distribute parallel for simd if (parallel: false) 54 for(int i = 0 ; i < 100; i++) { 55 gtid_test(); 56 } 57 } 58 59 60 template <typename T> 61 int tmain(T Arg) { 62 #pragma omp target teams distribute parallel for simd if (true) 63 for(int i = 0 ; i < 100; i++) { 64 fn1(); 65 } 66 #pragma omp target teams distribute parallel for simd if (false) 67 for(int i = 0 ; i < 100; i++) { 68 fn2(); 69 } 70 #pragma omp target teams distribute parallel for simd if (parallel: Arg) 71 for(int i = 0 ; i < 100; i++) { 72 fn3(); 73 } 74 return 0; 75 } 76 77 int main() { 78 #pragma omp target teams distribute parallel for simd if (true) 79 for(int i = 0 ; i < 100; i++) { 80 81 82 fn4(); 83 } 84 85 #pragma omp target teams distribute parallel for simd if (false) 86 for(int i = 0 ; i < 100; i++) { 87 88 89 fn5(); 90 } 91 92 #pragma omp target teams distribute parallel for simd if (Arg) 93 for(int i = 0 ; i < 100; i++) { 94 95 96 fn6(); 97 } 98 99 return tmain(Arg); 100 } 101 102 103 104 105 106 107 // call void [[T_OUTLINE_FUN_3:@.+]]( 108 109 #endif 110 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 111 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 112 // CHECK1-NEXT: entry: 113 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 114 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 115 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 116 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 117 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 118 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 119 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 120 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 121 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr @Arg, align 4 122 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 123 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 124 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 125 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 126 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 127 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 128 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 129 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 130 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 131 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 132 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 133 // CHECK1-NEXT: store i32 3, ptr [[TMP7]], align 4 134 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 135 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 136 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 137 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 138 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 139 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 140 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 141 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8 142 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 143 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8 144 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 145 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 146 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 147 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 148 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 149 // CHECK1-NEXT: store i64 100, ptr [[TMP15]], align 8 150 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 151 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8 152 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 153 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 154 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 155 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 156 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 157 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4 158 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS]]) 159 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 160 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 161 // CHECK1: omp_offload.failed: 162 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 163 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 164 // CHECK1: omp_offload.cont: 165 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 166 // CHECK1-NEXT: store i32 3, ptr [[TMP22]], align 4 167 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 168 // CHECK1-NEXT: store i32 0, ptr [[TMP23]], align 4 169 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 170 // CHECK1-NEXT: store ptr null, ptr [[TMP24]], align 8 171 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 172 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8 173 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 174 // CHECK1-NEXT: store ptr null, ptr [[TMP26]], align 8 175 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 176 // CHECK1-NEXT: store ptr null, ptr [[TMP27]], align 8 177 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 178 // CHECK1-NEXT: store ptr null, ptr [[TMP28]], align 8 179 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 180 // CHECK1-NEXT: store ptr null, ptr [[TMP29]], align 8 181 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 182 // CHECK1-NEXT: store i64 100, ptr [[TMP30]], align 8 183 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 184 // CHECK1-NEXT: store i64 0, ptr [[TMP31]], align 8 185 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 186 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4 187 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 188 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4 189 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 190 // CHECK1-NEXT: store i32 0, ptr [[TMP34]], align 4 191 // CHECK1-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, ptr [[KERNEL_ARGS2]]) 192 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 193 // CHECK1-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 194 // CHECK1: omp_offload.failed3: 195 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]] 196 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 197 // CHECK1: omp_offload.cont4: 198 // CHECK1-NEXT: ret void 199 // 200 // 201 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 202 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { 203 // CHECK1-NEXT: entry: 204 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 205 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 206 // CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 207 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 208 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 209 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 210 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined, i64 [[TMP1]]) 211 // CHECK1-NEXT: ret void 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined 215 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 218 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 219 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 220 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 221 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 222 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 223 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 224 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 225 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 226 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 227 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 228 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 230 // CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 231 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 232 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 233 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 234 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 235 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 236 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 237 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 238 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 239 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 240 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 241 // CHECK1: cond.true: 242 // CHECK1-NEXT: br label [[COND_END:%.*]] 243 // CHECK1: cond.false: 244 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 245 // CHECK1-NEXT: br label [[COND_END]] 246 // CHECK1: cond.end: 247 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 248 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 249 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 250 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 251 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 252 // CHECK1: omp.inner.for.cond: 253 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 254 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 255 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 256 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 257 // CHECK1: omp.inner.for.body: 258 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 259 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 260 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 261 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 262 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !llvm.access.group [[ACC_GRP9]] 263 // CHECK1-NEXT: store i32 [[TMP11]], ptr [[ARG_CASTED]], align 4, !llvm.access.group [[ACC_GRP9]] 264 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]] 265 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]] 266 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 267 // CHECK1: omp.inner.for.inc: 268 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 269 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 271 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 272 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 273 // CHECK1: omp.inner.for.end: 274 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 275 // CHECK1: omp.loop.exit: 276 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 277 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 278 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 279 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 280 // CHECK1: .omp.final.then: 281 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 282 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 283 // CHECK1: .omp.final.done: 284 // CHECK1-NEXT: ret void 285 // 286 // 287 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined 288 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 289 // CHECK1-NEXT: entry: 290 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 291 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 292 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 293 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 294 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 295 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 296 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 303 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 304 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 305 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 306 // CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 307 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 308 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 310 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 311 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 312 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 313 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 314 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 316 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 317 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 318 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 319 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 320 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 321 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 322 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 323 // CHECK1: cond.true: 324 // CHECK1-NEXT: br label [[COND_END:%.*]] 325 // CHECK1: cond.false: 326 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 327 // CHECK1-NEXT: br label [[COND_END]] 328 // CHECK1: cond.end: 329 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 330 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 331 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 332 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 334 // CHECK1: omp.inner.for.cond: 335 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 336 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 337 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 338 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 339 // CHECK1: omp.inner.for.body: 340 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 341 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 342 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 343 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 344 // CHECK1-NEXT: store i32 0, ptr [[ARG_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]] 345 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 346 // CHECK1: omp.body.continue: 347 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 348 // CHECK1: omp.inner.for.inc: 349 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 350 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 351 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 352 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 353 // CHECK1: omp.inner.for.end: 354 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 355 // CHECK1: omp.loop.exit: 356 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 357 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 358 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 359 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 360 // CHECK1: .omp.final.then: 361 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 362 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 363 // CHECK1: .omp.final.done: 364 // CHECK1-NEXT: ret void 365 // 366 // 367 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53 368 // CHECK1-SAME: () #[[ATTR1]] { 369 // CHECK1-NEXT: entry: 370 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined) 371 // CHECK1-NEXT: ret void 372 // 373 // 374 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined 375 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 376 // CHECK1-NEXT: entry: 377 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 378 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 379 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 381 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 382 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 383 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 384 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 385 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 386 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 387 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 388 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 389 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 390 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 391 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 392 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 393 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 394 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 395 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 396 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 397 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 398 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 399 // CHECK1: cond.true: 400 // CHECK1-NEXT: br label [[COND_END:%.*]] 401 // CHECK1: cond.false: 402 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 403 // CHECK1-NEXT: br label [[COND_END]] 404 // CHECK1: cond.end: 405 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 406 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 407 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 408 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 409 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 410 // CHECK1: omp.inner.for.cond: 411 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 412 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 413 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 414 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 415 // CHECK1: omp.inner.for.body: 416 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]] 417 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 418 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 419 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 420 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]] 421 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP18]] 422 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP18]] 423 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP18]] 424 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]] 425 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 426 // CHECK1: omp.inner.for.inc: 427 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 428 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]] 429 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 430 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 431 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 432 // CHECK1: omp.inner.for.end: 433 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 434 // CHECK1: omp.loop.exit: 435 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 436 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 437 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 438 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 439 // CHECK1: .omp.final.then: 440 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 441 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 442 // CHECK1: .omp.final.done: 443 // CHECK1-NEXT: ret void 444 // 445 // 446 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined 447 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 448 // CHECK1-NEXT: entry: 449 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 450 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 451 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 452 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 453 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 454 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 455 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 458 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 459 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 461 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 462 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 463 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 464 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 465 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 466 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 467 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 468 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 469 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 470 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 471 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 472 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 473 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 474 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 475 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 476 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 477 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 478 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 479 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 480 // CHECK1: cond.true: 481 // CHECK1-NEXT: br label [[COND_END:%.*]] 482 // CHECK1: cond.false: 483 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 484 // CHECK1-NEXT: br label [[COND_END]] 485 // CHECK1: cond.end: 486 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 487 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 488 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 489 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 490 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 491 // CHECK1: omp.inner.for.cond: 492 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 493 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 494 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 495 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 496 // CHECK1: omp.inner.for.body: 497 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 498 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 499 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 500 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 501 // CHECK1-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP21]] 502 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 503 // CHECK1: omp.body.continue: 504 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 505 // CHECK1: omp.inner.for.inc: 506 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 507 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 508 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 509 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 510 // CHECK1: omp.inner.for.end: 511 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 512 // CHECK1: omp.loop.exit: 513 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 514 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 515 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 516 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 517 // CHECK1: .omp.final.then: 518 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 519 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 520 // CHECK1: .omp.final.done: 521 // CHECK1-NEXT: ret void 522 // 523 // 524 // CHECK1-LABEL: define {{[^@]+}}@main 525 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 526 // CHECK1-NEXT: entry: 527 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 528 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 529 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 530 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 531 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 532 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 533 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 534 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 535 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 536 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 537 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 538 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 539 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 540 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 541 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 542 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 543 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 544 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 545 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 546 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 547 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 548 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 549 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 550 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 551 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 552 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 553 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 554 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 555 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 556 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 557 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 558 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 559 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 560 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 561 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 562 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 563 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 564 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, ptr [[KERNEL_ARGS]]) 565 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 566 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 567 // CHECK1: omp_offload.failed: 568 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]] 569 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 570 // CHECK1: omp_offload.cont: 571 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 572 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 4 573 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 574 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 575 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 576 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 577 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 578 // CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 579 // CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 580 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 581 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 582 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP18]] to i1 583 // CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 584 // CHECK1: omp_if.then: 585 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 586 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 587 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 588 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP20]], align 8 589 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 590 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 591 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 592 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 593 // CHECK1-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 594 // CHECK1-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP24]] to i1 595 // CHECK1-NEXT: [[TMP25:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 596 // CHECK1-NEXT: [[TMP26:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP25]], 0 597 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 598 // CHECK1-NEXT: store i32 3, ptr [[TMP27]], align 4 599 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 600 // CHECK1-NEXT: store i32 1, ptr [[TMP28]], align 4 601 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 602 // CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 603 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 604 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP30]], align 8 605 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 606 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP31]], align 8 607 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 608 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP32]], align 8 609 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 610 // CHECK1-NEXT: store ptr null, ptr [[TMP33]], align 8 611 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 612 // CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8 613 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 614 // CHECK1-NEXT: store i64 100, ptr [[TMP35]], align 8 615 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 616 // CHECK1-NEXT: store i64 0, ptr [[TMP36]], align 8 617 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 618 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP37]], align 4 619 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 620 // CHECK1-NEXT: store [3 x i32] [[TMP26]], ptr [[TMP38]], align 4 621 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 622 // CHECK1-NEXT: store i32 0, ptr [[TMP39]], align 4 623 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP25]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS5]]) 624 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 625 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 626 // CHECK1: omp_offload.failed6: 627 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 628 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 629 // CHECK1: omp_offload.cont7: 630 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 631 // CHECK1: omp_if.else: 632 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 633 // CHECK1-NEXT: br label [[OMP_IF_END]] 634 // CHECK1: omp_if.end: 635 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr @Arg, align 4 636 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]]) 637 // CHECK1-NEXT: ret i32 [[CALL]] 638 // 639 // 640 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78 641 // CHECK1-SAME: () #[[ATTR1]] { 642 // CHECK1-NEXT: entry: 643 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined) 644 // CHECK1-NEXT: ret void 645 // 646 // 647 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined 648 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 649 // CHECK1-NEXT: entry: 650 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 651 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 652 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 653 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 654 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 655 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 656 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 657 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 658 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 659 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 660 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 661 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 662 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 663 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 664 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 665 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 666 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 667 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 668 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 669 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 670 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 671 // CHECK1: cond.true: 672 // CHECK1-NEXT: br label [[COND_END:%.*]] 673 // CHECK1: cond.false: 674 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 675 // CHECK1-NEXT: br label [[COND_END]] 676 // CHECK1: cond.end: 677 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 678 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 679 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 680 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 681 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 682 // CHECK1: omp.inner.for.cond: 683 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 684 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 685 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 686 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 687 // CHECK1: omp.inner.for.body: 688 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 689 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 690 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 691 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 692 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]] 693 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 694 // CHECK1: omp.inner.for.inc: 695 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 696 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 697 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 698 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 699 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 700 // CHECK1: omp.inner.for.end: 701 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 702 // CHECK1: omp.loop.exit: 703 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 704 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 705 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 706 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 707 // CHECK1: .omp.final.then: 708 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 709 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 710 // CHECK1: .omp.final.done: 711 // CHECK1-NEXT: ret void 712 // 713 // 714 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined 715 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 716 // CHECK1-NEXT: entry: 717 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 718 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 719 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 720 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 721 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 722 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 723 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 724 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 725 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 726 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 727 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 728 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 729 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 730 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 731 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 732 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 733 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 734 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 735 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 736 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 737 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 738 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 739 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 740 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 741 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 742 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 743 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 744 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 745 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 746 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 747 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 748 // CHECK1: cond.true: 749 // CHECK1-NEXT: br label [[COND_END:%.*]] 750 // CHECK1: cond.false: 751 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 752 // CHECK1-NEXT: br label [[COND_END]] 753 // CHECK1: cond.end: 754 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 755 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 756 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 757 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 758 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 759 // CHECK1: omp.inner.for.cond: 760 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 761 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 762 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 763 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 764 // CHECK1: omp.inner.for.body: 765 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 766 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 767 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 768 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 769 // CHECK1-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP27]] 770 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 771 // CHECK1: omp.body.continue: 772 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 773 // CHECK1: omp.inner.for.inc: 774 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 775 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 776 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 777 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 778 // CHECK1: omp.inner.for.end: 779 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 780 // CHECK1: omp.loop.exit: 781 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 782 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 783 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 784 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 785 // CHECK1: .omp.final.then: 786 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 787 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 788 // CHECK1: .omp.final.done: 789 // CHECK1-NEXT: ret void 790 // 791 // 792 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 793 // CHECK1-SAME: () #[[ATTR1]] { 794 // CHECK1-NEXT: entry: 795 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined) 796 // CHECK1-NEXT: ret void 797 // 798 // 799 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined 800 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 801 // CHECK1-NEXT: entry: 802 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 803 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 804 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 805 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 806 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 807 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 808 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 809 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 810 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 811 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 812 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 813 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 814 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 815 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 816 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 817 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 818 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 819 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 820 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 821 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 822 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 823 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 824 // CHECK1: cond.true: 825 // CHECK1-NEXT: br label [[COND_END:%.*]] 826 // CHECK1: cond.false: 827 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 828 // CHECK1-NEXT: br label [[COND_END]] 829 // CHECK1: cond.end: 830 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 831 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 832 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 833 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 834 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 835 // CHECK1: omp.inner.for.cond: 836 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 837 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 838 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 839 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 840 // CHECK1: omp.inner.for.body: 841 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]] 842 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 843 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 844 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 845 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]] 846 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP30]] 847 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP30]] 848 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP30]] 849 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]] 850 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 851 // CHECK1: omp.inner.for.inc: 852 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 853 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]] 854 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 855 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 856 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 857 // CHECK1: omp.inner.for.end: 858 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 859 // CHECK1: omp.loop.exit: 860 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 861 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 862 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 863 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 864 // CHECK1: .omp.final.then: 865 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 866 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 867 // CHECK1: .omp.final.done: 868 // CHECK1-NEXT: ret void 869 // 870 // 871 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined 872 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 873 // CHECK1-NEXT: entry: 874 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 875 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 876 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 877 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 878 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 879 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 880 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 881 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 882 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 883 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 884 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 885 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 886 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 887 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 888 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 889 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 890 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 891 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 892 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 893 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 894 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 895 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 896 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 897 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 898 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 899 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 900 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 901 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 902 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 903 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 904 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 905 // CHECK1: cond.true: 906 // CHECK1-NEXT: br label [[COND_END:%.*]] 907 // CHECK1: cond.false: 908 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 909 // CHECK1-NEXT: br label [[COND_END]] 910 // CHECK1: cond.end: 911 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 912 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 913 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 914 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 915 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 916 // CHECK1: omp.inner.for.cond: 917 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 918 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 919 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 920 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 921 // CHECK1: omp.inner.for.body: 922 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 923 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 924 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 925 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 926 // CHECK1-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP33]] 927 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 928 // CHECK1: omp.body.continue: 929 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 930 // CHECK1: omp.inner.for.inc: 931 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 932 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 933 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 934 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] 935 // CHECK1: omp.inner.for.end: 936 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 937 // CHECK1: omp.loop.exit: 938 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 939 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 940 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 941 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 942 // CHECK1: .omp.final.then: 943 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 944 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 945 // CHECK1: .omp.final.done: 946 // CHECK1-NEXT: ret void 947 // 948 // 949 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92 950 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 951 // CHECK1-NEXT: entry: 952 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 953 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 954 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 955 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 956 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 957 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 958 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 959 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 960 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP1]]) 961 // CHECK1-NEXT: ret void 962 // 963 // 964 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined 965 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 966 // CHECK1-NEXT: entry: 967 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 968 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 969 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 970 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 971 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 972 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 973 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 974 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 975 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 976 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 977 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 978 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 979 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 980 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 981 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 982 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 983 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 984 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 985 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 986 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 987 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 988 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 989 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 990 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 991 // CHECK1: cond.true: 992 // CHECK1-NEXT: br label [[COND_END:%.*]] 993 // CHECK1: cond.false: 994 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 995 // CHECK1-NEXT: br label [[COND_END]] 996 // CHECK1: cond.end: 997 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 998 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 999 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1000 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1001 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1002 // CHECK1: omp.inner.for.cond: 1003 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 1004 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 1005 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1006 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1007 // CHECK1: omp.inner.for.body: 1008 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]] 1009 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1010 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 1011 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1012 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP36]] 1013 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 1014 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1015 // CHECK1: omp_if.then: 1016 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]] 1017 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1018 // CHECK1: omp_if.else: 1019 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]] 1020 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP36]] 1021 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP36]] 1022 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP36]] 1023 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]] 1024 // CHECK1-NEXT: br label [[OMP_IF_END]] 1025 // CHECK1: omp_if.end: 1026 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1027 // CHECK1: omp.inner.for.inc: 1028 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 1029 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]] 1030 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1031 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 1032 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] 1033 // CHECK1: omp.inner.for.end: 1034 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1035 // CHECK1: omp.loop.exit: 1036 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1037 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1038 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1039 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1040 // CHECK1: .omp.final.then: 1041 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1042 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1043 // CHECK1: .omp.final.done: 1044 // CHECK1-NEXT: ret void 1045 // 1046 // 1047 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined 1048 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1049 // CHECK1-NEXT: entry: 1050 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1051 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1052 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1053 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1054 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1055 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1056 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1057 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1058 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1059 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1060 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1061 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1062 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1063 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1064 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1065 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1066 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1067 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1068 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1069 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1070 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1071 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1072 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1073 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1074 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1075 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1076 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1077 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1078 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1079 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1080 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1081 // CHECK1: cond.true: 1082 // CHECK1-NEXT: br label [[COND_END:%.*]] 1083 // CHECK1: cond.false: 1084 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1085 // CHECK1-NEXT: br label [[COND_END]] 1086 // CHECK1: cond.end: 1087 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1088 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1089 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1090 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1091 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1092 // CHECK1: omp.inner.for.cond: 1093 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 1094 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 1095 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1096 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1097 // CHECK1: omp.inner.for.body: 1098 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 1099 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1100 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1101 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 1102 // CHECK1-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]] 1103 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1104 // CHECK1: omp.body.continue: 1105 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1106 // CHECK1: omp.inner.for.inc: 1107 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 1108 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1109 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 1110 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] 1111 // CHECK1: omp.inner.for.end: 1112 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1113 // CHECK1: omp.loop.exit: 1114 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1115 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1116 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1117 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1118 // CHECK1: .omp.final.then: 1119 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1120 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1121 // CHECK1: .omp.final.done: 1122 // CHECK1-NEXT: ret void 1123 // 1124 // 1125 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 1126 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 1127 // CHECK1-NEXT: entry: 1128 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 1129 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1130 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1131 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1132 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1133 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1134 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1135 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1136 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1137 // CHECK1-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1138 // CHECK1-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 1139 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1140 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 1141 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1142 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 1143 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1144 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 1145 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1146 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 1147 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1148 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 1149 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1150 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 1151 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1152 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 1153 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1154 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 1155 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1156 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 1157 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1158 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 1159 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1160 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1161 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1162 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1163 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1164 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 1165 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS]]) 1166 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1167 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1168 // CHECK1: omp_offload.failed: 1169 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]] 1170 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1171 // CHECK1: omp_offload.cont: 1172 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]] 1173 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 1174 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 1175 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 1176 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 1177 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1178 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 1179 // CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 1180 // CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 1181 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 1182 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1183 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP18]], align 8 1184 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1185 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 1186 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1187 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 1188 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1189 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1190 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1191 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1 1192 // CHECK1-NEXT: [[TMP24:%.*]] = select i1 [[LOADEDV2]], i32 0, i32 1 1193 // CHECK1-NEXT: [[TMP25:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 1194 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 0 1195 // CHECK1-NEXT: store i32 3, ptr [[TMP26]], align 4 1196 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 1 1197 // CHECK1-NEXT: store i32 1, ptr [[TMP27]], align 4 1198 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 2 1199 // CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP28]], align 8 1200 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 3 1201 // CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 1202 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 4 1203 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP30]], align 8 1204 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 5 1205 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP31]], align 8 1206 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 6 1207 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 1208 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 7 1209 // CHECK1-NEXT: store ptr null, ptr [[TMP33]], align 8 1210 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 8 1211 // CHECK1-NEXT: store i64 100, ptr [[TMP34]], align 8 1212 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 9 1213 // CHECK1-NEXT: store i64 0, ptr [[TMP35]], align 8 1214 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 10 1215 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 1216 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 11 1217 // CHECK1-NEXT: store [3 x i32] [[TMP25]], ptr [[TMP37]], align 4 1218 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 12 1219 // CHECK1-NEXT: store i32 0, ptr [[TMP38]], align 4 1220 // CHECK1-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, ptr [[KERNEL_ARGS4]]) 1221 // CHECK1-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 1222 // CHECK1-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1223 // CHECK1: omp_offload.failed5: 1224 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP17]]) #[[ATTR2]] 1225 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1226 // CHECK1: omp_offload.cont6: 1227 // CHECK1-NEXT: ret i32 0 1228 // 1229 // 1230 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62 1231 // CHECK1-SAME: () #[[ATTR1]] { 1232 // CHECK1-NEXT: entry: 1233 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined) 1234 // CHECK1-NEXT: ret void 1235 // 1236 // 1237 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined 1238 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1239 // CHECK1-NEXT: entry: 1240 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1241 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1242 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1243 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1244 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1245 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1246 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1247 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1248 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1249 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1250 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1251 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1252 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1253 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1254 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1255 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1256 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1257 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1258 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1259 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1260 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1261 // CHECK1: cond.true: 1262 // CHECK1-NEXT: br label [[COND_END:%.*]] 1263 // CHECK1: cond.false: 1264 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1265 // CHECK1-NEXT: br label [[COND_END]] 1266 // CHECK1: cond.end: 1267 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1268 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1269 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1270 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1271 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1272 // CHECK1: omp.inner.for.cond: 1273 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 1274 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 1275 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1276 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1277 // CHECK1: omp.inner.for.body: 1278 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]] 1279 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1280 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 1281 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1282 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP42]] 1283 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1284 // CHECK1: omp.inner.for.inc: 1285 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 1286 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]] 1287 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1288 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 1289 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]] 1290 // CHECK1: omp.inner.for.end: 1291 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1292 // CHECK1: omp.loop.exit: 1293 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1294 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1295 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1296 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1297 // CHECK1: .omp.final.then: 1298 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1299 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1300 // CHECK1: .omp.final.done: 1301 // CHECK1-NEXT: ret void 1302 // 1303 // 1304 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined 1305 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1306 // CHECK1-NEXT: entry: 1307 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1308 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1309 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1310 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1311 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1312 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1313 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1314 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1315 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1316 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1317 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1318 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1319 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1320 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1321 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1322 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1323 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1324 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1325 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1326 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1327 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1328 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1329 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1330 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1331 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1332 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1333 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1334 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1335 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1336 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1337 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1338 // CHECK1: cond.true: 1339 // CHECK1-NEXT: br label [[COND_END:%.*]] 1340 // CHECK1: cond.false: 1341 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1342 // CHECK1-NEXT: br label [[COND_END]] 1343 // CHECK1: cond.end: 1344 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1345 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1346 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1347 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1348 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1349 // CHECK1: omp.inner.for.cond: 1350 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]] 1351 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]] 1352 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1353 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1354 // CHECK1: omp.inner.for.body: 1355 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 1356 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1357 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1358 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP45]] 1359 // CHECK1-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP45]] 1360 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1361 // CHECK1: omp.body.continue: 1362 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1363 // CHECK1: omp.inner.for.inc: 1364 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 1365 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1366 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 1367 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]] 1368 // CHECK1: omp.inner.for.end: 1369 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1370 // CHECK1: omp.loop.exit: 1371 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1372 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1373 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1374 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1375 // CHECK1: .omp.final.then: 1376 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1377 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1378 // CHECK1: .omp.final.done: 1379 // CHECK1-NEXT: ret void 1380 // 1381 // 1382 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66 1383 // CHECK1-SAME: () #[[ATTR1]] { 1384 // CHECK1-NEXT: entry: 1385 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined) 1386 // CHECK1-NEXT: ret void 1387 // 1388 // 1389 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined 1390 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1391 // CHECK1-NEXT: entry: 1392 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1393 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1394 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1395 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1396 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1397 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1398 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1399 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1400 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1401 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1402 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1403 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1404 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1405 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1406 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1407 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1408 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1409 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1410 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1411 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1412 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1413 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1414 // CHECK1: cond.true: 1415 // CHECK1-NEXT: br label [[COND_END:%.*]] 1416 // CHECK1: cond.false: 1417 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1418 // CHECK1-NEXT: br label [[COND_END]] 1419 // CHECK1: cond.end: 1420 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1421 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1422 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1423 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1424 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1425 // CHECK1: omp.inner.for.cond: 1426 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48:![0-9]+]] 1427 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]] 1428 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1429 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1430 // CHECK1: omp.inner.for.body: 1431 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP48]] 1432 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1433 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]] 1434 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1435 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]] 1436 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP48]] 1437 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP48]] 1438 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP48]] 1439 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]] 1440 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1441 // CHECK1: omp.inner.for.inc: 1442 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 1443 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP48]] 1444 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1445 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 1446 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]] 1447 // CHECK1: omp.inner.for.end: 1448 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1449 // CHECK1: omp.loop.exit: 1450 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1451 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1452 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1453 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1454 // CHECK1: .omp.final.then: 1455 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1456 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1457 // CHECK1: .omp.final.done: 1458 // CHECK1-NEXT: ret void 1459 // 1460 // 1461 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined 1462 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1463 // CHECK1-NEXT: entry: 1464 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1465 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1466 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1467 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1468 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1469 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1470 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1471 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1472 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1473 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1474 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1475 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1476 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1477 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1478 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1479 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1480 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1481 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1482 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1483 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1484 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1485 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1486 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1487 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1488 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1489 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1490 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1491 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1492 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1493 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1494 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1495 // CHECK1: cond.true: 1496 // CHECK1-NEXT: br label [[COND_END:%.*]] 1497 // CHECK1: cond.false: 1498 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1499 // CHECK1-NEXT: br label [[COND_END]] 1500 // CHECK1: cond.end: 1501 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1502 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1503 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1504 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1505 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1506 // CHECK1: omp.inner.for.cond: 1507 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51:![0-9]+]] 1508 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP51]] 1509 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1510 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1511 // CHECK1: omp.inner.for.body: 1512 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 1513 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1514 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1515 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP51]] 1516 // CHECK1-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP51]] 1517 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1518 // CHECK1: omp.body.continue: 1519 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1520 // CHECK1: omp.inner.for.inc: 1521 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 1522 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1523 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 1524 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]] 1525 // CHECK1: omp.inner.for.end: 1526 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1527 // CHECK1: omp.loop.exit: 1528 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1529 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1530 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1531 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1532 // CHECK1: .omp.final.then: 1533 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1534 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1535 // CHECK1: .omp.final.done: 1536 // CHECK1-NEXT: ret void 1537 // 1538 // 1539 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70 1540 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1541 // CHECK1-NEXT: entry: 1542 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1543 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1544 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1545 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1546 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 1547 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 1548 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 1549 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 1550 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined, i64 [[TMP1]]) 1551 // CHECK1-NEXT: ret void 1552 // 1553 // 1554 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined 1555 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1556 // CHECK1-NEXT: entry: 1557 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1558 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1559 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1560 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1561 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1562 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1563 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1564 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1565 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1566 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1567 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1568 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1569 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1570 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1571 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1572 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1573 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1574 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1575 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1576 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1577 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1578 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1579 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1580 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1581 // CHECK1: cond.true: 1582 // CHECK1-NEXT: br label [[COND_END:%.*]] 1583 // CHECK1: cond.false: 1584 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1585 // CHECK1-NEXT: br label [[COND_END]] 1586 // CHECK1: cond.end: 1587 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1588 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1589 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1590 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1591 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1592 // CHECK1: omp.inner.for.cond: 1593 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]] 1594 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 1595 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1596 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1597 // CHECK1: omp.inner.for.body: 1598 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]] 1599 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1600 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 1601 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1602 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP54]] 1603 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 1604 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1605 // CHECK1: omp_if.then: 1606 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]] 1607 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1608 // CHECK1: omp_if.else: 1609 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 1610 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]] 1611 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]] 1612 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]] 1613 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 1614 // CHECK1-NEXT: br label [[OMP_IF_END]] 1615 // CHECK1: omp_if.end: 1616 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1617 // CHECK1: omp.inner.for.inc: 1618 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 1619 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]] 1620 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1621 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 1622 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]] 1623 // CHECK1: omp.inner.for.end: 1624 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1625 // CHECK1: omp.loop.exit: 1626 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1627 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1628 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1629 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1630 // CHECK1: .omp.final.then: 1631 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1632 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1633 // CHECK1: .omp.final.done: 1634 // CHECK1-NEXT: ret void 1635 // 1636 // 1637 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined 1638 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1639 // CHECK1-NEXT: entry: 1640 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1641 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1642 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1643 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1644 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1645 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1646 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1647 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1648 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1649 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1650 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1651 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1652 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1653 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1654 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1655 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1656 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1657 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1658 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1659 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1660 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1661 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1662 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1663 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1664 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1665 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1666 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1667 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1668 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1669 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1670 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1671 // CHECK1: cond.true: 1672 // CHECK1-NEXT: br label [[COND_END:%.*]] 1673 // CHECK1: cond.false: 1674 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1675 // CHECK1-NEXT: br label [[COND_END]] 1676 // CHECK1: cond.end: 1677 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1678 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1679 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1680 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1681 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1682 // CHECK1: omp.inner.for.cond: 1683 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]] 1684 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]] 1685 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1686 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1687 // CHECK1: omp.inner.for.body: 1688 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 1689 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1690 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1691 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP57]] 1692 // CHECK1-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]] 1693 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1694 // CHECK1: omp.body.continue: 1695 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1696 // CHECK1: omp.inner.for.inc: 1697 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 1698 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1699 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 1700 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]] 1701 // CHECK1: omp.inner.for.end: 1702 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1703 // CHECK1: omp.loop.exit: 1704 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1705 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1706 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1707 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1708 // CHECK1: .omp.final.then: 1709 // CHECK1-NEXT: store i32 100, ptr [[I]], align 4 1710 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1711 // CHECK1: .omp.final.done: 1712 // CHECK1-NEXT: ret void 1713 // 1714 // 1715 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv 1716 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1717 // CHECK3-NEXT: entry: 1718 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1719 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1720 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1721 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1722 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1723 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1724 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1725 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1726 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr @Arg, align 4 1727 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 1728 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 1729 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1730 // CHECK3-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 1731 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1732 // CHECK3-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 1733 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1734 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 8 1735 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1736 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1737 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1738 // CHECK3-NEXT: store i32 3, ptr [[TMP7]], align 4 1739 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1740 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 1741 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1742 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 1743 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1744 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 1745 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1746 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8 1747 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1748 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8 1749 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1750 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 8 1751 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1752 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 8 1753 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1754 // CHECK3-NEXT: store i64 100, ptr [[TMP15]], align 8 1755 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1756 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8 1757 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1758 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 1759 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1760 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 1761 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1762 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4 1763 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, ptr [[KERNEL_ARGS]]) 1764 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1765 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1766 // CHECK3: omp_offload.failed: 1767 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 1768 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1769 // CHECK3: omp_offload.cont: 1770 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 1771 // CHECK3-NEXT: store i32 3, ptr [[TMP22]], align 4 1772 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 1773 // CHECK3-NEXT: store i32 0, ptr [[TMP23]], align 4 1774 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 1775 // CHECK3-NEXT: store ptr null, ptr [[TMP24]], align 8 1776 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 1777 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 8 1778 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 1779 // CHECK3-NEXT: store ptr null, ptr [[TMP26]], align 8 1780 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 1781 // CHECK3-NEXT: store ptr null, ptr [[TMP27]], align 8 1782 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 1783 // CHECK3-NEXT: store ptr null, ptr [[TMP28]], align 8 1784 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 1785 // CHECK3-NEXT: store ptr null, ptr [[TMP29]], align 8 1786 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 1787 // CHECK3-NEXT: store i64 100, ptr [[TMP30]], align 8 1788 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 1789 // CHECK3-NEXT: store i64 0, ptr [[TMP31]], align 8 1790 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 1791 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4 1792 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 1793 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4 1794 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 1795 // CHECK3-NEXT: store i32 0, ptr [[TMP34]], align 4 1796 // CHECK3-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, ptr [[KERNEL_ARGS2]]) 1797 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1798 // CHECK3-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1799 // CHECK3: omp_offload.failed3: 1800 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]] 1801 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1802 // CHECK3: omp_offload.cont4: 1803 // CHECK3-NEXT: ret void 1804 // 1805 // 1806 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45 1807 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { 1808 // CHECK3-NEXT: entry: 1809 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1810 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1811 // CHECK3-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 1812 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 1813 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 1814 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 1815 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined, i64 [[TMP1]]) 1816 // CHECK3-NEXT: ret void 1817 // 1818 // 1819 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined 1820 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1821 // CHECK3-NEXT: entry: 1822 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1823 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1824 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1825 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1826 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1827 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1828 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1829 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1830 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1831 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1832 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1833 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1834 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1835 // CHECK3-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 1836 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1837 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1838 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1839 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1840 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1841 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1842 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1843 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1844 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1845 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1846 // CHECK3: cond.true: 1847 // CHECK3-NEXT: br label [[COND_END:%.*]] 1848 // CHECK3: cond.false: 1849 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1850 // CHECK3-NEXT: br label [[COND_END]] 1851 // CHECK3: cond.end: 1852 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1853 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1854 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1855 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1856 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1857 // CHECK3: omp.inner.for.cond: 1858 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 1859 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 1860 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1861 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1862 // CHECK3: omp.inner.for.body: 1863 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 1864 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1865 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 1866 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1867 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !nontemporal [[META10:![0-9]+]], !llvm.access.group [[ACC_GRP9]] 1868 // CHECK3-NEXT: store i32 [[TMP11]], ptr [[ARG_CASTED]], align 4, !llvm.access.group [[ACC_GRP9]] 1869 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, ptr [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]] 1870 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]] 1871 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1872 // CHECK3: omp.inner.for.inc: 1873 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1874 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 1875 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1876 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1877 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 1878 // CHECK3: omp.inner.for.end: 1879 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1880 // CHECK3: omp.loop.exit: 1881 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1882 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1883 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1884 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1885 // CHECK3: .omp.final.then: 1886 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 1887 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1888 // CHECK3: .omp.final.done: 1889 // CHECK3-NEXT: ret void 1890 // 1891 // 1892 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined.omp_outlined 1893 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1894 // CHECK3-NEXT: entry: 1895 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1896 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1897 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1898 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1899 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1900 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1901 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1902 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1903 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1904 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1905 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1906 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1907 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1908 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1909 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1910 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1911 // CHECK3-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 1912 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1913 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1914 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1915 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1916 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1917 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1918 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1919 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1920 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1921 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1922 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1923 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1924 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1925 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1926 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1927 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1928 // CHECK3: cond.true: 1929 // CHECK3-NEXT: br label [[COND_END:%.*]] 1930 // CHECK3: cond.false: 1931 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1932 // CHECK3-NEXT: br label [[COND_END]] 1933 // CHECK3: cond.end: 1934 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1935 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1936 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1937 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1938 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1939 // CHECK3: omp.inner.for.cond: 1940 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 1941 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 1942 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1943 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1944 // CHECK3: omp.inner.for.body: 1945 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1946 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1947 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1948 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]] 1949 // CHECK3-NEXT: store i32 0, ptr [[ARG_ADDR]], align 4, !nontemporal [[META10]], !llvm.access.group [[ACC_GRP14]] 1950 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1951 // CHECK3: omp.body.continue: 1952 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1953 // CHECK3: omp.inner.for.inc: 1954 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1955 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1956 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1957 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1958 // CHECK3: omp.inner.for.end: 1959 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1960 // CHECK3: omp.loop.exit: 1961 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1962 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1963 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1964 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1965 // CHECK3: .omp.final.then: 1966 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 1967 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1968 // CHECK3: .omp.final.done: 1969 // CHECK3-NEXT: ret void 1970 // 1971 // 1972 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53 1973 // CHECK3-SAME: () #[[ATTR1]] { 1974 // CHECK3-NEXT: entry: 1975 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined) 1976 // CHECK3-NEXT: ret void 1977 // 1978 // 1979 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined 1980 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1981 // CHECK3-NEXT: entry: 1982 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1983 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1984 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1985 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1986 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1987 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1988 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1989 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1990 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1991 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1992 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1993 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1994 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1995 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1996 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1997 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1998 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1999 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2000 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2001 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2002 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2003 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2004 // CHECK3: cond.true: 2005 // CHECK3-NEXT: br label [[COND_END:%.*]] 2006 // CHECK3: cond.false: 2007 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2008 // CHECK3-NEXT: br label [[COND_END]] 2009 // CHECK3: cond.end: 2010 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2011 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2012 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2013 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2014 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2015 // CHECK3: omp.inner.for.cond: 2016 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 2017 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 2018 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2019 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2020 // CHECK3: omp.inner.for.body: 2021 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]] 2022 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2023 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 2024 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2025 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]] 2026 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP19]] 2027 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP19]] 2028 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP19]] 2029 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]] 2030 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2031 // CHECK3: omp.inner.for.inc: 2032 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 2033 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]] 2034 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2035 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 2036 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 2037 // CHECK3: omp.inner.for.end: 2038 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2039 // CHECK3: omp.loop.exit: 2040 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 2041 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2042 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2043 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2044 // CHECK3: .omp.final.then: 2045 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2046 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2047 // CHECK3: .omp.final.done: 2048 // CHECK3-NEXT: ret void 2049 // 2050 // 2051 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined 2052 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2053 // CHECK3-NEXT: entry: 2054 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2055 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2056 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2057 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2058 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2059 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2060 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2061 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2062 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2063 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2064 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2065 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2066 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2067 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2068 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2069 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2070 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 2071 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2072 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2073 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2074 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2075 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2076 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2077 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2078 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2079 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2080 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2081 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2082 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2083 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2084 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2085 // CHECK3: cond.true: 2086 // CHECK3-NEXT: br label [[COND_END:%.*]] 2087 // CHECK3: cond.false: 2088 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2089 // CHECK3-NEXT: br label [[COND_END]] 2090 // CHECK3: cond.end: 2091 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2092 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2093 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2094 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2095 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2096 // CHECK3: omp.inner.for.cond: 2097 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 2098 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 2099 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2100 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2101 // CHECK3: omp.inner.for.body: 2102 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 2103 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2104 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2105 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 2106 // CHECK3-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP22]] 2107 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2108 // CHECK3: omp.body.continue: 2109 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2110 // CHECK3: omp.inner.for.inc: 2111 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 2112 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2113 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 2114 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 2115 // CHECK3: omp.inner.for.end: 2116 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2117 // CHECK3: omp.loop.exit: 2118 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 2119 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2120 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2121 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2122 // CHECK3: .omp.final.then: 2123 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2124 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2125 // CHECK3: .omp.final.done: 2126 // CHECK3-NEXT: ret void 2127 // 2128 // 2129 // CHECK3-LABEL: define {{[^@]+}}@main 2130 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 2131 // CHECK3-NEXT: entry: 2132 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2133 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2134 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2135 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2136 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2137 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 2138 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 2139 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 2140 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2141 // CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2142 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 2143 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2144 // CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 4 2145 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2146 // CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 4 2147 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2148 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 8 2149 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2150 // CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 8 2151 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2152 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 8 2153 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2154 // CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 8 2155 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2156 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 8 2157 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2158 // CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 8 2159 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2160 // CHECK3-NEXT: store i64 100, ptr [[TMP8]], align 8 2161 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2162 // CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 8 2163 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2164 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 2165 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2166 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 2167 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2168 // CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 4 2169 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, ptr [[KERNEL_ARGS]]) 2170 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2171 // CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2172 // CHECK3: omp_offload.failed: 2173 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]] 2174 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 2175 // CHECK3: omp_offload.cont: 2176 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 2177 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 4 2178 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 2179 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 2180 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 2181 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 2182 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 2183 // CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 2184 // CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 2185 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 2186 // CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 2187 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP18]] to i1 2188 // CHECK3-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2189 // CHECK3: omp_if.then: 2190 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2191 // CHECK3-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 2192 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2193 // CHECK3-NEXT: store i64 [[TMP17]], ptr [[TMP20]], align 8 2194 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2195 // CHECK3-NEXT: store ptr null, ptr [[TMP21]], align 8 2196 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2197 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2198 // CHECK3-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 2199 // CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP24]] to i1 2200 // CHECK3-NEXT: [[TMP25:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 2201 // CHECK3-NEXT: [[TMP26:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP25]], 0 2202 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 2203 // CHECK3-NEXT: store i32 3, ptr [[TMP27]], align 4 2204 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 2205 // CHECK3-NEXT: store i32 1, ptr [[TMP28]], align 4 2206 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 2207 // CHECK3-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 2208 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 2209 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP30]], align 8 2210 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 2211 // CHECK3-NEXT: store ptr @.offload_sizes.2, ptr [[TMP31]], align 8 2212 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 2213 // CHECK3-NEXT: store ptr @.offload_maptypes.3, ptr [[TMP32]], align 8 2214 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 2215 // CHECK3-NEXT: store ptr null, ptr [[TMP33]], align 8 2216 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 2217 // CHECK3-NEXT: store ptr null, ptr [[TMP34]], align 8 2218 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 2219 // CHECK3-NEXT: store i64 100, ptr [[TMP35]], align 8 2220 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 2221 // CHECK3-NEXT: store i64 0, ptr [[TMP36]], align 8 2222 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 2223 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP37]], align 4 2224 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 2225 // CHECK3-NEXT: store [3 x i32] [[TMP26]], ptr [[TMP38]], align 4 2226 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 2227 // CHECK3-NEXT: store i32 0, ptr [[TMP39]], align 4 2228 // CHECK3-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP25]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS5]]) 2229 // CHECK3-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 2230 // CHECK3-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 2231 // CHECK3: omp_offload.failed6: 2232 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 2233 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]] 2234 // CHECK3: omp_offload.cont7: 2235 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 2236 // CHECK3: omp_if.else: 2237 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 2238 // CHECK3-NEXT: br label [[OMP_IF_END]] 2239 // CHECK3: omp_if.end: 2240 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, ptr @Arg, align 4 2241 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]]) 2242 // CHECK3-NEXT: ret i32 [[CALL]] 2243 // 2244 // 2245 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78 2246 // CHECK3-SAME: () #[[ATTR1]] { 2247 // CHECK3-NEXT: entry: 2248 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined) 2249 // CHECK3-NEXT: ret void 2250 // 2251 // 2252 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined 2253 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 2254 // CHECK3-NEXT: entry: 2255 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2256 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2257 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2258 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2259 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2260 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2261 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2262 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2263 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2264 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2265 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2266 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2267 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 2268 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2269 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2270 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2271 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2272 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2273 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2274 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2275 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2276 // CHECK3: cond.true: 2277 // CHECK3-NEXT: br label [[COND_END:%.*]] 2278 // CHECK3: cond.false: 2279 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2280 // CHECK3-NEXT: br label [[COND_END]] 2281 // CHECK3: cond.end: 2282 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2283 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2284 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2285 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2286 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2287 // CHECK3: omp.inner.for.cond: 2288 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 2289 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 2290 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2291 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2292 // CHECK3: omp.inner.for.body: 2293 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 2294 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2295 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 2296 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2297 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP25]] 2298 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2299 // CHECK3: omp.inner.for.inc: 2300 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 2301 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 2302 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2303 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 2304 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 2305 // CHECK3: omp.inner.for.end: 2306 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2307 // CHECK3: omp.loop.exit: 2308 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 2309 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2310 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2311 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2312 // CHECK3: .omp.final.then: 2313 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2314 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2315 // CHECK3: .omp.final.done: 2316 // CHECK3-NEXT: ret void 2317 // 2318 // 2319 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined 2320 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2321 // CHECK3-NEXT: entry: 2322 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2323 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2324 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2325 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2326 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2327 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2328 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2329 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2330 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2331 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2332 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2333 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2334 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2335 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2336 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2337 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2338 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 2339 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2340 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2341 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2342 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2343 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2344 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2345 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2346 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2347 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2348 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2349 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2350 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2351 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2352 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2353 // CHECK3: cond.true: 2354 // CHECK3-NEXT: br label [[COND_END:%.*]] 2355 // CHECK3: cond.false: 2356 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2357 // CHECK3-NEXT: br label [[COND_END]] 2358 // CHECK3: cond.end: 2359 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2360 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2361 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2362 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2363 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2364 // CHECK3: omp.inner.for.cond: 2365 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 2366 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 2367 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2368 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2369 // CHECK3: omp.inner.for.body: 2370 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 2371 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2372 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2373 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]] 2374 // CHECK3-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP28]] 2375 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2376 // CHECK3: omp.body.continue: 2377 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2378 // CHECK3: omp.inner.for.inc: 2379 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 2380 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2381 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 2382 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 2383 // CHECK3: omp.inner.for.end: 2384 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2385 // CHECK3: omp.loop.exit: 2386 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 2387 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2388 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2389 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2390 // CHECK3: .omp.final.then: 2391 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2392 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2393 // CHECK3: .omp.final.done: 2394 // CHECK3-NEXT: ret void 2395 // 2396 // 2397 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 2398 // CHECK3-SAME: () #[[ATTR1]] { 2399 // CHECK3-NEXT: entry: 2400 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined) 2401 // CHECK3-NEXT: ret void 2402 // 2403 // 2404 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined 2405 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 2406 // CHECK3-NEXT: entry: 2407 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2408 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2409 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2410 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2411 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2412 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2413 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2414 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2415 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2416 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 2417 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2418 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2419 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2420 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 2421 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2422 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2423 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2424 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2425 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2426 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2427 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2428 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2429 // CHECK3: cond.true: 2430 // CHECK3-NEXT: br label [[COND_END:%.*]] 2431 // CHECK3: cond.false: 2432 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2433 // CHECK3-NEXT: br label [[COND_END]] 2434 // CHECK3: cond.end: 2435 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2436 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2437 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2438 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2439 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2440 // CHECK3: omp.inner.for.cond: 2441 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2442 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2443 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2444 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2445 // CHECK3: omp.inner.for.body: 2446 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2447 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2448 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2449 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2450 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 2451 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2452 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 2453 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 2454 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 2455 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2456 // CHECK3: omp.inner.for.inc: 2457 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2458 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2459 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2460 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2461 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 2462 // CHECK3: omp.inner.for.end: 2463 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2464 // CHECK3: omp.loop.exit: 2465 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 2466 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2467 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2468 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2469 // CHECK3: .omp.final.then: 2470 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2471 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2472 // CHECK3: .omp.final.done: 2473 // CHECK3-NEXT: ret void 2474 // 2475 // 2476 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined 2477 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 2478 // CHECK3-NEXT: entry: 2479 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2480 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2481 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2482 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2483 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2484 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2485 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2486 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2487 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2488 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2489 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2490 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2491 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2492 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2493 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2494 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2495 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 2496 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2497 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2498 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2499 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2500 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2501 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2502 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2503 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2504 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2505 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2506 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2507 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2508 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2509 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2510 // CHECK3: cond.true: 2511 // CHECK3-NEXT: br label [[COND_END:%.*]] 2512 // CHECK3: cond.false: 2513 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2514 // CHECK3-NEXT: br label [[COND_END]] 2515 // CHECK3: cond.end: 2516 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2517 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2518 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2519 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2520 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2521 // CHECK3: omp.inner.for.cond: 2522 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2523 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2524 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2525 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2526 // CHECK3: omp.inner.for.body: 2527 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2528 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2529 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2530 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2531 // CHECK3-NEXT: call void @_Z3fn5v() 2532 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2533 // CHECK3: omp.body.continue: 2534 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2535 // CHECK3: omp.inner.for.inc: 2536 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2537 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2538 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 2539 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 2540 // CHECK3: omp.inner.for.end: 2541 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2542 // CHECK3: omp.loop.exit: 2543 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 2544 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2545 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2546 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2547 // CHECK3: .omp.final.then: 2548 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2549 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2550 // CHECK3: .omp.final.done: 2551 // CHECK3-NEXT: ret void 2552 // 2553 // 2554 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92 2555 // CHECK3-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 2556 // CHECK3-NEXT: entry: 2557 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2558 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2559 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2560 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 2561 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 2562 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 2563 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 2564 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 2565 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP1]]) 2566 // CHECK3-NEXT: ret void 2567 // 2568 // 2569 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined 2570 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 2571 // CHECK3-NEXT: entry: 2572 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2573 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2574 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2575 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2576 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2577 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2578 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2579 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2580 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2581 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2582 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2583 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 2584 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8 2585 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR15:%.*]] = alloca i32, align 4 2586 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2587 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2588 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2589 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2590 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 2591 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2592 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2593 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2594 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2595 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2596 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2597 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2598 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2599 // CHECK3: cond.true: 2600 // CHECK3-NEXT: br label [[COND_END:%.*]] 2601 // CHECK3: cond.false: 2602 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2603 // CHECK3-NEXT: br label [[COND_END]] 2604 // CHECK3: cond.end: 2605 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2606 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2607 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2608 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2609 // CHECK3-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 2610 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1 2611 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]] 2612 // CHECK3: omp_if.then: 2613 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2614 // CHECK3: omp.inner.for.cond: 2615 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 2616 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 2617 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2618 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2619 // CHECK3: omp.inner.for.body: 2620 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP34]] 2621 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2622 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 2623 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2624 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP34]] 2625 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1 2626 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8 2627 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP34]] 2628 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP34]] 2629 // CHECK3-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP34]] 2630 // CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1 2631 // CHECK3-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]] 2632 // CHECK3: omp_if.then4: 2633 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP34]] 2634 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 2635 // CHECK3: omp_if.else: 2636 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]] 2637 // CHECK3-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP34]] 2638 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP34]] 2639 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP15]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP34]] 2640 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]] 2641 // CHECK3-NEXT: br label [[OMP_IF_END]] 2642 // CHECK3: omp_if.end: 2643 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2644 // CHECK3: omp.inner.for.inc: 2645 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 2646 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP34]] 2647 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 2648 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 2649 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] 2650 // CHECK3: omp.inner.for.end: 2651 // CHECK3-NEXT: br label [[OMP_IF_END20:%.*]] 2652 // CHECK3: omp_if.else5: 2653 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND6:%.*]] 2654 // CHECK3: omp.inner.for.cond6: 2655 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2656 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2657 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 2658 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY8:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 2659 // CHECK3: omp.inner.for.body8: 2660 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2661 // CHECK3-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64 2662 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2663 // CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64 2664 // CHECK3-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 2665 // CHECK3-NEXT: [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1 2666 // CHECK3-NEXT: [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8 2667 // CHECK3-NEXT: store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1 2668 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8 2669 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 2670 // CHECK3-NEXT: [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1 2671 // CHECK3-NEXT: br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]] 2672 // CHECK3: omp_if.then13: 2673 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) 2674 // CHECK3-NEXT: br label [[OMP_IF_END16:%.*]] 2675 // CHECK3: omp_if.else14: 2676 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 2677 // CHECK3-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2678 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR15]], align 4 2679 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1(ptr [[TMP27]], ptr [[DOTBOUND_ZERO_ADDR15]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]] 2680 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 2681 // CHECK3-NEXT: br label [[OMP_IF_END16]] 2682 // CHECK3: omp_if.end16: 2683 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 2684 // CHECK3: omp.inner.for.inc17: 2685 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2686 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2687 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 2688 // CHECK3-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV]], align 4 2689 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND6]], !llvm.loop [[LOOP37:![0-9]+]] 2690 // CHECK3: omp.inner.for.end19: 2691 // CHECK3-NEXT: br label [[OMP_IF_END20]] 2692 // CHECK3: omp_if.end20: 2693 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2694 // CHECK3: omp.loop.exit: 2695 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 2696 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2697 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2698 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2699 // CHECK3: .omp.final.then: 2700 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2701 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2702 // CHECK3: .omp.final.done: 2703 // CHECK3-NEXT: ret void 2704 // 2705 // 2706 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined 2707 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 2708 // CHECK3-NEXT: entry: 2709 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2710 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2711 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2712 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2713 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2714 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2715 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2716 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2717 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2718 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2719 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2720 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2721 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2722 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2723 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2724 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2725 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2726 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2727 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 2728 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2729 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2730 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2731 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2732 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2733 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2734 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2735 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2736 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 2737 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 2738 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2739 // CHECK3: omp_if.then: 2740 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2741 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2742 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2743 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2744 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99 2745 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2746 // CHECK3: cond.true: 2747 // CHECK3-NEXT: br label [[COND_END:%.*]] 2748 // CHECK3: cond.false: 2749 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2750 // CHECK3-NEXT: br label [[COND_END]] 2751 // CHECK3: cond.end: 2752 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2753 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2754 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2755 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2756 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2757 // CHECK3: omp.inner.for.cond: 2758 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 2759 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 2760 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2761 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2762 // CHECK3: omp.inner.for.body: 2763 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 2764 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2765 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2766 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP38]] 2767 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP38]] 2768 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2769 // CHECK3: omp.body.continue: 2770 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2771 // CHECK3: omp.inner.for.inc: 2772 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 2773 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 2774 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 2775 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 2776 // CHECK3: omp.inner.for.end: 2777 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 2778 // CHECK3: omp_if.else: 2779 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2780 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 2781 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2782 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2783 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99 2784 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 2785 // CHECK3: cond.true5: 2786 // CHECK3-NEXT: br label [[COND_END7:%.*]] 2787 // CHECK3: cond.false6: 2788 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2789 // CHECK3-NEXT: br label [[COND_END7]] 2790 // CHECK3: cond.end7: 2791 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ] 2792 // CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4 2793 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2794 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 2795 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]] 2796 // CHECK3: omp.inner.for.cond9: 2797 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2798 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2799 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2800 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 2801 // CHECK3: omp.inner.for.body11: 2802 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2803 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1 2804 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 2805 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I]], align 4 2806 // CHECK3-NEXT: call void @_Z3fn6v() 2807 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 2808 // CHECK3: omp.body.continue14: 2809 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 2810 // CHECK3: omp.inner.for.inc15: 2811 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2812 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1 2813 // CHECK3-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4 2814 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP41:![0-9]+]] 2815 // CHECK3: omp.inner.for.end17: 2816 // CHECK3-NEXT: br label [[OMP_IF_END]] 2817 // CHECK3: omp_if.end: 2818 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2819 // CHECK3: omp.loop.exit: 2820 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2821 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2822 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2823 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2824 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2825 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2826 // CHECK3: .omp.final.then: 2827 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2828 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2829 // CHECK3: .omp.final.done: 2830 // CHECK3-NEXT: ret void 2831 // 2832 // 2833 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1 2834 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 2835 // CHECK3-NEXT: entry: 2836 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2837 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2838 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2839 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2840 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2841 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2842 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2843 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2844 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2845 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2846 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2847 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2848 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2849 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2850 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2851 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2852 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2853 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2854 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 2855 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2856 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2857 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2858 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2859 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2860 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2861 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2862 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2863 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 2864 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 2865 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2866 // CHECK3: omp_if.then: 2867 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2868 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2869 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2870 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2871 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99 2872 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2873 // CHECK3: cond.true: 2874 // CHECK3-NEXT: br label [[COND_END:%.*]] 2875 // CHECK3: cond.false: 2876 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2877 // CHECK3-NEXT: br label [[COND_END]] 2878 // CHECK3: cond.end: 2879 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2880 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2881 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2882 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2883 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2884 // CHECK3: omp.inner.for.cond: 2885 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 2886 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 2887 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2888 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2889 // CHECK3: omp.inner.for.body: 2890 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 2891 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2892 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2893 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP42]] 2894 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP42]] 2895 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2896 // CHECK3: omp.body.continue: 2897 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2898 // CHECK3: omp.inner.for.inc: 2899 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 2900 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 2901 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 2902 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]] 2903 // CHECK3: omp.inner.for.end: 2904 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 2905 // CHECK3: omp_if.else: 2906 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2907 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 2908 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2909 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2910 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99 2911 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 2912 // CHECK3: cond.true5: 2913 // CHECK3-NEXT: br label [[COND_END7:%.*]] 2914 // CHECK3: cond.false6: 2915 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2916 // CHECK3-NEXT: br label [[COND_END7]] 2917 // CHECK3: cond.end7: 2918 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ] 2919 // CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4 2920 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2921 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 2922 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]] 2923 // CHECK3: omp.inner.for.cond9: 2924 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2925 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2926 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2927 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 2928 // CHECK3: omp.inner.for.body11: 2929 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2930 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1 2931 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 2932 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I]], align 4 2933 // CHECK3-NEXT: call void @_Z3fn6v() 2934 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 2935 // CHECK3: omp.body.continue14: 2936 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 2937 // CHECK3: omp.inner.for.inc15: 2938 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2939 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1 2940 // CHECK3-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4 2941 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP45:![0-9]+]] 2942 // CHECK3: omp.inner.for.end17: 2943 // CHECK3-NEXT: br label [[OMP_IF_END]] 2944 // CHECK3: omp_if.end: 2945 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2946 // CHECK3: omp.loop.exit: 2947 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2948 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2949 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2950 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2951 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2952 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2953 // CHECK3: .omp.final.then: 2954 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 2955 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2956 // CHECK3: .omp.final.done: 2957 // CHECK3-NEXT: ret void 2958 // 2959 // 2960 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 2961 // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 2962 // CHECK3-NEXT: entry: 2963 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 2964 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2965 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2966 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2967 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2968 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 2969 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 2970 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 2971 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2972 // CHECK3-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2973 // CHECK3-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 2974 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2975 // CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 4 2976 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2977 // CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 4 2978 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2979 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 8 2980 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2981 // CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 8 2982 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2983 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 8 2984 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2985 // CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 8 2986 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2987 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 8 2988 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2989 // CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 8 2990 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2991 // CHECK3-NEXT: store i64 100, ptr [[TMP8]], align 8 2992 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2993 // CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 8 2994 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2995 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 2996 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2997 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 2998 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2999 // CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 4 3000 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS]]) 3001 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3002 // CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3003 // CHECK3: omp_offload.failed: 3004 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]] 3005 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 3006 // CHECK3: omp_offload.cont: 3007 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]] 3008 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 3009 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 3010 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 3011 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 3012 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 3013 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 3014 // CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 3015 // CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 3016 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 3017 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3018 // CHECK3-NEXT: store i64 [[TMP17]], ptr [[TMP18]], align 8 3019 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3020 // CHECK3-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 3021 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3022 // CHECK3-NEXT: store ptr null, ptr [[TMP20]], align 8 3023 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3024 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3025 // CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 3026 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1 3027 // CHECK3-NEXT: [[TMP24:%.*]] = select i1 [[LOADEDV2]], i32 0, i32 1 3028 // CHECK3-NEXT: [[TMP25:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 3029 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 0 3030 // CHECK3-NEXT: store i32 3, ptr [[TMP26]], align 4 3031 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 1 3032 // CHECK3-NEXT: store i32 1, ptr [[TMP27]], align 4 3033 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 2 3034 // CHECK3-NEXT: store ptr [[TMP21]], ptr [[TMP28]], align 8 3035 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 3 3036 // CHECK3-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 3037 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 4 3038 // CHECK3-NEXT: store ptr @.offload_sizes.4, ptr [[TMP30]], align 8 3039 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 5 3040 // CHECK3-NEXT: store ptr @.offload_maptypes.5, ptr [[TMP31]], align 8 3041 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 6 3042 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 8 3043 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 7 3044 // CHECK3-NEXT: store ptr null, ptr [[TMP33]], align 8 3045 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 8 3046 // CHECK3-NEXT: store i64 100, ptr [[TMP34]], align 8 3047 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 9 3048 // CHECK3-NEXT: store i64 0, ptr [[TMP35]], align 8 3049 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 10 3050 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 3051 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 11 3052 // CHECK3-NEXT: store [3 x i32] [[TMP25]], ptr [[TMP37]], align 4 3053 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 12 3054 // CHECK3-NEXT: store i32 0, ptr [[TMP38]], align 4 3055 // CHECK3-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, ptr [[KERNEL_ARGS4]]) 3056 // CHECK3-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 3057 // CHECK3-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3058 // CHECK3: omp_offload.failed5: 3059 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP17]]) #[[ATTR2]] 3060 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3061 // CHECK3: omp_offload.cont6: 3062 // CHECK3-NEXT: ret i32 0 3063 // 3064 // 3065 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62 3066 // CHECK3-SAME: () #[[ATTR1]] { 3067 // CHECK3-NEXT: entry: 3068 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined) 3069 // CHECK3-NEXT: ret void 3070 // 3071 // 3072 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined 3073 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3074 // CHECK3-NEXT: entry: 3075 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3076 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3077 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3078 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3079 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3080 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3081 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3082 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3083 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3084 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3085 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3086 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3087 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 3088 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3089 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3090 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3091 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 3092 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3093 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3094 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3095 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3096 // CHECK3: cond.true: 3097 // CHECK3-NEXT: br label [[COND_END:%.*]] 3098 // CHECK3: cond.false: 3099 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3100 // CHECK3-NEXT: br label [[COND_END]] 3101 // CHECK3: cond.end: 3102 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3103 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3104 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3105 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 3106 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3107 // CHECK3: omp.inner.for.cond: 3108 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]] 3109 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 3110 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3111 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3112 // CHECK3: omp.inner.for.body: 3113 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP46]] 3114 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3115 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 3116 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3117 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP46]] 3118 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3119 // CHECK3: omp.inner.for.inc: 3120 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 3121 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP46]] 3122 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3123 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 3124 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] 3125 // CHECK3: omp.inner.for.end: 3126 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3127 // CHECK3: omp.loop.exit: 3128 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 3129 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3130 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 3131 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3132 // CHECK3: .omp.final.then: 3133 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 3134 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3135 // CHECK3: .omp.final.done: 3136 // CHECK3-NEXT: ret void 3137 // 3138 // 3139 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined 3140 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3141 // CHECK3-NEXT: entry: 3142 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3143 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3144 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3145 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3146 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3147 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3148 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3149 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3150 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3151 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3152 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3153 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3154 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3155 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3156 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3157 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3158 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3159 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3160 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3161 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3162 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3163 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3164 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3165 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3166 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3167 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3168 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3169 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3170 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3171 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3172 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3173 // CHECK3: cond.true: 3174 // CHECK3-NEXT: br label [[COND_END:%.*]] 3175 // CHECK3: cond.false: 3176 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3177 // CHECK3-NEXT: br label [[COND_END]] 3178 // CHECK3: cond.end: 3179 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3180 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3181 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3182 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3183 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3184 // CHECK3: omp.inner.for.cond: 3185 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]] 3186 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP49]] 3187 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3188 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3189 // CHECK3: omp.inner.for.body: 3190 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 3191 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3192 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3193 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP49]] 3194 // CHECK3-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP49]] 3195 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3196 // CHECK3: omp.body.continue: 3197 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3198 // CHECK3: omp.inner.for.inc: 3199 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 3200 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3201 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 3202 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] 3203 // CHECK3: omp.inner.for.end: 3204 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3205 // CHECK3: omp.loop.exit: 3206 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 3207 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3208 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3209 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3210 // CHECK3: .omp.final.then: 3211 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 3212 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3213 // CHECK3: .omp.final.done: 3214 // CHECK3-NEXT: ret void 3215 // 3216 // 3217 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66 3218 // CHECK3-SAME: () #[[ATTR1]] { 3219 // CHECK3-NEXT: entry: 3220 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined) 3221 // CHECK3-NEXT: ret void 3222 // 3223 // 3224 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined 3225 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 3226 // CHECK3-NEXT: entry: 3227 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3228 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3229 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3230 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3231 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3232 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3233 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3234 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3235 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3236 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 3237 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3238 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3239 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3240 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 3241 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3242 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3243 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3244 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 3245 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3246 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3247 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3248 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3249 // CHECK3: cond.true: 3250 // CHECK3-NEXT: br label [[COND_END:%.*]] 3251 // CHECK3: cond.false: 3252 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3253 // CHECK3-NEXT: br label [[COND_END]] 3254 // CHECK3: cond.end: 3255 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3256 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3257 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3258 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 3259 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3260 // CHECK3: omp.inner.for.cond: 3261 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3262 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3263 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3264 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3265 // CHECK3: omp.inner.for.body: 3266 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3267 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3268 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3269 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3270 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 3271 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3272 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 3273 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 3274 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 3275 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3276 // CHECK3: omp.inner.for.inc: 3277 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3278 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3279 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3280 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3281 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]] 3282 // CHECK3: omp.inner.for.end: 3283 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3284 // CHECK3: omp.loop.exit: 3285 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 3286 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3287 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3288 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3289 // CHECK3: .omp.final.then: 3290 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 3291 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3292 // CHECK3: .omp.final.done: 3293 // CHECK3-NEXT: ret void 3294 // 3295 // 3296 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined 3297 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3298 // CHECK3-NEXT: entry: 3299 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3300 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3301 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3302 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3303 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3304 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3305 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3306 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3307 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3308 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3309 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3310 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3311 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3312 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3313 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3314 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3315 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3316 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3317 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3318 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3319 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3320 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3321 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3322 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3323 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3324 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3325 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3326 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3327 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3328 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3329 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3330 // CHECK3: cond.true: 3331 // CHECK3-NEXT: br label [[COND_END:%.*]] 3332 // CHECK3: cond.false: 3333 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3334 // CHECK3-NEXT: br label [[COND_END]] 3335 // CHECK3: cond.end: 3336 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3337 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3338 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3339 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3340 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3341 // CHECK3: omp.inner.for.cond: 3342 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3343 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3344 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3345 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3346 // CHECK3: omp.inner.for.body: 3347 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3348 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3349 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3350 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3351 // CHECK3-NEXT: call void @_Z3fn2v() 3352 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3353 // CHECK3: omp.body.continue: 3354 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3355 // CHECK3: omp.inner.for.inc: 3356 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3357 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3358 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 3359 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] 3360 // CHECK3: omp.inner.for.end: 3361 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3362 // CHECK3: omp.loop.exit: 3363 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 3364 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3365 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3366 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3367 // CHECK3: .omp.final.then: 3368 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 3369 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3370 // CHECK3: .omp.final.done: 3371 // CHECK3-NEXT: ret void 3372 // 3373 // 3374 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70 3375 // CHECK3-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 3376 // CHECK3-NEXT: entry: 3377 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3378 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3379 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 3380 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 3381 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 3382 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 3383 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 3384 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 3385 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined, i64 [[TMP1]]) 3386 // CHECK3-NEXT: ret void 3387 // 3388 // 3389 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined 3390 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 3391 // CHECK3-NEXT: entry: 3392 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3393 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3394 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3395 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3396 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3397 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3398 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3399 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3400 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3401 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3402 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 3403 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3404 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3405 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 3406 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3407 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 3408 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3409 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3410 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3411 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 3412 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3413 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3414 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3415 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3416 // CHECK3: cond.true: 3417 // CHECK3-NEXT: br label [[COND_END:%.*]] 3418 // CHECK3: cond.false: 3419 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3420 // CHECK3-NEXT: br label [[COND_END]] 3421 // CHECK3: cond.end: 3422 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3423 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3424 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3425 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 3426 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3427 // CHECK3: omp.inner.for.cond: 3428 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]] 3429 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 3430 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3431 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3432 // CHECK3: omp.inner.for.body: 3433 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]] 3434 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3435 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 3436 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3437 // CHECK3-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP54]] 3438 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 3439 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3440 // CHECK3: omp_if.then: 3441 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]] 3442 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 3443 // CHECK3: omp_if.else: 3444 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 3445 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]] 3446 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]] 3447 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]] 3448 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 3449 // CHECK3-NEXT: br label [[OMP_IF_END]] 3450 // CHECK3: omp_if.end: 3451 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3452 // CHECK3: omp.inner.for.inc: 3453 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 3454 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]] 3455 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3456 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 3457 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]] 3458 // CHECK3: omp.inner.for.end: 3459 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3460 // CHECK3: omp.loop.exit: 3461 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 3462 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3463 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 3464 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3465 // CHECK3: .omp.final.then: 3466 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 3467 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3468 // CHECK3: .omp.final.done: 3469 // CHECK3-NEXT: ret void 3470 // 3471 // 3472 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined 3473 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 3474 // CHECK3-NEXT: entry: 3475 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3476 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3477 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3478 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3479 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3480 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3481 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3482 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3483 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3484 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3485 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3486 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3487 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3488 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3489 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3490 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3491 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3492 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3493 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3494 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3495 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3496 // CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3497 // CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3498 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3499 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3500 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3501 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3502 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3503 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3504 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3505 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3506 // CHECK3: cond.true: 3507 // CHECK3-NEXT: br label [[COND_END:%.*]] 3508 // CHECK3: cond.false: 3509 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3510 // CHECK3-NEXT: br label [[COND_END]] 3511 // CHECK3: cond.end: 3512 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3513 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3514 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3515 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3516 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3517 // CHECK3: omp.inner.for.cond: 3518 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]] 3519 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]] 3520 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3521 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3522 // CHECK3: omp.inner.for.body: 3523 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 3524 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3525 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3526 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP57]] 3527 // CHECK3-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]] 3528 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3529 // CHECK3: omp.body.continue: 3530 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3531 // CHECK3: omp.inner.for.inc: 3532 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 3533 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3534 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 3535 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]] 3536 // CHECK3: omp.inner.for.end: 3537 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3538 // CHECK3: omp.loop.exit: 3539 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 3540 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3541 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3542 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3543 // CHECK3: .omp.final.then: 3544 // CHECK3-NEXT: store i32 100, ptr [[I]], align 4 3545 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3546 // CHECK3: .omp.final.done: 3547 // CHECK3-NEXT: ret void 3548 // 3549 // 3550 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv 3551 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 3552 // CHECK5-NEXT: entry: 3553 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3554 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3555 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3556 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3557 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3558 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3559 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3560 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3561 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3562 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4 3563 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3564 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3565 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3566 // CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3567 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3568 // CHECK5: omp.inner.for.cond: 3569 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 3570 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 3571 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3572 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3573 // CHECK5: omp.inner.for.body: 3574 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3575 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3576 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3577 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 3578 // CHECK5-NEXT: store i32 0, ptr @Arg, align 4, !llvm.access.group [[ACC_GRP2]] 3579 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3580 // CHECK5: omp.body.continue: 3581 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3582 // CHECK5: omp.inner.for.inc: 3583 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3584 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 3585 // CHECK5-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3586 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3587 // CHECK5: omp.inner.for.end: 3588 // CHECK5-NEXT: store i32 100, ptr [[I]], align 4 3589 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3590 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 3591 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3592 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 3593 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3594 // CHECK5: omp.inner.for.cond7: 3595 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 3596 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]] 3597 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3598 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 3599 // CHECK5: omp.inner.for.body9: 3600 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]] 3601 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 3602 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3603 // CHECK5-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]] 3604 // CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]] 3605 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 3606 // CHECK5: omp.body.continue12: 3607 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 3608 // CHECK5: omp.inner.for.inc13: 3609 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]] 3610 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 3611 // CHECK5-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]] 3612 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]] 3613 // CHECK5: omp.inner.for.end15: 3614 // CHECK5-NEXT: store i32 100, ptr [[I6]], align 4 3615 // CHECK5-NEXT: ret void 3616 // 3617 // 3618 // CHECK5-LABEL: define {{[^@]+}}@main 3619 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] { 3620 // CHECK5-NEXT: entry: 3621 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3622 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3623 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3624 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3625 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3626 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3627 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3628 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3629 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3630 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3631 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4 3632 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3633 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 3634 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 3635 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 3636 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 3637 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 3638 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 3639 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3640 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3641 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3642 // CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3643 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3644 // CHECK5: omp.inner.for.cond: 3645 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 3646 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 3647 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3648 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3649 // CHECK5: omp.inner.for.body: 3650 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 3651 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3652 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3653 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 3654 // CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]] 3655 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3656 // CHECK5: omp.body.continue: 3657 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3658 // CHECK5: omp.inner.for.inc: 3659 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 3660 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 3661 // CHECK5-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 3662 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 3663 // CHECK5: omp.inner.for.end: 3664 // CHECK5-NEXT: store i32 100, ptr [[I]], align 4 3665 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3666 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 3667 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3668 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 3669 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3670 // CHECK5: omp.inner.for.cond7: 3671 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 3672 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]] 3673 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3674 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 3675 // CHECK5: omp.inner.for.body9: 3676 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]] 3677 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 3678 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3679 // CHECK5-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]] 3680 // CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]] 3681 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 3682 // CHECK5: omp.body.continue12: 3683 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 3684 // CHECK5: omp.inner.for.inc13: 3685 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]] 3686 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 3687 // CHECK5-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]] 3688 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]] 3689 // CHECK5: omp.inner.for.end15: 3690 // CHECK5-NEXT: store i32 100, ptr [[I6]], align 4 3691 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr @Arg, align 4 3692 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 3693 // CHECK5-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 3694 // CHECK5-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 3695 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 3696 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 3697 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 3698 // CHECK5-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 3699 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 3700 // CHECK5: omp.inner.for.cond21: 3701 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 3702 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]] 3703 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3704 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 3705 // CHECK5: omp.inner.for.body23: 3706 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 3707 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1 3708 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 3709 // CHECK5-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]] 3710 // CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]] 3711 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 3712 // CHECK5: omp.body.continue26: 3713 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 3714 // CHECK5: omp.inner.for.inc27: 3715 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 3716 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1 3717 // CHECK5-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 3718 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]] 3719 // CHECK5: omp.inner.for.end29: 3720 // CHECK5-NEXT: store i32 100, ptr [[I20]], align 4 3721 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr @Arg, align 4 3722 // CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]]) 3723 // CHECK5-NEXT: ret i32 [[CALL]] 3724 // 3725 // 3726 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 3727 // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 3728 // CHECK5-NEXT: entry: 3729 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 3730 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3731 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3732 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3733 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3734 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3735 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3736 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3737 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3738 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3739 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4 3740 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3741 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 3742 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 3743 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 3744 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 3745 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 3746 // CHECK5-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 3747 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3748 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3749 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3750 // CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3751 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3752 // CHECK5: omp.inner.for.cond: 3753 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 3754 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 3755 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3756 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3757 // CHECK5: omp.inner.for.body: 3758 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 3759 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3760 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3761 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 3762 // CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]] 3763 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3764 // CHECK5: omp.body.continue: 3765 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3766 // CHECK5: omp.inner.for.inc: 3767 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 3768 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 3769 // CHECK5-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 3770 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 3771 // CHECK5: omp.inner.for.end: 3772 // CHECK5-NEXT: store i32 100, ptr [[I]], align 4 3773 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3774 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 3775 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3776 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 3777 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3778 // CHECK5: omp.inner.for.cond7: 3779 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 3780 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]] 3781 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3782 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 3783 // CHECK5: omp.inner.for.body9: 3784 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 3785 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 3786 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3787 // CHECK5-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]] 3788 // CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]] 3789 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 3790 // CHECK5: omp.body.continue12: 3791 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 3792 // CHECK5: omp.inner.for.inc13: 3793 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 3794 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 3795 // CHECK5-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 3796 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]] 3797 // CHECK5: omp.inner.for.end15: 3798 // CHECK5-NEXT: store i32 100, ptr [[I6]], align 4 3799 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 3800 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 3801 // CHECK5-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 3802 // CHECK5-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 3803 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 3804 // CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 3805 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 3806 // CHECK5-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 3807 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 3808 // CHECK5: omp.inner.for.cond21: 3809 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 3810 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]] 3811 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3812 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 3813 // CHECK5: omp.inner.for.body23: 3814 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]] 3815 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1 3816 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 3817 // CHECK5-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]] 3818 // CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]] 3819 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 3820 // CHECK5: omp.body.continue26: 3821 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 3822 // CHECK5: omp.inner.for.inc27: 3823 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]] 3824 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1 3825 // CHECK5-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]] 3826 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]] 3827 // CHECK5: omp.inner.for.end29: 3828 // CHECK5-NEXT: store i32 100, ptr [[I20]], align 4 3829 // CHECK5-NEXT: ret i32 0 3830 // 3831 // 3832 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv 3833 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 3834 // CHECK7-NEXT: entry: 3835 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3836 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3837 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3838 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3839 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3840 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3841 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3842 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3843 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3844 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4 3845 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3846 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3847 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3848 // CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3849 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3850 // CHECK7: omp.inner.for.cond: 3851 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 3852 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 3853 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3854 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3855 // CHECK7: omp.inner.for.body: 3856 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3857 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3858 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3859 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 3860 // CHECK7-NEXT: store i32 0, ptr @Arg, align 4, !nontemporal [[META3:![0-9]+]], !llvm.access.group [[ACC_GRP2]] 3861 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3862 // CHECK7: omp.body.continue: 3863 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3864 // CHECK7: omp.inner.for.inc: 3865 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3866 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 3867 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 3868 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3869 // CHECK7: omp.inner.for.end: 3870 // CHECK7-NEXT: store i32 100, ptr [[I]], align 4 3871 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3872 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 3873 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3874 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 3875 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3876 // CHECK7: omp.inner.for.cond7: 3877 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 3878 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP7]] 3879 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3880 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 3881 // CHECK7: omp.inner.for.body9: 3882 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]] 3883 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 3884 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3885 // CHECK7-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP7]] 3886 // CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP7]] 3887 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 3888 // CHECK7: omp.body.continue12: 3889 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 3890 // CHECK7: omp.inner.for.inc13: 3891 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]] 3892 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 3893 // CHECK7-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]] 3894 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]] 3895 // CHECK7: omp.inner.for.end15: 3896 // CHECK7-NEXT: store i32 100, ptr [[I6]], align 4 3897 // CHECK7-NEXT: ret void 3898 // 3899 // 3900 // CHECK7-LABEL: define {{[^@]+}}@main 3901 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] { 3902 // CHECK7-NEXT: entry: 3903 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3904 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3905 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3906 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3907 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3908 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3909 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3910 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3911 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3912 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3913 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4 3914 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3915 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 3916 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 3917 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 3918 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 3919 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 3920 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4 3921 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3922 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 3923 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3924 // CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 3925 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3926 // CHECK7: omp.inner.for.cond: 3927 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 3928 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 3929 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3930 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3931 // CHECK7: omp.inner.for.body: 3932 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3933 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3934 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3935 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 3936 // CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP10]] 3937 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3938 // CHECK7: omp.body.continue: 3939 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3940 // CHECK7: omp.inner.for.inc: 3941 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3942 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 3943 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3944 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3945 // CHECK7: omp.inner.for.end: 3946 // CHECK7-NEXT: store i32 100, ptr [[I]], align 4 3947 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 3948 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 3949 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 3950 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 3951 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3952 // CHECK7: omp.inner.for.cond7: 3953 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 3954 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4 3955 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3956 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 3957 // CHECK7: omp.inner.for.body9: 3958 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 3959 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 3960 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3961 // CHECK7-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4 3962 // CHECK7-NEXT: call void @_Z3fn5v() 3963 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 3964 // CHECK7: omp.body.continue12: 3965 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 3966 // CHECK7: omp.inner.for.inc13: 3967 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 3968 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 3969 // CHECK7-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4 3970 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]] 3971 // CHECK7: omp.inner.for.end15: 3972 // CHECK7-NEXT: store i32 100, ptr [[I6]], align 4 3973 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr @Arg, align 4 3974 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 3975 // CHECK7-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 3976 // CHECK7-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 3977 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 3978 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 3979 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 3980 // CHECK7-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 3981 // CHECK7-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 3982 // CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1 3983 // CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3984 // CHECK7: omp_if.then: 3985 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 3986 // CHECK7: omp.inner.for.cond21: 3987 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 3988 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]] 3989 // CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3990 // CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 3991 // CHECK7: omp.inner.for.body23: 3992 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 3993 // CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 1 3994 // CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 3995 // CHECK7-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]] 3996 // CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]] 3997 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 3998 // CHECK7: omp.body.continue26: 3999 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 4000 // CHECK7: omp.inner.for.inc27: 4001 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 4002 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP16]], 1 4003 // CHECK7-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 4004 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]] 4005 // CHECK7: omp.inner.for.end29: 4006 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]] 4007 // CHECK7: omp_if.else: 4008 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND30:%.*]] 4009 // CHECK7: omp.inner.for.cond30: 4010 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4 4011 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4 4012 // CHECK7-NEXT: [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4013 // CHECK7-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]] 4014 // CHECK7: omp.inner.for.body32: 4015 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4 4016 // CHECK7-NEXT: [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 1 4017 // CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 0, [[MUL33]] 4018 // CHECK7-NEXT: store i32 [[ADD34]], ptr [[I20]], align 4 4019 // CHECK7-NEXT: call void @_Z3fn6v() 4020 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]] 4021 // CHECK7: omp.body.continue35: 4022 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]] 4023 // CHECK7: omp.inner.for.inc36: 4024 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4 4025 // CHECK7-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP20]], 1 4026 // CHECK7-NEXT: store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 4 4027 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP18:![0-9]+]] 4028 // CHECK7: omp.inner.for.end38: 4029 // CHECK7-NEXT: br label [[OMP_IF_END]] 4030 // CHECK7: omp_if.end: 4031 // CHECK7-NEXT: store i32 100, ptr [[I20]], align 4 4032 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, ptr @Arg, align 4 4033 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]]) 4034 // CHECK7-NEXT: ret i32 [[CALL]] 4035 // 4036 // 4037 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 4038 // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 4039 // CHECK7-NEXT: entry: 4040 // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 4041 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4042 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4043 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4044 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4045 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4046 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 4047 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 4048 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 4049 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 4050 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4 4051 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 4052 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 4053 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 4054 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 4055 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 4056 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 4057 // CHECK7-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 4058 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4059 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 4060 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4061 // CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 4062 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4063 // CHECK7: omp.inner.for.cond: 4064 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 4065 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 4066 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 4067 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4068 // CHECK7: omp.inner.for.body: 4069 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 4070 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 4071 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4072 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]] 4073 // CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP19]] 4074 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4075 // CHECK7: omp.body.continue: 4076 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4077 // CHECK7: omp.inner.for.inc: 4078 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 4079 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 4080 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 4081 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 4082 // CHECK7: omp.inner.for.end: 4083 // CHECK7-NEXT: store i32 100, ptr [[I]], align 4 4084 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 4085 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 4086 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 4087 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 4088 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 4089 // CHECK7: omp.inner.for.cond7: 4090 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 4091 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4 4092 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4093 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 4094 // CHECK7: omp.inner.for.body9: 4095 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 4096 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 4097 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 4098 // CHECK7-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4 4099 // CHECK7-NEXT: call void @_Z3fn2v() 4100 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 4101 // CHECK7: omp.body.continue12: 4102 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 4103 // CHECK7: omp.inner.for.inc13: 4104 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 4105 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 4106 // CHECK7-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4 4107 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]] 4108 // CHECK7: omp.inner.for.end15: 4109 // CHECK7-NEXT: store i32 100, ptr [[I6]], align 4 4110 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 4111 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 4112 // CHECK7-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 4113 // CHECK7-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 4114 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 4115 // CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 4116 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 4117 // CHECK7-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 4118 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 4119 // CHECK7: omp.inner.for.cond21: 4120 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 4121 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP23]] 4122 // CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 4123 // CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 4124 // CHECK7: omp.inner.for.body23: 4125 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]] 4126 // CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1 4127 // CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 4128 // CHECK7-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP23]] 4129 // CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP23]] 4130 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 4131 // CHECK7: omp.body.continue26: 4132 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 4133 // CHECK7: omp.inner.for.inc27: 4134 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]] 4135 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1 4136 // CHECK7-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]] 4137 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP24:![0-9]+]] 4138 // CHECK7: omp.inner.for.end29: 4139 // CHECK7-NEXT: store i32 100, ptr [[I20]], align 4 4140 // CHECK7-NEXT: ret i32 0 4141 // 4142 // 4143 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv 4144 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 4145 // CHECK9-NEXT: entry: 4146 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 4147 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 4148 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 4149 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 4150 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4151 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4152 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 4153 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4154 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr @Arg, align 4 4155 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 4156 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 4157 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4158 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 4159 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4160 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 4161 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4162 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 4163 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4164 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4165 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4166 // CHECK9-NEXT: store i32 3, ptr [[TMP7]], align 4 4167 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4168 // CHECK9-NEXT: store i32 1, ptr [[TMP8]], align 4 4169 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4170 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 4171 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4172 // CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 4173 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4174 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8 4175 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4176 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8 4177 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4178 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8 4179 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4180 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 4181 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4182 // CHECK9-NEXT: store i64 100, ptr [[TMP15]], align 8 4183 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4184 // CHECK9-NEXT: store i64 0, ptr [[TMP16]], align 8 4185 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4186 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 4187 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4188 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 4189 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4190 // CHECK9-NEXT: store i32 0, ptr [[TMP19]], align 4 4191 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS]]) 4192 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 4193 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4194 // CHECK9: omp_offload.failed: 4195 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 4196 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 4197 // CHECK9: omp_offload.cont: 4198 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 4199 // CHECK9-NEXT: store i32 3, ptr [[TMP22]], align 4 4200 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 4201 // CHECK9-NEXT: store i32 0, ptr [[TMP23]], align 4 4202 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 4203 // CHECK9-NEXT: store ptr null, ptr [[TMP24]], align 8 4204 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 4205 // CHECK9-NEXT: store ptr null, ptr [[TMP25]], align 8 4206 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 4207 // CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8 4208 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 4209 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8 4210 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 4211 // CHECK9-NEXT: store ptr null, ptr [[TMP28]], align 8 4212 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 4213 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 4214 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 4215 // CHECK9-NEXT: store i64 100, ptr [[TMP30]], align 8 4216 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 4217 // CHECK9-NEXT: store i64 0, ptr [[TMP31]], align 8 4218 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 4219 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4 4220 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 4221 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4 4222 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 4223 // CHECK9-NEXT: store i32 0, ptr [[TMP34]], align 4 4224 // CHECK9-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, ptr [[KERNEL_ARGS2]]) 4225 // CHECK9-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 4226 // CHECK9-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 4227 // CHECK9: omp_offload.failed3: 4228 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]] 4229 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]] 4230 // CHECK9: omp_offload.cont4: 4231 // CHECK9-NEXT: ret void 4232 // 4233 // 4234 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 4235 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { 4236 // CHECK9-NEXT: entry: 4237 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 4238 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 4239 // CHECK9-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 4240 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 4241 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 4242 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 4243 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined, i64 [[TMP1]]) 4244 // CHECK9-NEXT: ret void 4245 // 4246 // 4247 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined 4248 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 4249 // CHECK9-NEXT: entry: 4250 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4251 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4252 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 4253 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4254 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4255 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4256 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4257 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4258 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4259 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4260 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 4261 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4262 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4263 // CHECK9-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 4264 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4265 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 4266 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4267 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4268 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4269 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 4270 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4271 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4272 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4273 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4274 // CHECK9: cond.true: 4275 // CHECK9-NEXT: br label [[COND_END:%.*]] 4276 // CHECK9: cond.false: 4277 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4278 // CHECK9-NEXT: br label [[COND_END]] 4279 // CHECK9: cond.end: 4280 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4281 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4282 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4283 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 4284 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4285 // CHECK9: omp.inner.for.cond: 4286 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 4287 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 4288 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4289 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4290 // CHECK9: omp.inner.for.body: 4291 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 4292 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4293 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 4294 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4295 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !llvm.access.group [[ACC_GRP9]] 4296 // CHECK9-NEXT: store i32 [[TMP11]], ptr [[ARG_CASTED]], align 4, !llvm.access.group [[ACC_GRP9]] 4297 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, ptr [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]] 4298 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]] 4299 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4300 // CHECK9: omp.inner.for.inc: 4301 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 4302 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 4303 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 4304 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 4305 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 4306 // CHECK9: omp.inner.for.end: 4307 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4308 // CHECK9: omp.loop.exit: 4309 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 4310 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4311 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 4312 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4313 // CHECK9: .omp.final.then: 4314 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4315 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4316 // CHECK9: .omp.final.done: 4317 // CHECK9-NEXT: ret void 4318 // 4319 // 4320 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined 4321 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 4322 // CHECK9-NEXT: entry: 4323 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4324 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4325 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4326 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4327 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 4328 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4329 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4330 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4331 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4332 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4333 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4334 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4335 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4336 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4337 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4338 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4339 // CHECK9-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 4340 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4341 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 4342 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4343 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4344 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4345 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4346 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 4347 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 4348 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4349 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4350 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4351 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 4352 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4353 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4354 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4355 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4356 // CHECK9: cond.true: 4357 // CHECK9-NEXT: br label [[COND_END:%.*]] 4358 // CHECK9: cond.false: 4359 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4360 // CHECK9-NEXT: br label [[COND_END]] 4361 // CHECK9: cond.end: 4362 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4363 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4364 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4365 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 4366 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4367 // CHECK9: omp.inner.for.cond: 4368 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 4369 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 4370 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4371 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4372 // CHECK9: omp.inner.for.body: 4373 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 4374 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4375 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4376 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 4377 // CHECK9-NEXT: store i32 0, ptr [[ARG_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]] 4378 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4379 // CHECK9: omp.body.continue: 4380 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4381 // CHECK9: omp.inner.for.inc: 4382 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 4383 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4384 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 4385 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 4386 // CHECK9: omp.inner.for.end: 4387 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4388 // CHECK9: omp.loop.exit: 4389 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 4390 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4391 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 4392 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4393 // CHECK9: .omp.final.then: 4394 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4395 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4396 // CHECK9: .omp.final.done: 4397 // CHECK9-NEXT: ret void 4398 // 4399 // 4400 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53 4401 // CHECK9-SAME: () #[[ATTR1]] { 4402 // CHECK9-NEXT: entry: 4403 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined) 4404 // CHECK9-NEXT: ret void 4405 // 4406 // 4407 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined 4408 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4409 // CHECK9-NEXT: entry: 4410 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4411 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4412 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4413 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4414 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4415 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4416 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4417 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4418 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4419 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4420 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4421 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4422 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4423 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 4424 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4425 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4426 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4427 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 4428 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4429 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4430 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4431 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4432 // CHECK9: cond.true: 4433 // CHECK9-NEXT: br label [[COND_END:%.*]] 4434 // CHECK9: cond.false: 4435 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4436 // CHECK9-NEXT: br label [[COND_END]] 4437 // CHECK9: cond.end: 4438 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4439 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4440 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4441 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 4442 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4443 // CHECK9: omp.inner.for.cond: 4444 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 4445 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 4446 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4447 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4448 // CHECK9: omp.inner.for.body: 4449 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]] 4450 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4451 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 4452 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4453 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]] 4454 // CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP18]] 4455 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP18]] 4456 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP18]] 4457 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]] 4458 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4459 // CHECK9: omp.inner.for.inc: 4460 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 4461 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]] 4462 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4463 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 4464 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 4465 // CHECK9: omp.inner.for.end: 4466 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4467 // CHECK9: omp.loop.exit: 4468 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 4469 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4470 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4471 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4472 // CHECK9: .omp.final.then: 4473 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4474 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4475 // CHECK9: .omp.final.done: 4476 // CHECK9-NEXT: ret void 4477 // 4478 // 4479 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined 4480 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4481 // CHECK9-NEXT: entry: 4482 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4483 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4484 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4485 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4486 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4487 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4488 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4489 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4490 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4491 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4492 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4493 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4494 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4495 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4496 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4497 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4498 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 4499 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4500 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4501 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4502 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4503 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 4504 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 4505 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4506 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4507 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4508 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 4509 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4510 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4511 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4512 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4513 // CHECK9: cond.true: 4514 // CHECK9-NEXT: br label [[COND_END:%.*]] 4515 // CHECK9: cond.false: 4516 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4517 // CHECK9-NEXT: br label [[COND_END]] 4518 // CHECK9: cond.end: 4519 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4520 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4521 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4522 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 4523 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4524 // CHECK9: omp.inner.for.cond: 4525 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 4526 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 4527 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4528 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4529 // CHECK9: omp.inner.for.body: 4530 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 4531 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4532 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4533 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 4534 // CHECK9-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP21]] 4535 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4536 // CHECK9: omp.body.continue: 4537 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4538 // CHECK9: omp.inner.for.inc: 4539 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 4540 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4541 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 4542 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 4543 // CHECK9: omp.inner.for.end: 4544 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4545 // CHECK9: omp.loop.exit: 4546 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 4547 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4548 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 4549 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4550 // CHECK9: .omp.final.then: 4551 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4552 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4553 // CHECK9: .omp.final.done: 4554 // CHECK9-NEXT: ret void 4555 // 4556 // 4557 // CHECK9-LABEL: define {{[^@]+}}@main 4558 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 4559 // CHECK9-NEXT: entry: 4560 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4561 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4562 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4563 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 4564 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4565 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 4566 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 4567 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 4568 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4569 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4570 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 4571 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4572 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 4573 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4574 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 4575 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4576 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 4577 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4578 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 4579 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4580 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 4581 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4582 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 4583 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4584 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 4585 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4586 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 4587 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4588 // CHECK9-NEXT: store i64 100, ptr [[TMP8]], align 8 4589 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4590 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 4591 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4592 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 4593 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4594 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 4595 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4596 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 4597 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, ptr [[KERNEL_ARGS]]) 4598 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4599 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4600 // CHECK9: omp_offload.failed: 4601 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]] 4602 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 4603 // CHECK9: omp_offload.cont: 4604 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 4605 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 4 4606 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 4607 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 4608 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 4609 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 4610 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 4611 // CHECK9-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 4612 // CHECK9-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 4613 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 4614 // CHECK9-NEXT: [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 4615 // CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP18]] to i1 4616 // CHECK9-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4617 // CHECK9: omp_if.then: 4618 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4619 // CHECK9-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 4620 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4621 // CHECK9-NEXT: store i64 [[TMP17]], ptr [[TMP20]], align 8 4622 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4623 // CHECK9-NEXT: store ptr null, ptr [[TMP21]], align 8 4624 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4625 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4626 // CHECK9-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 4627 // CHECK9-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP24]] to i1 4628 // CHECK9-NEXT: [[TMP25:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 4629 // CHECK9-NEXT: [[TMP26:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP25]], 0 4630 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 4631 // CHECK9-NEXT: store i32 3, ptr [[TMP27]], align 4 4632 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 4633 // CHECK9-NEXT: store i32 1, ptr [[TMP28]], align 4 4634 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 4635 // CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 4636 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 4637 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP30]], align 8 4638 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 4639 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP31]], align 8 4640 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 4641 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP32]], align 8 4642 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 4643 // CHECK9-NEXT: store ptr null, ptr [[TMP33]], align 8 4644 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 4645 // CHECK9-NEXT: store ptr null, ptr [[TMP34]], align 8 4646 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 4647 // CHECK9-NEXT: store i64 100, ptr [[TMP35]], align 8 4648 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 4649 // CHECK9-NEXT: store i64 0, ptr [[TMP36]], align 8 4650 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 4651 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP37]], align 4 4652 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 4653 // CHECK9-NEXT: store [3 x i32] [[TMP26]], ptr [[TMP38]], align 4 4654 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 4655 // CHECK9-NEXT: store i32 0, ptr [[TMP39]], align 4 4656 // CHECK9-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP25]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS5]]) 4657 // CHECK9-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 4658 // CHECK9-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 4659 // CHECK9: omp_offload.failed6: 4660 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 4661 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]] 4662 // CHECK9: omp_offload.cont7: 4663 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 4664 // CHECK9: omp_if.else: 4665 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 4666 // CHECK9-NEXT: br label [[OMP_IF_END]] 4667 // CHECK9: omp_if.end: 4668 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, ptr @Arg, align 4 4669 // CHECK9-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]]) 4670 // CHECK9-NEXT: ret i32 [[CALL]] 4671 // 4672 // 4673 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78 4674 // CHECK9-SAME: () #[[ATTR1]] { 4675 // CHECK9-NEXT: entry: 4676 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined) 4677 // CHECK9-NEXT: ret void 4678 // 4679 // 4680 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined 4681 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4682 // CHECK9-NEXT: entry: 4683 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4684 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4685 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4686 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4687 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4688 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4689 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4690 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4691 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4692 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4693 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4694 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4695 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 4696 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4697 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4698 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4699 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 4700 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4701 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4702 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4703 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4704 // CHECK9: cond.true: 4705 // CHECK9-NEXT: br label [[COND_END:%.*]] 4706 // CHECK9: cond.false: 4707 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4708 // CHECK9-NEXT: br label [[COND_END]] 4709 // CHECK9: cond.end: 4710 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4711 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4712 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4713 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 4714 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4715 // CHECK9: omp.inner.for.cond: 4716 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 4717 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 4718 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4719 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4720 // CHECK9: omp.inner.for.body: 4721 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]] 4722 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4723 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 4724 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4725 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]] 4726 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4727 // CHECK9: omp.inner.for.inc: 4728 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 4729 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]] 4730 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4731 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 4732 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 4733 // CHECK9: omp.inner.for.end: 4734 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4735 // CHECK9: omp.loop.exit: 4736 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 4737 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4738 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 4739 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4740 // CHECK9: .omp.final.then: 4741 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4742 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4743 // CHECK9: .omp.final.done: 4744 // CHECK9-NEXT: ret void 4745 // 4746 // 4747 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined 4748 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4749 // CHECK9-NEXT: entry: 4750 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4751 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4752 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4753 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4754 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4755 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4756 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4757 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4758 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4759 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4760 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4761 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4762 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4763 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4764 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4765 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4766 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 4767 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4768 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4769 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4770 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4771 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 4772 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 4773 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4774 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4775 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4776 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 4777 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4778 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4779 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4780 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4781 // CHECK9: cond.true: 4782 // CHECK9-NEXT: br label [[COND_END:%.*]] 4783 // CHECK9: cond.false: 4784 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4785 // CHECK9-NEXT: br label [[COND_END]] 4786 // CHECK9: cond.end: 4787 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4788 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4789 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4790 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 4791 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4792 // CHECK9: omp.inner.for.cond: 4793 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 4794 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 4795 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4796 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4797 // CHECK9: omp.inner.for.body: 4798 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 4799 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4800 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4801 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]] 4802 // CHECK9-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP27]] 4803 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4804 // CHECK9: omp.body.continue: 4805 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4806 // CHECK9: omp.inner.for.inc: 4807 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 4808 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4809 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 4810 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 4811 // CHECK9: omp.inner.for.end: 4812 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4813 // CHECK9: omp.loop.exit: 4814 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 4815 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4816 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 4817 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4818 // CHECK9: .omp.final.then: 4819 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4820 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4821 // CHECK9: .omp.final.done: 4822 // CHECK9-NEXT: ret void 4823 // 4824 // 4825 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 4826 // CHECK9-SAME: () #[[ATTR1]] { 4827 // CHECK9-NEXT: entry: 4828 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined) 4829 // CHECK9-NEXT: ret void 4830 // 4831 // 4832 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined 4833 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 4834 // CHECK9-NEXT: entry: 4835 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4836 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4837 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4838 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4839 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4840 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4841 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4842 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4843 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4844 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 4845 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4846 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4847 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4848 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 4849 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4850 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4851 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4852 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 4853 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4854 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4855 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4856 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4857 // CHECK9: cond.true: 4858 // CHECK9-NEXT: br label [[COND_END:%.*]] 4859 // CHECK9: cond.false: 4860 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4861 // CHECK9-NEXT: br label [[COND_END]] 4862 // CHECK9: cond.end: 4863 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4864 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4865 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4866 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 4867 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4868 // CHECK9: omp.inner.for.cond: 4869 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 4870 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 4871 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4872 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4873 // CHECK9: omp.inner.for.body: 4874 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]] 4875 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4876 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 4877 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4878 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]] 4879 // CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP30]] 4880 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP30]] 4881 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP30]] 4882 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]] 4883 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4884 // CHECK9: omp.inner.for.inc: 4885 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 4886 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]] 4887 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4888 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 4889 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 4890 // CHECK9: omp.inner.for.end: 4891 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4892 // CHECK9: omp.loop.exit: 4893 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 4894 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4895 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 4896 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4897 // CHECK9: .omp.final.then: 4898 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4899 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4900 // CHECK9: .omp.final.done: 4901 // CHECK9-NEXT: ret void 4902 // 4903 // 4904 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined 4905 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 4906 // CHECK9-NEXT: entry: 4907 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4908 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4909 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4910 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4911 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4912 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4913 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4914 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4915 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4916 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4917 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 4918 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4919 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4920 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4921 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4922 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4923 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 4924 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4925 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4926 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4927 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4928 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 4929 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 4930 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4931 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4932 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4933 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 4934 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4935 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4936 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4937 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4938 // CHECK9: cond.true: 4939 // CHECK9-NEXT: br label [[COND_END:%.*]] 4940 // CHECK9: cond.false: 4941 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4942 // CHECK9-NEXT: br label [[COND_END]] 4943 // CHECK9: cond.end: 4944 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4945 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4946 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4947 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 4948 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4949 // CHECK9: omp.inner.for.cond: 4950 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 4951 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 4952 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4953 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4954 // CHECK9: omp.inner.for.body: 4955 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 4956 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4957 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4958 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP33]] 4959 // CHECK9-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP33]] 4960 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4961 // CHECK9: omp.body.continue: 4962 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4963 // CHECK9: omp.inner.for.inc: 4964 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 4965 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4966 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 4967 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] 4968 // CHECK9: omp.inner.for.end: 4969 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4970 // CHECK9: omp.loop.exit: 4971 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 4972 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4973 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 4974 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4975 // CHECK9: .omp.final.then: 4976 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 4977 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 4978 // CHECK9: .omp.final.done: 4979 // CHECK9-NEXT: ret void 4980 // 4981 // 4982 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92 4983 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 4984 // CHECK9-NEXT: entry: 4985 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 4986 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4987 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 4988 // CHECK9-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 4989 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 4990 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 4991 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 4992 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 4993 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP1]]) 4994 // CHECK9-NEXT: ret void 4995 // 4996 // 4997 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined 4998 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 4999 // CHECK9-NEXT: entry: 5000 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5001 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5002 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5003 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5004 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5005 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5006 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5007 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5008 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5009 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5010 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 5011 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5012 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5013 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5014 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5015 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 5016 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5017 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5018 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5019 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 5020 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5021 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5022 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5023 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5024 // CHECK9: cond.true: 5025 // CHECK9-NEXT: br label [[COND_END:%.*]] 5026 // CHECK9: cond.false: 5027 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5028 // CHECK9-NEXT: br label [[COND_END]] 5029 // CHECK9: cond.end: 5030 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5031 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5032 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5033 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 5034 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5035 // CHECK9: omp.inner.for.cond: 5036 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 5037 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 5038 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5039 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5040 // CHECK9: omp.inner.for.body: 5041 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]] 5042 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5043 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 5044 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5045 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP36]] 5046 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 5047 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 5048 // CHECK9: omp_if.then: 5049 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]] 5050 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 5051 // CHECK9: omp_if.else: 5052 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]] 5053 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP36]] 5054 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP36]] 5055 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP36]] 5056 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]] 5057 // CHECK9-NEXT: br label [[OMP_IF_END]] 5058 // CHECK9: omp_if.end: 5059 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5060 // CHECK9: omp.inner.for.inc: 5061 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 5062 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]] 5063 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5064 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 5065 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] 5066 // CHECK9: omp.inner.for.end: 5067 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5068 // CHECK9: omp.loop.exit: 5069 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 5070 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5071 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 5072 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5073 // CHECK9: .omp.final.then: 5074 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5075 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5076 // CHECK9: .omp.final.done: 5077 // CHECK9-NEXT: ret void 5078 // 5079 // 5080 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined 5081 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5082 // CHECK9-NEXT: entry: 5083 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5084 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5085 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5086 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5087 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5088 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5089 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5090 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5091 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5092 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5093 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5094 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5095 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5096 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5097 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5098 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5099 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 5100 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5101 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5102 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5103 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5104 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5105 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 5106 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5107 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5108 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5109 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 5110 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5111 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5112 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5113 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5114 // CHECK9: cond.true: 5115 // CHECK9-NEXT: br label [[COND_END:%.*]] 5116 // CHECK9: cond.false: 5117 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5118 // CHECK9-NEXT: br label [[COND_END]] 5119 // CHECK9: cond.end: 5120 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5121 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5122 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5123 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5124 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5125 // CHECK9: omp.inner.for.cond: 5126 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 5127 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 5128 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5129 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5130 // CHECK9: omp.inner.for.body: 5131 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 5132 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5133 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5134 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]] 5135 // CHECK9-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]] 5136 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5137 // CHECK9: omp.body.continue: 5138 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5139 // CHECK9: omp.inner.for.inc: 5140 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 5141 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5142 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 5143 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] 5144 // CHECK9: omp.inner.for.end: 5145 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5146 // CHECK9: omp.loop.exit: 5147 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 5148 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5149 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5150 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5151 // CHECK9: .omp.final.then: 5152 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5153 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5154 // CHECK9: .omp.final.done: 5155 // CHECK9-NEXT: ret void 5156 // 5157 // 5158 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 5159 // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 5160 // CHECK9-NEXT: entry: 5161 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 5162 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5163 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 5164 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 5165 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5166 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 5167 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 5168 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 5169 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 5170 // CHECK9-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5171 // CHECK9-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 5172 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 5173 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 5174 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 5175 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 5176 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 5177 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 5178 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 5179 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 5180 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 5181 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 5182 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 5183 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 5184 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 5185 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 5186 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 5187 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 5188 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 5189 // CHECK9-NEXT: store i64 100, ptr [[TMP8]], align 8 5190 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 5191 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 5192 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 5193 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 5194 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 5195 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 5196 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 5197 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 5198 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS]]) 5199 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 5200 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5201 // CHECK9: omp_offload.failed: 5202 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]] 5203 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 5204 // CHECK9: omp_offload.cont: 5205 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]] 5206 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 5207 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 5208 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 5209 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 5210 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 5211 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 5212 // CHECK9-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 5213 // CHECK9-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 5214 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5215 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5216 // CHECK9-NEXT: store i64 [[TMP17]], ptr [[TMP18]], align 8 5217 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5218 // CHECK9-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 5219 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5220 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 5221 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5222 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5223 // CHECK9-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 5224 // CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1 5225 // CHECK9-NEXT: [[TMP24:%.*]] = select i1 [[LOADEDV2]], i32 0, i32 1 5226 // CHECK9-NEXT: [[TMP25:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 5227 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 0 5228 // CHECK9-NEXT: store i32 3, ptr [[TMP26]], align 4 5229 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 1 5230 // CHECK9-NEXT: store i32 1, ptr [[TMP27]], align 4 5231 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 2 5232 // CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP28]], align 8 5233 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 3 5234 // CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 5235 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 4 5236 // CHECK9-NEXT: store ptr @.offload_sizes.3, ptr [[TMP30]], align 8 5237 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 5 5238 // CHECK9-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP31]], align 8 5239 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 6 5240 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8 5241 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 7 5242 // CHECK9-NEXT: store ptr null, ptr [[TMP33]], align 8 5243 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 8 5244 // CHECK9-NEXT: store i64 100, ptr [[TMP34]], align 8 5245 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 9 5246 // CHECK9-NEXT: store i64 0, ptr [[TMP35]], align 8 5247 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 10 5248 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 5249 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 11 5250 // CHECK9-NEXT: store [3 x i32] [[TMP25]], ptr [[TMP37]], align 4 5251 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 12 5252 // CHECK9-NEXT: store i32 0, ptr [[TMP38]], align 4 5253 // CHECK9-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, ptr [[KERNEL_ARGS4]]) 5254 // CHECK9-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 5255 // CHECK9-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 5256 // CHECK9: omp_offload.failed5: 5257 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP17]]) #[[ATTR2]] 5258 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 5259 // CHECK9: omp_offload.cont6: 5260 // CHECK9-NEXT: ret i32 0 5261 // 5262 // 5263 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62 5264 // CHECK9-SAME: () #[[ATTR1]] { 5265 // CHECK9-NEXT: entry: 5266 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined) 5267 // CHECK9-NEXT: ret void 5268 // 5269 // 5270 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined 5271 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 5272 // CHECK9-NEXT: entry: 5273 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5274 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5275 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5276 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5277 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5278 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5279 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5280 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5281 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5282 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5283 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5284 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5285 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 5286 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5287 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5288 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5289 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 5290 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5291 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5292 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5293 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5294 // CHECK9: cond.true: 5295 // CHECK9-NEXT: br label [[COND_END:%.*]] 5296 // CHECK9: cond.false: 5297 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5298 // CHECK9-NEXT: br label [[COND_END]] 5299 // CHECK9: cond.end: 5300 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5301 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5302 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5303 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 5304 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5305 // CHECK9: omp.inner.for.cond: 5306 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 5307 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 5308 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5309 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5310 // CHECK9: omp.inner.for.body: 5311 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]] 5312 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5313 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 5314 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5315 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP42]] 5316 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5317 // CHECK9: omp.inner.for.inc: 5318 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 5319 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]] 5320 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 5321 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 5322 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]] 5323 // CHECK9: omp.inner.for.end: 5324 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5325 // CHECK9: omp.loop.exit: 5326 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 5327 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5328 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 5329 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5330 // CHECK9: .omp.final.then: 5331 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5332 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5333 // CHECK9: .omp.final.done: 5334 // CHECK9-NEXT: ret void 5335 // 5336 // 5337 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined 5338 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5339 // CHECK9-NEXT: entry: 5340 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5341 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5342 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5343 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5344 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5345 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5346 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5347 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5348 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5349 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5350 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5351 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5352 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5353 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5354 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5355 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5356 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 5357 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5358 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5359 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5360 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5361 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5362 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 5363 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5364 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5365 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5366 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 5367 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5368 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5369 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5370 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5371 // CHECK9: cond.true: 5372 // CHECK9-NEXT: br label [[COND_END:%.*]] 5373 // CHECK9: cond.false: 5374 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5375 // CHECK9-NEXT: br label [[COND_END]] 5376 // CHECK9: cond.end: 5377 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5378 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5379 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5380 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5381 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5382 // CHECK9: omp.inner.for.cond: 5383 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]] 5384 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]] 5385 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5386 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5387 // CHECK9: omp.inner.for.body: 5388 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 5389 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5390 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5391 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP45]] 5392 // CHECK9-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP45]] 5393 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5394 // CHECK9: omp.body.continue: 5395 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5396 // CHECK9: omp.inner.for.inc: 5397 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 5398 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5399 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 5400 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]] 5401 // CHECK9: omp.inner.for.end: 5402 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5403 // CHECK9: omp.loop.exit: 5404 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 5405 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5406 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5407 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5408 // CHECK9: .omp.final.then: 5409 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5410 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5411 // CHECK9: .omp.final.done: 5412 // CHECK9-NEXT: ret void 5413 // 5414 // 5415 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66 5416 // CHECK9-SAME: () #[[ATTR1]] { 5417 // CHECK9-NEXT: entry: 5418 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined) 5419 // CHECK9-NEXT: ret void 5420 // 5421 // 5422 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined 5423 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 5424 // CHECK9-NEXT: entry: 5425 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5426 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5427 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5428 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5429 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5430 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5431 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5432 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5433 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5434 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 5435 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5436 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5437 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5438 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 5439 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5440 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5441 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5442 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 5443 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5444 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5445 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5446 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5447 // CHECK9: cond.true: 5448 // CHECK9-NEXT: br label [[COND_END:%.*]] 5449 // CHECK9: cond.false: 5450 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5451 // CHECK9-NEXT: br label [[COND_END]] 5452 // CHECK9: cond.end: 5453 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5454 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5455 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5456 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 5457 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5458 // CHECK9: omp.inner.for.cond: 5459 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48:![0-9]+]] 5460 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]] 5461 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5462 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5463 // CHECK9: omp.inner.for.body: 5464 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP48]] 5465 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5466 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]] 5467 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5468 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]] 5469 // CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP48]] 5470 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP48]] 5471 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP48]] 5472 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]] 5473 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5474 // CHECK9: omp.inner.for.inc: 5475 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 5476 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP48]] 5477 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5478 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 5479 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]] 5480 // CHECK9: omp.inner.for.end: 5481 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5482 // CHECK9: omp.loop.exit: 5483 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 5484 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5485 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 5486 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5487 // CHECK9: .omp.final.then: 5488 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5489 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5490 // CHECK9: .omp.final.done: 5491 // CHECK9-NEXT: ret void 5492 // 5493 // 5494 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined 5495 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5496 // CHECK9-NEXT: entry: 5497 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5498 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5499 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5500 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5501 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5502 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5503 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5504 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5505 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5506 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5507 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5508 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5509 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5510 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5511 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5512 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5513 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 5514 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5515 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5516 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5517 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5518 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5519 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 5520 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5521 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5522 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5523 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 5524 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5525 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5526 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5527 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5528 // CHECK9: cond.true: 5529 // CHECK9-NEXT: br label [[COND_END:%.*]] 5530 // CHECK9: cond.false: 5531 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5532 // CHECK9-NEXT: br label [[COND_END]] 5533 // CHECK9: cond.end: 5534 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5535 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5536 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5537 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5538 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5539 // CHECK9: omp.inner.for.cond: 5540 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51:![0-9]+]] 5541 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP51]] 5542 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5543 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5544 // CHECK9: omp.inner.for.body: 5545 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 5546 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5547 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5548 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP51]] 5549 // CHECK9-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP51]] 5550 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5551 // CHECK9: omp.body.continue: 5552 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5553 // CHECK9: omp.inner.for.inc: 5554 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 5555 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5556 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 5557 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]] 5558 // CHECK9: omp.inner.for.end: 5559 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5560 // CHECK9: omp.loop.exit: 5561 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 5562 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5563 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5564 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5565 // CHECK9: .omp.final.then: 5566 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5567 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5568 // CHECK9: .omp.final.done: 5569 // CHECK9-NEXT: ret void 5570 // 5571 // 5572 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70 5573 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 5574 // CHECK9-NEXT: entry: 5575 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5576 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5577 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5578 // CHECK9-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 5579 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 5580 // CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 5581 // CHECK9-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 5582 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5583 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined, i64 [[TMP1]]) 5584 // CHECK9-NEXT: ret void 5585 // 5586 // 5587 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined 5588 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 5589 // CHECK9-NEXT: entry: 5590 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5591 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5592 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5593 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5594 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5595 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5596 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5597 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5598 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5599 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5600 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 5601 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5602 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5603 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5604 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5605 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 5606 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5607 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5608 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5609 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 5610 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5611 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5612 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5613 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5614 // CHECK9: cond.true: 5615 // CHECK9-NEXT: br label [[COND_END:%.*]] 5616 // CHECK9: cond.false: 5617 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5618 // CHECK9-NEXT: br label [[COND_END]] 5619 // CHECK9: cond.end: 5620 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5621 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5622 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5623 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 5624 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5625 // CHECK9: omp.inner.for.cond: 5626 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]] 5627 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 5628 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5629 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5630 // CHECK9: omp.inner.for.body: 5631 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]] 5632 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5633 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 5634 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5635 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP54]] 5636 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 5637 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 5638 // CHECK9: omp_if.then: 5639 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]] 5640 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 5641 // CHECK9: omp_if.else: 5642 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 5643 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]] 5644 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]] 5645 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]] 5646 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 5647 // CHECK9-NEXT: br label [[OMP_IF_END]] 5648 // CHECK9: omp_if.end: 5649 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5650 // CHECK9: omp.inner.for.inc: 5651 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 5652 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]] 5653 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5654 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 5655 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]] 5656 // CHECK9: omp.inner.for.end: 5657 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5658 // CHECK9: omp.loop.exit: 5659 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 5660 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5661 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 5662 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5663 // CHECK9: .omp.final.then: 5664 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5665 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5666 // CHECK9: .omp.final.done: 5667 // CHECK9-NEXT: ret void 5668 // 5669 // 5670 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined 5671 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 5672 // CHECK9-NEXT: entry: 5673 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5674 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5675 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5676 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5677 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5678 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5679 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5680 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5681 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5682 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5683 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5684 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5685 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5686 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5687 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5688 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5689 // CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 5690 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5691 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5692 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5693 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5694 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5695 // CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 5696 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5697 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5698 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5699 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 5700 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5701 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5702 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5703 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5704 // CHECK9: cond.true: 5705 // CHECK9-NEXT: br label [[COND_END:%.*]] 5706 // CHECK9: cond.false: 5707 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5708 // CHECK9-NEXT: br label [[COND_END]] 5709 // CHECK9: cond.end: 5710 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5711 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5712 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5713 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5714 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5715 // CHECK9: omp.inner.for.cond: 5716 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]] 5717 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]] 5718 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5719 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5720 // CHECK9: omp.inner.for.body: 5721 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 5722 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5723 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5724 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP57]] 5725 // CHECK9-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]] 5726 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5727 // CHECK9: omp.body.continue: 5728 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5729 // CHECK9: omp.inner.for.inc: 5730 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 5731 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5732 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 5733 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]] 5734 // CHECK9: omp.inner.for.end: 5735 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5736 // CHECK9: omp.loop.exit: 5737 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 5738 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5739 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5740 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5741 // CHECK9: .omp.final.then: 5742 // CHECK9-NEXT: store i32 100, ptr [[I]], align 4 5743 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5744 // CHECK9: .omp.final.done: 5745 // CHECK9-NEXT: ret void 5746 // 5747 // 5748 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv 5749 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 5750 // CHECK11-NEXT: entry: 5751 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 5752 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 5753 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 5754 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 5755 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 5756 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 5757 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 5758 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5759 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr @Arg, align 4 5760 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 5761 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 5762 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5763 // CHECK11-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 5764 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5765 // CHECK11-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 5766 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5767 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 8 5768 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5769 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5770 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 5771 // CHECK11-NEXT: store i32 3, ptr [[TMP7]], align 4 5772 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 5773 // CHECK11-NEXT: store i32 1, ptr [[TMP8]], align 4 5774 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 5775 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 5776 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 5777 // CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 5778 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 5779 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8 5780 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 5781 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8 5782 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 5783 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 8 5784 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 5785 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 8 5786 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 5787 // CHECK11-NEXT: store i64 100, ptr [[TMP15]], align 8 5788 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 5789 // CHECK11-NEXT: store i64 0, ptr [[TMP16]], align 8 5790 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 5791 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4 5792 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 5793 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4 5794 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 5795 // CHECK11-NEXT: store i32 0, ptr [[TMP19]], align 4 5796 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, ptr [[KERNEL_ARGS]]) 5797 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 5798 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5799 // CHECK11: omp_offload.failed: 5800 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 5801 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 5802 // CHECK11: omp_offload.cont: 5803 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 5804 // CHECK11-NEXT: store i32 3, ptr [[TMP22]], align 4 5805 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 5806 // CHECK11-NEXT: store i32 0, ptr [[TMP23]], align 4 5807 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 5808 // CHECK11-NEXT: store ptr null, ptr [[TMP24]], align 8 5809 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 5810 // CHECK11-NEXT: store ptr null, ptr [[TMP25]], align 8 5811 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 5812 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 8 5813 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 5814 // CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 8 5815 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 5816 // CHECK11-NEXT: store ptr null, ptr [[TMP28]], align 8 5817 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 5818 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 8 5819 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 5820 // CHECK11-NEXT: store i64 100, ptr [[TMP30]], align 8 5821 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 5822 // CHECK11-NEXT: store i64 0, ptr [[TMP31]], align 8 5823 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 5824 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4 5825 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 5826 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4 5827 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 5828 // CHECK11-NEXT: store i32 0, ptr [[TMP34]], align 4 5829 // CHECK11-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, ptr [[KERNEL_ARGS2]]) 5830 // CHECK11-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 5831 // CHECK11-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 5832 // CHECK11: omp_offload.failed3: 5833 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]] 5834 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]] 5835 // CHECK11: omp_offload.cont4: 5836 // CHECK11-NEXT: ret void 5837 // 5838 // 5839 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45 5840 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { 5841 // CHECK11-NEXT: entry: 5842 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 5843 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 5844 // CHECK11-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 5845 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 5846 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[ARG_CASTED]], align 4 5847 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 5848 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined, i64 [[TMP1]]) 5849 // CHECK11-NEXT: ret void 5850 // 5851 // 5852 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined 5853 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 5854 // CHECK11-NEXT: entry: 5855 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5856 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5857 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 5858 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5859 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 5860 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5861 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5862 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5863 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5864 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 5865 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 5866 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5867 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5868 // CHECK11-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 5869 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5870 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 5871 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5872 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5873 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5874 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 5875 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5876 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5877 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 5878 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5879 // CHECK11: cond.true: 5880 // CHECK11-NEXT: br label [[COND_END:%.*]] 5881 // CHECK11: cond.false: 5882 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5883 // CHECK11-NEXT: br label [[COND_END]] 5884 // CHECK11: cond.end: 5885 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 5886 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5887 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5888 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 5889 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5890 // CHECK11: omp.inner.for.cond: 5891 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 5892 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 5893 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 5894 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5895 // CHECK11: omp.inner.for.body: 5896 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]] 5897 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 5898 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 5899 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 5900 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !nontemporal [[META10:![0-9]+]], !llvm.access.group [[ACC_GRP9]] 5901 // CHECK11-NEXT: store i32 [[TMP11]], ptr [[ARG_CASTED]], align 4, !llvm.access.group [[ACC_GRP9]] 5902 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, ptr [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]] 5903 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]] 5904 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5905 // CHECK11: omp.inner.for.inc: 5906 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 5907 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]] 5908 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5909 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 5910 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 5911 // CHECK11: omp.inner.for.end: 5912 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5913 // CHECK11: omp.loop.exit: 5914 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 5915 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5916 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 5917 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5918 // CHECK11: .omp.final.then: 5919 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 5920 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 5921 // CHECK11: .omp.final.done: 5922 // CHECK11-NEXT: ret void 5923 // 5924 // 5925 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.omp_outlined.omp_outlined 5926 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 5927 // CHECK11-NEXT: entry: 5928 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5929 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5930 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5931 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5932 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 5933 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5934 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 5935 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5936 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5937 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5938 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5939 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 5940 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5941 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5942 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5943 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5944 // CHECK11-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 5945 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5946 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 5947 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5948 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 5949 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5950 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5951 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5952 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 5953 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5954 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5955 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5956 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 5957 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5958 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5959 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 5960 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5961 // CHECK11: cond.true: 5962 // CHECK11-NEXT: br label [[COND_END:%.*]] 5963 // CHECK11: cond.false: 5964 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5965 // CHECK11-NEXT: br label [[COND_END]] 5966 // CHECK11: cond.end: 5967 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 5968 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5969 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5970 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 5971 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5972 // CHECK11: omp.inner.for.cond: 5973 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 5974 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 5975 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 5976 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5977 // CHECK11: omp.inner.for.body: 5978 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 5979 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 5980 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5981 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]] 5982 // CHECK11-NEXT: store i32 0, ptr [[ARG_ADDR]], align 4, !nontemporal [[META10]], !llvm.access.group [[ACC_GRP14]] 5983 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5984 // CHECK11: omp.body.continue: 5985 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5986 // CHECK11: omp.inner.for.inc: 5987 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 5988 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 5989 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 5990 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 5991 // CHECK11: omp.inner.for.end: 5992 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5993 // CHECK11: omp.loop.exit: 5994 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 5995 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5996 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5997 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5998 // CHECK11: .omp.final.then: 5999 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6000 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6001 // CHECK11: .omp.final.done: 6002 // CHECK11-NEXT: ret void 6003 // 6004 // 6005 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53 6006 // CHECK11-SAME: () #[[ATTR1]] { 6007 // CHECK11-NEXT: entry: 6008 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined) 6009 // CHECK11-NEXT: ret void 6010 // 6011 // 6012 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined 6013 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6014 // CHECK11-NEXT: entry: 6015 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6016 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6017 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6018 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6019 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6020 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6021 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6022 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6023 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6024 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6025 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6026 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6027 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6028 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 6029 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6030 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6031 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6032 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 6033 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6034 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6035 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6036 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6037 // CHECK11: cond.true: 6038 // CHECK11-NEXT: br label [[COND_END:%.*]] 6039 // CHECK11: cond.false: 6040 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6041 // CHECK11-NEXT: br label [[COND_END]] 6042 // CHECK11: cond.end: 6043 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6044 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6045 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6046 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 6047 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6048 // CHECK11: omp.inner.for.cond: 6049 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 6050 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 6051 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6052 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6053 // CHECK11: omp.inner.for.body: 6054 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]] 6055 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6056 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 6057 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6058 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]] 6059 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP19]] 6060 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP19]] 6061 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP19]] 6062 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]] 6063 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6064 // CHECK11: omp.inner.for.inc: 6065 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 6066 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]] 6067 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6068 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 6069 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 6070 // CHECK11: omp.inner.for.end: 6071 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6072 // CHECK11: omp.loop.exit: 6073 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 6074 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6075 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 6076 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6077 // CHECK11: .omp.final.then: 6078 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6079 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6080 // CHECK11: .omp.final.done: 6081 // CHECK11-NEXT: ret void 6082 // 6083 // 6084 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.omp_outlined.omp_outlined 6085 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6086 // CHECK11-NEXT: entry: 6087 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6088 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6089 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6090 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6091 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6092 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6093 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6094 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6095 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6096 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6097 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6098 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6099 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6100 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6101 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6102 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6103 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 6104 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6105 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6106 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6107 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6108 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6109 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6110 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6111 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6112 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6113 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 6114 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6115 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6116 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6117 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6118 // CHECK11: cond.true: 6119 // CHECK11-NEXT: br label [[COND_END:%.*]] 6120 // CHECK11: cond.false: 6121 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6122 // CHECK11-NEXT: br label [[COND_END]] 6123 // CHECK11: cond.end: 6124 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6125 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6126 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6127 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 6128 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6129 // CHECK11: omp.inner.for.cond: 6130 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 6131 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 6132 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6133 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6134 // CHECK11: omp.inner.for.body: 6135 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 6136 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6137 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6138 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 6139 // CHECK11-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP22]] 6140 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6141 // CHECK11: omp.body.continue: 6142 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6143 // CHECK11: omp.inner.for.inc: 6144 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 6145 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6146 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 6147 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 6148 // CHECK11: omp.inner.for.end: 6149 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6150 // CHECK11: omp.loop.exit: 6151 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 6152 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6153 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 6154 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6155 // CHECK11: .omp.final.then: 6156 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6157 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6158 // CHECK11: .omp.final.done: 6159 // CHECK11-NEXT: ret void 6160 // 6161 // 6162 // CHECK11-LABEL: define {{[^@]+}}@main 6163 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 6164 // CHECK11-NEXT: entry: 6165 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6166 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6167 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 6168 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 6169 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6170 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 6171 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 6172 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 6173 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 6174 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6175 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 6176 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 6177 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 6178 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 6179 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 6180 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 6181 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 8 6182 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 6183 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 8 6184 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 6185 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 8 6186 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 6187 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 8 6188 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 6189 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 8 6190 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 6191 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 8 6192 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 6193 // CHECK11-NEXT: store i64 100, ptr [[TMP8]], align 8 6194 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 6195 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 6196 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 6197 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 6198 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 6199 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 6200 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 6201 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 6202 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, ptr [[KERNEL_ARGS]]) 6203 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 6204 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6205 // CHECK11: omp_offload.failed: 6206 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]] 6207 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 6208 // CHECK11: omp_offload.cont: 6209 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 6210 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 4 6211 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 6212 // CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 6213 // CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 6214 // CHECK11-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 6215 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 6216 // CHECK11-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 6217 // CHECK11-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 6218 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6219 // CHECK11-NEXT: [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 6220 // CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP18]] to i1 6221 // CHECK11-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6222 // CHECK11: omp_if.then: 6223 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6224 // CHECK11-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 6225 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6226 // CHECK11-NEXT: store i64 [[TMP17]], ptr [[TMP20]], align 8 6227 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 6228 // CHECK11-NEXT: store ptr null, ptr [[TMP21]], align 8 6229 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6230 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6231 // CHECK11-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 6232 // CHECK11-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP24]] to i1 6233 // CHECK11-NEXT: [[TMP25:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 6234 // CHECK11-NEXT: [[TMP26:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP25]], 0 6235 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 6236 // CHECK11-NEXT: store i32 3, ptr [[TMP27]], align 4 6237 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 6238 // CHECK11-NEXT: store i32 1, ptr [[TMP28]], align 4 6239 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 6240 // CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 6241 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 6242 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP30]], align 8 6243 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 6244 // CHECK11-NEXT: store ptr @.offload_sizes.2, ptr [[TMP31]], align 8 6245 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 6246 // CHECK11-NEXT: store ptr @.offload_maptypes.3, ptr [[TMP32]], align 8 6247 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 6248 // CHECK11-NEXT: store ptr null, ptr [[TMP33]], align 8 6249 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 6250 // CHECK11-NEXT: store ptr null, ptr [[TMP34]], align 8 6251 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 6252 // CHECK11-NEXT: store i64 100, ptr [[TMP35]], align 8 6253 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 6254 // CHECK11-NEXT: store i64 0, ptr [[TMP36]], align 8 6255 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 6256 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP37]], align 4 6257 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 6258 // CHECK11-NEXT: store [3 x i32] [[TMP26]], ptr [[TMP38]], align 4 6259 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 6260 // CHECK11-NEXT: store i32 0, ptr [[TMP39]], align 4 6261 // CHECK11-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP25]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, ptr [[KERNEL_ARGS5]]) 6262 // CHECK11-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 6263 // CHECK11-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 6264 // CHECK11: omp_offload.failed6: 6265 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 6266 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]] 6267 // CHECK11: omp_offload.cont7: 6268 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 6269 // CHECK11: omp_if.else: 6270 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP17]]) #[[ATTR2]] 6271 // CHECK11-NEXT: br label [[OMP_IF_END]] 6272 // CHECK11: omp_if.end: 6273 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, ptr @Arg, align 4 6274 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]]) 6275 // CHECK11-NEXT: ret i32 [[CALL]] 6276 // 6277 // 6278 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78 6279 // CHECK11-SAME: () #[[ATTR1]] { 6280 // CHECK11-NEXT: entry: 6281 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined) 6282 // CHECK11-NEXT: ret void 6283 // 6284 // 6285 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined 6286 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6287 // CHECK11-NEXT: entry: 6288 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6289 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6290 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6291 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6292 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6293 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6294 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6295 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6296 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6297 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6298 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6299 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6300 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 6301 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6302 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6303 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6304 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 6305 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6306 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6307 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6308 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6309 // CHECK11: cond.true: 6310 // CHECK11-NEXT: br label [[COND_END:%.*]] 6311 // CHECK11: cond.false: 6312 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6313 // CHECK11-NEXT: br label [[COND_END]] 6314 // CHECK11: cond.end: 6315 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6316 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6317 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6318 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 6319 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6320 // CHECK11: omp.inner.for.cond: 6321 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 6322 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 6323 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6324 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6325 // CHECK11: omp.inner.for.body: 6326 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 6327 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6328 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 6329 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6330 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP25]] 6331 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6332 // CHECK11: omp.inner.for.inc: 6333 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 6334 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 6335 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 6336 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 6337 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 6338 // CHECK11: omp.inner.for.end: 6339 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6340 // CHECK11: omp.loop.exit: 6341 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 6342 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6343 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 6344 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6345 // CHECK11: .omp.final.then: 6346 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6347 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6348 // CHECK11: .omp.final.done: 6349 // CHECK11-NEXT: ret void 6350 // 6351 // 6352 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.omp_outlined.omp_outlined 6353 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6354 // CHECK11-NEXT: entry: 6355 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6356 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6357 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6358 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6359 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6360 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6361 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6362 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6363 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6364 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6365 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6366 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6367 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6368 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6369 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6370 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6371 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 6372 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6373 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6374 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6375 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6376 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6377 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6378 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6379 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6380 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6381 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 6382 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6383 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6384 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6385 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6386 // CHECK11: cond.true: 6387 // CHECK11-NEXT: br label [[COND_END:%.*]] 6388 // CHECK11: cond.false: 6389 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6390 // CHECK11-NEXT: br label [[COND_END]] 6391 // CHECK11: cond.end: 6392 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6393 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6394 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6395 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 6396 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6397 // CHECK11: omp.inner.for.cond: 6398 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 6399 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 6400 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6401 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6402 // CHECK11: omp.inner.for.body: 6403 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 6404 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6405 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6406 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]] 6407 // CHECK11-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP28]] 6408 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6409 // CHECK11: omp.body.continue: 6410 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6411 // CHECK11: omp.inner.for.inc: 6412 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 6413 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6414 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 6415 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 6416 // CHECK11: omp.inner.for.end: 6417 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6418 // CHECK11: omp.loop.exit: 6419 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 6420 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6421 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 6422 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6423 // CHECK11: .omp.final.then: 6424 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6425 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6426 // CHECK11: .omp.final.done: 6427 // CHECK11-NEXT: ret void 6428 // 6429 // 6430 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 6431 // CHECK11-SAME: () #[[ATTR1]] { 6432 // CHECK11-NEXT: entry: 6433 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined) 6434 // CHECK11-NEXT: ret void 6435 // 6436 // 6437 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined 6438 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 6439 // CHECK11-NEXT: entry: 6440 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6441 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6442 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6443 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6444 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6445 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6446 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6447 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6448 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6449 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6450 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6451 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6452 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6453 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 6454 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6455 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6456 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6457 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 6458 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6459 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6460 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6461 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6462 // CHECK11: cond.true: 6463 // CHECK11-NEXT: br label [[COND_END:%.*]] 6464 // CHECK11: cond.false: 6465 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6466 // CHECK11-NEXT: br label [[COND_END]] 6467 // CHECK11: cond.end: 6468 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6469 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6470 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6471 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 6472 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6473 // CHECK11: omp.inner.for.cond: 6474 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6475 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6476 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 6477 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6478 // CHECK11: omp.inner.for.body: 6479 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6480 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 6481 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6482 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 6483 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 6484 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6485 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 6486 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 6487 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 6488 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6489 // CHECK11: omp.inner.for.inc: 6490 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6491 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6492 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6493 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 6494 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 6495 // CHECK11: omp.inner.for.end: 6496 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6497 // CHECK11: omp.loop.exit: 6498 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 6499 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6500 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 6501 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6502 // CHECK11: .omp.final.then: 6503 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6504 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6505 // CHECK11: .omp.final.done: 6506 // CHECK11-NEXT: ret void 6507 // 6508 // 6509 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined 6510 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 6511 // CHECK11-NEXT: entry: 6512 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6513 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6514 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6515 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6516 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6517 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6518 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6519 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6520 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6521 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6522 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6523 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6524 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6525 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6526 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6527 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6528 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 6529 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6530 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6531 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6532 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6533 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6534 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6535 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6536 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6537 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6538 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 6539 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6540 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6541 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 6542 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6543 // CHECK11: cond.true: 6544 // CHECK11-NEXT: br label [[COND_END:%.*]] 6545 // CHECK11: cond.false: 6546 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6547 // CHECK11-NEXT: br label [[COND_END]] 6548 // CHECK11: cond.end: 6549 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 6550 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6551 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6552 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 6553 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6554 // CHECK11: omp.inner.for.cond: 6555 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6556 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6557 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6558 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6559 // CHECK11: omp.inner.for.body: 6560 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6561 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6562 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6563 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6564 // CHECK11-NEXT: call void @_Z3fn5v() 6565 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6566 // CHECK11: omp.body.continue: 6567 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6568 // CHECK11: omp.inner.for.inc: 6569 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6570 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 6571 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 6572 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 6573 // CHECK11: omp.inner.for.end: 6574 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6575 // CHECK11: omp.loop.exit: 6576 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 6577 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6578 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 6579 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6580 // CHECK11: .omp.final.then: 6581 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6582 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6583 // CHECK11: .omp.final.done: 6584 // CHECK11-NEXT: ret void 6585 // 6586 // 6587 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92 6588 // CHECK11-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 6589 // CHECK11-NEXT: entry: 6590 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6591 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6592 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6593 // CHECK11-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 6594 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 6595 // CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 6596 // CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 6597 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6598 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined, i64 [[TMP1]]) 6599 // CHECK11-NEXT: ret void 6600 // 6601 // 6602 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined 6603 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 6604 // CHECK11-NEXT: entry: 6605 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6606 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6607 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6608 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6609 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6610 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6611 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6612 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6613 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6614 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6615 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6616 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 6617 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8 6618 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR15:%.*]] = alloca i32, align 4 6619 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6620 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6621 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6622 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6623 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 6624 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6625 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6626 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6627 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 6628 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6629 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6630 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 6631 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6632 // CHECK11: cond.true: 6633 // CHECK11-NEXT: br label [[COND_END:%.*]] 6634 // CHECK11: cond.false: 6635 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6636 // CHECK11-NEXT: br label [[COND_END]] 6637 // CHECK11: cond.end: 6638 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 6639 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6640 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6641 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 6642 // CHECK11-NEXT: [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 6643 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP5]] to i1 6644 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE5:%.*]] 6645 // CHECK11: omp_if.then: 6646 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6647 // CHECK11: omp.inner.for.cond: 6648 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 6649 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 6650 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6651 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6652 // CHECK11: omp.inner.for.body: 6653 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP34]] 6654 // CHECK11-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6655 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 6656 // CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6657 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP34]] 6658 // CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP12]] to i1 6659 // CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV2]] to i8 6660 // CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP34]] 6661 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP34]] 6662 // CHECK11-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP34]] 6663 // CHECK11-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP14]] to i1 6664 // CHECK11-NEXT: br i1 [[LOADEDV3]], label [[OMP_IF_THEN4:%.*]], label [[OMP_IF_ELSE:%.*]] 6665 // CHECK11: omp_if.then4: 6666 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP34]] 6667 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 6668 // CHECK11: omp_if.else: 6669 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]] 6670 // CHECK11-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP34]] 6671 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP34]] 6672 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined(ptr [[TMP15]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP34]] 6673 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]] 6674 // CHECK11-NEXT: br label [[OMP_IF_END]] 6675 // CHECK11: omp_if.end: 6676 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6677 // CHECK11: omp.inner.for.inc: 6678 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 6679 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP34]] 6680 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 6681 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 6682 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] 6683 // CHECK11: omp.inner.for.end: 6684 // CHECK11-NEXT: br label [[OMP_IF_END20:%.*]] 6685 // CHECK11: omp_if.else5: 6686 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND6:%.*]] 6687 // CHECK11: omp.inner.for.cond6: 6688 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6689 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6690 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 6691 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY8:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 6692 // CHECK11: omp.inner.for.body8: 6693 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6694 // CHECK11-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64 6695 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6696 // CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64 6697 // CHECK11-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 6698 // CHECK11-NEXT: [[LOADEDV9:%.*]] = trunc i8 [[TMP24]] to i1 6699 // CHECK11-NEXT: [[STOREDV11:%.*]] = zext i1 [[LOADEDV9]] to i8 6700 // CHECK11-NEXT: store i8 [[STOREDV11]], ptr [[DOTCAPTURE_EXPR__CASTED10]], align 1 6701 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED10]], align 8 6702 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 6703 // CHECK11-NEXT: [[LOADEDV12:%.*]] = trunc i8 [[TMP26]] to i1 6704 // CHECK11-NEXT: br i1 [[LOADEDV12]], label [[OMP_IF_THEN13:%.*]], label [[OMP_IF_ELSE14:%.*]] 6705 // CHECK11: omp_if.then13: 6706 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1, i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) 6707 // CHECK11-NEXT: br label [[OMP_IF_END16:%.*]] 6708 // CHECK11: omp_if.else14: 6709 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 6710 // CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6711 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR15]], align 4 6712 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1(ptr [[TMP27]], ptr [[DOTBOUND_ZERO_ADDR15]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]] 6713 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 6714 // CHECK11-NEXT: br label [[OMP_IF_END16]] 6715 // CHECK11: omp_if.end16: 6716 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 6717 // CHECK11: omp.inner.for.inc17: 6718 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6719 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6720 // CHECK11-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 6721 // CHECK11-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_IV]], align 4 6722 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND6]], !llvm.loop [[LOOP37:![0-9]+]] 6723 // CHECK11: omp.inner.for.end19: 6724 // CHECK11-NEXT: br label [[OMP_IF_END20]] 6725 // CHECK11: omp_if.end20: 6726 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6727 // CHECK11: omp.loop.exit: 6728 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 6729 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6730 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 6731 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6732 // CHECK11: .omp.final.then: 6733 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6734 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6735 // CHECK11: .omp.final.done: 6736 // CHECK11-NEXT: ret void 6737 // 6738 // 6739 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined 6740 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 6741 // CHECK11-NEXT: entry: 6742 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6743 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6744 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6745 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6746 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6747 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6748 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6749 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6750 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6751 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6752 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6753 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6754 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6755 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6756 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6757 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6758 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6759 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6760 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 6761 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6762 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6763 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6764 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6765 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6766 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6767 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6768 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6769 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 6770 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 6771 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6772 // CHECK11: omp_if.then: 6773 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6774 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 6775 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6776 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6777 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99 6778 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6779 // CHECK11: cond.true: 6780 // CHECK11-NEXT: br label [[COND_END:%.*]] 6781 // CHECK11: cond.false: 6782 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6783 // CHECK11-NEXT: br label [[COND_END]] 6784 // CHECK11: cond.end: 6785 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6786 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6787 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6788 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 6789 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6790 // CHECK11: omp.inner.for.cond: 6791 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 6792 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 6793 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6794 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6795 // CHECK11: omp.inner.for.body: 6796 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 6797 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6798 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6799 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP38]] 6800 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP38]] 6801 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6802 // CHECK11: omp.body.continue: 6803 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6804 // CHECK11: omp.inner.for.inc: 6805 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 6806 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 6807 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 6808 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 6809 // CHECK11: omp.inner.for.end: 6810 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 6811 // CHECK11: omp_if.else: 6812 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6813 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 6814 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6815 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6816 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99 6817 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 6818 // CHECK11: cond.true5: 6819 // CHECK11-NEXT: br label [[COND_END7:%.*]] 6820 // CHECK11: cond.false6: 6821 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6822 // CHECK11-NEXT: br label [[COND_END7]] 6823 // CHECK11: cond.end7: 6824 // CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ] 6825 // CHECK11-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4 6826 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6827 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6828 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]] 6829 // CHECK11: omp.inner.for.cond9: 6830 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6831 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6832 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6833 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 6834 // CHECK11: omp.inner.for.body11: 6835 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6836 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1 6837 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 6838 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I]], align 4 6839 // CHECK11-NEXT: call void @_Z3fn6v() 6840 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 6841 // CHECK11: omp.body.continue14: 6842 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 6843 // CHECK11: omp.inner.for.inc15: 6844 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6845 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1 6846 // CHECK11-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4 6847 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP41:![0-9]+]] 6848 // CHECK11: omp.inner.for.end17: 6849 // CHECK11-NEXT: br label [[OMP_IF_END]] 6850 // CHECK11: omp_if.end: 6851 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6852 // CHECK11: omp.loop.exit: 6853 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6854 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 6855 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 6856 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6857 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 6858 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6859 // CHECK11: .omp.final.then: 6860 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6861 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6862 // CHECK11: .omp.final.done: 6863 // CHECK11-NEXT: ret void 6864 // 6865 // 6866 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.omp_outlined.omp_outlined.1 6867 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 6868 // CHECK11-NEXT: entry: 6869 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6870 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6871 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6872 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6873 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6874 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6875 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6876 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6877 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6878 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6879 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6880 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 6881 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6882 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6883 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6884 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6885 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6886 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6887 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 6888 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6889 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 6890 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6891 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6892 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6893 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6894 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6895 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6896 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 6897 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 6898 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 6899 // CHECK11: omp_if.then: 6900 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6901 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 6902 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6903 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6904 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99 6905 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6906 // CHECK11: cond.true: 6907 // CHECK11-NEXT: br label [[COND_END:%.*]] 6908 // CHECK11: cond.false: 6909 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6910 // CHECK11-NEXT: br label [[COND_END]] 6911 // CHECK11: cond.end: 6912 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6913 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6914 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6915 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 6916 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6917 // CHECK11: omp.inner.for.cond: 6918 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 6919 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 6920 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6921 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6922 // CHECK11: omp.inner.for.body: 6923 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 6924 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6925 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6926 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP42]] 6927 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP42]] 6928 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6929 // CHECK11: omp.body.continue: 6930 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6931 // CHECK11: omp.inner.for.inc: 6932 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 6933 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1 6934 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 6935 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]] 6936 // CHECK11: omp.inner.for.end: 6937 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 6938 // CHECK11: omp_if.else: 6939 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6940 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 6941 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6942 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6943 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99 6944 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] 6945 // CHECK11: cond.true5: 6946 // CHECK11-NEXT: br label [[COND_END7:%.*]] 6947 // CHECK11: cond.false6: 6948 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6949 // CHECK11-NEXT: br label [[COND_END7]] 6950 // CHECK11: cond.end7: 6951 // CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ] 6952 // CHECK11-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4 6953 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6954 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6955 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]] 6956 // CHECK11: omp.inner.for.cond9: 6957 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6958 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6959 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6960 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 6961 // CHECK11: omp.inner.for.body11: 6962 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6963 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1 6964 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 6965 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I]], align 4 6966 // CHECK11-NEXT: call void @_Z3fn6v() 6967 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 6968 // CHECK11: omp.body.continue14: 6969 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 6970 // CHECK11: omp.inner.for.inc15: 6971 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6972 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1 6973 // CHECK11-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4 6974 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP45:![0-9]+]] 6975 // CHECK11: omp.inner.for.end17: 6976 // CHECK11-NEXT: br label [[OMP_IF_END]] 6977 // CHECK11: omp_if.end: 6978 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6979 // CHECK11: omp.loop.exit: 6980 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6981 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 6982 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 6983 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6984 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 6985 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6986 // CHECK11: .omp.final.then: 6987 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 6988 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 6989 // CHECK11: .omp.final.done: 6990 // CHECK11-NEXT: ret void 6991 // 6992 // 6993 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 6994 // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 6995 // CHECK11-NEXT: entry: 6996 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 6997 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 6998 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 6999 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 7000 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7001 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 7002 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 7003 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 7004 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 7005 // CHECK11-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7006 // CHECK11-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 7007 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 7008 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 7009 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 7010 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 7011 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 7012 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 8 7013 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 7014 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 8 7015 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 7016 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 8 7017 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 7018 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 8 7019 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 7020 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 8 7021 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 7022 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 8 7023 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 7024 // CHECK11-NEXT: store i64 100, ptr [[TMP8]], align 8 7025 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 7026 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 7027 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 7028 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 7029 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 7030 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 7031 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 7032 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 7033 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, ptr [[KERNEL_ARGS]]) 7034 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 7035 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7036 // CHECK11: omp_offload.failed: 7037 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]] 7038 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 7039 // CHECK11: omp_offload.cont: 7040 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]] 7041 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 7042 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 7043 // CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 7044 // CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 7045 // CHECK11-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 7046 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 7047 // CHECK11-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 7048 // CHECK11-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 7049 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 7050 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7051 // CHECK11-NEXT: store i64 [[TMP17]], ptr [[TMP18]], align 8 7052 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7053 // CHECK11-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 7054 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7055 // CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 8 7056 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7057 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7058 // CHECK11-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 7059 // CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1 7060 // CHECK11-NEXT: [[TMP24:%.*]] = select i1 [[LOADEDV2]], i32 0, i32 1 7061 // CHECK11-NEXT: [[TMP25:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 7062 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 0 7063 // CHECK11-NEXT: store i32 3, ptr [[TMP26]], align 4 7064 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 1 7065 // CHECK11-NEXT: store i32 1, ptr [[TMP27]], align 4 7066 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 2 7067 // CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP28]], align 8 7068 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 3 7069 // CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 7070 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 4 7071 // CHECK11-NEXT: store ptr @.offload_sizes.4, ptr [[TMP30]], align 8 7072 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 5 7073 // CHECK11-NEXT: store ptr @.offload_maptypes.5, ptr [[TMP31]], align 8 7074 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 6 7075 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 8 7076 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 7 7077 // CHECK11-NEXT: store ptr null, ptr [[TMP33]], align 8 7078 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 8 7079 // CHECK11-NEXT: store i64 100, ptr [[TMP34]], align 8 7080 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 9 7081 // CHECK11-NEXT: store i64 0, ptr [[TMP35]], align 8 7082 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 10 7083 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 7084 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 11 7085 // CHECK11-NEXT: store [3 x i32] [[TMP25]], ptr [[TMP37]], align 4 7086 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 12 7087 // CHECK11-NEXT: store i32 0, ptr [[TMP38]], align 4 7088 // CHECK11-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, ptr [[KERNEL_ARGS4]]) 7089 // CHECK11-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 7090 // CHECK11-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 7091 // CHECK11: omp_offload.failed5: 7092 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP17]]) #[[ATTR2]] 7093 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 7094 // CHECK11: omp_offload.cont6: 7095 // CHECK11-NEXT: ret i32 0 7096 // 7097 // 7098 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62 7099 // CHECK11-SAME: () #[[ATTR1]] { 7100 // CHECK11-NEXT: entry: 7101 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined) 7102 // CHECK11-NEXT: ret void 7103 // 7104 // 7105 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined 7106 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 7107 // CHECK11-NEXT: entry: 7108 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7109 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7110 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7111 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 7112 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7113 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7114 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7115 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7116 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7117 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7118 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7119 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7120 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 7121 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7122 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7123 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7124 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 7125 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7126 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7127 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7128 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7129 // CHECK11: cond.true: 7130 // CHECK11-NEXT: br label [[COND_END:%.*]] 7131 // CHECK11: cond.false: 7132 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7133 // CHECK11-NEXT: br label [[COND_END]] 7134 // CHECK11: cond.end: 7135 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7136 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7137 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7138 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 7139 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7140 // CHECK11: omp.inner.for.cond: 7141 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]] 7142 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 7143 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7144 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7145 // CHECK11: omp.inner.for.body: 7146 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP46]] 7147 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7148 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 7149 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7150 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP46]] 7151 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7152 // CHECK11: omp.inner.for.inc: 7153 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 7154 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP46]] 7155 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 7156 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 7157 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] 7158 // CHECK11: omp.inner.for.end: 7159 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7160 // CHECK11: omp.loop.exit: 7161 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 7162 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7163 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 7164 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7165 // CHECK11: .omp.final.then: 7166 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 7167 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 7168 // CHECK11: .omp.final.done: 7169 // CHECK11-NEXT: ret void 7170 // 7171 // 7172 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.omp_outlined.omp_outlined 7173 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7174 // CHECK11-NEXT: entry: 7175 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7176 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7177 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7178 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7179 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7180 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 7181 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7182 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7183 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7184 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7185 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7186 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7187 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7188 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7189 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7190 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7191 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7192 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7193 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7194 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7195 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7196 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7197 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7198 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7199 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7200 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7201 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7202 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7203 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7204 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7205 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7206 // CHECK11: cond.true: 7207 // CHECK11-NEXT: br label [[COND_END:%.*]] 7208 // CHECK11: cond.false: 7209 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7210 // CHECK11-NEXT: br label [[COND_END]] 7211 // CHECK11: cond.end: 7212 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7213 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7214 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7215 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7216 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7217 // CHECK11: omp.inner.for.cond: 7218 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]] 7219 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP49]] 7220 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7221 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7222 // CHECK11: omp.inner.for.body: 7223 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 7224 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7225 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7226 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP49]] 7227 // CHECK11-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP49]] 7228 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7229 // CHECK11: omp.body.continue: 7230 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7231 // CHECK11: omp.inner.for.inc: 7232 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 7233 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7234 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 7235 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] 7236 // CHECK11: omp.inner.for.end: 7237 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7238 // CHECK11: omp.loop.exit: 7239 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 7240 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7241 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 7242 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7243 // CHECK11: .omp.final.then: 7244 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 7245 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 7246 // CHECK11: .omp.final.done: 7247 // CHECK11-NEXT: ret void 7248 // 7249 // 7250 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66 7251 // CHECK11-SAME: () #[[ATTR1]] { 7252 // CHECK11-NEXT: entry: 7253 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined) 7254 // CHECK11-NEXT: ret void 7255 // 7256 // 7257 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined 7258 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 7259 // CHECK11-NEXT: entry: 7260 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7261 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7262 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7263 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 7264 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7265 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7266 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7267 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7268 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7269 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 7270 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7271 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7272 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7273 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 7274 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7275 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7276 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7277 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 7278 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7279 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7280 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7281 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7282 // CHECK11: cond.true: 7283 // CHECK11-NEXT: br label [[COND_END:%.*]] 7284 // CHECK11: cond.false: 7285 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7286 // CHECK11-NEXT: br label [[COND_END]] 7287 // CHECK11: cond.end: 7288 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7289 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7290 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7291 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 7292 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7293 // CHECK11: omp.inner.for.cond: 7294 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7295 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7296 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7297 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7298 // CHECK11: omp.inner.for.body: 7299 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7300 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7301 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7302 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7303 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 7304 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7305 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 7306 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 7307 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 7308 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7309 // CHECK11: omp.inner.for.inc: 7310 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7311 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7312 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 7313 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 7314 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]] 7315 // CHECK11: omp.inner.for.end: 7316 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7317 // CHECK11: omp.loop.exit: 7318 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 7319 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7320 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 7321 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7322 // CHECK11: .omp.final.then: 7323 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 7324 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 7325 // CHECK11: .omp.final.done: 7326 // CHECK11-NEXT: ret void 7327 // 7328 // 7329 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66.omp_outlined.omp_outlined 7330 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7331 // CHECK11-NEXT: entry: 7332 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7333 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7334 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7335 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7336 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7337 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 7338 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7339 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7340 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7341 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7342 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7343 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7344 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7345 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7346 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7347 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7348 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7349 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7350 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7351 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7352 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7353 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7354 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7355 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7356 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7357 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7358 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7359 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7360 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7361 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7362 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7363 // CHECK11: cond.true: 7364 // CHECK11-NEXT: br label [[COND_END:%.*]] 7365 // CHECK11: cond.false: 7366 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7367 // CHECK11-NEXT: br label [[COND_END]] 7368 // CHECK11: cond.end: 7369 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7370 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7371 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7372 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7373 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7374 // CHECK11: omp.inner.for.cond: 7375 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7376 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7377 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7378 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7379 // CHECK11: omp.inner.for.body: 7380 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7381 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7382 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7383 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 7384 // CHECK11-NEXT: call void @_Z3fn2v() 7385 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7386 // CHECK11: omp.body.continue: 7387 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7388 // CHECK11: omp.inner.for.inc: 7389 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7390 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7391 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 7392 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] 7393 // CHECK11: omp.inner.for.end: 7394 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7395 // CHECK11: omp.loop.exit: 7396 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 7397 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7398 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 7399 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7400 // CHECK11: .omp.final.then: 7401 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 7402 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 7403 // CHECK11: .omp.final.done: 7404 // CHECK11-NEXT: ret void 7405 // 7406 // 7407 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70 7408 // CHECK11-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 7409 // CHECK11-NEXT: entry: 7410 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7411 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 7412 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7413 // CHECK11-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 7414 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 7415 // CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 7416 // CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 7417 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 7418 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined, i64 [[TMP1]]) 7419 // CHECK11-NEXT: ret void 7420 // 7421 // 7422 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined 7423 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 7424 // CHECK11-NEXT: entry: 7425 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7426 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7427 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7428 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7429 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 7430 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7431 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7432 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7433 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7434 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7435 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 7436 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7437 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7438 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7439 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7440 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 7441 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7442 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7443 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7444 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 7445 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7446 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7447 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 7448 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7449 // CHECK11: cond.true: 7450 // CHECK11-NEXT: br label [[COND_END:%.*]] 7451 // CHECK11: cond.false: 7452 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7453 // CHECK11-NEXT: br label [[COND_END]] 7454 // CHECK11: cond.end: 7455 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 7456 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7457 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7458 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 7459 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7460 // CHECK11: omp.inner.for.cond: 7461 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]] 7462 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 7463 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 7464 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7465 // CHECK11: omp.inner.for.body: 7466 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]] 7467 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 7468 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 7469 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 7470 // CHECK11-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1, !llvm.access.group [[ACC_GRP54]] 7471 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 7472 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 7473 // CHECK11: omp_if.then: 7474 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]] 7475 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 7476 // CHECK11: omp_if.else: 7477 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 7478 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]] 7479 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]] 7480 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]] 7481 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]] 7482 // CHECK11-NEXT: br label [[OMP_IF_END]] 7483 // CHECK11: omp_if.end: 7484 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7485 // CHECK11: omp.inner.for.inc: 7486 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 7487 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]] 7488 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 7489 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 7490 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]] 7491 // CHECK11: omp.inner.for.end: 7492 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7493 // CHECK11: omp.loop.exit: 7494 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 7495 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7496 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 7497 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7498 // CHECK11: .omp.final.then: 7499 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 7500 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 7501 // CHECK11: .omp.final.done: 7502 // CHECK11-NEXT: ret void 7503 // 7504 // 7505 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.omp_outlined.omp_outlined 7506 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 7507 // CHECK11-NEXT: entry: 7508 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7509 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7510 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7511 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7512 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7513 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 7514 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7515 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7516 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7517 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7518 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 7519 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7520 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7521 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7522 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7523 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7524 // CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7525 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7526 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 7527 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7528 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 7529 // CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7530 // CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 7531 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7532 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7533 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7534 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 7535 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7536 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7537 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 7538 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7539 // CHECK11: cond.true: 7540 // CHECK11-NEXT: br label [[COND_END:%.*]] 7541 // CHECK11: cond.false: 7542 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7543 // CHECK11-NEXT: br label [[COND_END]] 7544 // CHECK11: cond.end: 7545 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 7546 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7547 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7548 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 7549 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7550 // CHECK11: omp.inner.for.cond: 7551 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]] 7552 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]] 7553 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7554 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7555 // CHECK11: omp.inner.for.body: 7556 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 7557 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7558 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7559 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP57]] 7560 // CHECK11-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]] 7561 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7562 // CHECK11: omp.body.continue: 7563 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7564 // CHECK11: omp.inner.for.inc: 7565 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 7566 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 7567 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 7568 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]] 7569 // CHECK11: omp.inner.for.end: 7570 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7571 // CHECK11: omp.loop.exit: 7572 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 7573 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7574 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 7575 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7576 // CHECK11: .omp.final.then: 7577 // CHECK11-NEXT: store i32 100, ptr [[I]], align 4 7578 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 7579 // CHECK11: .omp.final.done: 7580 // CHECK11-NEXT: ret void 7581 // 7582 // 7583 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv 7584 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 7585 // CHECK13-NEXT: entry: 7586 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7587 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7588 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7589 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7590 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7591 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 7592 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 7593 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 7594 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 7595 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 7596 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7597 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7598 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7599 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 7600 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7601 // CHECK13: omp.inner.for.cond: 7602 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 7603 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 7604 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 7605 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7606 // CHECK13: omp.inner.for.body: 7607 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 7608 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 7609 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7610 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 7611 // CHECK13-NEXT: store i32 0, ptr @Arg, align 4, !llvm.access.group [[ACC_GRP2]] 7612 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7613 // CHECK13: omp.body.continue: 7614 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7615 // CHECK13: omp.inner.for.inc: 7616 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 7617 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 7618 // CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 7619 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 7620 // CHECK13: omp.inner.for.end: 7621 // CHECK13-NEXT: store i32 100, ptr [[I]], align 4 7622 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 7623 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 7624 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 7625 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 7626 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 7627 // CHECK13: omp.inner.for.cond7: 7628 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 7629 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]] 7630 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7631 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 7632 // CHECK13: omp.inner.for.body9: 7633 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]] 7634 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 7635 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 7636 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]] 7637 // CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]] 7638 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 7639 // CHECK13: omp.body.continue12: 7640 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 7641 // CHECK13: omp.inner.for.inc13: 7642 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]] 7643 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 7644 // CHECK13-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]] 7645 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]] 7646 // CHECK13: omp.inner.for.end15: 7647 // CHECK13-NEXT: store i32 100, ptr [[I6]], align 4 7648 // CHECK13-NEXT: ret void 7649 // 7650 // 7651 // CHECK13-LABEL: define {{[^@]+}}@main 7652 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] { 7653 // CHECK13-NEXT: entry: 7654 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7655 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7656 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7657 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7658 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7659 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7660 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 7661 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 7662 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 7663 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 7664 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 7665 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 7666 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 7667 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 7668 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 7669 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 7670 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4 7671 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 7672 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7673 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7674 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7675 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 7676 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7677 // CHECK13: omp.inner.for.cond: 7678 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 7679 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 7680 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 7681 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7682 // CHECK13: omp.inner.for.body: 7683 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 7684 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 7685 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7686 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 7687 // CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]] 7688 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7689 // CHECK13: omp.body.continue: 7690 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7691 // CHECK13: omp.inner.for.inc: 7692 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 7693 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 7694 // CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 7695 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 7696 // CHECK13: omp.inner.for.end: 7697 // CHECK13-NEXT: store i32 100, ptr [[I]], align 4 7698 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 7699 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 7700 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 7701 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 7702 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 7703 // CHECK13: omp.inner.for.cond7: 7704 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 7705 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]] 7706 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7707 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 7708 // CHECK13: omp.inner.for.body9: 7709 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]] 7710 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 7711 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 7712 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]] 7713 // CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]] 7714 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 7715 // CHECK13: omp.body.continue12: 7716 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 7717 // CHECK13: omp.inner.for.inc13: 7718 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]] 7719 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 7720 // CHECK13-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]] 7721 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]] 7722 // CHECK13: omp.inner.for.end15: 7723 // CHECK13-NEXT: store i32 100, ptr [[I6]], align 4 7724 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr @Arg, align 4 7725 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 7726 // CHECK13-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 7727 // CHECK13-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 7728 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 7729 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 7730 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 7731 // CHECK13-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 7732 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 7733 // CHECK13: omp.inner.for.cond21: 7734 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 7735 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]] 7736 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 7737 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 7738 // CHECK13: omp.inner.for.body23: 7739 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 7740 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1 7741 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 7742 // CHECK13-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]] 7743 // CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]] 7744 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 7745 // CHECK13: omp.body.continue26: 7746 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 7747 // CHECK13: omp.inner.for.inc27: 7748 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 7749 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1 7750 // CHECK13-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 7751 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]] 7752 // CHECK13: omp.inner.for.end29: 7753 // CHECK13-NEXT: store i32 100, ptr [[I20]], align 4 7754 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr @Arg, align 4 7755 // CHECK13-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]]) 7756 // CHECK13-NEXT: ret i32 [[CALL]] 7757 // 7758 // 7759 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 7760 // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 7761 // CHECK13-NEXT: entry: 7762 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 7763 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7764 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7765 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7766 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7767 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7768 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 7769 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 7770 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 7771 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 7772 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 7773 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 7774 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 7775 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 7776 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 7777 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 7778 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4 7779 // CHECK13-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 7780 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7781 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7782 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7783 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 7784 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7785 // CHECK13: omp.inner.for.cond: 7786 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 7787 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 7788 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 7789 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7790 // CHECK13: omp.inner.for.body: 7791 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 7792 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 7793 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7794 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 7795 // CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]] 7796 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7797 // CHECK13: omp.body.continue: 7798 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7799 // CHECK13: omp.inner.for.inc: 7800 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 7801 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 7802 // CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 7803 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 7804 // CHECK13: omp.inner.for.end: 7805 // CHECK13-NEXT: store i32 100, ptr [[I]], align 4 7806 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 7807 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 7808 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 7809 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 7810 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 7811 // CHECK13: omp.inner.for.cond7: 7812 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 7813 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]] 7814 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7815 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 7816 // CHECK13: omp.inner.for.body9: 7817 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 7818 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 7819 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 7820 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]] 7821 // CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]] 7822 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 7823 // CHECK13: omp.body.continue12: 7824 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 7825 // CHECK13: omp.inner.for.inc13: 7826 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 7827 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 7828 // CHECK13-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]] 7829 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]] 7830 // CHECK13: omp.inner.for.end15: 7831 // CHECK13-NEXT: store i32 100, ptr [[I6]], align 4 7832 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 7833 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 7834 // CHECK13-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 7835 // CHECK13-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 7836 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 7837 // CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 7838 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 7839 // CHECK13-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 7840 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 7841 // CHECK13: omp.inner.for.cond21: 7842 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 7843 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]] 7844 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 7845 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 7846 // CHECK13: omp.inner.for.body23: 7847 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]] 7848 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1 7849 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 7850 // CHECK13-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]] 7851 // CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]] 7852 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 7853 // CHECK13: omp.body.continue26: 7854 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 7855 // CHECK13: omp.inner.for.inc27: 7856 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]] 7857 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1 7858 // CHECK13-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]] 7859 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]] 7860 // CHECK13: omp.inner.for.end29: 7861 // CHECK13-NEXT: store i32 100, ptr [[I20]], align 4 7862 // CHECK13-NEXT: ret i32 0 7863 // 7864 // 7865 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv 7866 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 7867 // CHECK15-NEXT: entry: 7868 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7869 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7870 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7871 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7872 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7873 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 7874 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 7875 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 7876 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 7877 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 7878 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7879 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7880 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7881 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 7882 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7883 // CHECK15: omp.inner.for.cond: 7884 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 7885 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 7886 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 7887 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7888 // CHECK15: omp.inner.for.body: 7889 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 7890 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 7891 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7892 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 7893 // CHECK15-NEXT: store i32 0, ptr @Arg, align 4, !nontemporal [[META3:![0-9]+]], !llvm.access.group [[ACC_GRP2]] 7894 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7895 // CHECK15: omp.body.continue: 7896 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7897 // CHECK15: omp.inner.for.inc: 7898 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 7899 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 7900 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 7901 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 7902 // CHECK15: omp.inner.for.end: 7903 // CHECK15-NEXT: store i32 100, ptr [[I]], align 4 7904 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 7905 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 7906 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 7907 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 7908 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 7909 // CHECK15: omp.inner.for.cond7: 7910 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 7911 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP7]] 7912 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7913 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 7914 // CHECK15: omp.inner.for.body9: 7915 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]] 7916 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 7917 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 7918 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP7]] 7919 // CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP7]] 7920 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 7921 // CHECK15: omp.body.continue12: 7922 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 7923 // CHECK15: omp.inner.for.inc13: 7924 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]] 7925 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 7926 // CHECK15-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]] 7927 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]] 7928 // CHECK15: omp.inner.for.end15: 7929 // CHECK15-NEXT: store i32 100, ptr [[I6]], align 4 7930 // CHECK15-NEXT: ret void 7931 // 7932 // 7933 // CHECK15-LABEL: define {{[^@]+}}@main 7934 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] { 7935 // CHECK15-NEXT: entry: 7936 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7937 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7938 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7939 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7940 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7941 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7942 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 7943 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 7944 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 7945 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 7946 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 7947 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 7948 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 7949 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 7950 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 7951 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 7952 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4 7953 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 7954 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7955 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 7956 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7957 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 7958 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7959 // CHECK15: omp.inner.for.cond: 7960 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 7961 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 7962 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 7963 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7964 // CHECK15: omp.inner.for.body: 7965 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 7966 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 7967 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7968 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 7969 // CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP10]] 7970 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7971 // CHECK15: omp.body.continue: 7972 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7973 // CHECK15: omp.inner.for.inc: 7974 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 7975 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 7976 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 7977 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 7978 // CHECK15: omp.inner.for.end: 7979 // CHECK15-NEXT: store i32 100, ptr [[I]], align 4 7980 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 7981 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 7982 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 7983 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 7984 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 7985 // CHECK15: omp.inner.for.cond7: 7986 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 7987 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4 7988 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7989 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 7990 // CHECK15: omp.inner.for.body9: 7991 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 7992 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 7993 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 7994 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4 7995 // CHECK15-NEXT: call void @_Z3fn5v() 7996 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 7997 // CHECK15: omp.body.continue12: 7998 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 7999 // CHECK15: omp.inner.for.inc13: 8000 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 8001 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 8002 // CHECK15-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4 8003 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]] 8004 // CHECK15: omp.inner.for.end15: 8005 // CHECK15-NEXT: store i32 100, ptr [[I6]], align 4 8006 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr @Arg, align 4 8007 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 8008 // CHECK15-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 8009 // CHECK15-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 8010 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 8011 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 8012 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 8013 // CHECK15-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 8014 // CHECK15-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 8015 // CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1 8016 // CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 8017 // CHECK15: omp_if.then: 8018 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 8019 // CHECK15: omp.inner.for.cond21: 8020 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 8021 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]] 8022 // CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 8023 // CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 8024 // CHECK15: omp.inner.for.body23: 8025 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 8026 // CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 1 8027 // CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 8028 // CHECK15-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]] 8029 // CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]] 8030 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 8031 // CHECK15: omp.body.continue26: 8032 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 8033 // CHECK15: omp.inner.for.inc27: 8034 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 8035 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP16]], 1 8036 // CHECK15-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]] 8037 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]] 8038 // CHECK15: omp.inner.for.end29: 8039 // CHECK15-NEXT: br label [[OMP_IF_END:%.*]] 8040 // CHECK15: omp_if.else: 8041 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND30:%.*]] 8042 // CHECK15: omp.inner.for.cond30: 8043 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4 8044 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4 8045 // CHECK15-NEXT: [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8046 // CHECK15-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]] 8047 // CHECK15: omp.inner.for.body32: 8048 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4 8049 // CHECK15-NEXT: [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 1 8050 // CHECK15-NEXT: [[ADD34:%.*]] = add nsw i32 0, [[MUL33]] 8051 // CHECK15-NEXT: store i32 [[ADD34]], ptr [[I20]], align 4 8052 // CHECK15-NEXT: call void @_Z3fn6v() 8053 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]] 8054 // CHECK15: omp.body.continue35: 8055 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]] 8056 // CHECK15: omp.inner.for.inc36: 8057 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4 8058 // CHECK15-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP20]], 1 8059 // CHECK15-NEXT: store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 4 8060 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP18:![0-9]+]] 8061 // CHECK15: omp.inner.for.end38: 8062 // CHECK15-NEXT: br label [[OMP_IF_END]] 8063 // CHECK15: omp_if.end: 8064 // CHECK15-NEXT: store i32 100, ptr [[I20]], align 4 8065 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr @Arg, align 4 8066 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]]) 8067 // CHECK15-NEXT: ret i32 [[CALL]] 8068 // 8069 // 8070 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 8071 // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 8072 // CHECK15-NEXT: entry: 8073 // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 8074 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8075 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8076 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8077 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8078 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8079 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 8080 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 8081 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 8082 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 8083 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 8084 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 8085 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 8086 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4 8087 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4 8088 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4 8089 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4 8090 // CHECK15-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 8091 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8092 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 8093 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8094 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 8095 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8096 // CHECK15: omp.inner.for.cond: 8097 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 8098 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 8099 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 8100 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8101 // CHECK15: omp.inner.for.body: 8102 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 8103 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 8104 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8105 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]] 8106 // CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP19]] 8107 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8108 // CHECK15: omp.body.continue: 8109 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8110 // CHECK15: omp.inner.for.inc: 8111 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 8112 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1 8113 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 8114 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 8115 // CHECK15: omp.inner.for.end: 8116 // CHECK15-NEXT: store i32 100, ptr [[I]], align 4 8117 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 4 8118 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 4 8119 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4 8120 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4 8121 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 8122 // CHECK15: omp.inner.for.cond7: 8123 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 8124 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4 8125 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8126 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]] 8127 // CHECK15: omp.inner.for.body9: 8128 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 8129 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1 8130 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 8131 // CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4 8132 // CHECK15-NEXT: call void @_Z3fn2v() 8133 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]] 8134 // CHECK15: omp.body.continue12: 8135 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]] 8136 // CHECK15: omp.inner.for.inc13: 8137 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4 8138 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1 8139 // CHECK15-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4 8140 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]] 8141 // CHECK15: omp.inner.for.end15: 8142 // CHECK15-NEXT: store i32 100, ptr [[I6]], align 4 8143 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 8144 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0 8145 // CHECK15-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 8146 // CHECK15-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 8147 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 4 8148 // CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 4 8149 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4 8150 // CHECK15-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4 8151 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]] 8152 // CHECK15: omp.inner.for.cond21: 8153 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 8154 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP23]] 8155 // CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 8156 // CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]] 8157 // CHECK15: omp.inner.for.body23: 8158 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]] 8159 // CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1 8160 // CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]] 8161 // CHECK15-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP23]] 8162 // CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP23]] 8163 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]] 8164 // CHECK15: omp.body.continue26: 8165 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]] 8166 // CHECK15: omp.inner.for.inc27: 8167 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]] 8168 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1 8169 // CHECK15-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]] 8170 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP24:![0-9]+]] 8171 // CHECK15: omp.inner.for.end29: 8172 // CHECK15-NEXT: store i32 100, ptr [[I20]], align 4 8173 // CHECK15-NEXT: ret i32 0 8174 // 8175