1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 21 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 28 #ifdef CK1 29 30 template <typename T, int X, long long Y> 31 struct SS{ 32 T a[X]; 33 float b; 34 int foo(void) { 35 36 #pragma omp target teams distribute parallel for 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 #pragma omp target teams distribute parallel for schedule(static) 41 for(int i = 0; i < X; i++) { 42 a[i] = (T)0; 43 } 44 #pragma omp target teams distribute parallel for schedule(static, X/2) 45 for(int i = 0; i < X; i++) { 46 a[i] = (T)0; 47 } 48 49 #pragma omp target teams distribute parallel for schedule(dynamic) 50 for(int i = 0; i < X; i++) { 51 a[i] = (T)0; 52 } 53 54 #pragma omp target teams distribute parallel for schedule(dynamic, X/2) 55 for(int i = 0; i < X; i++) { 56 a[i] = (T)0; 57 } 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 return a[0]; 75 } 76 }; 77 78 int teams_template_struct(void) { 79 SS<int, 123, 456> V; 80 return V.foo(); 81 82 } 83 #endif // CK1 84 85 // Test host codegen. 86 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 87 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 88 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 89 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 90 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 91 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 92 93 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17 96 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 97 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 98 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19 99 100 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 101 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 103 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 104 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 106 #ifdef CK2 107 108 template <typename T, int n> 109 int tmain(T argc) { 110 T a[n]; 111 int m = 10; 112 #pragma omp target teams distribute parallel for 113 for(int i = 0; i < n; i++) { 114 a[i] = (T)0; 115 } 116 #pragma omp target teams distribute parallel for schedule(static) 117 for(int i = 0; i < n; i++) { 118 a[i] = (T)0; 119 } 120 #pragma omp target teams distribute parallel for schedule(static, m) 121 for(int i = 0; i < n; i++) { 122 a[i] = (T)0; 123 } 124 #pragma omp target teams distribute parallel for schedule(dynamic) 125 for(int i = 0; i < n; i++) { 126 a[i] = (T)0; 127 } 128 #pragma omp target teams distribute parallel for schedule(dynamic, m) 129 for(int i = 0; i < n; i++) { 130 a[i] = (T)0; 131 } 132 return 0; 133 } 134 135 int main (int argc, char **argv) { 136 int n = 100; 137 int a[n]; 138 int m = 10; 139 #pragma omp target teams distribute parallel for 140 for(int i = 0; i < n; i++) { 141 a[i] = 0; 142 } 143 #pragma omp target teams distribute parallel for dist_schedule(static) 144 for(int i = 0; i < n; i++) { 145 a[i] = 0; 146 } 147 #pragma omp target teams distribute parallel for dist_schedule(static, m) 148 for(int i = 0; i < n; i++) { 149 a[i] = 0; 150 } 151 #pragma omp target teams distribute parallel for schedule(dynamic) 152 for(int i = 0; i < n; i++) { 153 a[i] = 0; 154 } 155 #pragma omp target teams distribute parallel for schedule(dynamic, m) 156 for(int i = 0; i < n; i++) { 157 a[i] = 0; 158 } 159 return tmain<int, 10>(argc); 160 } 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 #endif // CK2 196 #endif // #ifndef HEADER 197 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 198 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 199 // CHECK1-NEXT: entry: 200 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 201 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 202 // CHECK1-NEXT: ret i32 [[CALL]] 203 // 204 // 205 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 206 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 207 // CHECK1-NEXT: entry: 208 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 209 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 210 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 211 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 212 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 214 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8 215 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8 216 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8 217 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 219 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8 220 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8 221 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8 222 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 223 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 224 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8 225 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8 226 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8 227 // CHECK1-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 228 // CHECK1-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8 230 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8 231 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8 232 // CHECK1-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 234 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 235 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 236 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 237 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 238 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 239 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 240 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 241 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 242 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 243 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 244 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 245 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 246 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 247 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 248 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 249 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 250 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 251 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 252 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 253 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 254 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 255 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 256 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 257 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 258 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 259 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 260 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 261 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 262 // CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8 263 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 264 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 265 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 266 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 267 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 268 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 269 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 270 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 271 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 272 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 273 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 274 // CHECK1: omp_offload.failed: 275 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 276 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 277 // CHECK1: omp_offload.cont: 278 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 279 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 280 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8 281 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 282 // CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8 283 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 284 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 285 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 286 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 287 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 288 // CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4 289 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 290 // CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4 291 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 292 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 293 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 294 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 295 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 296 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 297 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 298 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 299 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 300 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 301 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 302 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 303 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 304 // CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8 305 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 306 // CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8 307 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 308 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 309 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 310 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 311 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 312 // CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4 313 // CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 314 // CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 315 // CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 316 // CHECK1: omp_offload.failed8: 317 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 318 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]] 319 // CHECK1: omp_offload.cont9: 320 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 321 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 322 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8 323 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 324 // CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8 325 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 326 // CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8 327 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 328 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 329 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 330 // CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4 331 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 332 // CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4 333 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 334 // CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 335 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 336 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 337 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 338 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 339 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 340 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 341 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 342 // CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8 343 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 344 // CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8 345 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 346 // CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8 347 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 348 // CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8 349 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 350 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 351 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 352 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 353 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 354 // CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4 355 // CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 356 // CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 357 // CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 358 // CHECK1: omp_offload.failed16: 359 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 360 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]] 361 // CHECK1: omp_offload.cont17: 362 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 363 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 364 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 8 365 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 366 // CHECK1-NEXT: store ptr [[A18]], ptr [[TMP61]], align 8 367 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0 368 // CHECK1-NEXT: store ptr null, ptr [[TMP62]], align 8 369 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 370 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 371 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 372 // CHECK1-NEXT: store i32 3, ptr [[TMP65]], align 4 373 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 374 // CHECK1-NEXT: store i32 1, ptr [[TMP66]], align 4 375 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 376 // CHECK1-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8 377 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 378 // CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8 379 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 380 // CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8 381 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 382 // CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8 383 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 384 // CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 8 385 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 386 // CHECK1-NEXT: store ptr null, ptr [[TMP72]], align 8 387 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 388 // CHECK1-NEXT: store i64 123, ptr [[TMP73]], align 8 389 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 390 // CHECK1-NEXT: store i64 0, ptr [[TMP74]], align 8 391 // CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 392 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 393 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 394 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 395 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 396 // CHECK1-NEXT: store i32 0, ptr [[TMP77]], align 4 397 // CHECK1-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 398 // CHECK1-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 399 // CHECK1-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 400 // CHECK1: omp_offload.failed24: 401 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 402 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT25]] 403 // CHECK1: omp_offload.cont25: 404 // CHECK1-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 405 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 406 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 8 407 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 408 // CHECK1-NEXT: store ptr [[A26]], ptr [[TMP81]], align 8 409 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0 410 // CHECK1-NEXT: store ptr null, ptr [[TMP82]], align 8 411 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 412 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 413 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 414 // CHECK1-NEXT: store i32 3, ptr [[TMP85]], align 4 415 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 416 // CHECK1-NEXT: store i32 1, ptr [[TMP86]], align 4 417 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 418 // CHECK1-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8 419 // CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 420 // CHECK1-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8 421 // CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 422 // CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8 423 // CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 424 // CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8 425 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 426 // CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 8 427 // CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 428 // CHECK1-NEXT: store ptr null, ptr [[TMP92]], align 8 429 // CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 430 // CHECK1-NEXT: store i64 123, ptr [[TMP93]], align 8 431 // CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 432 // CHECK1-NEXT: store i64 0, ptr [[TMP94]], align 8 433 // CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 434 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 435 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 436 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 437 // CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 438 // CHECK1-NEXT: store i32 0, ptr [[TMP97]], align 4 439 // CHECK1-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 440 // CHECK1-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 441 // CHECK1-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 442 // CHECK1: omp_offload.failed32: 443 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 444 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT33]] 445 // CHECK1: omp_offload.cont33: 446 // CHECK1-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 447 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0 448 // CHECK1-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 449 // CHECK1-NEXT: ret i32 [[TMP100]] 450 // 451 // 452 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 453 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 454 // CHECK1-NEXT: entry: 455 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 456 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 457 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 458 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 459 // CHECK1-NEXT: ret void 460 // 461 // 462 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 463 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 464 // CHECK1-NEXT: entry: 465 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 466 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 467 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 468 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 471 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 472 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 475 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 476 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 477 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 478 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 479 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 480 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 481 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 482 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 483 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 484 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 485 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 486 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 487 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 488 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 489 // CHECK1: cond.true: 490 // CHECK1-NEXT: br label [[COND_END:%.*]] 491 // CHECK1: cond.false: 492 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 493 // CHECK1-NEXT: br label [[COND_END]] 494 // CHECK1: cond.end: 495 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 496 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 497 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 498 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 499 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 500 // CHECK1: omp.inner.for.cond: 501 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 502 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 503 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 504 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 505 // CHECK1: omp.inner.for.body: 506 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 507 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 508 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 509 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 510 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 512 // CHECK1: omp.inner.for.inc: 513 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 514 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 515 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 516 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 517 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 518 // CHECK1: omp.inner.for.end: 519 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 520 // CHECK1: omp.loop.exit: 521 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 522 // CHECK1-NEXT: ret void 523 // 524 // 525 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 526 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 527 // CHECK1-NEXT: entry: 528 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 529 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 530 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 531 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 532 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 533 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 534 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 535 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 536 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 537 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 538 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 539 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 540 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 541 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 542 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 543 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 544 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 545 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 546 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 547 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 548 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 549 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 550 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 551 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 552 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 553 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 554 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 555 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 556 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 557 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 558 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 559 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 560 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 561 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 562 // CHECK1: cond.true: 563 // CHECK1-NEXT: br label [[COND_END:%.*]] 564 // CHECK1: cond.false: 565 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 566 // CHECK1-NEXT: br label [[COND_END]] 567 // CHECK1: cond.end: 568 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 569 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 570 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 571 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 572 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 573 // CHECK1: omp.inner.for.cond: 574 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 575 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 576 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 577 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 578 // CHECK1: omp.inner.for.body: 579 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 580 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 581 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 582 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 583 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 584 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 585 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 586 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 587 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 588 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 589 // CHECK1: omp.body.continue: 590 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 591 // CHECK1: omp.inner.for.inc: 592 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 593 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 594 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 595 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 596 // CHECK1: omp.inner.for.end: 597 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 598 // CHECK1: omp.loop.exit: 599 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 600 // CHECK1-NEXT: ret void 601 // 602 // 603 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 604 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 605 // CHECK1-NEXT: entry: 606 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 607 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 608 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 609 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 610 // CHECK1-NEXT: ret void 611 // 612 // 613 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 614 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 615 // CHECK1-NEXT: entry: 616 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 617 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 618 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 619 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 620 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 621 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 622 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 623 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 624 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 625 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 626 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 627 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 628 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 629 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 630 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 631 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 632 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 633 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 634 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 635 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 636 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 637 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 638 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 639 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 640 // CHECK1: cond.true: 641 // CHECK1-NEXT: br label [[COND_END:%.*]] 642 // CHECK1: cond.false: 643 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 644 // CHECK1-NEXT: br label [[COND_END]] 645 // CHECK1: cond.end: 646 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 647 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 648 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 649 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 651 // CHECK1: omp.inner.for.cond: 652 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 653 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 654 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 655 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 656 // CHECK1: omp.inner.for.body: 657 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 658 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 659 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 660 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 661 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 662 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 663 // CHECK1: omp.inner.for.inc: 664 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 665 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 666 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 667 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 669 // CHECK1: omp.inner.for.end: 670 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 671 // CHECK1: omp.loop.exit: 672 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 673 // CHECK1-NEXT: ret void 674 // 675 // 676 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 677 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 678 // CHECK1-NEXT: entry: 679 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 680 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 681 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 682 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 683 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 684 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 685 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 686 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 687 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 688 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 689 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 690 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 691 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 692 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 693 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 694 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 695 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 696 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 697 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 698 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 699 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 700 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 701 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 702 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 703 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 704 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 705 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 706 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 707 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 708 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 709 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 710 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 711 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 712 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 713 // CHECK1: cond.true: 714 // CHECK1-NEXT: br label [[COND_END:%.*]] 715 // CHECK1: cond.false: 716 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 717 // CHECK1-NEXT: br label [[COND_END]] 718 // CHECK1: cond.end: 719 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 720 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 721 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 722 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 723 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 724 // CHECK1: omp.inner.for.cond: 725 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 726 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 727 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 728 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 729 // CHECK1: omp.inner.for.body: 730 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 731 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 732 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 733 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 734 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 735 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 736 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 737 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 738 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 739 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 740 // CHECK1: omp.body.continue: 741 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 742 // CHECK1: omp.inner.for.inc: 743 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 744 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 745 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 746 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 747 // CHECK1: omp.inner.for.end: 748 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 749 // CHECK1: omp.loop.exit: 750 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 751 // CHECK1-NEXT: ret void 752 // 753 // 754 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 755 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 756 // CHECK1-NEXT: entry: 757 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 758 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 759 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 760 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 761 // CHECK1-NEXT: ret void 762 // 763 // 764 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 765 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 766 // CHECK1-NEXT: entry: 767 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 768 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 769 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 770 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 771 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 772 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 773 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 774 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 775 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 776 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 777 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 778 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 779 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 780 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 781 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 782 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 783 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 784 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 785 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 786 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 787 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 788 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 789 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 790 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 791 // CHECK1: cond.true: 792 // CHECK1-NEXT: br label [[COND_END:%.*]] 793 // CHECK1: cond.false: 794 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 795 // CHECK1-NEXT: br label [[COND_END]] 796 // CHECK1: cond.end: 797 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 798 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 799 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 800 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 801 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 802 // CHECK1: omp.inner.for.cond: 803 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 804 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 805 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 806 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 807 // CHECK1: omp.inner.for.body: 808 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 809 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 810 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 811 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 812 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 813 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 814 // CHECK1: omp.inner.for.inc: 815 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 816 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 817 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 818 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 819 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 820 // CHECK1: omp.inner.for.end: 821 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 822 // CHECK1: omp.loop.exit: 823 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 824 // CHECK1-NEXT: ret void 825 // 826 // 827 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 828 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 829 // CHECK1-NEXT: entry: 830 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 831 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 832 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 833 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 834 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 835 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 836 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 837 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 838 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 839 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 840 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 841 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 842 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 843 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 844 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 845 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 846 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 847 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 848 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 849 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 850 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 851 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 852 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 853 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 854 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 855 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 856 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 857 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 858 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 859 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 860 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 861 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 862 // CHECK1: omp.dispatch.cond: 863 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 864 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 865 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 866 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 867 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 868 // CHECK1: cond.true: 869 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 870 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 871 // CHECK1-NEXT: br label [[COND_END:%.*]] 872 // CHECK1: cond.false: 873 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 874 // CHECK1-NEXT: br label [[COND_END]] 875 // CHECK1: cond.end: 876 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 877 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 878 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 879 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 880 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 881 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 882 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 883 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 884 // CHECK1: omp.dispatch.body: 885 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 886 // CHECK1: omp.inner.for.cond: 887 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 888 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 889 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 890 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 891 // CHECK1: omp.inner.for.body: 892 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 893 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 894 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 895 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 896 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 897 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 898 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 899 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 900 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 901 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 902 // CHECK1: omp.body.continue: 903 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 904 // CHECK1: omp.inner.for.inc: 905 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 906 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 907 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 908 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 909 // CHECK1: omp.inner.for.end: 910 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 911 // CHECK1: omp.dispatch.inc: 912 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 913 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 914 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 915 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 916 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 917 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 918 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 919 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 920 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 921 // CHECK1: omp.dispatch.end: 922 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 923 // CHECK1-NEXT: ret void 924 // 925 // 926 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 927 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 928 // CHECK1-NEXT: entry: 929 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 930 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 931 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 932 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 933 // CHECK1-NEXT: ret void 934 // 935 // 936 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 937 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 938 // CHECK1-NEXT: entry: 939 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 940 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 941 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 942 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 943 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 944 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 945 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 946 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 947 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 948 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 949 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 950 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 951 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 952 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 953 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 954 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 955 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 956 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 957 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 958 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 959 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 960 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 961 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 962 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 963 // CHECK1: cond.true: 964 // CHECK1-NEXT: br label [[COND_END:%.*]] 965 // CHECK1: cond.false: 966 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 967 // CHECK1-NEXT: br label [[COND_END]] 968 // CHECK1: cond.end: 969 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 970 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 971 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 972 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 973 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 974 // CHECK1: omp.inner.for.cond: 975 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 976 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 977 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 978 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 979 // CHECK1: omp.inner.for.body: 980 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 981 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 982 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 983 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 984 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 985 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 986 // CHECK1: omp.inner.for.inc: 987 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 988 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 989 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 990 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 991 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 992 // CHECK1: omp.inner.for.end: 993 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 994 // CHECK1: omp.loop.exit: 995 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 996 // CHECK1-NEXT: ret void 997 // 998 // 999 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 1000 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1001 // CHECK1-NEXT: entry: 1002 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1003 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1004 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1005 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1006 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1007 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1008 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1009 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1010 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1011 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1012 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1013 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1014 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1015 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1016 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1017 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1018 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1019 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1020 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1021 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1022 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1023 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1024 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1025 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1026 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1027 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1028 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1029 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1030 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1031 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1032 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1033 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1034 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 1035 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1036 // CHECK1: omp.dispatch.cond: 1037 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 1038 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1039 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1040 // CHECK1: omp.dispatch.body: 1041 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1042 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1043 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1044 // CHECK1: omp.inner.for.cond: 1045 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 1046 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 1047 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1048 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1049 // CHECK1: omp.inner.for.body: 1050 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 1051 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1052 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1053 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 1054 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1055 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 1056 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1057 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 1058 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 1059 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1060 // CHECK1: omp.body.continue: 1061 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1062 // CHECK1: omp.inner.for.inc: 1063 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 1064 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1065 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 1066 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 1067 // CHECK1: omp.inner.for.end: 1068 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1069 // CHECK1: omp.dispatch.inc: 1070 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1071 // CHECK1: omp.dispatch.end: 1072 // CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 1073 // CHECK1-NEXT: ret void 1074 // 1075 // 1076 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 1077 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1078 // CHECK1-NEXT: entry: 1079 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1080 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1081 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1082 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 1083 // CHECK1-NEXT: ret void 1084 // 1085 // 1086 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 1087 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1088 // CHECK1-NEXT: entry: 1089 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1090 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1091 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1092 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1093 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1094 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1095 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1096 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1097 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1098 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1099 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1100 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1101 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1102 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1103 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1104 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1105 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1106 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1107 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1108 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1109 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1110 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1111 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1112 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1113 // CHECK1: cond.true: 1114 // CHECK1-NEXT: br label [[COND_END:%.*]] 1115 // CHECK1: cond.false: 1116 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1117 // CHECK1-NEXT: br label [[COND_END]] 1118 // CHECK1: cond.end: 1119 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1120 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1121 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1122 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1123 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1124 // CHECK1: omp.inner.for.cond: 1125 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1126 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1127 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1128 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1129 // CHECK1: omp.inner.for.body: 1130 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1131 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1132 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1133 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1134 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 1135 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1136 // CHECK1: omp.inner.for.inc: 1137 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1138 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1139 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1140 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1141 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1142 // CHECK1: omp.inner.for.end: 1143 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1144 // CHECK1: omp.loop.exit: 1145 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1146 // CHECK1-NEXT: ret void 1147 // 1148 // 1149 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 1150 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1151 // CHECK1-NEXT: entry: 1152 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1153 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1154 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1155 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1156 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1157 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1158 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1159 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1160 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1161 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1162 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1163 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1164 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1165 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1166 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1167 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1168 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1169 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1170 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1171 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1172 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1173 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1174 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1175 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1176 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1177 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1178 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1179 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1180 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1181 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1182 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1183 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1184 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1185 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1186 // CHECK1: omp.dispatch.cond: 1187 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 1188 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1189 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1190 // CHECK1: omp.dispatch.body: 1191 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1192 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1193 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1194 // CHECK1: omp.inner.for.cond: 1195 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 1196 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 1197 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1198 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1199 // CHECK1: omp.inner.for.body: 1200 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1201 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1202 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1203 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 1204 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1205 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 1206 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1207 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 1208 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 1209 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1210 // CHECK1: omp.body.continue: 1211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1212 // CHECK1: omp.inner.for.inc: 1213 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1214 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1215 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1217 // CHECK1: omp.inner.for.end: 1218 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1219 // CHECK1: omp.dispatch.inc: 1220 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1221 // CHECK1: omp.dispatch.end: 1222 // CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 1223 // CHECK1-NEXT: ret void 1224 // 1225 // 1226 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1227 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1228 // CHECK3-NEXT: entry: 1229 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1230 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 1231 // CHECK3-NEXT: ret i32 [[CALL]] 1232 // 1233 // 1234 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1235 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1236 // CHECK3-NEXT: entry: 1237 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1238 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1239 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1240 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1241 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1242 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1243 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4 1244 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4 1245 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4 1246 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1247 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1248 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4 1249 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4 1250 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4 1251 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 1252 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1253 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4 1254 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4 1255 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4 1256 // CHECK3-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 1257 // CHECK3-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1258 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4 1259 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4 1260 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4 1261 // CHECK3-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 1262 // CHECK3-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1263 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1264 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1265 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 1266 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1267 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 1268 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1269 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 1270 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1271 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 1272 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1273 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1274 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1275 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 1276 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1277 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 1278 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1279 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 1280 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1281 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1282 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1283 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 1284 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1285 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 1286 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1287 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 1288 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1289 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 1290 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1291 // CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 8 1292 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1293 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 1294 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1295 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1296 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1297 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1298 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1299 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 1300 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 1301 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1302 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1303 // CHECK3: omp_offload.failed: 1304 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 1305 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1306 // CHECK3: omp_offload.cont: 1307 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1308 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1309 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4 1310 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1311 // CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4 1312 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 1313 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4 1314 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1315 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1316 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 1317 // CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 4 1318 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 1319 // CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4 1320 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 1321 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 1322 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 1323 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 1324 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 1325 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 1326 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 1327 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 1328 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 1329 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 1330 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 1331 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4 1332 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 1333 // CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 8 1334 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 1335 // CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8 1336 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 1337 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 1338 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 1339 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 1340 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 1341 // CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4 1342 // CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 1343 // CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 1344 // CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 1345 // CHECK3: omp_offload.failed8: 1346 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 1347 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]] 1348 // CHECK3: omp_offload.cont9: 1349 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1350 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 1351 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4 1352 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 1353 // CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4 1354 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 1355 // CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4 1356 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 1357 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 1358 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 1359 // CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 4 1360 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 1361 // CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4 1362 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 1363 // CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 1364 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 1365 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 1366 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 1367 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 1368 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 1369 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 1370 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 1371 // CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4 1372 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 1373 // CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4 1374 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 1375 // CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 8 1376 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 1377 // CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8 1378 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 1379 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 1380 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 1381 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 1382 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 1383 // CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4 1384 // CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 1385 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 1386 // CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1387 // CHECK3: omp_offload.failed16: 1388 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 1389 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1390 // CHECK3: omp_offload.cont17: 1391 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1392 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1393 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 4 1394 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1395 // CHECK3-NEXT: store ptr [[A18]], ptr [[TMP61]], align 4 1396 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 1397 // CHECK3-NEXT: store ptr null, ptr [[TMP62]], align 4 1398 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1399 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1400 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 1401 // CHECK3-NEXT: store i32 3, ptr [[TMP65]], align 4 1402 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 1403 // CHECK3-NEXT: store i32 1, ptr [[TMP66]], align 4 1404 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 1405 // CHECK3-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 4 1406 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 1407 // CHECK3-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 4 1408 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 1409 // CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 4 1410 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 1411 // CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4 1412 // CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 1413 // CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 4 1414 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 1415 // CHECK3-NEXT: store ptr null, ptr [[TMP72]], align 4 1416 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 1417 // CHECK3-NEXT: store i64 123, ptr [[TMP73]], align 8 1418 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 1419 // CHECK3-NEXT: store i64 0, ptr [[TMP74]], align 8 1420 // CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 1421 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 1422 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 1423 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 1424 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 1425 // CHECK3-NEXT: store i32 0, ptr [[TMP77]], align 4 1426 // CHECK3-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 1427 // CHECK3-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 1428 // CHECK3-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 1429 // CHECK3: omp_offload.failed24: 1430 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 1431 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT25]] 1432 // CHECK3: omp_offload.cont25: 1433 // CHECK3-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1434 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 1435 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 4 1436 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 1437 // CHECK3-NEXT: store ptr [[A26]], ptr [[TMP81]], align 4 1438 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0 1439 // CHECK3-NEXT: store ptr null, ptr [[TMP82]], align 4 1440 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 1441 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 1442 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 1443 // CHECK3-NEXT: store i32 3, ptr [[TMP85]], align 4 1444 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 1445 // CHECK3-NEXT: store i32 1, ptr [[TMP86]], align 4 1446 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 1447 // CHECK3-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 4 1448 // CHECK3-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 1449 // CHECK3-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 4 1450 // CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 1451 // CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 4 1452 // CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 1453 // CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4 1454 // CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 1455 // CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 4 1456 // CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 1457 // CHECK3-NEXT: store ptr null, ptr [[TMP92]], align 4 1458 // CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 1459 // CHECK3-NEXT: store i64 123, ptr [[TMP93]], align 8 1460 // CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 1461 // CHECK3-NEXT: store i64 0, ptr [[TMP94]], align 8 1462 // CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 1463 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 1464 // CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 1465 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 1466 // CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 1467 // CHECK3-NEXT: store i32 0, ptr [[TMP97]], align 4 1468 // CHECK3-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 1469 // CHECK3-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 1470 // CHECK3-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 1471 // CHECK3: omp_offload.failed32: 1472 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 1473 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT33]] 1474 // CHECK3: omp_offload.cont33: 1475 // CHECK3-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 1476 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0 1477 // CHECK3-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 1478 // CHECK3-NEXT: ret i32 [[TMP100]] 1479 // 1480 // 1481 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 1482 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1483 // CHECK3-NEXT: entry: 1484 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1485 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1486 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1487 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 1488 // CHECK3-NEXT: ret void 1489 // 1490 // 1491 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 1492 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1493 // CHECK3-NEXT: entry: 1494 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1495 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1496 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1497 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1498 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1499 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1500 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1501 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1502 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1503 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1504 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1505 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1506 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1507 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1508 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1509 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1510 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1511 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1512 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1513 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1514 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1515 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1516 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1517 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1518 // CHECK3: cond.true: 1519 // CHECK3-NEXT: br label [[COND_END:%.*]] 1520 // CHECK3: cond.false: 1521 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1522 // CHECK3-NEXT: br label [[COND_END]] 1523 // CHECK3: cond.end: 1524 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1525 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1526 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1527 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1528 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1529 // CHECK3: omp.inner.for.cond: 1530 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1531 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1532 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1533 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1534 // CHECK3: omp.inner.for.body: 1535 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1536 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1537 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 1538 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1539 // CHECK3: omp.inner.for.inc: 1540 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1541 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1542 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1543 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1544 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1545 // CHECK3: omp.inner.for.end: 1546 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1547 // CHECK3: omp.loop.exit: 1548 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1549 // CHECK3-NEXT: ret void 1550 // 1551 // 1552 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 1553 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1554 // CHECK3-NEXT: entry: 1555 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1556 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1557 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1558 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1559 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1560 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1561 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1562 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1563 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1564 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1565 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1566 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1567 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1568 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1569 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1570 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1571 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1572 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1573 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1574 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1575 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1576 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1577 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1578 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1579 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1580 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1581 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1582 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1583 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1584 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1585 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1586 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1587 // CHECK3: cond.true: 1588 // CHECK3-NEXT: br label [[COND_END:%.*]] 1589 // CHECK3: cond.false: 1590 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1591 // CHECK3-NEXT: br label [[COND_END]] 1592 // CHECK3: cond.end: 1593 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1594 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1595 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1596 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1597 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1598 // CHECK3: omp.inner.for.cond: 1599 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1600 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1601 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1602 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1603 // CHECK3: omp.inner.for.body: 1604 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1605 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1606 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1607 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1608 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1609 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1610 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1611 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 1612 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1613 // CHECK3: omp.body.continue: 1614 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1615 // CHECK3: omp.inner.for.inc: 1616 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1617 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1618 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 1619 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1620 // CHECK3: omp.inner.for.end: 1621 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1622 // CHECK3: omp.loop.exit: 1623 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1624 // CHECK3-NEXT: ret void 1625 // 1626 // 1627 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 1628 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1629 // CHECK3-NEXT: entry: 1630 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1631 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1632 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1633 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 1634 // CHECK3-NEXT: ret void 1635 // 1636 // 1637 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 1638 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1639 // CHECK3-NEXT: entry: 1640 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1641 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1642 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1643 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1644 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1645 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1646 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1647 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1648 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1649 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1650 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1651 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1652 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1653 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1654 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1655 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1656 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1657 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1658 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1659 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1660 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1661 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1662 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1663 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1664 // CHECK3: cond.true: 1665 // CHECK3-NEXT: br label [[COND_END:%.*]] 1666 // CHECK3: cond.false: 1667 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1668 // CHECK3-NEXT: br label [[COND_END]] 1669 // CHECK3: cond.end: 1670 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1671 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1672 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1673 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1674 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1675 // CHECK3: omp.inner.for.cond: 1676 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1677 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1678 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1679 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1680 // CHECK3: omp.inner.for.body: 1681 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1682 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1683 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 1684 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1685 // CHECK3: omp.inner.for.inc: 1686 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1687 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1688 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1689 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1690 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1691 // CHECK3: omp.inner.for.end: 1692 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1693 // CHECK3: omp.loop.exit: 1694 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1695 // CHECK3-NEXT: ret void 1696 // 1697 // 1698 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 1699 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1700 // CHECK3-NEXT: entry: 1701 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1702 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1703 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1704 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1705 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1706 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1707 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1708 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1709 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1710 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1711 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1712 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1713 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1714 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1715 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1716 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1717 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1718 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1719 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1720 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1721 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1722 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1723 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1724 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1725 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1726 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1727 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1728 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1729 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1730 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1731 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1732 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1733 // CHECK3: cond.true: 1734 // CHECK3-NEXT: br label [[COND_END:%.*]] 1735 // CHECK3: cond.false: 1736 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1737 // CHECK3-NEXT: br label [[COND_END]] 1738 // CHECK3: cond.end: 1739 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1740 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1741 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1742 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1743 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1744 // CHECK3: omp.inner.for.cond: 1745 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1746 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1747 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1748 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1749 // CHECK3: omp.inner.for.body: 1750 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1751 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1752 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1753 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1754 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1755 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1756 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 1757 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 1758 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1759 // CHECK3: omp.body.continue: 1760 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1761 // CHECK3: omp.inner.for.inc: 1762 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1763 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1764 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 1765 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1766 // CHECK3: omp.inner.for.end: 1767 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1768 // CHECK3: omp.loop.exit: 1769 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1770 // CHECK3-NEXT: ret void 1771 // 1772 // 1773 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 1774 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1775 // CHECK3-NEXT: entry: 1776 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1777 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1778 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1779 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 1780 // CHECK3-NEXT: ret void 1781 // 1782 // 1783 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 1784 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1785 // CHECK3-NEXT: entry: 1786 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1787 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1788 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1789 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1790 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1791 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1792 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1793 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1794 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1795 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1796 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1797 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1798 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1799 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1800 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1801 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1802 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1803 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1804 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1805 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1806 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1807 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1808 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1809 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1810 // CHECK3: cond.true: 1811 // CHECK3-NEXT: br label [[COND_END:%.*]] 1812 // CHECK3: cond.false: 1813 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1814 // CHECK3-NEXT: br label [[COND_END]] 1815 // CHECK3: cond.end: 1816 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1817 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1818 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1819 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1820 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1821 // CHECK3: omp.inner.for.cond: 1822 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1823 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1824 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1825 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1826 // CHECK3: omp.inner.for.body: 1827 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1828 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1829 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 1830 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1831 // CHECK3: omp.inner.for.inc: 1832 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1833 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1834 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1835 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1836 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1837 // CHECK3: omp.inner.for.end: 1838 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1839 // CHECK3: omp.loop.exit: 1840 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1841 // CHECK3-NEXT: ret void 1842 // 1843 // 1844 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 1845 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1846 // CHECK3-NEXT: entry: 1847 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1848 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1849 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1850 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1851 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1852 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1853 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1854 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1855 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1856 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1857 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1858 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1859 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1860 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1861 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1862 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1863 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1864 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1865 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1866 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 1867 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1868 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1869 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1870 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1871 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1872 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1873 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1874 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1875 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 1876 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1877 // CHECK3: omp.dispatch.cond: 1878 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1879 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1880 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 1881 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1882 // CHECK3: cond.true: 1883 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1884 // CHECK3-NEXT: br label [[COND_END:%.*]] 1885 // CHECK3: cond.false: 1886 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1887 // CHECK3-NEXT: br label [[COND_END]] 1888 // CHECK3: cond.end: 1889 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1890 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1891 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1892 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 1893 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1894 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1895 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1896 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1897 // CHECK3: omp.dispatch.body: 1898 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1899 // CHECK3: omp.inner.for.cond: 1900 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1901 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1902 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1903 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1904 // CHECK3: omp.inner.for.body: 1905 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1906 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 1907 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1908 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1909 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 1910 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 1911 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]] 1912 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 1913 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1914 // CHECK3: omp.body.continue: 1915 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1916 // CHECK3: omp.inner.for.inc: 1917 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1918 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 1919 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1920 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1921 // CHECK3: omp.inner.for.end: 1922 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1923 // CHECK3: omp.dispatch.inc: 1924 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1925 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1926 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1927 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 1928 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1929 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1930 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1931 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 1932 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 1933 // CHECK3: omp.dispatch.end: 1934 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1935 // CHECK3-NEXT: ret void 1936 // 1937 // 1938 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 1939 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1940 // CHECK3-NEXT: entry: 1941 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1942 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1943 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1944 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 1945 // CHECK3-NEXT: ret void 1946 // 1947 // 1948 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 1949 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1950 // CHECK3-NEXT: entry: 1951 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1952 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1953 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1954 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1955 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1956 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1957 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1958 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1959 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1960 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1961 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1962 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1963 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1964 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1965 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1966 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 1967 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1968 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1969 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1970 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1971 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1972 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1973 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1974 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1975 // CHECK3: cond.true: 1976 // CHECK3-NEXT: br label [[COND_END:%.*]] 1977 // CHECK3: cond.false: 1978 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1979 // CHECK3-NEXT: br label [[COND_END]] 1980 // CHECK3: cond.end: 1981 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1982 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1983 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1984 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1985 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1986 // CHECK3: omp.inner.for.cond: 1987 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1988 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1989 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1990 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1991 // CHECK3: omp.inner.for.body: 1992 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1993 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1994 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 1995 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1996 // CHECK3: omp.inner.for.inc: 1997 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1998 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1999 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2000 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2001 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2002 // CHECK3: omp.inner.for.end: 2003 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2004 // CHECK3: omp.loop.exit: 2005 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2006 // CHECK3-NEXT: ret void 2007 // 2008 // 2009 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 2010 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2011 // CHECK3-NEXT: entry: 2012 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2013 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2014 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2015 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2016 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2017 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2018 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2019 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2020 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2021 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2022 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2023 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2024 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2025 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2026 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2027 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2028 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2029 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2030 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2031 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2032 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2033 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2034 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 2035 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 2036 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2037 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2038 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2039 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2040 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2041 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2042 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 2043 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2044 // CHECK3: omp.dispatch.cond: 2045 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 2046 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2047 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2048 // CHECK3: omp.dispatch.body: 2049 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2050 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 2051 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2052 // CHECK3: omp.inner.for.cond: 2053 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 2054 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 2055 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2056 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2057 // CHECK3: omp.inner.for.body: 2058 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 2059 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2060 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2061 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 2062 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2063 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 2064 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 2065 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]] 2066 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2067 // CHECK3: omp.body.continue: 2068 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2069 // CHECK3: omp.inner.for.inc: 2070 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 2071 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2072 // CHECK3-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 2073 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2074 // CHECK3: omp.inner.for.end: 2075 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2076 // CHECK3: omp.dispatch.inc: 2077 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2078 // CHECK3: omp.dispatch.end: 2079 // CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 2080 // CHECK3-NEXT: ret void 2081 // 2082 // 2083 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 2084 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2085 // CHECK3-NEXT: entry: 2086 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2087 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2088 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2089 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 2090 // CHECK3-NEXT: ret void 2091 // 2092 // 2093 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 2094 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2095 // CHECK3-NEXT: entry: 2096 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2097 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2098 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2099 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2100 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2101 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2102 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2103 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2104 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2105 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2106 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2107 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2108 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2109 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2110 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2111 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2112 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2113 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2114 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2115 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2116 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2117 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2118 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2119 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2120 // CHECK3: cond.true: 2121 // CHECK3-NEXT: br label [[COND_END:%.*]] 2122 // CHECK3: cond.false: 2123 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2124 // CHECK3-NEXT: br label [[COND_END]] 2125 // CHECK3: cond.end: 2126 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2127 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2128 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2129 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2130 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2131 // CHECK3: omp.inner.for.cond: 2132 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2133 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2134 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2135 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2136 // CHECK3: omp.inner.for.body: 2137 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2138 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2139 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 2140 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2141 // CHECK3: omp.inner.for.inc: 2142 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2143 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2144 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2145 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2146 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2147 // CHECK3: omp.inner.for.end: 2148 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2149 // CHECK3: omp.loop.exit: 2150 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2151 // CHECK3-NEXT: ret void 2152 // 2153 // 2154 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 2155 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2156 // CHECK3-NEXT: entry: 2157 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2158 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2159 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2160 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2161 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2162 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2163 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2164 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2165 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2166 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2167 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2168 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2169 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2170 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2171 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2172 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2173 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2174 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2175 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2176 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2177 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2178 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2179 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 2180 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 2181 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2182 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2183 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2184 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2185 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2186 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2187 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 2188 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2189 // CHECK3: omp.dispatch.cond: 2190 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 2191 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2192 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2193 // CHECK3: omp.dispatch.body: 2194 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2195 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 2196 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2197 // CHECK3: omp.inner.for.cond: 2198 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 2199 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 2200 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2201 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2202 // CHECK3: omp.inner.for.body: 2203 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 2204 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2205 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2206 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]] 2207 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2208 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]] 2209 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 2210 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]] 2211 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2212 // CHECK3: omp.body.continue: 2213 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2214 // CHECK3: omp.inner.for.inc: 2215 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 2216 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2217 // CHECK3-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 2218 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 2219 // CHECK3: omp.inner.for.end: 2220 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2221 // CHECK3: omp.dispatch.inc: 2222 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2223 // CHECK3: omp.dispatch.end: 2224 // CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 2225 // CHECK3-NEXT: ret void 2226 // 2227 // 2228 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2229 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 2230 // CHECK5-NEXT: entry: 2231 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2232 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 2233 // CHECK5-NEXT: ret i32 [[CALL]] 2234 // 2235 // 2236 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2237 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat { 2238 // CHECK5-NEXT: entry: 2239 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2240 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 2241 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 2242 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 2243 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2244 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 2245 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8 2246 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8 2247 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8 2248 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2249 // CHECK5-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2250 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8 2251 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8 2252 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8 2253 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 2254 // CHECK5-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2255 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8 2256 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8 2257 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8 2258 // CHECK5-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 2259 // CHECK5-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2260 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8 2261 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8 2262 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8 2263 // CHECK5-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 2264 // CHECK5-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 2265 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2266 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2267 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 2268 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2269 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 2270 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2271 // CHECK5-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 2272 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2273 // CHECK5-NEXT: store ptr null, ptr [[TMP2]], align 8 2274 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2275 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2276 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 2277 // CHECK5-NEXT: store i32 3, ptr [[TMP5]], align 4 2278 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 2279 // CHECK5-NEXT: store i32 1, ptr [[TMP6]], align 4 2280 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 2281 // CHECK5-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 2282 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 2283 // CHECK5-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 2284 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 2285 // CHECK5-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 2286 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 2287 // CHECK5-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 2288 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 2289 // CHECK5-NEXT: store ptr null, ptr [[TMP11]], align 8 2290 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 2291 // CHECK5-NEXT: store ptr null, ptr [[TMP12]], align 8 2292 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 2293 // CHECK5-NEXT: store i64 123, ptr [[TMP13]], align 8 2294 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 2295 // CHECK5-NEXT: store i64 0, ptr [[TMP14]], align 8 2296 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 2297 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 2298 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 2299 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 2300 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 2301 // CHECK5-NEXT: store i32 0, ptr [[TMP17]], align 4 2302 // CHECK5-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 2303 // CHECK5-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 2304 // CHECK5-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2305 // CHECK5: omp_offload.failed: 2306 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 2307 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2308 // CHECK5: omp_offload.cont: 2309 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2310 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2311 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8 2312 // CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2313 // CHECK5-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8 2314 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 2315 // CHECK5-NEXT: store ptr null, ptr [[TMP22]], align 8 2316 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2317 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2318 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 2319 // CHECK5-NEXT: store i32 3, ptr [[TMP25]], align 4 2320 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 2321 // CHECK5-NEXT: store i32 1, ptr [[TMP26]], align 4 2322 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 2323 // CHECK5-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 2324 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 2325 // CHECK5-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 2326 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 2327 // CHECK5-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8 2328 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 2329 // CHECK5-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8 2330 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 2331 // CHECK5-NEXT: store ptr null, ptr [[TMP31]], align 8 2332 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 2333 // CHECK5-NEXT: store ptr null, ptr [[TMP32]], align 8 2334 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 2335 // CHECK5-NEXT: store i64 123, ptr [[TMP33]], align 8 2336 // CHECK5-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 2337 // CHECK5-NEXT: store i64 0, ptr [[TMP34]], align 8 2338 // CHECK5-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 2339 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 2340 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 2341 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 2342 // CHECK5-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 2343 // CHECK5-NEXT: store i32 0, ptr [[TMP37]], align 4 2344 // CHECK5-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 2345 // CHECK5-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 2346 // CHECK5-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 2347 // CHECK5: omp_offload.failed8: 2348 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 2349 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT9]] 2350 // CHECK5: omp_offload.cont9: 2351 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2352 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 2353 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8 2354 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 2355 // CHECK5-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8 2356 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0 2357 // CHECK5-NEXT: store ptr null, ptr [[TMP42]], align 8 2358 // CHECK5-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 2359 // CHECK5-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 2360 // CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 2361 // CHECK5-NEXT: store i32 3, ptr [[TMP45]], align 4 2362 // CHECK5-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 2363 // CHECK5-NEXT: store i32 1, ptr [[TMP46]], align 4 2364 // CHECK5-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 2365 // CHECK5-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8 2366 // CHECK5-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 2367 // CHECK5-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8 2368 // CHECK5-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 2369 // CHECK5-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8 2370 // CHECK5-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 2371 // CHECK5-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8 2372 // CHECK5-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 2373 // CHECK5-NEXT: store ptr null, ptr [[TMP51]], align 8 2374 // CHECK5-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 2375 // CHECK5-NEXT: store ptr null, ptr [[TMP52]], align 8 2376 // CHECK5-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 2377 // CHECK5-NEXT: store i64 123, ptr [[TMP53]], align 8 2378 // CHECK5-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 2379 // CHECK5-NEXT: store i64 0, ptr [[TMP54]], align 8 2380 // CHECK5-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 2381 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 2382 // CHECK5-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 2383 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 2384 // CHECK5-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 2385 // CHECK5-NEXT: store i32 0, ptr [[TMP57]], align 4 2386 // CHECK5-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 2387 // CHECK5-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 2388 // CHECK5-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2389 // CHECK5: omp_offload.failed16: 2390 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 2391 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2392 // CHECK5: omp_offload.cont17: 2393 // CHECK5-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2394 // CHECK5-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2395 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 8 2396 // CHECK5-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2397 // CHECK5-NEXT: store ptr [[A18]], ptr [[TMP61]], align 8 2398 // CHECK5-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0 2399 // CHECK5-NEXT: store ptr null, ptr [[TMP62]], align 8 2400 // CHECK5-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2401 // CHECK5-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2402 // CHECK5-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 2403 // CHECK5-NEXT: store i32 3, ptr [[TMP65]], align 4 2404 // CHECK5-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 2405 // CHECK5-NEXT: store i32 1, ptr [[TMP66]], align 4 2406 // CHECK5-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 2407 // CHECK5-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8 2408 // CHECK5-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 2409 // CHECK5-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8 2410 // CHECK5-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 2411 // CHECK5-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8 2412 // CHECK5-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 2413 // CHECK5-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8 2414 // CHECK5-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 2415 // CHECK5-NEXT: store ptr null, ptr [[TMP71]], align 8 2416 // CHECK5-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 2417 // CHECK5-NEXT: store ptr null, ptr [[TMP72]], align 8 2418 // CHECK5-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 2419 // CHECK5-NEXT: store i64 123, ptr [[TMP73]], align 8 2420 // CHECK5-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 2421 // CHECK5-NEXT: store i64 0, ptr [[TMP74]], align 8 2422 // CHECK5-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 2423 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 2424 // CHECK5-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 2425 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 2426 // CHECK5-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 2427 // CHECK5-NEXT: store i32 0, ptr [[TMP77]], align 4 2428 // CHECK5-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 2429 // CHECK5-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 2430 // CHECK5-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 2431 // CHECK5: omp_offload.failed24: 2432 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 2433 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT25]] 2434 // CHECK5: omp_offload.cont25: 2435 // CHECK5-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2436 // CHECK5-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 2437 // CHECK5-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 8 2438 // CHECK5-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 2439 // CHECK5-NEXT: store ptr [[A26]], ptr [[TMP81]], align 8 2440 // CHECK5-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0 2441 // CHECK5-NEXT: store ptr null, ptr [[TMP82]], align 8 2442 // CHECK5-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 2443 // CHECK5-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 2444 // CHECK5-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 2445 // CHECK5-NEXT: store i32 3, ptr [[TMP85]], align 4 2446 // CHECK5-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 2447 // CHECK5-NEXT: store i32 1, ptr [[TMP86]], align 4 2448 // CHECK5-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 2449 // CHECK5-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8 2450 // CHECK5-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 2451 // CHECK5-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8 2452 // CHECK5-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 2453 // CHECK5-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8 2454 // CHECK5-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 2455 // CHECK5-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8 2456 // CHECK5-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 2457 // CHECK5-NEXT: store ptr null, ptr [[TMP91]], align 8 2458 // CHECK5-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 2459 // CHECK5-NEXT: store ptr null, ptr [[TMP92]], align 8 2460 // CHECK5-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 2461 // CHECK5-NEXT: store i64 123, ptr [[TMP93]], align 8 2462 // CHECK5-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 2463 // CHECK5-NEXT: store i64 0, ptr [[TMP94]], align 8 2464 // CHECK5-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 2465 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 2466 // CHECK5-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 2467 // CHECK5-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 2468 // CHECK5-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 2469 // CHECK5-NEXT: store i32 0, ptr [[TMP97]], align 4 2470 // CHECK5-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 2471 // CHECK5-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 2472 // CHECK5-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 2473 // CHECK5: omp_offload.failed32: 2474 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 2475 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT33]] 2476 // CHECK5: omp_offload.cont33: 2477 // CHECK5-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 2478 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0 2479 // CHECK5-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2480 // CHECK5-NEXT: ret i32 [[TMP100]] 2481 // 2482 // 2483 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 2484 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2485 // CHECK5-NEXT: entry: 2486 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2487 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2488 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2489 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 2490 // CHECK5-NEXT: ret void 2491 // 2492 // 2493 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 2494 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2495 // CHECK5-NEXT: entry: 2496 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2497 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2498 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2499 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2500 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2501 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2502 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2503 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2504 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2505 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2506 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2507 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2508 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2509 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2510 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2511 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2512 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2513 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2514 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2515 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2516 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2517 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2518 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2519 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2520 // CHECK5: cond.true: 2521 // CHECK5-NEXT: br label [[COND_END:%.*]] 2522 // CHECK5: cond.false: 2523 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2524 // CHECK5-NEXT: br label [[COND_END]] 2525 // CHECK5: cond.end: 2526 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2527 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2528 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2529 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2530 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2531 // CHECK5: omp.inner.for.cond: 2532 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2533 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2534 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2535 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2536 // CHECK5: omp.inner.for.body: 2537 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2538 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2539 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2540 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2541 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 2542 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2543 // CHECK5: omp.inner.for.inc: 2544 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2545 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2546 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2547 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2548 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2549 // CHECK5: omp.inner.for.end: 2550 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2551 // CHECK5: omp.loop.exit: 2552 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2553 // CHECK5-NEXT: ret void 2554 // 2555 // 2556 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 2557 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2558 // CHECK5-NEXT: entry: 2559 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2560 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2561 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2562 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2563 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2564 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2565 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2566 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2567 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2568 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2569 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2570 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2571 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2572 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2573 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2574 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2575 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2576 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2577 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2578 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2579 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2580 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2581 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2582 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2583 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2584 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2585 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2586 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2587 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2588 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2589 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2590 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2591 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2592 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2593 // CHECK5: cond.true: 2594 // CHECK5-NEXT: br label [[COND_END:%.*]] 2595 // CHECK5: cond.false: 2596 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2597 // CHECK5-NEXT: br label [[COND_END]] 2598 // CHECK5: cond.end: 2599 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2600 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2601 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2602 // CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2603 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2604 // CHECK5: omp.inner.for.cond: 2605 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2606 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2607 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2608 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2609 // CHECK5: omp.inner.for.body: 2610 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2611 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2612 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2613 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2614 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2615 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2616 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2617 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 2618 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2619 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2620 // CHECK5: omp.body.continue: 2621 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2622 // CHECK5: omp.inner.for.inc: 2623 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2624 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2625 // CHECK5-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 2626 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2627 // CHECK5: omp.inner.for.end: 2628 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2629 // CHECK5: omp.loop.exit: 2630 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 2631 // CHECK5-NEXT: ret void 2632 // 2633 // 2634 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 2635 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2636 // CHECK5-NEXT: entry: 2637 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2638 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2639 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2640 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 2641 // CHECK5-NEXT: ret void 2642 // 2643 // 2644 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 2645 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2646 // CHECK5-NEXT: entry: 2647 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2648 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2649 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2650 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2651 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2652 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2653 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2654 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2655 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2656 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2657 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2658 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2659 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2660 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2661 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2662 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2663 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2664 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2665 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2666 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2667 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2668 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2669 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2670 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2671 // CHECK5: cond.true: 2672 // CHECK5-NEXT: br label [[COND_END:%.*]] 2673 // CHECK5: cond.false: 2674 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2675 // CHECK5-NEXT: br label [[COND_END]] 2676 // CHECK5: cond.end: 2677 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2678 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2679 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2680 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2681 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2682 // CHECK5: omp.inner.for.cond: 2683 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2684 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2685 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2686 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2687 // CHECK5: omp.inner.for.body: 2688 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2689 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2690 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2691 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2692 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 2693 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2694 // CHECK5: omp.inner.for.inc: 2695 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2696 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2697 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2698 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2699 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2700 // CHECK5: omp.inner.for.end: 2701 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2702 // CHECK5: omp.loop.exit: 2703 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2704 // CHECK5-NEXT: ret void 2705 // 2706 // 2707 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 2708 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2709 // CHECK5-NEXT: entry: 2710 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2711 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2712 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2713 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2714 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2715 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2716 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2717 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2718 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2719 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2720 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2721 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2722 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2723 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2724 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2725 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2726 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2727 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2728 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2729 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2730 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2731 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2732 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2733 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2734 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2735 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2736 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2737 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2738 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2739 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2740 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2741 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2742 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2743 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2744 // CHECK5: cond.true: 2745 // CHECK5-NEXT: br label [[COND_END:%.*]] 2746 // CHECK5: cond.false: 2747 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2748 // CHECK5-NEXT: br label [[COND_END]] 2749 // CHECK5: cond.end: 2750 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2751 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2752 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2753 // CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 2754 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2755 // CHECK5: omp.inner.for.cond: 2756 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2757 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2758 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2759 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2760 // CHECK5: omp.inner.for.body: 2761 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2762 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2763 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2764 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2765 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2766 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2767 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2768 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 2769 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2770 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2771 // CHECK5: omp.body.continue: 2772 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2773 // CHECK5: omp.inner.for.inc: 2774 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2775 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2776 // CHECK5-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 2777 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2778 // CHECK5: omp.inner.for.end: 2779 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2780 // CHECK5: omp.loop.exit: 2781 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 2782 // CHECK5-NEXT: ret void 2783 // 2784 // 2785 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 2786 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2787 // CHECK5-NEXT: entry: 2788 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2789 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2790 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2791 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 2792 // CHECK5-NEXT: ret void 2793 // 2794 // 2795 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 2796 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2797 // CHECK5-NEXT: entry: 2798 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2799 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2800 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2801 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2802 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2803 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2804 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2805 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2806 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2807 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2808 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2809 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2810 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2811 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2812 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2813 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2814 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2815 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2816 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2817 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2818 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2819 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2820 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2821 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2822 // CHECK5: cond.true: 2823 // CHECK5-NEXT: br label [[COND_END:%.*]] 2824 // CHECK5: cond.false: 2825 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2826 // CHECK5-NEXT: br label [[COND_END]] 2827 // CHECK5: cond.end: 2828 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2829 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2830 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2831 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 2832 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2833 // CHECK5: omp.inner.for.cond: 2834 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2835 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2836 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2837 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2838 // CHECK5: omp.inner.for.body: 2839 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2840 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2841 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2842 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2843 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 2844 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2845 // CHECK5: omp.inner.for.inc: 2846 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2847 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2848 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2849 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2850 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2851 // CHECK5: omp.inner.for.end: 2852 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2853 // CHECK5: omp.loop.exit: 2854 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 2855 // CHECK5-NEXT: ret void 2856 // 2857 // 2858 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 2859 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2860 // CHECK5-NEXT: entry: 2861 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2862 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2863 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2864 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2865 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2866 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2867 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2868 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2869 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2870 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2871 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2872 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2873 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2874 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2875 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2876 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2877 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2878 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2879 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2880 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 2881 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2882 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2883 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2884 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2885 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2886 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2887 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2888 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2889 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2890 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 2891 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 2892 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2893 // CHECK5: omp.dispatch.cond: 2894 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2895 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2896 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 2897 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 2898 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2899 // CHECK5: cond.true: 2900 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2901 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 2902 // CHECK5-NEXT: br label [[COND_END:%.*]] 2903 // CHECK5: cond.false: 2904 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2905 // CHECK5-NEXT: br label [[COND_END]] 2906 // CHECK5: cond.end: 2907 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2908 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2909 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2910 // CHECK5-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 2911 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2912 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2913 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2914 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2915 // CHECK5: omp.dispatch.body: 2916 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2917 // CHECK5: omp.inner.for.cond: 2918 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2919 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2920 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2921 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2922 // CHECK5: omp.inner.for.body: 2923 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2924 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 2925 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2926 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2927 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 2928 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 2929 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 2930 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 2931 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2932 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2933 // CHECK5: omp.body.continue: 2934 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2935 // CHECK5: omp.inner.for.inc: 2936 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2937 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 2938 // CHECK5-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 2939 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2940 // CHECK5: omp.inner.for.end: 2941 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2942 // CHECK5: omp.dispatch.inc: 2943 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2944 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2945 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2946 // CHECK5-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 2947 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2948 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2949 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2950 // CHECK5-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 2951 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 2952 // CHECK5: omp.dispatch.end: 2953 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 2954 // CHECK5-NEXT: ret void 2955 // 2956 // 2957 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 2958 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2959 // CHECK5-NEXT: entry: 2960 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2961 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2962 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2963 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 2964 // CHECK5-NEXT: ret void 2965 // 2966 // 2967 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 2968 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 2969 // CHECK5-NEXT: entry: 2970 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2971 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2972 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2973 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2974 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2975 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2976 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2977 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2978 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2979 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2980 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2981 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2982 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2983 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2984 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2985 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 2986 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2987 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2988 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2989 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 2990 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2991 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2992 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2993 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2994 // CHECK5: cond.true: 2995 // CHECK5-NEXT: br label [[COND_END:%.*]] 2996 // CHECK5: cond.false: 2997 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2998 // CHECK5-NEXT: br label [[COND_END]] 2999 // CHECK5: cond.end: 3000 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3001 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3002 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3003 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3004 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3005 // CHECK5: omp.inner.for.cond: 3006 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3007 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3008 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3009 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3010 // CHECK5: omp.inner.for.body: 3011 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3012 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3013 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3014 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3015 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 3016 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3017 // CHECK5: omp.inner.for.inc: 3018 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3019 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3020 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3021 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3022 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3023 // CHECK5: omp.inner.for.end: 3024 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3025 // CHECK5: omp.loop.exit: 3026 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3027 // CHECK5-NEXT: ret void 3028 // 3029 // 3030 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 3031 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3032 // CHECK5-NEXT: entry: 3033 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3034 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3035 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3036 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3037 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3038 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3039 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3040 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3041 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3042 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3043 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3044 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3045 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3046 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3047 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3048 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3049 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3050 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3051 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3052 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3053 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3054 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3055 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3056 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3057 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3058 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3059 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3060 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3061 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3062 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3063 // CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3064 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 3065 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 3066 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3067 // CHECK5: omp.dispatch.cond: 3068 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 3069 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3070 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3071 // CHECK5: omp.dispatch.body: 3072 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3073 // CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 3074 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3075 // CHECK5: omp.inner.for.cond: 3076 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 3077 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 3078 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3079 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3080 // CHECK5: omp.inner.for.body: 3081 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3082 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3083 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3084 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 3085 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3086 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 3087 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 3088 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 3089 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 3090 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3091 // CHECK5: omp.body.continue: 3092 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3093 // CHECK5: omp.inner.for.inc: 3094 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3095 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 3096 // CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 3097 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3098 // CHECK5: omp.inner.for.end: 3099 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3100 // CHECK5: omp.dispatch.inc: 3101 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 3102 // CHECK5: omp.dispatch.end: 3103 // CHECK5-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 3104 // CHECK5-NEXT: ret void 3105 // 3106 // 3107 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 3108 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3109 // CHECK5-NEXT: entry: 3110 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3111 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3112 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3113 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 3114 // CHECK5-NEXT: ret void 3115 // 3116 // 3117 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 3118 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3119 // CHECK5-NEXT: entry: 3120 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3121 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3122 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3123 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3124 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3125 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3126 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3127 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3128 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3129 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3130 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3131 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3132 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3133 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3134 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3135 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3136 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3137 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3138 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3139 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3140 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3141 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3142 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3143 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3144 // CHECK5: cond.true: 3145 // CHECK5-NEXT: br label [[COND_END:%.*]] 3146 // CHECK5: cond.false: 3147 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3148 // CHECK5-NEXT: br label [[COND_END]] 3149 // CHECK5: cond.end: 3150 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3151 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3152 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3153 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3154 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3155 // CHECK5: omp.inner.for.cond: 3156 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3157 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3158 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3159 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3160 // CHECK5: omp.inner.for.body: 3161 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3162 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3163 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3164 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3165 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 3166 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3167 // CHECK5: omp.inner.for.inc: 3168 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3169 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3170 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3171 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3172 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 3173 // CHECK5: omp.inner.for.end: 3174 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3175 // CHECK5: omp.loop.exit: 3176 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3177 // CHECK5-NEXT: ret void 3178 // 3179 // 3180 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 3181 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3182 // CHECK5-NEXT: entry: 3183 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3184 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3185 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3186 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3187 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 3188 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3189 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3190 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3191 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3192 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3193 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3194 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3195 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3196 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3197 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3198 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3199 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 3200 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 3201 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3202 // CHECK5-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3203 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3204 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3205 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3206 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3207 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3208 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 3209 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3210 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3211 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3212 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3213 // CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3214 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 3215 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 3216 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3217 // CHECK5: omp.dispatch.cond: 3218 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 3219 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3220 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3221 // CHECK5: omp.dispatch.body: 3222 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3223 // CHECK5-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 3224 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3225 // CHECK5: omp.inner.for.cond: 3226 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 3227 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 3228 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3229 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3230 // CHECK5: omp.inner.for.body: 3231 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3232 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3233 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3234 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 3235 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3236 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]] 3237 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 3238 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]] 3239 // CHECK5-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]] 3240 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3241 // CHECK5: omp.body.continue: 3242 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3243 // CHECK5: omp.inner.for.inc: 3244 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3245 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 3246 // CHECK5-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 3247 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3248 // CHECK5: omp.inner.for.end: 3249 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3250 // CHECK5: omp.dispatch.inc: 3251 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 3252 // CHECK5: omp.dispatch.end: 3253 // CHECK5-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 3254 // CHECK5-NEXT: ret void 3255 // 3256 // 3257 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3258 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 3259 // CHECK7-NEXT: entry: 3260 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3261 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]]) 3262 // CHECK7-NEXT: ret i32 [[CALL]] 3263 // 3264 // 3265 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3266 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3267 // CHECK7-NEXT: entry: 3268 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3269 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 3270 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 3271 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 3272 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3273 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 3274 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4 3275 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4 3276 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4 3277 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 3278 // CHECK7-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3279 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4 3280 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4 3281 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4 3282 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32, align 4 3283 // CHECK7-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3284 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4 3285 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4 3286 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4 3287 // CHECK7-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 3288 // CHECK7-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3289 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4 3290 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4 3291 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4 3292 // CHECK7-NEXT: [[_TMP30:%.*]] = alloca i32, align 4 3293 // CHECK7-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 3294 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3295 // CHECK7-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3296 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 3297 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3298 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 3299 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3300 // CHECK7-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 3301 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3302 // CHECK7-NEXT: store ptr null, ptr [[TMP2]], align 4 3303 // CHECK7-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3304 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3305 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 3306 // CHECK7-NEXT: store i32 3, ptr [[TMP5]], align 4 3307 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 3308 // CHECK7-NEXT: store i32 1, ptr [[TMP6]], align 4 3309 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 3310 // CHECK7-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 3311 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 3312 // CHECK7-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 3313 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 3314 // CHECK7-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 3315 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 3316 // CHECK7-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 3317 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 3318 // CHECK7-NEXT: store ptr null, ptr [[TMP11]], align 4 3319 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 3320 // CHECK7-NEXT: store ptr null, ptr [[TMP12]], align 4 3321 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 3322 // CHECK7-NEXT: store i64 123, ptr [[TMP13]], align 8 3323 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 3324 // CHECK7-NEXT: store i64 0, ptr [[TMP14]], align 8 3325 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 3326 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 3327 // CHECK7-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 3328 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 3329 // CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 3330 // CHECK7-NEXT: store i32 0, ptr [[TMP17]], align 4 3331 // CHECK7-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]]) 3332 // CHECK7-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 3333 // CHECK7-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3334 // CHECK7: omp_offload.failed: 3335 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 3336 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]] 3337 // CHECK7: omp_offload.cont: 3338 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3339 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3340 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4 3341 // CHECK7-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3342 // CHECK7-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4 3343 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 3344 // CHECK7-NEXT: store ptr null, ptr [[TMP22]], align 4 3345 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3346 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3347 // CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0 3348 // CHECK7-NEXT: store i32 3, ptr [[TMP25]], align 4 3349 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1 3350 // CHECK7-NEXT: store i32 1, ptr [[TMP26]], align 4 3351 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2 3352 // CHECK7-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 3353 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3 3354 // CHECK7-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 3355 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4 3356 // CHECK7-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4 3357 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5 3358 // CHECK7-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4 3359 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6 3360 // CHECK7-NEXT: store ptr null, ptr [[TMP31]], align 4 3361 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7 3362 // CHECK7-NEXT: store ptr null, ptr [[TMP32]], align 4 3363 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8 3364 // CHECK7-NEXT: store i64 123, ptr [[TMP33]], align 8 3365 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9 3366 // CHECK7-NEXT: store i64 0, ptr [[TMP34]], align 8 3367 // CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10 3368 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 3369 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11 3370 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 3371 // CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12 3372 // CHECK7-NEXT: store i32 0, ptr [[TMP37]], align 4 3373 // CHECK7-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]]) 3374 // CHECK7-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 3375 // CHECK7-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]] 3376 // CHECK7: omp_offload.failed8: 3377 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]] 3378 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT9]] 3379 // CHECK7: omp_offload.cont9: 3380 // CHECK7-NEXT: [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3381 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 3382 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4 3383 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 3384 // CHECK7-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4 3385 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0 3386 // CHECK7-NEXT: store ptr null, ptr [[TMP42]], align 4 3387 // CHECK7-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0 3388 // CHECK7-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0 3389 // CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 3390 // CHECK7-NEXT: store i32 3, ptr [[TMP45]], align 4 3391 // CHECK7-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 3392 // CHECK7-NEXT: store i32 1, ptr [[TMP46]], align 4 3393 // CHECK7-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 3394 // CHECK7-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4 3395 // CHECK7-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 3396 // CHECK7-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4 3397 // CHECK7-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 3398 // CHECK7-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4 3399 // CHECK7-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 3400 // CHECK7-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4 3401 // CHECK7-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 3402 // CHECK7-NEXT: store ptr null, ptr [[TMP51]], align 4 3403 // CHECK7-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 3404 // CHECK7-NEXT: store ptr null, ptr [[TMP52]], align 4 3405 // CHECK7-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 3406 // CHECK7-NEXT: store i64 123, ptr [[TMP53]], align 8 3407 // CHECK7-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 3408 // CHECK7-NEXT: store i64 0, ptr [[TMP54]], align 8 3409 // CHECK7-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 3410 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4 3411 // CHECK7-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 3412 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4 3413 // CHECK7-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 3414 // CHECK7-NEXT: store i32 0, ptr [[TMP57]], align 4 3415 // CHECK7-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]]) 3416 // CHECK7-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0 3417 // CHECK7-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3418 // CHECK7: omp_offload.failed16: 3419 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]] 3420 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3421 // CHECK7: omp_offload.cont17: 3422 // CHECK7-NEXT: [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3423 // CHECK7-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3424 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP60]], align 4 3425 // CHECK7-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3426 // CHECK7-NEXT: store ptr [[A18]], ptr [[TMP61]], align 4 3427 // CHECK7-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 3428 // CHECK7-NEXT: store ptr null, ptr [[TMP62]], align 4 3429 // CHECK7-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3430 // CHECK7-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3431 // CHECK7-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0 3432 // CHECK7-NEXT: store i32 3, ptr [[TMP65]], align 4 3433 // CHECK7-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1 3434 // CHECK7-NEXT: store i32 1, ptr [[TMP66]], align 4 3435 // CHECK7-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2 3436 // CHECK7-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 4 3437 // CHECK7-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3 3438 // CHECK7-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 4 3439 // CHECK7-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4 3440 // CHECK7-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 4 3441 // CHECK7-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5 3442 // CHECK7-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4 3443 // CHECK7-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6 3444 // CHECK7-NEXT: store ptr null, ptr [[TMP71]], align 4 3445 // CHECK7-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7 3446 // CHECK7-NEXT: store ptr null, ptr [[TMP72]], align 4 3447 // CHECK7-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8 3448 // CHECK7-NEXT: store i64 123, ptr [[TMP73]], align 8 3449 // CHECK7-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9 3450 // CHECK7-NEXT: store i64 0, ptr [[TMP74]], align 8 3451 // CHECK7-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10 3452 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 3453 // CHECK7-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11 3454 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4 3455 // CHECK7-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12 3456 // CHECK7-NEXT: store i32 0, ptr [[TMP77]], align 4 3457 // CHECK7-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]]) 3458 // CHECK7-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0 3459 // CHECK7-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 3460 // CHECK7: omp_offload.failed24: 3461 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]] 3462 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT25]] 3463 // CHECK7: omp_offload.cont25: 3464 // CHECK7-NEXT: [[A26:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3465 // CHECK7-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 3466 // CHECK7-NEXT: store ptr [[THIS1]], ptr [[TMP80]], align 4 3467 // CHECK7-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 3468 // CHECK7-NEXT: store ptr [[A26]], ptr [[TMP81]], align 4 3469 // CHECK7-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0 3470 // CHECK7-NEXT: store ptr null, ptr [[TMP82]], align 4 3471 // CHECK7-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0 3472 // CHECK7-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0 3473 // CHECK7-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 3474 // CHECK7-NEXT: store i32 3, ptr [[TMP85]], align 4 3475 // CHECK7-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 3476 // CHECK7-NEXT: store i32 1, ptr [[TMP86]], align 4 3477 // CHECK7-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 3478 // CHECK7-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 4 3479 // CHECK7-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 3480 // CHECK7-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 4 3481 // CHECK7-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 3482 // CHECK7-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 4 3483 // CHECK7-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 3484 // CHECK7-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4 3485 // CHECK7-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 3486 // CHECK7-NEXT: store ptr null, ptr [[TMP91]], align 4 3487 // CHECK7-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 3488 // CHECK7-NEXT: store ptr null, ptr [[TMP92]], align 4 3489 // CHECK7-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 3490 // CHECK7-NEXT: store i64 123, ptr [[TMP93]], align 8 3491 // CHECK7-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 3492 // CHECK7-NEXT: store i64 0, ptr [[TMP94]], align 8 3493 // CHECK7-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 3494 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4 3495 // CHECK7-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 3496 // CHECK7-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4 3497 // CHECK7-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 3498 // CHECK7-NEXT: store i32 0, ptr [[TMP97]], align 4 3499 // CHECK7-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]]) 3500 // CHECK7-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 3501 // CHECK7-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 3502 // CHECK7: omp_offload.failed32: 3503 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]] 3504 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT33]] 3505 // CHECK7: omp_offload.cont33: 3506 // CHECK7-NEXT: [[A34:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 3507 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0 3508 // CHECK7-NEXT: [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 3509 // CHECK7-NEXT: ret i32 [[TMP100]] 3510 // 3511 // 3512 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 3513 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3514 // CHECK7-NEXT: entry: 3515 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3516 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3517 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3518 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]]) 3519 // CHECK7-NEXT: ret void 3520 // 3521 // 3522 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined 3523 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3524 // CHECK7-NEXT: entry: 3525 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3526 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3527 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3528 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3529 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3530 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3531 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3532 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3533 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3534 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3535 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3536 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3537 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3538 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3539 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3540 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3541 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3542 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3543 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3544 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3545 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3546 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3547 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3548 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3549 // CHECK7: cond.true: 3550 // CHECK7-NEXT: br label [[COND_END:%.*]] 3551 // CHECK7: cond.false: 3552 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3553 // CHECK7-NEXT: br label [[COND_END]] 3554 // CHECK7: cond.end: 3555 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3556 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3557 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3558 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3559 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3560 // CHECK7: omp.inner.for.cond: 3561 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3562 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3563 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3564 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3565 // CHECK7: omp.inner.for.body: 3566 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3567 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3568 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 3569 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3570 // CHECK7: omp.inner.for.inc: 3571 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3572 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3573 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3574 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3575 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3576 // CHECK7: omp.inner.for.end: 3577 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3578 // CHECK7: omp.loop.exit: 3579 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3580 // CHECK7-NEXT: ret void 3581 // 3582 // 3583 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined 3584 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3585 // CHECK7-NEXT: entry: 3586 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3587 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3588 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3589 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3590 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3591 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3592 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3593 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3594 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3595 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3596 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3597 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3598 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3599 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3600 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3601 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3602 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3603 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3604 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3605 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3606 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3607 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3608 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 3609 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 3610 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3611 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3612 // CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3613 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3614 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3615 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3616 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3617 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3618 // CHECK7: cond.true: 3619 // CHECK7-NEXT: br label [[COND_END:%.*]] 3620 // CHECK7: cond.false: 3621 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3622 // CHECK7-NEXT: br label [[COND_END]] 3623 // CHECK7: cond.end: 3624 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3625 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3626 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3627 // CHECK7-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3628 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3629 // CHECK7: omp.inner.for.cond: 3630 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3631 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3632 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3633 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3634 // CHECK7: omp.inner.for.body: 3635 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3636 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3637 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3638 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3639 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3640 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3641 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 3642 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3643 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3644 // CHECK7: omp.body.continue: 3645 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3646 // CHECK7: omp.inner.for.inc: 3647 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3648 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3649 // CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 3650 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3651 // CHECK7: omp.inner.for.end: 3652 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3653 // CHECK7: omp.loop.exit: 3654 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3655 // CHECK7-NEXT: ret void 3656 // 3657 // 3658 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 3659 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3660 // CHECK7-NEXT: entry: 3661 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3662 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3663 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3664 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]]) 3665 // CHECK7-NEXT: ret void 3666 // 3667 // 3668 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined 3669 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3670 // CHECK7-NEXT: entry: 3671 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3672 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3673 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3674 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3675 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3676 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3677 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3678 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3679 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3680 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3681 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3682 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3683 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3684 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3685 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3686 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3687 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3688 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3689 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3690 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3691 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3692 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3693 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3694 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3695 // CHECK7: cond.true: 3696 // CHECK7-NEXT: br label [[COND_END:%.*]] 3697 // CHECK7: cond.false: 3698 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3699 // CHECK7-NEXT: br label [[COND_END]] 3700 // CHECK7: cond.end: 3701 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3702 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3703 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3704 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3705 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3706 // CHECK7: omp.inner.for.cond: 3707 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3708 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3709 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3710 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3711 // CHECK7: omp.inner.for.body: 3712 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3713 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3714 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 3715 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3716 // CHECK7: omp.inner.for.inc: 3717 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3718 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3719 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3720 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3721 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3722 // CHECK7: omp.inner.for.end: 3723 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3724 // CHECK7: omp.loop.exit: 3725 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3726 // CHECK7-NEXT: ret void 3727 // 3728 // 3729 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined 3730 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3731 // CHECK7-NEXT: entry: 3732 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3733 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3734 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3735 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3736 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3737 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3738 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3739 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3740 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3741 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3742 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3743 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3744 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3745 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3746 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3747 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3748 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3749 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3750 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3751 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3752 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3753 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3754 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 3755 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 3756 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3757 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3758 // CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3759 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3760 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3761 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3762 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3763 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3764 // CHECK7: cond.true: 3765 // CHECK7-NEXT: br label [[COND_END:%.*]] 3766 // CHECK7: cond.false: 3767 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3768 // CHECK7-NEXT: br label [[COND_END]] 3769 // CHECK7: cond.end: 3770 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3771 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3772 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3773 // CHECK7-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 3774 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3775 // CHECK7: omp.inner.for.cond: 3776 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3777 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3778 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3779 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3780 // CHECK7: omp.inner.for.body: 3781 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3782 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3783 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3784 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3785 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3786 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 3787 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]] 3788 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3789 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3790 // CHECK7: omp.body.continue: 3791 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3792 // CHECK7: omp.inner.for.inc: 3793 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3794 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3795 // CHECK7-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 3796 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3797 // CHECK7: omp.inner.for.end: 3798 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3799 // CHECK7: omp.loop.exit: 3800 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3801 // CHECK7-NEXT: ret void 3802 // 3803 // 3804 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44 3805 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3806 // CHECK7-NEXT: entry: 3807 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3808 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3809 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3810 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]]) 3811 // CHECK7-NEXT: ret void 3812 // 3813 // 3814 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined 3815 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3816 // CHECK7-NEXT: entry: 3817 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3818 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3819 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3820 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3821 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3822 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3823 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3824 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3825 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3826 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3827 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3828 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3829 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3830 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3831 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3832 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3833 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3834 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3835 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3836 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 3837 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3838 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3839 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3840 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3841 // CHECK7: cond.true: 3842 // CHECK7-NEXT: br label [[COND_END:%.*]] 3843 // CHECK7: cond.false: 3844 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3845 // CHECK7-NEXT: br label [[COND_END]] 3846 // CHECK7: cond.end: 3847 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3848 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3849 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3850 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 3851 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3852 // CHECK7: omp.inner.for.cond: 3853 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3854 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3855 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3856 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3857 // CHECK7: omp.inner.for.body: 3858 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3859 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3860 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 3861 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3862 // CHECK7: omp.inner.for.inc: 3863 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3864 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3865 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3866 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3867 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3868 // CHECK7: omp.inner.for.end: 3869 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3870 // CHECK7: omp.loop.exit: 3871 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 3872 // CHECK7-NEXT: ret void 3873 // 3874 // 3875 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined 3876 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3877 // CHECK7-NEXT: entry: 3878 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3879 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3880 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3881 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3882 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3883 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3884 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3885 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3886 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3887 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3888 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3889 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3890 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3891 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3892 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3893 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3894 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3895 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3896 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3897 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 3898 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3899 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3900 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 3901 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 3902 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3903 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3904 // CHECK7-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3905 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 3906 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61) 3907 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3908 // CHECK7: omp.dispatch.cond: 3909 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3910 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3911 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 3912 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3913 // CHECK7: cond.true: 3914 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3915 // CHECK7-NEXT: br label [[COND_END:%.*]] 3916 // CHECK7: cond.false: 3917 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3918 // CHECK7-NEXT: br label [[COND_END]] 3919 // CHECK7: cond.end: 3920 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3921 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3922 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3923 // CHECK7-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 3924 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3925 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3926 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3927 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3928 // CHECK7: omp.dispatch.body: 3929 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3930 // CHECK7: omp.inner.for.cond: 3931 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3932 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3933 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3934 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3935 // CHECK7: omp.inner.for.body: 3936 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3937 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 3938 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3939 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3940 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 3941 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 3942 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]] 3943 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 3944 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3945 // CHECK7: omp.body.continue: 3946 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3947 // CHECK7: omp.inner.for.inc: 3948 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3949 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 3950 // CHECK7-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 3951 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3952 // CHECK7: omp.inner.for.end: 3953 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3954 // CHECK7: omp.dispatch.inc: 3955 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3956 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3957 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 3958 // CHECK7-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 3959 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3960 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3961 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3962 // CHECK7-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 3963 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 3964 // CHECK7: omp.dispatch.end: 3965 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 3966 // CHECK7-NEXT: ret void 3967 // 3968 // 3969 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49 3970 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3971 // CHECK7-NEXT: entry: 3972 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3973 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3974 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3975 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]]) 3976 // CHECK7-NEXT: ret void 3977 // 3978 // 3979 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined 3980 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 3981 // CHECK7-NEXT: entry: 3982 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3983 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3984 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 3985 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3986 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3987 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3988 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3989 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3990 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3991 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3992 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3993 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3994 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 3995 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 3996 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3997 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 3998 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3999 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4000 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4001 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4002 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4003 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4004 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4005 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4006 // CHECK7: cond.true: 4007 // CHECK7-NEXT: br label [[COND_END:%.*]] 4008 // CHECK7: cond.false: 4009 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4010 // CHECK7-NEXT: br label [[COND_END]] 4011 // CHECK7: cond.end: 4012 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4013 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4014 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4015 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4016 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4017 // CHECK7: omp.inner.for.cond: 4018 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4019 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4020 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4021 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4022 // CHECK7: omp.inner.for.body: 4023 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4024 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4025 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 4026 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4027 // CHECK7: omp.inner.for.inc: 4028 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4029 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4030 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4031 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 4032 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 4033 // CHECK7: omp.inner.for.end: 4034 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4035 // CHECK7: omp.loop.exit: 4036 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4037 // CHECK7-NEXT: ret void 4038 // 4039 // 4040 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined 4041 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4042 // CHECK7-NEXT: entry: 4043 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4044 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4045 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4046 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4047 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4048 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4049 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4050 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4051 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4052 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4053 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4054 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4055 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4056 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4057 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4058 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4059 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4060 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4061 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4062 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4063 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4064 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4065 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4066 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4067 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4068 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4069 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4070 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4071 // CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4072 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 4073 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 4074 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4075 // CHECK7: omp.dispatch.cond: 4076 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 4077 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4078 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4079 // CHECK7: omp.dispatch.body: 4080 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4081 // CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 4082 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4083 // CHECK7: omp.inner.for.cond: 4084 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 4085 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 4086 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4087 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4088 // CHECK7: omp.inner.for.body: 4089 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 4090 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4091 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4092 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 4093 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 4094 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]] 4095 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 4096 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]] 4097 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4098 // CHECK7: omp.body.continue: 4099 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4100 // CHECK7: omp.inner.for.inc: 4101 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 4102 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 4103 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 4104 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 4105 // CHECK7: omp.inner.for.end: 4106 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4107 // CHECK7: omp.dispatch.inc: 4108 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 4109 // CHECK7: omp.dispatch.end: 4110 // CHECK7-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 4111 // CHECK7-NEXT: ret void 4112 // 4113 // 4114 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54 4115 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4116 // CHECK7-NEXT: entry: 4117 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4118 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4119 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4120 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]]) 4121 // CHECK7-NEXT: ret void 4122 // 4123 // 4124 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined 4125 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4126 // CHECK7-NEXT: entry: 4127 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4128 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4129 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4130 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4131 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4132 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4133 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4134 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4135 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4136 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4137 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4138 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4139 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4140 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4141 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4142 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_COMB_UB]], align 4 4143 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4144 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4145 // CHECK7-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4146 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 4147 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4148 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4149 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4150 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4151 // CHECK7: cond.true: 4152 // CHECK7-NEXT: br label [[COND_END:%.*]] 4153 // CHECK7: cond.false: 4154 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4155 // CHECK7-NEXT: br label [[COND_END]] 4156 // CHECK7: cond.end: 4157 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4158 // CHECK7-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4159 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4160 // CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 4161 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4162 // CHECK7: omp.inner.for.cond: 4163 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4164 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4165 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4166 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4167 // CHECK7: omp.inner.for.body: 4168 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4169 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4170 // CHECK7-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 4171 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4172 // CHECK7: omp.inner.for.inc: 4173 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4174 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4175 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 4176 // CHECK7-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 4177 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 4178 // CHECK7: omp.inner.for.end: 4179 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4180 // CHECK7: omp.loop.exit: 4181 // CHECK7-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 4182 // CHECK7-NEXT: ret void 4183 // 4184 // 4185 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined 4186 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 4187 // CHECK7-NEXT: entry: 4188 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4189 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4190 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4191 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4192 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 4193 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4194 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4195 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4196 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4197 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4198 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4199 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4200 // CHECK7-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4201 // CHECK7-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4202 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4203 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4204 // CHECK7-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 4205 // CHECK7-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 4206 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4207 // CHECK7-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4 4208 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4209 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4210 // CHECK7-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 4211 // CHECK7-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 4212 // CHECK7-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4213 // CHECK7-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4214 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4215 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4216 // CHECK7-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4217 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 4218 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 4219 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4220 // CHECK7: omp.dispatch.cond: 4221 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 4222 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4223 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4224 // CHECK7: omp.dispatch.body: 4225 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4226 // CHECK7-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 4227 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4228 // CHECK7: omp.inner.for.cond: 4229 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 4230 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 4231 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4232 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4233 // CHECK7: omp.inner.for.body: 4234 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 4235 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4236 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4237 // CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]] 4238 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 4239 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]] 4240 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]] 4241 // CHECK7-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]] 4242 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4243 // CHECK7: omp.body.continue: 4244 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4245 // CHECK7: omp.inner.for.inc: 4246 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 4247 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 4248 // CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 4249 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 4250 // CHECK7: omp.inner.for.end: 4251 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4252 // CHECK7: omp.dispatch.inc: 4253 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 4254 // CHECK7: omp.dispatch.end: 4255 // CHECK7-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 4256 // CHECK7-NEXT: ret void 4257 // 4258 // 4259 // CHECK13-LABEL: define {{[^@]+}}@main 4260 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4261 // CHECK13-NEXT: entry: 4262 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4263 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4264 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 4265 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 4266 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 4267 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 4268 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 4269 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4270 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 4271 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 4272 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 4273 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 4274 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4275 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4276 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4277 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4278 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 4279 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8 4280 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8 4281 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8 4282 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8 4283 // CHECK13-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 4284 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4285 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 4286 // CHECK13-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4287 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 4288 // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 4289 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4290 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8 4291 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8 4292 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8 4293 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8 4294 // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 4295 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4296 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 4297 // CHECK13-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4298 // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 4299 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 8 4300 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 8 4301 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 8 4302 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 8 4303 // CHECK13-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 4304 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 4305 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 4306 // CHECK13-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4307 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 4308 // CHECK13-NEXT: [[N_CASTED50:%.*]] = alloca i64, align 8 4309 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i64, align 8 4310 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 8 4311 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 8 4312 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 8 4313 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 8 4314 // CHECK13-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 4315 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 4316 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 4317 // CHECK13-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4318 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 4319 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 4320 // CHECK13-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 4321 // CHECK13-NEXT: store i32 100, ptr [[N]], align 4 4322 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 4323 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 4324 // CHECK13-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 4325 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 4326 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 4327 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 4328 // CHECK13-NEXT: store i32 10, ptr [[M]], align 4 4329 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 4330 // CHECK13-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 4331 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 4332 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 4333 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false) 4334 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4335 // CHECK13-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8 4336 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4337 // CHECK13-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8 4338 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4339 // CHECK13-NEXT: store ptr null, ptr [[TMP8]], align 8 4340 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4341 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 4342 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4343 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8 4344 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 4345 // CHECK13-NEXT: store ptr null, ptr [[TMP11]], align 8 4346 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4347 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 4348 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4349 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8 4350 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4351 // CHECK13-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8 4352 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 4353 // CHECK13-NEXT: store ptr null, ptr [[TMP15]], align 8 4354 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4355 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4356 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4357 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 4358 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 4359 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4360 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 4361 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4362 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4363 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4364 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4365 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 4366 // CHECK13-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 4367 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4368 // CHECK13-NEXT: store i32 3, ptr [[TMP23]], align 4 4369 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4370 // CHECK13-NEXT: store i32 3, ptr [[TMP24]], align 4 4371 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4372 // CHECK13-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8 4373 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4374 // CHECK13-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8 4375 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4376 // CHECK13-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8 4377 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4378 // CHECK13-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 4379 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4380 // CHECK13-NEXT: store ptr null, ptr [[TMP29]], align 8 4381 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4382 // CHECK13-NEXT: store ptr null, ptr [[TMP30]], align 8 4383 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4384 // CHECK13-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 4385 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4386 // CHECK13-NEXT: store i64 0, ptr [[TMP32]], align 8 4387 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4388 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 4389 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4390 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 4391 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4392 // CHECK13-NEXT: store i32 0, ptr [[TMP35]], align 4 4393 // CHECK13-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 4394 // CHECK13-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 4395 // CHECK13-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4396 // CHECK13: omp_offload.failed: 4397 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 4398 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 4399 // CHECK13: omp_offload.cont: 4400 // CHECK13-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 4401 // CHECK13-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 4402 // CHECK13-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 4403 // CHECK13-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4 4404 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false) 4405 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4406 // CHECK13-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8 4407 // CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4408 // CHECK13-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8 4409 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 4410 // CHECK13-NEXT: store ptr null, ptr [[TMP43]], align 8 4411 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 4412 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8 4413 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 4414 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8 4415 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 4416 // CHECK13-NEXT: store ptr null, ptr [[TMP46]], align 8 4417 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 4418 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8 4419 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 4420 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8 4421 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 4422 // CHECK13-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8 4423 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 4424 // CHECK13-NEXT: store ptr null, ptr [[TMP50]], align 8 4425 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4426 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4427 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 4428 // CHECK13-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 4429 // CHECK13-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4 4430 // CHECK13-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 4431 // CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0 4432 // CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 4433 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 4434 // CHECK13-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 4435 // CHECK13-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 4436 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1 4437 // CHECK13-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64 4438 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 4439 // CHECK13-NEXT: store i32 3, ptr [[TMP58]], align 4 4440 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 4441 // CHECK13-NEXT: store i32 3, ptr [[TMP59]], align 4 4442 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 4443 // CHECK13-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8 4444 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 4445 // CHECK13-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8 4446 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 4447 // CHECK13-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8 4448 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 4449 // CHECK13-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8 4450 // CHECK13-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 4451 // CHECK13-NEXT: store ptr null, ptr [[TMP64]], align 8 4452 // CHECK13-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 4453 // CHECK13-NEXT: store ptr null, ptr [[TMP65]], align 8 4454 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 4455 // CHECK13-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8 4456 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 4457 // CHECK13-NEXT: store i64 0, ptr [[TMP67]], align 8 4458 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 4459 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4 4460 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 4461 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 4462 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 4463 // CHECK13-NEXT: store i32 0, ptr [[TMP70]], align 4 4464 // CHECK13-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 4465 // CHECK13-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 4466 // CHECK13-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 4467 // CHECK13: omp_offload.failed16: 4468 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 4469 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]] 4470 // CHECK13: omp_offload.cont17: 4471 // CHECK13-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 4 4472 // CHECK13-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4 4473 // CHECK13-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4 4474 // CHECK13-NEXT: store i32 [[TMP74]], ptr [[N_CASTED19]], align 4 4475 // CHECK13-NEXT: [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8 4476 // CHECK13-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 4477 // CHECK13-NEXT: store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 4478 // CHECK13-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 4479 // CHECK13-NEXT: [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4 4480 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false) 4481 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 4482 // CHECK13-NEXT: store i64 [[TMP75]], ptr [[TMP79]], align 8 4483 // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 4484 // CHECK13-NEXT: store i64 [[TMP75]], ptr [[TMP80]], align 8 4485 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 4486 // CHECK13-NEXT: store ptr null, ptr [[TMP81]], align 8 4487 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 4488 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP82]], align 8 4489 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 4490 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP83]], align 8 4491 // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 4492 // CHECK13-NEXT: store ptr null, ptr [[TMP84]], align 8 4493 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 4494 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 8 4495 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 4496 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP86]], align 8 4497 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 4498 // CHECK13-NEXT: store i64 [[TMP78]], ptr [[TMP87]], align 8 4499 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 4500 // CHECK13-NEXT: store ptr null, ptr [[TMP88]], align 8 4501 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 4502 // CHECK13-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8 4503 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 4504 // CHECK13-NEXT: store i64 [[TMP77]], ptr [[TMP90]], align 8 4505 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 4506 // CHECK13-NEXT: store ptr null, ptr [[TMP91]], align 8 4507 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 4508 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 4509 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 4510 // CHECK13-NEXT: [[TMP95:%.*]] = load i32, ptr [[N]], align 4 4511 // CHECK13-NEXT: store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4 4512 // CHECK13-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 4513 // CHECK13-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0 4514 // CHECK13-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 4515 // CHECK13-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 4516 // CHECK13-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 4517 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 4518 // CHECK13-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1 4519 // CHECK13-NEXT: [[TMP98:%.*]] = zext i32 [[ADD30]] to i64 4520 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 4521 // CHECK13-NEXT: store i32 3, ptr [[TMP99]], align 4 4522 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 4523 // CHECK13-NEXT: store i32 4, ptr [[TMP100]], align 4 4524 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 4525 // CHECK13-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8 4526 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 4527 // CHECK13-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8 4528 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 4529 // CHECK13-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 8 4530 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 4531 // CHECK13-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8 4532 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 4533 // CHECK13-NEXT: store ptr null, ptr [[TMP105]], align 8 4534 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 4535 // CHECK13-NEXT: store ptr null, ptr [[TMP106]], align 8 4536 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 4537 // CHECK13-NEXT: store i64 [[TMP98]], ptr [[TMP107]], align 8 4538 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 4539 // CHECK13-NEXT: store i64 0, ptr [[TMP108]], align 8 4540 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 4541 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4 4542 // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 4543 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4 4544 // CHECK13-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 4545 // CHECK13-NEXT: store i32 0, ptr [[TMP111]], align 4 4546 // CHECK13-NEXT: [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 4547 // CHECK13-NEXT: [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0 4548 // CHECK13-NEXT: br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 4549 // CHECK13: omp_offload.failed32: 4550 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]] 4551 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]] 4552 // CHECK13: omp_offload.cont33: 4553 // CHECK13-NEXT: [[TMP114:%.*]] = load i32, ptr [[N]], align 4 4554 // CHECK13-NEXT: store i32 [[TMP114]], ptr [[N_CASTED34]], align 4 4555 // CHECK13-NEXT: [[TMP115:%.*]] = load i64, ptr [[N_CASTED34]], align 8 4556 // CHECK13-NEXT: [[TMP116:%.*]] = mul nuw i64 [[TMP1]], 4 4557 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES38]], ptr align 8 @.offload_sizes.5, i64 24, i1 false) 4558 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 4559 // CHECK13-NEXT: store i64 [[TMP115]], ptr [[TMP117]], align 8 4560 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 4561 // CHECK13-NEXT: store i64 [[TMP115]], ptr [[TMP118]], align 8 4562 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 0 4563 // CHECK13-NEXT: store ptr null, ptr [[TMP119]], align 8 4564 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 4565 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP120]], align 8 4566 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 4567 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP121]], align 8 4568 // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 1 4569 // CHECK13-NEXT: store ptr null, ptr [[TMP122]], align 8 4570 // CHECK13-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 4571 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP123]], align 8 4572 // CHECK13-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 4573 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP124]], align 8 4574 // CHECK13-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 4575 // CHECK13-NEXT: store i64 [[TMP116]], ptr [[TMP125]], align 8 4576 // CHECK13-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 2 4577 // CHECK13-NEXT: store ptr null, ptr [[TMP126]], align 8 4578 // CHECK13-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 4579 // CHECK13-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 4580 // CHECK13-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 4581 // CHECK13-NEXT: [[TMP130:%.*]] = load i32, ptr [[N]], align 4 4582 // CHECK13-NEXT: store i32 [[TMP130]], ptr [[DOTCAPTURE_EXPR_40]], align 4 4583 // CHECK13-NEXT: [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 4584 // CHECK13-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP131]], 0 4585 // CHECK13-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 4586 // CHECK13-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 4587 // CHECK13-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 4588 // CHECK13-NEXT: [[TMP132:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 4589 // CHECK13-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP132]], 1 4590 // CHECK13-NEXT: [[TMP133:%.*]] = zext i32 [[ADD45]] to i64 4591 // CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 4592 // CHECK13-NEXT: store i32 3, ptr [[TMP134]], align 4 4593 // CHECK13-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 4594 // CHECK13-NEXT: store i32 3, ptr [[TMP135]], align 4 4595 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 4596 // CHECK13-NEXT: store ptr [[TMP127]], ptr [[TMP136]], align 8 4597 // CHECK13-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 4598 // CHECK13-NEXT: store ptr [[TMP128]], ptr [[TMP137]], align 8 4599 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 4600 // CHECK13-NEXT: store ptr [[TMP129]], ptr [[TMP138]], align 8 4601 // CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 4602 // CHECK13-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP139]], align 8 4603 // CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 4604 // CHECK13-NEXT: store ptr null, ptr [[TMP140]], align 8 4605 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 4606 // CHECK13-NEXT: store ptr null, ptr [[TMP141]], align 8 4607 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 4608 // CHECK13-NEXT: store i64 [[TMP133]], ptr [[TMP142]], align 8 4609 // CHECK13-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 4610 // CHECK13-NEXT: store i64 0, ptr [[TMP143]], align 8 4611 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 4612 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4 4613 // CHECK13-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 4614 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP145]], align 4 4615 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 4616 // CHECK13-NEXT: store i32 0, ptr [[TMP146]], align 4 4617 // CHECK13-NEXT: [[TMP147:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 4618 // CHECK13-NEXT: [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0 4619 // CHECK13-NEXT: br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 4620 // CHECK13: omp_offload.failed47: 4621 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP115]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 4622 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]] 4623 // CHECK13: omp_offload.cont48: 4624 // CHECK13-NEXT: [[TMP149:%.*]] = load i32, ptr [[M]], align 4 4625 // CHECK13-NEXT: store i32 [[TMP149]], ptr [[DOTCAPTURE_EXPR_49]], align 4 4626 // CHECK13-NEXT: [[TMP150:%.*]] = load i32, ptr [[N]], align 4 4627 // CHECK13-NEXT: store i32 [[TMP150]], ptr [[N_CASTED50]], align 4 4628 // CHECK13-NEXT: [[TMP151:%.*]] = load i64, ptr [[N_CASTED50]], align 8 4629 // CHECK13-NEXT: [[TMP152:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 4630 // CHECK13-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 4631 // CHECK13-NEXT: [[TMP153:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 8 4632 // CHECK13-NEXT: [[TMP154:%.*]] = mul nuw i64 [[TMP1]], 4 4633 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES55]], ptr align 8 @.offload_sizes.7, i64 32, i1 false) 4634 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 4635 // CHECK13-NEXT: store i64 [[TMP151]], ptr [[TMP155]], align 8 4636 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 4637 // CHECK13-NEXT: store i64 [[TMP151]], ptr [[TMP156]], align 8 4638 // CHECK13-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 0 4639 // CHECK13-NEXT: store ptr null, ptr [[TMP157]], align 8 4640 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 4641 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP158]], align 8 4642 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 4643 // CHECK13-NEXT: store i64 [[TMP1]], ptr [[TMP159]], align 8 4644 // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 1 4645 // CHECK13-NEXT: store ptr null, ptr [[TMP160]], align 8 4646 // CHECK13-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 4647 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP161]], align 8 4648 // CHECK13-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 4649 // CHECK13-NEXT: store ptr [[VLA]], ptr [[TMP162]], align 8 4650 // CHECK13-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 4651 // CHECK13-NEXT: store i64 [[TMP154]], ptr [[TMP163]], align 8 4652 // CHECK13-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 2 4653 // CHECK13-NEXT: store ptr null, ptr [[TMP164]], align 8 4654 // CHECK13-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 4655 // CHECK13-NEXT: store i64 [[TMP153]], ptr [[TMP165]], align 8 4656 // CHECK13-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 4657 // CHECK13-NEXT: store i64 [[TMP153]], ptr [[TMP166]], align 8 4658 // CHECK13-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 3 4659 // CHECK13-NEXT: store ptr null, ptr [[TMP167]], align 8 4660 // CHECK13-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 4661 // CHECK13-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 4662 // CHECK13-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 4663 // CHECK13-NEXT: [[TMP171:%.*]] = load i32, ptr [[N]], align 4 4664 // CHECK13-NEXT: store i32 [[TMP171]], ptr [[DOTCAPTURE_EXPR_57]], align 4 4665 // CHECK13-NEXT: [[TMP172:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 4666 // CHECK13-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP172]], 0 4667 // CHECK13-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 4668 // CHECK13-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 4669 // CHECK13-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 4670 // CHECK13-NEXT: [[TMP173:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 4671 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP173]], 1 4672 // CHECK13-NEXT: [[TMP174:%.*]] = zext i32 [[ADD62]] to i64 4673 // CHECK13-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 4674 // CHECK13-NEXT: store i32 3, ptr [[TMP175]], align 4 4675 // CHECK13-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 4676 // CHECK13-NEXT: store i32 4, ptr [[TMP176]], align 4 4677 // CHECK13-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 4678 // CHECK13-NEXT: store ptr [[TMP168]], ptr [[TMP177]], align 8 4679 // CHECK13-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 4680 // CHECK13-NEXT: store ptr [[TMP169]], ptr [[TMP178]], align 8 4681 // CHECK13-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 4682 // CHECK13-NEXT: store ptr [[TMP170]], ptr [[TMP179]], align 8 4683 // CHECK13-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 4684 // CHECK13-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP180]], align 8 4685 // CHECK13-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 4686 // CHECK13-NEXT: store ptr null, ptr [[TMP181]], align 8 4687 // CHECK13-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 4688 // CHECK13-NEXT: store ptr null, ptr [[TMP182]], align 8 4689 // CHECK13-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 4690 // CHECK13-NEXT: store i64 [[TMP174]], ptr [[TMP183]], align 8 4691 // CHECK13-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 4692 // CHECK13-NEXT: store i64 0, ptr [[TMP184]], align 8 4693 // CHECK13-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 4694 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP185]], align 4 4695 // CHECK13-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 4696 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP186]], align 4 4697 // CHECK13-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 4698 // CHECK13-NEXT: store i32 0, ptr [[TMP187]], align 4 4699 // CHECK13-NEXT: [[TMP188:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 4700 // CHECK13-NEXT: [[TMP189:%.*]] = icmp ne i32 [[TMP188]], 0 4701 // CHECK13-NEXT: br i1 [[TMP189]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 4702 // CHECK13: omp_offload.failed64: 4703 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP153]]) #[[ATTR3]] 4704 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]] 4705 // CHECK13: omp_offload.cont65: 4706 // CHECK13-NEXT: [[TMP190:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 4707 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP190]]) 4708 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 4709 // CHECK13-NEXT: [[TMP191:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 4710 // CHECK13-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP191]]) 4711 // CHECK13-NEXT: [[TMP192:%.*]] = load i32, ptr [[RETVAL]], align 4 4712 // CHECK13-NEXT: ret i32 [[TMP192]] 4713 // 4714 // 4715 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 4716 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4717 // CHECK13-NEXT: entry: 4718 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4719 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4720 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 4721 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4722 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 4723 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 4724 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 4725 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 4726 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 4727 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 4728 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 4729 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 4730 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 4731 // CHECK13-NEXT: ret void 4732 // 4733 // 4734 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 4735 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4736 // CHECK13-NEXT: entry: 4737 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4738 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4739 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4740 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4741 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 4742 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4743 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4744 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4745 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4746 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4747 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4748 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4749 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4750 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4751 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 4752 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4753 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4754 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4755 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 4756 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 4757 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 4758 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 4759 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 4760 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 4761 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 4762 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4763 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4764 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4765 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4766 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4767 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 4768 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4769 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4770 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4771 // CHECK13: omp.precond.then: 4772 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4773 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4774 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 4775 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4776 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4777 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4778 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 4779 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4780 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4781 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4782 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 4783 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4784 // CHECK13: cond.true: 4785 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4786 // CHECK13-NEXT: br label [[COND_END:%.*]] 4787 // CHECK13: cond.false: 4788 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4789 // CHECK13-NEXT: br label [[COND_END]] 4790 // CHECK13: cond.end: 4791 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4792 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4793 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4794 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 4795 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4796 // CHECK13: omp.inner.for.cond: 4797 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4798 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4799 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4800 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4801 // CHECK13: omp.inner.for.body: 4802 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4803 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 4804 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4805 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 4806 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 4807 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 4808 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 4809 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]) 4810 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4811 // CHECK13: omp.inner.for.inc: 4812 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4813 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4814 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4815 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 4816 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4817 // CHECK13: omp.inner.for.end: 4818 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4819 // CHECK13: omp.loop.exit: 4820 // CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4821 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 4822 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 4823 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4824 // CHECK13: omp.precond.end: 4825 // CHECK13-NEXT: ret void 4826 // 4827 // 4828 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 4829 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4830 // CHECK13-NEXT: entry: 4831 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4832 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4833 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4834 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4835 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4836 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4837 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 4838 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4839 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4840 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4841 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4842 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4843 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4844 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4845 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4846 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4847 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 4848 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4849 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4850 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4851 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4852 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 4853 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 4854 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 4855 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 4856 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 4857 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 4858 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 4859 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4860 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4861 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4862 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4863 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4864 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 4865 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4866 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4867 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4868 // CHECK13: omp.precond.then: 4869 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4870 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4871 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 4872 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 4873 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 4874 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 4875 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 4876 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 4877 // CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 4878 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4879 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4880 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4881 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 4882 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4883 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4884 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4885 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4886 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4887 // CHECK13: cond.true: 4888 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4889 // CHECK13-NEXT: br label [[COND_END:%.*]] 4890 // CHECK13: cond.false: 4891 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4892 // CHECK13-NEXT: br label [[COND_END]] 4893 // CHECK13: cond.end: 4894 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4895 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4896 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4897 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 4898 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4899 // CHECK13: omp.inner.for.cond: 4900 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4901 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4902 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4903 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4904 // CHECK13: omp.inner.for.body: 4905 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4906 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 4907 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4908 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 4909 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4 4910 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 4911 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 4912 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 4913 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4914 // CHECK13: omp.body.continue: 4915 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4916 // CHECK13: omp.inner.for.inc: 4917 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4918 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 4919 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 4920 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4921 // CHECK13: omp.inner.for.end: 4922 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4923 // CHECK13: omp.loop.exit: 4924 // CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4925 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 4926 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 4927 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4928 // CHECK13: omp.precond.end: 4929 // CHECK13-NEXT: ret void 4930 // 4931 // 4932 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 4933 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4934 // CHECK13-NEXT: entry: 4935 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4936 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4937 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 4938 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4939 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 4940 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 4941 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 4942 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 4943 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 4944 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 4945 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 4946 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 4947 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 4948 // CHECK13-NEXT: ret void 4949 // 4950 // 4951 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 4952 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4953 // CHECK13-NEXT: entry: 4954 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 4955 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 4956 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4957 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4958 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 4959 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4960 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4961 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4962 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4963 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4964 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4965 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4966 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4967 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4968 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 4969 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4970 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 4971 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 4972 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 4973 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 4974 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 4975 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 4976 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 4977 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 4978 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 4979 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4980 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4981 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4982 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4983 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4984 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 4985 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4986 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4987 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4988 // CHECK13: omp.precond.then: 4989 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4990 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4991 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 4992 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4993 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4994 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 4995 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 4996 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4997 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4998 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4999 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5000 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5001 // CHECK13: cond.true: 5002 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5003 // CHECK13-NEXT: br label [[COND_END:%.*]] 5004 // CHECK13: cond.false: 5005 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5006 // CHECK13-NEXT: br label [[COND_END]] 5007 // CHECK13: cond.end: 5008 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5009 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5010 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5011 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 5012 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5013 // CHECK13: omp.inner.for.cond: 5014 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5015 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5016 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5017 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5018 // CHECK13: omp.inner.for.body: 5019 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5020 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 5021 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5022 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5023 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 5024 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 5025 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 5026 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]) 5027 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5028 // CHECK13: omp.inner.for.inc: 5029 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5030 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 5031 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5032 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 5033 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5034 // CHECK13: omp.inner.for.end: 5035 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5036 // CHECK13: omp.loop.exit: 5037 // CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5038 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 5039 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 5040 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5041 // CHECK13: omp.precond.end: 5042 // CHECK13-NEXT: ret void 5043 // 5044 // 5045 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 5046 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5047 // CHECK13-NEXT: entry: 5048 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5049 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5050 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5051 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5052 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5053 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5054 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5055 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5056 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5057 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5058 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5059 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5060 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5061 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5062 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5063 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5064 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5065 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5066 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5067 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5068 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5069 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5070 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5071 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5072 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5073 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5074 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5075 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5076 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5077 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5078 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5079 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5080 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5081 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5082 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5083 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5084 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5085 // CHECK13: omp.precond.then: 5086 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5087 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5088 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5089 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5090 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 5091 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5092 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 5093 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5094 // CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 5095 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5096 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5097 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5098 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 5099 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5100 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5101 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5102 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5103 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5104 // CHECK13: cond.true: 5105 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5106 // CHECK13-NEXT: br label [[COND_END:%.*]] 5107 // CHECK13: cond.false: 5108 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5109 // CHECK13-NEXT: br label [[COND_END]] 5110 // CHECK13: cond.end: 5111 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5112 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5113 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5114 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 5115 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5116 // CHECK13: omp.inner.for.cond: 5117 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5118 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5119 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5120 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5121 // CHECK13: omp.inner.for.body: 5122 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5123 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 5124 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5125 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 5126 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4 5127 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 5128 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 5129 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 5130 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5131 // CHECK13: omp.body.continue: 5132 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5133 // CHECK13: omp.inner.for.inc: 5134 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5135 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 5136 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 5137 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5138 // CHECK13: omp.inner.for.end: 5139 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5140 // CHECK13: omp.loop.exit: 5141 // CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5142 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 5143 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 5144 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5145 // CHECK13: omp.precond.end: 5146 // CHECK13-NEXT: ret void 5147 // 5148 // 5149 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 5150 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5151 // CHECK13-NEXT: entry: 5152 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5153 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5154 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5155 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5156 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5157 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5158 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5159 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5160 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5161 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5162 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5163 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5164 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5165 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 5166 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 5167 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5168 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5169 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5170 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 5171 // CHECK13-NEXT: ret void 5172 // 5173 // 5174 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 5175 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5176 // CHECK13-NEXT: entry: 5177 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5178 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5179 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5180 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5181 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5182 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5183 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5184 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5185 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5186 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5187 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5188 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5189 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5190 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5191 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5192 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5193 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5194 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5195 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5196 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5197 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5198 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5199 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5200 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5201 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5202 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5203 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5204 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5205 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5206 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5207 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5208 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5209 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 5210 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5211 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5212 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5213 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5214 // CHECK13: omp.precond.then: 5215 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5216 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5217 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 5218 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5219 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5220 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5221 // CHECK13-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5222 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 5223 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 5224 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5225 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5226 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 5227 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5228 // CHECK13: cond.true: 5229 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5230 // CHECK13-NEXT: br label [[COND_END:%.*]] 5231 // CHECK13: cond.false: 5232 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5233 // CHECK13-NEXT: br label [[COND_END]] 5234 // CHECK13: cond.end: 5235 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 5236 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5237 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5238 // CHECK13-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 5239 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5240 // CHECK13: omp.inner.for.cond: 5241 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5242 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5243 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 5244 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 5245 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5246 // CHECK13: omp.inner.for.body: 5247 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5248 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 5249 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5250 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 5251 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4 5252 // CHECK13-NEXT: store i32 [[TMP20]], ptr [[N_CASTED]], align 4 5253 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8 5254 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5255 // CHECK13-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5256 // CHECK13-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5257 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP23]]) 5258 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5259 // CHECK13: omp.inner.for.inc: 5260 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5261 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 5262 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 5263 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 5264 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5265 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 5266 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 5267 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4 5268 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5269 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 5270 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 5271 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4 5272 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5273 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5274 // CHECK13-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]] 5275 // CHECK13-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 5276 // CHECK13: cond.true11: 5277 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5278 // CHECK13-NEXT: br label [[COND_END13:%.*]] 5279 // CHECK13: cond.false12: 5280 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5281 // CHECK13-NEXT: br label [[COND_END13]] 5282 // CHECK13: cond.end13: 5283 // CHECK13-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE11]] ], [ [[TMP33]], [[COND_FALSE12]] ] 5284 // CHECK13-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4 5285 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5286 // CHECK13-NEXT: store i32 [[TMP34]], ptr [[DOTOMP_IV]], align 4 5287 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5288 // CHECK13: omp.inner.for.end: 5289 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5290 // CHECK13: omp.loop.exit: 5291 // CHECK13-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5292 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 5293 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP36]]) 5294 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5295 // CHECK13: omp.precond.end: 5296 // CHECK13-NEXT: ret void 5297 // 5298 // 5299 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 5300 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5301 // CHECK13-NEXT: entry: 5302 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5303 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5304 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5305 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5306 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5307 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5308 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5309 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5310 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5311 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5312 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5313 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5314 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5315 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5316 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5317 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5318 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5319 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 5320 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5321 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5322 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5323 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5324 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5325 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5326 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5327 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5328 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5329 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5330 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5331 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5332 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5333 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5334 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5335 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5336 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 5337 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5338 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5339 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5340 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5341 // CHECK13: omp.precond.then: 5342 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5343 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5344 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5345 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5346 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 5347 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5348 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 5349 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5350 // CHECK13-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 5351 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5352 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5353 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5354 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 5355 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5356 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5357 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5358 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5359 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5360 // CHECK13: cond.true: 5361 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5362 // CHECK13-NEXT: br label [[COND_END:%.*]] 5363 // CHECK13: cond.false: 5364 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5365 // CHECK13-NEXT: br label [[COND_END]] 5366 // CHECK13: cond.end: 5367 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5368 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5369 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5370 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 5371 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5372 // CHECK13: omp.inner.for.cond: 5373 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5374 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5375 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5376 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5377 // CHECK13: omp.inner.for.body: 5378 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5379 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 5380 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5381 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I5]], align 4 5382 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[I5]], align 4 5383 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 5384 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 5385 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 5386 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5387 // CHECK13: omp.body.continue: 5388 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5389 // CHECK13: omp.inner.for.inc: 5390 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5391 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 5392 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 5393 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5394 // CHECK13: omp.inner.for.end: 5395 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5396 // CHECK13: omp.loop.exit: 5397 // CHECK13-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5398 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 5399 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 5400 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5401 // CHECK13: omp.precond.end: 5402 // CHECK13-NEXT: ret void 5403 // 5404 // 5405 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 5406 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5407 // CHECK13-NEXT: entry: 5408 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5409 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5410 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5411 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5412 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5413 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5414 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5415 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5416 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5417 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5418 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 5419 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 5420 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 5421 // CHECK13-NEXT: ret void 5422 // 5423 // 5424 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 5425 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5426 // CHECK13-NEXT: entry: 5427 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5428 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5429 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5430 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5431 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5432 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5433 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5434 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5435 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5436 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5437 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5438 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5439 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5440 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5441 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 5442 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5443 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5444 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5445 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5446 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5447 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5448 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5449 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5450 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5451 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5452 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5453 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5454 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5455 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5456 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5457 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5458 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5459 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5460 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5461 // CHECK13: omp.precond.then: 5462 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5463 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5464 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 5465 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5466 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5467 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5468 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 5469 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5470 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5471 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5472 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5473 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5474 // CHECK13: cond.true: 5475 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5476 // CHECK13-NEXT: br label [[COND_END:%.*]] 5477 // CHECK13: cond.false: 5478 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5479 // CHECK13-NEXT: br label [[COND_END]] 5480 // CHECK13: cond.end: 5481 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5482 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5483 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5484 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 5485 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5486 // CHECK13: omp.inner.for.cond: 5487 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5488 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5489 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5490 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5491 // CHECK13: omp.inner.for.body: 5492 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5493 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 5494 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5495 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5496 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 5497 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 5498 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 5499 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]) 5500 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5501 // CHECK13: omp.inner.for.inc: 5502 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5503 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 5504 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5505 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 5506 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5507 // CHECK13: omp.inner.for.end: 5508 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5509 // CHECK13: omp.loop.exit: 5510 // CHECK13-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5511 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 5512 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 5513 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5514 // CHECK13: omp.precond.end: 5515 // CHECK13-NEXT: ret void 5516 // 5517 // 5518 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 5519 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5520 // CHECK13-NEXT: entry: 5521 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5522 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5523 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5524 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5525 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5526 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5527 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5528 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5529 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5530 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5531 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5532 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5533 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5534 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5535 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5536 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5537 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5538 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5539 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5540 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5541 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5542 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5543 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5544 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5545 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5546 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5547 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5548 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 5549 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5550 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5551 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5552 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5553 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5554 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5555 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5556 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5557 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5558 // CHECK13: omp.precond.then: 5559 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5560 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5561 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5562 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5563 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 5564 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5565 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 5566 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5567 // CHECK13-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 5568 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5569 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5570 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5571 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5572 // CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5573 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 5574 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 5575 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5576 // CHECK13: omp.dispatch.cond: 5577 // CHECK13-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5578 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 5579 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 5580 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 5581 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5582 // CHECK13: omp.dispatch.body: 5583 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5584 // CHECK13-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 5585 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5586 // CHECK13: omp.inner.for.cond: 5587 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 5588 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 5589 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 5590 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5591 // CHECK13: omp.inner.for.body: 5592 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 5593 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 5594 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5595 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]] 5596 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]] 5597 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 5598 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 5599 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 5600 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5601 // CHECK13: omp.body.continue: 5602 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5603 // CHECK13: omp.inner.for.inc: 5604 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 5605 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 5606 // CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 5607 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 5608 // CHECK13: omp.inner.for.end: 5609 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5610 // CHECK13: omp.dispatch.inc: 5611 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 5612 // CHECK13: omp.dispatch.end: 5613 // CHECK13-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5614 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 5615 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 5616 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5617 // CHECK13: omp.precond.end: 5618 // CHECK13-NEXT: ret void 5619 // 5620 // 5621 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 5622 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5623 // CHECK13-NEXT: entry: 5624 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5625 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5626 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5627 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5628 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5629 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5630 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5631 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5632 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5633 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5634 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5635 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5636 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5637 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 5638 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 5639 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5640 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5641 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5642 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 5643 // CHECK13-NEXT: ret void 5644 // 5645 // 5646 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 5647 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5648 // CHECK13-NEXT: entry: 5649 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5650 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5651 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5652 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5653 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5654 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5655 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5656 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5657 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5658 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5659 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5660 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5661 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5662 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5663 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5664 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5665 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 5666 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5667 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5668 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5669 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5670 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5671 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5672 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5673 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5674 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5675 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5676 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5677 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5678 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5679 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5680 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5681 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 5682 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5683 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5684 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5685 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5686 // CHECK13: omp.precond.then: 5687 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5688 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5689 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 5690 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5691 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5692 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5693 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 5694 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5695 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5696 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5697 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5698 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5699 // CHECK13: cond.true: 5700 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5701 // CHECK13-NEXT: br label [[COND_END:%.*]] 5702 // CHECK13: cond.false: 5703 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5704 // CHECK13-NEXT: br label [[COND_END]] 5705 // CHECK13: cond.end: 5706 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5707 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5708 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5709 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 5710 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5711 // CHECK13: omp.inner.for.cond: 5712 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5713 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5714 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5715 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5716 // CHECK13: omp.inner.for.body: 5717 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5718 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 5719 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5720 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5721 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 5722 // CHECK13-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 5723 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 5724 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5725 // CHECK13-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5726 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5727 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP22]]) 5728 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5729 // CHECK13: omp.inner.for.inc: 5730 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 5731 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 5732 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 5733 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 5734 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5735 // CHECK13: omp.inner.for.end: 5736 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5737 // CHECK13: omp.loop.exit: 5738 // CHECK13-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5739 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 5740 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 5741 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5742 // CHECK13: omp.precond.end: 5743 // CHECK13-NEXT: ret void 5744 // 5745 // 5746 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 5747 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5748 // CHECK13-NEXT: entry: 5749 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5750 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5751 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5752 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5753 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5754 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5755 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5756 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5757 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5758 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5759 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5760 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5761 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5762 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5763 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5764 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5765 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5766 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4 5767 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5768 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5769 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5770 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5771 // CHECK13-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5772 // CHECK13-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 5773 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5774 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 5775 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 5776 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5777 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 5778 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5779 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5780 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5781 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5782 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5783 // CHECK13-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 5784 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 5785 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5786 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5787 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5788 // CHECK13: omp.precond.then: 5789 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5790 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 5791 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 5792 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5793 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 5794 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5795 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 5796 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5797 // CHECK13-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 5798 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5799 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5800 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 5801 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5802 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5803 // CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5804 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 5805 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 5806 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5807 // CHECK13: omp.dispatch.cond: 5808 // CHECK13-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5809 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 5810 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 5811 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 5812 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5813 // CHECK13: omp.dispatch.body: 5814 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5815 // CHECK13-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 5816 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5817 // CHECK13: omp.inner.for.cond: 5818 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 5819 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 5820 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5821 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5822 // CHECK13: omp.inner.for.body: 5823 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 5824 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5825 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5826 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]] 5827 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]] 5828 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 5829 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 5830 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 5831 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5832 // CHECK13: omp.body.continue: 5833 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5834 // CHECK13: omp.inner.for.inc: 5835 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 5836 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 5837 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 5838 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 5839 // CHECK13: omp.inner.for.end: 5840 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5841 // CHECK13: omp.dispatch.inc: 5842 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 5843 // CHECK13: omp.dispatch.end: 5844 // CHECK13-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5845 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 5846 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 5847 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5848 // CHECK13: omp.precond.end: 5849 // CHECK13-NEXT: ret void 5850 // 5851 // 5852 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5853 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 5854 // CHECK13-NEXT: entry: 5855 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5856 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5857 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 5858 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 5859 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 5860 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 5861 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5862 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 5863 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 5864 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 5865 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 5866 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 5867 // CHECK13-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5868 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5869 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5870 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8 5871 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8 5872 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8 5873 // CHECK13-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 5874 // CHECK13-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5875 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8 5876 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8 5877 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8 5878 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 5879 // CHECK13-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5880 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 5881 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8 5882 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 8 5883 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 8 5884 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 8 5885 // CHECK13-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 5886 // CHECK13-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 5887 // CHECK13-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 5888 // CHECK13-NEXT: store i32 10, ptr [[M]], align 4 5889 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5890 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 5891 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5892 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 5893 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5894 // CHECK13-NEXT: store ptr null, ptr [[TMP2]], align 8 5895 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5896 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5897 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 5898 // CHECK13-NEXT: store i32 3, ptr [[TMP5]], align 4 5899 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 5900 // CHECK13-NEXT: store i32 1, ptr [[TMP6]], align 4 5901 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 5902 // CHECK13-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 5903 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 5904 // CHECK13-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 5905 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 5906 // CHECK13-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 8 5907 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 5908 // CHECK13-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8 5909 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 5910 // CHECK13-NEXT: store ptr null, ptr [[TMP11]], align 8 5911 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 5912 // CHECK13-NEXT: store ptr null, ptr [[TMP12]], align 8 5913 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 5914 // CHECK13-NEXT: store i64 10, ptr [[TMP13]], align 8 5915 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 5916 // CHECK13-NEXT: store i64 0, ptr [[TMP14]], align 8 5917 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 5918 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 5919 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 5920 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 5921 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 5922 // CHECK13-NEXT: store i32 0, ptr [[TMP17]], align 4 5923 // CHECK13-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 5924 // CHECK13-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 5925 // CHECK13-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5926 // CHECK13: omp_offload.failed: 5927 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 5928 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 5929 // CHECK13: omp_offload.cont: 5930 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 5931 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP20]], align 8 5932 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 5933 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP21]], align 8 5934 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 5935 // CHECK13-NEXT: store ptr null, ptr [[TMP22]], align 8 5936 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 5937 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 5938 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 5939 // CHECK13-NEXT: store i32 3, ptr [[TMP25]], align 4 5940 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 5941 // CHECK13-NEXT: store i32 1, ptr [[TMP26]], align 4 5942 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 5943 // CHECK13-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 5944 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 5945 // CHECK13-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 5946 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 5947 // CHECK13-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 8 5948 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 5949 // CHECK13-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8 5950 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 5951 // CHECK13-NEXT: store ptr null, ptr [[TMP31]], align 8 5952 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 5953 // CHECK13-NEXT: store ptr null, ptr [[TMP32]], align 8 5954 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 5955 // CHECK13-NEXT: store i64 10, ptr [[TMP33]], align 8 5956 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 5957 // CHECK13-NEXT: store i64 0, ptr [[TMP34]], align 8 5958 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 5959 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 5960 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 5961 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 5962 // CHECK13-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 5963 // CHECK13-NEXT: store i32 0, ptr [[TMP37]], align 4 5964 // CHECK13-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 5965 // CHECK13-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 5966 // CHECK13-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 5967 // CHECK13: omp_offload.failed6: 5968 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 5969 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]] 5970 // CHECK13: omp_offload.cont7: 5971 // CHECK13-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 5972 // CHECK13-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 5973 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5974 // CHECK13-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 5975 // CHECK13-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 5976 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 5977 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP43]], align 8 5978 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 5979 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP44]], align 8 5980 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 5981 // CHECK13-NEXT: store ptr null, ptr [[TMP45]], align 8 5982 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 5983 // CHECK13-NEXT: store i64 [[TMP42]], ptr [[TMP46]], align 8 5984 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 5985 // CHECK13-NEXT: store i64 [[TMP42]], ptr [[TMP47]], align 8 5986 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 5987 // CHECK13-NEXT: store ptr null, ptr [[TMP48]], align 8 5988 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 5989 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 5990 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 5991 // CHECK13-NEXT: store i32 3, ptr [[TMP51]], align 4 5992 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 5993 // CHECK13-NEXT: store i32 2, ptr [[TMP52]], align 4 5994 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 5995 // CHECK13-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 8 5996 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 5997 // CHECK13-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 8 5998 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 5999 // CHECK13-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 8 6000 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 6001 // CHECK13-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 8 6002 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 6003 // CHECK13-NEXT: store ptr null, ptr [[TMP57]], align 8 6004 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 6005 // CHECK13-NEXT: store ptr null, ptr [[TMP58]], align 8 6006 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 6007 // CHECK13-NEXT: store i64 10, ptr [[TMP59]], align 8 6008 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 6009 // CHECK13-NEXT: store i64 0, ptr [[TMP60]], align 8 6010 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 6011 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 6012 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 6013 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 6014 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 6015 // CHECK13-NEXT: store i32 0, ptr [[TMP63]], align 4 6016 // CHECK13-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 6017 // CHECK13-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 6018 // CHECK13-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 6019 // CHECK13: omp_offload.failed13: 6020 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i64 [[TMP42]]) #[[ATTR3]] 6021 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT14]] 6022 // CHECK13: omp_offload.cont14: 6023 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 6024 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP66]], align 8 6025 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 6026 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP67]], align 8 6027 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0 6028 // CHECK13-NEXT: store ptr null, ptr [[TMP68]], align 8 6029 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 6030 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 6031 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 6032 // CHECK13-NEXT: store i32 3, ptr [[TMP71]], align 4 6033 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 6034 // CHECK13-NEXT: store i32 1, ptr [[TMP72]], align 4 6035 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 6036 // CHECK13-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 8 6037 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 6038 // CHECK13-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 8 6039 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 6040 // CHECK13-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 8 6041 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 6042 // CHECK13-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 8 6043 // CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 6044 // CHECK13-NEXT: store ptr null, ptr [[TMP77]], align 8 6045 // CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 6046 // CHECK13-NEXT: store ptr null, ptr [[TMP78]], align 8 6047 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 6048 // CHECK13-NEXT: store i64 10, ptr [[TMP79]], align 8 6049 // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 6050 // CHECK13-NEXT: store i64 0, ptr [[TMP80]], align 8 6051 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 6052 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 6053 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 6054 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 6055 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 6056 // CHECK13-NEXT: store i32 0, ptr [[TMP83]], align 4 6057 // CHECK13-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 6058 // CHECK13-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 6059 // CHECK13-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 6060 // CHECK13: omp_offload.failed20: 6061 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 6062 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT21]] 6063 // CHECK13: omp_offload.cont21: 6064 // CHECK13-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 6065 // CHECK13-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 6066 // CHECK13-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 6067 // CHECK13-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 6068 // CHECK13-NEXT: [[TMP88:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 8 6069 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6070 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP89]], align 8 6071 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6072 // CHECK13-NEXT: store ptr [[A]], ptr [[TMP90]], align 8 6073 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 6074 // CHECK13-NEXT: store ptr null, ptr [[TMP91]], align 8 6075 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 6076 // CHECK13-NEXT: store i64 [[TMP88]], ptr [[TMP92]], align 8 6077 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 6078 // CHECK13-NEXT: store i64 [[TMP88]], ptr [[TMP93]], align 8 6079 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1 6080 // CHECK13-NEXT: store ptr null, ptr [[TMP94]], align 8 6081 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6082 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6083 // CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 6084 // CHECK13-NEXT: store i32 3, ptr [[TMP97]], align 4 6085 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 6086 // CHECK13-NEXT: store i32 2, ptr [[TMP98]], align 4 6087 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 6088 // CHECK13-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 8 6089 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 6090 // CHECK13-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 8 6091 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 6092 // CHECK13-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 8 6093 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 6094 // CHECK13-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 8 6095 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 6096 // CHECK13-NEXT: store ptr null, ptr [[TMP103]], align 8 6097 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 6098 // CHECK13-NEXT: store ptr null, ptr [[TMP104]], align 8 6099 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 6100 // CHECK13-NEXT: store i64 10, ptr [[TMP105]], align 8 6101 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 6102 // CHECK13-NEXT: store i64 0, ptr [[TMP106]], align 8 6103 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 6104 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 6105 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 6106 // CHECK13-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 6107 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 6108 // CHECK13-NEXT: store i32 0, ptr [[TMP109]], align 4 6109 // CHECK13-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 6110 // CHECK13-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 6111 // CHECK13-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 6112 // CHECK13: omp_offload.failed29: 6113 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i64 [[TMP88]]) #[[ATTR3]] 6114 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT30]] 6115 // CHECK13: omp_offload.cont30: 6116 // CHECK13-NEXT: ret i32 0 6117 // 6118 // 6119 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 6120 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6121 // CHECK13-NEXT: entry: 6122 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6123 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6124 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6125 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 6126 // CHECK13-NEXT: ret void 6127 // 6128 // 6129 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 6130 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6131 // CHECK13-NEXT: entry: 6132 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6133 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6134 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6135 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6136 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6137 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6138 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6139 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6140 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6141 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6142 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6143 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6144 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6145 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6146 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6147 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 6148 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6149 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6150 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6151 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6152 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6153 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6154 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6155 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6156 // CHECK13: cond.true: 6157 // CHECK13-NEXT: br label [[COND_END:%.*]] 6158 // CHECK13: cond.false: 6159 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6160 // CHECK13-NEXT: br label [[COND_END]] 6161 // CHECK13: cond.end: 6162 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6163 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6164 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6165 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6166 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6167 // CHECK13: omp.inner.for.cond: 6168 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6169 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6170 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6171 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6172 // CHECK13: omp.inner.for.body: 6173 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6174 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6175 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6176 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6177 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 6178 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6179 // CHECK13: omp.inner.for.inc: 6180 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6181 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6182 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6183 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 6184 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6185 // CHECK13: omp.inner.for.end: 6186 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6187 // CHECK13: omp.loop.exit: 6188 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6189 // CHECK13-NEXT: ret void 6190 // 6191 // 6192 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 6193 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6194 // CHECK13-NEXT: entry: 6195 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6196 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6197 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6198 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6199 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6200 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6201 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6202 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6203 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6204 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6205 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6206 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6207 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6208 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6209 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6210 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6211 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6212 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6213 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6214 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 6215 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6216 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 6217 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6218 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 6219 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6220 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6221 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6222 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6223 // CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6224 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 6225 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6226 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6227 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 6228 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6229 // CHECK13: cond.true: 6230 // CHECK13-NEXT: br label [[COND_END:%.*]] 6231 // CHECK13: cond.false: 6232 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6233 // CHECK13-NEXT: br label [[COND_END]] 6234 // CHECK13: cond.end: 6235 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6236 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6237 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6238 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 6239 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6240 // CHECK13: omp.inner.for.cond: 6241 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6242 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6243 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6244 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6245 // CHECK13: omp.inner.for.body: 6246 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6247 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6248 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6249 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6250 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 6251 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 6252 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 6253 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 6254 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6255 // CHECK13: omp.body.continue: 6256 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6257 // CHECK13: omp.inner.for.inc: 6258 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6259 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 6260 // CHECK13-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 6261 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6262 // CHECK13: omp.inner.for.end: 6263 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6264 // CHECK13: omp.loop.exit: 6265 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 6266 // CHECK13-NEXT: ret void 6267 // 6268 // 6269 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 6270 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6271 // CHECK13-NEXT: entry: 6272 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6273 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6274 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6275 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 6276 // CHECK13-NEXT: ret void 6277 // 6278 // 6279 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 6280 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6281 // CHECK13-NEXT: entry: 6282 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6283 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6284 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6285 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6286 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6287 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6288 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6289 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6290 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6291 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6292 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6293 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6294 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6295 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6296 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6297 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 6298 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6299 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6300 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6301 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6302 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6303 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6304 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6305 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6306 // CHECK13: cond.true: 6307 // CHECK13-NEXT: br label [[COND_END:%.*]] 6308 // CHECK13: cond.false: 6309 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6310 // CHECK13-NEXT: br label [[COND_END]] 6311 // CHECK13: cond.end: 6312 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6313 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6314 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6315 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6316 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6317 // CHECK13: omp.inner.for.cond: 6318 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6319 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6320 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6321 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6322 // CHECK13: omp.inner.for.body: 6323 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6324 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6325 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6326 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6327 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 6328 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6329 // CHECK13: omp.inner.for.inc: 6330 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6331 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6332 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6333 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 6334 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6335 // CHECK13: omp.inner.for.end: 6336 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6337 // CHECK13: omp.loop.exit: 6338 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6339 // CHECK13-NEXT: ret void 6340 // 6341 // 6342 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 6343 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6344 // CHECK13-NEXT: entry: 6345 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6346 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6347 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6348 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6349 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6350 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6351 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6352 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6353 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6354 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6355 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6356 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6357 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6358 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6359 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6360 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6361 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6362 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6363 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6364 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 6365 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6366 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 6367 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6368 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 6369 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6370 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6371 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6372 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6373 // CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6374 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 6375 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6376 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6377 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 6378 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6379 // CHECK13: cond.true: 6380 // CHECK13-NEXT: br label [[COND_END:%.*]] 6381 // CHECK13: cond.false: 6382 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6383 // CHECK13-NEXT: br label [[COND_END]] 6384 // CHECK13: cond.end: 6385 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6386 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6387 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6388 // CHECK13-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 6389 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6390 // CHECK13: omp.inner.for.cond: 6391 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6392 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6393 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6394 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6395 // CHECK13: omp.inner.for.body: 6396 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6397 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6398 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6399 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6400 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 6401 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 6402 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 6403 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 6404 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6405 // CHECK13: omp.body.continue: 6406 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6407 // CHECK13: omp.inner.for.inc: 6408 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6409 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 6410 // CHECK13-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 6411 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6412 // CHECK13: omp.inner.for.end: 6413 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6414 // CHECK13: omp.loop.exit: 6415 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 6416 // CHECK13-NEXT: ret void 6417 // 6418 // 6419 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 6420 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6421 // CHECK13-NEXT: entry: 6422 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6423 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6424 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6425 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6426 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6427 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6428 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6429 // CHECK13-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 6430 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6431 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 6432 // CHECK13-NEXT: ret void 6433 // 6434 // 6435 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 6436 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6437 // CHECK13-NEXT: entry: 6438 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6439 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6440 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6441 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6442 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6443 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6444 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6445 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6446 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6447 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6448 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6449 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6450 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6451 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6452 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6453 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6454 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6455 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6456 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 6457 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6458 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6459 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6460 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6461 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6462 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6463 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6464 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6465 // CHECK13: cond.true: 6466 // CHECK13-NEXT: br label [[COND_END:%.*]] 6467 // CHECK13: cond.false: 6468 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6469 // CHECK13-NEXT: br label [[COND_END]] 6470 // CHECK13: cond.end: 6471 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6472 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6473 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6474 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6475 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6476 // CHECK13: omp.inner.for.cond: 6477 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6478 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6479 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6480 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6481 // CHECK13: omp.inner.for.body: 6482 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6483 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6484 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6485 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6486 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6487 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 6488 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6489 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]) 6490 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6491 // CHECK13: omp.inner.for.inc: 6492 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6493 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6494 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 6495 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 6496 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6497 // CHECK13: omp.inner.for.end: 6498 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6499 // CHECK13: omp.loop.exit: 6500 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6501 // CHECK13-NEXT: ret void 6502 // 6503 // 6504 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 6505 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6506 // CHECK13-NEXT: entry: 6507 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6508 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6509 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6510 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6511 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6512 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6513 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6514 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6515 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6516 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6517 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6518 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6519 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6520 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6521 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6522 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6523 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6524 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6525 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6526 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6527 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6528 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 6529 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6530 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 6531 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6532 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 6533 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6534 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6535 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6536 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6537 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6538 // CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6539 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 6540 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 6541 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6542 // CHECK13: omp.dispatch.cond: 6543 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6544 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6545 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32 6546 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]] 6547 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6548 // CHECK13: cond.true: 6549 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6550 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 6551 // CHECK13-NEXT: br label [[COND_END:%.*]] 6552 // CHECK13: cond.false: 6553 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6554 // CHECK13-NEXT: br label [[COND_END]] 6555 // CHECK13: cond.end: 6556 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 6557 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6558 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6559 // CHECK13-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 6560 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6561 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6562 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 6563 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6564 // CHECK13: omp.dispatch.body: 6565 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6566 // CHECK13: omp.inner.for.cond: 6567 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6568 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6569 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 6570 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6571 // CHECK13: omp.inner.for.body: 6572 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6573 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 6574 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6575 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4 6576 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4 6577 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 6578 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 6579 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 6580 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6581 // CHECK13: omp.body.continue: 6582 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6583 // CHECK13: omp.inner.for.inc: 6584 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6585 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 6586 // CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 6587 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6588 // CHECK13: omp.inner.for.end: 6589 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6590 // CHECK13: omp.dispatch.inc: 6591 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6592 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6593 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 6594 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 6595 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6596 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6597 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 6598 // CHECK13-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 6599 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6600 // CHECK13: omp.dispatch.end: 6601 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 6602 // CHECK13-NEXT: ret void 6603 // 6604 // 6605 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 6606 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6607 // CHECK13-NEXT: entry: 6608 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6609 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6610 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6611 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 6612 // CHECK13-NEXT: ret void 6613 // 6614 // 6615 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 6616 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6617 // CHECK13-NEXT: entry: 6618 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6619 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6620 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6621 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6622 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6623 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6624 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6625 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6626 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6627 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6628 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6629 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6630 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6631 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6632 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6633 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 6634 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6635 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6636 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6637 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6638 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6639 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6640 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6641 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6642 // CHECK13: cond.true: 6643 // CHECK13-NEXT: br label [[COND_END:%.*]] 6644 // CHECK13: cond.false: 6645 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6646 // CHECK13-NEXT: br label [[COND_END]] 6647 // CHECK13: cond.end: 6648 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6649 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6650 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6651 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6652 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6653 // CHECK13: omp.inner.for.cond: 6654 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6655 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6656 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6657 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6658 // CHECK13: omp.inner.for.body: 6659 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6660 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6661 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6662 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6663 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 6664 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6665 // CHECK13: omp.inner.for.inc: 6666 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6667 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6668 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6669 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 6670 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6671 // CHECK13: omp.inner.for.end: 6672 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6673 // CHECK13: omp.loop.exit: 6674 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6675 // CHECK13-NEXT: ret void 6676 // 6677 // 6678 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 6679 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6680 // CHECK13-NEXT: entry: 6681 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6682 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6683 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6684 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6685 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6686 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6687 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6688 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6689 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6690 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6691 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6692 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6693 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6694 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6695 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6696 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6697 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6698 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6699 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6700 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 6701 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6702 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 6703 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6704 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 6705 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6706 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6707 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6708 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6709 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6710 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6711 // CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6712 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 6713 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 6714 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6715 // CHECK13: omp.dispatch.cond: 6716 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 6717 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 6718 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6719 // CHECK13: omp.dispatch.body: 6720 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6721 // CHECK13-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 6722 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6723 // CHECK13: omp.inner.for.cond: 6724 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 6725 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 6726 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6727 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6728 // CHECK13: omp.inner.for.body: 6729 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 6730 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6731 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6732 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 6733 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 6734 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 6735 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 6736 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]] 6737 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6738 // CHECK13: omp.body.continue: 6739 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6740 // CHECK13: omp.inner.for.inc: 6741 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 6742 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 6743 // CHECK13-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 6744 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 6745 // CHECK13: omp.inner.for.end: 6746 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6747 // CHECK13: omp.dispatch.inc: 6748 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6749 // CHECK13: omp.dispatch.end: 6750 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 6751 // CHECK13-NEXT: ret void 6752 // 6753 // 6754 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 6755 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6756 // CHECK13-NEXT: entry: 6757 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6758 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6759 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6760 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6761 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6762 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6763 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6764 // CHECK13-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 6765 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6766 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 6767 // CHECK13-NEXT: ret void 6768 // 6769 // 6770 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 6771 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6772 // CHECK13-NEXT: entry: 6773 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6774 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6775 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6776 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6777 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6778 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6779 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6780 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6781 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6782 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6783 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6784 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6785 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6786 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6787 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6788 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6789 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6790 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6791 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 6792 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6793 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6794 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6795 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 6796 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6797 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6798 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6799 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6800 // CHECK13: cond.true: 6801 // CHECK13-NEXT: br label [[COND_END:%.*]] 6802 // CHECK13: cond.false: 6803 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6804 // CHECK13-NEXT: br label [[COND_END]] 6805 // CHECK13: cond.end: 6806 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6807 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6808 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6809 // CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 6810 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6811 // CHECK13: omp.inner.for.cond: 6812 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6813 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6814 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6815 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6816 // CHECK13: omp.inner.for.body: 6817 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6818 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6819 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6820 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6821 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6822 // CHECK13-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 6823 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 6824 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]) 6825 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6826 // CHECK13: omp.inner.for.inc: 6827 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6828 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6829 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 6830 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 6831 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6832 // CHECK13: omp.inner.for.end: 6833 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6834 // CHECK13: omp.loop.exit: 6835 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 6836 // CHECK13-NEXT: ret void 6837 // 6838 // 6839 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 6840 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6841 // CHECK13-NEXT: entry: 6842 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6843 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6844 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6845 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6846 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6847 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6848 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6849 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6850 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6851 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6852 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6853 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6854 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6855 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6856 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6857 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6858 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6859 // CHECK13-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6860 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6861 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6862 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6863 // CHECK13-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 6864 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6865 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 6866 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6867 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 6868 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6869 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 6870 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6871 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6872 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6873 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6874 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6875 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6876 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 6877 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 6878 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6879 // CHECK13: omp.dispatch.cond: 6880 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 6881 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 6882 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6883 // CHECK13: omp.dispatch.body: 6884 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6885 // CHECK13-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 6886 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6887 // CHECK13: omp.inner.for.cond: 6888 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 6889 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 6890 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 6891 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6892 // CHECK13: omp.inner.for.body: 6893 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 6894 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 6895 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6896 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 6897 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 6898 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 6899 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 6900 // CHECK13-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]] 6901 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6902 // CHECK13: omp.body.continue: 6903 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6904 // CHECK13: omp.inner.for.inc: 6905 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 6906 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 6907 // CHECK13-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 6908 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 6909 // CHECK13: omp.inner.for.end: 6910 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6911 // CHECK13: omp.dispatch.inc: 6912 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6913 // CHECK13: omp.dispatch.end: 6914 // CHECK13-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 6915 // CHECK13-NEXT: ret void 6916 // 6917 // 6918 // CHECK15-LABEL: define {{[^@]+}}@main 6919 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6920 // CHECK15-NEXT: entry: 6921 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6922 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6923 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 6924 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 6925 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 6926 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6927 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 6928 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 6929 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 6930 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 6931 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 6932 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 6933 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6934 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6935 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6936 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 6937 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 6938 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4 6939 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4 6940 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4 6941 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 6942 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 6943 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 6944 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 6945 // CHECK15-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6946 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 6947 // CHECK15-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4 6948 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 6949 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4 6950 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4 6951 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4 6952 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4 6953 // CHECK15-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 6954 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 6955 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 6956 // CHECK15-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6957 // CHECK15-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4 6958 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 4 6959 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 4 6960 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 4 6961 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4 6962 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 6963 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 6964 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 6965 // CHECK15-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6966 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 6967 // CHECK15-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4 6968 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4 6969 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 4 6970 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 4 6971 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 4 6972 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4 6973 // CHECK15-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 6974 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 6975 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 6976 // CHECK15-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 6977 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 6978 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 6979 // CHECK15-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 6980 // CHECK15-NEXT: store i32 100, ptr [[N]], align 4 6981 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 6982 // CHECK15-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 6983 // CHECK15-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 6984 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 6985 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 6986 // CHECK15-NEXT: store i32 10, ptr [[M]], align 4 6987 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 6988 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 6989 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 6990 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 6991 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 6992 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false) 6993 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6994 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4 6995 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6996 // CHECK15-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 6997 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6998 // CHECK15-NEXT: store ptr null, ptr [[TMP8]], align 4 6999 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7000 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 7001 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7002 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4 7003 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 7004 // CHECK15-NEXT: store ptr null, ptr [[TMP11]], align 4 7005 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7006 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 7007 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7008 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4 7009 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 7010 // CHECK15-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4 7011 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 7012 // CHECK15-NEXT: store ptr null, ptr [[TMP15]], align 4 7013 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7014 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7015 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7016 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 7017 // CHECK15-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 7018 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7019 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 7020 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7021 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7022 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7023 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7024 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 7025 // CHECK15-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 7026 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 7027 // CHECK15-NEXT: store i32 3, ptr [[TMP23]], align 4 7028 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 7029 // CHECK15-NEXT: store i32 3, ptr [[TMP24]], align 4 7030 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 7031 // CHECK15-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4 7032 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 7033 // CHECK15-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4 7034 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 7035 // CHECK15-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4 7036 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 7037 // CHECK15-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 7038 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 7039 // CHECK15-NEXT: store ptr null, ptr [[TMP29]], align 4 7040 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 7041 // CHECK15-NEXT: store ptr null, ptr [[TMP30]], align 4 7042 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 7043 // CHECK15-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 7044 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 7045 // CHECK15-NEXT: store i64 0, ptr [[TMP32]], align 8 7046 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 7047 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 7048 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 7049 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 7050 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 7051 // CHECK15-NEXT: store i32 0, ptr [[TMP35]], align 4 7052 // CHECK15-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 7053 // CHECK15-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 7054 // CHECK15-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7055 // CHECK15: omp_offload.failed: 7056 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 7057 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 7058 // CHECK15: omp_offload.cont: 7059 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 7060 // CHECK15-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 7061 // CHECK15-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 7062 // CHECK15-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4 7063 // CHECK15-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64 7064 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false) 7065 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 7066 // CHECK15-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4 7067 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 7068 // CHECK15-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 7069 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 7070 // CHECK15-NEXT: store ptr null, ptr [[TMP44]], align 4 7071 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 7072 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4 7073 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 7074 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4 7075 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 7076 // CHECK15-NEXT: store ptr null, ptr [[TMP47]], align 4 7077 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 7078 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4 7079 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 7080 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4 7081 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 7082 // CHECK15-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4 7083 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 7084 // CHECK15-NEXT: store ptr null, ptr [[TMP51]], align 4 7085 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 7086 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 7087 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 7088 // CHECK15-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4 7089 // CHECK15-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4 7090 // CHECK15-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 7091 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0 7092 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 7093 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 7094 // CHECK15-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 7095 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 7096 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1 7097 // CHECK15-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64 7098 // CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 7099 // CHECK15-NEXT: store i32 3, ptr [[TMP59]], align 4 7100 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 7101 // CHECK15-NEXT: store i32 3, ptr [[TMP60]], align 4 7102 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 7103 // CHECK15-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4 7104 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 7105 // CHECK15-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4 7106 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 7107 // CHECK15-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4 7108 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 7109 // CHECK15-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4 7110 // CHECK15-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 7111 // CHECK15-NEXT: store ptr null, ptr [[TMP65]], align 4 7112 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 7113 // CHECK15-NEXT: store ptr null, ptr [[TMP66]], align 4 7114 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 7115 // CHECK15-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8 7116 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 7117 // CHECK15-NEXT: store i64 0, ptr [[TMP68]], align 8 7118 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 7119 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 7120 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 7121 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4 7122 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 7123 // CHECK15-NEXT: store i32 0, ptr [[TMP71]], align 4 7124 // CHECK15-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 7125 // CHECK15-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0 7126 // CHECK15-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 7127 // CHECK15: omp_offload.failed16: 7128 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 7129 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]] 7130 // CHECK15: omp_offload.cont17: 7131 // CHECK15-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 4 7132 // CHECK15-NEXT: store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4 7133 // CHECK15-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4 7134 // CHECK15-NEXT: store i32 [[TMP75]], ptr [[N_CASTED19]], align 4 7135 // CHECK15-NEXT: [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4 7136 // CHECK15-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 7137 // CHECK15-NEXT: store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7138 // CHECK15-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7139 // CHECK15-NEXT: [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4 7140 // CHECK15-NEXT: [[TMP80:%.*]] = sext i32 [[TMP79]] to i64 7141 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false) 7142 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 7143 // CHECK15-NEXT: store i32 [[TMP76]], ptr [[TMP81]], align 4 7144 // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 7145 // CHECK15-NEXT: store i32 [[TMP76]], ptr [[TMP82]], align 4 7146 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 7147 // CHECK15-NEXT: store ptr null, ptr [[TMP83]], align 4 7148 // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 7149 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP84]], align 4 7150 // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 7151 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP85]], align 4 7152 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 7153 // CHECK15-NEXT: store ptr null, ptr [[TMP86]], align 4 7154 // CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 7155 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 4 7156 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 7157 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 4 7158 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 7159 // CHECK15-NEXT: store i64 [[TMP80]], ptr [[TMP89]], align 4 7160 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2 7161 // CHECK15-NEXT: store ptr null, ptr [[TMP90]], align 4 7162 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 7163 // CHECK15-NEXT: store i32 [[TMP78]], ptr [[TMP91]], align 4 7164 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 7165 // CHECK15-NEXT: store i32 [[TMP78]], ptr [[TMP92]], align 4 7166 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3 7167 // CHECK15-NEXT: store ptr null, ptr [[TMP93]], align 4 7168 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 7169 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 7170 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 7171 // CHECK15-NEXT: [[TMP97:%.*]] = load i32, ptr [[N]], align 4 7172 // CHECK15-NEXT: store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4 7173 // CHECK15-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 7174 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0 7175 // CHECK15-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 7176 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 7177 // CHECK15-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 7178 // CHECK15-NEXT: [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 7179 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1 7180 // CHECK15-NEXT: [[TMP100:%.*]] = zext i32 [[ADD30]] to i64 7181 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 7182 // CHECK15-NEXT: store i32 3, ptr [[TMP101]], align 4 7183 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 7184 // CHECK15-NEXT: store i32 4, ptr [[TMP102]], align 4 7185 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 7186 // CHECK15-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4 7187 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 7188 // CHECK15-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4 7189 // CHECK15-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 7190 // CHECK15-NEXT: store ptr [[TMP96]], ptr [[TMP105]], align 4 7191 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 7192 // CHECK15-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4 7193 // CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 7194 // CHECK15-NEXT: store ptr null, ptr [[TMP107]], align 4 7195 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 7196 // CHECK15-NEXT: store ptr null, ptr [[TMP108]], align 4 7197 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 7198 // CHECK15-NEXT: store i64 [[TMP100]], ptr [[TMP109]], align 8 7199 // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 7200 // CHECK15-NEXT: store i64 0, ptr [[TMP110]], align 8 7201 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 7202 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4 7203 // CHECK15-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 7204 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4 7205 // CHECK15-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 7206 // CHECK15-NEXT: store i32 0, ptr [[TMP113]], align 4 7207 // CHECK15-NEXT: [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 7208 // CHECK15-NEXT: [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0 7209 // CHECK15-NEXT: br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 7210 // CHECK15: omp_offload.failed32: 7211 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]] 7212 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT33]] 7213 // CHECK15: omp_offload.cont33: 7214 // CHECK15-NEXT: [[TMP116:%.*]] = load i32, ptr [[N]], align 4 7215 // CHECK15-NEXT: store i32 [[TMP116]], ptr [[N_CASTED34]], align 4 7216 // CHECK15-NEXT: [[TMP117:%.*]] = load i32, ptr [[N_CASTED34]], align 4 7217 // CHECK15-NEXT: [[TMP118:%.*]] = mul nuw i32 [[TMP0]], 4 7218 // CHECK15-NEXT: [[TMP119:%.*]] = sext i32 [[TMP118]] to i64 7219 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES38]], ptr align 4 @.offload_sizes.5, i32 24, i1 false) 7220 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 7221 // CHECK15-NEXT: store i32 [[TMP117]], ptr [[TMP120]], align 4 7222 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 7223 // CHECK15-NEXT: store i32 [[TMP117]], ptr [[TMP121]], align 4 7224 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0 7225 // CHECK15-NEXT: store ptr null, ptr [[TMP122]], align 4 7226 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 7227 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP123]], align 4 7228 // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 7229 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP124]], align 4 7230 // CHECK15-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1 7231 // CHECK15-NEXT: store ptr null, ptr [[TMP125]], align 4 7232 // CHECK15-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 7233 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP126]], align 4 7234 // CHECK15-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 7235 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP127]], align 4 7236 // CHECK15-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 7237 // CHECK15-NEXT: store i64 [[TMP119]], ptr [[TMP128]], align 4 7238 // CHECK15-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2 7239 // CHECK15-NEXT: store ptr null, ptr [[TMP129]], align 4 7240 // CHECK15-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 7241 // CHECK15-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 7242 // CHECK15-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 7243 // CHECK15-NEXT: [[TMP133:%.*]] = load i32, ptr [[N]], align 4 7244 // CHECK15-NEXT: store i32 [[TMP133]], ptr [[DOTCAPTURE_EXPR_40]], align 4 7245 // CHECK15-NEXT: [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 7246 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP134]], 0 7247 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 7248 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 7249 // CHECK15-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 7250 // CHECK15-NEXT: [[TMP135:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 7251 // CHECK15-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP135]], 1 7252 // CHECK15-NEXT: [[TMP136:%.*]] = zext i32 [[ADD45]] to i64 7253 // CHECK15-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 7254 // CHECK15-NEXT: store i32 3, ptr [[TMP137]], align 4 7255 // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 7256 // CHECK15-NEXT: store i32 3, ptr [[TMP138]], align 4 7257 // CHECK15-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 7258 // CHECK15-NEXT: store ptr [[TMP130]], ptr [[TMP139]], align 4 7259 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 7260 // CHECK15-NEXT: store ptr [[TMP131]], ptr [[TMP140]], align 4 7261 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 7262 // CHECK15-NEXT: store ptr [[TMP132]], ptr [[TMP141]], align 4 7263 // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 7264 // CHECK15-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP142]], align 4 7265 // CHECK15-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 7266 // CHECK15-NEXT: store ptr null, ptr [[TMP143]], align 4 7267 // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 7268 // CHECK15-NEXT: store ptr null, ptr [[TMP144]], align 4 7269 // CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 7270 // CHECK15-NEXT: store i64 [[TMP136]], ptr [[TMP145]], align 8 7271 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 7272 // CHECK15-NEXT: store i64 0, ptr [[TMP146]], align 8 7273 // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 7274 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4 7275 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 7276 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP148]], align 4 7277 // CHECK15-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 7278 // CHECK15-NEXT: store i32 0, ptr [[TMP149]], align 4 7279 // CHECK15-NEXT: [[TMP150:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 7280 // CHECK15-NEXT: [[TMP151:%.*]] = icmp ne i32 [[TMP150]], 0 7281 // CHECK15-NEXT: br i1 [[TMP151]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 7282 // CHECK15: omp_offload.failed47: 7283 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP117]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 7284 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT48]] 7285 // CHECK15: omp_offload.cont48: 7286 // CHECK15-NEXT: [[TMP152:%.*]] = load i32, ptr [[M]], align 4 7287 // CHECK15-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR_49]], align 4 7288 // CHECK15-NEXT: [[TMP153:%.*]] = load i32, ptr [[N]], align 4 7289 // CHECK15-NEXT: store i32 [[TMP153]], ptr [[N_CASTED50]], align 4 7290 // CHECK15-NEXT: [[TMP154:%.*]] = load i32, ptr [[N_CASTED50]], align 4 7291 // CHECK15-NEXT: [[TMP155:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 7292 // CHECK15-NEXT: store i32 [[TMP155]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 7293 // CHECK15-NEXT: [[TMP156:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 7294 // CHECK15-NEXT: [[TMP157:%.*]] = mul nuw i32 [[TMP0]], 4 7295 // CHECK15-NEXT: [[TMP158:%.*]] = sext i32 [[TMP157]] to i64 7296 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES55]], ptr align 4 @.offload_sizes.7, i32 32, i1 false) 7297 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 7298 // CHECK15-NEXT: store i32 [[TMP154]], ptr [[TMP159]], align 4 7299 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 7300 // CHECK15-NEXT: store i32 [[TMP154]], ptr [[TMP160]], align 4 7301 // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0 7302 // CHECK15-NEXT: store ptr null, ptr [[TMP161]], align 4 7303 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 7304 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP162]], align 4 7305 // CHECK15-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 7306 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[TMP163]], align 4 7307 // CHECK15-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1 7308 // CHECK15-NEXT: store ptr null, ptr [[TMP164]], align 4 7309 // CHECK15-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 7310 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP165]], align 4 7311 // CHECK15-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 7312 // CHECK15-NEXT: store ptr [[VLA]], ptr [[TMP166]], align 4 7313 // CHECK15-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 7314 // CHECK15-NEXT: store i64 [[TMP158]], ptr [[TMP167]], align 4 7315 // CHECK15-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2 7316 // CHECK15-NEXT: store ptr null, ptr [[TMP168]], align 4 7317 // CHECK15-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 7318 // CHECK15-NEXT: store i32 [[TMP156]], ptr [[TMP169]], align 4 7319 // CHECK15-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 7320 // CHECK15-NEXT: store i32 [[TMP156]], ptr [[TMP170]], align 4 7321 // CHECK15-NEXT: [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3 7322 // CHECK15-NEXT: store ptr null, ptr [[TMP171]], align 4 7323 // CHECK15-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 7324 // CHECK15-NEXT: [[TMP173:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 7325 // CHECK15-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 7326 // CHECK15-NEXT: [[TMP175:%.*]] = load i32, ptr [[N]], align 4 7327 // CHECK15-NEXT: store i32 [[TMP175]], ptr [[DOTCAPTURE_EXPR_57]], align 4 7328 // CHECK15-NEXT: [[TMP176:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 7329 // CHECK15-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP176]], 0 7330 // CHECK15-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 7331 // CHECK15-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 7332 // CHECK15-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 7333 // CHECK15-NEXT: [[TMP177:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 7334 // CHECK15-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP177]], 1 7335 // CHECK15-NEXT: [[TMP178:%.*]] = zext i32 [[ADD62]] to i64 7336 // CHECK15-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 7337 // CHECK15-NEXT: store i32 3, ptr [[TMP179]], align 4 7338 // CHECK15-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 7339 // CHECK15-NEXT: store i32 4, ptr [[TMP180]], align 4 7340 // CHECK15-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 7341 // CHECK15-NEXT: store ptr [[TMP172]], ptr [[TMP181]], align 4 7342 // CHECK15-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 7343 // CHECK15-NEXT: store ptr [[TMP173]], ptr [[TMP182]], align 4 7344 // CHECK15-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 7345 // CHECK15-NEXT: store ptr [[TMP174]], ptr [[TMP183]], align 4 7346 // CHECK15-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 7347 // CHECK15-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP184]], align 4 7348 // CHECK15-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 7349 // CHECK15-NEXT: store ptr null, ptr [[TMP185]], align 4 7350 // CHECK15-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 7351 // CHECK15-NEXT: store ptr null, ptr [[TMP186]], align 4 7352 // CHECK15-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 7353 // CHECK15-NEXT: store i64 [[TMP178]], ptr [[TMP187]], align 8 7354 // CHECK15-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 7355 // CHECK15-NEXT: store i64 0, ptr [[TMP188]], align 8 7356 // CHECK15-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 7357 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP189]], align 4 7358 // CHECK15-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 7359 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP190]], align 4 7360 // CHECK15-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 7361 // CHECK15-NEXT: store i32 0, ptr [[TMP191]], align 4 7362 // CHECK15-NEXT: [[TMP192:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 7363 // CHECK15-NEXT: [[TMP193:%.*]] = icmp ne i32 [[TMP192]], 0 7364 // CHECK15-NEXT: br i1 [[TMP193]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 7365 // CHECK15: omp_offload.failed64: 7366 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP156]]) #[[ATTR3]] 7367 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT65]] 7368 // CHECK15: omp_offload.cont65: 7369 // CHECK15-NEXT: [[TMP194:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 7370 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP194]]) 7371 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 7372 // CHECK15-NEXT: [[TMP195:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 7373 // CHECK15-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP195]]) 7374 // CHECK15-NEXT: [[TMP196:%.*]] = load i32, ptr [[RETVAL]], align 4 7375 // CHECK15-NEXT: ret i32 [[TMP196]] 7376 // 7377 // 7378 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 7379 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 7380 // CHECK15-NEXT: entry: 7381 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7382 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7383 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7384 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7385 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7386 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7387 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7388 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7389 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7390 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7391 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 7392 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 7393 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 7394 // CHECK15-NEXT: ret void 7395 // 7396 // 7397 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 7398 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7399 // CHECK15-NEXT: entry: 7400 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7401 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7402 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7403 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7404 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7405 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7406 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7407 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7408 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7409 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7410 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7411 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7412 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7413 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7414 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 7415 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7416 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7417 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7418 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7419 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7420 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7421 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7422 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7423 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7424 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 7425 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7426 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7427 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7428 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7429 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7430 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 7431 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7432 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 7433 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7434 // CHECK15: omp.precond.then: 7435 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7436 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7437 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 7438 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7439 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7440 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7441 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 7442 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7443 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7444 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7445 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 7446 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7447 // CHECK15: cond.true: 7448 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7449 // CHECK15-NEXT: br label [[COND_END:%.*]] 7450 // CHECK15: cond.false: 7451 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7452 // CHECK15-NEXT: br label [[COND_END]] 7453 // CHECK15: cond.end: 7454 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 7455 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7456 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7457 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 7458 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7459 // CHECK15: omp.inner.for.cond: 7460 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7461 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7462 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 7463 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7464 // CHECK15: omp.inner.for.body: 7465 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7466 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7467 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 7468 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 7469 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 7470 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]) 7471 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7472 // CHECK15: omp.inner.for.inc: 7473 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7474 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7475 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 7476 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 7477 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7478 // CHECK15: omp.inner.for.end: 7479 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7480 // CHECK15: omp.loop.exit: 7481 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7482 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 7483 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 7484 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7485 // CHECK15: omp.precond.end: 7486 // CHECK15-NEXT: ret void 7487 // 7488 // 7489 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 7490 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7491 // CHECK15-NEXT: entry: 7492 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7493 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7494 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7495 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7496 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7497 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7498 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7499 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7500 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7501 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7502 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7503 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7504 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7505 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7506 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7507 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7508 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 7509 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7510 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7511 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 7512 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 7513 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7514 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7515 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7516 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7517 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7518 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7519 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 7520 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7521 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7522 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7523 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7524 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7525 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 7526 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7527 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 7528 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7529 // CHECK15: omp.precond.then: 7530 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7531 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7532 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 7533 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 7534 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 7535 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 7536 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 7537 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7538 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7539 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7540 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 7541 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7542 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7543 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7544 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7545 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7546 // CHECK15: cond.true: 7547 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7548 // CHECK15-NEXT: br label [[COND_END:%.*]] 7549 // CHECK15: cond.false: 7550 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7551 // CHECK15-NEXT: br label [[COND_END]] 7552 // CHECK15: cond.end: 7553 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7554 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7555 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7556 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 7557 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7558 // CHECK15: omp.inner.for.cond: 7559 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7560 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7561 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7562 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7563 // CHECK15: omp.inner.for.body: 7564 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7565 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 7566 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7567 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 7568 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4 7569 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 7570 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 7571 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7572 // CHECK15: omp.body.continue: 7573 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7574 // CHECK15: omp.inner.for.inc: 7575 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7576 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 7577 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 7578 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7579 // CHECK15: omp.inner.for.end: 7580 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7581 // CHECK15: omp.loop.exit: 7582 // CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7583 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 7584 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 7585 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7586 // CHECK15: omp.precond.end: 7587 // CHECK15-NEXT: ret void 7588 // 7589 // 7590 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 7591 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7592 // CHECK15-NEXT: entry: 7593 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7594 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7595 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7596 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7597 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7598 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7599 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7600 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7601 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7602 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7603 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 7604 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 7605 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 7606 // CHECK15-NEXT: ret void 7607 // 7608 // 7609 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 7610 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7611 // CHECK15-NEXT: entry: 7612 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7613 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7614 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7615 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7616 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7617 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7618 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7619 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7620 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7621 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7622 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7623 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7624 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7625 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7626 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 7627 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7628 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7629 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7630 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7631 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7632 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7633 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7634 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7635 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7636 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 7637 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7638 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7639 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7640 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7641 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7642 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 7643 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7644 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 7645 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7646 // CHECK15: omp.precond.then: 7647 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7648 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7649 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 7650 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7651 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7652 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7653 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 7654 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7655 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7656 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7657 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 7658 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7659 // CHECK15: cond.true: 7660 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7661 // CHECK15-NEXT: br label [[COND_END:%.*]] 7662 // CHECK15: cond.false: 7663 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7664 // CHECK15-NEXT: br label [[COND_END]] 7665 // CHECK15: cond.end: 7666 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 7667 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7668 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7669 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 7670 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7671 // CHECK15: omp.inner.for.cond: 7672 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7673 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7674 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 7675 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7676 // CHECK15: omp.inner.for.body: 7677 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7678 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7679 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 7680 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 7681 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 7682 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]) 7683 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7684 // CHECK15: omp.inner.for.inc: 7685 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7686 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7687 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 7688 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 7689 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7690 // CHECK15: omp.inner.for.end: 7691 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7692 // CHECK15: omp.loop.exit: 7693 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7694 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 7695 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 7696 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7697 // CHECK15: omp.precond.end: 7698 // CHECK15-NEXT: ret void 7699 // 7700 // 7701 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 7702 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7703 // CHECK15-NEXT: entry: 7704 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7705 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7706 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7707 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7708 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7709 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7710 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7711 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7712 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7713 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7714 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7715 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7716 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7717 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7718 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7719 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7720 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 7721 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7722 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7723 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 7724 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 7725 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7726 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7727 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7728 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7729 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7730 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7731 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 7732 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7733 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7734 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7735 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7736 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7737 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 7738 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7739 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 7740 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7741 // CHECK15: omp.precond.then: 7742 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7743 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7744 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 7745 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 7746 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 7747 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 7748 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 7749 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7750 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7751 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7752 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 7753 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7754 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7755 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7756 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7757 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7758 // CHECK15: cond.true: 7759 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7760 // CHECK15-NEXT: br label [[COND_END:%.*]] 7761 // CHECK15: cond.false: 7762 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7763 // CHECK15-NEXT: br label [[COND_END]] 7764 // CHECK15: cond.end: 7765 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7766 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7767 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7768 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 7769 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7770 // CHECK15: omp.inner.for.cond: 7771 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7772 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7773 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7774 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7775 // CHECK15: omp.inner.for.body: 7776 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7777 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 7778 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7779 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 7780 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4 7781 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 7782 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 7783 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7784 // CHECK15: omp.body.continue: 7785 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7786 // CHECK15: omp.inner.for.inc: 7787 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7788 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 7789 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 7790 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7791 // CHECK15: omp.inner.for.end: 7792 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7793 // CHECK15: omp.loop.exit: 7794 // CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7795 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 7796 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 7797 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7798 // CHECK15: omp.precond.end: 7799 // CHECK15-NEXT: ret void 7800 // 7801 // 7802 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 7803 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7804 // CHECK15-NEXT: entry: 7805 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7806 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7807 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7808 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7809 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7810 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7811 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7812 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7813 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7814 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7815 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7816 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7817 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7818 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 7819 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 7820 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7821 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7822 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7823 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 7824 // CHECK15-NEXT: ret void 7825 // 7826 // 7827 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 7828 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7829 // CHECK15-NEXT: entry: 7830 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7831 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7832 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7833 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7834 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7835 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7836 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7837 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7838 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7839 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7840 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7841 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7842 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7843 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7844 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7845 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 7846 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 7847 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7848 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7849 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7850 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7851 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7852 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7853 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7854 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7855 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7856 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7857 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7858 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7859 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7860 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7861 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7862 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 7863 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 7864 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7865 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 7866 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7867 // CHECK15: omp.precond.then: 7868 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7869 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7870 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 7871 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7872 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7873 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7874 // CHECK15-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7875 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 7876 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 7877 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7878 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7879 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 7880 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7881 // CHECK15: cond.true: 7882 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7883 // CHECK15-NEXT: br label [[COND_END:%.*]] 7884 // CHECK15: cond.false: 7885 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7886 // CHECK15-NEXT: br label [[COND_END]] 7887 // CHECK15: cond.end: 7888 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 7889 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7890 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7891 // CHECK15-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 7892 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7893 // CHECK15: omp.inner.for.cond: 7894 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7895 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7896 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 7897 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 7898 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7899 // CHECK15: omp.inner.for.body: 7900 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7901 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7902 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 7903 // CHECK15-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 7904 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4 7905 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7906 // CHECK15-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7907 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 7908 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP21]]) 7909 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7910 // CHECK15: omp.inner.for.inc: 7911 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 7912 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7913 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 7914 // CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 7915 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7916 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7917 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 7918 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4 7919 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7920 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 7921 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 7922 // CHECK15-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4 7923 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7924 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7925 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]] 7926 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 7927 // CHECK15: cond.true11: 7928 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7929 // CHECK15-NEXT: br label [[COND_END13:%.*]] 7930 // CHECK15: cond.false12: 7931 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7932 // CHECK15-NEXT: br label [[COND_END13]] 7933 // CHECK15: cond.end13: 7934 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ] 7935 // CHECK15-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4 7936 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7937 // CHECK15-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_IV]], align 4 7938 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7939 // CHECK15: omp.inner.for.end: 7940 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7941 // CHECK15: omp.loop.exit: 7942 // CHECK15-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 7943 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 7944 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP34]]) 7945 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7946 // CHECK15: omp.precond.end: 7947 // CHECK15-NEXT: ret void 7948 // 7949 // 7950 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 7951 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7952 // CHECK15-NEXT: entry: 7953 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 7954 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 7955 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7956 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7957 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7958 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7959 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 7960 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7961 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7962 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7963 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7964 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7965 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7966 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7967 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7968 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7969 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7970 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 7971 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 7972 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 7973 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 7974 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 7975 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 7976 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 7977 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 7978 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7979 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 7980 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 7981 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 7982 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7983 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7984 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7985 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7986 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7987 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 7988 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 7989 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7990 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 7991 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7992 // CHECK15: omp.precond.then: 7993 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7994 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7995 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 7996 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 7997 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 7998 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 7999 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8000 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8001 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8002 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8003 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 8004 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8005 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8006 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8007 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8008 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8009 // CHECK15: cond.true: 8010 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8011 // CHECK15-NEXT: br label [[COND_END:%.*]] 8012 // CHECK15: cond.false: 8013 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8014 // CHECK15-NEXT: br label [[COND_END]] 8015 // CHECK15: cond.end: 8016 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8017 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8018 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8019 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 8020 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8021 // CHECK15: omp.inner.for.cond: 8022 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8023 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8024 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8025 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8026 // CHECK15: omp.inner.for.body: 8027 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8028 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 8029 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8030 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 8031 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4 8032 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 8033 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 8034 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8035 // CHECK15: omp.body.continue: 8036 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8037 // CHECK15: omp.inner.for.inc: 8038 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8039 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 8040 // CHECK15-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 8041 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8042 // CHECK15: omp.inner.for.end: 8043 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8044 // CHECK15: omp.loop.exit: 8045 // CHECK15-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8046 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 8047 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 8048 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8049 // CHECK15: omp.precond.end: 8050 // CHECK15-NEXT: ret void 8051 // 8052 // 8053 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 8054 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8055 // CHECK15-NEXT: entry: 8056 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8057 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8058 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8059 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8060 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8061 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8062 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8063 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8064 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8065 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8066 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 8067 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 8068 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 8069 // CHECK15-NEXT: ret void 8070 // 8071 // 8072 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 8073 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8074 // CHECK15-NEXT: entry: 8075 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8076 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8077 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8078 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8079 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8080 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8081 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8082 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8083 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8084 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8085 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8086 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8087 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8088 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8089 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 8090 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8091 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8092 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8093 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8094 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8095 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8096 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8097 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8098 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8099 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 8100 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8101 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8102 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8103 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8104 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8105 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8106 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8107 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8108 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8109 // CHECK15: omp.precond.then: 8110 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8111 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8112 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 8113 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8114 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8115 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8116 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 8117 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8118 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8119 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8120 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 8121 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8122 // CHECK15: cond.true: 8123 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8124 // CHECK15-NEXT: br label [[COND_END:%.*]] 8125 // CHECK15: cond.false: 8126 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8127 // CHECK15-NEXT: br label [[COND_END]] 8128 // CHECK15: cond.end: 8129 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 8130 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8131 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8132 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 8133 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8134 // CHECK15: omp.inner.for.cond: 8135 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8136 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8137 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 8138 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8139 // CHECK15: omp.inner.for.body: 8140 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8141 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8142 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 8143 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 8144 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 8145 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]) 8146 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8147 // CHECK15: omp.inner.for.inc: 8148 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8149 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 8150 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 8151 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 8152 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8153 // CHECK15: omp.inner.for.end: 8154 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8155 // CHECK15: omp.loop.exit: 8156 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8157 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 8158 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 8159 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8160 // CHECK15: omp.precond.end: 8161 // CHECK15-NEXT: ret void 8162 // 8163 // 8164 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 8165 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8166 // CHECK15-NEXT: entry: 8167 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8168 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8169 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8170 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8171 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8172 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8173 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8174 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8175 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8176 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8177 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8178 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8179 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8180 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8181 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8182 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8183 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 8184 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8185 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8186 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8187 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8188 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8189 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8190 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8191 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8192 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8193 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8194 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 8195 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8196 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8197 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8198 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8199 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8200 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8201 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8202 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8203 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8204 // CHECK15: omp.precond.then: 8205 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8206 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8207 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 8208 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8209 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8210 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 8211 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8212 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8213 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8214 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8215 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8216 // CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8217 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 8218 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 8219 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8220 // CHECK15: omp.dispatch.cond: 8221 // CHECK15-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8222 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 8223 // CHECK15-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 8224 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 8225 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8226 // CHECK15: omp.dispatch.body: 8227 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8228 // CHECK15-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 8229 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8230 // CHECK15: omp.inner.for.cond: 8231 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 8232 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 8233 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 8234 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8235 // CHECK15: omp.inner.for.body: 8236 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 8237 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 8238 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8239 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]] 8240 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]] 8241 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]] 8242 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]] 8243 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8244 // CHECK15: omp.body.continue: 8245 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8246 // CHECK15: omp.inner.for.inc: 8247 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 8248 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1 8249 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 8250 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 8251 // CHECK15: omp.inner.for.end: 8252 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8253 // CHECK15: omp.dispatch.inc: 8254 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 8255 // CHECK15: omp.dispatch.end: 8256 // CHECK15-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8257 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 8258 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 8259 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8260 // CHECK15: omp.precond.end: 8261 // CHECK15-NEXT: ret void 8262 // 8263 // 8264 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 8265 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8266 // CHECK15-NEXT: entry: 8267 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8268 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8269 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8270 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8271 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8272 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8273 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8274 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8275 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8276 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8277 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8278 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8279 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8280 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 8281 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 8282 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8283 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8284 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8285 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 8286 // CHECK15-NEXT: ret void 8287 // 8288 // 8289 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 8290 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8291 // CHECK15-NEXT: entry: 8292 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8293 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8294 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8295 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8296 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8297 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8298 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8299 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8300 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8301 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8302 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8303 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8304 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8305 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8306 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8307 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 8308 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 8309 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8310 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8311 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8312 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8313 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8314 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8315 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8316 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8317 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8318 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8319 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8320 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8321 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8322 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8323 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8324 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 8325 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8326 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8327 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8328 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8329 // CHECK15: omp.precond.then: 8330 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8331 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8332 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 8333 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8334 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8335 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8336 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 8337 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8338 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8339 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8340 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 8341 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8342 // CHECK15: cond.true: 8343 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8344 // CHECK15-NEXT: br label [[COND_END:%.*]] 8345 // CHECK15: cond.false: 8346 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8347 // CHECK15-NEXT: br label [[COND_END]] 8348 // CHECK15: cond.end: 8349 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 8350 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8351 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8352 // CHECK15-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 8353 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8354 // CHECK15: omp.inner.for.cond: 8355 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8356 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8357 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 8358 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8359 // CHECK15: omp.inner.for.body: 8360 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8361 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8362 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 8363 // CHECK15-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 8364 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 8365 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8366 // CHECK15-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8367 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8368 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP20]]) 8369 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8370 // CHECK15: omp.inner.for.inc: 8371 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8372 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 8373 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 8374 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 8375 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8376 // CHECK15: omp.inner.for.end: 8377 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8378 // CHECK15: omp.loop.exit: 8379 // CHECK15-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8380 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 8381 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 8382 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8383 // CHECK15: omp.precond.end: 8384 // CHECK15-NEXT: ret void 8385 // 8386 // 8387 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 8388 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8389 // CHECK15-NEXT: entry: 8390 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8391 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8392 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8393 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8394 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 8395 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 8396 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8397 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8398 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8399 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8400 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8401 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8402 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8403 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8404 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8405 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8406 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8407 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 8408 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8409 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8410 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8411 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8412 // CHECK15-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 8413 // CHECK15-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 8414 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8415 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8416 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 8417 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8418 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 8419 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8420 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8421 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 8422 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8423 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8424 // CHECK15-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 8425 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 8426 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8427 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 8428 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8429 // CHECK15: omp.precond.then: 8430 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8431 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8432 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 8433 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8434 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8435 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 8436 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8437 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8438 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8439 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8440 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8441 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8442 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8443 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 8444 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 8445 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8446 // CHECK15: omp.dispatch.cond: 8447 // CHECK15-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8448 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 8449 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 8450 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 8451 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8452 // CHECK15: omp.dispatch.body: 8453 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8454 // CHECK15-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 8455 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8456 // CHECK15: omp.inner.for.cond: 8457 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 8458 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 8459 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8460 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8461 // CHECK15: omp.inner.for.body: 8462 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 8463 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8464 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8465 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]] 8466 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]] 8467 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP20]] 8468 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]] 8469 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8470 // CHECK15: omp.body.continue: 8471 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8472 // CHECK15: omp.inner.for.inc: 8473 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 8474 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 8475 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 8476 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 8477 // CHECK15: omp.inner.for.end: 8478 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8479 // CHECK15: omp.dispatch.inc: 8480 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 8481 // CHECK15: omp.dispatch.end: 8482 // CHECK15-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8483 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 8484 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 8485 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 8486 // CHECK15: omp.precond.end: 8487 // CHECK15-NEXT: ret void 8488 // 8489 // 8490 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 8491 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 8492 // CHECK15-NEXT: entry: 8493 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 8494 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 8495 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 8496 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 8497 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 8498 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 8499 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8500 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 8501 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 8502 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 8503 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 8504 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 8505 // CHECK15-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 8506 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8507 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8508 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4 8509 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4 8510 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4 8511 // CHECK15-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 8512 // CHECK15-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 8513 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4 8514 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4 8515 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4 8516 // CHECK15-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 8517 // CHECK15-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 8518 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 8519 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4 8520 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 4 8521 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 4 8522 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 4 8523 // CHECK15-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 8524 // CHECK15-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 8525 // CHECK15-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 8526 // CHECK15-NEXT: store i32 10, ptr [[M]], align 4 8527 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8528 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 8529 // CHECK15-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8530 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 8531 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 8532 // CHECK15-NEXT: store ptr null, ptr [[TMP2]], align 4 8533 // CHECK15-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8534 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8535 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 8536 // CHECK15-NEXT: store i32 3, ptr [[TMP5]], align 4 8537 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 8538 // CHECK15-NEXT: store i32 1, ptr [[TMP6]], align 4 8539 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 8540 // CHECK15-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 8541 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 8542 // CHECK15-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 8543 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 8544 // CHECK15-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 4 8545 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 8546 // CHECK15-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4 8547 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 8548 // CHECK15-NEXT: store ptr null, ptr [[TMP11]], align 4 8549 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 8550 // CHECK15-NEXT: store ptr null, ptr [[TMP12]], align 4 8551 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 8552 // CHECK15-NEXT: store i64 10, ptr [[TMP13]], align 8 8553 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 8554 // CHECK15-NEXT: store i64 0, ptr [[TMP14]], align 8 8555 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 8556 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 8557 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 8558 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 8559 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 8560 // CHECK15-NEXT: store i32 0, ptr [[TMP17]], align 4 8561 // CHECK15-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 8562 // CHECK15-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 8563 // CHECK15-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8564 // CHECK15: omp_offload.failed: 8565 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 8566 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 8567 // CHECK15: omp_offload.cont: 8568 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 8569 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP20]], align 4 8570 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 8571 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP21]], align 4 8572 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 8573 // CHECK15-NEXT: store ptr null, ptr [[TMP22]], align 4 8574 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 8575 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 8576 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 8577 // CHECK15-NEXT: store i32 3, ptr [[TMP25]], align 4 8578 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 8579 // CHECK15-NEXT: store i32 1, ptr [[TMP26]], align 4 8580 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 8581 // CHECK15-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 8582 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 8583 // CHECK15-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 8584 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 8585 // CHECK15-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 4 8586 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 8587 // CHECK15-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4 8588 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 8589 // CHECK15-NEXT: store ptr null, ptr [[TMP31]], align 4 8590 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 8591 // CHECK15-NEXT: store ptr null, ptr [[TMP32]], align 4 8592 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 8593 // CHECK15-NEXT: store i64 10, ptr [[TMP33]], align 8 8594 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 8595 // CHECK15-NEXT: store i64 0, ptr [[TMP34]], align 8 8596 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 8597 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 8598 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 8599 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 8600 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 8601 // CHECK15-NEXT: store i32 0, ptr [[TMP37]], align 4 8602 // CHECK15-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 8603 // CHECK15-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 8604 // CHECK15-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 8605 // CHECK15: omp_offload.failed6: 8606 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 8607 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT7]] 8608 // CHECK15: omp_offload.cont7: 8609 // CHECK15-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 8610 // CHECK15-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 8611 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8612 // CHECK15-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8613 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 8614 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 8615 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP43]], align 4 8616 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 8617 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP44]], align 4 8618 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 8619 // CHECK15-NEXT: store ptr null, ptr [[TMP45]], align 4 8620 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 8621 // CHECK15-NEXT: store i32 [[TMP42]], ptr [[TMP46]], align 4 8622 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 8623 // CHECK15-NEXT: store i32 [[TMP42]], ptr [[TMP47]], align 4 8624 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 8625 // CHECK15-NEXT: store ptr null, ptr [[TMP48]], align 4 8626 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 8627 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 8628 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 8629 // CHECK15-NEXT: store i32 3, ptr [[TMP51]], align 4 8630 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 8631 // CHECK15-NEXT: store i32 2, ptr [[TMP52]], align 4 8632 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 8633 // CHECK15-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 4 8634 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 8635 // CHECK15-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 4 8636 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 8637 // CHECK15-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 4 8638 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 8639 // CHECK15-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 4 8640 // CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 8641 // CHECK15-NEXT: store ptr null, ptr [[TMP57]], align 4 8642 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 8643 // CHECK15-NEXT: store ptr null, ptr [[TMP58]], align 4 8644 // CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 8645 // CHECK15-NEXT: store i64 10, ptr [[TMP59]], align 8 8646 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 8647 // CHECK15-NEXT: store i64 0, ptr [[TMP60]], align 8 8648 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 8649 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 8650 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 8651 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 8652 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 8653 // CHECK15-NEXT: store i32 0, ptr [[TMP63]], align 4 8654 // CHECK15-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 8655 // CHECK15-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 8656 // CHECK15-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 8657 // CHECK15: omp_offload.failed13: 8658 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i32 [[TMP42]]) #[[ATTR3]] 8659 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT14]] 8660 // CHECK15: omp_offload.cont14: 8661 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 8662 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP66]], align 4 8663 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 8664 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP67]], align 4 8665 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0 8666 // CHECK15-NEXT: store ptr null, ptr [[TMP68]], align 4 8667 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 8668 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 8669 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 8670 // CHECK15-NEXT: store i32 3, ptr [[TMP71]], align 4 8671 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 8672 // CHECK15-NEXT: store i32 1, ptr [[TMP72]], align 4 8673 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 8674 // CHECK15-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 4 8675 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 8676 // CHECK15-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 4 8677 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 8678 // CHECK15-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 4 8679 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 8680 // CHECK15-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 4 8681 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 8682 // CHECK15-NEXT: store ptr null, ptr [[TMP77]], align 4 8683 // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 8684 // CHECK15-NEXT: store ptr null, ptr [[TMP78]], align 4 8685 // CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 8686 // CHECK15-NEXT: store i64 10, ptr [[TMP79]], align 8 8687 // CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 8688 // CHECK15-NEXT: store i64 0, ptr [[TMP80]], align 8 8689 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 8690 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 8691 // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 8692 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 8693 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 8694 // CHECK15-NEXT: store i32 0, ptr [[TMP83]], align 4 8695 // CHECK15-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 8696 // CHECK15-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 8697 // CHECK15-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 8698 // CHECK15: omp_offload.failed20: 8699 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 8700 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT21]] 8701 // CHECK15: omp_offload.cont21: 8702 // CHECK15-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 8703 // CHECK15-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 8704 // CHECK15-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 8705 // CHECK15-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 8706 // CHECK15-NEXT: [[TMP88:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 8707 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 8708 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP89]], align 4 8709 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 8710 // CHECK15-NEXT: store ptr [[A]], ptr [[TMP90]], align 4 8711 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 8712 // CHECK15-NEXT: store ptr null, ptr [[TMP91]], align 4 8713 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 8714 // CHECK15-NEXT: store i32 [[TMP88]], ptr [[TMP92]], align 4 8715 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 8716 // CHECK15-NEXT: store i32 [[TMP88]], ptr [[TMP93]], align 4 8717 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1 8718 // CHECK15-NEXT: store ptr null, ptr [[TMP94]], align 4 8719 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 8720 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 8721 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 8722 // CHECK15-NEXT: store i32 3, ptr [[TMP97]], align 4 8723 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 8724 // CHECK15-NEXT: store i32 2, ptr [[TMP98]], align 4 8725 // CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 8726 // CHECK15-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 4 8727 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 8728 // CHECK15-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 4 8729 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 8730 // CHECK15-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 4 8731 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 8732 // CHECK15-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 4 8733 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 8734 // CHECK15-NEXT: store ptr null, ptr [[TMP103]], align 4 8735 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 8736 // CHECK15-NEXT: store ptr null, ptr [[TMP104]], align 4 8737 // CHECK15-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 8738 // CHECK15-NEXT: store i64 10, ptr [[TMP105]], align 8 8739 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 8740 // CHECK15-NEXT: store i64 0, ptr [[TMP106]], align 8 8741 // CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 8742 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 8743 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 8744 // CHECK15-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 8745 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 8746 // CHECK15-NEXT: store i32 0, ptr [[TMP109]], align 4 8747 // CHECK15-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 8748 // CHECK15-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 8749 // CHECK15-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 8750 // CHECK15: omp_offload.failed29: 8751 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i32 [[TMP88]]) #[[ATTR3]] 8752 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]] 8753 // CHECK15: omp_offload.cont30: 8754 // CHECK15-NEXT: ret i32 0 8755 // 8756 // 8757 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 8758 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8759 // CHECK15-NEXT: entry: 8760 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8761 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8762 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8763 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 8764 // CHECK15-NEXT: ret void 8765 // 8766 // 8767 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 8768 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8769 // CHECK15-NEXT: entry: 8770 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8771 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8772 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8773 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8774 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8775 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8776 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8777 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8778 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8779 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8780 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8781 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8782 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8783 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8784 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8785 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 8786 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8787 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8788 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8789 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8790 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8791 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8792 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8793 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8794 // CHECK15: cond.true: 8795 // CHECK15-NEXT: br label [[COND_END:%.*]] 8796 // CHECK15: cond.false: 8797 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8798 // CHECK15-NEXT: br label [[COND_END]] 8799 // CHECK15: cond.end: 8800 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8801 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8802 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8803 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8804 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8805 // CHECK15: omp.inner.for.cond: 8806 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8807 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8808 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8809 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8810 // CHECK15: omp.inner.for.body: 8811 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8812 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8813 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 8814 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8815 // CHECK15: omp.inner.for.inc: 8816 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8817 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 8818 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 8819 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 8820 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8821 // CHECK15: omp.inner.for.end: 8822 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8823 // CHECK15: omp.loop.exit: 8824 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8825 // CHECK15-NEXT: ret void 8826 // 8827 // 8828 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 8829 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8830 // CHECK15-NEXT: entry: 8831 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8832 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8833 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8834 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8835 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8836 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8837 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8838 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8839 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8840 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8841 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8842 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8843 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8844 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8845 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8846 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8847 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8848 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8849 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8850 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 8851 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8852 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8853 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 8854 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 8855 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8856 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8857 // CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8858 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 8859 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8860 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8861 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 8862 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8863 // CHECK15: cond.true: 8864 // CHECK15-NEXT: br label [[COND_END:%.*]] 8865 // CHECK15: cond.false: 8866 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8867 // CHECK15-NEXT: br label [[COND_END]] 8868 // CHECK15: cond.end: 8869 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 8870 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8871 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8872 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 8873 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8874 // CHECK15: omp.inner.for.cond: 8875 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8876 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8877 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 8878 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8879 // CHECK15: omp.inner.for.body: 8880 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8881 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 8882 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8883 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4 8884 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 8885 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 8886 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 8887 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8888 // CHECK15: omp.body.continue: 8889 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8890 // CHECK15: omp.inner.for.inc: 8891 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8892 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 8893 // CHECK15-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 8894 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8895 // CHECK15: omp.inner.for.end: 8896 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8897 // CHECK15: omp.loop.exit: 8898 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 8899 // CHECK15-NEXT: ret void 8900 // 8901 // 8902 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 8903 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8904 // CHECK15-NEXT: entry: 8905 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8906 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8907 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8908 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 8909 // CHECK15-NEXT: ret void 8910 // 8911 // 8912 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 8913 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8914 // CHECK15-NEXT: entry: 8915 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8916 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8917 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8918 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8919 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8920 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8921 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8922 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8923 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8924 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8925 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8926 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8927 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8928 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8929 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8930 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 8931 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8932 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8933 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 8934 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 8935 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8936 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8937 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8938 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8939 // CHECK15: cond.true: 8940 // CHECK15-NEXT: br label [[COND_END:%.*]] 8941 // CHECK15: cond.false: 8942 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8943 // CHECK15-NEXT: br label [[COND_END]] 8944 // CHECK15: cond.end: 8945 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8946 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8947 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8948 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 8949 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8950 // CHECK15: omp.inner.for.cond: 8951 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8952 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8953 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8954 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8955 // CHECK15: omp.inner.for.body: 8956 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8957 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8958 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 8959 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8960 // CHECK15: omp.inner.for.inc: 8961 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 8962 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 8963 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 8964 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 8965 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8966 // CHECK15: omp.inner.for.end: 8967 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8968 // CHECK15: omp.loop.exit: 8969 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 8970 // CHECK15-NEXT: ret void 8971 // 8972 // 8973 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 8974 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8975 // CHECK15-NEXT: entry: 8976 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 8977 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 8978 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8979 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8980 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 8981 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8982 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8983 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8984 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8985 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8986 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8987 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8988 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 8989 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 8990 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8991 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8992 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 8993 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 8994 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8995 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 8996 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 8997 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 8998 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 8999 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 9000 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9001 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9002 // CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9003 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 9004 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9005 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9006 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 9007 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9008 // CHECK15: cond.true: 9009 // CHECK15-NEXT: br label [[COND_END:%.*]] 9010 // CHECK15: cond.false: 9011 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9012 // CHECK15-NEXT: br label [[COND_END]] 9013 // CHECK15: cond.end: 9014 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 9015 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9016 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9017 // CHECK15-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 9018 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9019 // CHECK15: omp.inner.for.cond: 9020 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9021 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9022 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 9023 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9024 // CHECK15: omp.inner.for.body: 9025 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9026 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 9027 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9028 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4 9029 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 9030 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 9031 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 9032 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9033 // CHECK15: omp.body.continue: 9034 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9035 // CHECK15: omp.inner.for.inc: 9036 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9037 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 9038 // CHECK15-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 9039 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 9040 // CHECK15: omp.inner.for.end: 9041 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9042 // CHECK15: omp.loop.exit: 9043 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 9044 // CHECK15-NEXT: ret void 9045 // 9046 // 9047 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 9048 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9049 // CHECK15-NEXT: entry: 9050 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9051 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9052 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9053 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9054 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9055 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9056 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9057 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9058 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9059 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 9060 // CHECK15-NEXT: ret void 9061 // 9062 // 9063 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 9064 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9065 // CHECK15-NEXT: entry: 9066 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9067 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9068 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9069 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9070 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9071 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9072 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9073 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9074 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9075 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9076 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9077 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9078 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9079 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9080 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9081 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9082 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9083 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9084 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 9085 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9086 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9087 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9088 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9089 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9090 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9091 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9092 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9093 // CHECK15: cond.true: 9094 // CHECK15-NEXT: br label [[COND_END:%.*]] 9095 // CHECK15: cond.false: 9096 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9097 // CHECK15-NEXT: br label [[COND_END]] 9098 // CHECK15: cond.end: 9099 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9100 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9101 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9102 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9103 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9104 // CHECK15: omp.inner.for.cond: 9105 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9106 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9107 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9108 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9109 // CHECK15: omp.inner.for.body: 9110 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9111 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9112 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9113 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9114 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9115 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]) 9116 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9117 // CHECK15: omp.inner.for.inc: 9118 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9119 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9120 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9121 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 9122 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 9123 // CHECK15: omp.inner.for.end: 9124 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9125 // CHECK15: omp.loop.exit: 9126 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9127 // CHECK15-NEXT: ret void 9128 // 9129 // 9130 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 9131 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9132 // CHECK15-NEXT: entry: 9133 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9134 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9135 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9136 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9137 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9138 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9139 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9140 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9141 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9142 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9143 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9144 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9145 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9146 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9147 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9148 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9149 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9150 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9151 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9152 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9153 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9154 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 9155 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9156 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9157 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 9158 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 9159 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9160 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9161 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9162 // CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9163 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 9164 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 9165 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9166 // CHECK15: omp.dispatch.cond: 9167 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9168 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9169 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 9170 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9171 // CHECK15: cond.true: 9172 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9173 // CHECK15-NEXT: br label [[COND_END:%.*]] 9174 // CHECK15: cond.false: 9175 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9176 // CHECK15-NEXT: br label [[COND_END]] 9177 // CHECK15: cond.end: 9178 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 9179 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9180 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9181 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 9182 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9183 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9184 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 9185 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9186 // CHECK15: omp.dispatch.body: 9187 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9188 // CHECK15: omp.inner.for.cond: 9189 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9190 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9191 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 9192 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9193 // CHECK15: omp.inner.for.body: 9194 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9195 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 9196 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9197 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4 9198 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4 9199 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]] 9200 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 9201 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9202 // CHECK15: omp.body.continue: 9203 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9204 // CHECK15: omp.inner.for.inc: 9205 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9206 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 9207 // CHECK15-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 9208 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 9209 // CHECK15: omp.inner.for.end: 9210 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9211 // CHECK15: omp.dispatch.inc: 9212 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9213 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9214 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 9215 // CHECK15-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 9216 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9217 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9218 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 9219 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 9220 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 9221 // CHECK15: omp.dispatch.end: 9222 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 9223 // CHECK15-NEXT: ret void 9224 // 9225 // 9226 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 9227 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9228 // CHECK15-NEXT: entry: 9229 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9230 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9231 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9232 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 9233 // CHECK15-NEXT: ret void 9234 // 9235 // 9236 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 9237 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9238 // CHECK15-NEXT: entry: 9239 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9240 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9241 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9242 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9243 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9244 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9245 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9246 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9247 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9248 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9249 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9250 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9251 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9252 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9253 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9254 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 9255 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9256 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9257 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9258 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9259 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9260 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9261 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9262 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9263 // CHECK15: cond.true: 9264 // CHECK15-NEXT: br label [[COND_END:%.*]] 9265 // CHECK15: cond.false: 9266 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9267 // CHECK15-NEXT: br label [[COND_END]] 9268 // CHECK15: cond.end: 9269 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9270 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9271 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9272 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9273 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9274 // CHECK15: omp.inner.for.cond: 9275 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9276 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9277 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9278 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9279 // CHECK15: omp.inner.for.body: 9280 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9281 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9282 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 9283 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9284 // CHECK15: omp.inner.for.inc: 9285 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9286 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9287 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 9288 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 9289 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 9290 // CHECK15: omp.inner.for.end: 9291 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9292 // CHECK15: omp.loop.exit: 9293 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9294 // CHECK15-NEXT: ret void 9295 // 9296 // 9297 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 9298 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9299 // CHECK15-NEXT: entry: 9300 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9301 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9302 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9303 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9304 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9305 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9306 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9307 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9308 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9309 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9310 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9311 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9312 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9313 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9314 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9315 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9316 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9317 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9318 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9319 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 9320 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9321 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9322 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 9323 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 9324 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9325 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9326 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9327 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9328 // CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9329 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 9330 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 9331 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9332 // CHECK15: omp.dispatch.cond: 9333 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 9334 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 9335 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9336 // CHECK15: omp.dispatch.body: 9337 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9338 // CHECK15-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 9339 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9340 // CHECK15: omp.inner.for.cond: 9341 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 9342 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 9343 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 9344 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9345 // CHECK15: omp.inner.for.body: 9346 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 9347 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 9348 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9349 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 9350 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 9351 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]] 9352 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]] 9353 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9354 // CHECK15: omp.body.continue: 9355 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9356 // CHECK15: omp.inner.for.inc: 9357 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 9358 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 9359 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 9360 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 9361 // CHECK15: omp.inner.for.end: 9362 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9363 // CHECK15: omp.dispatch.inc: 9364 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 9365 // CHECK15: omp.dispatch.end: 9366 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 9367 // CHECK15-NEXT: ret void 9368 // 9369 // 9370 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 9371 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9372 // CHECK15-NEXT: entry: 9373 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9374 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9375 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9376 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9377 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9378 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9379 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9380 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9381 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9382 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 9383 // CHECK15-NEXT: ret void 9384 // 9385 // 9386 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 9387 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9388 // CHECK15-NEXT: entry: 9389 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9390 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9391 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9392 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9393 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9394 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9395 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9396 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9397 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9398 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9399 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9400 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 9401 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9402 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9403 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9404 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9405 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9406 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9407 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 9408 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9409 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9410 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9411 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 9412 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9413 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9414 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9415 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9416 // CHECK15: cond.true: 9417 // CHECK15-NEXT: br label [[COND_END:%.*]] 9418 // CHECK15: cond.false: 9419 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9420 // CHECK15-NEXT: br label [[COND_END]] 9421 // CHECK15: cond.end: 9422 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9423 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9424 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9425 // CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 9426 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9427 // CHECK15: omp.inner.for.cond: 9428 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9429 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9430 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9431 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9432 // CHECK15: omp.inner.for.body: 9433 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9434 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9435 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9436 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9437 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9438 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]) 9439 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9440 // CHECK15: omp.inner.for.inc: 9441 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9442 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9443 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9444 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 9445 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 9446 // CHECK15: omp.inner.for.end: 9447 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9448 // CHECK15: omp.loop.exit: 9449 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 9450 // CHECK15-NEXT: ret void 9451 // 9452 // 9453 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 9454 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9455 // CHECK15-NEXT: entry: 9456 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 9457 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 9458 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 9459 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 9460 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 9461 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 9462 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9463 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 9464 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9465 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9466 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9467 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9468 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 9469 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 9470 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 9471 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9472 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9473 // CHECK15-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 9474 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9475 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 9476 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9477 // CHECK15-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 9478 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 9479 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 9480 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 9481 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 9482 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9483 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9484 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9485 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9486 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9487 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 9488 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 9489 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 9490 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9491 // CHECK15: omp.dispatch.cond: 9492 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 9493 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 9494 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9495 // CHECK15: omp.dispatch.body: 9496 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9497 // CHECK15-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 9498 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9499 // CHECK15: omp.inner.for.cond: 9500 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 9501 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 9502 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 9503 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9504 // CHECK15: omp.inner.for.body: 9505 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 9506 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 9507 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9508 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 9509 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 9510 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]] 9511 // CHECK15-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 9512 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9513 // CHECK15: omp.body.continue: 9514 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9515 // CHECK15: omp.inner.for.inc: 9516 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 9517 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 9518 // CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 9519 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 9520 // CHECK15: omp.inner.for.end: 9521 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9522 // CHECK15: omp.dispatch.inc: 9523 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 9524 // CHECK15: omp.dispatch.end: 9525 // CHECK15-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 9526 // CHECK15-NEXT: ret void 9527 // 9528 // 9529 // CHECK17-LABEL: define {{[^@]+}}@main 9530 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 9531 // CHECK17-NEXT: entry: 9532 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 9533 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 9534 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 9535 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4 9536 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 9537 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 9538 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 9539 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 9540 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 9541 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 9542 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 9543 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 9544 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9545 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9546 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9547 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 9548 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 9549 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8 9550 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8 9551 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8 9552 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8 9553 // CHECK17-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 9554 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 9555 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 9556 // CHECK17-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9557 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 9558 // CHECK17-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 9559 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9560 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8 9561 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8 9562 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8 9563 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8 9564 // CHECK17-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 9565 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 9566 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 9567 // CHECK17-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9568 // CHECK17-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 9569 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 8 9570 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 8 9571 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 8 9572 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 8 9573 // CHECK17-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 9574 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 9575 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 9576 // CHECK17-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9577 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 9578 // CHECK17-NEXT: [[N_CASTED50:%.*]] = alloca i64, align 8 9579 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i64, align 8 9580 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 8 9581 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 8 9582 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 8 9583 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 8 9584 // CHECK17-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 9585 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 9586 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 9587 // CHECK17-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9588 // CHECK17-NEXT: store i32 0, ptr [[RETVAL]], align 4 9589 // CHECK17-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 9590 // CHECK17-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 9591 // CHECK17-NEXT: store i32 100, ptr [[N]], align 4 9592 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 9593 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 9594 // CHECK17-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 9595 // CHECK17-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8 9596 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 9597 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 9598 // CHECK17-NEXT: store i32 10, ptr [[M]], align 4 9599 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 9600 // CHECK17-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 9601 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 9602 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 9603 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false) 9604 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9605 // CHECK17-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8 9606 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9607 // CHECK17-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8 9608 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 9609 // CHECK17-NEXT: store ptr null, ptr [[TMP8]], align 8 9610 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9611 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8 9612 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9613 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8 9614 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 9615 // CHECK17-NEXT: store ptr null, ptr [[TMP11]], align 8 9616 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9617 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8 9618 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9619 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8 9620 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 9621 // CHECK17-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8 9622 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 9623 // CHECK17-NEXT: store ptr null, ptr [[TMP15]], align 8 9624 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9625 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9626 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9627 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 9628 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 9629 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9630 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 9631 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9632 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9633 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9634 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9635 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 9636 // CHECK17-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 9637 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 9638 // CHECK17-NEXT: store i32 3, ptr [[TMP23]], align 4 9639 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 9640 // CHECK17-NEXT: store i32 3, ptr [[TMP24]], align 4 9641 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 9642 // CHECK17-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8 9643 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 9644 // CHECK17-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8 9645 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 9646 // CHECK17-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8 9647 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 9648 // CHECK17-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 9649 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 9650 // CHECK17-NEXT: store ptr null, ptr [[TMP29]], align 8 9651 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 9652 // CHECK17-NEXT: store ptr null, ptr [[TMP30]], align 8 9653 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 9654 // CHECK17-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 9655 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 9656 // CHECK17-NEXT: store i64 0, ptr [[TMP32]], align 8 9657 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 9658 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 9659 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 9660 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 9661 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 9662 // CHECK17-NEXT: store i32 0, ptr [[TMP35]], align 4 9663 // CHECK17-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 9664 // CHECK17-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 9665 // CHECK17-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9666 // CHECK17: omp_offload.failed: 9667 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 9668 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 9669 // CHECK17: omp_offload.cont: 9670 // CHECK17-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 9671 // CHECK17-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 9672 // CHECK17-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 9673 // CHECK17-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4 9674 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false) 9675 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 9676 // CHECK17-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8 9677 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 9678 // CHECK17-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8 9679 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 9680 // CHECK17-NEXT: store ptr null, ptr [[TMP43]], align 8 9681 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 9682 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8 9683 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 9684 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8 9685 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 9686 // CHECK17-NEXT: store ptr null, ptr [[TMP46]], align 8 9687 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 9688 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8 9689 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 9690 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8 9691 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 9692 // CHECK17-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8 9693 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 9694 // CHECK17-NEXT: store ptr null, ptr [[TMP50]], align 8 9695 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 9696 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 9697 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 9698 // CHECK17-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 9699 // CHECK17-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4 9700 // CHECK17-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 9701 // CHECK17-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0 9702 // CHECK17-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 9703 // CHECK17-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 9704 // CHECK17-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 9705 // CHECK17-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 9706 // CHECK17-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1 9707 // CHECK17-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64 9708 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 9709 // CHECK17-NEXT: store i32 3, ptr [[TMP58]], align 4 9710 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 9711 // CHECK17-NEXT: store i32 3, ptr [[TMP59]], align 4 9712 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 9713 // CHECK17-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8 9714 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 9715 // CHECK17-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8 9716 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 9717 // CHECK17-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8 9718 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 9719 // CHECK17-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8 9720 // CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 9721 // CHECK17-NEXT: store ptr null, ptr [[TMP64]], align 8 9722 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 9723 // CHECK17-NEXT: store ptr null, ptr [[TMP65]], align 8 9724 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 9725 // CHECK17-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8 9726 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 9727 // CHECK17-NEXT: store i64 0, ptr [[TMP67]], align 8 9728 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 9729 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4 9730 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 9731 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 9732 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 9733 // CHECK17-NEXT: store i32 0, ptr [[TMP70]], align 4 9734 // CHECK17-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 9735 // CHECK17-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 9736 // CHECK17-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 9737 // CHECK17: omp_offload.failed16: 9738 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 9739 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT17]] 9740 // CHECK17: omp_offload.cont17: 9741 // CHECK17-NEXT: [[TMP73:%.*]] = load i32, ptr [[M]], align 4 9742 // CHECK17-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4 9743 // CHECK17-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4 9744 // CHECK17-NEXT: store i32 [[TMP74]], ptr [[N_CASTED19]], align 4 9745 // CHECK17-NEXT: [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8 9746 // CHECK17-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 9747 // CHECK17-NEXT: store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 9748 // CHECK17-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 9749 // CHECK17-NEXT: [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4 9750 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false) 9751 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 9752 // CHECK17-NEXT: store i64 [[TMP75]], ptr [[TMP79]], align 8 9753 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 9754 // CHECK17-NEXT: store i64 [[TMP75]], ptr [[TMP80]], align 8 9755 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0 9756 // CHECK17-NEXT: store ptr null, ptr [[TMP81]], align 8 9757 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 9758 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP82]], align 8 9759 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 9760 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP83]], align 8 9761 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1 9762 // CHECK17-NEXT: store ptr null, ptr [[TMP84]], align 8 9763 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 9764 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 8 9765 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 9766 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP86]], align 8 9767 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 9768 // CHECK17-NEXT: store i64 [[TMP78]], ptr [[TMP87]], align 8 9769 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2 9770 // CHECK17-NEXT: store ptr null, ptr [[TMP88]], align 8 9771 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 9772 // CHECK17-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8 9773 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 9774 // CHECK17-NEXT: store i64 [[TMP77]], ptr [[TMP90]], align 8 9775 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3 9776 // CHECK17-NEXT: store ptr null, ptr [[TMP91]], align 8 9777 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 9778 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 9779 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 9780 // CHECK17-NEXT: [[TMP95:%.*]] = load i32, ptr [[N]], align 4 9781 // CHECK17-NEXT: store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4 9782 // CHECK17-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 9783 // CHECK17-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0 9784 // CHECK17-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 9785 // CHECK17-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 9786 // CHECK17-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 9787 // CHECK17-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 9788 // CHECK17-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1 9789 // CHECK17-NEXT: [[TMP98:%.*]] = zext i32 [[ADD30]] to i64 9790 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 9791 // CHECK17-NEXT: store i32 3, ptr [[TMP99]], align 4 9792 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 9793 // CHECK17-NEXT: store i32 4, ptr [[TMP100]], align 4 9794 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 9795 // CHECK17-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8 9796 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 9797 // CHECK17-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8 9798 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 9799 // CHECK17-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 8 9800 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 9801 // CHECK17-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8 9802 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 9803 // CHECK17-NEXT: store ptr null, ptr [[TMP105]], align 8 9804 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 9805 // CHECK17-NEXT: store ptr null, ptr [[TMP106]], align 8 9806 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 9807 // CHECK17-NEXT: store i64 [[TMP98]], ptr [[TMP107]], align 8 9808 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 9809 // CHECK17-NEXT: store i64 0, ptr [[TMP108]], align 8 9810 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 9811 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4 9812 // CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 9813 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4 9814 // CHECK17-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 9815 // CHECK17-NEXT: store i32 0, ptr [[TMP111]], align 4 9816 // CHECK17-NEXT: [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 9817 // CHECK17-NEXT: [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0 9818 // CHECK17-NEXT: br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 9819 // CHECK17: omp_offload.failed32: 9820 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]] 9821 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT33]] 9822 // CHECK17: omp_offload.cont33: 9823 // CHECK17-NEXT: [[TMP114:%.*]] = load i32, ptr [[N]], align 4 9824 // CHECK17-NEXT: store i32 [[TMP114]], ptr [[N_CASTED34]], align 4 9825 // CHECK17-NEXT: [[TMP115:%.*]] = load i64, ptr [[N_CASTED34]], align 8 9826 // CHECK17-NEXT: [[TMP116:%.*]] = mul nuw i64 [[TMP1]], 4 9827 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES38]], ptr align 8 @.offload_sizes.5, i64 24, i1 false) 9828 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 9829 // CHECK17-NEXT: store i64 [[TMP115]], ptr [[TMP117]], align 8 9830 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 9831 // CHECK17-NEXT: store i64 [[TMP115]], ptr [[TMP118]], align 8 9832 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 0 9833 // CHECK17-NEXT: store ptr null, ptr [[TMP119]], align 8 9834 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 9835 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP120]], align 8 9836 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 9837 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP121]], align 8 9838 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 1 9839 // CHECK17-NEXT: store ptr null, ptr [[TMP122]], align 8 9840 // CHECK17-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 9841 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP123]], align 8 9842 // CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 9843 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP124]], align 8 9844 // CHECK17-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 9845 // CHECK17-NEXT: store i64 [[TMP116]], ptr [[TMP125]], align 8 9846 // CHECK17-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 2 9847 // CHECK17-NEXT: store ptr null, ptr [[TMP126]], align 8 9848 // CHECK17-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 9849 // CHECK17-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 9850 // CHECK17-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 9851 // CHECK17-NEXT: [[TMP130:%.*]] = load i32, ptr [[N]], align 4 9852 // CHECK17-NEXT: store i32 [[TMP130]], ptr [[DOTCAPTURE_EXPR_40]], align 4 9853 // CHECK17-NEXT: [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 9854 // CHECK17-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP131]], 0 9855 // CHECK17-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 9856 // CHECK17-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 9857 // CHECK17-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 9858 // CHECK17-NEXT: [[TMP132:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 9859 // CHECK17-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP132]], 1 9860 // CHECK17-NEXT: [[TMP133:%.*]] = zext i32 [[ADD45]] to i64 9861 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 9862 // CHECK17-NEXT: store i32 3, ptr [[TMP134]], align 4 9863 // CHECK17-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 9864 // CHECK17-NEXT: store i32 3, ptr [[TMP135]], align 4 9865 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 9866 // CHECK17-NEXT: store ptr [[TMP127]], ptr [[TMP136]], align 8 9867 // CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 9868 // CHECK17-NEXT: store ptr [[TMP128]], ptr [[TMP137]], align 8 9869 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 9870 // CHECK17-NEXT: store ptr [[TMP129]], ptr [[TMP138]], align 8 9871 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 9872 // CHECK17-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP139]], align 8 9873 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 9874 // CHECK17-NEXT: store ptr null, ptr [[TMP140]], align 8 9875 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 9876 // CHECK17-NEXT: store ptr null, ptr [[TMP141]], align 8 9877 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 9878 // CHECK17-NEXT: store i64 [[TMP133]], ptr [[TMP142]], align 8 9879 // CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 9880 // CHECK17-NEXT: store i64 0, ptr [[TMP143]], align 8 9881 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 9882 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4 9883 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 9884 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP145]], align 4 9885 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 9886 // CHECK17-NEXT: store i32 0, ptr [[TMP146]], align 4 9887 // CHECK17-NEXT: [[TMP147:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 9888 // CHECK17-NEXT: [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0 9889 // CHECK17-NEXT: br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 9890 // CHECK17: omp_offload.failed47: 9891 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP115]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]] 9892 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT48]] 9893 // CHECK17: omp_offload.cont48: 9894 // CHECK17-NEXT: [[TMP149:%.*]] = load i32, ptr [[M]], align 4 9895 // CHECK17-NEXT: store i32 [[TMP149]], ptr [[DOTCAPTURE_EXPR_49]], align 4 9896 // CHECK17-NEXT: [[TMP150:%.*]] = load i32, ptr [[N]], align 4 9897 // CHECK17-NEXT: store i32 [[TMP150]], ptr [[N_CASTED50]], align 4 9898 // CHECK17-NEXT: [[TMP151:%.*]] = load i64, ptr [[N_CASTED50]], align 8 9899 // CHECK17-NEXT: [[TMP152:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 9900 // CHECK17-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 9901 // CHECK17-NEXT: [[TMP153:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 8 9902 // CHECK17-NEXT: [[TMP154:%.*]] = mul nuw i64 [[TMP1]], 4 9903 // CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES55]], ptr align 8 @.offload_sizes.7, i64 32, i1 false) 9904 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 9905 // CHECK17-NEXT: store i64 [[TMP151]], ptr [[TMP155]], align 8 9906 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 9907 // CHECK17-NEXT: store i64 [[TMP151]], ptr [[TMP156]], align 8 9908 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 0 9909 // CHECK17-NEXT: store ptr null, ptr [[TMP157]], align 8 9910 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 9911 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP158]], align 8 9912 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 9913 // CHECK17-NEXT: store i64 [[TMP1]], ptr [[TMP159]], align 8 9914 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 1 9915 // CHECK17-NEXT: store ptr null, ptr [[TMP160]], align 8 9916 // CHECK17-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 9917 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP161]], align 8 9918 // CHECK17-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 9919 // CHECK17-NEXT: store ptr [[VLA]], ptr [[TMP162]], align 8 9920 // CHECK17-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 9921 // CHECK17-NEXT: store i64 [[TMP154]], ptr [[TMP163]], align 8 9922 // CHECK17-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 2 9923 // CHECK17-NEXT: store ptr null, ptr [[TMP164]], align 8 9924 // CHECK17-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 9925 // CHECK17-NEXT: store i64 [[TMP153]], ptr [[TMP165]], align 8 9926 // CHECK17-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 9927 // CHECK17-NEXT: store i64 [[TMP153]], ptr [[TMP166]], align 8 9928 // CHECK17-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 3 9929 // CHECK17-NEXT: store ptr null, ptr [[TMP167]], align 8 9930 // CHECK17-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 9931 // CHECK17-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 9932 // CHECK17-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 9933 // CHECK17-NEXT: [[TMP171:%.*]] = load i32, ptr [[N]], align 4 9934 // CHECK17-NEXT: store i32 [[TMP171]], ptr [[DOTCAPTURE_EXPR_57]], align 4 9935 // CHECK17-NEXT: [[TMP172:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 9936 // CHECK17-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP172]], 0 9937 // CHECK17-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 9938 // CHECK17-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 9939 // CHECK17-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 9940 // CHECK17-NEXT: [[TMP173:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 9941 // CHECK17-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP173]], 1 9942 // CHECK17-NEXT: [[TMP174:%.*]] = zext i32 [[ADD62]] to i64 9943 // CHECK17-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 9944 // CHECK17-NEXT: store i32 3, ptr [[TMP175]], align 4 9945 // CHECK17-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 9946 // CHECK17-NEXT: store i32 4, ptr [[TMP176]], align 4 9947 // CHECK17-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 9948 // CHECK17-NEXT: store ptr [[TMP168]], ptr [[TMP177]], align 8 9949 // CHECK17-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 9950 // CHECK17-NEXT: store ptr [[TMP169]], ptr [[TMP178]], align 8 9951 // CHECK17-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 9952 // CHECK17-NEXT: store ptr [[TMP170]], ptr [[TMP179]], align 8 9953 // CHECK17-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 9954 // CHECK17-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP180]], align 8 9955 // CHECK17-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 9956 // CHECK17-NEXT: store ptr null, ptr [[TMP181]], align 8 9957 // CHECK17-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 9958 // CHECK17-NEXT: store ptr null, ptr [[TMP182]], align 8 9959 // CHECK17-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 9960 // CHECK17-NEXT: store i64 [[TMP174]], ptr [[TMP183]], align 8 9961 // CHECK17-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 9962 // CHECK17-NEXT: store i64 0, ptr [[TMP184]], align 8 9963 // CHECK17-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 9964 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP185]], align 4 9965 // CHECK17-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 9966 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP186]], align 4 9967 // CHECK17-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 9968 // CHECK17-NEXT: store i32 0, ptr [[TMP187]], align 4 9969 // CHECK17-NEXT: [[TMP188:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 9970 // CHECK17-NEXT: [[TMP189:%.*]] = icmp ne i32 [[TMP188]], 0 9971 // CHECK17-NEXT: br i1 [[TMP189]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 9972 // CHECK17: omp_offload.failed64: 9973 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP153]]) #[[ATTR3]] 9974 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT65]] 9975 // CHECK17: omp_offload.cont65: 9976 // CHECK17-NEXT: [[TMP190:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 9977 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP190]]) 9978 // CHECK17-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 9979 // CHECK17-NEXT: [[TMP191:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 9980 // CHECK17-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP191]]) 9981 // CHECK17-NEXT: [[TMP192:%.*]] = load i32, ptr [[RETVAL]], align 4 9982 // CHECK17-NEXT: ret i32 [[TMP192]] 9983 // 9984 // 9985 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 9986 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 9987 // CHECK17-NEXT: entry: 9988 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9989 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9990 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9991 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 9992 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 9993 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 9994 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9995 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 9996 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 9997 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 9998 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 9999 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 10000 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 10001 // CHECK17-NEXT: ret void 10002 // 10003 // 10004 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 10005 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10006 // CHECK17-NEXT: entry: 10007 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10008 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10009 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10010 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10011 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10012 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10013 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10014 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10015 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10016 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10017 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10018 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10019 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10020 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10021 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 10022 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10023 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10024 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10025 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10026 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10027 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10028 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10029 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10030 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10031 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 10032 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10033 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10034 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10035 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10036 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10037 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10038 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10039 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10040 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10041 // CHECK17: omp.precond.then: 10042 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10043 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10044 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 10045 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10046 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10047 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10048 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 10049 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10050 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10051 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10052 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 10053 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10054 // CHECK17: cond.true: 10055 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10056 // CHECK17-NEXT: br label [[COND_END:%.*]] 10057 // CHECK17: cond.false: 10058 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10059 // CHECK17-NEXT: br label [[COND_END]] 10060 // CHECK17: cond.end: 10061 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 10062 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10063 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10064 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 10065 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10066 // CHECK17: omp.inner.for.cond: 10067 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10068 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10069 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 10070 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10071 // CHECK17: omp.inner.for.body: 10072 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10073 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 10074 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10075 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10076 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 10077 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 10078 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 10079 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]) 10080 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10081 // CHECK17: omp.inner.for.inc: 10082 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10083 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10084 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 10085 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 10086 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10087 // CHECK17: omp.inner.for.end: 10088 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10089 // CHECK17: omp.loop.exit: 10090 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10091 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 10092 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 10093 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10094 // CHECK17: omp.precond.end: 10095 // CHECK17-NEXT: ret void 10096 // 10097 // 10098 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 10099 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10100 // CHECK17-NEXT: entry: 10101 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10102 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10103 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10104 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10105 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10106 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10107 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10108 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10109 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10110 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10111 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10112 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10113 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10114 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10115 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10116 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10117 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 10118 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10119 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10120 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10121 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10122 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10123 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10124 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10125 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10126 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10127 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10128 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 10129 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10130 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10131 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10132 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10133 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10134 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10135 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10136 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10137 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10138 // CHECK17: omp.precond.then: 10139 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10140 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10141 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 10142 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10143 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 10144 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10145 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 10146 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 10147 // CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 10148 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10149 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10150 // CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10151 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 10152 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10153 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10154 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10155 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10156 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10157 // CHECK17: cond.true: 10158 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10159 // CHECK17-NEXT: br label [[COND_END:%.*]] 10160 // CHECK17: cond.false: 10161 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10162 // CHECK17-NEXT: br label [[COND_END]] 10163 // CHECK17: cond.end: 10164 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10165 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10166 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10167 // CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 10168 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10169 // CHECK17: omp.inner.for.cond: 10170 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10171 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10172 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10173 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10174 // CHECK17: omp.inner.for.body: 10175 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10176 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 10177 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10178 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 10179 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4 10180 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 10181 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 10182 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 10183 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10184 // CHECK17: omp.body.continue: 10185 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10186 // CHECK17: omp.inner.for.inc: 10187 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10188 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 10189 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 10190 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10191 // CHECK17: omp.inner.for.end: 10192 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10193 // CHECK17: omp.loop.exit: 10194 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10195 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 10196 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 10197 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10198 // CHECK17: omp.precond.end: 10199 // CHECK17-NEXT: ret void 10200 // 10201 // 10202 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 10203 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10204 // CHECK17-NEXT: entry: 10205 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10206 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10207 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10208 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10209 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10210 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10211 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10212 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10213 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10214 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10215 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 10216 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 10217 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 10218 // CHECK17-NEXT: ret void 10219 // 10220 // 10221 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 10222 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10223 // CHECK17-NEXT: entry: 10224 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10225 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10226 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10227 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10228 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10229 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10230 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10231 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10232 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10233 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10234 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10235 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10236 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10237 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10238 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 10239 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10240 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10241 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10242 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10243 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10244 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10245 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10246 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10247 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10248 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 10249 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10250 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10251 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10252 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10253 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10254 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10255 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10256 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10257 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10258 // CHECK17: omp.precond.then: 10259 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10260 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10261 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 10262 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10263 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10264 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10265 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 10266 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10267 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10268 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10269 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 10270 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10271 // CHECK17: cond.true: 10272 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10273 // CHECK17-NEXT: br label [[COND_END:%.*]] 10274 // CHECK17: cond.false: 10275 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10276 // CHECK17-NEXT: br label [[COND_END]] 10277 // CHECK17: cond.end: 10278 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 10279 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10280 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10281 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 10282 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10283 // CHECK17: omp.inner.for.cond: 10284 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10285 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10286 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 10287 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10288 // CHECK17: omp.inner.for.body: 10289 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10290 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 10291 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10292 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10293 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 10294 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 10295 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 10296 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]) 10297 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10298 // CHECK17: omp.inner.for.inc: 10299 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10300 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10301 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 10302 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 10303 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10304 // CHECK17: omp.inner.for.end: 10305 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10306 // CHECK17: omp.loop.exit: 10307 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10308 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 10309 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 10310 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10311 // CHECK17: omp.precond.end: 10312 // CHECK17-NEXT: ret void 10313 // 10314 // 10315 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 10316 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10317 // CHECK17-NEXT: entry: 10318 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10319 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10320 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10321 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10322 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10323 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10324 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10325 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10326 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10327 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10328 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10329 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10330 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10331 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10332 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10333 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10334 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 10335 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10336 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10337 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10338 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10339 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10340 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10341 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10342 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10343 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10344 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10345 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 10346 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10347 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10348 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10349 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10350 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10351 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10352 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10353 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10354 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10355 // CHECK17: omp.precond.then: 10356 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10357 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10358 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 10359 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10360 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 10361 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10362 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 10363 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 10364 // CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 10365 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10366 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10367 // CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10368 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 10369 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10370 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10371 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10372 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10373 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10374 // CHECK17: cond.true: 10375 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10376 // CHECK17-NEXT: br label [[COND_END:%.*]] 10377 // CHECK17: cond.false: 10378 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10379 // CHECK17-NEXT: br label [[COND_END]] 10380 // CHECK17: cond.end: 10381 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10382 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10383 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10384 // CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 10385 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10386 // CHECK17: omp.inner.for.cond: 10387 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10388 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10389 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10390 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10391 // CHECK17: omp.inner.for.body: 10392 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10393 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 10394 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10395 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 10396 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4 10397 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 10398 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 10399 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 10400 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10401 // CHECK17: omp.body.continue: 10402 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10403 // CHECK17: omp.inner.for.inc: 10404 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10405 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 10406 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 10407 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10408 // CHECK17: omp.inner.for.end: 10409 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10410 // CHECK17: omp.loop.exit: 10411 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10412 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 10413 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 10414 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10415 // CHECK17: omp.precond.end: 10416 // CHECK17-NEXT: ret void 10417 // 10418 // 10419 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 10420 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10421 // CHECK17-NEXT: entry: 10422 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10423 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10424 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10425 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10426 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10427 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10428 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10429 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10430 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10431 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 10432 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10433 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10434 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10435 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 10436 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 10437 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10438 // CHECK17-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10439 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 10440 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 10441 // CHECK17-NEXT: ret void 10442 // 10443 // 10444 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 10445 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10446 // CHECK17-NEXT: entry: 10447 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10448 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10449 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10450 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10451 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10452 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10453 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10454 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10455 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10456 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10457 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10458 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10459 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10460 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10461 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10462 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 10463 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10464 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10465 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10466 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10467 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10468 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10469 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10470 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 10471 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10472 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10473 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10474 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10475 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10476 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10477 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10478 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10479 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 10480 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10481 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10482 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10483 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10484 // CHECK17: omp.precond.then: 10485 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10486 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10487 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 10488 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10489 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10490 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10491 // CHECK17-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10492 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 10493 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 10494 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10495 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10496 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 10497 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10498 // CHECK17: cond.true: 10499 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10500 // CHECK17-NEXT: br label [[COND_END:%.*]] 10501 // CHECK17: cond.false: 10502 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10503 // CHECK17-NEXT: br label [[COND_END]] 10504 // CHECK17: cond.end: 10505 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 10506 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10507 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10508 // CHECK17-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 10509 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10510 // CHECK17: omp.inner.for.cond: 10511 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10512 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10513 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 10514 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 10515 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10516 // CHECK17: omp.inner.for.body: 10517 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10518 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 10519 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10520 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 10521 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4 10522 // CHECK17-NEXT: store i32 [[TMP20]], ptr [[N_CASTED]], align 4 10523 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8 10524 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10525 // CHECK17-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10526 // CHECK17-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 10527 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP23]]) 10528 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10529 // CHECK17: omp.inner.for.inc: 10530 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10531 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10532 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 10533 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 10534 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10535 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10536 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 10537 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4 10538 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10539 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10540 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 10541 // CHECK17-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4 10542 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10543 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10544 // CHECK17-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]] 10545 // CHECK17-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 10546 // CHECK17: cond.true11: 10547 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10548 // CHECK17-NEXT: br label [[COND_END13:%.*]] 10549 // CHECK17: cond.false12: 10550 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10551 // CHECK17-NEXT: br label [[COND_END13]] 10552 // CHECK17: cond.end13: 10553 // CHECK17-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE11]] ], [ [[TMP33]], [[COND_FALSE12]] ] 10554 // CHECK17-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4 10555 // CHECK17-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10556 // CHECK17-NEXT: store i32 [[TMP34]], ptr [[DOTOMP_IV]], align 4 10557 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10558 // CHECK17: omp.inner.for.end: 10559 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10560 // CHECK17: omp.loop.exit: 10561 // CHECK17-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10562 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 10563 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP36]]) 10564 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10565 // CHECK17: omp.precond.end: 10566 // CHECK17-NEXT: ret void 10567 // 10568 // 10569 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 10570 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10571 // CHECK17-NEXT: entry: 10572 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10573 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10574 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10575 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10576 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10577 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10578 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10579 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10580 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10581 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10582 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10583 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10584 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10585 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10586 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10587 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10588 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10589 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4 10590 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10591 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10592 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10593 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10594 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10595 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10596 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10597 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 10598 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10599 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10600 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10601 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10602 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10603 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10604 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10605 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10606 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 10607 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10608 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10609 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10610 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10611 // CHECK17: omp.precond.then: 10612 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10613 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10614 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 10615 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10616 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 10617 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10618 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 10619 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 10620 // CHECK17-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 10621 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10622 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10623 // CHECK17-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10624 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 10625 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10626 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10627 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10628 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10629 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10630 // CHECK17: cond.true: 10631 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10632 // CHECK17-NEXT: br label [[COND_END:%.*]] 10633 // CHECK17: cond.false: 10634 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10635 // CHECK17-NEXT: br label [[COND_END]] 10636 // CHECK17: cond.end: 10637 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10638 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10639 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10640 // CHECK17-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 10641 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10642 // CHECK17: omp.inner.for.cond: 10643 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10644 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10645 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10646 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10647 // CHECK17: omp.inner.for.body: 10648 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10649 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 10650 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10651 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I5]], align 4 10652 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I5]], align 4 10653 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64 10654 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 10655 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 10656 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10657 // CHECK17: omp.body.continue: 10658 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10659 // CHECK17: omp.inner.for.inc: 10660 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10661 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1 10662 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 10663 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10664 // CHECK17: omp.inner.for.end: 10665 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10666 // CHECK17: omp.loop.exit: 10667 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10668 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 10669 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 10670 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10671 // CHECK17: omp.precond.end: 10672 // CHECK17-NEXT: ret void 10673 // 10674 // 10675 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 10676 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10677 // CHECK17-NEXT: entry: 10678 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10679 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10680 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10681 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10682 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10683 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10684 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10685 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10686 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10687 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10688 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 10689 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 10690 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]]) 10691 // CHECK17-NEXT: ret void 10692 // 10693 // 10694 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 10695 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10696 // CHECK17-NEXT: entry: 10697 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10698 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10699 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10700 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10701 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10702 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10703 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10704 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10705 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10706 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10707 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10708 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10709 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10710 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10711 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 10712 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10713 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10714 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10715 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10716 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10717 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10718 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10719 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10720 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10721 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 10722 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10723 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10724 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10725 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10726 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10727 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10728 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10729 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10730 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10731 // CHECK17: omp.precond.then: 10732 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10733 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10734 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 10735 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10736 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10737 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10738 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 10739 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10740 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10741 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10742 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 10743 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10744 // CHECK17: cond.true: 10745 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10746 // CHECK17-NEXT: br label [[COND_END:%.*]] 10747 // CHECK17: cond.false: 10748 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10749 // CHECK17-NEXT: br label [[COND_END]] 10750 // CHECK17: cond.end: 10751 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 10752 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10753 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10754 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 10755 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10756 // CHECK17: omp.inner.for.cond: 10757 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10758 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10759 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 10760 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10761 // CHECK17: omp.inner.for.body: 10762 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10763 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 10764 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10765 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10766 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 10767 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 10768 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 10769 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]]) 10770 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10771 // CHECK17: omp.inner.for.inc: 10772 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10773 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 10774 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 10775 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 10776 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10777 // CHECK17: omp.inner.for.end: 10778 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10779 // CHECK17: omp.loop.exit: 10780 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10781 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 10782 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 10783 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10784 // CHECK17: omp.precond.end: 10785 // CHECK17-NEXT: ret void 10786 // 10787 // 10788 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 10789 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10790 // CHECK17-NEXT: entry: 10791 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10792 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10793 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10794 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10795 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10796 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10797 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10798 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10799 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10800 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10801 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10802 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10803 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10804 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10805 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10806 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10807 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 10808 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10809 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10810 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10811 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10812 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10813 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10814 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10815 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10816 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10817 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10818 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 10819 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10820 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10821 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10822 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10823 // CHECK17-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10824 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10825 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10826 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10827 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10828 // CHECK17: omp.precond.then: 10829 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10830 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10831 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 10832 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 10833 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 10834 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 10835 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 10836 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 10837 // CHECK17-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 10838 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10839 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10840 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10841 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10842 // CHECK17-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10843 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 10844 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 10845 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10846 // CHECK17: omp.dispatch.cond: 10847 // CHECK17-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10848 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 10849 // CHECK17-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 10850 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 10851 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10852 // CHECK17: omp.dispatch.body: 10853 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10854 // CHECK17-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 10855 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10856 // CHECK17: omp.inner.for.cond: 10857 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 10858 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 10859 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10860 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10861 // CHECK17: omp.inner.for.body: 10862 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 10863 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10864 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10865 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]] 10866 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]] 10867 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10868 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 10869 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 10870 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10871 // CHECK17: omp.body.continue: 10872 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10873 // CHECK17: omp.inner.for.inc: 10874 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 10875 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 10876 // CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 10877 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 10878 // CHECK17: omp.inner.for.end: 10879 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10880 // CHECK17: omp.dispatch.inc: 10881 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 10882 // CHECK17: omp.dispatch.end: 10883 // CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10884 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 10885 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 10886 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10887 // CHECK17: omp.precond.end: 10888 // CHECK17-NEXT: ret void 10889 // 10890 // 10891 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 10892 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10893 // CHECK17-NEXT: entry: 10894 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10895 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10896 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10897 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10898 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10899 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10900 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10901 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10902 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10903 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 10904 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10905 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10906 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10907 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 10908 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8 10909 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10910 // CHECK17-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10911 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 10912 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]]) 10913 // CHECK17-NEXT: ret void 10914 // 10915 // 10916 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 10917 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10918 // CHECK17-NEXT: entry: 10919 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 10920 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 10921 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10922 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10923 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 10924 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10925 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10926 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10927 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10928 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10929 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10930 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10931 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10932 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10933 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10934 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 10935 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 10936 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10937 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 10938 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 10939 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 10940 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 10941 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 10942 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 10943 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 10944 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 10945 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 10946 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10947 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10948 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 10949 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10950 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10951 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 10952 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 10953 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10954 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 10955 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10956 // CHECK17: omp.precond.then: 10957 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10958 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10959 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 10960 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10961 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10962 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 10963 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 10964 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10965 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10966 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10967 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 10968 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10969 // CHECK17: cond.true: 10970 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 10971 // CHECK17-NEXT: br label [[COND_END:%.*]] 10972 // CHECK17: cond.false: 10973 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10974 // CHECK17-NEXT: br label [[COND_END]] 10975 // CHECK17: cond.end: 10976 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 10977 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10978 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10979 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 10980 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10981 // CHECK17: omp.inner.for.cond: 10982 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 10983 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10984 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 10985 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10986 // CHECK17: omp.inner.for.body: 10987 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10988 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64 10989 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10990 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10991 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4 10992 // CHECK17-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4 10993 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8 10994 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 10995 // CHECK17-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 10996 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 10997 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP22]]) 10998 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10999 // CHECK17: omp.inner.for.inc: 11000 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11001 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11002 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 11003 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 11004 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11005 // CHECK17: omp.inner.for.end: 11006 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11007 // CHECK17: omp.loop.exit: 11008 // CHECK17-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11009 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 11010 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 11011 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11012 // CHECK17: omp.precond.end: 11013 // CHECK17-NEXT: ret void 11014 // 11015 // 11016 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 11017 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11018 // CHECK17-NEXT: entry: 11019 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11020 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11021 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11022 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11023 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11024 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11025 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11026 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11027 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11028 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11029 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11030 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11031 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11032 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11033 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11034 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11035 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11036 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4 11037 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11038 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11039 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11040 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11041 // CHECK17-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 11042 // CHECK17-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 11043 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11044 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11045 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 11046 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11047 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 11048 // CHECK17-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11049 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11050 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 11051 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11052 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11053 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11054 // CHECK17-NEXT: store i32 0, ptr [[I]], align 4 11055 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11056 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 11057 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11058 // CHECK17: omp.precond.then: 11059 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11060 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11061 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 11062 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11063 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32 11064 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11065 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 11066 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11067 // CHECK17-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 11068 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11069 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11070 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11071 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11072 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11073 // CHECK17-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11074 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 11075 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 11076 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11077 // CHECK17: omp.dispatch.cond: 11078 // CHECK17-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11079 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 11080 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 11081 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 11082 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11083 // CHECK17: omp.dispatch.body: 11084 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11085 // CHECK17-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 11086 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11087 // CHECK17: omp.inner.for.cond: 11088 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 11089 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 11090 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11091 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11092 // CHECK17: omp.inner.for.body: 11093 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 11094 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11095 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11096 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]] 11097 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]] 11098 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 11099 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]] 11100 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 11101 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11102 // CHECK17: omp.body.continue: 11103 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11104 // CHECK17: omp.inner.for.inc: 11105 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 11106 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 11107 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 11108 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 11109 // CHECK17: omp.inner.for.end: 11110 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11111 // CHECK17: omp.dispatch.inc: 11112 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 11113 // CHECK17: omp.dispatch.end: 11114 // CHECK17-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11115 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 11116 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 11117 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 11118 // CHECK17: omp.precond.end: 11119 // CHECK17-NEXT: ret void 11120 // 11121 // 11122 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 11123 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 11124 // CHECK17-NEXT: entry: 11125 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 11126 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 11127 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 11128 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 11129 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 11130 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 11131 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11132 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 11133 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8 11134 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8 11135 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8 11136 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 11137 // CHECK17-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 11138 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11139 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11140 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8 11141 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8 11142 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8 11143 // CHECK17-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 11144 // CHECK17-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 11145 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8 11146 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8 11147 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8 11148 // CHECK17-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 11149 // CHECK17-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 11150 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 11151 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8 11152 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 8 11153 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 8 11154 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 8 11155 // CHECK17-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 11156 // CHECK17-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 11157 // CHECK17-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 11158 // CHECK17-NEXT: store i32 10, ptr [[M]], align 4 11159 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11160 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 11161 // CHECK17-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11162 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 11163 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 11164 // CHECK17-NEXT: store ptr null, ptr [[TMP2]], align 8 11165 // CHECK17-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11166 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11167 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 11168 // CHECK17-NEXT: store i32 3, ptr [[TMP5]], align 4 11169 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 11170 // CHECK17-NEXT: store i32 1, ptr [[TMP6]], align 4 11171 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 11172 // CHECK17-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 11173 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 11174 // CHECK17-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 11175 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 11176 // CHECK17-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 8 11177 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 11178 // CHECK17-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8 11179 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 11180 // CHECK17-NEXT: store ptr null, ptr [[TMP11]], align 8 11181 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 11182 // CHECK17-NEXT: store ptr null, ptr [[TMP12]], align 8 11183 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 11184 // CHECK17-NEXT: store i64 10, ptr [[TMP13]], align 8 11185 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 11186 // CHECK17-NEXT: store i64 0, ptr [[TMP14]], align 8 11187 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 11188 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 11189 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 11190 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 11191 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 11192 // CHECK17-NEXT: store i32 0, ptr [[TMP17]], align 4 11193 // CHECK17-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 11194 // CHECK17-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 11195 // CHECK17-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11196 // CHECK17: omp_offload.failed: 11197 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 11198 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 11199 // CHECK17: omp_offload.cont: 11200 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 11201 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP20]], align 8 11202 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 11203 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP21]], align 8 11204 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 11205 // CHECK17-NEXT: store ptr null, ptr [[TMP22]], align 8 11206 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 11207 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 11208 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 11209 // CHECK17-NEXT: store i32 3, ptr [[TMP25]], align 4 11210 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 11211 // CHECK17-NEXT: store i32 1, ptr [[TMP26]], align 4 11212 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 11213 // CHECK17-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 11214 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 11215 // CHECK17-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 11216 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 11217 // CHECK17-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 8 11218 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 11219 // CHECK17-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8 11220 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 11221 // CHECK17-NEXT: store ptr null, ptr [[TMP31]], align 8 11222 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 11223 // CHECK17-NEXT: store ptr null, ptr [[TMP32]], align 8 11224 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 11225 // CHECK17-NEXT: store i64 10, ptr [[TMP33]], align 8 11226 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 11227 // CHECK17-NEXT: store i64 0, ptr [[TMP34]], align 8 11228 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 11229 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 11230 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 11231 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 11232 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 11233 // CHECK17-NEXT: store i32 0, ptr [[TMP37]], align 4 11234 // CHECK17-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 11235 // CHECK17-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 11236 // CHECK17-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 11237 // CHECK17: omp_offload.failed6: 11238 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 11239 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT7]] 11240 // CHECK17: omp_offload.cont7: 11241 // CHECK17-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 11242 // CHECK17-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 11243 // CHECK17-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11244 // CHECK17-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 11245 // CHECK17-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 11246 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 11247 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP43]], align 8 11248 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 11249 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP44]], align 8 11250 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 11251 // CHECK17-NEXT: store ptr null, ptr [[TMP45]], align 8 11252 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 11253 // CHECK17-NEXT: store i64 [[TMP42]], ptr [[TMP46]], align 8 11254 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 11255 // CHECK17-NEXT: store i64 [[TMP42]], ptr [[TMP47]], align 8 11256 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 11257 // CHECK17-NEXT: store ptr null, ptr [[TMP48]], align 8 11258 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 11259 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 11260 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 11261 // CHECK17-NEXT: store i32 3, ptr [[TMP51]], align 4 11262 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 11263 // CHECK17-NEXT: store i32 2, ptr [[TMP52]], align 4 11264 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 11265 // CHECK17-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 8 11266 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 11267 // CHECK17-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 8 11268 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 11269 // CHECK17-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 8 11270 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 11271 // CHECK17-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 8 11272 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 11273 // CHECK17-NEXT: store ptr null, ptr [[TMP57]], align 8 11274 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 11275 // CHECK17-NEXT: store ptr null, ptr [[TMP58]], align 8 11276 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 11277 // CHECK17-NEXT: store i64 10, ptr [[TMP59]], align 8 11278 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 11279 // CHECK17-NEXT: store i64 0, ptr [[TMP60]], align 8 11280 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 11281 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 11282 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 11283 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 11284 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 11285 // CHECK17-NEXT: store i32 0, ptr [[TMP63]], align 4 11286 // CHECK17-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 11287 // CHECK17-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 11288 // CHECK17-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 11289 // CHECK17: omp_offload.failed13: 11290 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i64 [[TMP42]]) #[[ATTR3]] 11291 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT14]] 11292 // CHECK17: omp_offload.cont14: 11293 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 11294 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP66]], align 8 11295 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 11296 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP67]], align 8 11297 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0 11298 // CHECK17-NEXT: store ptr null, ptr [[TMP68]], align 8 11299 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 11300 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 11301 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 11302 // CHECK17-NEXT: store i32 3, ptr [[TMP71]], align 4 11303 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 11304 // CHECK17-NEXT: store i32 1, ptr [[TMP72]], align 4 11305 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 11306 // CHECK17-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 8 11307 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 11308 // CHECK17-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 8 11309 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 11310 // CHECK17-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 8 11311 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 11312 // CHECK17-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 8 11313 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 11314 // CHECK17-NEXT: store ptr null, ptr [[TMP77]], align 8 11315 // CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 11316 // CHECK17-NEXT: store ptr null, ptr [[TMP78]], align 8 11317 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 11318 // CHECK17-NEXT: store i64 10, ptr [[TMP79]], align 8 11319 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 11320 // CHECK17-NEXT: store i64 0, ptr [[TMP80]], align 8 11321 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 11322 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 11323 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 11324 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 11325 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 11326 // CHECK17-NEXT: store i32 0, ptr [[TMP83]], align 4 11327 // CHECK17-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 11328 // CHECK17-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 11329 // CHECK17-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 11330 // CHECK17: omp_offload.failed20: 11331 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 11332 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]] 11333 // CHECK17: omp_offload.cont21: 11334 // CHECK17-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 11335 // CHECK17-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 11336 // CHECK17-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 11337 // CHECK17-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 11338 // CHECK17-NEXT: [[TMP88:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 8 11339 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 11340 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP89]], align 8 11341 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 11342 // CHECK17-NEXT: store ptr [[A]], ptr [[TMP90]], align 8 11343 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 11344 // CHECK17-NEXT: store ptr null, ptr [[TMP91]], align 8 11345 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 11346 // CHECK17-NEXT: store i64 [[TMP88]], ptr [[TMP92]], align 8 11347 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 11348 // CHECK17-NEXT: store i64 [[TMP88]], ptr [[TMP93]], align 8 11349 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1 11350 // CHECK17-NEXT: store ptr null, ptr [[TMP94]], align 8 11351 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 11352 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 11353 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 11354 // CHECK17-NEXT: store i32 3, ptr [[TMP97]], align 4 11355 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 11356 // CHECK17-NEXT: store i32 2, ptr [[TMP98]], align 4 11357 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 11358 // CHECK17-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 8 11359 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 11360 // CHECK17-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 8 11361 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 11362 // CHECK17-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 8 11363 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 11364 // CHECK17-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 8 11365 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 11366 // CHECK17-NEXT: store ptr null, ptr [[TMP103]], align 8 11367 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 11368 // CHECK17-NEXT: store ptr null, ptr [[TMP104]], align 8 11369 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 11370 // CHECK17-NEXT: store i64 10, ptr [[TMP105]], align 8 11371 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 11372 // CHECK17-NEXT: store i64 0, ptr [[TMP106]], align 8 11373 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 11374 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 11375 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 11376 // CHECK17-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 11377 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 11378 // CHECK17-NEXT: store i32 0, ptr [[TMP109]], align 4 11379 // CHECK17-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 11380 // CHECK17-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 11381 // CHECK17-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 11382 // CHECK17: omp_offload.failed29: 11383 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i64 [[TMP88]]) #[[ATTR3]] 11384 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT30]] 11385 // CHECK17: omp_offload.cont30: 11386 // CHECK17-NEXT: ret i32 0 11387 // 11388 // 11389 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 11390 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11391 // CHECK17-NEXT: entry: 11392 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11393 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11394 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11395 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 11396 // CHECK17-NEXT: ret void 11397 // 11398 // 11399 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 11400 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11401 // CHECK17-NEXT: entry: 11402 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11403 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11404 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11405 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11406 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11407 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11408 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11409 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11410 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11411 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11412 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11413 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11414 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11415 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11416 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11417 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 11418 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11419 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11420 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11421 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 11422 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11423 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11424 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11425 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11426 // CHECK17: cond.true: 11427 // CHECK17-NEXT: br label [[COND_END:%.*]] 11428 // CHECK17: cond.false: 11429 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11430 // CHECK17-NEXT: br label [[COND_END]] 11431 // CHECK17: cond.end: 11432 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11433 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11434 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11435 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 11436 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11437 // CHECK17: omp.inner.for.cond: 11438 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11439 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11440 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11441 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11442 // CHECK17: omp.inner.for.body: 11443 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11444 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11445 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11446 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11447 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 11448 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11449 // CHECK17: omp.inner.for.inc: 11450 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11451 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11452 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11453 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 11454 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11455 // CHECK17: omp.inner.for.end: 11456 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11457 // CHECK17: omp.loop.exit: 11458 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 11459 // CHECK17-NEXT: ret void 11460 // 11461 // 11462 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 11463 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11464 // CHECK17-NEXT: entry: 11465 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11466 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11467 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11468 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11469 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11470 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11471 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11472 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11473 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11474 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11475 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11476 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11477 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11478 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11479 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11480 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11481 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11482 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11483 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11484 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 11485 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11486 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11487 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11488 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11489 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11490 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 11491 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11492 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11493 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11494 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 11495 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11496 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11497 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 11498 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11499 // CHECK17: cond.true: 11500 // CHECK17-NEXT: br label [[COND_END:%.*]] 11501 // CHECK17: cond.false: 11502 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11503 // CHECK17-NEXT: br label [[COND_END]] 11504 // CHECK17: cond.end: 11505 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 11506 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11507 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11508 // CHECK17-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 11509 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11510 // CHECK17: omp.inner.for.cond: 11511 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11512 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11513 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 11514 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11515 // CHECK17: omp.inner.for.body: 11516 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11517 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 11518 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11519 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4 11520 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 11521 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 11522 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 11523 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 11524 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11525 // CHECK17: omp.body.continue: 11526 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11527 // CHECK17: omp.inner.for.inc: 11528 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11529 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 11530 // CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 11531 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11532 // CHECK17: omp.inner.for.end: 11533 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11534 // CHECK17: omp.loop.exit: 11535 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 11536 // CHECK17-NEXT: ret void 11537 // 11538 // 11539 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 11540 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11541 // CHECK17-NEXT: entry: 11542 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11543 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11544 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11545 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 11546 // CHECK17-NEXT: ret void 11547 // 11548 // 11549 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 11550 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11551 // CHECK17-NEXT: entry: 11552 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11553 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11554 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11555 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11556 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11557 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11558 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11559 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11560 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11561 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11562 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11563 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11564 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11565 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11566 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11567 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 11568 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11569 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11570 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11571 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 11572 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11573 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11574 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11575 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11576 // CHECK17: cond.true: 11577 // CHECK17-NEXT: br label [[COND_END:%.*]] 11578 // CHECK17: cond.false: 11579 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11580 // CHECK17-NEXT: br label [[COND_END]] 11581 // CHECK17: cond.end: 11582 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11583 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11584 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11585 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 11586 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11587 // CHECK17: omp.inner.for.cond: 11588 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11589 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11590 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11591 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11592 // CHECK17: omp.inner.for.body: 11593 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11594 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11595 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11596 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11597 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 11598 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11599 // CHECK17: omp.inner.for.inc: 11600 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11601 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11602 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11603 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 11604 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11605 // CHECK17: omp.inner.for.end: 11606 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11607 // CHECK17: omp.loop.exit: 11608 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 11609 // CHECK17-NEXT: ret void 11610 // 11611 // 11612 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 11613 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11614 // CHECK17-NEXT: entry: 11615 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11616 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11617 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11618 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11619 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11620 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11621 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11622 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11623 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11624 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11625 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11626 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11627 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11628 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11629 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11630 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11631 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11632 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11633 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11634 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 11635 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11636 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11637 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11638 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11639 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11640 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 11641 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11642 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11643 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11644 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 11645 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11646 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11647 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 11648 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11649 // CHECK17: cond.true: 11650 // CHECK17-NEXT: br label [[COND_END:%.*]] 11651 // CHECK17: cond.false: 11652 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11653 // CHECK17-NEXT: br label [[COND_END]] 11654 // CHECK17: cond.end: 11655 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 11656 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11657 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11658 // CHECK17-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 11659 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11660 // CHECK17: omp.inner.for.cond: 11661 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11662 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11663 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 11664 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11665 // CHECK17: omp.inner.for.body: 11666 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11667 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 11668 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11669 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4 11670 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 11671 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 11672 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 11673 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 11674 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11675 // CHECK17: omp.body.continue: 11676 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11677 // CHECK17: omp.inner.for.inc: 11678 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11679 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 11680 // CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 11681 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11682 // CHECK17: omp.inner.for.end: 11683 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11684 // CHECK17: omp.loop.exit: 11685 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 11686 // CHECK17-NEXT: ret void 11687 // 11688 // 11689 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 11690 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11691 // CHECK17-NEXT: entry: 11692 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11693 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11694 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11695 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11696 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11697 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11698 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11699 // CHECK17-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 11700 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 11701 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 11702 // CHECK17-NEXT: ret void 11703 // 11704 // 11705 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 11706 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11707 // CHECK17-NEXT: entry: 11708 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11709 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11710 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11711 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11712 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11713 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11714 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11715 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11716 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11717 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11718 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11719 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11720 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11721 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11722 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11723 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11724 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11725 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11726 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 11727 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11728 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11729 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11730 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 11731 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11732 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11733 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11734 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11735 // CHECK17: cond.true: 11736 // CHECK17-NEXT: br label [[COND_END:%.*]] 11737 // CHECK17: cond.false: 11738 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11739 // CHECK17-NEXT: br label [[COND_END]] 11740 // CHECK17: cond.end: 11741 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11742 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11743 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11744 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 11745 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11746 // CHECK17: omp.inner.for.cond: 11747 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11748 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11749 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11750 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11751 // CHECK17: omp.inner.for.body: 11752 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11753 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11754 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11755 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11756 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11757 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 11758 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 11759 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]) 11760 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11761 // CHECK17: omp.inner.for.inc: 11762 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11763 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11764 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 11765 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 11766 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11767 // CHECK17: omp.inner.for.end: 11768 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11769 // CHECK17: omp.loop.exit: 11770 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 11771 // CHECK17-NEXT: ret void 11772 // 11773 // 11774 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 11775 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11776 // CHECK17-NEXT: entry: 11777 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11778 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11779 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11780 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11781 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11782 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11783 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11784 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11785 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11786 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11787 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11788 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11789 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11790 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11791 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11792 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11793 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11794 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11795 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 11796 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11797 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11798 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 11799 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11800 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11801 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11802 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11803 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11804 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 11805 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11806 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11807 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11808 // CHECK17-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11809 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 11810 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 11811 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11812 // CHECK17: omp.dispatch.cond: 11813 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11814 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11815 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32 11816 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]] 11817 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11818 // CHECK17: cond.true: 11819 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11820 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 11821 // CHECK17-NEXT: br label [[COND_END:%.*]] 11822 // CHECK17: cond.false: 11823 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11824 // CHECK17-NEXT: br label [[COND_END]] 11825 // CHECK17: cond.end: 11826 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 11827 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11828 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11829 // CHECK17-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 11830 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11831 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11832 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 11833 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11834 // CHECK17: omp.dispatch.body: 11835 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11836 // CHECK17: omp.inner.for.cond: 11837 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11838 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11839 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 11840 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11841 // CHECK17: omp.inner.for.body: 11842 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11843 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 11844 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11845 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4 11846 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4 11847 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 11848 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 11849 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 11850 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11851 // CHECK17: omp.body.continue: 11852 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11853 // CHECK17: omp.inner.for.inc: 11854 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11855 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 11856 // CHECK17-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 11857 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11858 // CHECK17: omp.inner.for.end: 11859 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11860 // CHECK17: omp.dispatch.inc: 11861 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11862 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11863 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 11864 // CHECK17-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4 11865 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11866 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11867 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 11868 // CHECK17-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4 11869 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 11870 // CHECK17: omp.dispatch.end: 11871 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 11872 // CHECK17-NEXT: ret void 11873 // 11874 // 11875 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 11876 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11877 // CHECK17-NEXT: entry: 11878 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11879 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11880 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11881 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 11882 // CHECK17-NEXT: ret void 11883 // 11884 // 11885 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 11886 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11887 // CHECK17-NEXT: entry: 11888 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11889 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11890 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11891 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11892 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11893 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11894 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11895 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11896 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11897 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11898 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11899 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11900 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11901 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11902 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11903 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 11904 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11905 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11906 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11907 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 11908 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11909 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11910 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11911 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11912 // CHECK17: cond.true: 11913 // CHECK17-NEXT: br label [[COND_END:%.*]] 11914 // CHECK17: cond.false: 11915 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11916 // CHECK17-NEXT: br label [[COND_END]] 11917 // CHECK17: cond.end: 11918 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11919 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11920 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11921 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 11922 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11923 // CHECK17: omp.inner.for.cond: 11924 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11925 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11926 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11927 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11928 // CHECK17: omp.inner.for.body: 11929 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11930 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11931 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11932 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11933 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]) 11934 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11935 // CHECK17: omp.inner.for.inc: 11936 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11937 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11938 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11939 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 11940 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11941 // CHECK17: omp.inner.for.end: 11942 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11943 // CHECK17: omp.loop.exit: 11944 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 11945 // CHECK17-NEXT: ret void 11946 // 11947 // 11948 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 11949 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11950 // CHECK17-NEXT: entry: 11951 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 11952 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 11953 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11954 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11955 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 11956 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11957 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11958 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11959 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11960 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11961 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11962 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11963 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 11964 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 11965 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11966 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11967 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 11968 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 11969 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11970 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 11971 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 11972 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11973 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 11974 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11975 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 11976 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 11977 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11978 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11979 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11980 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11981 // CHECK17-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 11982 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 11983 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 11984 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11985 // CHECK17: omp.dispatch.cond: 11986 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 11987 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 11988 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11989 // CHECK17: omp.dispatch.body: 11990 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11991 // CHECK17-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 11992 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11993 // CHECK17: omp.inner.for.cond: 11994 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 11995 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 11996 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 11997 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11998 // CHECK17: omp.inner.for.body: 11999 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 12000 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 12001 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12002 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 12003 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]] 12004 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 12005 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 12006 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]] 12007 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12008 // CHECK17: omp.body.continue: 12009 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12010 // CHECK17: omp.inner.for.inc: 12011 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 12012 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 12013 // CHECK17-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 12014 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 12015 // CHECK17: omp.inner.for.end: 12016 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12017 // CHECK17: omp.dispatch.inc: 12018 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 12019 // CHECK17: omp.dispatch.end: 12020 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 12021 // CHECK17-NEXT: ret void 12022 // 12023 // 12024 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 12025 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12026 // CHECK17-NEXT: entry: 12027 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12028 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12029 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12030 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12031 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12032 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12033 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 12034 // CHECK17-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12035 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 12036 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i64 [[TMP2]]) 12037 // CHECK17-NEXT: ret void 12038 // 12039 // 12040 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 12041 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12042 // CHECK17-NEXT: entry: 12043 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12044 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12045 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12046 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12047 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12048 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12049 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12050 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12051 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12052 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12053 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12054 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12055 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12056 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12057 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12058 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12059 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12060 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12061 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 12062 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12063 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12064 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12065 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 12066 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12067 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12068 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12069 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12070 // CHECK17: cond.true: 12071 // CHECK17-NEXT: br label [[COND_END:%.*]] 12072 // CHECK17: cond.false: 12073 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12074 // CHECK17-NEXT: br label [[COND_END]] 12075 // CHECK17: cond.end: 12076 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12077 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12078 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12079 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 12080 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12081 // CHECK17: omp.inner.for.cond: 12082 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12083 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12084 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12085 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12086 // CHECK17: omp.inner.for.body: 12087 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12088 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12089 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12090 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12091 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 12092 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12093 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 12094 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]]) 12095 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12096 // CHECK17: omp.inner.for.inc: 12097 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12098 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 12099 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 12100 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 12101 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 12102 // CHECK17: omp.inner.for.end: 12103 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12104 // CHECK17: omp.loop.exit: 12105 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 12106 // CHECK17-NEXT: ret void 12107 // 12108 // 12109 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 12110 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12111 // CHECK17-NEXT: entry: 12112 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 12113 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 12114 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12115 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12116 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 12117 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12118 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12119 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 12120 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12121 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12122 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12123 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12124 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 12125 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 12126 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 12127 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12128 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12129 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 12130 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 12131 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 12132 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12133 // CHECK17-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 12134 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 12135 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 12136 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 12137 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 12138 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 12139 // CHECK17-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 12140 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12141 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12142 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 12143 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12144 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12145 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 12146 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 12147 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 12148 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12149 // CHECK17: omp.dispatch.cond: 12150 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 12151 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 12152 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12153 // CHECK17: omp.dispatch.body: 12154 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12155 // CHECK17-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 12156 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12157 // CHECK17: omp.inner.for.cond: 12158 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 12159 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 12160 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 12161 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12162 // CHECK17: omp.inner.for.body: 12163 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 12164 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 12165 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12166 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 12167 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]] 12168 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 12169 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 12170 // CHECK17-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]] 12171 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12172 // CHECK17: omp.body.continue: 12173 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12174 // CHECK17: omp.inner.for.inc: 12175 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 12176 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1 12177 // CHECK17-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 12178 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 12179 // CHECK17: omp.inner.for.end: 12180 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12181 // CHECK17: omp.dispatch.inc: 12182 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 12183 // CHECK17: omp.dispatch.end: 12184 // CHECK17-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 12185 // CHECK17-NEXT: ret void 12186 // 12187 // 12188 // CHECK19-LABEL: define {{[^@]+}}@main 12189 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 12190 // CHECK19-NEXT: entry: 12191 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 12192 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 12193 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 12194 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4 12195 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 12196 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 12197 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 12198 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12199 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 12200 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 12201 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 12202 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 12203 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12204 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12205 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12206 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 12207 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 12208 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4 12209 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4 12210 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4 12211 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 12212 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 12213 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 12214 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 12215 // CHECK19-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12216 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 12217 // CHECK19-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4 12218 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 12219 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4 12220 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4 12221 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4 12222 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4 12223 // CHECK19-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 12224 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 12225 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 12226 // CHECK19-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12227 // CHECK19-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4 12228 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 4 12229 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 4 12230 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 4 12231 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4 12232 // CHECK19-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 12233 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 12234 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 12235 // CHECK19-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12236 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4 12237 // CHECK19-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4 12238 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4 12239 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 4 12240 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 4 12241 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 4 12242 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4 12243 // CHECK19-NEXT: [[_TMP56:%.*]] = alloca i32, align 4 12244 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4 12245 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 12246 // CHECK19-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12247 // CHECK19-NEXT: store i32 0, ptr [[RETVAL]], align 4 12248 // CHECK19-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 12249 // CHECK19-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 12250 // CHECK19-NEXT: store i32 100, ptr [[N]], align 4 12251 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 12252 // CHECK19-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0() 12253 // CHECK19-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4 12254 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 12255 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 12256 // CHECK19-NEXT: store i32 10, ptr [[M]], align 4 12257 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4 12258 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 12259 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 12260 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 12261 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 12262 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false) 12263 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12264 // CHECK19-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4 12265 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12266 // CHECK19-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4 12267 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 12268 // CHECK19-NEXT: store ptr null, ptr [[TMP8]], align 4 12269 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 12270 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4 12271 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 12272 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4 12273 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 12274 // CHECK19-NEXT: store ptr null, ptr [[TMP11]], align 4 12275 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 12276 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4 12277 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 12278 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4 12279 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2 12280 // CHECK19-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4 12281 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 12282 // CHECK19-NEXT: store ptr null, ptr [[TMP15]], align 4 12283 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12284 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12285 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 12286 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 12287 // CHECK19-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 12288 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12289 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 12290 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12291 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12292 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12293 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12294 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 12295 // CHECK19-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 12296 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 12297 // CHECK19-NEXT: store i32 3, ptr [[TMP23]], align 4 12298 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 12299 // CHECK19-NEXT: store i32 3, ptr [[TMP24]], align 4 12300 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 12301 // CHECK19-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4 12302 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 12303 // CHECK19-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4 12304 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 12305 // CHECK19-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4 12306 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 12307 // CHECK19-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 12308 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 12309 // CHECK19-NEXT: store ptr null, ptr [[TMP29]], align 4 12310 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 12311 // CHECK19-NEXT: store ptr null, ptr [[TMP30]], align 4 12312 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 12313 // CHECK19-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 12314 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 12315 // CHECK19-NEXT: store i64 0, ptr [[TMP32]], align 8 12316 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 12317 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 12318 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 12319 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 12320 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 12321 // CHECK19-NEXT: store i32 0, ptr [[TMP35]], align 4 12322 // CHECK19-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]]) 12323 // CHECK19-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 12324 // CHECK19-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12325 // CHECK19: omp_offload.failed: 12326 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 12327 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 12328 // CHECK19: omp_offload.cont: 12329 // CHECK19-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 12330 // CHECK19-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 12331 // CHECK19-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 12332 // CHECK19-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4 12333 // CHECK19-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64 12334 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false) 12335 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12336 // CHECK19-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4 12337 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12338 // CHECK19-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 12339 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 12340 // CHECK19-NEXT: store ptr null, ptr [[TMP44]], align 4 12341 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 12342 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4 12343 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 12344 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4 12345 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 12346 // CHECK19-NEXT: store ptr null, ptr [[TMP47]], align 4 12347 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 12348 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4 12349 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 12350 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4 12351 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 12352 // CHECK19-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4 12353 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 12354 // CHECK19-NEXT: store ptr null, ptr [[TMP51]], align 4 12355 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12356 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12357 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 12358 // CHECK19-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4 12359 // CHECK19-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4 12360 // CHECK19-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 12361 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0 12362 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 12363 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 12364 // CHECK19-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4 12365 // CHECK19-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4 12366 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1 12367 // CHECK19-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64 12368 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0 12369 // CHECK19-NEXT: store i32 3, ptr [[TMP59]], align 4 12370 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1 12371 // CHECK19-NEXT: store i32 3, ptr [[TMP60]], align 4 12372 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2 12373 // CHECK19-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4 12374 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3 12375 // CHECK19-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4 12376 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4 12377 // CHECK19-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4 12378 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5 12379 // CHECK19-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4 12380 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6 12381 // CHECK19-NEXT: store ptr null, ptr [[TMP65]], align 4 12382 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7 12383 // CHECK19-NEXT: store ptr null, ptr [[TMP66]], align 4 12384 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8 12385 // CHECK19-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8 12386 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9 12387 // CHECK19-NEXT: store i64 0, ptr [[TMP68]], align 8 12388 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10 12389 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4 12390 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11 12391 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4 12392 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12 12393 // CHECK19-NEXT: store i32 0, ptr [[TMP71]], align 4 12394 // CHECK19-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]]) 12395 // CHECK19-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0 12396 // CHECK19-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 12397 // CHECK19: omp_offload.failed16: 12398 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 12399 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]] 12400 // CHECK19: omp_offload.cont17: 12401 // CHECK19-NEXT: [[TMP74:%.*]] = load i32, ptr [[M]], align 4 12402 // CHECK19-NEXT: store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4 12403 // CHECK19-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4 12404 // CHECK19-NEXT: store i32 [[TMP75]], ptr [[N_CASTED19]], align 4 12405 // CHECK19-NEXT: [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4 12406 // CHECK19-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4 12407 // CHECK19-NEXT: store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12408 // CHECK19-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 12409 // CHECK19-NEXT: [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4 12410 // CHECK19-NEXT: [[TMP80:%.*]] = sext i32 [[TMP79]] to i64 12411 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false) 12412 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 12413 // CHECK19-NEXT: store i32 [[TMP76]], ptr [[TMP81]], align 4 12414 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 12415 // CHECK19-NEXT: store i32 [[TMP76]], ptr [[TMP82]], align 4 12416 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 12417 // CHECK19-NEXT: store ptr null, ptr [[TMP83]], align 4 12418 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 12419 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP84]], align 4 12420 // CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 12421 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP85]], align 4 12422 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 12423 // CHECK19-NEXT: store ptr null, ptr [[TMP86]], align 4 12424 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2 12425 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 4 12426 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2 12427 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 4 12428 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2 12429 // CHECK19-NEXT: store i64 [[TMP80]], ptr [[TMP89]], align 4 12430 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2 12431 // CHECK19-NEXT: store ptr null, ptr [[TMP90]], align 4 12432 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3 12433 // CHECK19-NEXT: store i32 [[TMP78]], ptr [[TMP91]], align 4 12434 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3 12435 // CHECK19-NEXT: store i32 [[TMP78]], ptr [[TMP92]], align 4 12436 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3 12437 // CHECK19-NEXT: store ptr null, ptr [[TMP93]], align 4 12438 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 12439 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 12440 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0 12441 // CHECK19-NEXT: [[TMP97:%.*]] = load i32, ptr [[N]], align 4 12442 // CHECK19-NEXT: store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4 12443 // CHECK19-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4 12444 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0 12445 // CHECK19-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 12446 // CHECK19-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1 12447 // CHECK19-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4 12448 // CHECK19-NEXT: [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4 12449 // CHECK19-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1 12450 // CHECK19-NEXT: [[TMP100:%.*]] = zext i32 [[ADD30]] to i64 12451 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0 12452 // CHECK19-NEXT: store i32 3, ptr [[TMP101]], align 4 12453 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1 12454 // CHECK19-NEXT: store i32 4, ptr [[TMP102]], align 4 12455 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2 12456 // CHECK19-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4 12457 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3 12458 // CHECK19-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4 12459 // CHECK19-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4 12460 // CHECK19-NEXT: store ptr [[TMP96]], ptr [[TMP105]], align 4 12461 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5 12462 // CHECK19-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4 12463 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6 12464 // CHECK19-NEXT: store ptr null, ptr [[TMP107]], align 4 12465 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7 12466 // CHECK19-NEXT: store ptr null, ptr [[TMP108]], align 4 12467 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8 12468 // CHECK19-NEXT: store i64 [[TMP100]], ptr [[TMP109]], align 8 12469 // CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9 12470 // CHECK19-NEXT: store i64 0, ptr [[TMP110]], align 8 12471 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10 12472 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4 12473 // CHECK19-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11 12474 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4 12475 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12 12476 // CHECK19-NEXT: store i32 0, ptr [[TMP113]], align 4 12477 // CHECK19-NEXT: [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]]) 12478 // CHECK19-NEXT: [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0 12479 // CHECK19-NEXT: br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 12480 // CHECK19: omp_offload.failed32: 12481 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]] 12482 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT33]] 12483 // CHECK19: omp_offload.cont33: 12484 // CHECK19-NEXT: [[TMP116:%.*]] = load i32, ptr [[N]], align 4 12485 // CHECK19-NEXT: store i32 [[TMP116]], ptr [[N_CASTED34]], align 4 12486 // CHECK19-NEXT: [[TMP117:%.*]] = load i32, ptr [[N_CASTED34]], align 4 12487 // CHECK19-NEXT: [[TMP118:%.*]] = mul nuw i32 [[TMP0]], 4 12488 // CHECK19-NEXT: [[TMP119:%.*]] = sext i32 [[TMP118]] to i64 12489 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES38]], ptr align 4 @.offload_sizes.5, i32 24, i1 false) 12490 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 12491 // CHECK19-NEXT: store i32 [[TMP117]], ptr [[TMP120]], align 4 12492 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 12493 // CHECK19-NEXT: store i32 [[TMP117]], ptr [[TMP121]], align 4 12494 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0 12495 // CHECK19-NEXT: store ptr null, ptr [[TMP122]], align 4 12496 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1 12497 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP123]], align 4 12498 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1 12499 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP124]], align 4 12500 // CHECK19-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1 12501 // CHECK19-NEXT: store ptr null, ptr [[TMP125]], align 4 12502 // CHECK19-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2 12503 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP126]], align 4 12504 // CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2 12505 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP127]], align 4 12506 // CHECK19-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2 12507 // CHECK19-NEXT: store i64 [[TMP119]], ptr [[TMP128]], align 4 12508 // CHECK19-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2 12509 // CHECK19-NEXT: store ptr null, ptr [[TMP129]], align 4 12510 // CHECK19-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0 12511 // CHECK19-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0 12512 // CHECK19-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0 12513 // CHECK19-NEXT: [[TMP133:%.*]] = load i32, ptr [[N]], align 4 12514 // CHECK19-NEXT: store i32 [[TMP133]], ptr [[DOTCAPTURE_EXPR_40]], align 4 12515 // CHECK19-NEXT: [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4 12516 // CHECK19-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP134]], 0 12517 // CHECK19-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 12518 // CHECK19-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 12519 // CHECK19-NEXT: store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4 12520 // CHECK19-NEXT: [[TMP135:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4 12521 // CHECK19-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP135]], 1 12522 // CHECK19-NEXT: [[TMP136:%.*]] = zext i32 [[ADD45]] to i64 12523 // CHECK19-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0 12524 // CHECK19-NEXT: store i32 3, ptr [[TMP137]], align 4 12525 // CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1 12526 // CHECK19-NEXT: store i32 3, ptr [[TMP138]], align 4 12527 // CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2 12528 // CHECK19-NEXT: store ptr [[TMP130]], ptr [[TMP139]], align 4 12529 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3 12530 // CHECK19-NEXT: store ptr [[TMP131]], ptr [[TMP140]], align 4 12531 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4 12532 // CHECK19-NEXT: store ptr [[TMP132]], ptr [[TMP141]], align 4 12533 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5 12534 // CHECK19-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP142]], align 4 12535 // CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6 12536 // CHECK19-NEXT: store ptr null, ptr [[TMP143]], align 4 12537 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7 12538 // CHECK19-NEXT: store ptr null, ptr [[TMP144]], align 4 12539 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8 12540 // CHECK19-NEXT: store i64 [[TMP136]], ptr [[TMP145]], align 8 12541 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9 12542 // CHECK19-NEXT: store i64 0, ptr [[TMP146]], align 8 12543 // CHECK19-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10 12544 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4 12545 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11 12546 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP148]], align 4 12547 // CHECK19-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12 12548 // CHECK19-NEXT: store i32 0, ptr [[TMP149]], align 4 12549 // CHECK19-NEXT: [[TMP150:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]]) 12550 // CHECK19-NEXT: [[TMP151:%.*]] = icmp ne i32 [[TMP150]], 0 12551 // CHECK19-NEXT: br i1 [[TMP151]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 12552 // CHECK19: omp_offload.failed47: 12553 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP117]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]] 12554 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT48]] 12555 // CHECK19: omp_offload.cont48: 12556 // CHECK19-NEXT: [[TMP152:%.*]] = load i32, ptr [[M]], align 4 12557 // CHECK19-NEXT: store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR_49]], align 4 12558 // CHECK19-NEXT: [[TMP153:%.*]] = load i32, ptr [[N]], align 4 12559 // CHECK19-NEXT: store i32 [[TMP153]], ptr [[N_CASTED50]], align 4 12560 // CHECK19-NEXT: [[TMP154:%.*]] = load i32, ptr [[N_CASTED50]], align 4 12561 // CHECK19-NEXT: [[TMP155:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4 12562 // CHECK19-NEXT: store i32 [[TMP155]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 12563 // CHECK19-NEXT: [[TMP156:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4 12564 // CHECK19-NEXT: [[TMP157:%.*]] = mul nuw i32 [[TMP0]], 4 12565 // CHECK19-NEXT: [[TMP158:%.*]] = sext i32 [[TMP157]] to i64 12566 // CHECK19-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES55]], ptr align 4 @.offload_sizes.7, i32 32, i1 false) 12567 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 12568 // CHECK19-NEXT: store i32 [[TMP154]], ptr [[TMP159]], align 4 12569 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 12570 // CHECK19-NEXT: store i32 [[TMP154]], ptr [[TMP160]], align 4 12571 // CHECK19-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0 12572 // CHECK19-NEXT: store ptr null, ptr [[TMP161]], align 4 12573 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1 12574 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP162]], align 4 12575 // CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1 12576 // CHECK19-NEXT: store i32 [[TMP0]], ptr [[TMP163]], align 4 12577 // CHECK19-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1 12578 // CHECK19-NEXT: store ptr null, ptr [[TMP164]], align 4 12579 // CHECK19-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2 12580 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP165]], align 4 12581 // CHECK19-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2 12582 // CHECK19-NEXT: store ptr [[VLA]], ptr [[TMP166]], align 4 12583 // CHECK19-NEXT: [[TMP167:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2 12584 // CHECK19-NEXT: store i64 [[TMP158]], ptr [[TMP167]], align 4 12585 // CHECK19-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2 12586 // CHECK19-NEXT: store ptr null, ptr [[TMP168]], align 4 12587 // CHECK19-NEXT: [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3 12588 // CHECK19-NEXT: store i32 [[TMP156]], ptr [[TMP169]], align 4 12589 // CHECK19-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3 12590 // CHECK19-NEXT: store i32 [[TMP156]], ptr [[TMP170]], align 4 12591 // CHECK19-NEXT: [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3 12592 // CHECK19-NEXT: store ptr null, ptr [[TMP171]], align 4 12593 // CHECK19-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0 12594 // CHECK19-NEXT: [[TMP173:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0 12595 // CHECK19-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0 12596 // CHECK19-NEXT: [[TMP175:%.*]] = load i32, ptr [[N]], align 4 12597 // CHECK19-NEXT: store i32 [[TMP175]], ptr [[DOTCAPTURE_EXPR_57]], align 4 12598 // CHECK19-NEXT: [[TMP176:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4 12599 // CHECK19-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP176]], 0 12600 // CHECK19-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1 12601 // CHECK19-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1 12602 // CHECK19-NEXT: store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4 12603 // CHECK19-NEXT: [[TMP177:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4 12604 // CHECK19-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP177]], 1 12605 // CHECK19-NEXT: [[TMP178:%.*]] = zext i32 [[ADD62]] to i64 12606 // CHECK19-NEXT: [[TMP179:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0 12607 // CHECK19-NEXT: store i32 3, ptr [[TMP179]], align 4 12608 // CHECK19-NEXT: [[TMP180:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1 12609 // CHECK19-NEXT: store i32 4, ptr [[TMP180]], align 4 12610 // CHECK19-NEXT: [[TMP181:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2 12611 // CHECK19-NEXT: store ptr [[TMP172]], ptr [[TMP181]], align 4 12612 // CHECK19-NEXT: [[TMP182:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3 12613 // CHECK19-NEXT: store ptr [[TMP173]], ptr [[TMP182]], align 4 12614 // CHECK19-NEXT: [[TMP183:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4 12615 // CHECK19-NEXT: store ptr [[TMP174]], ptr [[TMP183]], align 4 12616 // CHECK19-NEXT: [[TMP184:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5 12617 // CHECK19-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP184]], align 4 12618 // CHECK19-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6 12619 // CHECK19-NEXT: store ptr null, ptr [[TMP185]], align 4 12620 // CHECK19-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7 12621 // CHECK19-NEXT: store ptr null, ptr [[TMP186]], align 4 12622 // CHECK19-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8 12623 // CHECK19-NEXT: store i64 [[TMP178]], ptr [[TMP187]], align 8 12624 // CHECK19-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9 12625 // CHECK19-NEXT: store i64 0, ptr [[TMP188]], align 8 12626 // CHECK19-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10 12627 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP189]], align 4 12628 // CHECK19-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11 12629 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP190]], align 4 12630 // CHECK19-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12 12631 // CHECK19-NEXT: store i32 0, ptr [[TMP191]], align 4 12632 // CHECK19-NEXT: [[TMP192:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]]) 12633 // CHECK19-NEXT: [[TMP193:%.*]] = icmp ne i32 [[TMP192]], 0 12634 // CHECK19-NEXT: br i1 [[TMP193]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 12635 // CHECK19: omp_offload.failed64: 12636 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP156]]) #[[ATTR3]] 12637 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT65]] 12638 // CHECK19: omp_offload.cont65: 12639 // CHECK19-NEXT: [[TMP194:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 12640 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP194]]) 12641 // CHECK19-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 12642 // CHECK19-NEXT: [[TMP195:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 12643 // CHECK19-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP195]]) 12644 // CHECK19-NEXT: [[TMP196:%.*]] = load i32, ptr [[RETVAL]], align 4 12645 // CHECK19-NEXT: ret i32 [[TMP196]] 12646 // 12647 // 12648 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139 12649 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 12650 // CHECK19-NEXT: entry: 12651 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12652 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12653 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12654 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12655 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12656 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 12657 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12658 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 12659 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12660 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12661 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 12662 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 12663 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 12664 // CHECK19-NEXT: ret void 12665 // 12666 // 12667 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined 12668 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12669 // CHECK19-NEXT: entry: 12670 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12671 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12672 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12673 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12674 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12675 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12676 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12677 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12678 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12679 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12680 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12681 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12682 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12683 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12684 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 12685 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12686 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12687 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12688 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12689 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 12690 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12691 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 12692 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12693 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12694 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 12695 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12696 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 12697 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12698 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12699 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12700 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 12701 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12702 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 12703 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12704 // CHECK19: omp.precond.then: 12705 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12706 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12707 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 12708 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12709 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12710 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12711 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 12712 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12713 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12714 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12715 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 12716 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12717 // CHECK19: cond.true: 12718 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12719 // CHECK19-NEXT: br label [[COND_END:%.*]] 12720 // CHECK19: cond.false: 12721 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12722 // CHECK19-NEXT: br label [[COND_END]] 12723 // CHECK19: cond.end: 12724 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 12725 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12726 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12727 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 12728 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12729 // CHECK19: omp.inner.for.cond: 12730 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12731 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12732 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 12733 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12734 // CHECK19: omp.inner.for.body: 12735 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12736 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12737 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 12738 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 12739 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 12740 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]) 12741 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12742 // CHECK19: omp.inner.for.inc: 12743 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12744 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 12745 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 12746 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 12747 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12748 // CHECK19: omp.inner.for.end: 12749 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12750 // CHECK19: omp.loop.exit: 12751 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12752 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 12753 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 12754 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12755 // CHECK19: omp.precond.end: 12756 // CHECK19-NEXT: ret void 12757 // 12758 // 12759 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined 12760 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12761 // CHECK19-NEXT: entry: 12762 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12763 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12764 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12765 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12766 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12767 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12768 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12769 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12770 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12771 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12772 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12773 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12774 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12775 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12776 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12777 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12778 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 12779 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12780 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12781 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 12782 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 12783 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12784 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 12785 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12786 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 12787 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12788 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12789 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 12790 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12791 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 12792 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12793 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12794 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12795 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 12796 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12797 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 12798 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12799 // CHECK19: omp.precond.then: 12800 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12801 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12802 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 12803 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 12804 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 12805 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 12806 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 12807 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12808 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12809 // CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12810 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 12811 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12812 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12813 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12814 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 12815 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12816 // CHECK19: cond.true: 12817 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12818 // CHECK19-NEXT: br label [[COND_END:%.*]] 12819 // CHECK19: cond.false: 12820 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12821 // CHECK19-NEXT: br label [[COND_END]] 12822 // CHECK19: cond.end: 12823 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 12824 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 12825 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12826 // CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 12827 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12828 // CHECK19: omp.inner.for.cond: 12829 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12830 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12831 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 12832 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12833 // CHECK19: omp.inner.for.body: 12834 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12835 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 12836 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12837 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 12838 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4 12839 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 12840 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 12841 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12842 // CHECK19: omp.body.continue: 12843 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12844 // CHECK19: omp.inner.for.inc: 12845 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12846 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 12847 // CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 12848 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12849 // CHECK19: omp.inner.for.end: 12850 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12851 // CHECK19: omp.loop.exit: 12852 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12853 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 12854 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 12855 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12856 // CHECK19: omp.precond.end: 12857 // CHECK19-NEXT: ret void 12858 // 12859 // 12860 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143 12861 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12862 // CHECK19-NEXT: entry: 12863 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12864 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12865 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12866 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12867 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12868 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 12869 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12870 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 12871 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12872 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12873 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 12874 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 12875 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 12876 // CHECK19-NEXT: ret void 12877 // 12878 // 12879 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined 12880 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12881 // CHECK19-NEXT: entry: 12882 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12883 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12884 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12885 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12886 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12887 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12888 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12889 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12890 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12891 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12892 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12893 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12894 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12895 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12896 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 12897 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12898 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12899 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12900 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12901 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 12902 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12903 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 12904 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12905 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 12906 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 12907 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12908 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 12909 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12910 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12911 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12912 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 12913 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12914 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 12915 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12916 // CHECK19: omp.precond.then: 12917 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12918 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12919 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 12920 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12921 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12922 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12923 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 12924 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12925 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12926 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12927 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 12928 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12929 // CHECK19: cond.true: 12930 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12931 // CHECK19-NEXT: br label [[COND_END:%.*]] 12932 // CHECK19: cond.false: 12933 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12934 // CHECK19-NEXT: br label [[COND_END]] 12935 // CHECK19: cond.end: 12936 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 12937 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12938 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12939 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 12940 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12941 // CHECK19: omp.inner.for.cond: 12942 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12943 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12944 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 12945 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12946 // CHECK19: omp.inner.for.body: 12947 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12948 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12949 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 12950 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 12951 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 12952 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]) 12953 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12954 // CHECK19: omp.inner.for.inc: 12955 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 12956 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 12957 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 12958 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 12959 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12960 // CHECK19: omp.inner.for.end: 12961 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12962 // CHECK19: omp.loop.exit: 12963 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12964 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 12965 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 12966 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12967 // CHECK19: omp.precond.end: 12968 // CHECK19-NEXT: ret void 12969 // 12970 // 12971 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined 12972 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12973 // CHECK19-NEXT: entry: 12974 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12975 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12976 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12977 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12978 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12979 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12980 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12981 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12982 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12983 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12984 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12985 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12986 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12987 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12988 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12989 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12990 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 12991 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12992 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12993 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 12994 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 12995 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12996 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 12997 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12998 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 12999 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13000 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13001 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 13002 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13003 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13004 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13005 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13006 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13007 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13008 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13009 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13010 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13011 // CHECK19: omp.precond.then: 13012 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13013 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13014 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 13015 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13016 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13017 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 13018 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13019 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13020 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13021 // CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13022 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 13023 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13024 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13025 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13026 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13027 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13028 // CHECK19: cond.true: 13029 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13030 // CHECK19-NEXT: br label [[COND_END:%.*]] 13031 // CHECK19: cond.false: 13032 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13033 // CHECK19-NEXT: br label [[COND_END]] 13034 // CHECK19: cond.end: 13035 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13036 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13037 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13038 // CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 13039 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13040 // CHECK19: omp.inner.for.cond: 13041 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13042 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13043 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 13044 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13045 // CHECK19: omp.inner.for.body: 13046 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13047 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 13048 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13049 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 13050 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I3]], align 4 13051 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 13052 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 13053 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13054 // CHECK19: omp.body.continue: 13055 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13056 // CHECK19: omp.inner.for.inc: 13057 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13058 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1 13059 // CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 13060 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13061 // CHECK19: omp.inner.for.end: 13062 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13063 // CHECK19: omp.loop.exit: 13064 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13065 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 13066 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 13067 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13068 // CHECK19: omp.precond.end: 13069 // CHECK19-NEXT: ret void 13070 // 13071 // 13072 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147 13073 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13074 // CHECK19-NEXT: entry: 13075 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13076 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13077 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13078 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13079 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13080 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13081 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13082 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13083 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13084 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13085 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13086 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13087 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13088 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 13089 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 13090 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13091 // CHECK19-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13092 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13093 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 13094 // CHECK19-NEXT: ret void 13095 // 13096 // 13097 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined 13098 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13099 // CHECK19-NEXT: entry: 13100 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13101 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13102 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13103 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13104 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13105 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13106 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13107 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13108 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13109 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13110 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13111 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13112 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13113 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13114 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13115 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 13116 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13117 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13118 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13119 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13120 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13121 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13122 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13123 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13124 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13125 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13126 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13127 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13128 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13129 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13130 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13131 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13132 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 13133 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13134 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13135 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13136 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13137 // CHECK19: omp.precond.then: 13138 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13139 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13140 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 13141 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13142 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13143 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13144 // CHECK19-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13145 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 13146 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 13147 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13148 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13149 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 13150 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13151 // CHECK19: cond.true: 13152 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13153 // CHECK19-NEXT: br label [[COND_END:%.*]] 13154 // CHECK19: cond.false: 13155 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13156 // CHECK19-NEXT: br label [[COND_END]] 13157 // CHECK19: cond.end: 13158 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 13159 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13160 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13161 // CHECK19-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 13162 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13163 // CHECK19: omp.inner.for.cond: 13164 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13165 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13166 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1 13167 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]] 13168 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13169 // CHECK19: omp.inner.for.body: 13170 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13171 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13172 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 13173 // CHECK19-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 13174 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4 13175 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13176 // CHECK19-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13177 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13178 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP21]]) 13179 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13180 // CHECK19: omp.inner.for.inc: 13181 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13182 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13183 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 13184 // CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 13185 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13186 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13187 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 13188 // CHECK19-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4 13189 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13190 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13191 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 13192 // CHECK19-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4 13193 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13194 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13195 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]] 13196 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 13197 // CHECK19: cond.true11: 13198 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13199 // CHECK19-NEXT: br label [[COND_END13:%.*]] 13200 // CHECK19: cond.false12: 13201 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13202 // CHECK19-NEXT: br label [[COND_END13]] 13203 // CHECK19: cond.end13: 13204 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ] 13205 // CHECK19-NEXT: store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4 13206 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13207 // CHECK19-NEXT: store i32 [[TMP32]], ptr [[DOTOMP_IV]], align 4 13208 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13209 // CHECK19: omp.inner.for.end: 13210 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13211 // CHECK19: omp.loop.exit: 13212 // CHECK19-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13213 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 13214 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP34]]) 13215 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13216 // CHECK19: omp.precond.end: 13217 // CHECK19-NEXT: ret void 13218 // 13219 // 13220 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined 13221 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13222 // CHECK19-NEXT: entry: 13223 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13224 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13225 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13226 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13227 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13228 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13229 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13230 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13231 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13232 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13233 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13234 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13235 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13236 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13237 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13238 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13239 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13240 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 13241 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13242 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13243 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13244 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13245 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13246 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13247 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13248 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13249 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13250 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13251 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13252 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13253 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13254 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13255 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13256 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13257 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 13258 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13259 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13260 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13261 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13262 // CHECK19: omp.precond.then: 13263 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13264 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13265 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 13266 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13267 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13268 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 13269 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13270 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13271 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13272 // CHECK19-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13273 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 13274 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13275 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13276 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13277 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13278 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13279 // CHECK19: cond.true: 13280 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13281 // CHECK19-NEXT: br label [[COND_END:%.*]] 13282 // CHECK19: cond.false: 13283 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13284 // CHECK19-NEXT: br label [[COND_END]] 13285 // CHECK19: cond.end: 13286 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13287 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13288 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13289 // CHECK19-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 13290 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13291 // CHECK19: omp.inner.for.cond: 13292 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13293 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13294 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 13295 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13296 // CHECK19: omp.inner.for.body: 13297 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13298 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 13299 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13300 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 13301 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I4]], align 4 13302 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]] 13303 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 13304 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13305 // CHECK19: omp.body.continue: 13306 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13307 // CHECK19: omp.inner.for.inc: 13308 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13309 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1 13310 // CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 13311 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13312 // CHECK19: omp.inner.for.end: 13313 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13314 // CHECK19: omp.loop.exit: 13315 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13316 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 13317 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]]) 13318 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13319 // CHECK19: omp.precond.end: 13320 // CHECK19-NEXT: ret void 13321 // 13322 // 13323 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151 13324 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13325 // CHECK19-NEXT: entry: 13326 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13327 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13328 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13329 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13330 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13331 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13332 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13333 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13334 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13335 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13336 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 13337 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 13338 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]]) 13339 // CHECK19-NEXT: ret void 13340 // 13341 // 13342 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined 13343 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13344 // CHECK19-NEXT: entry: 13345 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13346 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13347 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13348 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13349 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13350 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13351 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13352 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13353 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13354 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13355 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13356 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13357 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13358 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13359 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 13360 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13361 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13362 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13363 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13364 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13365 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13366 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13367 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13368 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13369 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 13370 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13371 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13372 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13373 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13374 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13375 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13376 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13377 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13378 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13379 // CHECK19: omp.precond.then: 13380 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13381 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13382 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 13383 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13384 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13385 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13386 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 13387 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13388 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13389 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13390 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 13391 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13392 // CHECK19: cond.true: 13393 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13394 // CHECK19-NEXT: br label [[COND_END:%.*]] 13395 // CHECK19: cond.false: 13396 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13397 // CHECK19-NEXT: br label [[COND_END]] 13398 // CHECK19: cond.end: 13399 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 13400 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13401 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13402 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 13403 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13404 // CHECK19: omp.inner.for.cond: 13405 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13406 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13407 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 13408 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13409 // CHECK19: omp.inner.for.body: 13410 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13411 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13412 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 13413 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 13414 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 13415 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]]) 13416 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13417 // CHECK19: omp.inner.for.inc: 13418 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13419 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13420 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 13421 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 13422 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13423 // CHECK19: omp.inner.for.end: 13424 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13425 // CHECK19: omp.loop.exit: 13426 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13427 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 13428 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 13429 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13430 // CHECK19: omp.precond.end: 13431 // CHECK19-NEXT: ret void 13432 // 13433 // 13434 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined 13435 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13436 // CHECK19-NEXT: entry: 13437 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13438 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13439 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13440 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13441 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13442 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13443 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13444 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13445 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13446 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13447 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13448 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13449 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13450 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13451 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13452 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13453 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 13454 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13455 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13456 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13457 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13458 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13459 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13460 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13461 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13462 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13463 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13464 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4 13465 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13466 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13467 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13468 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13469 // CHECK19-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13470 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13471 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13472 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13473 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13474 // CHECK19: omp.precond.then: 13475 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13476 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13477 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 13478 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13479 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13480 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 13481 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13482 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13483 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13484 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13485 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13486 // CHECK19-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13487 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 13488 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1) 13489 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13490 // CHECK19: omp.dispatch.cond: 13491 // CHECK19-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13492 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 13493 // CHECK19-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 13494 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0 13495 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13496 // CHECK19: omp.dispatch.body: 13497 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13498 // CHECK19-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4 13499 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13500 // CHECK19: omp.inner.for.cond: 13501 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 13502 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 13503 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 13504 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13505 // CHECK19: omp.inner.for.body: 13506 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 13507 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 13508 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13509 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]] 13510 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]] 13511 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]] 13512 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]] 13513 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13514 // CHECK19: omp.body.continue: 13515 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13516 // CHECK19: omp.inner.for.inc: 13517 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 13518 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1 13519 // CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 13520 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 13521 // CHECK19: omp.inner.for.end: 13522 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13523 // CHECK19: omp.dispatch.inc: 13524 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 13525 // CHECK19: omp.dispatch.end: 13526 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13527 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 13528 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP22]]) 13529 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13530 // CHECK19: omp.precond.end: 13531 // CHECK19-NEXT: ret void 13532 // 13533 // 13534 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155 13535 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13536 // CHECK19-NEXT: entry: 13537 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13538 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13539 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13540 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13541 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13542 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13543 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13544 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13545 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13546 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13547 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13548 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13549 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13550 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4 13551 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4 13552 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13553 // CHECK19-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13554 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13555 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]]) 13556 // CHECK19-NEXT: ret void 13557 // 13558 // 13559 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined 13560 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13561 // CHECK19-NEXT: entry: 13562 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13563 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13564 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13565 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13566 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13567 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13568 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13569 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13570 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13571 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13572 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13573 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13574 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13575 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13576 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13577 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 13578 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 13579 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13580 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13581 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13582 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13583 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13584 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13585 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13586 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13587 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13588 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13589 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13590 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13591 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13592 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13593 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13594 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 13595 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13596 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13597 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13598 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13599 // CHECK19: omp.precond.then: 13600 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13601 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13602 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4 13603 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13604 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13605 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13606 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 13607 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13608 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13609 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13610 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 13611 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13612 // CHECK19: cond.true: 13613 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13614 // CHECK19-NEXT: br label [[COND_END:%.*]] 13615 // CHECK19: cond.false: 13616 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13617 // CHECK19-NEXT: br label [[COND_END]] 13618 // CHECK19: cond.end: 13619 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 13620 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13621 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13622 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 13623 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13624 // CHECK19: omp.inner.for.cond: 13625 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13626 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13627 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 13628 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13629 // CHECK19: omp.inner.for.body: 13630 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13631 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13632 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4 13633 // CHECK19-NEXT: store i32 [[TMP17]], ptr [[N_CASTED]], align 4 13634 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4 13635 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13636 // CHECK19-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13637 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13638 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP20]]) 13639 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13640 // CHECK19: omp.inner.for.inc: 13641 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13642 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13643 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 13644 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 13645 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13646 // CHECK19: omp.inner.for.end: 13647 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13648 // CHECK19: omp.loop.exit: 13649 // CHECK19-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13650 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 13651 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 13652 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13653 // CHECK19: omp.precond.end: 13654 // CHECK19-NEXT: ret void 13655 // 13656 // 13657 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined 13658 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13659 // CHECK19-NEXT: entry: 13660 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13661 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13662 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13663 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13664 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13665 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13666 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13667 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13668 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13669 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13670 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13671 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13672 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13673 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13674 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13675 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13676 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13677 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 13678 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13679 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13680 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13681 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13682 // CHECK19-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13683 // CHECK19-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 13684 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13685 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13686 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 13687 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13688 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 13689 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13690 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13691 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 13692 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13693 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13694 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 13695 // CHECK19-NEXT: store i32 0, ptr [[I]], align 4 13696 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13697 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 13698 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13699 // CHECK19: omp.precond.then: 13700 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13701 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13702 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4 13703 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13704 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13705 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4 13706 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13707 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13708 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13709 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13710 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13711 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13712 // CHECK19-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13713 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 13714 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]]) 13715 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13716 // CHECK19: omp.dispatch.cond: 13717 // CHECK19-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13718 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 13719 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 13720 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 13721 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13722 // CHECK19: omp.dispatch.body: 13723 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13724 // CHECK19-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 13725 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13726 // CHECK19: omp.inner.for.cond: 13727 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 13728 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 13729 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13730 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13731 // CHECK19: omp.inner.for.body: 13732 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 13733 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13734 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13735 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]] 13736 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]] 13737 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP20]] 13738 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]] 13739 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13740 // CHECK19: omp.body.continue: 13741 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13742 // CHECK19: omp.inner.for.inc: 13743 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 13744 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 13745 // CHECK19-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 13746 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 13747 // CHECK19: omp.inner.for.end: 13748 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13749 // CHECK19: omp.dispatch.inc: 13750 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 13751 // CHECK19: omp.dispatch.end: 13752 // CHECK19-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13753 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 13754 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP23]]) 13755 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 13756 // CHECK19: omp.precond.end: 13757 // CHECK19-NEXT: ret void 13758 // 13759 // 13760 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 13761 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 13762 // CHECK19-NEXT: entry: 13763 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 13764 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 13765 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 13766 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 13767 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 13768 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 13769 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13770 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 13771 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4 13772 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4 13773 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4 13774 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 13775 // CHECK19-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13776 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13777 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13778 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4 13779 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4 13780 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4 13781 // CHECK19-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 13782 // CHECK19-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13783 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4 13784 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4 13785 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4 13786 // CHECK19-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 13787 // CHECK19-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13788 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 13789 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4 13790 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 4 13791 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 4 13792 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 4 13793 // CHECK19-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 13794 // CHECK19-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 13795 // CHECK19-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 13796 // CHECK19-NEXT: store i32 10, ptr [[M]], align 4 13797 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13798 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 13799 // CHECK19-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13800 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 13801 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 13802 // CHECK19-NEXT: store ptr null, ptr [[TMP2]], align 4 13803 // CHECK19-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13804 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13805 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 13806 // CHECK19-NEXT: store i32 3, ptr [[TMP5]], align 4 13807 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 13808 // CHECK19-NEXT: store i32 1, ptr [[TMP6]], align 4 13809 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 13810 // CHECK19-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 13811 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 13812 // CHECK19-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 13813 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 13814 // CHECK19-NEXT: store ptr @.offload_sizes.9, ptr [[TMP9]], align 4 13815 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 13816 // CHECK19-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4 13817 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 13818 // CHECK19-NEXT: store ptr null, ptr [[TMP11]], align 4 13819 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 13820 // CHECK19-NEXT: store ptr null, ptr [[TMP12]], align 4 13821 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 13822 // CHECK19-NEXT: store i64 10, ptr [[TMP13]], align 8 13823 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 13824 // CHECK19-NEXT: store i64 0, ptr [[TMP14]], align 8 13825 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 13826 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 13827 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 13828 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 13829 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 13830 // CHECK19-NEXT: store i32 0, ptr [[TMP17]], align 4 13831 // CHECK19-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]]) 13832 // CHECK19-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 13833 // CHECK19-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13834 // CHECK19: omp_offload.failed: 13835 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]] 13836 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 13837 // CHECK19: omp_offload.cont: 13838 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 13839 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP20]], align 4 13840 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 13841 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP21]], align 4 13842 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 13843 // CHECK19-NEXT: store ptr null, ptr [[TMP22]], align 4 13844 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 13845 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 13846 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 13847 // CHECK19-NEXT: store i32 3, ptr [[TMP25]], align 4 13848 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 13849 // CHECK19-NEXT: store i32 1, ptr [[TMP26]], align 4 13850 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 13851 // CHECK19-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 13852 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 13853 // CHECK19-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 13854 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 13855 // CHECK19-NEXT: store ptr @.offload_sizes.11, ptr [[TMP29]], align 4 13856 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 13857 // CHECK19-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4 13858 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 13859 // CHECK19-NEXT: store ptr null, ptr [[TMP31]], align 4 13860 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 13861 // CHECK19-NEXT: store ptr null, ptr [[TMP32]], align 4 13862 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 13863 // CHECK19-NEXT: store i64 10, ptr [[TMP33]], align 8 13864 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 13865 // CHECK19-NEXT: store i64 0, ptr [[TMP34]], align 8 13866 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 13867 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 13868 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 13869 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 13870 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 13871 // CHECK19-NEXT: store i32 0, ptr [[TMP37]], align 4 13872 // CHECK19-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]]) 13873 // CHECK19-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 13874 // CHECK19-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 13875 // CHECK19: omp_offload.failed6: 13876 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]] 13877 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT7]] 13878 // CHECK19: omp_offload.cont7: 13879 // CHECK19-NEXT: [[TMP40:%.*]] = load i32, ptr [[M]], align 4 13880 // CHECK19-NEXT: store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4 13881 // CHECK19-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13882 // CHECK19-NEXT: store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13883 // CHECK19-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 13884 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 13885 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP43]], align 4 13886 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 13887 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP44]], align 4 13888 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 13889 // CHECK19-NEXT: store ptr null, ptr [[TMP45]], align 4 13890 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 13891 // CHECK19-NEXT: store i32 [[TMP42]], ptr [[TMP46]], align 4 13892 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 13893 // CHECK19-NEXT: store i32 [[TMP42]], ptr [[TMP47]], align 4 13894 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 13895 // CHECK19-NEXT: store ptr null, ptr [[TMP48]], align 4 13896 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 13897 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 13898 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0 13899 // CHECK19-NEXT: store i32 3, ptr [[TMP51]], align 4 13900 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1 13901 // CHECK19-NEXT: store i32 2, ptr [[TMP52]], align 4 13902 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2 13903 // CHECK19-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 4 13904 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3 13905 // CHECK19-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 4 13906 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4 13907 // CHECK19-NEXT: store ptr @.offload_sizes.13, ptr [[TMP55]], align 4 13908 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5 13909 // CHECK19-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP56]], align 4 13910 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6 13911 // CHECK19-NEXT: store ptr null, ptr [[TMP57]], align 4 13912 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7 13913 // CHECK19-NEXT: store ptr null, ptr [[TMP58]], align 4 13914 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8 13915 // CHECK19-NEXT: store i64 10, ptr [[TMP59]], align 8 13916 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9 13917 // CHECK19-NEXT: store i64 0, ptr [[TMP60]], align 8 13918 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10 13919 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4 13920 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11 13921 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4 13922 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12 13923 // CHECK19-NEXT: store i32 0, ptr [[TMP63]], align 4 13924 // CHECK19-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]]) 13925 // CHECK19-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0 13926 // CHECK19-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]] 13927 // CHECK19: omp_offload.failed13: 13928 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i32 [[TMP42]]) #[[ATTR3]] 13929 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT14]] 13930 // CHECK19: omp_offload.cont14: 13931 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 13932 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP66]], align 4 13933 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 13934 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP67]], align 4 13935 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0 13936 // CHECK19-NEXT: store ptr null, ptr [[TMP68]], align 4 13937 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0 13938 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0 13939 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0 13940 // CHECK19-NEXT: store i32 3, ptr [[TMP71]], align 4 13941 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1 13942 // CHECK19-NEXT: store i32 1, ptr [[TMP72]], align 4 13943 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2 13944 // CHECK19-NEXT: store ptr [[TMP69]], ptr [[TMP73]], align 4 13945 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3 13946 // CHECK19-NEXT: store ptr [[TMP70]], ptr [[TMP74]], align 4 13947 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4 13948 // CHECK19-NEXT: store ptr @.offload_sizes.15, ptr [[TMP75]], align 4 13949 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5 13950 // CHECK19-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP76]], align 4 13951 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6 13952 // CHECK19-NEXT: store ptr null, ptr [[TMP77]], align 4 13953 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7 13954 // CHECK19-NEXT: store ptr null, ptr [[TMP78]], align 4 13955 // CHECK19-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8 13956 // CHECK19-NEXT: store i64 10, ptr [[TMP79]], align 8 13957 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9 13958 // CHECK19-NEXT: store i64 0, ptr [[TMP80]], align 8 13959 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10 13960 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4 13961 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11 13962 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4 13963 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12 13964 // CHECK19-NEXT: store i32 0, ptr [[TMP83]], align 4 13965 // CHECK19-NEXT: [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]]) 13966 // CHECK19-NEXT: [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0 13967 // CHECK19-NEXT: br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]] 13968 // CHECK19: omp_offload.failed20: 13969 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]] 13970 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT21]] 13971 // CHECK19: omp_offload.cont21: 13972 // CHECK19-NEXT: [[TMP86:%.*]] = load i32, ptr [[M]], align 4 13973 // CHECK19-NEXT: store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4 13974 // CHECK19-NEXT: [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 13975 // CHECK19-NEXT: store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 13976 // CHECK19-NEXT: [[TMP88:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4 13977 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 13978 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP89]], align 4 13979 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 13980 // CHECK19-NEXT: store ptr [[A]], ptr [[TMP90]], align 4 13981 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 13982 // CHECK19-NEXT: store ptr null, ptr [[TMP91]], align 4 13983 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1 13984 // CHECK19-NEXT: store i32 [[TMP88]], ptr [[TMP92]], align 4 13985 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1 13986 // CHECK19-NEXT: store i32 [[TMP88]], ptr [[TMP93]], align 4 13987 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1 13988 // CHECK19-NEXT: store ptr null, ptr [[TMP94]], align 4 13989 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 13990 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 13991 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 13992 // CHECK19-NEXT: store i32 3, ptr [[TMP97]], align 4 13993 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 13994 // CHECK19-NEXT: store i32 2, ptr [[TMP98]], align 4 13995 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 13996 // CHECK19-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 4 13997 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 13998 // CHECK19-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 4 13999 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 14000 // CHECK19-NEXT: store ptr @.offload_sizes.17, ptr [[TMP101]], align 4 14001 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 14002 // CHECK19-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP102]], align 4 14003 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 14004 // CHECK19-NEXT: store ptr null, ptr [[TMP103]], align 4 14005 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 14006 // CHECK19-NEXT: store ptr null, ptr [[TMP104]], align 4 14007 // CHECK19-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 14008 // CHECK19-NEXT: store i64 10, ptr [[TMP105]], align 8 14009 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 14010 // CHECK19-NEXT: store i64 0, ptr [[TMP106]], align 8 14011 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 14012 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4 14013 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 14014 // CHECK19-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4 14015 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 14016 // CHECK19-NEXT: store i32 0, ptr [[TMP109]], align 4 14017 // CHECK19-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]]) 14018 // CHECK19-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0 14019 // CHECK19-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 14020 // CHECK19: omp_offload.failed29: 14021 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i32 [[TMP88]]) #[[ATTR3]] 14022 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]] 14023 // CHECK19: omp_offload.cont30: 14024 // CHECK19-NEXT: ret i32 0 14025 // 14026 // 14027 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112 14028 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14029 // CHECK19-NEXT: entry: 14030 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14031 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14032 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14033 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]]) 14034 // CHECK19-NEXT: ret void 14035 // 14036 // 14037 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined 14038 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14039 // CHECK19-NEXT: entry: 14040 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14041 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14042 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14043 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14044 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14045 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14046 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14047 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14048 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14049 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14050 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14051 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14052 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14053 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14054 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14055 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 14056 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14057 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14058 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14059 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 14060 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14061 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14062 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14063 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14064 // CHECK19: cond.true: 14065 // CHECK19-NEXT: br label [[COND_END:%.*]] 14066 // CHECK19: cond.false: 14067 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14068 // CHECK19-NEXT: br label [[COND_END]] 14069 // CHECK19: cond.end: 14070 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14071 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14072 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14073 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 14074 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14075 // CHECK19: omp.inner.for.cond: 14076 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14077 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14078 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14079 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14080 // CHECK19: omp.inner.for.body: 14081 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14082 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14083 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 14084 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14085 // CHECK19: omp.inner.for.inc: 14086 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14087 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14088 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14089 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 14090 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14091 // CHECK19: omp.inner.for.end: 14092 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14093 // CHECK19: omp.loop.exit: 14094 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 14095 // CHECK19-NEXT: ret void 14096 // 14097 // 14098 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined 14099 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14100 // CHECK19-NEXT: entry: 14101 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14102 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14103 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14104 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14105 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14106 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14107 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14108 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14109 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14110 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14111 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14112 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14113 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14114 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14115 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14116 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14117 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14118 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14119 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14120 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 14121 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14122 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14123 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 14124 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 14125 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14126 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14127 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14128 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 14129 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14130 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14131 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 14132 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14133 // CHECK19: cond.true: 14134 // CHECK19-NEXT: br label [[COND_END:%.*]] 14135 // CHECK19: cond.false: 14136 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14137 // CHECK19-NEXT: br label [[COND_END]] 14138 // CHECK19: cond.end: 14139 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 14140 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 14141 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14142 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 14143 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14144 // CHECK19: omp.inner.for.cond: 14145 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14146 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14147 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 14148 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14149 // CHECK19: omp.inner.for.body: 14150 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14151 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 14152 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14153 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4 14154 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 14155 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 14156 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 14157 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14158 // CHECK19: omp.body.continue: 14159 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14160 // CHECK19: omp.inner.for.inc: 14161 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14162 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 14163 // CHECK19-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 14164 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14165 // CHECK19: omp.inner.for.end: 14166 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14167 // CHECK19: omp.loop.exit: 14168 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 14169 // CHECK19-NEXT: ret void 14170 // 14171 // 14172 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 14173 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14174 // CHECK19-NEXT: entry: 14175 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14176 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14177 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14178 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]]) 14179 // CHECK19-NEXT: ret void 14180 // 14181 // 14182 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined 14183 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14184 // CHECK19-NEXT: entry: 14185 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14186 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14187 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14188 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14189 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14190 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14191 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14192 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14193 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14194 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14195 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14196 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14197 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14198 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14199 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14200 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 14201 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14202 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14203 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14204 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 14205 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14206 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14207 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14208 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14209 // CHECK19: cond.true: 14210 // CHECK19-NEXT: br label [[COND_END:%.*]] 14211 // CHECK19: cond.false: 14212 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14213 // CHECK19-NEXT: br label [[COND_END]] 14214 // CHECK19: cond.end: 14215 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14216 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14217 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14218 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 14219 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14220 // CHECK19: omp.inner.for.cond: 14221 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14222 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14223 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14224 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14225 // CHECK19: omp.inner.for.body: 14226 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14227 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14228 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 14229 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14230 // CHECK19: omp.inner.for.inc: 14231 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14232 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14233 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14234 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 14235 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14236 // CHECK19: omp.inner.for.end: 14237 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14238 // CHECK19: omp.loop.exit: 14239 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 14240 // CHECK19-NEXT: ret void 14241 // 14242 // 14243 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined 14244 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14245 // CHECK19-NEXT: entry: 14246 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14247 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14248 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14249 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14250 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14251 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14252 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14253 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14254 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14255 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14256 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14257 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14258 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14259 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14260 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14261 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14262 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14263 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14264 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14265 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 14266 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14267 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14268 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 14269 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 14270 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14271 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14272 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14273 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 14274 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14275 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14276 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 14277 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14278 // CHECK19: cond.true: 14279 // CHECK19-NEXT: br label [[COND_END:%.*]] 14280 // CHECK19: cond.false: 14281 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14282 // CHECK19-NEXT: br label [[COND_END]] 14283 // CHECK19: cond.end: 14284 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 14285 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 14286 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14287 // CHECK19-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 14288 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14289 // CHECK19: omp.inner.for.cond: 14290 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14291 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14292 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 14293 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14294 // CHECK19: omp.inner.for.body: 14295 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14296 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 14297 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14298 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4 14299 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 14300 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]] 14301 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 14302 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14303 // CHECK19: omp.body.continue: 14304 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14305 // CHECK19: omp.inner.for.inc: 14306 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14307 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 14308 // CHECK19-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4 14309 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14310 // CHECK19: omp.inner.for.end: 14311 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14312 // CHECK19: omp.loop.exit: 14313 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 14314 // CHECK19-NEXT: ret void 14315 // 14316 // 14317 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120 14318 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14319 // CHECK19-NEXT: entry: 14320 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14321 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14322 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14323 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14324 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14325 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14326 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14327 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14328 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14329 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 14330 // CHECK19-NEXT: ret void 14331 // 14332 // 14333 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined 14334 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14335 // CHECK19-NEXT: entry: 14336 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14337 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14338 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14339 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14340 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14341 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14342 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14343 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14344 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14345 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14346 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14347 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14348 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14349 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14350 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14351 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14352 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14353 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14354 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 14355 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14356 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14357 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14358 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 14359 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14360 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14361 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14362 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14363 // CHECK19: cond.true: 14364 // CHECK19-NEXT: br label [[COND_END:%.*]] 14365 // CHECK19: cond.false: 14366 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14367 // CHECK19-NEXT: br label [[COND_END]] 14368 // CHECK19: cond.end: 14369 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14370 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14371 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14372 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 14373 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14374 // CHECK19: omp.inner.for.cond: 14375 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14376 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14377 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14378 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14379 // CHECK19: omp.inner.for.body: 14380 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14381 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14382 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14383 // CHECK19-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14384 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14385 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]) 14386 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14387 // CHECK19: omp.inner.for.inc: 14388 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14389 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14390 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 14391 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 14392 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14393 // CHECK19: omp.inner.for.end: 14394 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14395 // CHECK19: omp.loop.exit: 14396 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 14397 // CHECK19-NEXT: ret void 14398 // 14399 // 14400 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined 14401 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14402 // CHECK19-NEXT: entry: 14403 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14404 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14405 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14406 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14407 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14408 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14409 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14410 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14411 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14412 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14413 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14414 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14415 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14416 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14417 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14418 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14419 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14420 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14421 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14422 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14423 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14424 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 14425 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14426 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14427 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 14428 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 14429 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14430 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14431 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14432 // CHECK19-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14433 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 14434 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 14435 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14436 // CHECK19: omp.dispatch.cond: 14437 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14438 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14439 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 14440 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14441 // CHECK19: cond.true: 14442 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14443 // CHECK19-NEXT: br label [[COND_END:%.*]] 14444 // CHECK19: cond.false: 14445 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14446 // CHECK19-NEXT: br label [[COND_END]] 14447 // CHECK19: cond.end: 14448 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 14449 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 14450 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14451 // CHECK19-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4 14452 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14453 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14454 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 14455 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14456 // CHECK19: omp.dispatch.body: 14457 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14458 // CHECK19: omp.inner.for.cond: 14459 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14460 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14461 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 14462 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14463 // CHECK19: omp.inner.for.body: 14464 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14465 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 14466 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14467 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4 14468 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4 14469 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]] 14470 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 14471 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14472 // CHECK19: omp.body.continue: 14473 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14474 // CHECK19: omp.inner.for.inc: 14475 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14476 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 14477 // CHECK19-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 14478 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14479 // CHECK19: omp.inner.for.end: 14480 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14481 // CHECK19: omp.dispatch.inc: 14482 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14483 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14484 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 14485 // CHECK19-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4 14486 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14487 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14488 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 14489 // CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4 14490 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 14491 // CHECK19: omp.dispatch.end: 14492 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]]) 14493 // CHECK19-NEXT: ret void 14494 // 14495 // 14496 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124 14497 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14498 // CHECK19-NEXT: entry: 14499 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14500 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14501 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14502 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]]) 14503 // CHECK19-NEXT: ret void 14504 // 14505 // 14506 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined 14507 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14508 // CHECK19-NEXT: entry: 14509 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14510 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14511 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14512 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14513 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14514 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14515 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14516 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14517 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14518 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14519 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14520 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14521 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14522 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14523 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14524 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 14525 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14526 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14527 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14528 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 14529 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14530 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14531 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14532 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14533 // CHECK19: cond.true: 14534 // CHECK19-NEXT: br label [[COND_END:%.*]] 14535 // CHECK19: cond.false: 14536 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14537 // CHECK19-NEXT: br label [[COND_END]] 14538 // CHECK19: cond.end: 14539 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14540 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14541 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14542 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 14543 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14544 // CHECK19: omp.inner.for.cond: 14545 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14546 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14547 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14548 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14549 // CHECK19: omp.inner.for.body: 14550 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14551 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14552 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]) 14553 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14554 // CHECK19: omp.inner.for.inc: 14555 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14556 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14557 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14558 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 14559 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14560 // CHECK19: omp.inner.for.end: 14561 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14562 // CHECK19: omp.loop.exit: 14563 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 14564 // CHECK19-NEXT: ret void 14565 // 14566 // 14567 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined 14568 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14569 // CHECK19-NEXT: entry: 14570 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14571 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14572 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14573 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14574 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14575 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14576 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14577 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14578 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14579 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14580 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14581 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14582 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14583 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14584 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14585 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14586 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14587 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14588 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14589 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 14590 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14591 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14592 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 14593 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 14594 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14595 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14596 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14597 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14598 // CHECK19-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14599 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 14600 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 14601 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14602 // CHECK19: omp.dispatch.cond: 14603 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 14604 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 14605 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14606 // CHECK19: omp.dispatch.body: 14607 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14608 // CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 14609 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14610 // CHECK19: omp.inner.for.cond: 14611 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 14612 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 14613 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 14614 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14615 // CHECK19: omp.inner.for.body: 14616 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 14617 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 14618 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14619 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 14620 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]] 14621 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]] 14622 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]] 14623 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14624 // CHECK19: omp.body.continue: 14625 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14626 // CHECK19: omp.inner.for.inc: 14627 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 14628 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 14629 // CHECK19-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 14630 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 14631 // CHECK19: omp.inner.for.end: 14632 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14633 // CHECK19: omp.dispatch.inc: 14634 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 14635 // CHECK19: omp.dispatch.end: 14636 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP6]]) 14637 // CHECK19-NEXT: ret void 14638 // 14639 // 14640 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128 14641 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14642 // CHECK19-NEXT: entry: 14643 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14644 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14645 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14646 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14647 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14648 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14649 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14650 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14651 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14652 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i32 [[TMP2]]) 14653 // CHECK19-NEXT: ret void 14654 // 14655 // 14656 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined 14657 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14658 // CHECK19-NEXT: entry: 14659 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14660 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14661 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14662 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14663 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14664 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14665 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14666 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14667 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14668 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14669 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14670 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14671 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14672 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14673 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14674 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14675 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14676 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14677 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4 14678 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14679 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14680 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14681 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 14682 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14683 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14684 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14685 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14686 // CHECK19: cond.true: 14687 // CHECK19-NEXT: br label [[COND_END:%.*]] 14688 // CHECK19: cond.false: 14689 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14690 // CHECK19-NEXT: br label [[COND_END]] 14691 // CHECK19: cond.end: 14692 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14693 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14694 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14695 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 14696 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14697 // CHECK19: omp.inner.for.cond: 14698 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14699 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14700 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14701 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14702 // CHECK19: omp.inner.for.body: 14703 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14704 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14705 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14706 // CHECK19-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14707 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 14708 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]]) 14709 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14710 // CHECK19: omp.inner.for.inc: 14711 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 14712 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 14713 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 14714 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 14715 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 14716 // CHECK19: omp.inner.for.end: 14717 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14718 // CHECK19: omp.loop.exit: 14719 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 14720 // CHECK19-NEXT: ret void 14721 // 14722 // 14723 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined 14724 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14725 // CHECK19-NEXT: entry: 14726 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14727 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14728 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14729 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14730 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14731 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14732 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14733 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 14734 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14735 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14736 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14737 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14738 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 14739 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14740 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14741 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14742 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14743 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14744 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14745 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14746 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14747 // CHECK19-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4 14748 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14749 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14750 // CHECK19-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 14751 // CHECK19-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 14752 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14753 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14754 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14755 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14756 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14757 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14758 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 14759 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 14760 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14761 // CHECK19: omp.dispatch.cond: 14762 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 14763 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 14764 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14765 // CHECK19: omp.dispatch.body: 14766 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14767 // CHECK19-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4 14768 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14769 // CHECK19: omp.inner.for.cond: 14770 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 14771 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 14772 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 14773 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14774 // CHECK19: omp.inner.for.body: 14775 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 14776 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 14777 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14778 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 14779 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]] 14780 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]] 14781 // CHECK19-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 14782 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14783 // CHECK19: omp.body.continue: 14784 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14785 // CHECK19: omp.inner.for.inc: 14786 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 14787 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 14788 // CHECK19-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 14789 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 14790 // CHECK19: omp.inner.for.end: 14791 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14792 // CHECK19: omp.dispatch.inc: 14793 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 14794 // CHECK19: omp.dispatch.end: 14795 // CHECK19-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP7]]) 14796 // CHECK19-NEXT: ret void 14797 // 14798