1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -triple x86_64-unknown-linux -verify -fopenmp-simd -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 int main(int argc, char **argv) { 14 #pragma omp target teams distribute parallel for reduction(task, +: argc, argv[0:10][0:argc]) 15 for (long long i = 0; i < 10; ++i) { 16 #pragma omp task in_reduction(+: argc, argv[0:10][0:argc]) 17 ; 18 } 19 } 20 21 22 23 // Init firstprivate copy of argc 24 25 // Init firstprivate copy of argv[0:10][0:argc] 26 27 // Register task reduction. 28 29 30 31 32 33 34 35 36 37 #endif 38 // CHECK1-LABEL: define {{[^@]+}}@main 39 // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 40 // CHECK1-NEXT: entry: 41 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 42 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 43 // CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 44 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 45 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 46 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14(ptr [[ARGC_ADDR]], ptr [[TMP0]]) #[[ATTR6:[0-9]+]] 47 // CHECK1-NEXT: ret i32 0 48 // 49 // 50 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14 51 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] { 52 // CHECK1-NEXT: entry: 53 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8 54 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 55 // CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8 56 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 57 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8 58 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 59 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB1:[0-9]+]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined, ptr [[TMP0]], ptr [[TMP1]]) 60 // CHECK1-NEXT: ret void 61 // 62 // 63 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined 64 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] { 65 // CHECK1-NEXT: entry: 66 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 67 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 68 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8 69 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 70 // CHECK1-NEXT: [[ARGC1:%.*]] = alloca i32, align 4 71 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 72 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 73 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 74 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8 75 // CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [2 x %struct.kmp_taskred_input_t], align 8 76 // CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 8 77 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 78 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i64, align 8 79 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 80 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 81 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 82 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8 84 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8 85 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 86 // CHECK1-NEXT: [[_TMP27:%.*]] = alloca i8, align 1 87 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 88 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 89 // CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8 90 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 91 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8 92 // CHECK1-NEXT: store i32 0, ptr [[ARGC1]], align 4 93 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 94 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP1]], i64 0 95 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8 96 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP2]], i64 0 97 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4 98 // CHECK1-NEXT: [[TMP4:%.*]] = sext i32 [[TMP3]] to i64 99 // CHECK1-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP4]] 100 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 101 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP5]], i64 9 102 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[ARRAYIDX3]], align 8 103 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP6]], i64 [[LB_ADD_LEN]] 104 // CHECK1-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[ARRAYIDX4]] to i64 105 // CHECK1-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64 106 // CHECK1-NEXT: [[TMP9:%.*]] = sub i64 [[TMP7]], [[TMP8]] 107 // CHECK1-NEXT: [[TMP10:%.*]] = sdiv exact i64 [[TMP9]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 108 // CHECK1-NEXT: [[TMP11:%.*]] = add nuw i64 [[TMP10]], 1 109 // CHECK1-NEXT: [[TMP12:%.*]] = mul nuw i64 [[TMP11]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 110 // CHECK1-NEXT: [[TMP13:%.*]] = call ptr @llvm.stacksave.p0() 111 // CHECK1-NEXT: store ptr [[TMP13]], ptr [[SAVED_STACK]], align 8 112 // CHECK1-NEXT: [[VLA:%.*]] = alloca i8, i64 [[TMP11]], align 16 113 // CHECK1-NEXT: store i64 [[TMP11]], ptr [[__VLA_EXPR0]], align 8 114 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP11]] 115 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP14]] 116 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 117 // CHECK1: omp.arrayinit.body: 118 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 119 // CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 120 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 121 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]] 122 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 123 // CHECK1: omp.arrayinit.done: 124 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 125 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8 126 // CHECK1-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[TMP16]] to i64 127 // CHECK1-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64 128 // CHECK1-NEXT: [[TMP19:%.*]] = sub i64 [[TMP17]], [[TMP18]] 129 // CHECK1-NEXT: [[TMP20:%.*]] = sdiv exact i64 [[TMP19]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 130 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP20]] 131 // CHECK1-NEXT: store ptr [[_TMP5]], ptr [[TMP]], align 8 132 // CHECK1-NEXT: store ptr [[TMP21]], ptr [[_TMP5]], align 8 133 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 0 134 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0 135 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP22]], align 8 136 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1 137 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP23]], align 8 138 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2 139 // CHECK1-NEXT: store i64 4, ptr [[TMP24]], align 8 140 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3 141 // CHECK1-NEXT: store ptr @.red_init., ptr [[TMP25]], align 8 142 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4 143 // CHECK1-NEXT: store ptr null, ptr [[TMP26]], align 8 144 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5 145 // CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP27]], align 8 146 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6 147 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP28]], i8 0, i64 4, i1 false) 148 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_6:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 1 149 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 0 150 // CHECK1-NEXT: [[TMP30:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 151 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP30]], i64 0 152 // CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[ARRAYIDX7]], align 8 153 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP31]], i64 0 154 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP0]], align 4 155 // CHECK1-NEXT: [[TMP33:%.*]] = sext i32 [[TMP32]] to i64 156 // CHECK1-NEXT: [[LB_ADD_LEN9:%.*]] = add nsw i64 -1, [[TMP33]] 157 // CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 158 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP34]], i64 9 159 // CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[ARRAYIDX10]], align 8 160 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP35]], i64 [[LB_ADD_LEN9]] 161 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP29]], align 8 162 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 1 163 // CHECK1-NEXT: store ptr [[ARRAYIDX8]], ptr [[TMP36]], align 8 164 // CHECK1-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[ARRAYIDX11]] to i64 165 // CHECK1-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[ARRAYIDX8]] to i64 166 // CHECK1-NEXT: [[TMP39:%.*]] = sub i64 [[TMP37]], [[TMP38]] 167 // CHECK1-NEXT: [[TMP40:%.*]] = sdiv exact i64 [[TMP39]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 168 // CHECK1-NEXT: [[TMP41:%.*]] = add nuw i64 [[TMP40]], 1 169 // CHECK1-NEXT: [[TMP42:%.*]] = mul nuw i64 [[TMP41]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 170 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 2 171 // CHECK1-NEXT: store i64 [[TMP42]], ptr [[TMP43]], align 8 172 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 3 173 // CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP44]], align 8 174 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 4 175 // CHECK1-NEXT: store ptr null, ptr [[TMP45]], align 8 176 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 5 177 // CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP46]], align 8 178 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_6]], i32 0, i32 6 179 // CHECK1-NEXT: store i32 1, ptr [[TMP47]], align 8 180 // CHECK1-NEXT: [[TMP48:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 181 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, ptr [[TMP48]], align 4 182 // CHECK1-NEXT: [[TMP50:%.*]] = call ptr @__kmpc_taskred_modifier_init(ptr @[[GLOB1]], i32 [[TMP49]], i32 1, i32 2, ptr [[DOTRD_INPUT_]]) 183 // CHECK1-NEXT: store ptr [[TMP50]], ptr [[DOTTASK_RED_]], align 8 184 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8 185 // CHECK1-NEXT: store i64 9, ptr [[DOTOMP_COMB_UB]], align 8 186 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 187 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 188 // CHECK1-NEXT: [[TMP51:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 189 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, ptr [[TMP51]], align 4 190 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP52]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 191 // CHECK1-NEXT: [[TMP53:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 192 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP53]], 9 193 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 194 // CHECK1: cond.true: 195 // CHECK1-NEXT: br label [[COND_END:%.*]] 196 // CHECK1: cond.false: 197 // CHECK1-NEXT: [[TMP54:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 198 // CHECK1-NEXT: br label [[COND_END]] 199 // CHECK1: cond.end: 200 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP54]], [[COND_FALSE]] ] 201 // CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8 202 // CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 203 // CHECK1-NEXT: store i64 [[TMP55]], ptr [[DOTOMP_IV]], align 8 204 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 205 // CHECK1: omp.inner.for.cond: 206 // CHECK1-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 207 // CHECK1-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 208 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP56]], [[TMP57]] 209 // CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 210 // CHECK1: omp.inner.for.body: 211 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 212 // CHECK1-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 213 // CHECK1-NEXT: [[TMP60:%.*]] = load ptr, ptr [[TMP]], align 8 214 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined, i64 [[TMP58]], i64 [[TMP59]], ptr [[ARGC1]], ptr [[TMP60]]) 215 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 216 // CHECK1: omp.inner.for.inc: 217 // CHECK1-NEXT: [[TMP61:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 218 // CHECK1-NEXT: [[TMP62:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8 219 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP61]], [[TMP62]] 220 // CHECK1-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8 221 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 222 // CHECK1: omp.inner.for.end: 223 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 224 // CHECK1: omp.loop.exit: 225 // CHECK1-NEXT: [[TMP63:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 226 // CHECK1-NEXT: [[TMP64:%.*]] = load i32, ptr [[TMP63]], align 4 227 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP64]]) 228 // CHECK1-NEXT: [[TMP65:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, ptr [[TMP65]], align 4 230 // CHECK1-NEXT: call void @__kmpc_task_reduction_modifier_fini(ptr @[[GLOB1]], i32 [[TMP66]], i32 1) 231 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 232 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP67]], align 8 233 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 234 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP68]], align 8 235 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 236 // CHECK1-NEXT: [[TMP70:%.*]] = inttoptr i64 [[TMP11]] to ptr 237 // CHECK1-NEXT: store ptr [[TMP70]], ptr [[TMP69]], align 8 238 // CHECK1-NEXT: [[TMP71:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 239 // CHECK1-NEXT: [[TMP72:%.*]] = load i32, ptr [[TMP71]], align 4 240 // CHECK1-NEXT: [[TMP73:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB4:[0-9]+]], i32 [[TMP72]], i32 2, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 241 // CHECK1-NEXT: switch i32 [[TMP73]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 242 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 243 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 244 // CHECK1-NEXT: ] 245 // CHECK1: .omp.reduction.case1: 246 // CHECK1-NEXT: [[TMP74:%.*]] = load i32, ptr [[TMP0]], align 4 247 // CHECK1-NEXT: [[TMP75:%.*]] = load i32, ptr [[ARGC1]], align 4 248 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP74]], [[TMP75]] 249 // CHECK1-NEXT: store i32 [[ADD14]], ptr [[TMP0]], align 4 250 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP11]] 251 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP76]] 252 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 253 // CHECK1: omp.arraycpy.body: 254 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 255 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST15:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT19:%.*]], [[OMP_ARRAYCPY_BODY]] ] 256 // CHECK1-NEXT: [[TMP77:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST15]], align 1 257 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP77]] to i32 258 // CHECK1-NEXT: [[TMP78:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 259 // CHECK1-NEXT: [[CONV16:%.*]] = sext i8 [[TMP78]] to i32 260 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[CONV]], [[CONV16]] 261 // CHECK1-NEXT: [[CONV18:%.*]] = trunc i32 [[ADD17]] to i8 262 // CHECK1-NEXT: store i8 [[CONV18]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST15]], align 1 263 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT19]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST15]], i32 1 264 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 265 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT19]], [[TMP76]] 266 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY]] 267 // CHECK1: omp.arraycpy.done21: 268 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB4]], i32 [[TMP72]], ptr @.gomp_critical_user_.reduction.var) 269 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 270 // CHECK1: .omp.reduction.case2: 271 // CHECK1-NEXT: [[TMP79:%.*]] = load i32, ptr [[ARGC1]], align 4 272 // CHECK1-NEXT: [[TMP80:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP79]] monotonic, align 4 273 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP11]] 274 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY22:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP81]] 275 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY22]], label [[OMP_ARRAYCPY_DONE35:%.*]], label [[OMP_ARRAYCPY_BODY23:%.*]] 276 // CHECK1: omp.arraycpy.body23: 277 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST24:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT33:%.*]], [[ATOMIC_EXIT:%.*]] ] 278 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST25:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT32:%.*]], [[ATOMIC_EXIT]] ] 279 // CHECK1-NEXT: [[TMP82:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST24]], align 1 280 // CHECK1-NEXT: [[CONV26:%.*]] = sext i8 [[TMP82]] to i32 281 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST25]] monotonic, align 1 282 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 283 // CHECK1: atomic_cont: 284 // CHECK1-NEXT: [[TMP83:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY23]] ], [ [[TMP88:%.*]], [[ATOMIC_CONT]] ] 285 // CHECK1-NEXT: store i8 [[TMP83]], ptr [[_TMP27]], align 1 286 // CHECK1-NEXT: [[TMP84:%.*]] = load i8, ptr [[_TMP27]], align 1 287 // CHECK1-NEXT: [[CONV28:%.*]] = sext i8 [[TMP84]] to i32 288 // CHECK1-NEXT: [[TMP85:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST24]], align 1 289 // CHECK1-NEXT: [[CONV29:%.*]] = sext i8 [[TMP85]] to i32 290 // CHECK1-NEXT: [[ADD30:%.*]] = add nsw i32 [[CONV28]], [[CONV29]] 291 // CHECK1-NEXT: [[CONV31:%.*]] = trunc i32 [[ADD30]] to i8 292 // CHECK1-NEXT: store i8 [[CONV31]], ptr [[ATOMIC_TEMP]], align 1 293 // CHECK1-NEXT: [[TMP86:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 294 // CHECK1-NEXT: [[TMP87:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST25]], i8 [[TMP83]], i8 [[TMP86]] monotonic monotonic, align 1 295 // CHECK1-NEXT: [[TMP88]] = extractvalue { i8, i1 } [[TMP87]], 0 296 // CHECK1-NEXT: [[TMP89:%.*]] = extractvalue { i8, i1 } [[TMP87]], 1 297 // CHECK1-NEXT: br i1 [[TMP89]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 298 // CHECK1: atomic_exit: 299 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT32]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST25]], i32 1 300 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT33]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST24]], i32 1 301 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE34:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT32]], [[TMP81]] 302 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE34]], label [[OMP_ARRAYCPY_DONE35]], label [[OMP_ARRAYCPY_BODY23]] 303 // CHECK1: omp.arraycpy.done35: 304 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 305 // CHECK1: .omp.reduction.default: 306 // CHECK1-NEXT: [[TMP90:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 307 // CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP90]]) 308 // CHECK1-NEXT: ret void 309 // 310 // 311 // CHECK1-LABEL: define {{[^@]+}}@.red_init. 312 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 313 // CHECK1-NEXT: entry: 314 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 315 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 316 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 317 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 318 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 319 // CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4 320 // CHECK1-NEXT: ret void 321 // 322 // 323 // CHECK1-LABEL: define {{[^@]+}}@.red_comb. 324 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 325 // CHECK1-NEXT: entry: 326 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 327 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 328 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 329 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 330 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 331 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 332 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 333 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4 334 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]] 335 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4 336 // CHECK1-NEXT: ret void 337 // 338 // 339 // CHECK1-LABEL: define {{[^@]+}}@.red_init..1 340 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3]] { 341 // CHECK1-NEXT: entry: 342 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 343 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 344 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 345 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 346 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 347 // CHECK1-NEXT: [[TMP3:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}}) 348 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8 349 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP4]] 350 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP5]] 351 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 352 // CHECK1: omp.arrayinit.body: 353 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 354 // CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 355 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 356 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]] 357 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 358 // CHECK1: omp.arrayinit.done: 359 // CHECK1-NEXT: ret void 360 // 361 // 362 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..2 363 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 364 // CHECK1-NEXT: entry: 365 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 366 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 367 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 368 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 369 // CHECK1-NEXT: [[TMP2:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}}) 370 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 371 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8 372 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 373 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP3]] 374 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP4]], [[TMP6]] 375 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 376 // CHECK1: omp.arraycpy.body: 377 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 378 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP4]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 379 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 380 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 381 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 382 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP8]] to i32 383 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 384 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i8 385 // CHECK1-NEXT: store i8 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 386 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 387 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 388 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 389 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 390 // CHECK1: omp.arraycpy.done4: 391 // CHECK1-NEXT: ret void 392 // 393 // 394 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined 395 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] { 396 // CHECK1-NEXT: entry: 397 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 398 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 399 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 400 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 401 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8 402 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 403 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 404 // CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 8 405 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 406 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 407 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 408 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 409 // CHECK1-NEXT: [[ARGC1:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 411 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 412 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8 413 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 414 // CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [2 x %struct.kmp_taskred_input_t.0], align 8 415 // CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 8 416 // CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8 417 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 418 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8 419 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 420 // CHECK1-NEXT: [[_TMP28:%.*]] = alloca i8, align 1 421 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 422 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 423 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 424 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 425 // CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8 426 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 427 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8 428 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 429 // CHECK1-NEXT: store i64 9, ptr [[DOTOMP_UB]], align 8 430 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 431 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 432 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[DOTOMP_LB]], align 8 433 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[DOTOMP_UB]], align 8 434 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 435 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 436 // CHECK1-NEXT: store i32 0, ptr [[ARGC1]], align 4 437 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 438 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP3]], i64 0 439 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8 440 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP4]], i64 0 441 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 442 // CHECK1-NEXT: [[TMP6:%.*]] = sext i32 [[TMP5]] to i64 443 // CHECK1-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP6]] 444 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 445 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP7]], i64 9 446 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[ARRAYIDX3]], align 8 447 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP8]], i64 [[LB_ADD_LEN]] 448 // CHECK1-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARRAYIDX4]] to i64 449 // CHECK1-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64 450 // CHECK1-NEXT: [[TMP11:%.*]] = sub i64 [[TMP9]], [[TMP10]] 451 // CHECK1-NEXT: [[TMP12:%.*]] = sdiv exact i64 [[TMP11]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 452 // CHECK1-NEXT: [[TMP13:%.*]] = add nuw i64 [[TMP12]], 1 453 // CHECK1-NEXT: [[TMP14:%.*]] = mul nuw i64 [[TMP13]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 454 // CHECK1-NEXT: [[TMP15:%.*]] = call ptr @llvm.stacksave.p0() 455 // CHECK1-NEXT: store ptr [[TMP15]], ptr [[SAVED_STACK]], align 8 456 // CHECK1-NEXT: [[VLA:%.*]] = alloca i8, i64 [[TMP13]], align 16 457 // CHECK1-NEXT: store i64 [[TMP13]], ptr [[__VLA_EXPR0]], align 8 458 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP13]] 459 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP16]] 460 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 461 // CHECK1: omp.arrayinit.body: 462 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 463 // CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 464 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 465 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP16]] 466 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 467 // CHECK1: omp.arrayinit.done: 468 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 469 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8 470 // CHECK1-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[TMP18]] to i64 471 // CHECK1-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64 472 // CHECK1-NEXT: [[TMP21:%.*]] = sub i64 [[TMP19]], [[TMP20]] 473 // CHECK1-NEXT: [[TMP22:%.*]] = sdiv exact i64 [[TMP21]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 474 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP22]] 475 // CHECK1-NEXT: store ptr [[_TMP6]], ptr [[_TMP5]], align 8 476 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[_TMP6]], align 8 477 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_]], i64 0, i64 0 478 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0 479 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP24]], align 8 480 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1 481 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP25]], align 8 482 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2 483 // CHECK1-NEXT: store i64 4, ptr [[TMP26]], align 8 484 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3 485 // CHECK1-NEXT: store ptr @.red_init..3, ptr [[TMP27]], align 8 486 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4 487 // CHECK1-NEXT: store ptr null, ptr [[TMP28]], align 8 488 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5 489 // CHECK1-NEXT: store ptr @.red_comb..4, ptr [[TMP29]], align 8 490 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6 491 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP30]], i8 0, i64 4, i1 false) 492 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_7:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_]], i64 0, i64 1 493 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 0 494 // CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 495 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP32]], i64 0 496 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[ARRAYIDX8]], align 8 497 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP33]], i64 0 498 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP0]], align 4 499 // CHECK1-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 500 // CHECK1-NEXT: [[LB_ADD_LEN10:%.*]] = add nsw i64 -1, [[TMP35]] 501 // CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 502 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP36]], i64 9 503 // CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8 504 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP37]], i64 [[LB_ADD_LEN10]] 505 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP31]], align 8 506 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 1 507 // CHECK1-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP38]], align 8 508 // CHECK1-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[ARRAYIDX12]] to i64 509 // CHECK1-NEXT: [[TMP40:%.*]] = ptrtoint ptr [[ARRAYIDX9]] to i64 510 // CHECK1-NEXT: [[TMP41:%.*]] = sub i64 [[TMP39]], [[TMP40]] 511 // CHECK1-NEXT: [[TMP42:%.*]] = sdiv exact i64 [[TMP41]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 512 // CHECK1-NEXT: [[TMP43:%.*]] = add nuw i64 [[TMP42]], 1 513 // CHECK1-NEXT: [[TMP44:%.*]] = mul nuw i64 [[TMP43]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 514 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 2 515 // CHECK1-NEXT: store i64 [[TMP44]], ptr [[TMP45]], align 8 516 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 3 517 // CHECK1-NEXT: store ptr @.red_init..5, ptr [[TMP46]], align 8 518 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 4 519 // CHECK1-NEXT: store ptr null, ptr [[TMP47]], align 8 520 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 5 521 // CHECK1-NEXT: store ptr @.red_comb..6, ptr [[TMP48]], align 8 522 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 6 523 // CHECK1-NEXT: store i32 1, ptr [[TMP49]], align 8 524 // CHECK1-NEXT: [[TMP50:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 525 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4 526 // CHECK1-NEXT: [[TMP52:%.*]] = call ptr @__kmpc_taskred_modifier_init(ptr @[[GLOB1]], i32 [[TMP51]], i32 1, i32 2, ptr [[DOTRD_INPUT_]]) 527 // CHECK1-NEXT: store ptr [[TMP52]], ptr [[DOTTASK_RED_]], align 8 528 // CHECK1-NEXT: [[TMP53:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 529 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, ptr [[TMP53]], align 4 530 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3:[0-9]+]], i32 [[TMP54]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 531 // CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 532 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP55]], 9 533 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 534 // CHECK1: cond.true: 535 // CHECK1-NEXT: br label [[COND_END:%.*]] 536 // CHECK1: cond.false: 537 // CHECK1-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 538 // CHECK1-NEXT: br label [[COND_END]] 539 // CHECK1: cond.end: 540 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP56]], [[COND_FALSE]] ] 541 // CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 542 // CHECK1-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 543 // CHECK1-NEXT: store i64 [[TMP57]], ptr [[DOTOMP_IV]], align 8 544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 545 // CHECK1: omp.inner.for.cond: 546 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 547 // CHECK1-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 548 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP58]], [[TMP59]] 549 // CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 550 // CHECK1: omp.inner.for.cond.cleanup: 551 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 552 // CHECK1: omp.inner.for.body: 553 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 554 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP60]], 1 555 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL]] 556 // CHECK1-NEXT: store i64 [[ADD]], ptr [[I]], align 8 557 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0 558 // CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[TMP61]], align 8 559 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1 560 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP62]], align 8 561 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2 562 // CHECK1-NEXT: [[TMP64:%.*]] = load ptr, ptr [[_TMP5]], align 8 563 // CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP63]], align 8 564 // CHECK1-NEXT: [[TMP65:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 565 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, ptr [[TMP65]], align 4 566 // CHECK1-NEXT: [[TMP67:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP66]], i32 1, i64 48, i64 24, ptr @.omp_task_entry.) 567 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP67]], i32 0, i32 0 568 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP68]], i32 0, i32 0 569 // CHECK1-NEXT: [[TMP70:%.*]] = load ptr, ptr [[TMP69]], align 8 570 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP70]], ptr align 8 [[AGG_CAPTURED]], i64 24, i1 false) 571 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP67]], i32 0, i32 1 572 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP71]], i32 0, i32 0 573 // CHECK1-NEXT: [[TMP73:%.*]] = load ptr, ptr [[DOTTASK_RED_]], align 8 574 // CHECK1-NEXT: store ptr [[TMP73]], ptr [[TMP72]], align 8 575 // CHECK1-NEXT: [[TMP74:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 576 // CHECK1-NEXT: [[TMP75:%.*]] = load i32, ptr [[TMP74]], align 4 577 // CHECK1-NEXT: [[TMP76:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB1]], i32 [[TMP75]], ptr [[TMP67]]) 578 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 579 // CHECK1: omp.body.continue: 580 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 581 // CHECK1: omp.inner.for.inc: 582 // CHECK1-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 583 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP77]], 1 584 // CHECK1-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 8 585 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 586 // CHECK1: omp.inner.for.end: 587 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 588 // CHECK1: omp.loop.exit: 589 // CHECK1-NEXT: [[TMP78:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 590 // CHECK1-NEXT: [[TMP79:%.*]] = load i32, ptr [[TMP78]], align 4 591 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP79]]) 592 // CHECK1-NEXT: [[TMP80:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 593 // CHECK1-NEXT: [[TMP81:%.*]] = load i32, ptr [[TMP80]], align 4 594 // CHECK1-NEXT: call void @__kmpc_task_reduction_modifier_fini(ptr @[[GLOB1]], i32 [[TMP81]], i32 1) 595 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 596 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP82]], align 8 597 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 598 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP83]], align 8 599 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 600 // CHECK1-NEXT: [[TMP85:%.*]] = inttoptr i64 [[TMP13]] to ptr 601 // CHECK1-NEXT: store ptr [[TMP85]], ptr [[TMP84]], align 8 602 // CHECK1-NEXT: [[TMP86:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 603 // CHECK1-NEXT: [[TMP87:%.*]] = load i32, ptr [[TMP86]], align 4 604 // CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB4]], i32 [[TMP87]], i32 2, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 605 // CHECK1-NEXT: switch i32 [[TMP88]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 606 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 607 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 608 // CHECK1-NEXT: ] 609 // CHECK1: .omp.reduction.case1: 610 // CHECK1-NEXT: [[TMP89:%.*]] = load i32, ptr [[TMP0]], align 4 611 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, ptr [[ARGC1]], align 4 612 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP89]], [[TMP90]] 613 // CHECK1-NEXT: store i32 [[ADD15]], ptr [[TMP0]], align 4 614 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP13]] 615 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP91]] 616 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE22:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 617 // CHECK1: omp.arraycpy.body: 618 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 619 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST16:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY]] ] 620 // CHECK1-NEXT: [[TMP92:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1 621 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP92]] to i32 622 // CHECK1-NEXT: [[TMP93:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 623 // CHECK1-NEXT: [[CONV17:%.*]] = sext i8 [[TMP93]] to i32 624 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV]], [[CONV17]] 625 // CHECK1-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 626 // CHECK1-NEXT: store i8 [[CONV19]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1 627 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], i32 1 628 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 629 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE21:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP91]] 630 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_BODY]] 631 // CHECK1: omp.arraycpy.done22: 632 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB4]], i32 [[TMP87]], ptr @.gomp_critical_user_.reduction.var) 633 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 634 // CHECK1: .omp.reduction.case2: 635 // CHECK1-NEXT: [[TMP94:%.*]] = load i32, ptr [[ARGC1]], align 4 636 // CHECK1-NEXT: [[TMP95:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP94]] monotonic, align 4 637 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP13]] 638 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY23:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP96]] 639 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY23]], label [[OMP_ARRAYCPY_DONE36:%.*]], label [[OMP_ARRAYCPY_BODY24:%.*]] 640 // CHECK1: omp.arraycpy.body24: 641 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST25:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT34:%.*]], [[ATOMIC_EXIT:%.*]] ] 642 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST26:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT33:%.*]], [[ATOMIC_EXIT]] ] 643 // CHECK1-NEXT: [[TMP97:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1 644 // CHECK1-NEXT: [[CONV27:%.*]] = sext i8 [[TMP97]] to i32 645 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]] monotonic, align 1 646 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 647 // CHECK1: atomic_cont: 648 // CHECK1-NEXT: [[TMP98:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY24]] ], [ [[TMP103:%.*]], [[ATOMIC_CONT]] ] 649 // CHECK1-NEXT: store i8 [[TMP98]], ptr [[_TMP28]], align 1 650 // CHECK1-NEXT: [[TMP99:%.*]] = load i8, ptr [[_TMP28]], align 1 651 // CHECK1-NEXT: [[CONV29:%.*]] = sext i8 [[TMP99]] to i32 652 // CHECK1-NEXT: [[TMP100:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1 653 // CHECK1-NEXT: [[CONV30:%.*]] = sext i8 [[TMP100]] to i32 654 // CHECK1-NEXT: [[ADD31:%.*]] = add nsw i32 [[CONV29]], [[CONV30]] 655 // CHECK1-NEXT: [[CONV32:%.*]] = trunc i32 [[ADD31]] to i8 656 // CHECK1-NEXT: store i8 [[CONV32]], ptr [[ATOMIC_TEMP]], align 1 657 // CHECK1-NEXT: [[TMP101:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 658 // CHECK1-NEXT: [[TMP102:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i8 [[TMP98]], i8 [[TMP101]] monotonic monotonic, align 1 659 // CHECK1-NEXT: [[TMP103]] = extractvalue { i8, i1 } [[TMP102]], 0 660 // CHECK1-NEXT: [[TMP104:%.*]] = extractvalue { i8, i1 } [[TMP102]], 1 661 // CHECK1-NEXT: br i1 [[TMP104]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 662 // CHECK1: atomic_exit: 663 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT33]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i32 1 664 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT34]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], i32 1 665 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE35:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT33]], [[TMP96]] 666 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE35]], label [[OMP_ARRAYCPY_DONE36]], label [[OMP_ARRAYCPY_BODY24]] 667 // CHECK1: omp.arraycpy.done36: 668 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 669 // CHECK1: .omp.reduction.default: 670 // CHECK1-NEXT: [[TMP105:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 671 // CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP105]]) 672 // CHECK1-NEXT: ret void 673 // 674 // 675 // CHECK1-LABEL: define {{[^@]+}}@.red_init..3 676 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3]] { 677 // CHECK1-NEXT: entry: 678 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 679 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 680 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 681 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 682 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 683 // CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4 684 // CHECK1-NEXT: ret void 685 // 686 // 687 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..4 688 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 689 // CHECK1-NEXT: entry: 690 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 691 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 692 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 693 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 694 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 695 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 696 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 697 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4 698 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]] 699 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4 700 // CHECK1-NEXT: ret void 701 // 702 // 703 // CHECK1-LABEL: define {{[^@]+}}@.red_init..5 704 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3]] { 705 // CHECK1-NEXT: entry: 706 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 707 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 708 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 709 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 710 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 711 // CHECK1-NEXT: [[TMP3:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}}) 712 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8 713 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP4]] 714 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP5]] 715 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 716 // CHECK1: omp.arrayinit.body: 717 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 718 // CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 719 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 720 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]] 721 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 722 // CHECK1: omp.arrayinit.done: 723 // CHECK1-NEXT: ret void 724 // 725 // 726 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..6 727 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 728 // CHECK1-NEXT: entry: 729 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 730 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 731 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 732 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 733 // CHECK1-NEXT: [[TMP2:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}}) 734 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 735 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8 736 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 737 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP3]] 738 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP4]], [[TMP6]] 739 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 740 // CHECK1: omp.arraycpy.body: 741 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 742 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP4]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 743 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 744 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 745 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 746 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP8]] to i32 747 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 748 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i8 749 // CHECK1-NEXT: store i8 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 750 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 751 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 752 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 753 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 754 // CHECK1: omp.arraycpy.done4: 755 // CHECK1-NEXT: ret void 756 // 757 // 758 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. 759 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { 760 // CHECK1-NEXT: entry: 761 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 762 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 763 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 764 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 765 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 766 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP2]], i32 0, i32 0 767 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 768 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP4]], align 8 769 // CHECK1-NEXT: ret void 770 // 771 // 772 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 773 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR3]] { 774 // CHECK1-NEXT: entry: 775 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 776 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8 777 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8 778 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8 779 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8 780 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8 781 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8 782 // CHECK1-NEXT: [[TMP_I:%.*]] = alloca ptr, align 8 783 // CHECK1-NEXT: [[TMP4_I:%.*]] = alloca ptr, align 8 784 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 785 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 786 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4 787 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 788 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4 789 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 790 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0 791 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2 792 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0 793 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 794 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1 795 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 796 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 797 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 798 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 799 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]] 800 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]] 801 // CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]] 802 // CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]] 803 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]] 804 // CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]] 805 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]] 806 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]] 807 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]] 808 // CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR6]] 809 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META12]] 810 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP9]], i32 0, i32 1 811 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8 812 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP12]], align 8 813 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12]] 814 // CHECK1-NEXT: [[TMP17:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP16]], ptr [[TMP15]], ptr [[TMP14]]) 815 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 816 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8 817 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8 818 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 1 819 // CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8 820 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 821 // CHECK1-NEXT: [[TMP24:%.*]] = sext i32 [[TMP23]] to i64 822 // CHECK1-NEXT: [[LB_ADD_LEN_I:%.*]] = add nsw i64 -1, [[TMP24]] 823 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 824 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8 825 // CHECK1-NEXT: [[ARRAYIDX2_I:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP26]], i64 9 826 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[ARRAYIDX2_I]], align 8 827 // CHECK1-NEXT: [[ARRAYIDX3_I:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP27]], i64 [[LB_ADD_LEN_I]] 828 // CHECK1-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[ARRAYIDX3_I]] to i64 829 // CHECK1-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[TMP20]] to i64 830 // CHECK1-NEXT: [[TMP30:%.*]] = sub i64 [[TMP28]], [[TMP29]] 831 // CHECK1-NEXT: [[TMP31:%.*]] = add nuw i64 [[TMP30]], 1 832 // CHECK1-NEXT: [[TMP32:%.*]] = mul nuw i64 [[TMP31]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 833 // CHECK1-NEXT: store i64 [[TMP31]], ptr @{{reduction_size[.].+[.]}}, align 8, !noalias [[META12]] 834 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[TMP12]], align 8 835 // CHECK1-NEXT: [[TMP34:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP16]], ptr [[TMP33]], ptr [[TMP20]]) 836 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 837 // CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[TMP35]], align 8 838 // CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[TMP36]], align 8 839 // CHECK1-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP37]] to i64 840 // CHECK1-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP20]] to i64 841 // CHECK1-NEXT: [[TMP40:%.*]] = sub i64 [[TMP38]], [[TMP39]] 842 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr [[TMP34]], i64 [[TMP40]] 843 // CHECK1-NEXT: store ptr [[TMP4_I]], ptr [[TMP_I]], align 8, !noalias [[META12]] 844 // CHECK1-NEXT: store ptr [[TMP41]], ptr [[TMP4_I]], align 8, !noalias [[META12]] 845 // CHECK1-NEXT: ret i32 0 846 // 847 // 848 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined.omp.reduction.reduction_func 849 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 850 // CHECK1-NEXT: entry: 851 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 852 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 853 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 854 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 855 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 856 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 857 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0 858 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 859 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0 860 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 861 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1 862 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8 863 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1 864 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8 865 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2 866 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8 867 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64 868 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP7]], align 4 869 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP5]], align 4 870 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 871 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 872 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP11]], i64 [[TMP14]] 873 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP11]], [[TMP17]] 874 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 875 // CHECK1: omp.arraycpy.body: 876 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 877 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 878 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 879 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP18]] to i32 880 // CHECK1-NEXT: [[TMP19:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 881 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP19]] to i32 882 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 883 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i8 884 // CHECK1-NEXT: store i8 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 885 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 886 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 887 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP17]] 888 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]] 889 // CHECK1: omp.arraycpy.done5: 890 // CHECK1-NEXT: ret void 891 // 892 // 893 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp.reduction.reduction_func 894 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 895 // CHECK1-NEXT: entry: 896 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 897 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 898 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 899 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 900 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 901 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 902 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0 903 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 904 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0 905 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 906 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1 907 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8 908 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1 909 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8 910 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2 911 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8 912 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64 913 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP7]], align 4 914 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP5]], align 4 915 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 916 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 917 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP11]], i64 [[TMP14]] 918 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP11]], [[TMP17]] 919 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 920 // CHECK1: omp.arraycpy.body: 921 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 922 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 923 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 924 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP18]] to i32 925 // CHECK1-NEXT: [[TMP19:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 926 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP19]] to i32 927 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 928 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i8 929 // CHECK1-NEXT: store i8 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 930 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 931 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 932 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP17]] 933 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]] 934 // CHECK1: omp.arraycpy.done5: 935 // CHECK1-NEXT: ret void 936 // 937