1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 12 13 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target teams distribute parallel for reduction(+: t_var) 33 for (int i = 0; i < 2; ++i) { 34 t_var += (T) i; 35 } 36 return T(); 37 } 38 39 int main() { 40 static int sivar; 41 #ifdef LAMBDA 42 43 [&]() { 44 #pragma omp target teams distribute parallel for reduction(+: sivar) 45 for (int i = 0; i < 2; ++i) { 46 47 // Skip global and bound tid vars 48 49 50 51 // Skip global and bound tid vars, and prev lb and ub vars 52 // skip loop vars 53 54 55 sivar += i; 56 57 [&]() { 58 59 sivar += 4; 60 61 }(); 62 } 63 }(); 64 return 0; 65 #else 66 #pragma omp target teams distribute parallel for reduction(+: sivar) 67 for (int i = 0; i < 2; ++i) { 68 sivar += i; 69 } 70 return tmain<int>(); 71 #endif 72 } 73 74 75 76 77 // Skip global and bound tid vars 78 79 80 // Skip global and bound tid vars, and prev lb and ub 81 // skip loop vars 82 83 84 85 86 // Skip global and bound tid vars 87 88 89 // Skip global and bound tid vars, and prev lb and ub vars 90 // skip loop vars 91 92 #endif 93 // CHECK1-LABEL: define {{[^@]+}}@main 94 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 95 // CHECK1-NEXT: entry: 96 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 97 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 98 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 99 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 100 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 101 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 102 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 103 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 104 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 8 105 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 106 // CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP1]], align 8 107 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 108 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 109 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 110 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 111 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 112 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 113 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 114 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 115 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 116 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 117 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 118 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 119 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 120 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 121 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 122 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 123 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 124 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 125 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 126 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 127 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 128 // CHECK1-NEXT: store i64 2, ptr [[TMP13]], align 8 129 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 130 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 131 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 132 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 133 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 134 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 135 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 136 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 137 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.region_id, ptr [[KERNEL_ARGS]]) 138 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 139 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 140 // CHECK1: omp_offload.failed: 141 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 142 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 143 // CHECK1: omp_offload.cont: 144 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 145 // CHECK1-NEXT: ret i32 [[CALL]] 146 // 147 // 148 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 149 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 150 // CHECK1-NEXT: entry: 151 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 152 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 153 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 154 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]]) 155 // CHECK1-NEXT: ret void 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined 159 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 162 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 163 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 164 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 171 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 172 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 173 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 174 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 175 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 176 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 177 // CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4 178 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 179 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 180 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 181 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 182 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 183 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 184 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 185 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 186 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 187 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 188 // CHECK1: cond.true: 189 // CHECK1-NEXT: br label [[COND_END:%.*]] 190 // CHECK1: cond.false: 191 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 192 // CHECK1-NEXT: br label [[COND_END]] 193 // CHECK1: cond.end: 194 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 195 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 196 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 197 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 198 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 199 // CHECK1: omp.inner.for.cond: 200 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 201 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 202 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 203 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 204 // CHECK1: omp.inner.for.body: 205 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 206 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 207 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 208 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 209 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[SIVAR1]]) 210 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 211 // CHECK1: omp.inner.for.inc: 212 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 213 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 214 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 215 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 217 // CHECK1: omp.inner.for.end: 218 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 219 // CHECK1: omp.loop.exit: 220 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 221 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 222 // CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 8 223 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 224 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 225 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 226 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 227 // CHECK1-NEXT: ] 228 // CHECK1: .omp.reduction.case1: 229 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 230 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 231 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 232 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 233 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 234 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 235 // CHECK1: .omp.reduction.case2: 236 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR1]], align 4 237 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 238 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 239 // CHECK1: .omp.reduction.default: 240 // CHECK1-NEXT: ret void 241 // 242 // 243 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined 244 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 245 // CHECK1-NEXT: entry: 246 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 247 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 248 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 249 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 250 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 251 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 255 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 256 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 260 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 261 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 262 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 263 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 264 // CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 265 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 266 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 267 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 268 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 269 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 270 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 271 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 272 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 273 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 275 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 276 // CHECK1-NEXT: store i32 0, ptr [[SIVAR2]], align 4 277 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 278 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 279 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 280 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 281 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 282 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 283 // CHECK1: cond.true: 284 // CHECK1-NEXT: br label [[COND_END:%.*]] 285 // CHECK1: cond.false: 286 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 287 // CHECK1-NEXT: br label [[COND_END]] 288 // CHECK1: cond.end: 289 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 290 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 292 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 293 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 294 // CHECK1: omp.inner.for.cond: 295 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 296 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 298 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 299 // CHECK1: omp.inner.for.body: 300 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 301 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 302 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 303 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 304 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 305 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR2]], align 4 306 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 307 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[SIVAR2]], align 4 308 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 309 // CHECK1: omp.body.continue: 310 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 311 // CHECK1: omp.inner.for.inc: 312 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 313 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 314 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 316 // CHECK1: omp.inner.for.end: 317 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 318 // CHECK1: omp.loop.exit: 319 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 320 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 321 // CHECK1-NEXT: store ptr [[SIVAR2]], ptr [[TMP14]], align 8 322 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 323 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 324 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 325 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 326 // CHECK1-NEXT: ] 327 // CHECK1: .omp.reduction.case1: 328 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 329 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR2]], align 4 330 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 331 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[TMP0]], align 4 332 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 333 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 334 // CHECK1: .omp.reduction.case2: 335 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR2]], align 4 336 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 337 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 338 // CHECK1: .omp.reduction.default: 339 // CHECK1-NEXT: ret void 340 // 341 // 342 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func 343 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 344 // CHECK1-NEXT: entry: 345 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 346 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 347 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 348 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 349 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 350 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 351 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 352 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 353 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 354 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 355 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 356 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 357 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 358 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 359 // CHECK1-NEXT: ret void 360 // 361 // 362 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func 363 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 364 // CHECK1-NEXT: entry: 365 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 366 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 367 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 368 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 369 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 370 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 371 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 372 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 373 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 374 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 375 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 376 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 377 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 378 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 379 // CHECK1-NEXT: ret void 380 // 381 // 382 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 383 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 384 // CHECK1-NEXT: entry: 385 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 386 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 387 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 388 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 389 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 390 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 391 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 392 // CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4 393 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 394 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 395 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP0]], align 8 396 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 397 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP1]], align 8 398 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 399 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 400 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 401 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 402 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 403 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 404 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 405 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 406 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 407 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 408 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 409 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 410 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 411 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 8 412 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 413 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8 414 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 415 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 416 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 417 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 418 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 419 // CHECK1-NEXT: store i64 2, ptr [[TMP13]], align 8 420 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 421 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 422 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 423 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 424 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 425 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 426 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 427 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 428 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 429 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 430 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 431 // CHECK1: omp_offload.failed: 432 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]]) #[[ATTR2]] 433 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 434 // CHECK1: omp_offload.cont: 435 // CHECK1-NEXT: ret i32 0 436 // 437 // 438 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 439 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 440 // CHECK1-NEXT: entry: 441 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 442 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 443 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 444 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[TMP0]]) 445 // CHECK1-NEXT: ret void 446 // 447 // 448 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 449 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 450 // CHECK1-NEXT: entry: 451 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 452 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 453 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 454 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 455 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 458 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 459 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 461 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 462 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 463 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 464 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 465 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 466 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 467 // CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 4 468 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 469 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 470 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 471 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 472 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 473 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 474 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 475 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 476 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 477 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 478 // CHECK1: cond.true: 479 // CHECK1-NEXT: br label [[COND_END:%.*]] 480 // CHECK1: cond.false: 481 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 482 // CHECK1-NEXT: br label [[COND_END]] 483 // CHECK1: cond.end: 484 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 485 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 486 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 487 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 488 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 489 // CHECK1: omp.inner.for.cond: 490 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 491 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 492 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 493 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 494 // CHECK1: omp.inner.for.body: 495 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 496 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 497 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 498 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 499 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[T_VAR1]]) 500 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 501 // CHECK1: omp.inner.for.inc: 502 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 503 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 504 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 505 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 507 // CHECK1: omp.inner.for.end: 508 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 509 // CHECK1: omp.loop.exit: 510 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 511 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 512 // CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 8 513 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 514 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 515 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 516 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 517 // CHECK1-NEXT: ] 518 // CHECK1: .omp.reduction.case1: 519 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 520 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 521 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 522 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 523 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 524 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 525 // CHECK1: .omp.reduction.case2: 526 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 527 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 528 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 529 // CHECK1: .omp.reduction.default: 530 // CHECK1-NEXT: ret void 531 // 532 // 533 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined 534 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 535 // CHECK1-NEXT: entry: 536 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 537 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 538 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 539 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 540 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 541 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 542 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 543 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 544 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 545 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 546 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 547 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 548 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 549 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 550 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 551 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 552 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 553 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 554 // CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 555 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 556 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 557 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 558 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 559 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 560 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 561 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 562 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 563 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 564 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 565 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 566 // CHECK1-NEXT: store i32 0, ptr [[T_VAR2]], align 4 567 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 568 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 569 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 570 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 571 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 572 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 573 // CHECK1: cond.true: 574 // CHECK1-NEXT: br label [[COND_END:%.*]] 575 // CHECK1: cond.false: 576 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 577 // CHECK1-NEXT: br label [[COND_END]] 578 // CHECK1: cond.end: 579 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 580 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 581 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 582 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 583 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 584 // CHECK1: omp.inner.for.cond: 585 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 586 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 587 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 588 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 589 // CHECK1: omp.inner.for.body: 590 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 591 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 592 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 593 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 594 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 595 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4 596 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 597 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[T_VAR2]], align 4 598 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 599 // CHECK1: omp.body.continue: 600 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 601 // CHECK1: omp.inner.for.inc: 602 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 603 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 604 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 605 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 606 // CHECK1: omp.inner.for.end: 607 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 608 // CHECK1: omp.loop.exit: 609 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 610 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 611 // CHECK1-NEXT: store ptr [[T_VAR2]], ptr [[TMP14]], align 8 612 // CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 613 // CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 614 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 615 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 616 // CHECK1-NEXT: ] 617 // CHECK1: .omp.reduction.case1: 618 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 619 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR2]], align 4 620 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 621 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[TMP0]], align 4 622 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 623 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 624 // CHECK1: .omp.reduction.case2: 625 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR2]], align 4 626 // CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 627 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 628 // CHECK1: .omp.reduction.default: 629 // CHECK1-NEXT: ret void 630 // 631 // 632 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func 633 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 634 // CHECK1-NEXT: entry: 635 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 636 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 637 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 638 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 639 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 640 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 641 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 642 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 643 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 644 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 645 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 646 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 647 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 648 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 649 // CHECK1-NEXT: ret void 650 // 651 // 652 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 653 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 654 // CHECK1-NEXT: entry: 655 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 656 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 657 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 658 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 659 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 660 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 661 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 662 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 663 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 664 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 665 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 666 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 667 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 668 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 669 // CHECK1-NEXT: ret void 670 // 671 // 672 // CHECK3-LABEL: define {{[^@]+}}@main 673 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 674 // CHECK3-NEXT: entry: 675 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 676 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 677 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 678 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 679 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 680 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 681 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 682 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 683 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 4 684 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 685 // CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP1]], align 4 686 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 687 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 688 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 689 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 690 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 691 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 692 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 693 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 694 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 695 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 696 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 697 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 698 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 699 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 700 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 701 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 702 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 703 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 704 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 705 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 706 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 707 // CHECK3-NEXT: store i64 2, ptr [[TMP13]], align 8 708 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 709 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 710 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 711 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 712 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 713 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 714 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 715 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 716 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.region_id, ptr [[KERNEL_ARGS]]) 717 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 718 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 719 // CHECK3: omp_offload.failed: 720 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66(ptr @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]] 721 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 722 // CHECK3: omp_offload.cont: 723 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 724 // CHECK3-NEXT: ret i32 [[CALL]] 725 // 726 // 727 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 728 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 729 // CHECK3-NEXT: entry: 730 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 731 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 732 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 733 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]]) 734 // CHECK3-NEXT: ret void 735 // 736 // 737 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined 738 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 739 // CHECK3-NEXT: entry: 740 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 741 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 742 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 743 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 744 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 745 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 746 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 747 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 748 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 749 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 750 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 751 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 752 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 753 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 754 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 755 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 756 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 757 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 758 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 759 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 760 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 761 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 762 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 763 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 764 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 765 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 766 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 767 // CHECK3: cond.true: 768 // CHECK3-NEXT: br label [[COND_END:%.*]] 769 // CHECK3: cond.false: 770 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 771 // CHECK3-NEXT: br label [[COND_END]] 772 // CHECK3: cond.end: 773 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 774 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 775 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 776 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 777 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 778 // CHECK3: omp.inner.for.cond: 779 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 780 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 781 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 782 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 783 // CHECK3: omp.inner.for.body: 784 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 785 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 786 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[SIVAR1]]) 787 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 788 // CHECK3: omp.inner.for.inc: 789 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 790 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 791 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 792 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 793 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 794 // CHECK3: omp.inner.for.end: 795 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 796 // CHECK3: omp.loop.exit: 797 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 798 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 799 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 4 800 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 801 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 802 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 803 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 804 // CHECK3-NEXT: ] 805 // CHECK3: .omp.reduction.case1: 806 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 807 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4 808 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 809 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 810 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 811 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 812 // CHECK3: .omp.reduction.case2: 813 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4 814 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 815 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 816 // CHECK3: .omp.reduction.default: 817 // CHECK3-NEXT: ret void 818 // 819 // 820 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined 821 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 822 // CHECK3-NEXT: entry: 823 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 824 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 825 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 826 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 827 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 4 828 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 829 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 830 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 831 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 832 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 833 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 834 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 835 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 836 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 837 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 838 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 839 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 840 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 841 // CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 4 842 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 4 843 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 844 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 845 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 846 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 847 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 848 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 849 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 850 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 851 // CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 4 852 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 853 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 854 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 855 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 856 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 857 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 858 // CHECK3: cond.true: 859 // CHECK3-NEXT: br label [[COND_END:%.*]] 860 // CHECK3: cond.false: 861 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 862 // CHECK3-NEXT: br label [[COND_END]] 863 // CHECK3: cond.end: 864 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 865 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 866 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 867 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 868 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 869 // CHECK3: omp.inner.for.cond: 870 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 871 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 872 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 873 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 874 // CHECK3: omp.inner.for.body: 875 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 876 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 877 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 878 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 879 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 880 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR1]], align 4 881 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 882 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4 883 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 884 // CHECK3: omp.body.continue: 885 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 886 // CHECK3: omp.inner.for.inc: 887 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 888 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 889 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 890 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 891 // CHECK3: omp.inner.for.end: 892 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 893 // CHECK3: omp.loop.exit: 894 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 895 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 896 // CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 4 897 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 898 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 899 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 900 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 901 // CHECK3-NEXT: ] 902 // CHECK3: .omp.reduction.case1: 903 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 904 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 905 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 906 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 907 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 908 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 909 // CHECK3: .omp.reduction.case2: 910 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR1]], align 4 911 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 912 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 913 // CHECK3: .omp.reduction.default: 914 // CHECK3-NEXT: ret void 915 // 916 // 917 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp_outlined.omp.reduction.reduction_func 918 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 919 // CHECK3-NEXT: entry: 920 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 921 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 922 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 923 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 924 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 925 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 926 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 927 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 928 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 929 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 930 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 931 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 932 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 933 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 934 // CHECK3-NEXT: ret void 935 // 936 // 937 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined.omp.reduction.reduction_func 938 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 939 // CHECK3-NEXT: entry: 940 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 941 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 942 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 943 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 944 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 945 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 946 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 947 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 948 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 949 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 950 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 951 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 952 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 953 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 954 // CHECK3-NEXT: ret void 955 // 956 // 957 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 958 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 959 // CHECK3-NEXT: entry: 960 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 961 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 962 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 963 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 964 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 965 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 966 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 967 // CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4 968 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 969 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 970 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP0]], align 4 971 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 972 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP1]], align 4 973 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 974 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 975 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 976 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 977 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 978 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 979 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 980 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 981 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 982 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 983 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 984 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 985 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 986 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 4 987 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 988 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4 989 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 990 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 991 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 992 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 993 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 994 // CHECK3-NEXT: store i64 2, ptr [[TMP13]], align 8 995 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 996 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 997 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 998 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 999 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1000 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1001 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1002 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 1003 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]]) 1004 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1005 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1006 // CHECK3: omp_offload.failed: 1007 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]]) #[[ATTR2]] 1008 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1009 // CHECK3: omp_offload.cont: 1010 // CHECK3-NEXT: ret i32 0 1011 // 1012 // 1013 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 1014 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1015 // CHECK3-NEXT: entry: 1016 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1017 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1018 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1019 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[TMP0]]) 1020 // CHECK3-NEXT: ret void 1021 // 1022 // 1023 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined 1024 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1025 // CHECK3-NEXT: entry: 1026 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1027 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1028 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1029 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1030 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1031 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1032 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1033 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1034 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1035 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1036 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1037 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 1038 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1039 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1040 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1041 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1042 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 1043 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1044 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1045 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1046 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1047 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1048 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1049 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1050 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1051 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1052 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1053 // CHECK3: cond.true: 1054 // CHECK3-NEXT: br label [[COND_END:%.*]] 1055 // CHECK3: cond.false: 1056 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1057 // CHECK3-NEXT: br label [[COND_END]] 1058 // CHECK3: cond.end: 1059 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1060 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1061 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1062 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1063 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1064 // CHECK3: omp.inner.for.cond: 1065 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1066 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1067 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1068 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1069 // CHECK3: omp.inner.for.body: 1070 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1071 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1072 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[T_VAR1]]) 1073 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1074 // CHECK3: omp.inner.for.inc: 1075 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1076 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1077 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1078 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1079 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1080 // CHECK3: omp.inner.for.end: 1081 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1082 // CHECK3: omp.loop.exit: 1083 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1084 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1085 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 4 1086 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1087 // CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1088 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1089 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1090 // CHECK3-NEXT: ] 1091 // CHECK3: .omp.reduction.case1: 1092 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4 1093 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 4 1094 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1095 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 1096 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1097 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1098 // CHECK3: .omp.reduction.case2: 1099 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 4 1100 // CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4 1101 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1102 // CHECK3: .omp.reduction.default: 1103 // CHECK3-NEXT: ret void 1104 // 1105 // 1106 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined 1107 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1108 // CHECK3-NEXT: entry: 1109 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1110 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1111 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1112 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1113 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1114 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1115 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1116 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1117 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1118 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1119 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1120 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1121 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1122 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 4 1123 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1124 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1125 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1126 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1127 // CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1128 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1129 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1130 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1131 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1132 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1133 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4 1134 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 1135 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1136 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1137 // CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 4 1138 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1139 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1140 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1141 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1142 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1143 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1144 // CHECK3: cond.true: 1145 // CHECK3-NEXT: br label [[COND_END:%.*]] 1146 // CHECK3: cond.false: 1147 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1148 // CHECK3-NEXT: br label [[COND_END]] 1149 // CHECK3: cond.end: 1150 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1151 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1152 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1153 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1154 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1155 // CHECK3: omp.inner.for.cond: 1156 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1157 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1158 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1159 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1160 // CHECK3: omp.inner.for.body: 1161 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1162 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1163 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1164 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1165 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1166 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR1]], align 4 1167 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1168 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 4 1169 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1170 // CHECK3: omp.body.continue: 1171 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1172 // CHECK3: omp.inner.for.inc: 1173 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1174 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 1175 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1176 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1177 // CHECK3: omp.inner.for.end: 1178 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1179 // CHECK3: omp.loop.exit: 1180 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1181 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1182 // CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 4 1183 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1184 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1185 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1186 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1187 // CHECK3-NEXT: ] 1188 // CHECK3: .omp.reduction.case1: 1189 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 1190 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 4 1191 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1192 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4 1193 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 1194 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1195 // CHECK3: .omp.reduction.case2: 1196 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 4 1197 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 1198 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1199 // CHECK3: .omp.reduction.default: 1200 // CHECK3-NEXT: ret void 1201 // 1202 // 1203 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp_outlined.omp.reduction.reduction_func 1204 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1205 // CHECK3-NEXT: entry: 1206 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 1207 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 1208 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 1209 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 1210 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 1211 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 1212 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 1213 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 1214 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 1215 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 1216 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1217 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1218 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1219 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1220 // CHECK3-NEXT: ret void 1221 // 1222 // 1223 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func 1224 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] { 1225 // CHECK3-NEXT: entry: 1226 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 1227 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 4 1228 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 1229 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 4 1230 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 4 1231 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 4 1232 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 0 1233 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 4 1234 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 0 1235 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 4 1236 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1237 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1238 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1239 // CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1240 // CHECK3-NEXT: ret void 1241 // 1242 // 1243 // CHECK5-LABEL: define {{[^@]+}}@main 1244 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1245 // CHECK5-NEXT: entry: 1246 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1247 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1248 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 1249 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1250 // CHECK5-NEXT: ret i32 0 1251 // 1252 // 1253 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44 1254 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 1255 // CHECK5-NEXT: entry: 1256 // CHECK5-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1257 // CHECK5-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1258 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1259 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined, ptr [[TMP0]]) 1260 // CHECK5-NEXT: ret void 1261 // 1262 // 1263 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined 1264 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 1265 // CHECK5-NEXT: entry: 1266 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1267 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1268 // CHECK5-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1269 // CHECK5-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1270 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1271 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1272 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1273 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1274 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1275 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1276 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1277 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1278 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1279 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1280 // CHECK5-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1281 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1282 // CHECK5-NEXT: store i32 0, ptr [[SIVAR1]], align 4 1283 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1284 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1285 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1286 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1287 // CHECK5-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1288 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1289 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1290 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1291 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1292 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1293 // CHECK5: cond.true: 1294 // CHECK5-NEXT: br label [[COND_END:%.*]] 1295 // CHECK5: cond.false: 1296 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1297 // CHECK5-NEXT: br label [[COND_END]] 1298 // CHECK5: cond.end: 1299 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1300 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1301 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1302 // CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1303 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1304 // CHECK5: omp.inner.for.cond: 1305 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1306 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1307 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1308 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1309 // CHECK5: omp.inner.for.body: 1310 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1311 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1312 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1313 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1314 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[SIVAR1]]) 1315 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1316 // CHECK5: omp.inner.for.inc: 1317 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1318 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1319 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1320 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1321 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1322 // CHECK5: omp.inner.for.end: 1323 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1324 // CHECK5: omp.loop.exit: 1325 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1326 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1327 // CHECK5-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 8 1328 // CHECK5-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1329 // CHECK5-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1330 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1331 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1332 // CHECK5-NEXT: ] 1333 // CHECK5: .omp.reduction.case1: 1334 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 4 1335 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 4 1336 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1337 // CHECK5-NEXT: store i32 [[ADD3]], ptr [[TMP0]], align 4 1338 // CHECK5-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var) 1339 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1340 // CHECK5: .omp.reduction.case2: 1341 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR1]], align 4 1342 // CHECK5-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 4 1343 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1344 // CHECK5: .omp.reduction.default: 1345 // CHECK5-NEXT: ret void 1346 // 1347 // 1348 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined 1349 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 1350 // CHECK5-NEXT: entry: 1351 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1352 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1353 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1354 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1355 // CHECK5-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8 1356 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1357 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1358 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1359 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1360 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1361 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1362 // CHECK5-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 1363 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1364 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1365 // CHECK5-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8 1366 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1367 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1368 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1369 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1370 // CHECK5-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8 1371 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8 1372 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1373 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1374 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1375 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1376 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1377 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1378 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1379 // CHECK5-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1380 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1381 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1382 // CHECK5-NEXT: store i32 0, ptr [[SIVAR2]], align 4 1383 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1384 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 1385 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1386 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1387 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1388 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1389 // CHECK5: cond.true: 1390 // CHECK5-NEXT: br label [[COND_END:%.*]] 1391 // CHECK5: cond.false: 1392 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1393 // CHECK5-NEXT: br label [[COND_END]] 1394 // CHECK5: cond.end: 1395 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1396 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1397 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1398 // CHECK5-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 1399 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1400 // CHECK5: omp.inner.for.cond: 1401 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1402 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1403 // CHECK5-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1404 // CHECK5-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1405 // CHECK5: omp.inner.for.body: 1406 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1407 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1408 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1409 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1410 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1411 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[SIVAR2]], align 4 1412 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1413 // CHECK5-NEXT: store i32 [[ADD4]], ptr [[SIVAR2]], align 4 1414 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 1415 // CHECK5-NEXT: store ptr [[SIVAR2]], ptr [[TMP13]], align 8 1416 // CHECK5-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 1417 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1418 // CHECK5: omp.body.continue: 1419 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1420 // CHECK5: omp.inner.for.inc: 1421 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1422 // CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1423 // CHECK5-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 1424 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1425 // CHECK5: omp.inner.for.end: 1426 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1427 // CHECK5: omp.loop.exit: 1428 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]]) 1429 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1430 // CHECK5-NEXT: store ptr [[SIVAR2]], ptr [[TMP15]], align 8 1431 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 1432 // CHECK5-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1433 // CHECK5-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1434 // CHECK5-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1435 // CHECK5-NEXT: ] 1436 // CHECK5: .omp.reduction.case1: 1437 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP0]], align 4 1438 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, ptr [[SIVAR2]], align 4 1439 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1440 // CHECK5-NEXT: store i32 [[ADD6]], ptr [[TMP0]], align 4 1441 // CHECK5-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB3]], i32 [[TMP4]], ptr @.gomp_critical_user_.reduction.var) 1442 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1443 // CHECK5: .omp.reduction.case2: 1444 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR2]], align 4 1445 // CHECK5-NEXT: [[TMP20:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP19]] monotonic, align 4 1446 // CHECK5-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1447 // CHECK5: .omp.reduction.default: 1448 // CHECK5-NEXT: ret void 1449 // 1450 // 1451 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp_outlined.omp.reduction.reduction_func 1452 // CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1453 // CHECK5-NEXT: entry: 1454 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1455 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1456 // CHECK5-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1457 // CHECK5-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1458 // CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1459 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1460 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1461 // CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1462 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1463 // CHECK5-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1464 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1465 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1466 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1467 // CHECK5-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1468 // CHECK5-NEXT: ret void 1469 // 1470 // 1471 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l44.omp_outlined.omp.reduction.reduction_func 1472 // CHECK5-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 1473 // CHECK5-NEXT: entry: 1474 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1475 // CHECK5-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 1476 // CHECK5-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1477 // CHECK5-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 1478 // CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 1479 // CHECK5-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 1480 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0 1481 // CHECK5-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 1482 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0 1483 // CHECK5-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 1484 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1485 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4 1486 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 1487 // CHECK5-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 1488 // CHECK5-NEXT: ret void 1489 // 1490