1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // add -fopenmp-targets 3 4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 6 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 12 // expected-no-diagnostics 13 #ifndef HEADER 14 #define HEADER 15 16 typedef __INTPTR_TYPE__ intptr_t; 17 18 19 void foo(); 20 21 struct S { 22 intptr_t a, b, c; 23 S(intptr_t a) : a(a) {} 24 operator char() { return a; } 25 ~S() {} 26 }; 27 28 template <typename T> 29 T tmain() { 30 #pragma omp target teams distribute parallel for proc_bind(master) 31 for(int i = 0; i < 1000; i++) {} 32 return T(); 33 } 34 35 int main() { 36 #pragma omp target teams distribute parallel for proc_bind(spread) 37 for(int i = 0; i < 1000; i++) {} 38 #pragma omp target teams distribute parallel for proc_bind(close) 39 for(int i = 0; i < 1000; i++) {} 40 return tmain<int>(); 41 } 42 43 44 45 46 47 48 49 50 #endif 51 // CHECK1-LABEL: define {{[^@]+}}@main 52 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 53 // CHECK1-NEXT: entry: 54 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 55 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 56 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 57 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 58 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 59 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 60 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 61 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 62 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 63 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 64 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 65 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 66 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 67 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 68 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 69 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 70 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 71 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 72 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 73 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 74 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 75 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 76 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 77 // CHECK1-NEXT: store i64 1000, ptr [[TMP8]], align 8 78 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 79 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 80 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 81 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 82 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 83 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 84 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 85 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 86 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.region_id, ptr [[KERNEL_ARGS]]) 87 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 88 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 89 // CHECK1: omp_offload.failed: 90 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36() #[[ATTR2:[0-9]+]] 91 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 92 // CHECK1: omp_offload.cont: 93 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 94 // CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4 95 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 96 // CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4 97 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 98 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 99 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 100 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 101 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 102 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 103 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 104 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 105 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 106 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 107 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 108 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 109 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 110 // CHECK1-NEXT: store i64 1000, ptr [[TMP23]], align 8 111 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 112 // CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8 113 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 114 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4 115 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 116 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4 117 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 118 // CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4 119 // CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38.region_id, ptr [[KERNEL_ARGS2]]) 120 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 121 // CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 122 // CHECK1: omp_offload.failed3: 123 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38() #[[ATTR2]] 124 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 125 // CHECK1: omp_offload.cont4: 126 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 127 // CHECK1-NEXT: ret i32 [[CALL]] 128 // 129 // 130 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36 131 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 132 // CHECK1-NEXT: entry: 133 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.omp_outlined) 134 // CHECK1-NEXT: ret void 135 // 136 // 137 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.omp_outlined 138 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 141 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 142 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 143 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 146 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 150 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 151 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 152 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_COMB_UB]], align 4 153 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 154 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 155 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 156 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 157 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 158 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 159 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999 160 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 161 // CHECK1: cond.true: 162 // CHECK1-NEXT: br label [[COND_END:%.*]] 163 // CHECK1: cond.false: 164 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 165 // CHECK1-NEXT: br label [[COND_END]] 166 // CHECK1: cond.end: 167 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 168 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 169 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 170 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 171 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 172 // CHECK1: omp.inner.for.cond: 173 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 174 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 175 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 176 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 177 // CHECK1: omp.inner.for.body: 178 // CHECK1-NEXT: call void @__kmpc_push_proc_bind(ptr @[[GLOB3]], i32 [[TMP1]], i32 4) 179 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 181 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 182 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 183 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 184 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 185 // CHECK1: omp.inner.for.inc: 186 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 187 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 188 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 189 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 190 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 191 // CHECK1: omp.inner.for.end: 192 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 193 // CHECK1: omp.loop.exit: 194 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 195 // CHECK1-NEXT: ret void 196 // 197 // 198 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.omp_outlined.omp_outlined 199 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 200 // CHECK1-NEXT: entry: 201 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 202 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 203 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 204 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 205 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 206 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 207 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 208 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 213 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 214 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 215 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 216 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 217 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_UB]], align 4 218 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 219 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 220 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 221 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 222 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 223 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 224 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 225 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 226 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 227 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 228 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 229 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 230 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999 231 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 232 // CHECK1: cond.true: 233 // CHECK1-NEXT: br label [[COND_END:%.*]] 234 // CHECK1: cond.false: 235 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 236 // CHECK1-NEXT: br label [[COND_END]] 237 // CHECK1: cond.end: 238 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 239 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 240 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 241 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 243 // CHECK1: omp.inner.for.cond: 244 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 245 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 246 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 247 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 248 // CHECK1: omp.inner.for.body: 249 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 250 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 251 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 252 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 253 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 254 // CHECK1: omp.body.continue: 255 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 256 // CHECK1: omp.inner.for.inc: 257 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 258 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 259 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 261 // CHECK1: omp.inner.for.end: 262 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 263 // CHECK1: omp.loop.exit: 264 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 265 // CHECK1-NEXT: ret void 266 // 267 // 268 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38 269 // CHECK1-SAME: () #[[ATTR1]] { 270 // CHECK1-NEXT: entry: 271 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38.omp_outlined) 272 // CHECK1-NEXT: ret void 273 // 274 // 275 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38.omp_outlined 276 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 277 // CHECK1-NEXT: entry: 278 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 279 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 280 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 281 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 282 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 283 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 284 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 285 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 286 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 287 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 288 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 289 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 290 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_COMB_UB]], align 4 291 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 292 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 293 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 294 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 295 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 296 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 297 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999 298 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 299 // CHECK1: cond.true: 300 // CHECK1-NEXT: br label [[COND_END:%.*]] 301 // CHECK1: cond.false: 302 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 303 // CHECK1-NEXT: br label [[COND_END]] 304 // CHECK1: cond.end: 305 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 306 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 307 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 308 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 310 // CHECK1: omp.inner.for.cond: 311 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 312 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 313 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 314 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 315 // CHECK1: omp.inner.for.body: 316 // CHECK1-NEXT: call void @__kmpc_push_proc_bind(ptr @[[GLOB3]], i32 [[TMP1]], i32 3) 317 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 318 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 319 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 320 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 321 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 322 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 323 // CHECK1: omp.inner.for.inc: 324 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 325 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 326 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 327 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 328 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 329 // CHECK1: omp.inner.for.end: 330 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 331 // CHECK1: omp.loop.exit: 332 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 333 // CHECK1-NEXT: ret void 334 // 335 // 336 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38.omp_outlined.omp_outlined 337 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 338 // CHECK1-NEXT: entry: 339 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 340 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 341 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 342 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 343 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 344 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 345 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 346 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 347 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 348 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 349 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 351 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 352 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 353 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 354 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 355 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_UB]], align 4 356 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 357 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 358 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 359 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 360 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 361 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 362 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 363 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 364 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 365 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 366 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 367 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 368 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999 369 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 370 // CHECK1: cond.true: 371 // CHECK1-NEXT: br label [[COND_END:%.*]] 372 // CHECK1: cond.false: 373 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 374 // CHECK1-NEXT: br label [[COND_END]] 375 // CHECK1: cond.end: 376 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 377 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 378 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 379 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 380 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 381 // CHECK1: omp.inner.for.cond: 382 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 383 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 384 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 385 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 386 // CHECK1: omp.inner.for.body: 387 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 388 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 389 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 390 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 391 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 392 // CHECK1: omp.body.continue: 393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 394 // CHECK1: omp.inner.for.inc: 395 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 397 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 398 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 399 // CHECK1: omp.inner.for.end: 400 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 401 // CHECK1: omp.loop.exit: 402 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 403 // CHECK1-NEXT: ret void 404 // 405 // 406 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 407 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat { 408 // CHECK1-NEXT: entry: 409 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 411 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 412 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 413 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 414 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 415 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 416 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 417 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 418 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 419 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 420 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 421 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 422 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 423 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 424 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 425 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 426 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 427 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 428 // CHECK1-NEXT: store i64 1000, ptr [[TMP8]], align 8 429 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 430 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 431 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 432 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 433 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 434 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 435 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 436 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 437 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30.region_id, ptr [[KERNEL_ARGS]]) 438 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 439 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 440 // CHECK1: omp_offload.failed: 441 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30() #[[ATTR2]] 442 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 443 // CHECK1: omp_offload.cont: 444 // CHECK1-NEXT: ret i32 0 445 // 446 // 447 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30 448 // CHECK1-SAME: () #[[ATTR1]] { 449 // CHECK1-NEXT: entry: 450 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30.omp_outlined) 451 // CHECK1-NEXT: ret void 452 // 453 // 454 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30.omp_outlined 455 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 456 // CHECK1-NEXT: entry: 457 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 458 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 459 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 461 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 462 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 463 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 464 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 465 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 466 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 467 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 468 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 469 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_COMB_UB]], align 4 470 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 471 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 472 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 473 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 474 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 475 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 476 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999 477 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 478 // CHECK1: cond.true: 479 // CHECK1-NEXT: br label [[COND_END:%.*]] 480 // CHECK1: cond.false: 481 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 482 // CHECK1-NEXT: br label [[COND_END]] 483 // CHECK1: cond.end: 484 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 485 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 486 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 487 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 488 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 489 // CHECK1: omp.inner.for.cond: 490 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 491 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 492 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 493 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 494 // CHECK1: omp.inner.for.body: 495 // CHECK1-NEXT: call void @__kmpc_push_proc_bind(ptr @[[GLOB3]], i32 [[TMP1]], i32 2) 496 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 497 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 498 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 499 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 500 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 502 // CHECK1: omp.inner.for.inc: 503 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 504 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 505 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 506 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 507 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 508 // CHECK1: omp.inner.for.end: 509 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 510 // CHECK1: omp.loop.exit: 511 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 512 // CHECK1-NEXT: ret void 513 // 514 // 515 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30.omp_outlined.omp_outlined 516 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 517 // CHECK1-NEXT: entry: 518 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 519 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 520 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 521 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 522 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 523 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 524 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 525 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 526 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 527 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 528 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 529 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 530 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 531 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 532 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 533 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 534 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_UB]], align 4 535 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 536 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 537 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 538 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 539 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 540 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 541 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 542 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 543 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 544 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 545 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 546 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 547 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999 548 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 549 // CHECK1: cond.true: 550 // CHECK1-NEXT: br label [[COND_END:%.*]] 551 // CHECK1: cond.false: 552 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 553 // CHECK1-NEXT: br label [[COND_END]] 554 // CHECK1: cond.end: 555 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 556 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 557 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 558 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 559 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 560 // CHECK1: omp.inner.for.cond: 561 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 562 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 563 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 564 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 565 // CHECK1: omp.inner.for.body: 566 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 567 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 568 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 569 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 570 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 571 // CHECK1: omp.body.continue: 572 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 573 // CHECK1: omp.inner.for.inc: 574 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 575 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 576 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 577 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 578 // CHECK1: omp.inner.for.end: 579 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 580 // CHECK1: omp.loop.exit: 581 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 582 // CHECK1-NEXT: ret void 583 // 584