1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK5 12 13 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 24 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region) 25 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 26 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK13 27 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 28 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK13 29 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 30 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK15 31 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 32 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK15 33 34 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 35 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK17 36 37 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 38 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 39 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 40 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 41 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 42 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 43 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 44 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 45 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 46 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 47 48 // expected-no-diagnostics 49 #ifndef HEADER 50 #define HEADER 51 52 struct St { 53 int a, b; 54 St() : a(0), b(0) {} 55 St(const St &st) : a(st.a + st.b), b(0) {} 56 ~St() {} 57 }; 58 59 volatile int g = 1212; 60 volatile int &g1 = g; 61 62 template <class T> 63 struct S { 64 T f; 65 S(T a) : f(a + g) {} 66 S() : f(g) {} 67 S(const S &s, St t = St()) : f(s.f + t.a) {} 68 operator T() { return T(); } 69 ~S() {} 70 }; 71 72 73 template <typename T> 74 T tmain() { 75 S<T> test; 76 T t_var = T(); 77 T vec[] = {1, 2}; 78 S<T> s_arr[] = {1, 2}; 79 S<T> &var = test; 80 #pragma omp target teams distribute parallel for private(t_var, vec, s_arr, var) 81 for (int i = 0; i < 2; ++i) { 82 vec[i] = t_var; 83 s_arr[i] = var; 84 } 85 return T(); 86 } 87 88 // HCHECK-DAG: [[TEST:@.+]] ={{.*}} global [[S_FLOAT_TY]] zeroinitializer, 89 S<float> test; 90 // HCHECK-DAG: [[T_VAR:@.+]] ={{.+}} global i{{[0-9]+}} 333, 91 int t_var = 333; 92 // HCHECK-DAG: [[VEC:@.+]] ={{.+}} global [2 x i{{[0-9]+}}] [i{{[0-9]+}} 1, i{{[0-9]+}} 2], 93 int vec[] = {1, 2}; 94 // HCHECK-DAG: [[S_ARR:@.+]] ={{.+}} global [2 x [[S_FLOAT_TY]]] zeroinitializer, 95 S<float> s_arr[] = {1, 2}; 96 // HCHECK-DAG: [[VAR:@.+]] ={{.+}} global [[S_FLOAT_TY]] zeroinitializer, 97 S<float> var(3); 98 // HCHECK-DAG: [[SIVAR:@.+]] = internal global i{{[0-9]+}} 0, 99 100 int main() { 101 static int sivar; 102 #ifdef LAMBDA 103 [&]() { 104 #pragma omp target teams distribute parallel for private(g, g1, sivar) 105 for (int i = 0; i < 2; ++i) { 106 107 // Skip global, bound tid and loop vars 108 109 g = 1; 110 g1 = 1; 111 sivar = 2; 112 113 // Skip global, bound tid and loop vars 114 [&]() { 115 g = 2; 116 g1 = 2; 117 sivar = 4; 118 119 }(); 120 } 121 }(); 122 return 0; 123 #else 124 #pragma omp target teams distribute parallel for private(t_var, vec, s_arr, var, sivar) 125 for (int i = 0; i < 2; ++i) { 126 vec[i] = t_var; 127 s_arr[i] = var; 128 sivar += i; 129 } 130 return tmain<int>(); 131 #endif 132 } 133 134 // HCHECK: define {{.*}}i{{[0-9]+}} @main() 135 // HCHECK: call i32 @__tgt_target_teams_mapper(ptr @{{.+}}, i64 -1, ptr @{{[^,]+}}, i32 0, ptr null, ptr null, {{.+}} null, {{.+}} null, ptr null, ptr null, i32 0, i32 0) 136 // HCHECK: call void @[[OFFL1:.+]]() 137 // HCHECK: {{%.+}} = call{{.*}} i32 @[[TMAIN_INT:.+]]() 138 // HCHECK: ret 139 140 // HCHECK: define{{.*}} void @[[OFFL1]]() 141 142 // Skip global, bound tid and loop vars 143 144 // private(s_arr) 145 146 // private(var) 147 148 149 // Skip global, bound tid and loop vars 150 151 // private(s_arr) 152 153 // private(var) 154 155 156 // HCHECK: define{{.*}} i{{[0-9]+}} @[[TMAIN_INT]]() 157 // HCHECK: call i32 @__tgt_target_teams_mapper(ptr @{{.+}}, i64 -1, ptr @{{[^,]+}}, i32 0, 158 // HCHECK: call void @[[TOFFL1:.+]]() 159 // HCHECK: ret 160 161 // HCHECK: define {{.*}}void @[[TOFFL1]]() 162 163 // Skip global, bound tid and loop vars 164 165 // private(s_arr) 166 167 168 // private(var) 169 170 171 // Skip global, bound tid and loop vars 172 // prev lb and ub 173 // iter variables 174 175 // private(s_arr) 176 177 178 // private(var) 179 180 181 182 #endif 183 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init 184 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 185 // CHECK1-NEXT: entry: 186 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test) 187 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]] 188 // CHECK1-NEXT: ret void 189 // 190 // 191 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 192 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 193 // CHECK1-NEXT: entry: 194 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 195 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 196 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 197 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 198 // CHECK1-NEXT: ret void 199 // 200 // 201 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 202 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 203 // CHECK1-NEXT: entry: 204 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 205 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 206 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 207 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 208 // CHECK1-NEXT: ret void 209 // 210 // 211 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 212 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 213 // CHECK1-NEXT: entry: 214 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 215 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 216 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 217 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 218 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 219 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 220 // CHECK1-NEXT: store float [[CONV]], ptr [[F]], align 4 221 // CHECK1-NEXT: ret void 222 // 223 // 224 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 225 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 226 // CHECK1-NEXT: entry: 227 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 228 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 229 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 234 // CHECK1-SAME: () #[[ATTR0]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00) 237 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 1), float noundef 2.000000e+00) 238 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]] 239 // CHECK1-NEXT: ret void 240 // 241 // 242 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 243 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 244 // CHECK1-NEXT: entry: 245 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 246 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 247 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 248 // CHECK1-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 249 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 250 // CHECK1-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 251 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 252 // CHECK1-NEXT: ret void 253 // 254 // 255 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 256 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] { 257 // CHECK1-NEXT: entry: 258 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 259 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 260 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 261 // CHECK1: arraydestroy.body: 262 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 263 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 264 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 265 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr 266 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 267 // CHECK1: arraydestroy.done1: 268 // CHECK1-NEXT: ret void 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 272 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 275 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 276 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 277 // CHECK1-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 278 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 279 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 280 // CHECK1-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 281 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4 282 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 283 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 284 // CHECK1-NEXT: store float [[ADD]], ptr [[F]], align 4 285 // CHECK1-NEXT: ret void 286 // 287 // 288 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 289 // CHECK1-SAME: () #[[ATTR0]] { 290 // CHECK1-NEXT: entry: 291 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00) 292 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]] 293 // CHECK1-NEXT: ret void 294 // 295 // 296 // CHECK1-LABEL: define {{[^@]+}}@main 297 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 298 // CHECK1-NEXT: entry: 299 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 302 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 303 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 304 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 305 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 306 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 307 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 308 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 309 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 310 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 311 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 312 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 313 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 314 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 315 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 316 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 317 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 318 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 319 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 320 // CHECK1-NEXT: store i64 2, ptr [[TMP8]], align 8 321 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 322 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 323 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 324 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 325 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 326 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 327 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 328 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 329 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.region_id, ptr [[KERNEL_ARGS]]) 330 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 331 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 332 // CHECK1: omp_offload.failed: 333 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124() #[[ATTR2]] 334 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 335 // CHECK1: omp_offload.cont: 336 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 337 // CHECK1-NEXT: ret i32 [[CALL]] 338 // 339 // 340 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124 341 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 342 // CHECK1-NEXT: entry: 343 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined) 344 // CHECK1-NEXT: ret void 345 // 346 // 347 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined 348 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 349 // CHECK1-NEXT: entry: 350 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 351 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 352 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 354 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 355 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 356 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 357 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 358 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 359 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 360 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 361 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 362 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 363 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 365 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 366 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 367 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 368 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 369 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 370 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 371 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 372 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 373 // CHECK1: arrayctor.loop: 374 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 375 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 376 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 377 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 378 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 379 // CHECK1: arrayctor.cont: 380 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 381 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 382 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 383 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 384 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 385 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 386 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 387 // CHECK1: cond.true: 388 // CHECK1-NEXT: br label [[COND_END:%.*]] 389 // CHECK1: cond.false: 390 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 391 // CHECK1-NEXT: br label [[COND_END]] 392 // CHECK1: cond.end: 393 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 394 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 395 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 396 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 397 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 398 // CHECK1: omp.inner.for.cond: 399 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 400 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 401 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 402 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 403 // CHECK1: omp.inner.for.cond.cleanup: 404 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 405 // CHECK1: omp.inner.for.body: 406 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 407 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 408 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 409 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 410 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 412 // CHECK1: omp.inner.for.inc: 413 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 414 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 415 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 416 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 417 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 418 // CHECK1: omp.inner.for.end: 419 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 420 // CHECK1: omp.loop.exit: 421 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 422 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 423 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 424 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 425 // CHECK1-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 426 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i64 2 427 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 428 // CHECK1: arraydestroy.body: 429 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 430 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 431 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 432 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 433 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 434 // CHECK1: arraydestroy.done3: 435 // CHECK1-NEXT: ret void 436 // 437 // 438 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined 439 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 440 // CHECK1-NEXT: entry: 441 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 442 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 443 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 444 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 445 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 446 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 447 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 448 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 449 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 450 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 451 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 452 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 453 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 454 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 455 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 458 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 459 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 460 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 461 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 462 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 463 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 464 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 465 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 466 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 467 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 468 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 469 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 470 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 471 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 472 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 473 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 474 // CHECK1: arrayctor.loop: 475 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 476 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 477 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 478 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 479 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 480 // CHECK1: arrayctor.cont: 481 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 482 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 483 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 484 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 485 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 486 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 487 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 488 // CHECK1: cond.true: 489 // CHECK1-NEXT: br label [[COND_END:%.*]] 490 // CHECK1: cond.false: 491 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 492 // CHECK1-NEXT: br label [[COND_END]] 493 // CHECK1: cond.end: 494 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 495 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 496 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 497 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 498 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 499 // CHECK1: omp.inner.for.cond: 500 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 501 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 502 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 503 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 504 // CHECK1: omp.inner.for.cond.cleanup: 505 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 506 // CHECK1: omp.inner.for.body: 507 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 508 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 509 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 510 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 511 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 512 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 513 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 514 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 515 // CHECK1-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 516 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 517 // CHECK1-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64 518 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM3]] 519 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[VAR]], i64 4, i1 false) 520 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 521 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[SIVAR]], align 4 522 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 523 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[SIVAR]], align 4 524 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 525 // CHECK1: omp.body.continue: 526 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 527 // CHECK1: omp.inner.for.inc: 528 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 529 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 530 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 531 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 532 // CHECK1: omp.inner.for.end: 533 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 534 // CHECK1: omp.loop.exit: 535 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 536 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 537 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP17]]) 538 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 539 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 540 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2 541 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 542 // CHECK1: arraydestroy.body: 543 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 544 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 545 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 546 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 547 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 548 // CHECK1: arraydestroy.done8: 549 // CHECK1-NEXT: ret void 550 // 551 // 552 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 553 // CHECK1-SAME: () #[[ATTR1]] comdat { 554 // CHECK1-NEXT: entry: 555 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 556 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 557 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 558 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 559 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 560 // CHECK1-NEXT: [[VAR:%.*]] = alloca ptr, align 8 561 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 562 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 563 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 564 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 565 // CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 4 566 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 567 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 568 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 569 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 570 // CHECK1-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 571 // CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8 572 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 573 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 574 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 575 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 576 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 577 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 578 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 579 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 580 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 581 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 582 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 583 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 584 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 585 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 586 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 587 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 588 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 589 // CHECK1-NEXT: store i64 2, ptr [[TMP8]], align 8 590 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 591 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 592 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 593 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 594 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 595 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 596 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 597 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 598 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.region_id, ptr [[KERNEL_ARGS]]) 599 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 600 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 601 // CHECK1: omp_offload.failed: 602 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80() #[[ATTR2]] 603 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 604 // CHECK1: omp_offload.cont: 605 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 606 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 607 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 608 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 609 // CHECK1: arraydestroy.body: 610 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 611 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 612 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 613 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 614 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 615 // CHECK1: arraydestroy.done2: 616 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]] 617 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 618 // CHECK1-NEXT: ret i32 [[TMP16]] 619 // 620 // 621 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 622 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 623 // CHECK1-NEXT: entry: 624 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 625 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 626 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 627 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 628 // CHECK1-NEXT: ret void 629 // 630 // 631 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 632 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 633 // CHECK1-NEXT: entry: 634 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 635 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 637 // CHECK1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 638 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 639 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 640 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 641 // CHECK1-NEXT: ret void 642 // 643 // 644 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80 645 // CHECK1-SAME: () #[[ATTR4]] { 646 // CHECK1-NEXT: entry: 647 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined) 648 // CHECK1-NEXT: ret void 649 // 650 // 651 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined 652 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 653 // CHECK1-NEXT: entry: 654 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 655 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 656 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 657 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 658 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 659 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 660 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 661 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 662 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 663 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 664 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 665 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 666 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 667 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 668 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 670 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 671 // CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8 672 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 673 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 674 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 675 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 676 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 677 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 678 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 679 // CHECK1: arrayctor.loop: 680 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 681 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 682 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 683 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 684 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 685 // CHECK1: arrayctor.cont: 686 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 687 // CHECK1-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8 688 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 689 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 690 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 691 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 692 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 693 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 694 // CHECK1: cond.true: 695 // CHECK1-NEXT: br label [[COND_END:%.*]] 696 // CHECK1: cond.false: 697 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 698 // CHECK1-NEXT: br label [[COND_END]] 699 // CHECK1: cond.end: 700 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 701 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 702 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 703 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 704 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 705 // CHECK1: omp.inner.for.cond: 706 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 707 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 708 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 709 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 710 // CHECK1: omp.inner.for.cond.cleanup: 711 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 712 // CHECK1: omp.inner.for.body: 713 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 714 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 715 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 716 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 717 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 718 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 719 // CHECK1: omp.inner.for.inc: 720 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 721 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 722 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 723 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 724 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 725 // CHECK1: omp.inner.for.end: 726 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 727 // CHECK1: omp.loop.exit: 728 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 729 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 730 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 731 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 732 // CHECK1-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 733 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i64 2 734 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 735 // CHECK1: arraydestroy.body: 736 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 737 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 738 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 739 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 740 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 741 // CHECK1: arraydestroy.done5: 742 // CHECK1-NEXT: ret void 743 // 744 // 745 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined 746 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 747 // CHECK1-NEXT: entry: 748 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 749 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 750 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 751 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 752 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 753 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 754 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 755 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 756 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 757 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 758 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 759 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 760 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 761 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 762 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 763 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 764 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 765 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 767 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 768 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 769 // CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8 770 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 771 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 772 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 773 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 774 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 775 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 776 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 777 // CHECK1-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 778 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 779 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 780 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 781 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 782 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 783 // CHECK1: arrayctor.loop: 784 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 785 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 786 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 787 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 788 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 789 // CHECK1: arrayctor.cont: 790 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 791 // CHECK1-NEXT: store ptr [[VAR]], ptr [[_TMP3]], align 8 792 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 793 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 794 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 795 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 796 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 797 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 798 // CHECK1: cond.true: 799 // CHECK1-NEXT: br label [[COND_END:%.*]] 800 // CHECK1: cond.false: 801 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 802 // CHECK1-NEXT: br label [[COND_END]] 803 // CHECK1: cond.end: 804 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 805 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 806 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 807 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 808 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 809 // CHECK1: omp.inner.for.cond: 810 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 811 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 812 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 813 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 814 // CHECK1: omp.inner.for.cond.cleanup: 815 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 816 // CHECK1: omp.inner.for.body: 817 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 818 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 819 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 820 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 821 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 822 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 823 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 824 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 825 // CHECK1-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 826 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8 827 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 828 // CHECK1-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 829 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]] 830 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false) 831 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 832 // CHECK1: omp.body.continue: 833 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 834 // CHECK1: omp.inner.for.inc: 835 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 836 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1 837 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 838 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 839 // CHECK1: omp.inner.for.end: 840 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 841 // CHECK1: omp.loop.exit: 842 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 843 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 844 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 845 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 846 // CHECK1-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 847 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 2 848 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 849 // CHECK1: arraydestroy.body: 850 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 851 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 852 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 853 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 854 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 855 // CHECK1: arraydestroy.done9: 856 // CHECK1-NEXT: ret void 857 // 858 // 859 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 860 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 861 // CHECK1-NEXT: entry: 862 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 863 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 864 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 865 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 866 // CHECK1-NEXT: ret void 867 // 868 // 869 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 870 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 871 // CHECK1-NEXT: entry: 872 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 873 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 874 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 875 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 876 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 877 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 878 // CHECK1-NEXT: ret void 879 // 880 // 881 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 882 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 883 // CHECK1-NEXT: entry: 884 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 885 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 886 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 887 // CHECK1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 888 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 889 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 890 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 891 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4 892 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 893 // CHECK1-NEXT: store i32 [[ADD]], ptr [[F]], align 4 894 // CHECK1-NEXT: ret void 895 // 896 // 897 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 898 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 899 // CHECK1-NEXT: entry: 900 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 901 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 902 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 903 // CHECK1-NEXT: ret void 904 // 905 // 906 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_private_codegen.cpp 907 // CHECK1-SAME: () #[[ATTR0]] { 908 // CHECK1-NEXT: entry: 909 // CHECK1-NEXT: call void @__cxx_global_var_init() 910 // CHECK1-NEXT: call void @__cxx_global_var_init.1() 911 // CHECK1-NEXT: call void @__cxx_global_var_init.2() 912 // CHECK1-NEXT: ret void 913 // 914 // 915 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init 916 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 917 // CHECK3-NEXT: entry: 918 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test) 919 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]] 920 // CHECK3-NEXT: ret void 921 // 922 // 923 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 924 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 925 // CHECK3-NEXT: entry: 926 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 927 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 928 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 929 // CHECK3-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 930 // CHECK3-NEXT: ret void 931 // 932 // 933 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 934 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 935 // CHECK3-NEXT: entry: 936 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 937 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 938 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 939 // CHECK3-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 940 // CHECK3-NEXT: ret void 941 // 942 // 943 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 944 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 945 // CHECK3-NEXT: entry: 946 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 947 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 948 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 949 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 950 // CHECK3-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 951 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 952 // CHECK3-NEXT: store float [[CONV]], ptr [[F]], align 4 953 // CHECK3-NEXT: ret void 954 // 955 // 956 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 957 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 958 // CHECK3-NEXT: entry: 959 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 960 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 961 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 962 // CHECK3-NEXT: ret void 963 // 964 // 965 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 966 // CHECK3-SAME: () #[[ATTR0]] { 967 // CHECK3-NEXT: entry: 968 // CHECK3-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00) 969 // CHECK3-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i32 1), float noundef 2.000000e+00) 970 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]] 971 // CHECK3-NEXT: ret void 972 // 973 // 974 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 975 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 976 // CHECK3-NEXT: entry: 977 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 978 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 979 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 980 // CHECK3-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 981 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 982 // CHECK3-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 983 // CHECK3-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 984 // CHECK3-NEXT: ret void 985 // 986 // 987 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 988 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] { 989 // CHECK3-NEXT: entry: 990 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 4 991 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 4 992 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 993 // CHECK3: arraydestroy.body: 994 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i32 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 995 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 996 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 997 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr 998 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 999 // CHECK3: arraydestroy.done1: 1000 // CHECK3-NEXT: ret void 1001 // 1002 // 1003 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1004 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1005 // CHECK3-NEXT: entry: 1006 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1007 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1008 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1009 // CHECK3-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1010 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1011 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1012 // CHECK3-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1013 // CHECK3-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4 1014 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1015 // CHECK3-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1016 // CHECK3-NEXT: store float [[ADD]], ptr [[F]], align 4 1017 // CHECK3-NEXT: ret void 1018 // 1019 // 1020 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 1021 // CHECK3-SAME: () #[[ATTR0]] { 1022 // CHECK3-NEXT: entry: 1023 // CHECK3-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00) 1024 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]] 1025 // CHECK3-NEXT: ret void 1026 // 1027 // 1028 // CHECK3-LABEL: define {{[^@]+}}@main 1029 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 1030 // CHECK3-NEXT: entry: 1031 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1032 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1033 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1034 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 1035 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1036 // CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 4 1037 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1038 // CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 4 1039 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1040 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 1041 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1042 // CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 4 1043 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1044 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 1045 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1046 // CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 4 1047 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1048 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4 1049 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1050 // CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 4 1051 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1052 // CHECK3-NEXT: store i64 2, ptr [[TMP8]], align 8 1053 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1054 // CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 8 1055 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1056 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1057 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1058 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1059 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1060 // CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 4 1061 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.region_id, ptr [[KERNEL_ARGS]]) 1062 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1063 // CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1064 // CHECK3: omp_offload.failed: 1065 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124() #[[ATTR2]] 1066 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1067 // CHECK3: omp_offload.cont: 1068 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1069 // CHECK3-NEXT: ret i32 [[CALL]] 1070 // 1071 // 1072 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124 1073 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1074 // CHECK3-NEXT: entry: 1075 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined) 1076 // CHECK3-NEXT: ret void 1077 // 1078 // 1079 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined 1080 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 1081 // CHECK3-NEXT: entry: 1082 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1083 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1084 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1085 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1086 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1087 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1088 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1089 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1090 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1091 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1092 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1093 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1094 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1095 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1096 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1097 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1098 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1099 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1100 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1101 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1102 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1103 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1104 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1105 // CHECK3: arrayctor.loop: 1106 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1107 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1108 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1109 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1110 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1111 // CHECK3: arrayctor.cont: 1112 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1113 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1114 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1115 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1116 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1117 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1118 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1119 // CHECK3: cond.true: 1120 // CHECK3-NEXT: br label [[COND_END:%.*]] 1121 // CHECK3: cond.false: 1122 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1123 // CHECK3-NEXT: br label [[COND_END]] 1124 // CHECK3: cond.end: 1125 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1126 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1127 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1128 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1129 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1130 // CHECK3: omp.inner.for.cond: 1131 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1132 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1133 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1134 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1135 // CHECK3: omp.inner.for.cond.cleanup: 1136 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1137 // CHECK3: omp.inner.for.body: 1138 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1139 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1140 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]) 1141 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1142 // CHECK3: omp.inner.for.inc: 1143 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1144 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1145 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1146 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1147 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1148 // CHECK3: omp.inner.for.end: 1149 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1150 // CHECK3: omp.loop.exit: 1151 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1152 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 1153 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]]) 1154 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1155 // CHECK3-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1156 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i32 2 1157 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1158 // CHECK3: arraydestroy.body: 1159 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1160 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1161 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1162 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 1163 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 1164 // CHECK3: arraydestroy.done3: 1165 // CHECK3-NEXT: ret void 1166 // 1167 // 1168 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined 1169 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 1170 // CHECK3-NEXT: entry: 1171 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1172 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1173 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1174 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1175 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1176 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1177 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1178 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1179 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1180 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1181 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1182 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1183 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1184 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1185 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1186 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1187 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1188 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1189 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1190 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1191 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1192 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1193 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1194 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1195 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 1196 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 1197 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1198 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1199 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1200 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1201 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1202 // CHECK3: arrayctor.loop: 1203 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1204 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1205 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1206 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1207 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1208 // CHECK3: arrayctor.cont: 1209 // CHECK3-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1210 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1211 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1212 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1213 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1214 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1215 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1216 // CHECK3: cond.true: 1217 // CHECK3-NEXT: br label [[COND_END:%.*]] 1218 // CHECK3: cond.false: 1219 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1220 // CHECK3-NEXT: br label [[COND_END]] 1221 // CHECK3: cond.end: 1222 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1223 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1224 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1225 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1226 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1227 // CHECK3: omp.inner.for.cond: 1228 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1229 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1230 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1231 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1232 // CHECK3: omp.inner.for.cond.cleanup: 1233 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1234 // CHECK3: omp.inner.for.body: 1235 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1236 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1237 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1238 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1239 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 1240 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1241 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]] 1242 // CHECK3-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 1243 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 1244 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP12]] 1245 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i32 4, i1 false) 1246 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1247 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[SIVAR]], align 4 1248 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 1249 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR]], align 4 1250 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1251 // CHECK3: omp.body.continue: 1252 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1253 // CHECK3: omp.inner.for.inc: 1254 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1255 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP15]], 1 1256 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1257 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1258 // CHECK3: omp.inner.for.end: 1259 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1260 // CHECK3: omp.loop.exit: 1261 // CHECK3-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1262 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 1263 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP17]]) 1264 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1265 // CHECK3-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1266 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN5]], i32 2 1267 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1268 // CHECK3: arraydestroy.body: 1269 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1270 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1271 // CHECK3-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1272 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]] 1273 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 1274 // CHECK3: arraydestroy.done6: 1275 // CHECK3-NEXT: ret void 1276 // 1277 // 1278 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1279 // CHECK3-SAME: () #[[ATTR1]] comdat { 1280 // CHECK3-NEXT: entry: 1281 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1282 // CHECK3-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1283 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1284 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1285 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1286 // CHECK3-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1287 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1288 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1289 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1290 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1291 // CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 4 1292 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1293 // CHECK3-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1294 // CHECK3-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1295 // CHECK3-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1296 // CHECK3-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1297 // CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1298 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1299 // CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 4 1300 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1301 // CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 4 1302 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1303 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 1304 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1305 // CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 4 1306 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1307 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 1308 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1309 // CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 4 1310 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1311 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4 1312 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1313 // CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 4 1314 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1315 // CHECK3-NEXT: store i64 2, ptr [[TMP8]], align 8 1316 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1317 // CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 8 1318 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1319 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1320 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1321 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1322 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1323 // CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 4 1324 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.region_id, ptr [[KERNEL_ARGS]]) 1325 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1326 // CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1327 // CHECK3: omp_offload.failed: 1328 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80() #[[ATTR2]] 1329 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1330 // CHECK3: omp_offload.cont: 1331 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 1332 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1333 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1334 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1335 // CHECK3: arraydestroy.body: 1336 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1337 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1338 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1339 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1340 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1341 // CHECK3: arraydestroy.done2: 1342 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR2]] 1343 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1344 // CHECK3-NEXT: ret i32 [[TMP16]] 1345 // 1346 // 1347 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1348 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1349 // CHECK3-NEXT: entry: 1350 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1351 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1352 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1353 // CHECK3-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1354 // CHECK3-NEXT: ret void 1355 // 1356 // 1357 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1358 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1359 // CHECK3-NEXT: entry: 1360 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1361 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1362 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1363 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1364 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1365 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1366 // CHECK3-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1367 // CHECK3-NEXT: ret void 1368 // 1369 // 1370 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80 1371 // CHECK3-SAME: () #[[ATTR4]] { 1372 // CHECK3-NEXT: entry: 1373 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined) 1374 // CHECK3-NEXT: ret void 1375 // 1376 // 1377 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined 1378 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 1379 // CHECK3-NEXT: entry: 1380 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1381 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1382 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1383 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1384 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1385 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1386 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1387 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1388 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1389 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1390 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1391 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1392 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1393 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1394 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1395 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1396 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1397 // CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1398 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1399 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1400 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1401 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1402 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1403 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1404 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1405 // CHECK3: arrayctor.loop: 1406 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1407 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1408 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1409 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1410 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1411 // CHECK3: arrayctor.cont: 1412 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1413 // CHECK3-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1414 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1415 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1416 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1417 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1418 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1419 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1420 // CHECK3: cond.true: 1421 // CHECK3-NEXT: br label [[COND_END:%.*]] 1422 // CHECK3: cond.false: 1423 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1424 // CHECK3-NEXT: br label [[COND_END]] 1425 // CHECK3: cond.end: 1426 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1427 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1428 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1429 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1430 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1431 // CHECK3: omp.inner.for.cond: 1432 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1433 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1434 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1435 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1436 // CHECK3: omp.inner.for.cond.cleanup: 1437 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1438 // CHECK3: omp.inner.for.body: 1439 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1440 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1441 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]) 1442 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1443 // CHECK3: omp.inner.for.inc: 1444 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1445 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1446 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1447 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1448 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1449 // CHECK3: omp.inner.for.end: 1450 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1451 // CHECK3: omp.loop.exit: 1452 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1453 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 1454 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]]) 1455 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1456 // CHECK3-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1457 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i32 2 1458 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1459 // CHECK3: arraydestroy.body: 1460 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1461 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1462 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1463 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1464 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1465 // CHECK3: arraydestroy.done5: 1466 // CHECK3-NEXT: ret void 1467 // 1468 // 1469 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined 1470 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 1471 // CHECK3-NEXT: entry: 1472 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1473 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1474 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1475 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1476 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1477 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1478 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1479 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1480 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1481 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1482 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1483 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1484 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1485 // CHECK3-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1486 // CHECK3-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1487 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1488 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1489 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1490 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1491 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1492 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1493 // CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1494 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1495 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1496 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1497 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1498 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 1499 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 1500 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1501 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1502 // CHECK3-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1503 // CHECK3-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1504 // CHECK3-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1505 // CHECK3: arrayctor.loop: 1506 // CHECK3-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1507 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1508 // CHECK3-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1509 // CHECK3-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1510 // CHECK3-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1511 // CHECK3: arrayctor.cont: 1512 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1513 // CHECK3-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1514 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1515 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1516 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1517 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1518 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1519 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1520 // CHECK3: cond.true: 1521 // CHECK3-NEXT: br label [[COND_END:%.*]] 1522 // CHECK3: cond.false: 1523 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1524 // CHECK3-NEXT: br label [[COND_END]] 1525 // CHECK3: cond.end: 1526 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1527 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1528 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1529 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1530 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1531 // CHECK3: omp.inner.for.cond: 1532 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1533 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1534 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1535 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1536 // CHECK3: omp.inner.for.cond.cleanup: 1537 // CHECK3-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1538 // CHECK3: omp.inner.for.body: 1539 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1540 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1541 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1542 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1543 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 1544 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1545 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]] 1546 // CHECK3-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 1547 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4 1548 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1549 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP13]] 1550 // CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false) 1551 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1552 // CHECK3: omp.body.continue: 1553 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1554 // CHECK3: omp.inner.for.inc: 1555 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1556 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1557 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 1558 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1559 // CHECK3: omp.inner.for.end: 1560 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1561 // CHECK3: omp.loop.exit: 1562 // CHECK3-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1563 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 1564 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 1565 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 1566 // CHECK3-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1567 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 2 1568 // CHECK3-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1569 // CHECK3: arraydestroy.body: 1570 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1571 // CHECK3-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1572 // CHECK3-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1573 // CHECK3-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1574 // CHECK3-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1575 // CHECK3: arraydestroy.done7: 1576 // CHECK3-NEXT: ret void 1577 // 1578 // 1579 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1580 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1581 // CHECK3-NEXT: entry: 1582 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1583 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1584 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1585 // CHECK3-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 1586 // CHECK3-NEXT: ret void 1587 // 1588 // 1589 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1590 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1591 // CHECK3-NEXT: entry: 1592 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1593 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1594 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1595 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1596 // CHECK3-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 1597 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1598 // CHECK3-NEXT: ret void 1599 // 1600 // 1601 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1602 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1603 // CHECK3-NEXT: entry: 1604 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1605 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1606 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1607 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1608 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1609 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1610 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1611 // CHECK3-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4 1612 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1613 // CHECK3-NEXT: store i32 [[ADD]], ptr [[F]], align 4 1614 // CHECK3-NEXT: ret void 1615 // 1616 // 1617 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1618 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1619 // CHECK3-NEXT: entry: 1620 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1621 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1622 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1623 // CHECK3-NEXT: ret void 1624 // 1625 // 1626 // CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_private_codegen.cpp 1627 // CHECK3-SAME: () #[[ATTR0]] { 1628 // CHECK3-NEXT: entry: 1629 // CHECK3-NEXT: call void @__cxx_global_var_init() 1630 // CHECK3-NEXT: call void @__cxx_global_var_init.1() 1631 // CHECK3-NEXT: call void @__cxx_global_var_init.2() 1632 // CHECK3-NEXT: ret void 1633 // 1634 // 1635 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init 1636 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1637 // CHECK5-NEXT: entry: 1638 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @test) 1639 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @test, ptr @__dso_handle) #[[ATTR2:[0-9]+]] 1640 // CHECK5-NEXT: ret void 1641 // 1642 // 1643 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1644 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 1645 // CHECK5-NEXT: entry: 1646 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1647 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1648 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1649 // CHECK5-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1650 // CHECK5-NEXT: ret void 1651 // 1652 // 1653 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1654 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1655 // CHECK5-NEXT: entry: 1656 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1657 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1658 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1659 // CHECK5-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 1660 // CHECK5-NEXT: ret void 1661 // 1662 // 1663 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1664 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1665 // CHECK5-NEXT: entry: 1666 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1667 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1668 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1669 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1670 // CHECK5-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 1671 // CHECK5-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 1672 // CHECK5-NEXT: store float [[CONV]], ptr [[F]], align 4 1673 // CHECK5-NEXT: ret void 1674 // 1675 // 1676 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1677 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1678 // CHECK5-NEXT: entry: 1679 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1680 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1681 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1682 // CHECK5-NEXT: ret void 1683 // 1684 // 1685 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init.1 1686 // CHECK5-SAME: () #[[ATTR0]] { 1687 // CHECK5-NEXT: entry: 1688 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @s_arr, float noundef 1.000000e+00) 1689 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 1), float noundef 2.000000e+00) 1690 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @__cxx_global_array_dtor, ptr null, ptr @__dso_handle) #[[ATTR2]] 1691 // CHECK5-NEXT: ret void 1692 // 1693 // 1694 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1695 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1696 // CHECK5-NEXT: entry: 1697 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1698 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1699 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1700 // CHECK5-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1701 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1702 // CHECK5-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1703 // CHECK5-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1704 // CHECK5-NEXT: ret void 1705 // 1706 // 1707 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_array_dtor 1708 // CHECK5-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR0]] { 1709 // CHECK5-NEXT: entry: 1710 // CHECK5-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 1711 // CHECK5-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 1712 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1713 // CHECK5: arraydestroy.body: 1714 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ getelementptr inbounds ([[STRUCT_S:%.*]], ptr @s_arr, i64 2), [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1715 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1716 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 1717 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], @s_arr 1718 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1719 // CHECK5: arraydestroy.done1: 1720 // CHECK5-NEXT: ret void 1721 // 1722 // 1723 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1724 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1725 // CHECK5-NEXT: entry: 1726 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1727 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1728 // CHECK5-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1729 // CHECK5-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1730 // CHECK5-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1731 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1732 // CHECK5-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1733 // CHECK5-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @g, align 4 1734 // CHECK5-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1735 // CHECK5-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1736 // CHECK5-NEXT: store float [[ADD]], ptr [[F]], align 4 1737 // CHECK5-NEXT: ret void 1738 // 1739 // 1740 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init.2 1741 // CHECK5-SAME: () #[[ATTR0]] { 1742 // CHECK5-NEXT: entry: 1743 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) @var, float noundef 3.000000e+00) 1744 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN1SIfED1Ev, ptr @var, ptr @__dso_handle) #[[ATTR2]] 1745 // CHECK5-NEXT: ret void 1746 // 1747 // 1748 // CHECK5-LABEL: define {{[^@]+}}@main 1749 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 1750 // CHECK5-NEXT: entry: 1751 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1752 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1753 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 1754 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1755 // CHECK5-NEXT: ret i32 0 1756 // 1757 // 1758 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104 1759 // CHECK5-SAME: () #[[ATTR4:[0-9]+]] { 1760 // CHECK5-NEXT: entry: 1761 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined) 1762 // CHECK5-NEXT: ret void 1763 // 1764 // 1765 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined 1766 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4]] { 1767 // CHECK5-NEXT: entry: 1768 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1769 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1770 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1771 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1772 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1773 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1774 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1775 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1776 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1777 // CHECK5-NEXT: [[G:%.*]] = alloca i32, align 4 1778 // CHECK5-NEXT: [[G1:%.*]] = alloca i32, align 4 1779 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 1780 // CHECK5-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1781 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1782 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1783 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1784 // CHECK5-NEXT: store ptr undef, ptr [[_TMP1]], align 8 1785 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1786 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1787 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1788 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1789 // CHECK5-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 8 1790 // CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1791 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1792 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1793 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1794 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1795 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1796 // CHECK5: cond.true: 1797 // CHECK5-NEXT: br label [[COND_END:%.*]] 1798 // CHECK5: cond.false: 1799 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1800 // CHECK5-NEXT: br label [[COND_END]] 1801 // CHECK5: cond.end: 1802 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1803 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1804 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1805 // CHECK5-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1806 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1807 // CHECK5: omp.inner.for.cond: 1808 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1809 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1810 // CHECK5-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1811 // CHECK5-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1812 // CHECK5: omp.inner.for.body: 1813 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1814 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1815 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1816 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1817 // CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 1818 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1819 // CHECK5: omp.inner.for.inc: 1820 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1821 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1822 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1823 // CHECK5-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1824 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1825 // CHECK5: omp.inner.for.end: 1826 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1827 // CHECK5: omp.loop.exit: 1828 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1829 // CHECK5-NEXT: ret void 1830 // 1831 // 1832 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined.omp_outlined 1833 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR4]] { 1834 // CHECK5-NEXT: entry: 1835 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1836 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1837 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1838 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1839 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1840 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1841 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1842 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1843 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1844 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1845 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1846 // CHECK5-NEXT: [[G:%.*]] = alloca i32, align 4 1847 // CHECK5-NEXT: [[G1:%.*]] = alloca i32, align 4 1848 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 1849 // CHECK5-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1850 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1851 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1852 // CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1853 // CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1854 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1855 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1856 // CHECK5-NEXT: store ptr undef, ptr [[_TMP1]], align 8 1857 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1858 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1859 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1860 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1861 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1862 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1863 // CHECK5-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1864 // CHECK5-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 1865 // CHECK5-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1866 // CHECK5-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1867 // CHECK5-NEXT: store ptr [[G1]], ptr [[_TMP3]], align 8 1868 // CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1869 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1870 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1871 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1872 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1873 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1874 // CHECK5: cond.true: 1875 // CHECK5-NEXT: br label [[COND_END:%.*]] 1876 // CHECK5: cond.false: 1877 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1878 // CHECK5-NEXT: br label [[COND_END]] 1879 // CHECK5: cond.end: 1880 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1881 // CHECK5-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1882 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1883 // CHECK5-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1884 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1885 // CHECK5: omp.inner.for.cond: 1886 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1887 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1888 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1889 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1890 // CHECK5: omp.inner.for.body: 1891 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1892 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1893 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1894 // CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1895 // CHECK5-NEXT: store i32 1, ptr [[G]], align 4 1896 // CHECK5-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP3]], align 8 1897 // CHECK5-NEXT: store volatile i32 1, ptr [[TMP10]], align 4 1898 // CHECK5-NEXT: store i32 2, ptr [[SIVAR]], align 4 1899 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 1900 // CHECK5-NEXT: store ptr [[G]], ptr [[TMP11]], align 8 1901 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 1902 // CHECK5-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP3]], align 8 1903 // CHECK5-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8 1904 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 1905 // CHECK5-NEXT: store ptr [[SIVAR]], ptr [[TMP14]], align 8 1906 // CHECK5-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 1907 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1908 // CHECK5: omp.body.continue: 1909 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1910 // CHECK5: omp.inner.for.inc: 1911 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1912 // CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 1913 // CHECK5-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 1914 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1915 // CHECK5: omp.inner.for.end: 1916 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1917 // CHECK5: omp.loop.exit: 1918 // CHECK5-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1919 // CHECK5-NEXT: ret void 1920 // 1921 // 1922 // CHECK5-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_teams_distribute_parallel_for_private_codegen.cpp 1923 // CHECK5-SAME: () #[[ATTR0]] { 1924 // CHECK5-NEXT: entry: 1925 // CHECK5-NEXT: call void @__cxx_global_var_init() 1926 // CHECK5-NEXT: call void @__cxx_global_var_init.1() 1927 // CHECK5-NEXT: call void @__cxx_global_var_init.2() 1928 // CHECK5-NEXT: ret void 1929 // 1930 // 1931 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124 1932 // CHECK13-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 1933 // CHECK13-NEXT: entry: 1934 // CHECK13-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1935 // CHECK13-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1936 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined) 1937 // CHECK13-NEXT: ret void 1938 // 1939 // 1940 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined 1941 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1942 // CHECK13-NEXT: entry: 1943 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1944 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1945 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1946 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 1947 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1948 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1949 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1950 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1951 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1952 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1953 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1954 // CHECK13-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1955 // CHECK13-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1956 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 1957 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1958 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1959 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1960 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1961 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1962 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1963 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1964 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 1965 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1966 // CHECK13: arrayctor.loop: 1967 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1968 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1969 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 1970 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1971 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1972 // CHECK13: arrayctor.cont: 1973 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1974 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1975 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1976 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1977 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1978 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1979 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1980 // CHECK13: cond.true: 1981 // CHECK13-NEXT: br label [[COND_END:%.*]] 1982 // CHECK13: cond.false: 1983 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1984 // CHECK13-NEXT: br label [[COND_END]] 1985 // CHECK13: cond.end: 1986 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1987 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1988 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1989 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1990 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1991 // CHECK13: omp.inner.for.cond: 1992 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1993 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1994 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1995 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1996 // CHECK13: omp.inner.for.cond.cleanup: 1997 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1998 // CHECK13: omp.inner.for.body: 1999 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2000 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2001 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2002 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2003 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 2004 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2005 // CHECK13: omp.inner.for.inc: 2006 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2007 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2008 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2009 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2010 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 2011 // CHECK13: omp.inner.for.end: 2012 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2013 // CHECK13: omp.loop.exit: 2014 // CHECK13-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2015 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 2016 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 2017 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2:[0-9]+]] 2018 // CHECK13-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2019 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i64 2 2020 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2021 // CHECK13: arraydestroy.body: 2022 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2023 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2024 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2025 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 2026 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2027 // CHECK13: arraydestroy.done3: 2028 // CHECK13-NEXT: ret void 2029 // 2030 // 2031 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2032 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 2033 // CHECK13-NEXT: entry: 2034 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2035 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2036 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2037 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2038 // CHECK13-NEXT: ret void 2039 // 2040 // 2041 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined 2042 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] { 2043 // CHECK13-NEXT: entry: 2044 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2045 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2046 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2047 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2048 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2049 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2050 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2051 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2052 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2053 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2054 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2055 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2056 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2057 // CHECK13-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2058 // CHECK13-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2059 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2060 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2061 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2062 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2063 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2064 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2065 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2066 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2067 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2068 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2069 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2070 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2071 // CHECK13-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 2072 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2073 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2074 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2075 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 2076 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2077 // CHECK13: arrayctor.loop: 2078 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2079 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2080 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 2081 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2082 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2083 // CHECK13: arrayctor.cont: 2084 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2085 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2086 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2087 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2088 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2089 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2090 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2091 // CHECK13: cond.true: 2092 // CHECK13-NEXT: br label [[COND_END:%.*]] 2093 // CHECK13: cond.false: 2094 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2095 // CHECK13-NEXT: br label [[COND_END]] 2096 // CHECK13: cond.end: 2097 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2098 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2099 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2100 // CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2101 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2102 // CHECK13: omp.inner.for.cond: 2103 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2104 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2105 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2106 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2107 // CHECK13: omp.inner.for.cond.cleanup: 2108 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2109 // CHECK13: omp.inner.for.body: 2110 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2111 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2112 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2113 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2114 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 2115 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2116 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2117 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 2118 // CHECK13-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 2119 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 2120 // CHECK13-NEXT: [[IDXPROM3:%.*]] = sext i32 [[TMP12]] to i64 2121 // CHECK13-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM3]] 2122 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[VAR]], i64 4, i1 false) 2123 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 2124 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[SIVAR]], align 4 2125 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 2126 // CHECK13-NEXT: store i32 [[ADD5]], ptr [[SIVAR]], align 4 2127 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2128 // CHECK13: omp.body.continue: 2129 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2130 // CHECK13: omp.inner.for.inc: 2131 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2132 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP15]], 1 2133 // CHECK13-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 2134 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 2135 // CHECK13: omp.inner.for.end: 2136 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2137 // CHECK13: omp.loop.exit: 2138 // CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2139 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 2140 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP17]]) 2141 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 2142 // CHECK13-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2143 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2 2144 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2145 // CHECK13: arraydestroy.body: 2146 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2147 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2148 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2149 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 2150 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 2151 // CHECK13: arraydestroy.done8: 2152 // CHECK13-NEXT: ret void 2153 // 2154 // 2155 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2156 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2157 // CHECK13-NEXT: entry: 2158 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2159 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2160 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2161 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 2162 // CHECK13-NEXT: ret void 2163 // 2164 // 2165 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80 2166 // CHECK13-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] { 2167 // CHECK13-NEXT: entry: 2168 // CHECK13-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 2169 // CHECK13-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 2170 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined) 2171 // CHECK13-NEXT: ret void 2172 // 2173 // 2174 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined 2175 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2176 // CHECK13-NEXT: entry: 2177 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2178 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2179 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2180 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2181 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 2182 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2183 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2184 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2185 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2186 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2187 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2188 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2189 // CHECK13-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2190 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 2191 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2192 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2193 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2194 // CHECK13-NEXT: store ptr undef, ptr [[_TMP1]], align 8 2195 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2196 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 2197 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2198 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2199 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2200 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 2201 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2202 // CHECK13: arrayctor.loop: 2203 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2204 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2205 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 2206 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2207 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2208 // CHECK13: arrayctor.cont: 2209 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2210 // CHECK13-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8 2211 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2212 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2213 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2214 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2215 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2216 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2217 // CHECK13: cond.true: 2218 // CHECK13-NEXT: br label [[COND_END:%.*]] 2219 // CHECK13: cond.false: 2220 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2221 // CHECK13-NEXT: br label [[COND_END]] 2222 // CHECK13: cond.end: 2223 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2224 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2225 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2226 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2227 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2228 // CHECK13: omp.inner.for.cond: 2229 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2230 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2231 // CHECK13-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2232 // CHECK13-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2233 // CHECK13: omp.inner.for.cond.cleanup: 2234 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2235 // CHECK13: omp.inner.for.body: 2236 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2237 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2238 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2239 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2240 // CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 2241 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2242 // CHECK13: omp.inner.for.inc: 2243 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2244 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2245 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2246 // CHECK13-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2247 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 2248 // CHECK13: omp.inner.for.end: 2249 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2250 // CHECK13: omp.loop.exit: 2251 // CHECK13-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2252 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 2253 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 2254 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 2255 // CHECK13-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2256 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i64 2 2257 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2258 // CHECK13: arraydestroy.body: 2259 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2260 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2261 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2262 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2263 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2264 // CHECK13: arraydestroy.done5: 2265 // CHECK13-NEXT: ret void 2266 // 2267 // 2268 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2269 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2270 // CHECK13-NEXT: entry: 2271 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2272 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2273 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2274 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2275 // CHECK13-NEXT: ret void 2276 // 2277 // 2278 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined 2279 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] { 2280 // CHECK13-NEXT: entry: 2281 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2282 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2283 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2284 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2285 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2286 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2287 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 2288 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2289 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2290 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2291 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2292 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2293 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2294 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2295 // CHECK13-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2296 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 2297 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2298 // CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2299 // CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2300 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2301 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2302 // CHECK13-NEXT: store ptr undef, ptr [[_TMP1]], align 8 2303 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2304 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2305 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2306 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2307 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2308 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 2309 // CHECK13-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2310 // CHECK13-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 2311 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2312 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2313 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2314 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 2315 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2316 // CHECK13: arrayctor.loop: 2317 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2318 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2319 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 2320 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2321 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2322 // CHECK13: arrayctor.cont: 2323 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2324 // CHECK13-NEXT: store ptr [[VAR]], ptr [[_TMP3]], align 8 2325 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2326 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2327 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2328 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2329 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2330 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2331 // CHECK13: cond.true: 2332 // CHECK13-NEXT: br label [[COND_END:%.*]] 2333 // CHECK13: cond.false: 2334 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2335 // CHECK13-NEXT: br label [[COND_END]] 2336 // CHECK13: cond.end: 2337 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2338 // CHECK13-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2339 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2340 // CHECK13-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2341 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2342 // CHECK13: omp.inner.for.cond: 2343 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2344 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2345 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2346 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2347 // CHECK13: omp.inner.for.cond.cleanup: 2348 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2349 // CHECK13: omp.inner.for.body: 2350 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2351 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2352 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2353 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2354 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 2355 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2356 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2357 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 2358 // CHECK13-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 2359 // CHECK13-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8 2360 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 2361 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 2362 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]] 2363 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false) 2364 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2365 // CHECK13: omp.body.continue: 2366 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2367 // CHECK13: omp.inner.for.inc: 2368 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2369 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1 2370 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 2371 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 2372 // CHECK13: omp.inner.for.end: 2373 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2374 // CHECK13: omp.loop.exit: 2375 // CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2376 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 2377 // CHECK13-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 2378 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 2379 // CHECK13-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2380 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 2 2381 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2382 // CHECK13: arraydestroy.body: 2383 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2384 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2385 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2386 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 2387 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 2388 // CHECK13: arraydestroy.done9: 2389 // CHECK13-NEXT: ret void 2390 // 2391 // 2392 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2393 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2394 // CHECK13-NEXT: entry: 2395 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2396 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2397 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2398 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 2399 // CHECK13-NEXT: ret void 2400 // 2401 // 2402 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2403 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2404 // CHECK13-NEXT: entry: 2405 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2406 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2407 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2408 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2409 // CHECK13-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 2410 // CHECK13-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 2411 // CHECK13-NEXT: store float [[CONV]], ptr [[F]], align 4 2412 // CHECK13-NEXT: ret void 2413 // 2414 // 2415 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2416 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2417 // CHECK13-NEXT: entry: 2418 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2419 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2420 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2421 // CHECK13-NEXT: ret void 2422 // 2423 // 2424 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2425 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2426 // CHECK13-NEXT: entry: 2427 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2428 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2429 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2430 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2431 // CHECK13-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 2432 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2433 // CHECK13-NEXT: ret void 2434 // 2435 // 2436 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2437 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2438 // CHECK13-NEXT: entry: 2439 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2440 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2441 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2442 // CHECK13-NEXT: ret void 2443 // 2444 // 2445 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124 2446 // CHECK15-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 2447 // CHECK15-NEXT: entry: 2448 // CHECK15-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 2449 // CHECK15-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 2450 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined) 2451 // CHECK15-NEXT: ret void 2452 // 2453 // 2454 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined 2455 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2456 // CHECK15-NEXT: entry: 2457 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2458 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2459 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2460 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2461 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2462 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2463 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2464 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2465 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2466 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2467 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2468 // CHECK15-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2469 // CHECK15-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2470 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2471 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2472 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2473 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2474 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 2475 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2476 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2477 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2478 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 2479 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2480 // CHECK15: arrayctor.loop: 2481 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2482 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2483 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 2484 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2485 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2486 // CHECK15: arrayctor.cont: 2487 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2488 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2489 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2490 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2491 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2492 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2493 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2494 // CHECK15: cond.true: 2495 // CHECK15-NEXT: br label [[COND_END:%.*]] 2496 // CHECK15: cond.false: 2497 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2498 // CHECK15-NEXT: br label [[COND_END]] 2499 // CHECK15: cond.end: 2500 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2501 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2502 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2503 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2504 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2505 // CHECK15: omp.inner.for.cond: 2506 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2507 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2508 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2509 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2510 // CHECK15: omp.inner.for.cond.cleanup: 2511 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2512 // CHECK15: omp.inner.for.body: 2513 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2514 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2515 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]) 2516 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2517 // CHECK15: omp.inner.for.inc: 2518 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2519 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2520 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 2521 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2522 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 2523 // CHECK15: omp.inner.for.end: 2524 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2525 // CHECK15: omp.loop.exit: 2526 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2527 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 2528 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]]) 2529 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2:[0-9]+]] 2530 // CHECK15-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2531 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN2]], i32 2 2532 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2533 // CHECK15: arraydestroy.body: 2534 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2535 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2536 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2537 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 2538 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 2539 // CHECK15: arraydestroy.done3: 2540 // CHECK15-NEXT: ret void 2541 // 2542 // 2543 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2544 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2545 // CHECK15-NEXT: entry: 2546 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2547 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2548 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2549 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2550 // CHECK15-NEXT: ret void 2551 // 2552 // 2553 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l124.omp_outlined.omp_outlined 2554 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] { 2555 // CHECK15-NEXT: entry: 2556 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2557 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2558 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2559 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2560 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2561 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2562 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2563 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2564 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2565 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2566 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2567 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2568 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2569 // CHECK15-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2570 // CHECK15-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2571 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2572 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2573 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2574 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2575 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2576 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2577 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2578 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2579 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2580 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 2581 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 2582 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2583 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2584 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2585 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 2586 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2587 // CHECK15: arrayctor.loop: 2588 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2589 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2590 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 2591 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2592 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2593 // CHECK15: arrayctor.cont: 2594 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2595 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2596 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2597 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2598 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2599 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2600 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2601 // CHECK15: cond.true: 2602 // CHECK15-NEXT: br label [[COND_END:%.*]] 2603 // CHECK15: cond.false: 2604 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2605 // CHECK15-NEXT: br label [[COND_END]] 2606 // CHECK15: cond.end: 2607 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2608 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2609 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2610 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2611 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2612 // CHECK15: omp.inner.for.cond: 2613 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2614 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2615 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2616 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2617 // CHECK15: omp.inner.for.cond.cleanup: 2618 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2619 // CHECK15: omp.inner.for.body: 2620 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2621 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2622 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2623 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2624 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 2625 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2626 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]] 2627 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 2628 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4 2629 // CHECK15-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP12]] 2630 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX2]], ptr align 4 [[VAR]], i32 4, i1 false) 2631 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 2632 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[SIVAR]], align 4 2633 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], [[TMP13]] 2634 // CHECK15-NEXT: store i32 [[ADD3]], ptr [[SIVAR]], align 4 2635 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2636 // CHECK15: omp.body.continue: 2637 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2638 // CHECK15: omp.inner.for.inc: 2639 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2640 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP15]], 1 2641 // CHECK15-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 2642 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 2643 // CHECK15: omp.inner.for.end: 2644 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2645 // CHECK15: omp.loop.exit: 2646 // CHECK15-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2647 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 2648 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP17]]) 2649 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 2650 // CHECK15-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2651 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN5]], i32 2 2652 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2653 // CHECK15: arraydestroy.body: 2654 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2655 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2656 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2657 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN5]] 2658 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 2659 // CHECK15: arraydestroy.done6: 2660 // CHECK15-NEXT: ret void 2661 // 2662 // 2663 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2664 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2665 // CHECK15-NEXT: entry: 2666 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2667 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2668 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2669 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 2670 // CHECK15-NEXT: ret void 2671 // 2672 // 2673 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80 2674 // CHECK15-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] { 2675 // CHECK15-NEXT: entry: 2676 // CHECK15-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 2677 // CHECK15-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 2678 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined) 2679 // CHECK15-NEXT: ret void 2680 // 2681 // 2682 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined 2683 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2684 // CHECK15-NEXT: entry: 2685 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2686 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2687 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2688 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2689 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2690 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2691 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2692 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2693 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2694 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2695 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2696 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2697 // CHECK15-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2698 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 2699 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2700 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2701 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2702 // CHECK15-NEXT: store ptr undef, ptr [[_TMP1]], align 4 2703 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2704 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 2705 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2706 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2707 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2708 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 2709 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2710 // CHECK15: arrayctor.loop: 2711 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2712 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2713 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 2714 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2715 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2716 // CHECK15: arrayctor.cont: 2717 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2718 // CHECK15-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 2719 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2720 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2721 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2722 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2723 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2724 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2725 // CHECK15: cond.true: 2726 // CHECK15-NEXT: br label [[COND_END:%.*]] 2727 // CHECK15: cond.false: 2728 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2729 // CHECK15-NEXT: br label [[COND_END]] 2730 // CHECK15: cond.end: 2731 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2732 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2733 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2734 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2735 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2736 // CHECK15: omp.inner.for.cond: 2737 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2738 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2739 // CHECK15-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2740 // CHECK15-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2741 // CHECK15: omp.inner.for.cond.cleanup: 2742 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2743 // CHECK15: omp.inner.for.body: 2744 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2745 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2746 // CHECK15-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]) 2747 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2748 // CHECK15: omp.inner.for.inc: 2749 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2750 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2751 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 2752 // CHECK15-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2753 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 2754 // CHECK15: omp.inner.for.end: 2755 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2756 // CHECK15: omp.loop.exit: 2757 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2758 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 2759 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]]) 2760 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 2761 // CHECK15-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2762 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i32 2 2763 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2764 // CHECK15: arraydestroy.body: 2765 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2766 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2767 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2768 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 2769 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 2770 // CHECK15: arraydestroy.done5: 2771 // CHECK15-NEXT: ret void 2772 // 2773 // 2774 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2775 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2776 // CHECK15-NEXT: entry: 2777 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2778 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2779 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2780 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2781 // CHECK15-NEXT: ret void 2782 // 2783 // 2784 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l80.omp_outlined.omp_outlined 2785 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] { 2786 // CHECK15-NEXT: entry: 2787 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2788 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2789 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2790 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2791 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2792 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2793 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2794 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2795 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2796 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2797 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2798 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2799 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2800 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2801 // CHECK15-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2802 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 2803 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2804 // CHECK15-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2805 // CHECK15-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2806 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2807 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2808 // CHECK15-NEXT: store ptr undef, ptr [[_TMP1]], align 4 2809 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2810 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2811 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2812 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2813 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 2814 // CHECK15-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 2815 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2816 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2817 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2818 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 2819 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2820 // CHECK15: arrayctor.loop: 2821 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2822 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2823 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 2824 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2825 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2826 // CHECK15: arrayctor.cont: 2827 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 2828 // CHECK15-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 2829 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2830 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 2831 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2832 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2833 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 2834 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2835 // CHECK15: cond.true: 2836 // CHECK15-NEXT: br label [[COND_END:%.*]] 2837 // CHECK15: cond.false: 2838 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2839 // CHECK15-NEXT: br label [[COND_END]] 2840 // CHECK15: cond.end: 2841 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2842 // CHECK15-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2843 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2844 // CHECK15-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 2845 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2846 // CHECK15: omp.inner.for.cond: 2847 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2848 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2849 // CHECK15-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2850 // CHECK15-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2851 // CHECK15: omp.inner.for.cond.cleanup: 2852 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2853 // CHECK15: omp.inner.for.body: 2854 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2855 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2856 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2857 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4 2858 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4 2859 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 2860 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]] 2861 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4 2862 // CHECK15-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4 2863 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 2864 // CHECK15-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP13]] 2865 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false) 2866 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2867 // CHECK15: omp.body.continue: 2868 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2869 // CHECK15: omp.inner.for.inc: 2870 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2871 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2872 // CHECK15-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 2873 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 2874 // CHECK15: omp.inner.for.end: 2875 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2876 // CHECK15: omp.loop.exit: 2877 // CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2878 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 2879 // CHECK15-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 2880 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR2]] 2881 // CHECK15-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2882 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 2 2883 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2884 // CHECK15: arraydestroy.body: 2885 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2886 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2887 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR2]] 2888 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 2889 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 2890 // CHECK15: arraydestroy.done7: 2891 // CHECK15-NEXT: ret void 2892 // 2893 // 2894 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2895 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2896 // CHECK15-NEXT: entry: 2897 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2898 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2899 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2900 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]] 2901 // CHECK15-NEXT: ret void 2902 // 2903 // 2904 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2905 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2906 // CHECK15-NEXT: entry: 2907 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2908 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2909 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2910 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2911 // CHECK15-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 2912 // CHECK15-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 2913 // CHECK15-NEXT: store float [[CONV]], ptr [[F]], align 4 2914 // CHECK15-NEXT: ret void 2915 // 2916 // 2917 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2918 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2919 // CHECK15-NEXT: entry: 2920 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2921 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2922 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2923 // CHECK15-NEXT: ret void 2924 // 2925 // 2926 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2927 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2928 // CHECK15-NEXT: entry: 2929 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2930 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2931 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2932 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2933 // CHECK15-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @g, align 4 2934 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2935 // CHECK15-NEXT: ret void 2936 // 2937 // 2938 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2939 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2940 // CHECK15-NEXT: entry: 2941 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2942 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2943 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2944 // CHECK15-NEXT: ret void 2945 // 2946 // 2947 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104 2948 // CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] { 2949 // CHECK17-NEXT: entry: 2950 // CHECK17-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 2951 // CHECK17-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 2952 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined) 2953 // CHECK17-NEXT: ret void 2954 // 2955 // 2956 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined 2957 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 2958 // CHECK17-NEXT: entry: 2959 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2960 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2961 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2962 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 2963 // CHECK17-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 2964 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2965 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2966 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2967 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2968 // CHECK17-NEXT: [[G:%.*]] = alloca i32, align 4 2969 // CHECK17-NEXT: [[G1:%.*]] = alloca i32, align 4 2970 // CHECK17-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 2971 // CHECK17-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 2972 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 2973 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2974 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2975 // CHECK17-NEXT: store ptr undef, ptr [[_TMP1]], align 8 2976 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2977 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 2978 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2979 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2980 // CHECK17-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 8 2981 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2982 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 2983 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2984 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2985 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 2986 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2987 // CHECK17: cond.true: 2988 // CHECK17-NEXT: br label [[COND_END:%.*]] 2989 // CHECK17: cond.false: 2990 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2991 // CHECK17-NEXT: br label [[COND_END]] 2992 // CHECK17: cond.end: 2993 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2994 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2995 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2996 // CHECK17-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 2997 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2998 // CHECK17: omp.inner.for.cond: 2999 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3000 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3001 // CHECK17-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3002 // CHECK17-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3003 // CHECK17: omp.inner.for.body: 3004 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3005 // CHECK17-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3006 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3007 // CHECK17-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3008 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 3009 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3010 // CHECK17: omp.inner.for.inc: 3011 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3012 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 3013 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3014 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 3015 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 3016 // CHECK17: omp.inner.for.end: 3017 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3018 // CHECK17: omp.loop.exit: 3019 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 3020 // CHECK17-NEXT: ret void 3021 // 3022 // 3023 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l104.omp_outlined.omp_outlined 3024 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR0]] { 3025 // CHECK17-NEXT: entry: 3026 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 3027 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 3028 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3029 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3030 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3031 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 3032 // CHECK17-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 3033 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3034 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3035 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3036 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3037 // CHECK17-NEXT: [[G:%.*]] = alloca i32, align 4 3038 // CHECK17-NEXT: [[G1:%.*]] = alloca i32, align 4 3039 // CHECK17-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 3040 // CHECK17-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 3041 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 3042 // CHECK17-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 3043 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 3044 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 3045 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3046 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3047 // CHECK17-NEXT: store ptr undef, ptr [[_TMP1]], align 8 3048 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3049 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 3050 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 3051 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3052 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 3053 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 3054 // CHECK17-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 3055 // CHECK17-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 3056 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3057 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3058 // CHECK17-NEXT: store ptr [[G1]], ptr [[_TMP3]], align 8 3059 // CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 3060 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 3061 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3062 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3063 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 3064 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3065 // CHECK17: cond.true: 3066 // CHECK17-NEXT: br label [[COND_END:%.*]] 3067 // CHECK17: cond.false: 3068 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3069 // CHECK17-NEXT: br label [[COND_END]] 3070 // CHECK17: cond.end: 3071 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3072 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3073 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3074 // CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 3075 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3076 // CHECK17: omp.inner.for.cond: 3077 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3078 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3079 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3080 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3081 // CHECK17: omp.inner.for.body: 3082 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3083 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3084 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3085 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4 3086 // CHECK17-NEXT: store i32 1, ptr [[G]], align 4 3087 // CHECK17-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP3]], align 8 3088 // CHECK17-NEXT: store volatile i32 1, ptr [[TMP10]], align 4 3089 // CHECK17-NEXT: store i32 2, ptr [[SIVAR]], align 4 3090 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 3091 // CHECK17-NEXT: store ptr [[G]], ptr [[TMP11]], align 8 3092 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 3093 // CHECK17-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP3]], align 8 3094 // CHECK17-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8 3095 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 2 3096 // CHECK17-NEXT: store ptr [[SIVAR]], ptr [[TMP14]], align 8 3097 // CHECK17-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 3098 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3099 // CHECK17: omp.body.continue: 3100 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3101 // CHECK17: omp.inner.for.inc: 3102 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 3103 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], 1 3104 // CHECK17-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4 3105 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 3106 // CHECK17: omp.inner.for.end: 3107 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3108 // CHECK17: omp.loop.exit: 3109 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 3110 // CHECK17-NEXT: ret void 3111 // 3112