1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 13 14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 21 22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 29 30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 34 // expected-no-diagnostics 35 #ifndef HEADER 36 #define HEADER 37 38 void fn1(); 39 void fn2(); 40 void fn3(); 41 void fn4(); 42 void fn5(); 43 void fn6(); 44 45 int Arg; 46 47 void gtid_test() { 48 #pragma omp target teams distribute parallel for 49 for(int i = 0 ; i < 100; i++) {} 50 51 #pragma omp target teams distribute parallel for if (parallel: false) 52 for(int i = 0 ; i < 100; i++) { 53 gtid_test(); 54 } 55 } 56 57 58 template <typename T> 59 int tmain(T Arg) { 60 #pragma omp target teams distribute parallel for if (true) 61 for(int i = 0 ; i < 100; i++) { 62 fn1(); 63 } 64 #pragma omp target teams distribute parallel for if (false) 65 for(int i = 0 ; i < 100; i++) { 66 fn2(); 67 } 68 #pragma omp target teams distribute parallel for if (parallel: Arg) 69 for(int i = 0 ; i < 100; i++) { 70 fn3(); 71 } 72 return 0; 73 } 74 75 int main() { 76 #pragma omp target teams distribute parallel for if (true) 77 for(int i = 0 ; i < 100; i++) { 78 79 80 fn4(); 81 } 82 83 #pragma omp target teams distribute parallel for if (false) 84 for(int i = 0 ; i < 100; i++) { 85 86 87 fn5(); 88 } 89 90 #pragma omp target teams distribute parallel for if (Arg) 91 for(int i = 0 ; i < 100; i++) { 92 93 94 fn6(); 95 } 96 97 return tmain(Arg); 98 } 99 100 101 102 103 104 105 // call void [[T_OUTLINE_FUN_3:@.+]]( 106 107 #endif 108 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 109 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 110 // CHECK1-NEXT: entry: 111 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 112 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 113 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 114 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 115 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 116 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 117 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 118 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 119 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 120 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 121 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 122 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 123 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 124 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 125 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 126 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 127 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 128 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 129 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 130 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 131 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 132 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 133 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 134 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 135 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 136 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 137 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 138 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 139 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 140 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 141 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS]]) 142 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 143 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 144 // CHECK1: omp_offload.failed: 145 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]] 146 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 147 // CHECK1: omp_offload.cont: 148 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 149 // CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4 150 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 151 // CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4 152 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 153 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 154 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 155 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 156 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 157 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 158 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 159 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 160 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 161 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 162 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 163 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 164 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 165 // CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 8 166 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 167 // CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8 168 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 169 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4 170 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 171 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP26]], align 4 172 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 173 // CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4 174 // CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51.region_id, ptr [[KERNEL_ARGS2]]) 175 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 176 // CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 177 // CHECK1: omp_offload.failed3: 178 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51() #[[ATTR2]] 179 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 180 // CHECK1: omp_offload.cont4: 181 // CHECK1-NEXT: ret void 182 // 183 // 184 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48 185 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 186 // CHECK1-NEXT: entry: 187 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined) 188 // CHECK1-NEXT: ret void 189 // 190 // 191 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined 192 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 193 // CHECK1-NEXT: entry: 194 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 195 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 196 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 197 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 198 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 199 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 201 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 203 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 204 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 205 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 206 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 207 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 208 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 209 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 210 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 211 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 212 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 213 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 214 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 215 // CHECK1: cond.true: 216 // CHECK1-NEXT: br label [[COND_END:%.*]] 217 // CHECK1: cond.false: 218 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 219 // CHECK1-NEXT: br label [[COND_END]] 220 // CHECK1: cond.end: 221 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 222 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 223 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 224 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 225 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 226 // CHECK1: omp.inner.for.cond: 227 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 228 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 229 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 230 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 231 // CHECK1: omp.inner.for.body: 232 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 233 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 234 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 235 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 236 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 237 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 238 // CHECK1: omp.inner.for.inc: 239 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 240 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 241 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 242 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 243 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 244 // CHECK1: omp.inner.for.end: 245 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 246 // CHECK1: omp.loop.exit: 247 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 248 // CHECK1-NEXT: ret void 249 // 250 // 251 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined 252 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 253 // CHECK1-NEXT: entry: 254 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 255 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 256 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 257 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 258 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 260 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 261 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 262 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 263 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 264 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 265 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 266 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 267 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 268 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 269 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 270 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 271 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 272 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 273 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 274 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 275 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 276 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 277 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 278 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 279 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 280 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 281 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 282 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 283 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 284 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 285 // CHECK1: cond.true: 286 // CHECK1-NEXT: br label [[COND_END:%.*]] 287 // CHECK1: cond.false: 288 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 289 // CHECK1-NEXT: br label [[COND_END]] 290 // CHECK1: cond.end: 291 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 292 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 293 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 294 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 295 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 296 // CHECK1: omp.inner.for.cond: 297 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 298 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 299 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 300 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 301 // CHECK1: omp.inner.for.body: 302 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 304 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 305 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 306 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 307 // CHECK1: omp.body.continue: 308 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 309 // CHECK1: omp.inner.for.inc: 310 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 311 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 312 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 313 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 314 // CHECK1: omp.inner.for.end: 315 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 316 // CHECK1: omp.loop.exit: 317 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 318 // CHECK1-NEXT: ret void 319 // 320 // 321 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51 322 // CHECK1-SAME: () #[[ATTR1]] { 323 // CHECK1-NEXT: entry: 324 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51.omp_outlined) 325 // CHECK1-NEXT: ret void 326 // 327 // 328 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51.omp_outlined 329 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 330 // CHECK1-NEXT: entry: 331 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 332 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 333 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 334 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 335 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 336 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 337 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 338 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 339 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 340 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 341 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 342 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 343 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 344 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 345 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 346 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 347 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 348 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 349 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 350 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 351 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 352 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 353 // CHECK1: cond.true: 354 // CHECK1-NEXT: br label [[COND_END:%.*]] 355 // CHECK1: cond.false: 356 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 357 // CHECK1-NEXT: br label [[COND_END]] 358 // CHECK1: cond.end: 359 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 360 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 361 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 362 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 363 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 364 // CHECK1: omp.inner.for.cond: 365 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 366 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 367 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 368 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 369 // CHECK1: omp.inner.for.body: 370 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 371 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 372 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 373 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 374 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 375 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 376 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 377 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 378 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 379 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 380 // CHECK1: omp.inner.for.inc: 381 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 382 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 383 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 384 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 385 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 386 // CHECK1: omp.inner.for.end: 387 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 388 // CHECK1: omp.loop.exit: 389 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 390 // CHECK1-NEXT: ret void 391 // 392 // 393 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51.omp_outlined.omp_outlined 394 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 395 // CHECK1-NEXT: entry: 396 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 397 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 398 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 399 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 400 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 408 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 409 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 410 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 411 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 412 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 413 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 414 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 415 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 416 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 417 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 418 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 419 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 420 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 421 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 422 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 423 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 424 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 425 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 426 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 427 // CHECK1: cond.true: 428 // CHECK1-NEXT: br label [[COND_END:%.*]] 429 // CHECK1: cond.false: 430 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 431 // CHECK1-NEXT: br label [[COND_END]] 432 // CHECK1: cond.end: 433 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 434 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 435 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 436 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 437 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 438 // CHECK1: omp.inner.for.cond: 439 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 440 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 441 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 442 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 443 // CHECK1: omp.inner.for.body: 444 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 445 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 446 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 447 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 448 // CHECK1-NEXT: call void @_Z9gtid_testv() 449 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 450 // CHECK1: omp.body.continue: 451 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 452 // CHECK1: omp.inner.for.inc: 453 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 454 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 455 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 456 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 457 // CHECK1: omp.inner.for.end: 458 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 459 // CHECK1: omp.loop.exit: 460 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 461 // CHECK1-NEXT: ret void 462 // 463 // 464 // CHECK1-LABEL: define {{[^@]+}}@main 465 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 466 // CHECK1-NEXT: entry: 467 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 470 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 471 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 472 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 473 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 474 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 475 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 476 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 477 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 478 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 479 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 480 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 481 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 482 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 483 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 484 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 485 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 486 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 487 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 488 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 489 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 490 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 491 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 492 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 493 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 494 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 495 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 496 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 497 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 498 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 499 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 500 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 501 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 502 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 503 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 504 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, ptr [[KERNEL_ARGS]]) 505 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 506 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 507 // CHECK1: omp_offload.failed: 508 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]] 509 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 510 // CHECK1: omp_offload.cont: 511 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83() #[[ATTR2]] 512 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 4 513 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 514 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 515 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 516 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 517 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 518 // CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 519 // CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 520 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 521 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 522 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP18]] to i1 523 // CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 524 // CHECK1: omp_if.then: 525 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 526 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 527 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 528 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP20]], align 8 529 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 530 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 531 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 532 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 533 // CHECK1-NEXT: [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 534 // CHECK1-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP24]] to i1 535 // CHECK1-NEXT: [[TMP25:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 536 // CHECK1-NEXT: [[TMP26:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP25]], 0 537 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 538 // CHECK1-NEXT: store i32 3, ptr [[TMP27]], align 4 539 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 540 // CHECK1-NEXT: store i32 1, ptr [[TMP28]], align 4 541 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 542 // CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 543 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 544 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP30]], align 8 545 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 546 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP31]], align 8 547 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 548 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP32]], align 8 549 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 550 // CHECK1-NEXT: store ptr null, ptr [[TMP33]], align 8 551 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 552 // CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8 553 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 554 // CHECK1-NEXT: store i64 100, ptr [[TMP35]], align 8 555 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 556 // CHECK1-NEXT: store i64 0, ptr [[TMP36]], align 8 557 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 558 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP37]], align 4 559 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 560 // CHECK1-NEXT: store [3 x i32] [[TMP26]], ptr [[TMP38]], align 4 561 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 562 // CHECK1-NEXT: store i32 0, ptr [[TMP39]], align 4 563 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP25]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS5]]) 564 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 565 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 566 // CHECK1: omp_offload.failed6: 567 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90(i64 [[TMP17]]) #[[ATTR2]] 568 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 569 // CHECK1: omp_offload.cont7: 570 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 571 // CHECK1: omp_if.else: 572 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90(i64 [[TMP17]]) #[[ATTR2]] 573 // CHECK1-NEXT: br label [[OMP_IF_END]] 574 // CHECK1: omp_if.end: 575 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr @Arg, align 4 576 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]]) 577 // CHECK1-NEXT: ret i32 [[CALL]] 578 // 579 // 580 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76 581 // CHECK1-SAME: () #[[ATTR1]] { 582 // CHECK1-NEXT: entry: 583 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined) 584 // CHECK1-NEXT: ret void 585 // 586 // 587 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined 588 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 589 // CHECK1-NEXT: entry: 590 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 591 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 592 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 593 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 594 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 595 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 596 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 597 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 598 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 599 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 600 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 601 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 602 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 603 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 604 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 605 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 606 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 607 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 608 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 609 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 610 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 611 // CHECK1: cond.true: 612 // CHECK1-NEXT: br label [[COND_END:%.*]] 613 // CHECK1: cond.false: 614 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 615 // CHECK1-NEXT: br label [[COND_END]] 616 // CHECK1: cond.end: 617 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 618 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 619 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 620 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 621 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 622 // CHECK1: omp.inner.for.cond: 623 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 624 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 625 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 626 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 627 // CHECK1: omp.inner.for.body: 628 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 629 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 630 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 631 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 632 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 633 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 634 // CHECK1: omp.inner.for.inc: 635 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 636 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 637 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 638 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 639 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 640 // CHECK1: omp.inner.for.end: 641 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 642 // CHECK1: omp.loop.exit: 643 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 644 // CHECK1-NEXT: ret void 645 // 646 // 647 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.omp_outlined.omp_outlined 648 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 649 // CHECK1-NEXT: entry: 650 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 651 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 652 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 653 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 654 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 655 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 656 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 657 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 658 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 659 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 660 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 661 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 662 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 663 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 664 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 665 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 666 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 667 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 668 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 669 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 670 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 671 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 672 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 673 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 674 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 675 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 677 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 678 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 679 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 680 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 681 // CHECK1: cond.true: 682 // CHECK1-NEXT: br label [[COND_END:%.*]] 683 // CHECK1: cond.false: 684 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 685 // CHECK1-NEXT: br label [[COND_END]] 686 // CHECK1: cond.end: 687 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 688 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 689 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 690 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 691 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 692 // CHECK1: omp.inner.for.cond: 693 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 694 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 695 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 696 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 697 // CHECK1: omp.inner.for.body: 698 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 699 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 700 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 701 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 702 // CHECK1-NEXT: call void @_Z3fn4v() 703 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 704 // CHECK1: omp.body.continue: 705 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 706 // CHECK1: omp.inner.for.inc: 707 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 708 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 709 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 710 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 711 // CHECK1: omp.inner.for.end: 712 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 713 // CHECK1: omp.loop.exit: 714 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 715 // CHECK1-NEXT: ret void 716 // 717 // 718 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83 719 // CHECK1-SAME: () #[[ATTR1]] { 720 // CHECK1-NEXT: entry: 721 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined) 722 // CHECK1-NEXT: ret void 723 // 724 // 725 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined 726 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 727 // CHECK1-NEXT: entry: 728 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 729 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 730 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 731 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 732 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 733 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 737 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 738 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 739 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 740 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 741 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 742 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 743 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 744 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 745 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 746 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 747 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 748 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 749 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 750 // CHECK1: cond.true: 751 // CHECK1-NEXT: br label [[COND_END:%.*]] 752 // CHECK1: cond.false: 753 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 754 // CHECK1-NEXT: br label [[COND_END]] 755 // CHECK1: cond.end: 756 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 757 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 758 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 759 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 760 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 761 // CHECK1: omp.inner.for.cond: 762 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 763 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 764 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 765 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 766 // CHECK1: omp.inner.for.body: 767 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 768 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 769 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 770 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 771 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 772 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 773 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 774 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 775 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 776 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 777 // CHECK1: omp.inner.for.inc: 778 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 779 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 780 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 781 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 782 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 783 // CHECK1: omp.inner.for.end: 784 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 785 // CHECK1: omp.loop.exit: 786 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 787 // CHECK1-NEXT: ret void 788 // 789 // 790 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined 791 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 792 // CHECK1-NEXT: entry: 793 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 794 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 795 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 796 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 797 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 798 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 799 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 800 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 801 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 802 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 803 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 804 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 805 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 806 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 807 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 808 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 809 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 810 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 811 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 812 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 813 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 814 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 815 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 816 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 817 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 818 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 819 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 820 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 821 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 822 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 823 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 824 // CHECK1: cond.true: 825 // CHECK1-NEXT: br label [[COND_END:%.*]] 826 // CHECK1: cond.false: 827 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 828 // CHECK1-NEXT: br label [[COND_END]] 829 // CHECK1: cond.end: 830 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 831 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 832 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 833 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 834 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 835 // CHECK1: omp.inner.for.cond: 836 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 837 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 838 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 839 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 840 // CHECK1: omp.inner.for.body: 841 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 842 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 843 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 844 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 845 // CHECK1-NEXT: call void @_Z3fn5v() 846 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 847 // CHECK1: omp.body.continue: 848 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 849 // CHECK1: omp.inner.for.inc: 850 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 851 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 852 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 853 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 854 // CHECK1: omp.inner.for.end: 855 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 856 // CHECK1: omp.loop.exit: 857 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 858 // CHECK1-NEXT: ret void 859 // 860 // 861 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90 862 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 863 // CHECK1-NEXT: entry: 864 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 865 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 866 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 867 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 868 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 869 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 870 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 871 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 872 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined, i64 [[TMP1]]) 873 // CHECK1-NEXT: ret void 874 // 875 // 876 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined 877 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 878 // CHECK1-NEXT: entry: 879 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 880 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 881 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 882 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 883 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 884 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 885 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 886 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 887 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 888 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 889 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 890 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 891 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 892 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 893 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 894 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 895 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 896 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 897 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 898 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 899 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 900 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 901 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 902 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 903 // CHECK1: cond.true: 904 // CHECK1-NEXT: br label [[COND_END:%.*]] 905 // CHECK1: cond.false: 906 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 907 // CHECK1-NEXT: br label [[COND_END]] 908 // CHECK1: cond.end: 909 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 910 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 911 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 912 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 913 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 914 // CHECK1: omp.inner.for.cond: 915 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 916 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 917 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 918 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 919 // CHECK1: omp.inner.for.body: 920 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 921 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 922 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 923 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 924 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 925 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 926 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 927 // CHECK1: omp_if.then: 928 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 929 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 930 // CHECK1: omp_if.else: 931 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 932 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 933 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 934 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 935 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 936 // CHECK1-NEXT: br label [[OMP_IF_END]] 937 // CHECK1: omp_if.end: 938 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 939 // CHECK1: omp.inner.for.inc: 940 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 941 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 942 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 943 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 944 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 945 // CHECK1: omp.inner.for.end: 946 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 947 // CHECK1: omp.loop.exit: 948 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 949 // CHECK1-NEXT: ret void 950 // 951 // 952 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined 953 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 954 // CHECK1-NEXT: entry: 955 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 956 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 957 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 958 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 959 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 960 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 961 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 962 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 963 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 964 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 965 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 966 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 967 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 968 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 969 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 970 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 971 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 972 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 973 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 974 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 975 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 976 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 977 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 978 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 979 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 980 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 981 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 982 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 983 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 984 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 985 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 986 // CHECK1: cond.true: 987 // CHECK1-NEXT: br label [[COND_END:%.*]] 988 // CHECK1: cond.false: 989 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 990 // CHECK1-NEXT: br label [[COND_END]] 991 // CHECK1: cond.end: 992 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 993 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 994 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 995 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 996 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 997 // CHECK1: omp.inner.for.cond: 998 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 999 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1000 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1001 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1002 // CHECK1: omp.inner.for.body: 1003 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1004 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1005 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1006 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1007 // CHECK1-NEXT: call void @_Z3fn6v() 1008 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1009 // CHECK1: omp.body.continue: 1010 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1011 // CHECK1: omp.inner.for.inc: 1012 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1013 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1014 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1016 // CHECK1: omp.inner.for.end: 1017 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1018 // CHECK1: omp.loop.exit: 1019 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1020 // CHECK1-NEXT: ret void 1021 // 1022 // 1023 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 1024 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 1025 // CHECK1-NEXT: entry: 1026 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 1027 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1028 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1029 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1030 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1031 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1032 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1033 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1034 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1035 // CHECK1-NEXT: [[KERNEL_ARGS4:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1036 // CHECK1-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 1037 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1038 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 1039 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1040 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 1041 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1042 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 1043 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1044 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 1045 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1046 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 1047 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1048 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 1049 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1050 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 1051 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1052 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 1053 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1054 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 1055 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1056 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 1057 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1058 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1059 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1060 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1061 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1062 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 1063 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60.region_id, ptr [[KERNEL_ARGS]]) 1064 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1065 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1066 // CHECK1: omp_offload.failed: 1067 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60() #[[ATTR2]] 1068 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1069 // CHECK1: omp_offload.cont: 1070 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64() #[[ATTR2]] 1071 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 1072 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 1073 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8 1074 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 1075 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1076 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP16]] to i1 1077 // CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 1078 // CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 1079 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 1080 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1081 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP18]], align 8 1082 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1083 // CHECK1-NEXT: store i64 [[TMP17]], ptr [[TMP19]], align 8 1084 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1085 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 1086 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1087 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1088 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1089 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP23]] to i1 1090 // CHECK1-NEXT: [[TMP24:%.*]] = select i1 [[LOADEDV2]], i32 0, i32 1 1091 // CHECK1-NEXT: [[TMP25:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 1092 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 0 1093 // CHECK1-NEXT: store i32 3, ptr [[TMP26]], align 4 1094 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 1 1095 // CHECK1-NEXT: store i32 1, ptr [[TMP27]], align 4 1096 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 2 1097 // CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP28]], align 8 1098 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 3 1099 // CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP29]], align 8 1100 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 4 1101 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP30]], align 8 1102 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 5 1103 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP31]], align 8 1104 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 6 1105 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 1106 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 7 1107 // CHECK1-NEXT: store ptr null, ptr [[TMP33]], align 8 1108 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 8 1109 // CHECK1-NEXT: store i64 100, ptr [[TMP34]], align 8 1110 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 9 1111 // CHECK1-NEXT: store i64 0, ptr [[TMP35]], align 8 1112 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 10 1113 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 1114 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 11 1115 // CHECK1-NEXT: store [3 x i32] [[TMP25]], ptr [[TMP37]], align 4 1116 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS4]], i32 0, i32 12 1117 // CHECK1-NEXT: store i32 0, ptr [[TMP38]], align 4 1118 // CHECK1-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.region_id, ptr [[KERNEL_ARGS4]]) 1119 // CHECK1-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 1120 // CHECK1-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1121 // CHECK1: omp_offload.failed5: 1122 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68(i64 [[TMP17]]) #[[ATTR2]] 1123 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1124 // CHECK1: omp_offload.cont6: 1125 // CHECK1-NEXT: ret i32 0 1126 // 1127 // 1128 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60 1129 // CHECK1-SAME: () #[[ATTR1]] { 1130 // CHECK1-NEXT: entry: 1131 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60.omp_outlined) 1132 // CHECK1-NEXT: ret void 1133 // 1134 // 1135 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60.omp_outlined 1136 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1137 // CHECK1-NEXT: entry: 1138 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1139 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1140 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1141 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1142 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1143 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1144 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1145 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1146 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1147 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1148 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1149 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1150 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1151 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1152 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1153 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1154 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1155 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1156 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1157 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1158 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1159 // CHECK1: cond.true: 1160 // CHECK1-NEXT: br label [[COND_END:%.*]] 1161 // CHECK1: cond.false: 1162 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1163 // CHECK1-NEXT: br label [[COND_END]] 1164 // CHECK1: cond.end: 1165 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1166 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1167 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1168 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1169 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1170 // CHECK1: omp.inner.for.cond: 1171 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1172 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1173 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1174 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1175 // CHECK1: omp.inner.for.body: 1176 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1177 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1178 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1179 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1180 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 1181 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1182 // CHECK1: omp.inner.for.inc: 1183 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1184 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1185 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1186 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1187 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1188 // CHECK1: omp.inner.for.end: 1189 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1190 // CHECK1: omp.loop.exit: 1191 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1192 // CHECK1-NEXT: ret void 1193 // 1194 // 1195 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60.omp_outlined.omp_outlined 1196 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1197 // CHECK1-NEXT: entry: 1198 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1199 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1200 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1201 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1202 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1203 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1204 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1205 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1206 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1207 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1208 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1209 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1210 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1211 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1212 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1213 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1214 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1215 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1216 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1217 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1218 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1219 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1220 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1221 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1222 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1223 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1224 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1225 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1226 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1227 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1228 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1229 // CHECK1: cond.true: 1230 // CHECK1-NEXT: br label [[COND_END:%.*]] 1231 // CHECK1: cond.false: 1232 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1233 // CHECK1-NEXT: br label [[COND_END]] 1234 // CHECK1: cond.end: 1235 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1236 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1237 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1238 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1239 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1240 // CHECK1: omp.inner.for.cond: 1241 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1242 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1243 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1244 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1245 // CHECK1: omp.inner.for.body: 1246 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1247 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1248 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1249 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1250 // CHECK1-NEXT: call void @_Z3fn1v() 1251 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1252 // CHECK1: omp.body.continue: 1253 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1254 // CHECK1: omp.inner.for.inc: 1255 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1256 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1257 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1258 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1259 // CHECK1: omp.inner.for.end: 1260 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1261 // CHECK1: omp.loop.exit: 1262 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1263 // CHECK1-NEXT: ret void 1264 // 1265 // 1266 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64 1267 // CHECK1-SAME: () #[[ATTR1]] { 1268 // CHECK1-NEXT: entry: 1269 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64.omp_outlined) 1270 // CHECK1-NEXT: ret void 1271 // 1272 // 1273 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64.omp_outlined 1274 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1275 // CHECK1-NEXT: entry: 1276 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1277 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1278 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1279 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1280 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1281 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1282 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1283 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1284 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1285 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1286 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1287 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1288 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1289 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1290 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1291 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1292 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1293 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1294 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1295 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1296 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1297 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1298 // CHECK1: cond.true: 1299 // CHECK1-NEXT: br label [[COND_END:%.*]] 1300 // CHECK1: cond.false: 1301 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1302 // CHECK1-NEXT: br label [[COND_END]] 1303 // CHECK1: cond.end: 1304 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1305 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1306 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1307 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1308 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1309 // CHECK1: omp.inner.for.cond: 1310 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1311 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1312 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1313 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1314 // CHECK1: omp.inner.for.body: 1315 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1316 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1317 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1318 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1319 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 1320 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1321 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1322 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1323 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 1324 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1325 // CHECK1: omp.inner.for.inc: 1326 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1327 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1328 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1329 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1331 // CHECK1: omp.inner.for.end: 1332 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1333 // CHECK1: omp.loop.exit: 1334 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1335 // CHECK1-NEXT: ret void 1336 // 1337 // 1338 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64.omp_outlined.omp_outlined 1339 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1340 // CHECK1-NEXT: entry: 1341 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1342 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1343 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1344 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1345 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1346 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1347 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1348 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1349 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1350 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1351 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1352 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1353 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1354 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1355 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1356 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1357 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1358 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1359 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1360 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1361 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1362 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1363 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1364 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1365 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1366 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1367 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1368 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1369 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1370 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1371 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1372 // CHECK1: cond.true: 1373 // CHECK1-NEXT: br label [[COND_END:%.*]] 1374 // CHECK1: cond.false: 1375 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1376 // CHECK1-NEXT: br label [[COND_END]] 1377 // CHECK1: cond.end: 1378 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1379 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1380 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1381 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1382 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1383 // CHECK1: omp.inner.for.cond: 1384 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1385 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1386 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1387 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1388 // CHECK1: omp.inner.for.body: 1389 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1390 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1391 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1392 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1393 // CHECK1-NEXT: call void @_Z3fn2v() 1394 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1395 // CHECK1: omp.body.continue: 1396 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1397 // CHECK1: omp.inner.for.inc: 1398 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1399 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1400 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1401 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1402 // CHECK1: omp.inner.for.end: 1403 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1404 // CHECK1: omp.loop.exit: 1405 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1406 // CHECK1-NEXT: ret void 1407 // 1408 // 1409 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68 1410 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1411 // CHECK1-NEXT: entry: 1412 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1413 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1414 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1415 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1416 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1 1417 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i8 1418 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 1419 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 1420 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.omp_outlined, i64 [[TMP1]]) 1421 // CHECK1-NEXT: ret void 1422 // 1423 // 1424 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.omp_outlined 1425 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1426 // CHECK1-NEXT: entry: 1427 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1428 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1429 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1430 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1431 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1432 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1433 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1434 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1435 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1436 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1437 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1438 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1439 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1440 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1441 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1442 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1443 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1444 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1445 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1446 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1447 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1448 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1449 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1450 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1451 // CHECK1: cond.true: 1452 // CHECK1-NEXT: br label [[COND_END:%.*]] 1453 // CHECK1: cond.false: 1454 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1455 // CHECK1-NEXT: br label [[COND_END]] 1456 // CHECK1: cond.end: 1457 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1458 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1459 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1460 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1462 // CHECK1: omp.inner.for.cond: 1463 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1464 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1465 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1466 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1467 // CHECK1: omp.inner.for.body: 1468 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1469 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1470 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1471 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1472 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1473 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP11]] to i1 1474 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1475 // CHECK1: omp_if.then: 1476 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 1477 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1478 // CHECK1: omp_if.else: 1479 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 1480 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1481 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1482 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.omp_outlined.omp_outlined(ptr [[TMP12]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1483 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 1484 // CHECK1-NEXT: br label [[OMP_IF_END]] 1485 // CHECK1: omp_if.end: 1486 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1487 // CHECK1: omp.inner.for.inc: 1488 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1489 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1490 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1491 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1492 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1493 // CHECK1: omp.inner.for.end: 1494 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1495 // CHECK1: omp.loop.exit: 1496 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1497 // CHECK1-NEXT: ret void 1498 // 1499 // 1500 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.omp_outlined.omp_outlined 1501 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1502 // CHECK1-NEXT: entry: 1503 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1504 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1505 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1506 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1507 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1508 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1509 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1510 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1511 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1512 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1513 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1514 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1515 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1516 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1517 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1518 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1519 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1520 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1521 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1522 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1523 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1524 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1525 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1526 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1527 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1528 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1529 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1530 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1531 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1532 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1533 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1534 // CHECK1: cond.true: 1535 // CHECK1-NEXT: br label [[COND_END:%.*]] 1536 // CHECK1: cond.false: 1537 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1538 // CHECK1-NEXT: br label [[COND_END]] 1539 // CHECK1: cond.end: 1540 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1541 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1542 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1543 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1545 // CHECK1: omp.inner.for.cond: 1546 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1547 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1548 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1549 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1550 // CHECK1: omp.inner.for.body: 1551 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1552 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1553 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1554 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1555 // CHECK1-NEXT: call void @_Z3fn3v() 1556 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1557 // CHECK1: omp.body.continue: 1558 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1559 // CHECK1: omp.inner.for.inc: 1560 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1561 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1562 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1563 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1564 // CHECK1: omp.inner.for.end: 1565 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1566 // CHECK1: omp.loop.exit: 1567 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1568 // CHECK1-NEXT: ret void 1569 // 1570