1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 // Test host codegen. 6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 21 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region) 22 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 23 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK10 24 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 25 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 26 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 27 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK12 28 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 29 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 30 31 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 32 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 34 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 36 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 37 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 38 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 39 40 #ifdef CK1 41 42 43 int target_teams_fun(int *g){ 44 int n = 1000; 45 int a[1000]; 46 int te = n / 128; 47 int th = 128; 48 // discard n_addr 49 // discard capture expressions for te and th 50 51 #pragma omp target teams distribute parallel for num_teams(te), thread_limit(th) 52 for(int i = 0; i < n; i++) { 53 a[i] = 0; 54 #pragma omp cancel for 55 } 56 57 {{{ 58 #pragma omp target teams distribute parallel for is_device_ptr(g) 59 for(int i = 0; i < n; i++) { 60 a[i] = g[0]; 61 } 62 }}} 63 64 // outlined target regions 65 66 67 68 69 return a[0]; 70 } 71 72 #endif // CK1 73 #endif // HEADER 74 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 75 // CHECK1-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 76 // CHECK1-NEXT: entry: 77 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 78 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4 79 // CHECK1-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 80 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4 81 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4 82 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 83 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 84 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 85 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 86 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 87 // CHECK1-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 88 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 89 // CHECK1-NEXT: store i32 1000, ptr [[N]], align 4 90 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 91 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 92 // CHECK1-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 93 // CHECK1-NEXT: store i32 128, ptr [[TH]], align 4 94 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4 95 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 96 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 4 97 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 98 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 99 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 100 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 101 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 102 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 103 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 104 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 105 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4 106 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 8 107 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], ptr [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]] 108 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[N]], align 4 109 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[N_CASTED3]], align 4 110 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[N_CASTED3]], align 8 111 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[G_ADDR]], align 8 112 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i64 [[TMP10]], ptr [[A]], ptr [[TMP11]]) #[[ATTR2]] 113 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0 114 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 115 // CHECK1-NEXT: ret i32 [[TMP12]] 116 // 117 // 118 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 119 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 120 // CHECK1-NEXT: entry: 121 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 122 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 123 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 124 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 125 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 126 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]]) 127 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 128 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 129 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 130 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8 131 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 132 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 133 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 134 // CHECK1-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 135 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 136 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 137 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[N_CASTED]], align 8 138 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i64 [[TMP5]], ptr [[TMP1]]) 139 // CHECK1-NEXT: ret void 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined 143 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 146 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 147 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 148 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 149 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 151 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 152 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 155 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 156 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 157 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 158 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 159 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 160 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 161 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 162 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 163 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 164 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 165 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 166 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 167 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 168 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 169 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 170 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 171 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 172 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 173 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 174 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 175 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 176 // CHECK1: omp.precond.then: 177 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 178 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 179 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 180 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 181 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 182 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 183 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 184 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 185 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 186 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 187 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 188 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 189 // CHECK1: cond.true: 190 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 191 // CHECK1-NEXT: br label [[COND_END:%.*]] 192 // CHECK1: cond.false: 193 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 194 // CHECK1-NEXT: br label [[COND_END]] 195 // CHECK1: cond.end: 196 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 197 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 199 // CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 201 // CHECK1: omp.inner.for.cond: 202 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 203 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 204 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 205 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 206 // CHECK1: omp.inner.for.body: 207 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 208 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 209 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 210 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 211 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 212 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 213 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8 214 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]]) 215 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 216 // CHECK1: omp.inner.for.inc: 217 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 218 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 219 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 220 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 221 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 222 // CHECK1: omp.inner.for.end: 223 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 224 // CHECK1: omp.loop.exit: 225 // CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 226 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 227 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]]) 228 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 229 // CHECK1: omp.precond.end: 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined 234 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 237 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 238 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 239 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 240 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 241 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 242 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 248 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 249 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 250 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 252 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 253 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 254 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 255 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 256 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 257 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 258 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 259 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 260 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 261 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 262 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 263 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 264 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 265 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 266 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 267 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 268 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 269 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 270 // CHECK1: omp.precond.then: 271 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 272 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 273 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 275 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 276 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 277 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32 278 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 279 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 281 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 282 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 283 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 284 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 285 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 286 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 287 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 288 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 289 // CHECK1: cond.true: 290 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 291 // CHECK1-NEXT: br label [[COND_END:%.*]] 292 // CHECK1: cond.false: 293 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 294 // CHECK1-NEXT: br label [[COND_END]] 295 // CHECK1: cond.end: 296 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 297 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 298 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 299 // CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 300 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 301 // CHECK1: omp.inner.for.cond: 302 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 303 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 304 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 305 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 306 // CHECK1: omp.inner.for.body: 307 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 308 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 309 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 310 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 311 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[I4]], align 4 312 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 313 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 314 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 315 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 316 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 317 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB3]], i32 [[TMP19]], i32 2) 318 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 319 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 320 // CHECK1: .cancel.exit: 321 // CHECK1-NEXT: br label [[CANCEL_EXIT:%.*]] 322 // CHECK1: .cancel.continue: 323 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 324 // CHECK1: omp.body.continue: 325 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 326 // CHECK1: omp.inner.for.inc: 327 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 328 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1 329 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 331 // CHECK1: omp.inner.for.end: 332 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 333 // CHECK1: omp.loop.exit: 334 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 335 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 336 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]]) 337 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 338 // CHECK1: cancel.exit: 339 // CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 340 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 341 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP26]]) 342 // CHECK1-NEXT: br label [[CANCEL_CONT:%.*]] 343 // CHECK1: omp.precond.end: 344 // CHECK1-NEXT: br label [[CANCEL_CONT]] 345 // CHECK1: cancel.cont: 346 // CHECK1-NEXT: ret void 347 // 348 // 349 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 350 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 351 // CHECK1-NEXT: entry: 352 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 353 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 354 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 355 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 356 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 357 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 358 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 359 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 360 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 361 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[N_CASTED]], align 4 362 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8 363 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8 364 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]]) 365 // CHECK1-NEXT: ret void 366 // 367 // 368 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined 369 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 370 // CHECK1-NEXT: entry: 371 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 372 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 373 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 374 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 375 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 376 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 377 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 378 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 379 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 381 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 382 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 383 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 384 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 385 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 386 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 387 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 388 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 389 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 390 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 391 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 392 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 393 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 394 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 395 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 396 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 397 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 398 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 399 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 400 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 401 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 402 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 403 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 404 // CHECK1: omp.precond.then: 405 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 406 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 407 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 408 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 410 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 411 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 412 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 413 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 414 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 415 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 416 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 417 // CHECK1: cond.true: 418 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 419 // CHECK1-NEXT: br label [[COND_END:%.*]] 420 // CHECK1: cond.false: 421 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 422 // CHECK1-NEXT: br label [[COND_END]] 423 // CHECK1: cond.end: 424 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 425 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 426 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 427 // CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 428 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 429 // CHECK1: omp.inner.for.cond: 430 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 431 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 432 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 433 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 434 // CHECK1: omp.inner.for.body: 435 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 436 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 437 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 438 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 439 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 440 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 441 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8 442 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8 443 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]]) 444 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 445 // CHECK1: omp.inner.for.inc: 446 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 447 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 448 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 449 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 450 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 451 // CHECK1: omp.inner.for.end: 452 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 453 // CHECK1: omp.loop.exit: 454 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 455 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 456 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 457 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 458 // CHECK1: omp.precond.end: 459 // CHECK1-NEXT: ret void 460 // 461 // 462 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined 463 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 464 // CHECK1-NEXT: entry: 465 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 466 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 467 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 468 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 469 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 470 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 471 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 472 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 475 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 476 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 477 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 478 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 479 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 480 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 481 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 482 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 483 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 484 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 485 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 486 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 487 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 488 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 489 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 490 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 491 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 492 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 493 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 494 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 495 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 496 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 497 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 498 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 499 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 500 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 501 // CHECK1: omp.precond.then: 502 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 503 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 504 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 505 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 506 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 507 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 508 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32 509 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 510 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 511 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 512 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 513 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 514 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 515 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 516 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 517 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 518 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 519 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 520 // CHECK1: cond.true: 521 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 522 // CHECK1-NEXT: br label [[COND_END:%.*]] 523 // CHECK1: cond.false: 524 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 525 // CHECK1-NEXT: br label [[COND_END]] 526 // CHECK1: cond.end: 527 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 528 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 529 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 530 // CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 531 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 532 // CHECK1: omp.inner.for.cond: 533 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 534 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 535 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 536 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 537 // CHECK1: omp.inner.for.body: 538 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 539 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 540 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 541 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 542 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8 543 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0 544 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 545 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4 546 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 547 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 548 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4 549 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 550 // CHECK1: omp.body.continue: 551 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 552 // CHECK1: omp.inner.for.inc: 553 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 554 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 555 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 556 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 557 // CHECK1: omp.inner.for.end: 558 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 559 // CHECK1: omp.loop.exit: 560 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 561 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 562 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 563 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 564 // CHECK1: omp.precond.end: 565 // CHECK1-NEXT: ret void 566 // 567 // 568 // CHECK2-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 569 // CHECK2-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 570 // CHECK2-NEXT: entry: 571 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 572 // CHECK2-NEXT: [[N:%.*]] = alloca i32, align 4 573 // CHECK2-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 574 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4 575 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4 576 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 577 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 578 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 579 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 580 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 581 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 582 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 583 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 584 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 585 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 586 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 587 // CHECK2-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 588 // CHECK2-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8 589 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x ptr], align 8 590 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x ptr], align 8 591 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x ptr], align 8 592 // CHECK2-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 593 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 594 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 595 // CHECK2-NEXT: [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 596 // CHECK2-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 597 // CHECK2-NEXT: store i32 1000, ptr [[N]], align 4 598 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 599 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 600 // CHECK2-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 601 // CHECK2-NEXT: store i32 128, ptr [[TH]], align 4 602 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4 603 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 604 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 4 605 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 606 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 607 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 608 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8 609 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 610 // CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 611 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 612 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 613 // CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4 614 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 8 615 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 616 // CHECK2-NEXT: store i64 [[TMP4]], ptr [[TMP9]], align 8 617 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 618 // CHECK2-NEXT: store i64 [[TMP4]], ptr [[TMP10]], align 8 619 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 620 // CHECK2-NEXT: store ptr null, ptr [[TMP11]], align 8 621 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 622 // CHECK2-NEXT: store ptr [[A]], ptr [[TMP12]], align 8 623 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 624 // CHECK2-NEXT: store ptr [[A]], ptr [[TMP13]], align 8 625 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 626 // CHECK2-NEXT: store ptr null, ptr [[TMP14]], align 8 627 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 628 // CHECK2-NEXT: store i64 [[TMP6]], ptr [[TMP15]], align 8 629 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 630 // CHECK2-NEXT: store i64 [[TMP6]], ptr [[TMP16]], align 8 631 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 632 // CHECK2-NEXT: store ptr null, ptr [[TMP17]], align 8 633 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 634 // CHECK2-NEXT: store i64 [[TMP8]], ptr [[TMP18]], align 8 635 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 636 // CHECK2-NEXT: store i64 [[TMP8]], ptr [[TMP19]], align 8 637 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 638 // CHECK2-NEXT: store ptr null, ptr [[TMP20]], align 8 639 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 640 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 641 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 642 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 643 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 4 644 // CHECK2-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_3]], align 4 645 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 646 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP26]], 0 647 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1 648 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1 649 // CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 650 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 651 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], 1 652 // CHECK2-NEXT: [[TMP28:%.*]] = zext i32 [[ADD]] to i64 653 // CHECK2-NEXT: [[TMP29:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP23]], 0 654 // CHECK2-NEXT: [[TMP30:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 655 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 656 // CHECK2-NEXT: store i32 3, ptr [[TMP31]], align 4 657 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 658 // CHECK2-NEXT: store i32 4, ptr [[TMP32]], align 4 659 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 660 // CHECK2-NEXT: store ptr [[TMP21]], ptr [[TMP33]], align 8 661 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 662 // CHECK2-NEXT: store ptr [[TMP22]], ptr [[TMP34]], align 8 663 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 664 // CHECK2-NEXT: store ptr @.offload_sizes, ptr [[TMP35]], align 8 665 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 666 // CHECK2-NEXT: store ptr @.offload_maptypes, ptr [[TMP36]], align 8 667 // CHECK2-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 668 // CHECK2-NEXT: store ptr null, ptr [[TMP37]], align 8 669 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 670 // CHECK2-NEXT: store ptr null, ptr [[TMP38]], align 8 671 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 672 // CHECK2-NEXT: store i64 [[TMP28]], ptr [[TMP39]], align 8 673 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 674 // CHECK2-NEXT: store i64 0, ptr [[TMP40]], align 8 675 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 676 // CHECK2-NEXT: store [3 x i32] [[TMP29]], ptr [[TMP41]], align 4 677 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 678 // CHECK2-NEXT: store [3 x i32] [[TMP30]], ptr [[TMP42]], align 4 679 // CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 680 // CHECK2-NEXT: store i32 0, ptr [[TMP43]], align 4 681 // CHECK2-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP23]], i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, ptr [[KERNEL_ARGS]]) 682 // CHECK2-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0 683 // CHECK2-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 684 // CHECK2: omp_offload.failed: 685 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], ptr [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]] 686 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 687 // CHECK2: omp_offload.cont: 688 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, ptr [[N]], align 4 689 // CHECK2-NEXT: store i32 [[TMP46]], ptr [[N_CASTED7]], align 4 690 // CHECK2-NEXT: [[TMP47:%.*]] = load i64, ptr [[N_CASTED7]], align 8 691 // CHECK2-NEXT: [[TMP48:%.*]] = load ptr, ptr [[G_ADDR]], align 8 692 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 693 // CHECK2-NEXT: store i64 [[TMP47]], ptr [[TMP49]], align 8 694 // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 695 // CHECK2-NEXT: store i64 [[TMP47]], ptr [[TMP50]], align 8 696 // CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0 697 // CHECK2-NEXT: store ptr null, ptr [[TMP51]], align 8 698 // CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 699 // CHECK2-NEXT: store ptr [[A]], ptr [[TMP52]], align 8 700 // CHECK2-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 701 // CHECK2-NEXT: store ptr [[A]], ptr [[TMP53]], align 8 702 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1 703 // CHECK2-NEXT: store ptr null, ptr [[TMP54]], align 8 704 // CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2 705 // CHECK2-NEXT: store ptr [[TMP48]], ptr [[TMP55]], align 8 706 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 2 707 // CHECK2-NEXT: store ptr [[TMP48]], ptr [[TMP56]], align 8 708 // CHECK2-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 2 709 // CHECK2-NEXT: store ptr null, ptr [[TMP57]], align 8 710 // CHECK2-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 711 // CHECK2-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 712 // CHECK2-NEXT: [[TMP60:%.*]] = load i32, ptr [[N]], align 4 713 // CHECK2-NEXT: store i32 [[TMP60]], ptr [[DOTCAPTURE_EXPR_12]], align 4 714 // CHECK2-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 715 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP61]], 0 716 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 717 // CHECK2-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 718 // CHECK2-NEXT: store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13]], align 4 719 // CHECK2-NEXT: [[TMP62:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 720 // CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP62]], 1 721 // CHECK2-NEXT: [[TMP63:%.*]] = zext i32 [[ADD17]] to i64 722 // CHECK2-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 0 723 // CHECK2-NEXT: store i32 3, ptr [[TMP64]], align 4 724 // CHECK2-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 1 725 // CHECK2-NEXT: store i32 3, ptr [[TMP65]], align 4 726 // CHECK2-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 2 727 // CHECK2-NEXT: store ptr [[TMP58]], ptr [[TMP66]], align 8 728 // CHECK2-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 3 729 // CHECK2-NEXT: store ptr [[TMP59]], ptr [[TMP67]], align 8 730 // CHECK2-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 4 731 // CHECK2-NEXT: store ptr @.offload_sizes.1, ptr [[TMP68]], align 8 732 // CHECK2-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 5 733 // CHECK2-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP69]], align 8 734 // CHECK2-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 6 735 // CHECK2-NEXT: store ptr null, ptr [[TMP70]], align 8 736 // CHECK2-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 7 737 // CHECK2-NEXT: store ptr null, ptr [[TMP71]], align 8 738 // CHECK2-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 8 739 // CHECK2-NEXT: store i64 [[TMP63]], ptr [[TMP72]], align 8 740 // CHECK2-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 9 741 // CHECK2-NEXT: store i64 0, ptr [[TMP73]], align 8 742 // CHECK2-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 10 743 // CHECK2-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP74]], align 4 744 // CHECK2-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 11 745 // CHECK2-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 746 // CHECK2-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 12 747 // CHECK2-NEXT: store i32 0, ptr [[TMP76]], align 4 748 // CHECK2-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.region_id, ptr [[KERNEL_ARGS18]]) 749 // CHECK2-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0 750 // CHECK2-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 751 // CHECK2: omp_offload.failed19: 752 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i64 [[TMP47]], ptr [[A]], ptr [[TMP48]]) #[[ATTR2]] 753 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT20]] 754 // CHECK2: omp_offload.cont20: 755 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0 756 // CHECK2-NEXT: [[TMP79:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 757 // CHECK2-NEXT: ret i32 [[TMP79]] 758 // 759 // 760 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 761 // CHECK2-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 762 // CHECK2-NEXT: entry: 763 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 764 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 765 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 766 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 767 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 768 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]]) 769 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 770 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 771 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 772 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8 773 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 774 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 775 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 776 // CHECK2-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 777 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 778 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 779 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[N_CASTED]], align 8 780 // CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i64 [[TMP5]], ptr [[TMP1]]) 781 // CHECK2-NEXT: ret void 782 // 783 // 784 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined 785 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 786 // CHECK2-NEXT: entry: 787 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 788 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 789 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 790 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 791 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 792 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 793 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 794 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 795 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 796 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 797 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 798 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 799 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 800 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 801 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 802 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 803 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 804 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 805 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 806 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 807 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 808 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 809 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 810 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 811 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 812 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 813 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 814 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4 815 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 816 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 817 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 818 // CHECK2: omp.precond.then: 819 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 820 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 821 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 822 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 823 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 824 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 825 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 826 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 827 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 828 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 829 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 830 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 831 // CHECK2: cond.true: 832 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 833 // CHECK2-NEXT: br label [[COND_END:%.*]] 834 // CHECK2: cond.false: 835 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 836 // CHECK2-NEXT: br label [[COND_END]] 837 // CHECK2: cond.end: 838 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 839 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 840 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 841 // CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 842 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 843 // CHECK2: omp.inner.for.cond: 844 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 845 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 846 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 847 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 848 // CHECK2: omp.inner.for.body: 849 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 850 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 851 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 852 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 853 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 854 // CHECK2-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 855 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8 856 // CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]]) 857 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 858 // CHECK2: omp.inner.for.inc: 859 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 860 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 861 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 862 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 863 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 864 // CHECK2: omp.inner.for.end: 865 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 866 // CHECK2: omp.loop.exit: 867 // CHECK2-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 868 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 869 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]]) 870 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 871 // CHECK2: omp.precond.end: 872 // CHECK2-NEXT: ret void 873 // 874 // 875 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined 876 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 877 // CHECK2-NEXT: entry: 878 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 879 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 880 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 881 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 882 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 883 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 884 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 885 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 886 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 887 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 888 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 889 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 890 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 891 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 892 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 893 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 894 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 895 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 896 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 897 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 898 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 899 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 900 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 901 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 902 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 903 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 904 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 905 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 906 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 907 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 908 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4 909 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 910 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 911 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 912 // CHECK2: omp.precond.then: 913 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 914 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 915 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 916 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 917 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 918 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 919 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32 920 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 921 // CHECK2-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 922 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 923 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 924 // CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 925 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 926 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 927 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 928 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 929 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 930 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 931 // CHECK2: cond.true: 932 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 933 // CHECK2-NEXT: br label [[COND_END:%.*]] 934 // CHECK2: cond.false: 935 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 936 // CHECK2-NEXT: br label [[COND_END]] 937 // CHECK2: cond.end: 938 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 939 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 940 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 941 // CHECK2-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 942 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 943 // CHECK2: omp.inner.for.cond: 944 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 945 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 946 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 947 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 948 // CHECK2: omp.inner.for.body: 949 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 950 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 951 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 952 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 953 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[I4]], align 4 954 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 955 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 956 // CHECK2-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 957 // CHECK2-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 958 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 959 // CHECK2-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB3]], i32 [[TMP19]], i32 2) 960 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 961 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 962 // CHECK2: .cancel.exit: 963 // CHECK2-NEXT: br label [[CANCEL_EXIT:%.*]] 964 // CHECK2: .cancel.continue: 965 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 966 // CHECK2: omp.body.continue: 967 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 968 // CHECK2: omp.inner.for.inc: 969 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 970 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1 971 // CHECK2-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 972 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 973 // CHECK2: omp.inner.for.end: 974 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 975 // CHECK2: omp.loop.exit: 976 // CHECK2-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 977 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 978 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]]) 979 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 980 // CHECK2: cancel.exit: 981 // CHECK2-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 982 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 983 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP26]]) 984 // CHECK2-NEXT: br label [[CANCEL_CONT:%.*]] 985 // CHECK2: omp.precond.end: 986 // CHECK2-NEXT: br label [[CANCEL_CONT]] 987 // CHECK2: cancel.cont: 988 // CHECK2-NEXT: ret void 989 // 990 // 991 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 992 // CHECK2-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 993 // CHECK2-NEXT: entry: 994 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 995 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 996 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 997 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 998 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 999 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1000 // CHECK2-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 1001 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1002 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1003 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[N_CASTED]], align 4 1004 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8 1005 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8 1006 // CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]]) 1007 // CHECK2-NEXT: ret void 1008 // 1009 // 1010 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined 1011 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 1012 // CHECK2-NEXT: entry: 1013 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1014 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1015 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1016 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1017 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 1018 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1019 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1020 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1021 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1022 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1023 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1024 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1025 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1026 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1027 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4 1028 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1029 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1030 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1031 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1032 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1033 // CHECK2-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 1034 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1035 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1036 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1037 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1038 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1039 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1040 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1041 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1042 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4 1043 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1044 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1045 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1046 // CHECK2: omp.precond.then: 1047 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1048 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1049 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 1050 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1051 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1052 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1053 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1054 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1055 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1056 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1057 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1058 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1059 // CHECK2: cond.true: 1060 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1061 // CHECK2-NEXT: br label [[COND_END:%.*]] 1062 // CHECK2: cond.false: 1063 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1064 // CHECK2-NEXT: br label [[COND_END]] 1065 // CHECK2: cond.end: 1066 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1067 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1068 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1069 // CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 1070 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1071 // CHECK2: omp.inner.for.cond: 1072 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1073 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1074 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1075 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1076 // CHECK2: omp.inner.for.body: 1077 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1078 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 1079 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1080 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 1081 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 1082 // CHECK2-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 1083 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8 1084 // CHECK2-NEXT: [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8 1085 // CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]]) 1086 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1087 // CHECK2: omp.inner.for.inc: 1088 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1089 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1090 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1091 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1092 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1093 // CHECK2: omp.inner.for.end: 1094 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1095 // CHECK2: omp.loop.exit: 1096 // CHECK2-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1097 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 1098 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 1099 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1100 // CHECK2: omp.precond.end: 1101 // CHECK2-NEXT: ret void 1102 // 1103 // 1104 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined 1105 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 1106 // CHECK2-NEXT: entry: 1107 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1108 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1109 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1110 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1111 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1112 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1113 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 1114 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1115 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1116 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1117 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1118 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1119 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1120 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1121 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1122 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1123 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4 1124 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1125 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1126 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1127 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1128 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1129 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1130 // CHECK2-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 1131 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1132 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1133 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1134 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1135 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1136 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1137 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1138 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1139 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4 1140 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1141 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1142 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1143 // CHECK2: omp.precond.then: 1144 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1145 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1146 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 1147 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1148 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 1149 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1150 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32 1151 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1152 // CHECK2-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 1153 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1154 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1155 // CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1156 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1157 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1158 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1159 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1160 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1161 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1162 // CHECK2: cond.true: 1163 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1164 // CHECK2-NEXT: br label [[COND_END:%.*]] 1165 // CHECK2: cond.false: 1166 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1167 // CHECK2-NEXT: br label [[COND_END]] 1168 // CHECK2: cond.end: 1169 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1170 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1171 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1172 // CHECK2-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 1173 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1174 // CHECK2: omp.inner.for.cond: 1175 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1176 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1177 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1178 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1179 // CHECK2: omp.inner.for.body: 1180 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1181 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1182 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1183 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 1184 // CHECK2-NEXT: [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8 1185 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0 1186 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 1187 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4 1188 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1189 // CHECK2-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 1190 // CHECK2-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4 1191 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1192 // CHECK2: omp.body.continue: 1193 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1194 // CHECK2: omp.inner.for.inc: 1195 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1196 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 1197 // CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 1198 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1199 // CHECK2: omp.inner.for.end: 1200 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1201 // CHECK2: omp.loop.exit: 1202 // CHECK2-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1203 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 1204 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 1205 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1206 // CHECK2: omp.precond.end: 1207 // CHECK2-NEXT: ret void 1208 // 1209 // 1210 // CHECK4-LABEL: define {{[^@]+}}@_Z16target_teams_funPi 1211 // CHECK4-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] { 1212 // CHECK4-NEXT: entry: 1213 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 1214 // CHECK4-NEXT: [[N:%.*]] = alloca i32, align 4 1215 // CHECK4-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4 1216 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4 1217 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4 1218 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1219 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1220 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1221 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 1222 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4 1223 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 1224 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 1225 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 1226 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1227 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1228 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1229 // CHECK4-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1230 // CHECK4-NEXT: [[N_CASTED7:%.*]] = alloca i32, align 4 1231 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x ptr], align 4 1232 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x ptr], align 4 1233 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x ptr], align 4 1234 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca i32, align 4 1235 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 1236 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4 1237 // CHECK4-NEXT: [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1238 // CHECK4-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 1239 // CHECK4-NEXT: store i32 1000, ptr [[N]], align 4 1240 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 1241 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128 1242 // CHECK4-NEXT: store i32 [[DIV]], ptr [[TE]], align 4 1243 // CHECK4-NEXT: store i32 128, ptr [[TH]], align 4 1244 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TE]], align 4 1245 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1246 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[TH]], align 4 1247 // CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1248 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4 1249 // CHECK4-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4 1250 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4 1251 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1252 // CHECK4-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 1253 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 1254 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1255 // CHECK4-NEXT: store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4 1256 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4 1257 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1258 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[TMP9]], align 4 1259 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1260 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[TMP10]], align 4 1261 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1262 // CHECK4-NEXT: store ptr null, ptr [[TMP11]], align 4 1263 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1264 // CHECK4-NEXT: store ptr [[A]], ptr [[TMP12]], align 4 1265 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1266 // CHECK4-NEXT: store ptr [[A]], ptr [[TMP13]], align 4 1267 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1268 // CHECK4-NEXT: store ptr null, ptr [[TMP14]], align 4 1269 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1270 // CHECK4-NEXT: store i32 [[TMP6]], ptr [[TMP15]], align 4 1271 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1272 // CHECK4-NEXT: store i32 [[TMP6]], ptr [[TMP16]], align 4 1273 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1274 // CHECK4-NEXT: store ptr null, ptr [[TMP17]], align 4 1275 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1276 // CHECK4-NEXT: store i32 [[TMP8]], ptr [[TMP18]], align 4 1277 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1278 // CHECK4-NEXT: store i32 [[TMP8]], ptr [[TMP19]], align 4 1279 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1280 // CHECK4-NEXT: store ptr null, ptr [[TMP20]], align 4 1281 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1282 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1283 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1284 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1285 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, ptr [[N]], align 4 1286 // CHECK4-NEXT: store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_3]], align 4 1287 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4 1288 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP26]], 0 1289 // CHECK4-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1 1290 // CHECK4-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1 1291 // CHECK4-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 1292 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1293 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], 1 1294 // CHECK4-NEXT: [[TMP28:%.*]] = zext i32 [[ADD]] to i64 1295 // CHECK4-NEXT: [[TMP29:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP23]], 0 1296 // CHECK4-NEXT: [[TMP30:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP24]], 0 1297 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1298 // CHECK4-NEXT: store i32 3, ptr [[TMP31]], align 4 1299 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1300 // CHECK4-NEXT: store i32 4, ptr [[TMP32]], align 4 1301 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1302 // CHECK4-NEXT: store ptr [[TMP21]], ptr [[TMP33]], align 4 1303 // CHECK4-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1304 // CHECK4-NEXT: store ptr [[TMP22]], ptr [[TMP34]], align 4 1305 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1306 // CHECK4-NEXT: store ptr @.offload_sizes, ptr [[TMP35]], align 4 1307 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1308 // CHECK4-NEXT: store ptr @.offload_maptypes, ptr [[TMP36]], align 4 1309 // CHECK4-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1310 // CHECK4-NEXT: store ptr null, ptr [[TMP37]], align 4 1311 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1312 // CHECK4-NEXT: store ptr null, ptr [[TMP38]], align 4 1313 // CHECK4-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1314 // CHECK4-NEXT: store i64 [[TMP28]], ptr [[TMP39]], align 8 1315 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1316 // CHECK4-NEXT: store i64 0, ptr [[TMP40]], align 8 1317 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1318 // CHECK4-NEXT: store [3 x i32] [[TMP29]], ptr [[TMP41]], align 4 1319 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1320 // CHECK4-NEXT: store [3 x i32] [[TMP30]], ptr [[TMP42]], align 4 1321 // CHECK4-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1322 // CHECK4-NEXT: store i32 0, ptr [[TMP43]], align 4 1323 // CHECK4-NEXT: [[TMP44:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP23]], i32 [[TMP24]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, ptr [[KERNEL_ARGS]]) 1324 // CHECK4-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0 1325 // CHECK4-NEXT: br i1 [[TMP45]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1326 // CHECK4: omp_offload.failed: 1327 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i32 [[TMP4]], ptr [[A]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2:[0-9]+]] 1328 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1329 // CHECK4: omp_offload.cont: 1330 // CHECK4-NEXT: [[TMP46:%.*]] = load i32, ptr [[N]], align 4 1331 // CHECK4-NEXT: store i32 [[TMP46]], ptr [[N_CASTED7]], align 4 1332 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, ptr [[N_CASTED7]], align 4 1333 // CHECK4-NEXT: [[TMP48:%.*]] = load ptr, ptr [[G_ADDR]], align 4 1334 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1335 // CHECK4-NEXT: store i32 [[TMP47]], ptr [[TMP49]], align 4 1336 // CHECK4-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1337 // CHECK4-NEXT: store i32 [[TMP47]], ptr [[TMP50]], align 4 1338 // CHECK4-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0 1339 // CHECK4-NEXT: store ptr null, ptr [[TMP51]], align 4 1340 // CHECK4-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1 1341 // CHECK4-NEXT: store ptr [[A]], ptr [[TMP52]], align 4 1342 // CHECK4-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1 1343 // CHECK4-NEXT: store ptr [[A]], ptr [[TMP53]], align 4 1344 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1 1345 // CHECK4-NEXT: store ptr null, ptr [[TMP54]], align 4 1346 // CHECK4-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2 1347 // CHECK4-NEXT: store ptr [[TMP48]], ptr [[TMP55]], align 4 1348 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 2 1349 // CHECK4-NEXT: store ptr [[TMP48]], ptr [[TMP56]], align 4 1350 // CHECK4-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2 1351 // CHECK4-NEXT: store ptr null, ptr [[TMP57]], align 4 1352 // CHECK4-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0 1353 // CHECK4-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0 1354 // CHECK4-NEXT: [[TMP60:%.*]] = load i32, ptr [[N]], align 4 1355 // CHECK4-NEXT: store i32 [[TMP60]], ptr [[DOTCAPTURE_EXPR_12]], align 4 1356 // CHECK4-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4 1357 // CHECK4-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP61]], 0 1358 // CHECK4-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 1359 // CHECK4-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1 1360 // CHECK4-NEXT: store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13]], align 4 1361 // CHECK4-NEXT: [[TMP62:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4 1362 // CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP62]], 1 1363 // CHECK4-NEXT: [[TMP63:%.*]] = zext i32 [[ADD17]] to i64 1364 // CHECK4-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 0 1365 // CHECK4-NEXT: store i32 3, ptr [[TMP64]], align 4 1366 // CHECK4-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 1 1367 // CHECK4-NEXT: store i32 3, ptr [[TMP65]], align 4 1368 // CHECK4-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 2 1369 // CHECK4-NEXT: store ptr [[TMP58]], ptr [[TMP66]], align 4 1370 // CHECK4-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 3 1371 // CHECK4-NEXT: store ptr [[TMP59]], ptr [[TMP67]], align 4 1372 // CHECK4-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 4 1373 // CHECK4-NEXT: store ptr @.offload_sizes.1, ptr [[TMP68]], align 4 1374 // CHECK4-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 5 1375 // CHECK4-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP69]], align 4 1376 // CHECK4-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 6 1377 // CHECK4-NEXT: store ptr null, ptr [[TMP70]], align 4 1378 // CHECK4-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 7 1379 // CHECK4-NEXT: store ptr null, ptr [[TMP71]], align 4 1380 // CHECK4-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 8 1381 // CHECK4-NEXT: store i64 [[TMP63]], ptr [[TMP72]], align 8 1382 // CHECK4-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 9 1383 // CHECK4-NEXT: store i64 0, ptr [[TMP73]], align 8 1384 // CHECK4-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 10 1385 // CHECK4-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP74]], align 4 1386 // CHECK4-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 11 1387 // CHECK4-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4 1388 // CHECK4-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 12 1389 // CHECK4-NEXT: store i32 0, ptr [[TMP76]], align 4 1390 // CHECK4-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.region_id, ptr [[KERNEL_ARGS18]]) 1391 // CHECK4-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0 1392 // CHECK4-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]] 1393 // CHECK4: omp_offload.failed19: 1394 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58(i32 [[TMP47]], ptr [[A]], ptr [[TMP48]]) #[[ATTR2]] 1395 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT20]] 1396 // CHECK4: omp_offload.cont20: 1397 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 0 1398 // CHECK4-NEXT: [[TMP79:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 1399 // CHECK4-NEXT: ret i32 [[TMP79]] 1400 // 1401 // 1402 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 1403 // CHECK4-SAME: (i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] { 1404 // CHECK4-NEXT: entry: 1405 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1406 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1407 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1408 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 1409 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1410 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]]) 1411 // CHECK4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1412 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1413 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1414 // CHECK4-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 1415 // CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1416 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1417 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 1418 // CHECK4-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1419 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 1420 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 1421 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 1422 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i32 [[TMP5]], ptr [[TMP1]]) 1423 // CHECK4-NEXT: ret void 1424 // 1425 // 1426 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined 1427 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 1428 // CHECK4-NEXT: entry: 1429 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1430 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1431 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1432 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1433 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1434 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1435 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1436 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1437 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1438 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1439 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1440 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1441 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1442 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1443 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1444 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1445 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1446 // CHECK4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1447 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1448 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1449 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1450 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1451 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1452 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1453 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1454 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1455 // CHECK4-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1456 // CHECK4-NEXT: store i32 0, ptr [[I]], align 4 1457 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1458 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1459 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1460 // CHECK4: omp.precond.then: 1461 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1462 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1463 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 1464 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1465 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1466 // CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1467 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1468 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1469 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1470 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1471 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1472 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1473 // CHECK4: cond.true: 1474 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1475 // CHECK4-NEXT: br label [[COND_END:%.*]] 1476 // CHECK4: cond.false: 1477 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1478 // CHECK4-NEXT: br label [[COND_END]] 1479 // CHECK4: cond.end: 1480 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1481 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1482 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1483 // CHECK4-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 1484 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1485 // CHECK4: omp.inner.for.cond: 1486 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1487 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1488 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1489 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1490 // CHECK4: omp.inner.for.body: 1491 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1492 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1493 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4 1494 // CHECK4-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 4 1495 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4 1496 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]]) 1497 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1498 // CHECK4: omp.inner.for.inc: 1499 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1500 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1501 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1502 // CHECK4-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1503 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1504 // CHECK4: omp.inner.for.end: 1505 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1506 // CHECK4: omp.loop.exit: 1507 // CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1508 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 1509 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]]) 1510 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1511 // CHECK4: omp.precond.end: 1512 // CHECK4-NEXT: ret void 1513 // 1514 // 1515 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined 1516 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] { 1517 // CHECK4-NEXT: entry: 1518 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1519 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1520 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1521 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1522 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1523 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1524 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1525 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1526 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1527 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1528 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1529 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1530 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1531 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1532 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1533 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1534 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1535 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1536 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1537 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1538 // CHECK4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1539 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1540 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1541 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1542 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1543 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1544 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1545 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1546 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1547 // CHECK4-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1548 // CHECK4-NEXT: store i32 0, ptr [[I]], align 4 1549 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1550 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1551 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1552 // CHECK4: omp.precond.then: 1553 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1554 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1555 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 1556 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1557 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1558 // CHECK4-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4 1559 // CHECK4-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 1560 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1561 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1562 // CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1563 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1564 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1565 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1566 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1567 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1568 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1569 // CHECK4: cond.true: 1570 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1571 // CHECK4-NEXT: br label [[COND_END:%.*]] 1572 // CHECK4: cond.false: 1573 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1574 // CHECK4-NEXT: br label [[COND_END]] 1575 // CHECK4: cond.end: 1576 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1577 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1578 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1579 // CHECK4-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 1580 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1581 // CHECK4: omp.inner.for.cond: 1582 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1583 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1584 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1585 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1586 // CHECK4: omp.inner.for.body: 1587 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1588 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1589 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1590 // CHECK4-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 1591 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[I3]], align 4 1592 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP17]] 1593 // CHECK4-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 1594 // CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1595 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 1596 // CHECK4-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB3]], i32 [[TMP19]], i32 2) 1597 // CHECK4-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1598 // CHECK4-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 1599 // CHECK4: .cancel.exit: 1600 // CHECK4-NEXT: br label [[CANCEL_EXIT:%.*]] 1601 // CHECK4: .cancel.continue: 1602 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1603 // CHECK4: omp.body.continue: 1604 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1605 // CHECK4: omp.inner.for.inc: 1606 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1607 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 1608 // CHECK4-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 1609 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1610 // CHECK4: omp.inner.for.end: 1611 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1612 // CHECK4: omp.loop.exit: 1613 // CHECK4-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1614 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 1615 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]]) 1616 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1617 // CHECK4: cancel.exit: 1618 // CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1619 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 1620 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP26]]) 1621 // CHECK4-NEXT: br label [[CANCEL_CONT:%.*]] 1622 // CHECK4: omp.precond.end: 1623 // CHECK4-NEXT: br label [[CANCEL_CONT]] 1624 // CHECK4: cancel.cont: 1625 // CHECK4-NEXT: ret void 1626 // 1627 // 1628 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 1629 // CHECK4-SAME: (i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 1630 // CHECK4-NEXT: entry: 1631 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1632 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1633 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 1634 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1635 // CHECK4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1636 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1637 // CHECK4-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 1638 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1639 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1640 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[N_CASTED]], align 4 1641 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_CASTED]], align 4 1642 // CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 4 1643 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined, i32 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]]) 1644 // CHECK4-NEXT: ret void 1645 // 1646 // 1647 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined 1648 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 1649 // CHECK4-NEXT: entry: 1650 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1651 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1652 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1653 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1654 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 1655 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1656 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1657 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1658 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1659 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1660 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1661 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1662 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1663 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1664 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1665 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1666 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1667 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1668 // CHECK4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1669 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1670 // CHECK4-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 1671 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1672 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1673 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1674 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1675 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1676 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1677 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1678 // CHECK4-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1679 // CHECK4-NEXT: store i32 0, ptr [[I]], align 4 1680 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1681 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1682 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1683 // CHECK4: omp.precond.then: 1684 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1685 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1686 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 1687 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1688 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1689 // CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1690 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1691 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1692 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1693 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1694 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1695 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1696 // CHECK4: cond.true: 1697 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1698 // CHECK4-NEXT: br label [[COND_END:%.*]] 1699 // CHECK4: cond.false: 1700 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1701 // CHECK4-NEXT: br label [[COND_END]] 1702 // CHECK4: cond.end: 1703 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1704 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1705 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1706 // CHECK4-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 1707 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1708 // CHECK4: omp.inner.for.cond: 1709 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1710 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1711 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1712 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1713 // CHECK4: omp.inner.for.body: 1714 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1715 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1716 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4 1717 // CHECK4-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 4 1718 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4 1719 // CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[G_ADDR]], align 4 1720 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]], ptr [[TMP18]]) 1721 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1722 // CHECK4: omp.inner.for.inc: 1723 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1724 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1725 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1726 // CHECK4-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1727 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1728 // CHECK4: omp.inner.for.end: 1729 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1730 // CHECK4: omp.loop.exit: 1731 // CHECK4-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1732 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 1733 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 1734 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1735 // CHECK4: omp.precond.end: 1736 // CHECK4-NEXT: ret void 1737 // 1738 // 1739 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined 1740 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] { 1741 // CHECK4-NEXT: entry: 1742 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1743 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1744 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1745 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1746 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1747 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1748 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 1749 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1750 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1751 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1752 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1753 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1754 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1755 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1756 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1757 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1758 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4 1759 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1760 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1761 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1762 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1763 // CHECK4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1764 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1765 // CHECK4-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 1766 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1767 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1768 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1769 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1770 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1771 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1772 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1773 // CHECK4-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1774 // CHECK4-NEXT: store i32 0, ptr [[I]], align 4 1775 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1776 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1777 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1778 // CHECK4: omp.precond.then: 1779 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1780 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1781 // CHECK4-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 1782 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1783 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1784 // CHECK4-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4 1785 // CHECK4-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 1786 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1787 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1788 // CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1789 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 1790 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1791 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1792 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1793 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1794 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1795 // CHECK4: cond.true: 1796 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1797 // CHECK4-NEXT: br label [[COND_END:%.*]] 1798 // CHECK4: cond.false: 1799 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1800 // CHECK4-NEXT: br label [[COND_END]] 1801 // CHECK4: cond.end: 1802 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1803 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1804 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1805 // CHECK4-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 1806 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1807 // CHECK4: omp.inner.for.cond: 1808 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1809 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1810 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1811 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1812 // CHECK4: omp.inner.for.body: 1813 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1814 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 1815 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1816 // CHECK4-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 1817 // CHECK4-NEXT: [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 4 1818 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 0 1819 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 1820 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4 1821 // CHECK4-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP19]] 1822 // CHECK4-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4 1823 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1824 // CHECK4: omp.body.continue: 1825 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1826 // CHECK4: omp.inner.for.inc: 1827 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1828 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 1829 // CHECK4-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 1830 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1831 // CHECK4: omp.inner.for.end: 1832 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1833 // CHECK4: omp.loop.exit: 1834 // CHECK4-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1835 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 1836 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 1837 // CHECK4-NEXT: br label [[OMP_PRECOND_END]] 1838 // CHECK4: omp.precond.end: 1839 // CHECK4-NEXT: ret void 1840 // 1841 // 1842 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 1843 // CHECK10-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 1844 // CHECK10-NEXT: entry: 1845 // CHECK10-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1846 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1847 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1848 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1849 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 1850 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1851 // CHECK10-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]]) 1852 // CHECK10-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1853 // CHECK10-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1854 // CHECK10-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1855 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1856 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8 1857 // CHECK10-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1858 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1859 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 1860 // CHECK10-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 1861 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 1862 // CHECK10-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 1863 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, ptr [[N_CASTED]], align 8 1864 // CHECK10-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i64 [[TMP5]], ptr [[TMP1]]) 1865 // CHECK10-NEXT: ret void 1866 // 1867 // 1868 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined 1869 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 1870 // CHECK10-NEXT: entry: 1871 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1872 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1873 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1874 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1875 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1876 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1877 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1878 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1879 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1880 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1881 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1882 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1883 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1884 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 1885 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1886 // CHECK10-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1887 // CHECK10-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1888 // CHECK10-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1889 // CHECK10-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1890 // CHECK10-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1891 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1892 // CHECK10-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1893 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1894 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1895 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1896 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1897 // CHECK10-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1898 // CHECK10-NEXT: store i32 0, ptr [[I]], align 4 1899 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1900 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1901 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1902 // CHECK10: omp.precond.then: 1903 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1904 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1905 // CHECK10-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 1906 // CHECK10-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1907 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1908 // CHECK10-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1909 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 1910 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1911 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1912 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1913 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 1914 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1915 // CHECK10: cond.true: 1916 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1917 // CHECK10-NEXT: br label [[COND_END:%.*]] 1918 // CHECK10: cond.false: 1919 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1920 // CHECK10-NEXT: br label [[COND_END]] 1921 // CHECK10: cond.end: 1922 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 1923 // CHECK10-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1924 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1925 // CHECK10-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 1926 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1927 // CHECK10: omp.inner.for.cond: 1928 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1929 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1930 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1931 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1932 // CHECK10: omp.inner.for.body: 1933 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1934 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 1935 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1936 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 1937 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 1938 // CHECK10-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 1939 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8 1940 // CHECK10-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]]) 1941 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1942 // CHECK10: omp.inner.for.inc: 1943 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1944 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1945 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 1946 // CHECK10-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1947 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 1948 // CHECK10: omp.inner.for.end: 1949 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1950 // CHECK10: omp.loop.exit: 1951 // CHECK10-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1952 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 1953 // CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]]) 1954 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 1955 // CHECK10: omp.precond.end: 1956 // CHECK10-NEXT: ret void 1957 // 1958 // 1959 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined 1960 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 1961 // CHECK10-NEXT: entry: 1962 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1963 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1964 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1965 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1966 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1967 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1968 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1969 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 1970 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1971 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1972 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 1973 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1974 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1975 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1976 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1977 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 1978 // CHECK10-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1979 // CHECK10-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1980 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1981 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1982 // CHECK10-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1983 // CHECK10-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1984 // CHECK10-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1985 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 1986 // CHECK10-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1987 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1988 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 1989 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1990 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1991 // CHECK10-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1992 // CHECK10-NEXT: store i32 0, ptr [[I]], align 4 1993 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1994 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 1995 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1996 // CHECK10: omp.precond.then: 1997 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1998 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1999 // CHECK10-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 2000 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2001 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 2002 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2003 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32 2004 // CHECK10-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2005 // CHECK10-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 2006 // CHECK10-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2007 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2008 // CHECK10-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2009 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2010 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2011 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2012 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2013 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2014 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2015 // CHECK10: cond.true: 2016 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2017 // CHECK10-NEXT: br label [[COND_END:%.*]] 2018 // CHECK10: cond.false: 2019 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2020 // CHECK10-NEXT: br label [[COND_END]] 2021 // CHECK10: cond.end: 2022 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2023 // CHECK10-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2024 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2025 // CHECK10-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2026 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2027 // CHECK10: omp.inner.for.cond: 2028 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2029 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2030 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2031 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2032 // CHECK10: omp.inner.for.body: 2033 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2034 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2035 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2036 // CHECK10-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 2037 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, ptr [[I4]], align 4 2038 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2039 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 2040 // CHECK10-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2041 // CHECK10-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2042 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 2043 // CHECK10-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB3]], i32 [[TMP19]], i32 2) 2044 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2045 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2046 // CHECK10: .cancel.exit: 2047 // CHECK10-NEXT: br label [[CANCEL_EXIT:%.*]] 2048 // CHECK10: .cancel.continue: 2049 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2050 // CHECK10: omp.body.continue: 2051 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2052 // CHECK10: omp.inner.for.inc: 2053 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2054 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1 2055 // CHECK10-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 2056 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2057 // CHECK10: omp.inner.for.end: 2058 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2059 // CHECK10: omp.loop.exit: 2060 // CHECK10-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2061 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 2062 // CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]]) 2063 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2064 // CHECK10: cancel.exit: 2065 // CHECK10-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2066 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 2067 // CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP26]]) 2068 // CHECK10-NEXT: br label [[CANCEL_CONT:%.*]] 2069 // CHECK10: omp.precond.end: 2070 // CHECK10-NEXT: br label [[CANCEL_CONT]] 2071 // CHECK10: cancel.cont: 2072 // CHECK10-NEXT: ret void 2073 // 2074 // 2075 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 2076 // CHECK10-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] { 2077 // CHECK10-NEXT: entry: 2078 // CHECK10-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 2079 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2080 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2081 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 2082 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2083 // CHECK10-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 2084 // CHECK10-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2085 // CHECK10-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2086 // CHECK10-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 2087 // CHECK10-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2088 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2089 // CHECK10-NEXT: store i32 [[TMP1]], ptr [[N_CASTED]], align 4 2090 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8 2091 // CHECK10-NEXT: [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8 2092 // CHECK10-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]]) 2093 // CHECK10-NEXT: ret void 2094 // 2095 // 2096 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined 2097 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] { 2098 // CHECK10-NEXT: entry: 2099 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2100 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2101 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2102 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2103 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 2104 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2105 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2106 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2107 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2108 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2109 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2110 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2111 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2112 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2113 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2114 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2115 // CHECK10-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2116 // CHECK10-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2117 // CHECK10-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2118 // CHECK10-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2119 // CHECK10-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 2120 // CHECK10-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2121 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2122 // CHECK10-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2123 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2124 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2125 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2126 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2127 // CHECK10-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2128 // CHECK10-NEXT: store i32 0, ptr [[I]], align 4 2129 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2130 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2131 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2132 // CHECK10: omp.precond.then: 2133 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2134 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2135 // CHECK10-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 2136 // CHECK10-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2137 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2138 // CHECK10-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2139 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2140 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2141 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2142 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2143 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2144 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2145 // CHECK10: cond.true: 2146 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2147 // CHECK10-NEXT: br label [[COND_END:%.*]] 2148 // CHECK10: cond.false: 2149 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2150 // CHECK10-NEXT: br label [[COND_END]] 2151 // CHECK10: cond.end: 2152 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2153 // CHECK10-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2154 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2155 // CHECK10-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 2156 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2157 // CHECK10: omp.inner.for.cond: 2158 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2159 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2160 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2161 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2162 // CHECK10: omp.inner.for.body: 2163 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2164 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 2165 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2166 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 2167 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4 2168 // CHECK10-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4 2169 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8 2170 // CHECK10-NEXT: [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8 2171 // CHECK10-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]]) 2172 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2173 // CHECK10: omp.inner.for.inc: 2174 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2175 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2176 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2177 // CHECK10-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2178 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2179 // CHECK10: omp.inner.for.end: 2180 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2181 // CHECK10: omp.loop.exit: 2182 // CHECK10-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2183 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 2184 // CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 2185 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2186 // CHECK10: omp.precond.end: 2187 // CHECK10-NEXT: ret void 2188 // 2189 // 2190 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined 2191 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] { 2192 // CHECK10-NEXT: entry: 2193 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2194 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2195 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2196 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2197 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2198 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2199 // CHECK10-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 2200 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2201 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2202 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2203 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2204 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2205 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2206 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2207 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2208 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2209 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4 2210 // CHECK10-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2211 // CHECK10-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2212 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2213 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2214 // CHECK10-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2215 // CHECK10-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2216 // CHECK10-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 2217 // CHECK10-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2218 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2219 // CHECK10-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2220 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2221 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2222 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2223 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2224 // CHECK10-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2225 // CHECK10-NEXT: store i32 0, ptr [[I]], align 4 2226 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2227 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2228 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2229 // CHECK10: omp.precond.then: 2230 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2231 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2232 // CHECK10-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 2233 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2234 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32 2235 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2236 // CHECK10-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32 2237 // CHECK10-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2238 // CHECK10-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 2239 // CHECK10-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2240 // CHECK10-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2241 // CHECK10-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2242 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2243 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2244 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2245 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2246 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2247 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2248 // CHECK10: cond.true: 2249 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2250 // CHECK10-NEXT: br label [[COND_END:%.*]] 2251 // CHECK10: cond.false: 2252 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2253 // CHECK10-NEXT: br label [[COND_END]] 2254 // CHECK10: cond.end: 2255 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2256 // CHECK10-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2257 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2258 // CHECK10-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2259 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2260 // CHECK10: omp.inner.for.cond: 2261 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2262 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2263 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2264 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2265 // CHECK10: omp.inner.for.body: 2266 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2267 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2268 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2269 // CHECK10-NEXT: store i32 [[ADD]], ptr [[I4]], align 4 2270 // CHECK10-NEXT: [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8 2271 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0 2272 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2273 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4 2274 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2275 // CHECK10-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 2276 // CHECK10-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4 2277 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2278 // CHECK10: omp.body.continue: 2279 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2280 // CHECK10: omp.inner.for.inc: 2281 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2282 // CHECK10-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 2283 // CHECK10-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 2284 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2285 // CHECK10: omp.inner.for.end: 2286 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2287 // CHECK10: omp.loop.exit: 2288 // CHECK10-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2289 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2290 // CHECK10-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2291 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2292 // CHECK10: omp.precond.end: 2293 // CHECK10-NEXT: ret void 2294 // 2295 // 2296 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51 2297 // CHECK12-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] { 2298 // CHECK12-NEXT: entry: 2299 // CHECK12-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 2300 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2301 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2302 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2303 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4 2304 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2305 // CHECK12-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]]) 2306 // CHECK12-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 2307 // CHECK12-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2308 // CHECK12-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2309 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2310 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 2311 // CHECK12-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2312 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2313 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4 2314 // CHECK12-NEXT: call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]]) 2315 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 2316 // CHECK12-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 2317 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 2318 // CHECK12-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i32 [[TMP5]], ptr [[TMP1]]) 2319 // CHECK12-NEXT: ret void 2320 // 2321 // 2322 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined 2323 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2324 // CHECK12-NEXT: entry: 2325 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2326 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2327 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2328 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2329 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2330 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2331 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2332 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2333 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2334 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2335 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2336 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2337 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2338 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2339 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2340 // CHECK12-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2341 // CHECK12-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2342 // CHECK12-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2343 // CHECK12-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2344 // CHECK12-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2345 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2346 // CHECK12-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2347 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2348 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2349 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2350 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2351 // CHECK12-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2352 // CHECK12-NEXT: store i32 0, ptr [[I]], align 4 2353 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2354 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2355 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2356 // CHECK12: omp.precond.then: 2357 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2358 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2359 // CHECK12-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 2360 // CHECK12-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2361 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2362 // CHECK12-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2363 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2364 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2365 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2366 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2367 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2368 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2369 // CHECK12: cond.true: 2370 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2371 // CHECK12-NEXT: br label [[COND_END:%.*]] 2372 // CHECK12: cond.false: 2373 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2374 // CHECK12-NEXT: br label [[COND_END]] 2375 // CHECK12: cond.end: 2376 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2377 // CHECK12-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2378 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2379 // CHECK12-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 2380 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2381 // CHECK12: omp.inner.for.cond: 2382 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2383 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2384 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2385 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2386 // CHECK12: omp.inner.for.body: 2387 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2388 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2389 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4 2390 // CHECK12-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 4 2391 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4 2392 // CHECK12-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]]) 2393 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2394 // CHECK12: omp.inner.for.inc: 2395 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2396 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2397 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2398 // CHECK12-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2399 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2400 // CHECK12: omp.inner.for.end: 2401 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2402 // CHECK12: omp.loop.exit: 2403 // CHECK12-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2404 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 2405 // CHECK12-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]]) 2406 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2407 // CHECK12: omp.precond.end: 2408 // CHECK12-NEXT: ret void 2409 // 2410 // 2411 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined 2412 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] { 2413 // CHECK12-NEXT: entry: 2414 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2415 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2416 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2417 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2418 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2419 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2420 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2421 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2422 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2423 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2424 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2425 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2426 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2427 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2428 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2429 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2430 // CHECK12-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2431 // CHECK12-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2432 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2433 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2434 // CHECK12-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2435 // CHECK12-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2436 // CHECK12-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2437 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2438 // CHECK12-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2439 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2440 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2441 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2442 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2443 // CHECK12-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2444 // CHECK12-NEXT: store i32 0, ptr [[I]], align 4 2445 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2446 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2447 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2448 // CHECK12: omp.precond.then: 2449 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2450 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2451 // CHECK12-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 2452 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2453 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2454 // CHECK12-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4 2455 // CHECK12-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 2456 // CHECK12-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2457 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2458 // CHECK12-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2459 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2460 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2461 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2462 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2463 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2464 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2465 // CHECK12: cond.true: 2466 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2467 // CHECK12-NEXT: br label [[COND_END:%.*]] 2468 // CHECK12: cond.false: 2469 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2470 // CHECK12-NEXT: br label [[COND_END]] 2471 // CHECK12: cond.end: 2472 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2473 // CHECK12-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2474 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2475 // CHECK12-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2476 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2477 // CHECK12: omp.inner.for.cond: 2478 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2479 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2480 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2481 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2482 // CHECK12: omp.inner.for.body: 2483 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2484 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2485 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2486 // CHECK12-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 2487 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, ptr [[I3]], align 4 2488 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP17]] 2489 // CHECK12-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4 2490 // CHECK12-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2491 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 2492 // CHECK12-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB3]], i32 [[TMP19]], i32 2) 2493 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2494 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]] 2495 // CHECK12: .cancel.exit: 2496 // CHECK12-NEXT: br label [[CANCEL_EXIT:%.*]] 2497 // CHECK12: .cancel.continue: 2498 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2499 // CHECK12: omp.body.continue: 2500 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2501 // CHECK12: omp.inner.for.inc: 2502 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2503 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 2504 // CHECK12-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4 2505 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2506 // CHECK12: omp.inner.for.end: 2507 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2508 // CHECK12: omp.loop.exit: 2509 // CHECK12-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2510 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 2511 // CHECK12-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP24]]) 2512 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2513 // CHECK12: cancel.exit: 2514 // CHECK12-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2515 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 2516 // CHECK12-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP26]]) 2517 // CHECK12-NEXT: br label [[CANCEL_CONT:%.*]] 2518 // CHECK12: omp.precond.end: 2519 // CHECK12-NEXT: br label [[CANCEL_CONT]] 2520 // CHECK12: cancel.cont: 2521 // CHECK12-NEXT: ret void 2522 // 2523 // 2524 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58 2525 // CHECK12-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] { 2526 // CHECK12-NEXT: entry: 2527 // CHECK12-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 2528 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2529 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2530 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 2531 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2532 // CHECK12-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 2533 // CHECK12-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2534 // CHECK12-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2535 // CHECK12-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 2536 // CHECK12-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2537 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2538 // CHECK12-NEXT: store i32 [[TMP1]], ptr [[N_CASTED]], align 4 2539 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_CASTED]], align 4 2540 // CHECK12-NEXT: [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 4 2541 // CHECK12-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined, i32 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]]) 2542 // CHECK12-NEXT: ret void 2543 // 2544 // 2545 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined 2546 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] { 2547 // CHECK12-NEXT: entry: 2548 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2549 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2550 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2551 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2552 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 2553 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2554 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2555 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2556 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2557 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2558 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2559 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2560 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2561 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2562 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2563 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2564 // CHECK12-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2565 // CHECK12-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2566 // CHECK12-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2567 // CHECK12-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2568 // CHECK12-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 2569 // CHECK12-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2570 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2571 // CHECK12-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2572 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2573 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2574 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2575 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2576 // CHECK12-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2577 // CHECK12-NEXT: store i32 0, ptr [[I]], align 4 2578 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2579 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2580 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2581 // CHECK12: omp.precond.then: 2582 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2583 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2584 // CHECK12-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4 2585 // CHECK12-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2586 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2587 // CHECK12-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2588 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 2589 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2590 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2591 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2592 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]] 2593 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2594 // CHECK12: cond.true: 2595 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2596 // CHECK12-NEXT: br label [[COND_END:%.*]] 2597 // CHECK12: cond.false: 2598 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2599 // CHECK12-NEXT: br label [[COND_END]] 2600 // CHECK12: cond.end: 2601 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 2602 // CHECK12-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2603 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2604 // CHECK12-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4 2605 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2606 // CHECK12: omp.inner.for.cond: 2607 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2608 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2609 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2610 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2611 // CHECK12: omp.inner.for.body: 2612 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2613 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2614 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4 2615 // CHECK12-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 4 2616 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4 2617 // CHECK12-NEXT: [[TMP18:%.*]] = load ptr, ptr [[G_ADDR]], align 4 2618 // CHECK12-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]], ptr [[TMP18]]) 2619 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2620 // CHECK12: omp.inner.for.inc: 2621 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2622 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2623 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2624 // CHECK12-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 2625 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2626 // CHECK12: omp.inner.for.end: 2627 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2628 // CHECK12: omp.loop.exit: 2629 // CHECK12-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2630 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2631 // CHECK12-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 2632 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2633 // CHECK12: omp.precond.end: 2634 // CHECK12-NEXT: ret void 2635 // 2636 // 2637 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l58.omp_outlined.omp_outlined 2638 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] { 2639 // CHECK12-NEXT: entry: 2640 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2641 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2642 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2643 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2644 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2645 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2646 // CHECK12-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 2647 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2648 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 2649 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2650 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2651 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 2652 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2653 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2654 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2655 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2656 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 2657 // CHECK12-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2658 // CHECK12-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2659 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2660 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2661 // CHECK12-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2662 // CHECK12-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2663 // CHECK12-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 2664 // CHECK12-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2665 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4 2666 // CHECK12-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 2667 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2668 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2669 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2670 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2671 // CHECK12-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2672 // CHECK12-NEXT: store i32 0, ptr [[I]], align 4 2673 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2674 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 2675 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2676 // CHECK12: omp.precond.then: 2677 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2678 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2679 // CHECK12-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4 2680 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2681 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2682 // CHECK12-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4 2683 // CHECK12-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4 2684 // CHECK12-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2685 // CHECK12-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2686 // CHECK12-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2687 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 2688 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2689 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2690 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2691 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2692 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2693 // CHECK12: cond.true: 2694 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2695 // CHECK12-NEXT: br label [[COND_END:%.*]] 2696 // CHECK12: cond.false: 2697 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2698 // CHECK12-NEXT: br label [[COND_END]] 2699 // CHECK12: cond.end: 2700 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2701 // CHECK12-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2702 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2703 // CHECK12-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4 2704 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2705 // CHECK12: omp.inner.for.cond: 2706 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2707 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2708 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2709 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2710 // CHECK12: omp.inner.for.body: 2711 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2712 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1 2713 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2714 // CHECK12-NEXT: store i32 [[ADD]], ptr [[I3]], align 4 2715 // CHECK12-NEXT: [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 4 2716 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 0 2717 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 2718 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, ptr [[I3]], align 4 2719 // CHECK12-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP19]] 2720 // CHECK12-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4 2721 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2722 // CHECK12: omp.body.continue: 2723 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2724 // CHECK12: omp.inner.for.inc: 2725 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2726 // CHECK12-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 2727 // CHECK12-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4 2728 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 2729 // CHECK12: omp.inner.for.end: 2730 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2731 // CHECK12: omp.loop.exit: 2732 // CHECK12-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2733 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2734 // CHECK12-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]]) 2735 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 2736 // CHECK12: omp.precond.end: 2737 // CHECK12-NEXT: ret void 2738 // 2739