1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var) 50 for (int i = 0; i < 2; ++i) { 51 vec[i] = t_var; 52 s_arr[i] = var; 53 } 54 return T(); 55 } 56 57 int main() { 58 static int svar; 59 volatile double g; 60 volatile double &g1 = g; 61 62 #ifdef LAMBDA 63 [&]() { 64 static float sfvar; 65 66 #pragma omp target teams distribute lastprivate(g, g1, svar, sfvar) 67 for (int i = 0; i < 2; ++i) { 68 // loop variables 69 70 // init private variables 71 g = 1; 72 g1 = 1; 73 svar = 3; 74 sfvar = 4.0; 75 76 77 [&]() { 78 g = 2; 79 g1 = 2; 80 svar = 4; 81 sfvar = 8.0; 82 83 }(); 84 } 85 }(); 86 return 0; 87 #else 88 S<float> test; 89 int t_var = 0; 90 int vec[] = {1, 2}; 91 S<float> s_arr[] = {1, 2}; 92 S<float> &var = test; 93 94 #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar) 95 for (int i = 0; i < 2; ++i) { 96 vec[i] = t_var; 97 s_arr[i] = var; 98 } 99 int i; 100 101 return tmain<int>(); 102 #endif 103 } 104 105 106 // skip loop variables 107 108 // copy from parameters to local address variables 109 110 // load content of local address variables 111 // the distribute loop 112 // assignment: vec[i] = t_var; 113 114 // assignment: s_arr[i] = var; 115 116 // lastprivates 117 118 119 // template tmain 120 121 122 123 // skip alloca of global_tid and bound_tid 124 // skip loop variables 125 126 // skip init of bound and global tid 127 // copy from parameters to local address variables 128 129 // load content of local address variables 130 // assignment: vec[i] = t_var; 131 132 // assignment: s_arr[i] = var; 133 134 // lastprivates 135 136 #endif 137 // CHECK1-LABEL: define {{[^@]+}}@main 138 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 139 // CHECK1-NEXT: entry: 140 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 142 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8 143 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 144 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 145 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8 146 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 147 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 148 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 149 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8 150 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8 151 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 152 // CHECK1-NEXT: ret i32 0 153 // 154 // 155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 156 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 157 // CHECK1-NEXT: entry: 158 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 159 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 160 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 161 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 162 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 163 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8 164 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8 165 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 166 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8 167 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8 168 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8 169 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 170 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 171 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8 172 // CHECK1-NEXT: [[TMP0:%.*]] = load double, ptr [[G_ADDR]], align 8 173 // CHECK1-NEXT: store double [[TMP0]], ptr [[G_CASTED]], align 8 174 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[G_CASTED]], align 8 175 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8 176 // CHECK1-NEXT: [[TMP3:%.*]] = load volatile double, ptr [[TMP2]], align 8 177 // CHECK1-NEXT: store double [[TMP3]], ptr [[G1_CASTED]], align 8 178 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[G1_CASTED]], align 8 179 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 180 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[SVAR_CASTED]], align 4 181 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 182 // CHECK1-NEXT: [[TMP7:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4 183 // CHECK1-NEXT: store float [[TMP7]], ptr [[SFVAR_CASTED]], align 4 184 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[SFVAR_CASTED]], align 8 185 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]]) 186 // CHECK1-NEXT: ret void 187 // 188 // 189 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined 190 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 191 // CHECK1-NEXT: entry: 192 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 193 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 194 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 195 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 196 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 197 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 198 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 199 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 200 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 201 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 203 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 204 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 205 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8 206 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8 207 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8 208 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 209 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 210 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 212 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 213 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 214 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8 215 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8 216 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 217 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 218 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8 219 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 220 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 221 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 222 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 223 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8 224 // CHECK1-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 8 225 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 226 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 227 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 228 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 229 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 230 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 231 // CHECK1: cond.true: 232 // CHECK1-NEXT: br label [[COND_END:%.*]] 233 // CHECK1: cond.false: 234 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 235 // CHECK1-NEXT: br label [[COND_END]] 236 // CHECK1: cond.end: 237 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 238 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 239 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 240 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 241 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 242 // CHECK1: omp.inner.for.cond: 243 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 244 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 245 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 246 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 247 // CHECK1: omp.inner.for.body: 248 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 249 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 250 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 251 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 252 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G2]], align 8 253 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8 254 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP9]], align 8 255 // CHECK1-NEXT: store i32 3, ptr [[SVAR5]], align 4 256 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4 257 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 258 // CHECK1-NEXT: store ptr [[G2]], ptr [[TMP10]], align 8 259 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 260 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP4]], align 8 261 // CHECK1-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8 262 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 263 // CHECK1-NEXT: store ptr [[SVAR5]], ptr [[TMP13]], align 8 264 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 265 // CHECK1-NEXT: store ptr [[SFVAR6]], ptr [[TMP14]], align 8 266 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 267 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 268 // CHECK1: omp.body.continue: 269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 270 // CHECK1: omp.inner.for.inc: 271 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 272 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1 273 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 275 // CHECK1: omp.inner.for.end: 276 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 277 // CHECK1: omp.loop.exit: 278 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 279 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 280 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 281 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 282 // CHECK1: .omp.lastprivate.then: 283 // CHECK1-NEXT: [[TMP18:%.*]] = load double, ptr [[G2]], align 8 284 // CHECK1-NEXT: store volatile double [[TMP18]], ptr [[G_ADDR]], align 8 285 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP4]], align 8 286 // CHECK1-NEXT: [[TMP20:%.*]] = load double, ptr [[TMP19]], align 8 287 // CHECK1-NEXT: store volatile double [[TMP20]], ptr [[TMP0]], align 8 288 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[SVAR5]], align 4 289 // CHECK1-NEXT: store i32 [[TMP21]], ptr [[SVAR_ADDR]], align 4 290 // CHECK1-NEXT: [[TMP22:%.*]] = load float, ptr [[SFVAR6]], align 4 291 // CHECK1-NEXT: store float [[TMP22]], ptr [[SFVAR_ADDR]], align 4 292 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 293 // CHECK1: .omp.lastprivate.done: 294 // CHECK1-NEXT: ret void 295 // 296 // 297 // CHECK3-LABEL: define {{[^@]+}}@main 298 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 299 // CHECK3-NEXT: entry: 300 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 301 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 302 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4 303 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 304 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 305 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4 306 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 307 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 308 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 309 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4 310 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4 311 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 312 // CHECK3-NEXT: ret i32 0 313 // 314 // 315 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66 316 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 317 // CHECK3-NEXT: entry: 318 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 319 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 320 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 321 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 322 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 323 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 324 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4 325 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 326 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 327 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 328 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 329 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 330 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 331 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 332 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4 333 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 334 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[SVAR_CASTED]], align 4 335 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 336 // CHECK3-NEXT: [[TMP5:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4 337 // CHECK3-NEXT: store float [[TMP5]], ptr [[SFVAR_CASTED]], align 4 338 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[SFVAR_CASTED]], align 4 339 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP2]], i32 [[TMP4]], i32 [[TMP6]]) 340 // CHECK3-NEXT: ret void 341 // 342 // 343 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined 344 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] { 345 // CHECK3-NEXT: entry: 346 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 347 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 348 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 349 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 350 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 351 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 352 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 353 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 354 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 355 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 356 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 357 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 358 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 359 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 360 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 361 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4 362 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4 363 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4 364 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 365 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 366 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 367 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 368 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 369 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 370 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 371 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 372 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 373 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 374 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 375 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 376 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 377 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 378 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 379 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4 380 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4 381 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 382 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 383 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 384 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 385 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 386 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 387 // CHECK3: cond.true: 388 // CHECK3-NEXT: br label [[COND_END:%.*]] 389 // CHECK3: cond.false: 390 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 391 // CHECK3-NEXT: br label [[COND_END]] 392 // CHECK3: cond.end: 393 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 394 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 395 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 396 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4 397 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 398 // CHECK3: omp.inner.for.cond: 399 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 400 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 401 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 402 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 403 // CHECK3: omp.inner.for.body: 404 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 405 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 406 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 407 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 408 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G2]], align 8 409 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 4 410 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP11]], align 4 411 // CHECK3-NEXT: store i32 3, ptr [[SVAR5]], align 4 412 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4 413 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 414 // CHECK3-NEXT: store ptr [[G2]], ptr [[TMP12]], align 4 415 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 416 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 4 417 // CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4 418 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 419 // CHECK3-NEXT: store ptr [[SVAR5]], ptr [[TMP15]], align 4 420 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 421 // CHECK3-NEXT: store ptr [[SFVAR6]], ptr [[TMP16]], align 4 422 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 423 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 424 // CHECK3: omp.body.continue: 425 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 426 // CHECK3: omp.inner.for.inc: 427 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 428 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 429 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 430 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 431 // CHECK3: omp.inner.for.end: 432 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 433 // CHECK3: omp.loop.exit: 434 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]]) 435 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 436 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 437 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 438 // CHECK3: .omp.lastprivate.then: 439 // CHECK3-NEXT: [[TMP20:%.*]] = load double, ptr [[G2]], align 8 440 // CHECK3-NEXT: store volatile double [[TMP20]], ptr [[TMP0]], align 8 441 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP4]], align 4 442 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[TMP21]], align 4 443 // CHECK3-NEXT: store volatile double [[TMP22]], ptr [[TMP2]], align 4 444 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[SVAR5]], align 4 445 // CHECK3-NEXT: store i32 [[TMP23]], ptr [[SVAR_ADDR]], align 4 446 // CHECK3-NEXT: [[TMP24:%.*]] = load float, ptr [[SFVAR6]], align 4 447 // CHECK3-NEXT: store float [[TMP24]], ptr [[SFVAR_ADDR]], align 4 448 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 449 // CHECK3: .omp.lastprivate.done: 450 // CHECK3-NEXT: ret void 451 // 452 // 453 // CHECK9-LABEL: define {{[^@]+}}@main 454 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 455 // CHECK9-NEXT: entry: 456 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 457 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 458 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8 459 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 460 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 461 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 462 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 463 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 464 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 465 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 466 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 467 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 468 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 469 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 470 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 471 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 472 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 473 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 474 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8 475 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 476 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 477 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 478 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 479 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 480 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 481 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 482 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 483 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 484 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 485 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 486 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 487 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 488 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 489 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 490 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 491 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 492 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 8 493 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 494 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 8 495 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 496 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8 497 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 498 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8 499 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 500 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP10]], align 8 501 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 502 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 503 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 504 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8 505 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 506 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8 507 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 508 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 509 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 510 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 8 511 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 512 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 8 513 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 514 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 515 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 516 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP18]], align 8 517 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 518 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP19]], align 8 519 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 520 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 521 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 522 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 523 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 524 // CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4 525 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 526 // CHECK9-NEXT: store i32 5, ptr [[TMP24]], align 4 527 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 528 // CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 8 529 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 530 // CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 8 531 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 532 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 8 533 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 534 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 535 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 536 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 537 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 538 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8 539 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 540 // CHECK9-NEXT: store i64 2, ptr [[TMP31]], align 8 541 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 542 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8 543 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 544 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 545 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 546 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 547 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 548 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4 549 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]]) 550 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 551 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 552 // CHECK9: omp_offload.failed: 553 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]] 554 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 555 // CHECK9: omp_offload.cont: 556 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 557 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 558 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 559 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 560 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 561 // CHECK9: arraydestroy.body: 562 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 563 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 564 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 565 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 566 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 567 // CHECK9: arraydestroy.done2: 568 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 569 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4 570 // CHECK9-NEXT: ret i32 [[TMP39]] 571 // 572 // 573 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 574 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 575 // CHECK9-NEXT: entry: 576 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 577 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 578 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 579 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 580 // CHECK9-NEXT: ret void 581 // 582 // 583 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 584 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 585 // CHECK9-NEXT: entry: 586 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 587 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 588 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 589 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 590 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 591 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 592 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 593 // CHECK9-NEXT: ret void 594 // 595 // 596 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 597 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 598 // CHECK9-NEXT: entry: 599 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 600 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 601 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 602 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 603 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 604 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 605 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 606 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 607 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 608 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 609 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 610 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 611 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 612 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 613 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 614 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 615 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 616 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 617 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 618 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 619 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 620 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 621 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4 622 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 623 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i64 [[TMP7]]) 624 // CHECK9-NEXT: ret void 625 // 626 // 627 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 628 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] { 629 // CHECK9-NEXT: entry: 630 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 631 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 632 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 633 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 634 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 635 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 636 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 637 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 638 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 639 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 640 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 641 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 642 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 643 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 644 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 645 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 646 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 647 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 648 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 649 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 650 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 651 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 652 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 653 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 654 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 655 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 656 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 657 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 658 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 659 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 660 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 661 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 662 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 663 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 664 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 665 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 666 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 667 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 668 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 669 // CHECK9: arrayctor.loop: 670 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 671 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 672 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 673 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 674 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 675 // CHECK9: arrayctor.cont: 676 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 677 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 678 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 679 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 680 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 681 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 682 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 683 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 684 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 685 // CHECK9: cond.true: 686 // CHECK9-NEXT: br label [[COND_END:%.*]] 687 // CHECK9: cond.false: 688 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 689 // CHECK9-NEXT: br label [[COND_END]] 690 // CHECK9: cond.end: 691 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 692 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 693 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 694 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 695 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 696 // CHECK9: omp.inner.for.cond: 697 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 698 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 699 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 700 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 701 // CHECK9: omp.inner.for.cond.cleanup: 702 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 703 // CHECK9: omp.inner.for.body: 704 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 705 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 706 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 707 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 708 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4 709 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 710 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 711 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 712 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4 713 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8 714 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 715 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP15]] to i64 716 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]] 717 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP14]], i64 4, i1 false) 718 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 719 // CHECK9: omp.body.continue: 720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 721 // CHECK9: omp.inner.for.inc: 722 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 723 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1 724 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4 725 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 726 // CHECK9: omp.inner.for.end: 727 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 728 // CHECK9: omp.loop.exit: 729 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 730 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 731 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 732 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 733 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 734 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 735 // CHECK9: .omp.lastprivate.then: 736 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4 737 // CHECK9-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4 738 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false) 739 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0 740 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2 741 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP22]] 742 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 743 // CHECK9: omp.arraycpy.body: 744 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 745 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 746 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 747 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 748 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 749 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]] 750 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] 751 // CHECK9: omp.arraycpy.done13: 752 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 8 753 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i64 4, i1 false) 754 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[SVAR7]], align 4 755 // CHECK9-NEXT: store i32 [[TMP24]], ptr [[SVAR_ADDR]], align 4 756 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 757 // CHECK9: .omp.lastprivate.done: 758 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 759 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 760 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2 761 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 762 // CHECK9: arraydestroy.body: 763 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 764 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 765 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 766 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 767 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 768 // CHECK9: arraydestroy.done15: 769 // CHECK9-NEXT: ret void 770 // 771 // 772 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 773 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 774 // CHECK9-NEXT: entry: 775 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 776 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 777 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 778 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 779 // CHECK9-NEXT: ret void 780 // 781 // 782 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 783 // CHECK9-SAME: () #[[ATTR1]] comdat { 784 // CHECK9-NEXT: entry: 785 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 786 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 787 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 788 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 789 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 790 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 791 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 792 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 793 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 794 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 795 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 796 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 797 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 798 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 799 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 800 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 801 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 802 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 803 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 804 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 805 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 806 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 807 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 808 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 809 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 810 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 811 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 812 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 8 813 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 814 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 8 815 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 816 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 817 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 818 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8 819 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 820 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 821 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 822 // CHECK9-NEXT: store ptr null, ptr [[TMP9]], align 8 823 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 824 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 8 825 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 826 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 8 827 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 828 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 829 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 830 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8 831 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 832 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8 833 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 834 // CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8 835 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 836 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 837 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 838 // CHECK9-NEXT: store i32 3, ptr [[TMP18]], align 4 839 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 840 // CHECK9-NEXT: store i32 4, ptr [[TMP19]], align 4 841 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 842 // CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8 843 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 844 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8 845 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 846 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 8 847 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 848 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8 849 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 850 // CHECK9-NEXT: store ptr null, ptr [[TMP24]], align 8 851 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 852 // CHECK9-NEXT: store ptr null, ptr [[TMP25]], align 8 853 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 854 // CHECK9-NEXT: store i64 2, ptr [[TMP26]], align 8 855 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 856 // CHECK9-NEXT: store i64 0, ptr [[TMP27]], align 8 857 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 858 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4 859 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 860 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4 861 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 862 // CHECK9-NEXT: store i32 0, ptr [[TMP30]], align 4 863 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 864 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 865 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 866 // CHECK9: omp_offload.failed: 867 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 868 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 869 // CHECK9: omp_offload.cont: 870 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 871 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 872 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 873 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 874 // CHECK9: arraydestroy.body: 875 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 876 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 877 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 878 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 879 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 880 // CHECK9: arraydestroy.done2: 881 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 882 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4 883 // CHECK9-NEXT: ret i32 [[TMP34]] 884 // 885 // 886 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 887 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 888 // CHECK9-NEXT: entry: 889 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 890 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 891 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 892 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 893 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 894 // CHECK9-NEXT: ret void 895 // 896 // 897 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 898 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 899 // CHECK9-NEXT: entry: 900 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 901 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 902 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 903 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 904 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 905 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 906 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 907 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 908 // CHECK9-NEXT: ret void 909 // 910 // 911 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 912 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 913 // CHECK9-NEXT: entry: 914 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 915 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 916 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 917 // CHECK9-NEXT: ret void 918 // 919 // 920 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 921 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 922 // CHECK9-NEXT: entry: 923 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 924 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 925 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 926 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 927 // CHECK9-NEXT: ret void 928 // 929 // 930 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 931 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 932 // CHECK9-NEXT: entry: 933 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 934 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 935 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 936 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 937 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 938 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 939 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 940 // CHECK9-NEXT: ret void 941 // 942 // 943 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 944 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 945 // CHECK9-NEXT: entry: 946 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 947 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 948 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 949 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 950 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 951 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 952 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 953 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 954 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 955 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 956 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 957 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 958 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 959 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 960 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 961 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 962 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 963 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 964 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]]) 965 // CHECK9-NEXT: ret void 966 // 967 // 968 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 969 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 970 // CHECK9-NEXT: entry: 971 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 972 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 973 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 974 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 975 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 976 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 977 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 978 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 979 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 980 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 981 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 982 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 983 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 984 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 985 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 986 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 987 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 988 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 989 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 990 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 991 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 992 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 993 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 994 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 995 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 996 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 997 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 998 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 999 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 1000 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1001 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1002 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1003 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1004 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1005 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1006 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1007 // CHECK9: arrayctor.loop: 1008 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1009 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1010 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 1011 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1012 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1013 // CHECK9: arrayctor.cont: 1014 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 1015 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1016 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 1017 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1018 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1019 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1020 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1021 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1022 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1023 // CHECK9: cond.true: 1024 // CHECK9-NEXT: br label [[COND_END:%.*]] 1025 // CHECK9: cond.false: 1026 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1027 // CHECK9-NEXT: br label [[COND_END]] 1028 // CHECK9: cond.end: 1029 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1030 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1031 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1032 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1033 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1034 // CHECK9: omp.inner.for.cond: 1035 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1036 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1037 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1038 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1039 // CHECK9: omp.inner.for.cond.cleanup: 1040 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1041 // CHECK9: omp.inner.for.body: 1042 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1043 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1044 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1045 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1046 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4 1047 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1048 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 1049 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 1050 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4 1051 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8 1052 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 1053 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 1054 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]] 1055 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i64 4, i1 false) 1056 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1057 // CHECK9: omp.body.continue: 1058 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1059 // CHECK9: omp.inner.for.inc: 1060 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1061 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 1062 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 1063 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1064 // CHECK9: omp.inner.for.end: 1065 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1066 // CHECK9: omp.loop.exit: 1067 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1068 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 1069 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 1070 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1071 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1072 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1073 // CHECK9: .omp.lastprivate.then: 1074 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4 1075 // CHECK9-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4 1076 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false) 1077 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 0 1078 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2 1079 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP22]] 1080 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1081 // CHECK9: omp.arraycpy.body: 1082 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1083 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1084 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 1085 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1086 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1087 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]] 1088 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1089 // CHECK9: omp.arraycpy.done12: 1090 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 8 1091 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i64 4, i1 false) 1092 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1093 // CHECK9: .omp.lastprivate.done: 1094 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1095 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1096 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2 1097 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1098 // CHECK9: arraydestroy.body: 1099 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1100 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1101 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1102 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1103 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1104 // CHECK9: arraydestroy.done14: 1105 // CHECK9-NEXT: ret void 1106 // 1107 // 1108 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1109 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1110 // CHECK9-NEXT: entry: 1111 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1112 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1113 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1114 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1115 // CHECK9-NEXT: ret void 1116 // 1117 // 1118 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1119 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1120 // CHECK9-NEXT: entry: 1121 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1122 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1123 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1124 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1125 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 1126 // CHECK9-NEXT: ret void 1127 // 1128 // 1129 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1130 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1131 // CHECK9-NEXT: entry: 1132 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1133 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1134 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1135 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1136 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1137 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1138 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1139 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1140 // CHECK9-NEXT: ret void 1141 // 1142 // 1143 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1144 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1145 // CHECK9-NEXT: entry: 1146 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1147 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1148 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1149 // CHECK9-NEXT: ret void 1150 // 1151 // 1152 // CHECK11-LABEL: define {{[^@]+}}@main 1153 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1154 // CHECK11-NEXT: entry: 1155 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1156 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1157 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4 1158 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1159 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1160 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1161 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1162 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1163 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1164 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1165 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1166 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 1167 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 1168 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 1169 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1170 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1171 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1172 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1173 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4 1174 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1175 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1176 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1177 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1178 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1179 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1180 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1181 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1182 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1183 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1184 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1185 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1186 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1187 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 1188 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 1189 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 1190 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1191 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 4 1192 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1193 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 4 1194 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1195 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4 1196 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1197 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4 1198 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1199 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP10]], align 4 1200 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1201 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1202 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1203 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 4 1204 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1205 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 4 1206 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1207 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4 1208 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1209 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 4 1210 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1211 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 4 1212 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1213 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4 1214 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1215 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 4 1216 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1217 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 4 1218 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1219 // CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 4 1220 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1221 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1222 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1223 // CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 4 1224 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1225 // CHECK11-NEXT: store i32 5, ptr [[TMP24]], align 4 1226 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1227 // CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 4 1228 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1229 // CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 4 1230 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1231 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 4 1232 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1233 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 1234 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1235 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 1236 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1237 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4 1238 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1239 // CHECK11-NEXT: store i64 2, ptr [[TMP31]], align 8 1240 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1241 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8 1242 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1243 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 1244 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1245 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 1246 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1247 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4 1248 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]]) 1249 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1250 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1251 // CHECK11: omp_offload.failed: 1252 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]] 1253 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1254 // CHECK11: omp_offload.cont: 1255 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1256 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1257 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1258 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1259 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1260 // CHECK11: arraydestroy.body: 1261 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1262 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1263 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1264 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1265 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1266 // CHECK11: arraydestroy.done2: 1267 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1268 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4 1269 // CHECK11-NEXT: ret i32 [[TMP39]] 1270 // 1271 // 1272 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1273 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1274 // CHECK11-NEXT: entry: 1275 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1276 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1277 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1278 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1279 // CHECK11-NEXT: ret void 1280 // 1281 // 1282 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1283 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1284 // CHECK11-NEXT: entry: 1285 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1286 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1287 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1288 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1289 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1290 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1291 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1292 // CHECK11-NEXT: ret void 1293 // 1294 // 1295 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1296 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1297 // CHECK11-NEXT: entry: 1298 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1299 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1300 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1301 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1302 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1303 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1304 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1305 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1306 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1307 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1308 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1309 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1310 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 1311 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1312 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1313 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1314 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1315 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 1316 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 1317 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1318 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1319 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4 1320 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4 1321 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 1322 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i32 [[TMP7]]) 1323 // CHECK11-NEXT: ret void 1324 // 1325 // 1326 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 1327 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] { 1328 // CHECK11-NEXT: entry: 1329 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1330 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1331 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1332 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1333 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1334 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1335 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1336 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1337 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1338 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1339 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1340 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1341 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1342 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1343 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1344 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1345 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1346 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1347 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 1348 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4 1349 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1350 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1351 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1352 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1353 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1354 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1355 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1356 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 1357 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1358 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1359 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1360 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1361 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1362 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1363 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1364 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1365 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1366 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1367 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1368 // CHECK11: arrayctor.loop: 1369 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1370 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1371 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1372 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1373 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1374 // CHECK11: arrayctor.cont: 1375 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1376 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1377 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 1378 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1379 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1380 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1381 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1382 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1383 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1384 // CHECK11: cond.true: 1385 // CHECK11-NEXT: br label [[COND_END:%.*]] 1386 // CHECK11: cond.false: 1387 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1388 // CHECK11-NEXT: br label [[COND_END]] 1389 // CHECK11: cond.end: 1390 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1391 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1392 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1393 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1394 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1395 // CHECK11: omp.inner.for.cond: 1396 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1397 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1398 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1399 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1400 // CHECK11: omp.inner.for.cond.cleanup: 1401 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1402 // CHECK11: omp.inner.for.body: 1403 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1404 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1405 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1406 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1407 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4 1408 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1409 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]] 1410 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4 1411 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4 1412 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 1413 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP15]] 1414 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i32 4, i1 false) 1415 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1416 // CHECK11: omp.body.continue: 1417 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1418 // CHECK11: omp.inner.for.inc: 1419 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1420 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 1421 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4 1422 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1423 // CHECK11: omp.inner.for.end: 1424 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1425 // CHECK11: omp.loop.exit: 1426 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1427 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 1428 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 1429 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1430 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1431 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1432 // CHECK11: .omp.lastprivate.then: 1433 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4 1434 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4 1435 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false) 1436 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0 1437 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2 1438 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP22]] 1439 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1440 // CHECK11: omp.arraycpy.body: 1441 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1442 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1443 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1444 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1445 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1446 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]] 1447 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]] 1448 // CHECK11: omp.arraycpy.done12: 1449 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 4 1450 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i32 4, i1 false) 1451 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[SVAR7]], align 4 1452 // CHECK11-NEXT: store i32 [[TMP24]], ptr [[SVAR_ADDR]], align 4 1453 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1454 // CHECK11: .omp.lastprivate.done: 1455 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1456 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1457 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2 1458 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1459 // CHECK11: arraydestroy.body: 1460 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1461 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1462 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1463 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1464 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1465 // CHECK11: arraydestroy.done14: 1466 // CHECK11-NEXT: ret void 1467 // 1468 // 1469 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1470 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1471 // CHECK11-NEXT: entry: 1472 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1473 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1474 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1475 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1476 // CHECK11-NEXT: ret void 1477 // 1478 // 1479 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1480 // CHECK11-SAME: () #[[ATTR1]] comdat { 1481 // CHECK11-NEXT: entry: 1482 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1483 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1484 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1485 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1486 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1487 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1488 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1489 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1490 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 1491 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 1492 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 1493 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1494 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1495 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1496 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1497 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1498 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1499 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1500 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1501 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1502 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1503 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1504 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1505 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1506 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1507 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1508 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1509 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 4 1510 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1511 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 4 1512 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1513 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1514 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1515 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4 1516 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1517 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 1518 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1519 // CHECK11-NEXT: store ptr null, ptr [[TMP9]], align 4 1520 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1521 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 4 1522 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1523 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 4 1524 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1525 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1526 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1527 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 4 1528 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1529 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 4 1530 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1531 // CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 4 1532 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1533 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1534 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1535 // CHECK11-NEXT: store i32 3, ptr [[TMP18]], align 4 1536 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1537 // CHECK11-NEXT: store i32 4, ptr [[TMP19]], align 4 1538 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1539 // CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 4 1540 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1541 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 4 1542 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1543 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 4 1544 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1545 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 4 1546 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1547 // CHECK11-NEXT: store ptr null, ptr [[TMP24]], align 4 1548 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1549 // CHECK11-NEXT: store ptr null, ptr [[TMP25]], align 4 1550 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1551 // CHECK11-NEXT: store i64 2, ptr [[TMP26]], align 8 1552 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1553 // CHECK11-NEXT: store i64 0, ptr [[TMP27]], align 8 1554 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1555 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4 1556 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1557 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4 1558 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1559 // CHECK11-NEXT: store i32 0, ptr [[TMP30]], align 4 1560 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 1561 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 1562 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1563 // CHECK11: omp_offload.failed: 1564 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 1565 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1566 // CHECK11: omp_offload.cont: 1567 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1568 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1569 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1570 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1571 // CHECK11: arraydestroy.body: 1572 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1573 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1574 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1575 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1576 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1577 // CHECK11: arraydestroy.done2: 1578 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1579 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4 1580 // CHECK11-NEXT: ret i32 [[TMP34]] 1581 // 1582 // 1583 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1584 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1585 // CHECK11-NEXT: entry: 1586 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1587 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1588 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1589 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1590 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1591 // CHECK11-NEXT: ret void 1592 // 1593 // 1594 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1595 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1596 // CHECK11-NEXT: entry: 1597 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1598 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1599 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1600 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1601 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1602 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1603 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1604 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1605 // CHECK11-NEXT: ret void 1606 // 1607 // 1608 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1609 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1610 // CHECK11-NEXT: entry: 1611 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1612 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1613 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1614 // CHECK11-NEXT: ret void 1615 // 1616 // 1617 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1618 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1619 // CHECK11-NEXT: entry: 1620 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1621 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1622 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1623 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1624 // CHECK11-NEXT: ret void 1625 // 1626 // 1627 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1628 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1629 // CHECK11-NEXT: entry: 1630 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1631 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1632 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1633 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1634 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1635 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1636 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1637 // CHECK11-NEXT: ret void 1638 // 1639 // 1640 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1641 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1642 // CHECK11-NEXT: entry: 1643 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1644 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1645 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1646 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1647 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1648 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1649 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1650 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1651 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1652 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1653 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1654 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1655 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1656 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1657 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4 1658 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4 1659 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1660 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1661 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]]) 1662 // CHECK11-NEXT: ret void 1663 // 1664 // 1665 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1666 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1667 // CHECK11-NEXT: entry: 1668 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1669 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1670 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1671 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1672 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1673 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1674 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1675 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1676 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1677 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1678 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1679 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1680 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1681 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1682 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1683 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1684 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1685 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 1686 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1687 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1688 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1689 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1690 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1691 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1692 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1693 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1694 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1695 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1696 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1697 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1698 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1699 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1700 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1701 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1702 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1703 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1704 // CHECK11: arrayctor.loop: 1705 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1706 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1707 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1708 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1709 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1710 // CHECK11: arrayctor.cont: 1711 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1712 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1713 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 1714 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1715 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 1716 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1717 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1718 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 1719 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1720 // CHECK11: cond.true: 1721 // CHECK11-NEXT: br label [[COND_END:%.*]] 1722 // CHECK11: cond.false: 1723 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1724 // CHECK11-NEXT: br label [[COND_END]] 1725 // CHECK11: cond.end: 1726 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 1727 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1728 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1729 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4 1730 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1731 // CHECK11: omp.inner.for.cond: 1732 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1733 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1734 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1735 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1736 // CHECK11: omp.inner.for.cond.cleanup: 1737 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1738 // CHECK11: omp.inner.for.body: 1739 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1740 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1741 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1742 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1743 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4 1744 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4 1745 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]] 1746 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4 1747 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4 1748 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 1749 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP15]] 1750 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP14]], i32 4, i1 false) 1751 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1752 // CHECK11: omp.body.continue: 1753 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1754 // CHECK11: omp.inner.for.inc: 1755 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1756 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1 1757 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 1758 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1759 // CHECK11: omp.inner.for.end: 1760 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1761 // CHECK11: omp.loop.exit: 1762 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1763 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 1764 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]]) 1765 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1766 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 1767 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] 1768 // CHECK11: .omp.lastprivate.then: 1769 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4 1770 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4 1771 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false) 1772 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 0 1773 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2 1774 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP22]] 1775 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1776 // CHECK11: omp.arraycpy.body: 1777 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1778 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1779 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1780 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1781 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1782 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]] 1783 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]] 1784 // CHECK11: omp.arraycpy.done11: 1785 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 4 1786 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i32 4, i1 false) 1787 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] 1788 // CHECK11: .omp.lastprivate.done: 1789 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]] 1790 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1791 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2 1792 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1793 // CHECK11: arraydestroy.body: 1794 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1795 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1796 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1797 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 1798 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 1799 // CHECK11: arraydestroy.done13: 1800 // CHECK11-NEXT: ret void 1801 // 1802 // 1803 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1804 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1805 // CHECK11-NEXT: entry: 1806 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1807 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1808 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1809 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1810 // CHECK11-NEXT: ret void 1811 // 1812 // 1813 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1814 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1815 // CHECK11-NEXT: entry: 1816 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1817 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1818 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1819 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1820 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1821 // CHECK11-NEXT: ret void 1822 // 1823 // 1824 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1825 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1826 // CHECK11-NEXT: entry: 1827 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1828 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1829 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1830 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1831 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1832 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1833 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1834 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1835 // CHECK11-NEXT: ret void 1836 // 1837 // 1838 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1839 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1840 // CHECK11-NEXT: entry: 1841 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1842 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1843 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1844 // CHECK11-NEXT: ret void 1845 // 1846