1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 9 10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 26 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 36 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 37 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 38 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 39 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 40 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 41 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 42 43 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 44 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 45 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 46 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 47 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 49 50 // Test target codegen - host bc file has to be created first. 51 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 52 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 53 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 54 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 55 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 57 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 58 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 59 60 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 61 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 63 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 65 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 66 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 67 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 68 69 // expected-no-diagnostics 70 #ifndef HEADER 71 #define HEADER 72 73 74 75 76 // We have 6 target regions 77 78 79 80 // Check target registration is registered as a Ctor. 81 82 83 template<typename tx> 84 tx ftemplate(int n) { 85 tx a = 0; 86 87 #pragma omp target parallel if(parallel: 0) 88 { 89 a += 1; 90 } 91 92 short b = 1; 93 #pragma omp target parallel if(parallel: 1) 94 { 95 a += b; 96 } 97 98 return a; 99 } 100 101 static 102 int fstatic(int n) { 103 104 #pragma omp target parallel if(n>1) 105 { 106 } 107 108 #pragma omp target parallel if(target: n-2>2) 109 { 110 } 111 112 return n+1; 113 } 114 115 struct S1 { 116 double a; 117 118 int r1(int n){ 119 int b = 1; 120 121 #pragma omp target parallel if(parallel: n>3) 122 { 123 this->a = (double)b + 1.5; 124 } 125 126 #pragma omp target parallel if(target: n>4) if(parallel: n>5) 127 { 128 this->a = 2.5; 129 } 130 131 return (int)a; 132 } 133 }; 134 135 int bar(int n){ 136 int a = 0; 137 138 S1 S; 139 a += S.r1(n); 140 141 a += fstatic(n); 142 143 a += ftemplate<int>(n); 144 145 return a; 146 } 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 // Check that the offloading functions are emitted and that the parallel function 162 // is appropriately guarded. 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 #endif 185 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari 186 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 187 // CHECK1-NEXT: entry: 188 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 191 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 192 // CHECK1-NEXT: store i32 0, ptr [[A]], align 4 193 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 194 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(ptr noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP0]]) 195 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4 196 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 197 // CHECK1-NEXT: store i32 [[ADD]], ptr [[A]], align 4 198 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 199 // CHECK1-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP2]]) 200 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4 201 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 202 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[A]], align 4 203 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 204 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP4]]) 205 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[A]], align 4 206 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 207 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[A]], align 4 208 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[A]], align 4 209 // CHECK1-NEXT: ret i32 [[TMP6]] 210 // 211 // 212 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 213 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat align 2 { 214 // CHECK1-NEXT: entry: 215 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 216 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 219 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 220 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 221 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 222 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 223 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 224 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 225 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i64, align 8 226 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x ptr], align 8 227 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x ptr], align 8 228 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x ptr], align 8 229 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 230 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 231 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 232 // CHECK1-NEXT: store i32 1, ptr [[B]], align 4 233 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 234 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3 235 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8 236 // CHECK1-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR_]], align 1 237 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[B]], align 4 238 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[B_CASTED]], align 4 239 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[B_CASTED]], align 8 240 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 241 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1 242 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL]] to i8 243 // CHECK1-NEXT: store i8 [[FROMBOOL2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 244 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 245 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0 246 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 247 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP5]], align 8 248 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 249 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP6]], align 8 250 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 251 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 252 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 253 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 254 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 255 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8 256 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 257 // CHECK1-NEXT: store ptr null, ptr [[TMP10]], align 8 258 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 259 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP11]], align 8 260 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 261 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP12]], align 8 262 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 263 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 264 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 265 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 266 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 267 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP16]] to i1 268 // CHECK1-NEXT: [[TMP17:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1 269 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 270 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 271 // CHECK1-NEXT: store i32 1, ptr [[TMP18]], align 4 272 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 273 // CHECK1-NEXT: store i32 3, ptr [[TMP19]], align 4 274 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 275 // CHECK1-NEXT: store ptr [[TMP14]], ptr [[TMP20]], align 8 276 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 277 // CHECK1-NEXT: store ptr [[TMP15]], ptr [[TMP21]], align 8 278 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 279 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP22]], align 8 280 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 281 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP23]], align 8 282 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 283 // CHECK1-NEXT: store ptr null, ptr [[TMP24]], align 8 284 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 285 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8 286 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 287 // CHECK1-NEXT: store i64 0, ptr [[TMP26]], align 8 288 // CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 1, i32 [[TMP17]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, ptr [[KERNEL_ARGS]]) 289 // CHECK1-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 290 // CHECK1-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 291 // CHECK1: omp_offload.failed: 292 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(ptr [[THIS1]], i64 [[TMP2]], i64 [[TMP4]]) #[[ATTR3:[0-9]+]] 293 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 294 // CHECK1: omp_offload.cont: 295 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[N_ADDR]], align 4 296 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP29]], 5 297 // CHECK1-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[CMP5]] to i8 298 // CHECK1-NEXT: store i8 [[FROMBOOL6]], ptr [[DOTCAPTURE_EXPR_4]], align 1 299 // CHECK1-NEXT: [[TMP30:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 300 // CHECK1-NEXT: [[TOBOOL7:%.*]] = trunc i8 [[TMP30]] to i1 301 // CHECK1-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[TOBOOL7]] to i8 302 // CHECK1-NEXT: store i8 [[FROMBOOL9]], ptr [[DOTCAPTURE_EXPR__CASTED8]], align 1 303 // CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED8]], align 8 304 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[N_ADDR]], align 4 305 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP32]], 4 306 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 307 // CHECK1: omp_if.then: 308 // CHECK1-NEXT: [[A11:%.*]] = getelementptr inbounds [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 309 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 310 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP33]], align 8 311 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 312 // CHECK1-NEXT: store ptr [[A11]], ptr [[TMP34]], align 8 313 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 0 314 // CHECK1-NEXT: store ptr null, ptr [[TMP35]], align 8 315 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 316 // CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP36]], align 8 317 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 318 // CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP37]], align 8 319 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 1 320 // CHECK1-NEXT: store ptr null, ptr [[TMP38]], align 8 321 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 322 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 323 // CHECK1-NEXT: [[TMP41:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 324 // CHECK1-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP41]] to i1 325 // CHECK1-NEXT: [[TMP42:%.*]] = select i1 [[TOBOOL15]], i32 0, i32 1 326 // CHECK1-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 327 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 0 328 // CHECK1-NEXT: store i32 1, ptr [[TMP43]], align 4 329 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 1 330 // CHECK1-NEXT: store i32 2, ptr [[TMP44]], align 4 331 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 2 332 // CHECK1-NEXT: store ptr [[TMP39]], ptr [[TMP45]], align 8 333 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 3 334 // CHECK1-NEXT: store ptr [[TMP40]], ptr [[TMP46]], align 8 335 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 4 336 // CHECK1-NEXT: store ptr @.offload_sizes.2, ptr [[TMP47]], align 8 337 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 5 338 // CHECK1-NEXT: store ptr @.offload_maptypes.3, ptr [[TMP48]], align 8 339 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 6 340 // CHECK1-NEXT: store ptr null, ptr [[TMP49]], align 8 341 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 7 342 // CHECK1-NEXT: store ptr null, ptr [[TMP50]], align 8 343 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 8 344 // CHECK1-NEXT: store i64 0, ptr [[TMP51]], align 8 345 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP42]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, ptr [[KERNEL_ARGS16]]) 346 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 347 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 348 // CHECK1: omp_offload.failed17: 349 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i64 [[TMP31]]) #[[ATTR3]] 350 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT18]] 351 // CHECK1: omp_offload.cont18: 352 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 353 // CHECK1: omp_if.else: 354 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i64 [[TMP31]]) #[[ATTR3]] 355 // CHECK1-NEXT: br label [[OMP_IF_END]] 356 // CHECK1: omp_if.end: 357 // CHECK1-NEXT: [[A19:%.*]] = getelementptr inbounds [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 358 // CHECK1-NEXT: [[TMP54:%.*]] = load double, ptr [[A19]], align 8 359 // CHECK1-NEXT: [[CONV:%.*]] = fptosi double [[TMP54]] to i32 360 // CHECK1-NEXT: ret i32 [[CONV]] 361 // 362 // 363 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici 364 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 365 // CHECK1-NEXT: entry: 366 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 368 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 369 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 370 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 371 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 372 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 373 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 374 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1 375 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8 376 // CHECK1-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR_]], align 1 377 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 378 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 379 // CHECK1-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8 380 // CHECK1-NEXT: store i8 [[FROMBOOL1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 381 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 382 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 383 // CHECK1-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1 384 // CHECK1-NEXT: br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 385 // CHECK1: omp_if.then: 386 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 387 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP4]], align 8 388 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 389 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP5]], align 8 390 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 391 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 392 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 393 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 394 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 395 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP9]] to i1 396 // CHECK1-NEXT: [[TMP10:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1 397 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 398 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 399 // CHECK1-NEXT: store i32 1, ptr [[TMP11]], align 4 400 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 401 // CHECK1-NEXT: store i32 1, ptr [[TMP12]], align 4 402 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 403 // CHECK1-NEXT: store ptr [[TMP7]], ptr [[TMP13]], align 8 404 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 405 // CHECK1-NEXT: store ptr [[TMP8]], ptr [[TMP14]], align 8 406 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 407 // CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP15]], align 8 408 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 409 // CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP16]], align 8 410 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 411 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 412 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 413 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 414 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 415 // CHECK1-NEXT: store i64 0, ptr [[TMP19]], align 8 416 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP10]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, ptr [[KERNEL_ARGS]]) 417 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 418 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 419 // CHECK1: omp_offload.failed: 420 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]] 421 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 422 // CHECK1: omp_offload.cont: 423 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 424 // CHECK1: omp_if.else: 425 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR3]] 426 // CHECK1-NEXT: br label [[OMP_IF_END]] 427 // CHECK1: omp_if.end: 428 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[N_ADDR]], align 4 429 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP22]], 2 430 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2 431 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE9:%.*]] 432 // CHECK1: omp_if.then5: 433 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 434 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0 435 // CHECK1-NEXT: store i32 1, ptr [[TMP23]], align 4 436 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1 437 // CHECK1-NEXT: store i32 0, ptr [[TMP24]], align 4 438 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2 439 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8 440 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3 441 // CHECK1-NEXT: store ptr null, ptr [[TMP26]], align 8 442 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4 443 // CHECK1-NEXT: store ptr null, ptr [[TMP27]], align 8 444 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5 445 // CHECK1-NEXT: store ptr null, ptr [[TMP28]], align 8 446 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6 447 // CHECK1-NEXT: store ptr null, ptr [[TMP29]], align 8 448 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7 449 // CHECK1-NEXT: store ptr null, ptr [[TMP30]], align 8 450 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8 451 // CHECK1-NEXT: store i64 0, ptr [[TMP31]], align 8 452 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, ptr [[KERNEL_ARGS6]]) 453 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 454 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 455 // CHECK1: omp_offload.failed7: 456 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]] 457 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 458 // CHECK1: omp_offload.cont8: 459 // CHECK1-NEXT: br label [[OMP_IF_END10:%.*]] 460 // CHECK1: omp_if.else9: 461 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]] 462 // CHECK1-NEXT: br label [[OMP_IF_END10]] 463 // CHECK1: omp_if.end10: 464 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[N_ADDR]], align 4 465 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP34]], 1 466 // CHECK1-NEXT: ret i32 [[ADD]] 467 // 468 // 469 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 470 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 471 // CHECK1-NEXT: entry: 472 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 473 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 474 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 475 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 476 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 477 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 478 // CHECK1-NEXT: [[B:%.*]] = alloca i16, align 2 479 // CHECK1-NEXT: [[A_CASTED1:%.*]] = alloca i64, align 8 480 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 481 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x ptr], align 8 482 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x ptr], align 8 483 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x ptr], align 8 484 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 485 // CHECK1-NEXT: store i32 0, ptr [[A]], align 4 486 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4 487 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 488 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8 489 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 490 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 491 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 492 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 493 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 494 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 495 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 496 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 497 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 498 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 499 // CHECK1-NEXT: store i32 1, ptr [[TMP7]], align 4 500 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 501 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 502 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 503 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 504 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 505 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 506 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 507 // CHECK1-NEXT: store ptr @.offload_sizes.9, ptr [[TMP11]], align 8 508 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 509 // CHECK1-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP12]], align 8 510 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 511 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 512 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 513 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 514 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 515 // CHECK1-NEXT: store i64 0, ptr [[TMP15]], align 8 516 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, ptr [[KERNEL_ARGS]]) 517 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 518 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 519 // CHECK1: omp_offload.failed: 520 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i64 [[TMP1]]) #[[ATTR3]] 521 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 522 // CHECK1: omp_offload.cont: 523 // CHECK1-NEXT: store i16 1, ptr [[B]], align 2 524 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[A]], align 4 525 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[A_CASTED1]], align 4 526 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[A_CASTED1]], align 8 527 // CHECK1-NEXT: [[TMP20:%.*]] = load i16, ptr [[B]], align 2 528 // CHECK1-NEXT: store i16 [[TMP20]], ptr [[B_CASTED]], align 2 529 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[B_CASTED]], align 8 530 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 531 // CHECK1-NEXT: store i64 [[TMP19]], ptr [[TMP22]], align 8 532 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 533 // CHECK1-NEXT: store i64 [[TMP19]], ptr [[TMP23]], align 8 534 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i64 0, i64 0 535 // CHECK1-NEXT: store ptr null, ptr [[TMP24]], align 8 536 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1 537 // CHECK1-NEXT: store i64 [[TMP21]], ptr [[TMP25]], align 8 538 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 1 539 // CHECK1-NEXT: store i64 [[TMP21]], ptr [[TMP26]], align 8 540 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i64 0, i64 1 541 // CHECK1-NEXT: store ptr null, ptr [[TMP27]], align 8 542 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 543 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 544 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 545 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 546 // CHECK1-NEXT: store i32 1, ptr [[TMP30]], align 4 547 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 548 // CHECK1-NEXT: store i32 2, ptr [[TMP31]], align 4 549 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 550 // CHECK1-NEXT: store ptr [[TMP28]], ptr [[TMP32]], align 8 551 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 552 // CHECK1-NEXT: store ptr [[TMP29]], ptr [[TMP33]], align 8 553 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 554 // CHECK1-NEXT: store ptr @.offload_sizes.12, ptr [[TMP34]], align 8 555 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 556 // CHECK1-NEXT: store ptr @.offload_maptypes.13, ptr [[TMP35]], align 8 557 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 558 // CHECK1-NEXT: store ptr null, ptr [[TMP36]], align 8 559 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 560 // CHECK1-NEXT: store ptr null, ptr [[TMP37]], align 8 561 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 562 // CHECK1-NEXT: store i64 0, ptr [[TMP38]], align 8 563 // CHECK1-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, ptr [[KERNEL_ARGS5]]) 564 // CHECK1-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 565 // CHECK1-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 566 // CHECK1: omp_offload.failed6: 567 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP19]], i64 [[TMP21]]) #[[ATTR3]] 568 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 569 // CHECK1: omp_offload.cont7: 570 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[A]], align 4 571 // CHECK1-NEXT: ret i32 [[TMP41]] 572 // 573 // 574 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 575 // CHECK1-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 576 // CHECK1-NEXT: entry: 577 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 578 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 579 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 580 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 581 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 582 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 583 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 584 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 585 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 586 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 587 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 588 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 589 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 590 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 591 // CHECK1-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 592 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1 593 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 594 // CHECK1: omp_if.then: 595 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined., ptr [[TMP1]], i64 [[TMP3]]) 596 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 597 // CHECK1: omp_if.else: 598 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 599 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 600 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 601 // CHECK1-NEXT: call void @.omp_outlined.(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i64 [[TMP3]]) #[[ATTR3]] 602 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 603 // CHECK1-NEXT: br label [[OMP_IF_END]] 604 // CHECK1: omp_if.end: 605 // CHECK1-NEXT: ret void 606 // 607 // 608 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 609 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]]) #[[ATTR2:[0-9]+]] { 610 // CHECK1-NEXT: entry: 611 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 612 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 613 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 614 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 615 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 616 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 617 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 618 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 619 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 620 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 621 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 622 // CHECK1-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 623 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 624 // CHECK1-NEXT: store double [[ADD]], ptr [[A]], align 8 625 // CHECK1-NEXT: ret void 626 // 627 // 628 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 629 // CHECK1-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 630 // CHECK1-NEXT: entry: 631 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 632 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 633 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 635 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 636 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 637 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 638 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 639 // CHECK1-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 640 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 641 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 642 // CHECK1: omp_if.then: 643 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @.omp_outlined..1, ptr [[TMP1]]) 644 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 645 // CHECK1: omp_if.else: 646 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 647 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 648 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 649 // CHECK1-NEXT: call void @.omp_outlined..1(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR3]] 650 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 651 // CHECK1-NEXT: br label [[OMP_IF_END]] 652 // CHECK1: omp_if.end: 653 // CHECK1-NEXT: ret void 654 // 655 // 656 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 657 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] { 658 // CHECK1-NEXT: entry: 659 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 660 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 661 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 662 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 663 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 664 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 665 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 666 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 667 // CHECK1-NEXT: store double 2.500000e+00, ptr [[A]], align 8 668 // CHECK1-NEXT: ret void 669 // 670 // 671 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 672 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 673 // CHECK1-NEXT: entry: 674 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 675 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 676 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 677 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 678 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 679 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 680 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 681 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 682 // CHECK1: omp_if.then: 683 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined..4) 684 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 685 // CHECK1: omp_if.else: 686 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 687 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 688 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 689 // CHECK1-NEXT: call void @.omp_outlined..4(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]] 690 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 691 // CHECK1-NEXT: br label [[OMP_IF_END]] 692 // CHECK1: omp_if.end: 693 // CHECK1-NEXT: ret void 694 // 695 // 696 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 697 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 698 // CHECK1-NEXT: entry: 699 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 700 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 701 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 702 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 703 // CHECK1-NEXT: ret void 704 // 705 // 706 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 707 // CHECK1-SAME: () #[[ATTR1]] { 708 // CHECK1-NEXT: entry: 709 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined..7) 710 // CHECK1-NEXT: ret void 711 // 712 // 713 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 714 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 715 // CHECK1-NEXT: entry: 716 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 717 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 718 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 719 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 720 // CHECK1-NEXT: ret void 721 // 722 // 723 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 724 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] { 725 // CHECK1-NEXT: entry: 726 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 727 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 728 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 729 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 731 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 732 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 733 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 734 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[A_CASTED]], align 8 735 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 736 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 737 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 738 // CHECK1-NEXT: call void @.omp_outlined..8(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR3]] 739 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 740 // CHECK1-NEXT: ret void 741 // 742 // 743 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 744 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR2]] { 745 // CHECK1-NEXT: entry: 746 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 747 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 748 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 749 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 750 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 751 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 752 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 753 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 754 // CHECK1-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 755 // CHECK1-NEXT: ret void 756 // 757 // 758 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 759 // CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 760 // CHECK1-NEXT: entry: 761 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 762 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 763 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 764 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 765 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 766 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 767 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 768 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 769 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8 770 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 771 // CHECK1-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 772 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 773 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined..11, i64 [[TMP1]], i64 [[TMP3]]) 774 // CHECK1-NEXT: ret void 775 // 776 // 777 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 778 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR2]] { 779 // CHECK1-NEXT: entry: 780 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 781 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 782 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 783 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 784 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 785 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 786 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 787 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 788 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 789 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 790 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 791 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 792 // CHECK1-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 793 // CHECK1-NEXT: ret void 794 // 795 // 796 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 797 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 798 // CHECK1-NEXT: entry: 799 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 800 // CHECK1-NEXT: ret void 801 // 802 // 803 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari 804 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 805 // CHECK3-NEXT: entry: 806 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 807 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 808 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 809 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 810 // CHECK3-NEXT: store i32 0, ptr [[A]], align 4 811 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 812 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2S12r1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP0]]) 813 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4 814 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 815 // CHECK3-NEXT: store i32 [[ADD]], ptr [[A]], align 4 816 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 817 // CHECK3-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP2]]) 818 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4 819 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 820 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[A]], align 4 821 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 822 // CHECK3-NEXT: [[CALL3:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP4]]) 823 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[A]], align 4 824 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 825 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[A]], align 4 826 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[A]], align 4 827 // CHECK3-NEXT: ret i32 [[TMP6]] 828 // 829 // 830 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 831 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 832 // CHECK3-NEXT: entry: 833 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 834 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 835 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 836 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 837 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 838 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 839 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 840 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 841 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 842 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 843 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i32, align 4 844 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x ptr], align 4 845 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x ptr], align 4 846 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x ptr], align 4 847 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 848 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 849 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 850 // CHECK3-NEXT: store i32 1, ptr [[B]], align 4 851 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 852 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3 853 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8 854 // CHECK3-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR_]], align 1 855 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[B]], align 4 856 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[B_CASTED]], align 4 857 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_CASTED]], align 4 858 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 859 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1 860 // CHECK3-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL]] to i8 861 // CHECK3-NEXT: store i8 [[FROMBOOL2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 862 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 863 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0 864 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 865 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP5]], align 4 866 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 867 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP6]], align 4 868 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 869 // CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 4 870 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 871 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 872 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 873 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4 874 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 875 // CHECK3-NEXT: store ptr null, ptr [[TMP10]], align 4 876 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 877 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP11]], align 4 878 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 879 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP12]], align 4 880 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 881 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 882 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 883 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 884 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 885 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP16]] to i1 886 // CHECK3-NEXT: [[TMP17:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1 887 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 888 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 889 // CHECK3-NEXT: store i32 1, ptr [[TMP18]], align 4 890 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 891 // CHECK3-NEXT: store i32 3, ptr [[TMP19]], align 4 892 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 893 // CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP20]], align 4 894 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 895 // CHECK3-NEXT: store ptr [[TMP15]], ptr [[TMP21]], align 4 896 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 897 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP22]], align 4 898 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 899 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP23]], align 4 900 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 901 // CHECK3-NEXT: store ptr null, ptr [[TMP24]], align 4 902 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 903 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4 904 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 905 // CHECK3-NEXT: store i64 0, ptr [[TMP26]], align 8 906 // CHECK3-NEXT: [[TMP27:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 1, i32 [[TMP17]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, ptr [[KERNEL_ARGS]]) 907 // CHECK3-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 908 // CHECK3-NEXT: br i1 [[TMP28]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 909 // CHECK3: omp_offload.failed: 910 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(ptr [[THIS1]], i32 [[TMP2]], i32 [[TMP4]]) #[[ATTR3:[0-9]+]] 911 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 912 // CHECK3: omp_offload.cont: 913 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[N_ADDR]], align 4 914 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP29]], 5 915 // CHECK3-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[CMP5]] to i8 916 // CHECK3-NEXT: store i8 [[FROMBOOL6]], ptr [[DOTCAPTURE_EXPR_4]], align 1 917 // CHECK3-NEXT: [[TMP30:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 918 // CHECK3-NEXT: [[TOBOOL7:%.*]] = trunc i8 [[TMP30]] to i1 919 // CHECK3-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[TOBOOL7]] to i8 920 // CHECK3-NEXT: store i8 [[FROMBOOL9]], ptr [[DOTCAPTURE_EXPR__CASTED8]], align 1 921 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED8]], align 4 922 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[N_ADDR]], align 4 923 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP32]], 4 924 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 925 // CHECK3: omp_if.then: 926 // CHECK3-NEXT: [[A11:%.*]] = getelementptr inbounds [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 927 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 928 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP33]], align 4 929 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 930 // CHECK3-NEXT: store ptr [[A11]], ptr [[TMP34]], align 4 931 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0 932 // CHECK3-NEXT: store ptr null, ptr [[TMP35]], align 4 933 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 934 // CHECK3-NEXT: store i32 [[TMP31]], ptr [[TMP36]], align 4 935 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 936 // CHECK3-NEXT: store i32 [[TMP31]], ptr [[TMP37]], align 4 937 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1 938 // CHECK3-NEXT: store ptr null, ptr [[TMP38]], align 4 939 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 940 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 941 // CHECK3-NEXT: [[TMP41:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 942 // CHECK3-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP41]] to i1 943 // CHECK3-NEXT: [[TMP42:%.*]] = select i1 [[TOBOOL15]], i32 0, i32 1 944 // CHECK3-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 945 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 0 946 // CHECK3-NEXT: store i32 1, ptr [[TMP43]], align 4 947 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 1 948 // CHECK3-NEXT: store i32 2, ptr [[TMP44]], align 4 949 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 2 950 // CHECK3-NEXT: store ptr [[TMP39]], ptr [[TMP45]], align 4 951 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 3 952 // CHECK3-NEXT: store ptr [[TMP40]], ptr [[TMP46]], align 4 953 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 4 954 // CHECK3-NEXT: store ptr @.offload_sizes.2, ptr [[TMP47]], align 4 955 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 5 956 // CHECK3-NEXT: store ptr @.offload_maptypes.3, ptr [[TMP48]], align 4 957 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 6 958 // CHECK3-NEXT: store ptr null, ptr [[TMP49]], align 4 959 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 7 960 // CHECK3-NEXT: store ptr null, ptr [[TMP50]], align 4 961 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 8 962 // CHECK3-NEXT: store i64 0, ptr [[TMP51]], align 8 963 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP42]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, ptr [[KERNEL_ARGS16]]) 964 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 965 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 966 // CHECK3: omp_offload.failed17: 967 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i32 [[TMP31]]) #[[ATTR3]] 968 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT18]] 969 // CHECK3: omp_offload.cont18: 970 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 971 // CHECK3: omp_if.else: 972 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i32 [[TMP31]]) #[[ATTR3]] 973 // CHECK3-NEXT: br label [[OMP_IF_END]] 974 // CHECK3: omp_if.end: 975 // CHECK3-NEXT: [[A19:%.*]] = getelementptr inbounds [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 976 // CHECK3-NEXT: [[TMP54:%.*]] = load double, ptr [[A19]], align 4 977 // CHECK3-NEXT: [[CONV:%.*]] = fptosi double [[TMP54]] to i32 978 // CHECK3-NEXT: ret i32 [[CONV]] 979 // 980 // 981 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici 982 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 983 // CHECK3-NEXT: entry: 984 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 985 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 986 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 987 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 988 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 989 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 990 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 991 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 992 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1 993 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8 994 // CHECK3-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR_]], align 1 995 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 996 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 997 // CHECK3-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TOBOOL]] to i8 998 // CHECK3-NEXT: store i8 [[FROMBOOL1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 999 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 1000 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1001 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP3]] to i1 1002 // CHECK3-NEXT: br i1 [[TOBOOL2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1003 // CHECK3: omp_if.then: 1004 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1005 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP4]], align 4 1006 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1007 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP5]], align 4 1008 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1009 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4 1010 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1011 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1012 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1013 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP9]] to i1 1014 // CHECK3-NEXT: [[TMP10:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1 1015 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1016 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1017 // CHECK3-NEXT: store i32 1, ptr [[TMP11]], align 4 1018 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1019 // CHECK3-NEXT: store i32 1, ptr [[TMP12]], align 4 1020 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1021 // CHECK3-NEXT: store ptr [[TMP7]], ptr [[TMP13]], align 4 1022 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1023 // CHECK3-NEXT: store ptr [[TMP8]], ptr [[TMP14]], align 4 1024 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1025 // CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP15]], align 4 1026 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1027 // CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP16]], align 4 1028 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1029 // CHECK3-NEXT: store ptr null, ptr [[TMP17]], align 4 1030 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1031 // CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 4 1032 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1033 // CHECK3-NEXT: store i64 0, ptr [[TMP19]], align 8 1034 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP10]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, ptr [[KERNEL_ARGS]]) 1035 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1036 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1037 // CHECK3: omp_offload.failed: 1038 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]] 1039 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1040 // CHECK3: omp_offload.cont: 1041 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1042 // CHECK3: omp_if.else: 1043 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR3]] 1044 // CHECK3-NEXT: br label [[OMP_IF_END]] 1045 // CHECK3: omp_if.end: 1046 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[N_ADDR]], align 4 1047 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP22]], 2 1048 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2 1049 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE9:%.*]] 1050 // CHECK3: omp_if.then5: 1051 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1052 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0 1053 // CHECK3-NEXT: store i32 1, ptr [[TMP23]], align 4 1054 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1 1055 // CHECK3-NEXT: store i32 0, ptr [[TMP24]], align 4 1056 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2 1057 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4 1058 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3 1059 // CHECK3-NEXT: store ptr null, ptr [[TMP26]], align 4 1060 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4 1061 // CHECK3-NEXT: store ptr null, ptr [[TMP27]], align 4 1062 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5 1063 // CHECK3-NEXT: store ptr null, ptr [[TMP28]], align 4 1064 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6 1065 // CHECK3-NEXT: store ptr null, ptr [[TMP29]], align 4 1066 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7 1067 // CHECK3-NEXT: store ptr null, ptr [[TMP30]], align 4 1068 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8 1069 // CHECK3-NEXT: store i64 0, ptr [[TMP31]], align 8 1070 // CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, ptr [[KERNEL_ARGS6]]) 1071 // CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 1072 // CHECK3-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1073 // CHECK3: omp_offload.failed7: 1074 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]] 1075 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1076 // CHECK3: omp_offload.cont8: 1077 // CHECK3-NEXT: br label [[OMP_IF_END10:%.*]] 1078 // CHECK3: omp_if.else9: 1079 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR3]] 1080 // CHECK3-NEXT: br label [[OMP_IF_END10]] 1081 // CHECK3: omp_if.end10: 1082 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[N_ADDR]], align 4 1083 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP34]], 1 1084 // CHECK3-NEXT: ret i32 [[ADD]] 1085 // 1086 // 1087 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 1088 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 1089 // CHECK3-NEXT: entry: 1090 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1091 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1092 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1093 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1094 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1095 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1096 // CHECK3-NEXT: [[B:%.*]] = alloca i16, align 2 1097 // CHECK3-NEXT: [[A_CASTED1:%.*]] = alloca i32, align 4 1098 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1099 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x ptr], align 4 1100 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x ptr], align 4 1101 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x ptr], align 4 1102 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1103 // CHECK3-NEXT: store i32 0, ptr [[A]], align 4 1104 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4 1105 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1106 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4 1107 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1108 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4 1109 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1110 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4 1111 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1112 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 1113 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1114 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1115 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1116 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1117 // CHECK3-NEXT: store i32 1, ptr [[TMP7]], align 4 1118 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1119 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 1120 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1121 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 1122 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1123 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4 1124 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1125 // CHECK3-NEXT: store ptr @.offload_sizes.9, ptr [[TMP11]], align 4 1126 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1127 // CHECK3-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP12]], align 4 1128 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1129 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 1130 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1131 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4 1132 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1133 // CHECK3-NEXT: store i64 0, ptr [[TMP15]], align 8 1134 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, ptr [[KERNEL_ARGS]]) 1135 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1136 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1137 // CHECK3: omp_offload.failed: 1138 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i32 [[TMP1]]) #[[ATTR3]] 1139 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1140 // CHECK3: omp_offload.cont: 1141 // CHECK3-NEXT: store i16 1, ptr [[B]], align 2 1142 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[A]], align 4 1143 // CHECK3-NEXT: store i32 [[TMP18]], ptr [[A_CASTED1]], align 4 1144 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[A_CASTED1]], align 4 1145 // CHECK3-NEXT: [[TMP20:%.*]] = load i16, ptr [[B]], align 2 1146 // CHECK3-NEXT: store i16 [[TMP20]], ptr [[B_CASTED]], align 2 1147 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[B_CASTED]], align 4 1148 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 1149 // CHECK3-NEXT: store i32 [[TMP19]], ptr [[TMP22]], align 4 1150 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 1151 // CHECK3-NEXT: store i32 [[TMP19]], ptr [[TMP23]], align 4 1152 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0 1153 // CHECK3-NEXT: store ptr null, ptr [[TMP24]], align 4 1154 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1 1155 // CHECK3-NEXT: store i32 [[TMP21]], ptr [[TMP25]], align 4 1156 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 1 1157 // CHECK3-NEXT: store i32 [[TMP21]], ptr [[TMP26]], align 4 1158 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1 1159 // CHECK3-NEXT: store ptr null, ptr [[TMP27]], align 4 1160 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 1161 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 1162 // CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1163 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 1164 // CHECK3-NEXT: store i32 1, ptr [[TMP30]], align 4 1165 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 1166 // CHECK3-NEXT: store i32 2, ptr [[TMP31]], align 4 1167 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 1168 // CHECK3-NEXT: store ptr [[TMP28]], ptr [[TMP32]], align 4 1169 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 1170 // CHECK3-NEXT: store ptr [[TMP29]], ptr [[TMP33]], align 4 1171 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 1172 // CHECK3-NEXT: store ptr @.offload_sizes.12, ptr [[TMP34]], align 4 1173 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 1174 // CHECK3-NEXT: store ptr @.offload_maptypes.13, ptr [[TMP35]], align 4 1175 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 1176 // CHECK3-NEXT: store ptr null, ptr [[TMP36]], align 4 1177 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 1178 // CHECK3-NEXT: store ptr null, ptr [[TMP37]], align 4 1179 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 1180 // CHECK3-NEXT: store i64 0, ptr [[TMP38]], align 8 1181 // CHECK3-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, ptr [[KERNEL_ARGS5]]) 1182 // CHECK3-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 1183 // CHECK3-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 1184 // CHECK3: omp_offload.failed6: 1185 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP19]], i32 [[TMP21]]) #[[ATTR3]] 1186 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]] 1187 // CHECK3: omp_offload.cont7: 1188 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, ptr [[A]], align 4 1189 // CHECK3-NEXT: ret i32 [[TMP41]] 1190 // 1191 // 1192 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1193 // CHECK3-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 1194 // CHECK3-NEXT: entry: 1195 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1196 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1197 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1198 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1199 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1200 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1201 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1202 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1203 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1204 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1205 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1206 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 1207 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 1208 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1209 // CHECK3-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1210 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1 1211 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1212 // CHECK3: omp_if.then: 1213 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined., ptr [[TMP1]], i32 [[TMP3]]) 1214 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1215 // CHECK3: omp_if.else: 1216 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1217 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1218 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1219 // CHECK3-NEXT: call void @.omp_outlined.(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i32 [[TMP3]]) #[[ATTR3]] 1220 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1221 // CHECK3-NEXT: br label [[OMP_IF_END]] 1222 // CHECK3: omp_if.end: 1223 // CHECK3-NEXT: ret void 1224 // 1225 // 1226 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1227 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]]) #[[ATTR2:[0-9]+]] { 1228 // CHECK3-NEXT: entry: 1229 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1230 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1231 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1232 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1233 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1234 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1235 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1236 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1237 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1238 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 1239 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1240 // CHECK3-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1241 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1242 // CHECK3-NEXT: store double [[ADD]], ptr [[A]], align 4 1243 // CHECK3-NEXT: ret void 1244 // 1245 // 1246 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1247 // CHECK3-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1248 // CHECK3-NEXT: entry: 1249 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1250 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1251 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1252 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1253 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1254 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1255 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1256 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1257 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1258 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 1259 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1260 // CHECK3: omp_if.then: 1261 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @.omp_outlined..1, ptr [[TMP1]]) 1262 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1263 // CHECK3: omp_if.else: 1264 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1265 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1266 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1267 // CHECK3-NEXT: call void @.omp_outlined..1(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR3]] 1268 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1269 // CHECK3-NEXT: br label [[OMP_IF_END]] 1270 // CHECK3: omp_if.end: 1271 // CHECK3-NEXT: ret void 1272 // 1273 // 1274 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1275 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] { 1276 // CHECK3-NEXT: entry: 1277 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1278 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1279 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1280 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1281 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1282 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1283 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1284 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1285 // CHECK3-NEXT: store double 2.500000e+00, ptr [[A]], align 4 1286 // CHECK3-NEXT: ret void 1287 // 1288 // 1289 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1290 // CHECK3-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1291 // CHECK3-NEXT: entry: 1292 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1293 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1294 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1295 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1296 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1297 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1298 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 1299 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1300 // CHECK3: omp_if.then: 1301 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined..4) 1302 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1303 // CHECK3: omp_if.else: 1304 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1305 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1306 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1307 // CHECK3-NEXT: call void @.omp_outlined..4(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR3]] 1308 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1309 // CHECK3-NEXT: br label [[OMP_IF_END]] 1310 // CHECK3: omp_if.end: 1311 // CHECK3-NEXT: ret void 1312 // 1313 // 1314 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1315 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 1316 // CHECK3-NEXT: entry: 1317 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1318 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1319 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1320 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1321 // CHECK3-NEXT: ret void 1322 // 1323 // 1324 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1325 // CHECK3-SAME: () #[[ATTR1]] { 1326 // CHECK3-NEXT: entry: 1327 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined..7) 1328 // CHECK3-NEXT: ret void 1329 // 1330 // 1331 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 1332 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 1333 // CHECK3-NEXT: entry: 1334 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1335 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1336 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1337 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1338 // CHECK3-NEXT: ret void 1339 // 1340 // 1341 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 1342 // CHECK3-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] { 1343 // CHECK3-NEXT: entry: 1344 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1345 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1346 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1347 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1348 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1349 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1350 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1351 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 1352 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_CASTED]], align 4 1353 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1354 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1355 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1356 // CHECK3-NEXT: call void @.omp_outlined..8(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR3]] 1357 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1358 // CHECK3-NEXT: ret void 1359 // 1360 // 1361 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8 1362 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR2]] { 1363 // CHECK3-NEXT: entry: 1364 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1365 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1366 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1367 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1368 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1369 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1370 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1371 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1372 // CHECK3-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1373 // CHECK3-NEXT: ret void 1374 // 1375 // 1376 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1377 // CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1378 // CHECK3-NEXT: entry: 1379 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1380 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1381 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1382 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1383 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1384 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1385 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1386 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1387 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4 1388 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 1389 // CHECK3-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 1390 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1391 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined..11, i32 [[TMP1]], i32 [[TMP3]]) 1392 // CHECK3-NEXT: ret void 1393 // 1394 // 1395 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 1396 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR2]] { 1397 // CHECK3-NEXT: entry: 1398 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1399 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1400 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1401 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1402 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1403 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1404 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1405 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1406 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 1407 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 1408 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1409 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 1410 // CHECK3-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1411 // CHECK3-NEXT: ret void 1412 // 1413 // 1414 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1415 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1416 // CHECK3-NEXT: entry: 1417 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1418 // CHECK3-NEXT: ret void 1419 // 1420 // 1421 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1422 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { 1423 // CHECK9-NEXT: entry: 1424 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1425 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1426 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1427 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]]) 1428 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1429 // CHECK9-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1430 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 1431 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1432 // CHECK9: omp_if.then: 1433 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined.) 1434 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 1435 // CHECK9: omp_if.else: 1436 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1437 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1438 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1439 // CHECK9-NEXT: call void @.omp_outlined.(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]] 1440 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1441 // CHECK9-NEXT: br label [[OMP_IF_END]] 1442 // CHECK9: omp_if.end: 1443 // CHECK9-NEXT: ret void 1444 // 1445 // 1446 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1447 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 1448 // CHECK9-NEXT: entry: 1449 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1450 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1451 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1452 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1453 // CHECK9-NEXT: ret void 1454 // 1455 // 1456 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1457 // CHECK9-SAME: () #[[ATTR0]] { 1458 // CHECK9-NEXT: entry: 1459 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined..1) 1460 // CHECK9-NEXT: ret void 1461 // 1462 // 1463 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1464 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1465 // CHECK9-NEXT: entry: 1466 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1467 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1468 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1469 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1470 // CHECK9-NEXT: ret void 1471 // 1472 // 1473 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1474 // CHECK9-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1475 // CHECK9-NEXT: entry: 1476 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1477 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1478 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1479 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1480 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1481 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1482 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1483 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1484 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1485 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1486 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1487 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 1488 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 1489 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 1490 // CHECK9-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1491 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1 1492 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1493 // CHECK9: omp_if.then: 1494 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined..2, ptr [[TMP1]], i64 [[TMP3]]) 1495 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 1496 // CHECK9: omp_if.else: 1497 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1498 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1499 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1500 // CHECK9-NEXT: call void @.omp_outlined..2(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i64 [[TMP3]]) #[[ATTR2]] 1501 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1502 // CHECK9-NEXT: br label [[OMP_IF_END]] 1503 // CHECK9: omp_if.end: 1504 // CHECK9-NEXT: ret void 1505 // 1506 // 1507 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 1508 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 1509 // CHECK9-NEXT: entry: 1510 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1511 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1512 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1513 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1514 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1515 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1516 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1517 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1518 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1519 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 1520 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1521 // CHECK9-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1522 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1523 // CHECK9-NEXT: store double [[ADD]], ptr [[A]], align 8 1524 // CHECK9-NEXT: ret void 1525 // 1526 // 1527 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1528 // CHECK9-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1529 // CHECK9-NEXT: entry: 1530 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1531 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1532 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1533 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1534 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1535 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1536 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1537 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1538 // CHECK9-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1539 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 1540 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1541 // CHECK9: omp_if.then: 1542 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @.omp_outlined..3, ptr [[TMP1]]) 1543 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 1544 // CHECK9: omp_if.else: 1545 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1546 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1547 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1548 // CHECK9-NEXT: call void @.omp_outlined..3(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR2]] 1549 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1550 // CHECK9-NEXT: br label [[OMP_IF_END]] 1551 // CHECK9: omp_if.end: 1552 // CHECK9-NEXT: ret void 1553 // 1554 // 1555 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 1556 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1557 // CHECK9-NEXT: entry: 1558 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1559 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1560 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1561 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1562 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1563 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1564 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1565 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1566 // CHECK9-NEXT: store double 2.500000e+00, ptr [[A]], align 8 1567 // CHECK9-NEXT: ret void 1568 // 1569 // 1570 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 1571 // CHECK9-SAME: (i64 noundef [[A:%.*]]) #[[ATTR0]] { 1572 // CHECK9-NEXT: entry: 1573 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1574 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1575 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1576 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1577 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1578 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1579 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1580 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 1581 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[A_CASTED]], align 8 1582 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1583 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1584 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1585 // CHECK9-NEXT: call void @.omp_outlined..4(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR2]] 1586 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1587 // CHECK9-NEXT: ret void 1588 // 1589 // 1590 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1591 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] { 1592 // CHECK9-NEXT: entry: 1593 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1594 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1595 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1596 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1597 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1598 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1599 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1600 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1601 // CHECK9-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1602 // CHECK9-NEXT: ret void 1603 // 1604 // 1605 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1606 // CHECK9-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { 1607 // CHECK9-NEXT: entry: 1608 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1609 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1610 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1611 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1612 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1613 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1614 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1615 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1616 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8 1617 // CHECK9-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 1618 // CHECK9-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 1619 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 1620 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined..5, i64 [[TMP1]], i64 [[TMP3]]) 1621 // CHECK9-NEXT: ret void 1622 // 1623 // 1624 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 1625 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 1626 // CHECK9-NEXT: entry: 1627 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1628 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1629 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1630 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1631 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1632 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1633 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1634 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1635 // CHECK9-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 1636 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 1637 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1638 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 1639 // CHECK9-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1640 // CHECK9-NEXT: ret void 1641 // 1642 // 1643 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1644 // CHECK11-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { 1645 // CHECK11-NEXT: entry: 1646 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1647 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1648 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1649 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]]) 1650 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1651 // CHECK11-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1652 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 1653 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1654 // CHECK11: omp_if.then: 1655 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined.) 1656 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 1657 // CHECK11: omp_if.else: 1658 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1659 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1660 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1661 // CHECK11-NEXT: call void @.omp_outlined.(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2:[0-9]+]] 1662 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1663 // CHECK11-NEXT: br label [[OMP_IF_END]] 1664 // CHECK11: omp_if.end: 1665 // CHECK11-NEXT: ret void 1666 // 1667 // 1668 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 1669 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] { 1670 // CHECK11-NEXT: entry: 1671 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1672 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1673 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1674 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1675 // CHECK11-NEXT: ret void 1676 // 1677 // 1678 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1679 // CHECK11-SAME: () #[[ATTR0]] { 1680 // CHECK11-NEXT: entry: 1681 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @.omp_outlined..1) 1682 // CHECK11-NEXT: ret void 1683 // 1684 // 1685 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1686 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1687 // CHECK11-NEXT: entry: 1688 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1689 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1690 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1691 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1692 // CHECK11-NEXT: ret void 1693 // 1694 // 1695 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1696 // CHECK11-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1697 // CHECK11-NEXT: entry: 1698 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1699 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1700 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1701 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1702 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1703 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1704 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1705 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1706 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1707 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1708 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1709 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 1710 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 1711 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1712 // CHECK11-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1713 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP4]] to i1 1714 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1715 // CHECK11: omp_if.then: 1716 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined..2, ptr [[TMP1]], i32 [[TMP3]]) 1717 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 1718 // CHECK11: omp_if.else: 1719 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1720 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1721 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1722 // CHECK11-NEXT: call void @.omp_outlined..2(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i32 [[TMP3]]) #[[ATTR2]] 1723 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1724 // CHECK11-NEXT: br label [[OMP_IF_END]] 1725 // CHECK11: omp_if.end: 1726 // CHECK11-NEXT: ret void 1727 // 1728 // 1729 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2 1730 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1731 // CHECK11-NEXT: entry: 1732 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1733 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1734 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1735 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1736 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1737 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1738 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1739 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1740 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1741 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 1742 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1743 // CHECK11-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1744 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1745 // CHECK11-NEXT: store double [[ADD]], ptr [[A]], align 4 1746 // CHECK11-NEXT: ret void 1747 // 1748 // 1749 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1750 // CHECK11-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1751 // CHECK11-NEXT: entry: 1752 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1753 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1754 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1755 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1756 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1757 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1758 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1759 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1760 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1761 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 1762 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1763 // CHECK11: omp_if.then: 1764 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @.omp_outlined..3, ptr [[TMP1]]) 1765 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 1766 // CHECK11: omp_if.else: 1767 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1768 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1769 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1770 // CHECK11-NEXT: call void @.omp_outlined..3(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR2]] 1771 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1772 // CHECK11-NEXT: br label [[OMP_IF_END]] 1773 // CHECK11: omp_if.end: 1774 // CHECK11-NEXT: ret void 1775 // 1776 // 1777 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3 1778 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1779 // CHECK11-NEXT: entry: 1780 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1781 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1782 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1783 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1784 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1785 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1786 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1787 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1788 // CHECK11-NEXT: store double 2.500000e+00, ptr [[A]], align 4 1789 // CHECK11-NEXT: ret void 1790 // 1791 // 1792 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 1793 // CHECK11-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { 1794 // CHECK11-NEXT: entry: 1795 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1796 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1797 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1798 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1799 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1800 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1801 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1802 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 1803 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_CASTED]], align 4 1804 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1805 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1806 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1807 // CHECK11-NEXT: call void @.omp_outlined..4(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR2]] 1808 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1809 // CHECK11-NEXT: ret void 1810 // 1811 // 1812 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 1813 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { 1814 // CHECK11-NEXT: entry: 1815 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1816 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1817 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1818 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1819 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1820 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1821 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1822 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1823 // CHECK11-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1824 // CHECK11-NEXT: ret void 1825 // 1826 // 1827 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1828 // CHECK11-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] { 1829 // CHECK11-NEXT: entry: 1830 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1831 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1832 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1833 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1834 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1835 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1836 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1837 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1838 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4 1839 // CHECK11-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 1840 // CHECK11-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 1841 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1842 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @.omp_outlined..5, i32 [[TMP1]], i32 [[TMP3]]) 1843 // CHECK11-NEXT: ret void 1844 // 1845 // 1846 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5 1847 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1848 // CHECK11-NEXT: entry: 1849 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1850 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1851 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1852 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1853 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1854 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1855 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1856 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1857 // CHECK11-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 1858 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 1859 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1860 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 1861 // CHECK11-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1862 // CHECK11-NEXT: ret void 1863 // 1864