1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host codegen. 3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 9 10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 16 17 // Test target codegen - host bc file has to be created first. 18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 26 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 35 36 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 37 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 38 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 39 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 40 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 41 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 42 43 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 44 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 45 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 46 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 47 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 49 50 // Test target codegen - host bc file has to be created first. 51 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 52 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9 53 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 54 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 55 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11 57 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 58 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 59 60 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc 61 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 62 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s 63 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 64 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc 65 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 66 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s 67 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 68 69 // expected-no-diagnostics 70 #ifndef HEADER 71 #define HEADER 72 73 74 75 76 // We have 6 target regions 77 78 79 80 // Check target registration is registered as a Ctor. 81 82 83 template<typename tx> 84 tx ftemplate(int n) { 85 tx a = 0; 86 87 #pragma omp target parallel if(parallel: 0) 88 { 89 a += 1; 90 } 91 92 short b = 1; 93 #pragma omp target parallel if(parallel: 1) 94 { 95 a += b; 96 } 97 98 return a; 99 } 100 101 static 102 int fstatic(int n) { 103 104 #pragma omp target parallel if(n>1) 105 { 106 } 107 108 #pragma omp target parallel if(target: n-2>2) 109 { 110 } 111 112 return n+1; 113 } 114 115 struct S1 { 116 double a; 117 118 int r1(int n){ 119 int b = 1; 120 121 #pragma omp target parallel if(parallel: n>3) 122 { 123 this->a = (double)b + 1.5; 124 } 125 126 #pragma omp target parallel if(target: n>4) if(parallel: n>5) 127 { 128 this->a = 2.5; 129 } 130 131 return (int)a; 132 } 133 }; 134 135 int bar(int n){ 136 int a = 0; 137 138 S1 S; 139 a += S.r1(n); 140 141 a += fstatic(n); 142 143 a += ftemplate<int>(n); 144 145 return a; 146 } 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 // Check that the offloading functions are emitted and that the parallel function 162 // is appropriately guarded. 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 #endif 185 // CHECK1-LABEL: define {{[^@]+}}@_Z3bari 186 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { 187 // CHECK1-NEXT: entry: 188 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 8 191 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 192 // CHECK1-NEXT: store i32 0, ptr [[A]], align 4 193 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 194 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2S12r1Ei(ptr noundef nonnull align 8 dereferenceable(8) [[S]], i32 noundef signext [[TMP0]]) 195 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4 196 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 197 // CHECK1-NEXT: store i32 [[ADD]], ptr [[A]], align 4 198 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 199 // CHECK1-NEXT: [[CALL1:%.*]] = call noundef signext i32 @_ZL7fstatici(i32 noundef signext [[TMP2]]) 200 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4 201 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 202 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[A]], align 4 203 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 204 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_i(i32 noundef signext [[TMP4]]) 205 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[A]], align 4 206 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 207 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[A]], align 4 208 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[A]], align 4 209 // CHECK1-NEXT: ret i32 [[TMP6]] 210 // 211 // 212 // CHECK1-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 213 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 214 // CHECK1-NEXT: entry: 215 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 216 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 219 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 220 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 221 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8 222 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8 223 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8 224 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 225 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 226 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i64, align 8 227 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x ptr], align 8 228 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x ptr], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x ptr], align 8 230 // CHECK1-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 231 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 232 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 233 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 234 // CHECK1-NEXT: store i32 1, ptr [[B]], align 4 235 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 236 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3 237 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8 238 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 239 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[B]], align 4 240 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[B_CASTED]], align 4 241 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[B_CASTED]], align 8 242 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 243 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1 244 // CHECK1-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8 245 // CHECK1-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 246 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 247 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0 248 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 249 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP5]], align 8 250 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 251 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP6]], align 8 252 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 253 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 254 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 255 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 256 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 257 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8 258 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 259 // CHECK1-NEXT: store ptr null, ptr [[TMP10]], align 8 260 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 261 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP11]], align 8 262 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 263 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[TMP12]], align 8 264 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 265 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 266 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 267 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 268 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 269 // CHECK1-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP16]] to i1 270 // CHECK1-NEXT: [[TMP17:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 271 // CHECK1-NEXT: [[TMP18:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP17]], 0 272 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 273 // CHECK1-NEXT: store i32 3, ptr [[TMP19]], align 4 274 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 275 // CHECK1-NEXT: store i32 3, ptr [[TMP20]], align 4 276 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 277 // CHECK1-NEXT: store ptr [[TMP14]], ptr [[TMP21]], align 8 278 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 279 // CHECK1-NEXT: store ptr [[TMP15]], ptr [[TMP22]], align 8 280 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 281 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP23]], align 8 282 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 283 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP24]], align 8 284 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 285 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8 286 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 287 // CHECK1-NEXT: store ptr null, ptr [[TMP26]], align 8 288 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 289 // CHECK1-NEXT: store i64 0, ptr [[TMP27]], align 8 290 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 291 // CHECK1-NEXT: store i64 0, ptr [[TMP28]], align 8 292 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 293 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4 294 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 295 // CHECK1-NEXT: store [3 x i32] [[TMP18]], ptr [[TMP30]], align 4 296 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 297 // CHECK1-NEXT: store i32 0, ptr [[TMP31]], align 4 298 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 1, i32 [[TMP17]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, ptr [[KERNEL_ARGS]]) 299 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 300 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 301 // CHECK1: omp_offload.failed: 302 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(ptr [[THIS1]], i64 [[TMP2]], i64 [[TMP4]]) #[[ATTR2:[0-9]+]] 303 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 304 // CHECK1: omp_offload.cont: 305 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[N_ADDR]], align 4 306 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP34]], 5 307 // CHECK1-NEXT: [[STOREDV6:%.*]] = zext i1 [[CMP5]] to i8 308 // CHECK1-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR_4]], align 1 309 // CHECK1-NEXT: [[TMP35:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 310 // CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP35]] to i1 311 // CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[LOADEDV7]] to i8 312 // CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[DOTCAPTURE_EXPR__CASTED8]], align 1 313 // CHECK1-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED8]], align 8 314 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[N_ADDR]], align 4 315 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], 4 316 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 317 // CHECK1: omp_if.then: 318 // CHECK1-NEXT: [[A11:%.*]] = getelementptr inbounds nuw [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 319 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 320 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP38]], align 8 321 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 322 // CHECK1-NEXT: store ptr [[A11]], ptr [[TMP39]], align 8 323 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 0 324 // CHECK1-NEXT: store ptr null, ptr [[TMP40]], align 8 325 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 326 // CHECK1-NEXT: store i64 [[TMP36]], ptr [[TMP41]], align 8 327 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 328 // CHECK1-NEXT: store i64 [[TMP36]], ptr [[TMP42]], align 8 329 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 1 330 // CHECK1-NEXT: store ptr null, ptr [[TMP43]], align 8 331 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 332 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 333 // CHECK1-NEXT: [[TMP46:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 334 // CHECK1-NEXT: [[LOADEDV15:%.*]] = trunc i8 [[TMP46]] to i1 335 // CHECK1-NEXT: [[TMP47:%.*]] = select i1 [[LOADEDV15]], i32 0, i32 1 336 // CHECK1-NEXT: [[TMP48:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP47]], 0 337 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 0 338 // CHECK1-NEXT: store i32 3, ptr [[TMP49]], align 4 339 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 1 340 // CHECK1-NEXT: store i32 2, ptr [[TMP50]], align 4 341 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 2 342 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP51]], align 8 343 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 3 344 // CHECK1-NEXT: store ptr [[TMP45]], ptr [[TMP52]], align 8 345 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 4 346 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP53]], align 8 347 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 5 348 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP54]], align 8 349 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 6 350 // CHECK1-NEXT: store ptr null, ptr [[TMP55]], align 8 351 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 7 352 // CHECK1-NEXT: store ptr null, ptr [[TMP56]], align 8 353 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 8 354 // CHECK1-NEXT: store i64 0, ptr [[TMP57]], align 8 355 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 9 356 // CHECK1-NEXT: store i64 0, ptr [[TMP58]], align 8 357 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 10 358 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP59]], align 4 359 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 11 360 // CHECK1-NEXT: store [3 x i32] [[TMP48]], ptr [[TMP60]], align 4 361 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 12 362 // CHECK1-NEXT: store i32 0, ptr [[TMP61]], align 4 363 // CHECK1-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP47]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, ptr [[KERNEL_ARGS16]]) 364 // CHECK1-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0 365 // CHECK1-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 366 // CHECK1: omp_offload.failed17: 367 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i64 [[TMP36]]) #[[ATTR2]] 368 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT18]] 369 // CHECK1: omp_offload.cont18: 370 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 371 // CHECK1: omp_if.else: 372 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i64 [[TMP36]]) #[[ATTR2]] 373 // CHECK1-NEXT: br label [[OMP_IF_END]] 374 // CHECK1: omp_if.end: 375 // CHECK1-NEXT: [[A19:%.*]] = getelementptr inbounds nuw [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 376 // CHECK1-NEXT: [[TMP64:%.*]] = load double, ptr [[A19]], align 8 377 // CHECK1-NEXT: [[CONV:%.*]] = fptosi double [[TMP64]] to i32 378 // CHECK1-NEXT: ret i32 [[CONV]] 379 // 380 // 381 // CHECK1-LABEL: define {{[^@]+}}@_ZL7fstatici 382 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] { 383 // CHECK1-NEXT: entry: 384 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 385 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 386 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 387 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 388 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 389 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 390 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 391 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 392 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 393 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 394 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1 395 // CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8 396 // CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 397 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 398 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1 399 // CHECK1-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 400 // CHECK1-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 401 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8 402 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 403 // CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP3]] to i1 404 // CHECK1-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 405 // CHECK1: omp_if.then: 406 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 407 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP4]], align 8 408 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 409 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[TMP5]], align 8 410 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 411 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 412 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 413 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 414 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 415 // CHECK1-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP9]] to i1 416 // CHECK1-NEXT: [[TMP10:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 417 // CHECK1-NEXT: [[TMP11:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP10]], 0 418 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 419 // CHECK1-NEXT: store i32 3, ptr [[TMP12]], align 4 420 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 421 // CHECK1-NEXT: store i32 1, ptr [[TMP13]], align 4 422 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 423 // CHECK1-NEXT: store ptr [[TMP7]], ptr [[TMP14]], align 8 424 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 425 // CHECK1-NEXT: store ptr [[TMP8]], ptr [[TMP15]], align 8 426 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 427 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP16]], align 8 428 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 429 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP17]], align 8 430 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 431 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 432 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 433 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 434 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 435 // CHECK1-NEXT: store i64 0, ptr [[TMP20]], align 8 436 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 437 // CHECK1-NEXT: store i64 0, ptr [[TMP21]], align 8 438 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 439 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP22]], align 4 440 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 441 // CHECK1-NEXT: store [3 x i32] [[TMP11]], ptr [[TMP23]], align 4 442 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 443 // CHECK1-NEXT: store i32 0, ptr [[TMP24]], align 4 444 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP10]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, ptr [[KERNEL_ARGS]]) 445 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 446 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 447 // CHECK1: omp_offload.failed: 448 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR2]] 449 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 450 // CHECK1: omp_offload.cont: 451 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 452 // CHECK1: omp_if.else: 453 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i64 [[TMP2]]) #[[ATTR2]] 454 // CHECK1-NEXT: br label [[OMP_IF_END]] 455 // CHECK1: omp_if.end: 456 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[N_ADDR]], align 4 457 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 2 458 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2 459 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE9:%.*]] 460 // CHECK1: omp_if.then5: 461 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0 462 // CHECK1-NEXT: store i32 3, ptr [[TMP28]], align 4 463 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1 464 // CHECK1-NEXT: store i32 0, ptr [[TMP29]], align 4 465 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2 466 // CHECK1-NEXT: store ptr null, ptr [[TMP30]], align 8 467 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3 468 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 469 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4 470 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8 471 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5 472 // CHECK1-NEXT: store ptr null, ptr [[TMP33]], align 8 473 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6 474 // CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8 475 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7 476 // CHECK1-NEXT: store ptr null, ptr [[TMP35]], align 8 477 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8 478 // CHECK1-NEXT: store i64 0, ptr [[TMP36]], align 8 479 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9 480 // CHECK1-NEXT: store i64 0, ptr [[TMP37]], align 8 481 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10 482 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP38]], align 4 483 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11 484 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 485 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12 486 // CHECK1-NEXT: store i32 0, ptr [[TMP40]], align 4 487 // CHECK1-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, ptr [[KERNEL_ARGS6]]) 488 // CHECK1-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 489 // CHECK1-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 490 // CHECK1: omp_offload.failed7: 491 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR2]] 492 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 493 // CHECK1: omp_offload.cont8: 494 // CHECK1-NEXT: br label [[OMP_IF_END10:%.*]] 495 // CHECK1: omp_if.else9: 496 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR2]] 497 // CHECK1-NEXT: br label [[OMP_IF_END10]] 498 // CHECK1: omp_if.end10: 499 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[N_ADDR]], align 4 500 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP43]], 1 501 // CHECK1-NEXT: ret i32 [[ADD]] 502 // 503 // 504 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 505 // CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0]] comdat { 506 // CHECK1-NEXT: entry: 507 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 508 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 509 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 510 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 511 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 512 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 513 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 514 // CHECK1-NEXT: [[B:%.*]] = alloca i16, align 2 515 // CHECK1-NEXT: [[A_CASTED1:%.*]] = alloca i64, align 8 516 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 517 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x ptr], align 8 518 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x ptr], align 8 519 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x ptr], align 8 520 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 521 // CHECK1-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 522 // CHECK1-NEXT: store i32 0, ptr [[A]], align 4 523 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4 524 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 525 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8 526 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 527 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8 528 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 529 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8 530 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 531 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 532 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 533 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 534 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 535 // CHECK1-NEXT: store i32 3, ptr [[TMP7]], align 4 536 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 537 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4 538 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 539 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8 540 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 541 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8 542 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 543 // CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP11]], align 8 544 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 545 // CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP12]], align 8 546 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 547 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8 548 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 549 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8 550 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 551 // CHECK1-NEXT: store i64 0, ptr [[TMP15]], align 8 552 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 553 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8 554 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 555 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP17]], align 4 556 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 557 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4 558 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 559 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4 560 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, ptr [[KERNEL_ARGS]]) 561 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 562 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 563 // CHECK1: omp_offload.failed: 564 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i64 [[TMP1]]) #[[ATTR2]] 565 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 566 // CHECK1: omp_offload.cont: 567 // CHECK1-NEXT: store i16 1, ptr [[B]], align 2 568 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[A]], align 4 569 // CHECK1-NEXT: store i32 [[TMP22]], ptr [[A_CASTED1]], align 4 570 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, ptr [[A_CASTED1]], align 8 571 // CHECK1-NEXT: [[TMP24:%.*]] = load i16, ptr [[B]], align 2 572 // CHECK1-NEXT: store i16 [[TMP24]], ptr [[B_CASTED]], align 2 573 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, ptr [[B_CASTED]], align 8 574 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 575 // CHECK1-NEXT: store i64 [[TMP23]], ptr [[TMP26]], align 8 576 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 577 // CHECK1-NEXT: store i64 [[TMP23]], ptr [[TMP27]], align 8 578 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i64 0, i64 0 579 // CHECK1-NEXT: store ptr null, ptr [[TMP28]], align 8 580 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1 581 // CHECK1-NEXT: store i64 [[TMP25]], ptr [[TMP29]], align 8 582 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 1 583 // CHECK1-NEXT: store i64 [[TMP25]], ptr [[TMP30]], align 8 584 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i64 0, i64 1 585 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8 586 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 587 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 588 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 589 // CHECK1-NEXT: store i32 3, ptr [[TMP34]], align 4 590 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 591 // CHECK1-NEXT: store i32 2, ptr [[TMP35]], align 4 592 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 593 // CHECK1-NEXT: store ptr [[TMP32]], ptr [[TMP36]], align 8 594 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 595 // CHECK1-NEXT: store ptr [[TMP33]], ptr [[TMP37]], align 8 596 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 597 // CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP38]], align 8 598 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 599 // CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP39]], align 8 600 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 601 // CHECK1-NEXT: store ptr null, ptr [[TMP40]], align 8 602 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 603 // CHECK1-NEXT: store ptr null, ptr [[TMP41]], align 8 604 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 605 // CHECK1-NEXT: store i64 0, ptr [[TMP42]], align 8 606 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 607 // CHECK1-NEXT: store i64 0, ptr [[TMP43]], align 8 608 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 609 // CHECK1-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP44]], align 4 610 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 611 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4 612 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 613 // CHECK1-NEXT: store i32 0, ptr [[TMP46]], align 4 614 // CHECK1-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, ptr [[KERNEL_ARGS5]]) 615 // CHECK1-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 616 // CHECK1-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 617 // CHECK1: omp_offload.failed6: 618 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]] 619 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]] 620 // CHECK1: omp_offload.cont7: 621 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, ptr [[A]], align 4 622 // CHECK1-NEXT: ret i32 [[TMP49]] 623 // 624 // 625 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 626 // CHECK1-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 627 // CHECK1-NEXT: entry: 628 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 629 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 630 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 631 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 632 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 633 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 635 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 636 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 637 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 638 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 639 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 640 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 641 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 642 // CHECK1-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 643 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1 644 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 645 // CHECK1: omp_if.then: 646 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[TMP1]], i64 [[TMP3]]) 647 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 648 // CHECK1: omp_if.else: 649 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 650 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 651 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 652 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i64 [[TMP3]]) #[[ATTR2]] 653 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 654 // CHECK1-NEXT: br label [[OMP_IF_END]] 655 // CHECK1: omp_if.end: 656 // CHECK1-NEXT: ret void 657 // 658 // 659 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined 660 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 661 // CHECK1-NEXT: entry: 662 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 663 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 664 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 665 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 666 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 667 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 668 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 669 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 670 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 671 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 672 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 673 // CHECK1-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 674 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 675 // CHECK1-NEXT: store double [[ADD]], ptr [[A]], align 8 676 // CHECK1-NEXT: ret void 677 // 678 // 679 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 680 // CHECK1-SAME: (ptr noundef [[THIS:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 681 // CHECK1-NEXT: entry: 682 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 683 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 684 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 685 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 686 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 687 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 688 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 689 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 690 // CHECK1-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 691 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 692 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 693 // CHECK1: omp_if.then: 694 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[TMP1]]) 695 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 696 // CHECK1: omp_if.else: 697 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 698 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 699 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 700 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR2]] 701 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 702 // CHECK1-NEXT: br label [[OMP_IF_END]] 703 // CHECK1: omp_if.end: 704 // CHECK1-NEXT: ret void 705 // 706 // 707 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined 708 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 709 // CHECK1-NEXT: entry: 710 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 711 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 712 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 713 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 714 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 715 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 716 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 717 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 718 // CHECK1-NEXT: store double 2.500000e+00, ptr [[A]], align 8 719 // CHECK1-NEXT: ret void 720 // 721 // 722 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 723 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 724 // CHECK1-NEXT: entry: 725 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 726 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 727 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 728 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 729 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 730 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 731 // CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1 732 // CHECK1-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 733 // CHECK1: omp_if.then: 734 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined) 735 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 736 // CHECK1: omp_if.else: 737 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 738 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 739 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 740 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2]] 741 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 742 // CHECK1-NEXT: br label [[OMP_IF_END]] 743 // CHECK1: omp_if.end: 744 // CHECK1-NEXT: ret void 745 // 746 // 747 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined 748 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 749 // CHECK1-NEXT: entry: 750 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 751 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 752 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 753 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 754 // CHECK1-NEXT: ret void 755 // 756 // 757 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 758 // CHECK1-SAME: () #[[ATTR1]] { 759 // CHECK1-NEXT: entry: 760 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined) 761 // CHECK1-NEXT: ret void 762 // 763 // 764 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined 765 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 766 // CHECK1-NEXT: entry: 767 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 768 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 769 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 770 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 771 // CHECK1-NEXT: ret void 772 // 773 // 774 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 775 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] { 776 // CHECK1-NEXT: entry: 777 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 778 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 779 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 780 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 781 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 782 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 783 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 784 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 785 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[A_CASTED]], align 8 786 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 787 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 788 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 789 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR2]] 790 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 791 // CHECK1-NEXT: ret void 792 // 793 // 794 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined 795 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] { 796 // CHECK1-NEXT: entry: 797 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 798 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 799 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 800 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 801 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 802 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 803 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 804 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 805 // CHECK1-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 806 // CHECK1-NEXT: ret void 807 // 808 // 809 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 810 // CHECK1-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 811 // CHECK1-NEXT: entry: 812 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 813 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 814 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 815 // CHECK1-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 816 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 817 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 818 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 819 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 820 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8 821 // CHECK1-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 822 // CHECK1-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 823 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 824 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined, i64 [[TMP1]], i64 [[TMP3]]) 825 // CHECK1-NEXT: ret void 826 // 827 // 828 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined 829 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR1]] { 830 // CHECK1-NEXT: entry: 831 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 832 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 833 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 834 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 835 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 836 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 837 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 838 // CHECK1-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 839 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 840 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 841 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 842 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 843 // CHECK1-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 844 // CHECK1-NEXT: ret void 845 // 846 // 847 // CHECK3-LABEL: define {{[^@]+}}@_Z3bari 848 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] { 849 // CHECK3-NEXT: entry: 850 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 851 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 852 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S1:%.*]], align 4 853 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 854 // CHECK3-NEXT: store i32 0, ptr [[A]], align 4 855 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 856 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2S12r1Ei(ptr noundef nonnull align 4 dereferenceable(8) [[S]], i32 noundef [[TMP0]]) 857 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4 858 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]] 859 // CHECK3-NEXT: store i32 [[ADD]], ptr [[A]], align 4 860 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4 861 // CHECK3-NEXT: [[CALL1:%.*]] = call noundef i32 @_ZL7fstatici(i32 noundef [[TMP2]]) 862 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[A]], align 4 863 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[CALL1]] 864 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[A]], align 4 865 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4 866 // CHECK3-NEXT: [[CALL3:%.*]] = call noundef i32 @_Z9ftemplateIiET_i(i32 noundef [[TMP4]]) 867 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[A]], align 4 868 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP5]], [[CALL3]] 869 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[A]], align 4 870 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[A]], align 4 871 // CHECK3-NEXT: ret i32 [[TMP6]] 872 // 873 // 874 // CHECK3-LABEL: define {{[^@]+}}@_ZN2S12r1Ei 875 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]], i32 noundef [[N:%.*]]) #[[ATTR0]] comdat align 2 { 876 // CHECK3-NEXT: entry: 877 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 878 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 879 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 880 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 881 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 882 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 883 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4 884 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4 885 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4 886 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 887 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 888 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED8:%.*]] = alloca i32, align 4 889 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x ptr], align 4 890 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x ptr], align 4 891 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x ptr], align 4 892 // CHECK3-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 893 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 894 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 895 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 896 // CHECK3-NEXT: store i32 1, ptr [[B]], align 4 897 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 898 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 3 899 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8 900 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 901 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[B]], align 4 902 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[B_CASTED]], align 4 903 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_CASTED]], align 4 904 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 905 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP3]] to i1 906 // CHECK3-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8 907 // CHECK3-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 908 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 909 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[THIS1]], i32 0, i32 0 910 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 911 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP5]], align 4 912 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 913 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP6]], align 4 914 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 915 // CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 4 916 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 917 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 918 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 919 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4 920 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 921 // CHECK3-NEXT: store ptr null, ptr [[TMP10]], align 4 922 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 923 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP11]], align 4 924 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 925 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[TMP12]], align 4 926 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 927 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 928 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 929 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 930 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 931 // CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP16]] to i1 932 // CHECK3-NEXT: [[TMP17:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 933 // CHECK3-NEXT: [[TMP18:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP17]], 0 934 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 935 // CHECK3-NEXT: store i32 3, ptr [[TMP19]], align 4 936 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 937 // CHECK3-NEXT: store i32 3, ptr [[TMP20]], align 4 938 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 939 // CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP21]], align 4 940 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 941 // CHECK3-NEXT: store ptr [[TMP15]], ptr [[TMP22]], align 4 942 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 943 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP23]], align 4 944 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 945 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP24]], align 4 946 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 947 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4 948 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 949 // CHECK3-NEXT: store ptr null, ptr [[TMP26]], align 4 950 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 951 // CHECK3-NEXT: store i64 0, ptr [[TMP27]], align 8 952 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 953 // CHECK3-NEXT: store i64 0, ptr [[TMP28]], align 8 954 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 955 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4 956 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 957 // CHECK3-NEXT: store [3 x i32] [[TMP18]], ptr [[TMP30]], align 4 958 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 959 // CHECK3-NEXT: store i32 0, ptr [[TMP31]], align 4 960 // CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 1, i32 [[TMP17]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.region_id, ptr [[KERNEL_ARGS]]) 961 // CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 962 // CHECK3-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 963 // CHECK3: omp_offload.failed: 964 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121(ptr [[THIS1]], i32 [[TMP2]], i32 [[TMP4]]) #[[ATTR2:[0-9]+]] 965 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 966 // CHECK3: omp_offload.cont: 967 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[N_ADDR]], align 4 968 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP34]], 5 969 // CHECK3-NEXT: [[STOREDV6:%.*]] = zext i1 [[CMP5]] to i8 970 // CHECK3-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR_4]], align 1 971 // CHECK3-NEXT: [[TMP35:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 972 // CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP35]] to i1 973 // CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[LOADEDV7]] to i8 974 // CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[DOTCAPTURE_EXPR__CASTED8]], align 1 975 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED8]], align 4 976 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[N_ADDR]], align 4 977 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], 4 978 // CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 979 // CHECK3: omp_if.then: 980 // CHECK3-NEXT: [[A11:%.*]] = getelementptr inbounds nuw [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 981 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 982 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP38]], align 4 983 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 984 // CHECK3-NEXT: store ptr [[A11]], ptr [[TMP39]], align 4 985 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 0 986 // CHECK3-NEXT: store ptr null, ptr [[TMP40]], align 4 987 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1 988 // CHECK3-NEXT: store i32 [[TMP36]], ptr [[TMP41]], align 4 989 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 1 990 // CHECK3-NEXT: store i32 [[TMP36]], ptr [[TMP42]], align 4 991 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS14]], i32 0, i32 1 992 // CHECK3-NEXT: store ptr null, ptr [[TMP43]], align 4 993 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0 994 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS13]], i32 0, i32 0 995 // CHECK3-NEXT: [[TMP46:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_4]], align 1 996 // CHECK3-NEXT: [[LOADEDV15:%.*]] = trunc i8 [[TMP46]] to i1 997 // CHECK3-NEXT: [[TMP47:%.*]] = select i1 [[LOADEDV15]], i32 0, i32 1 998 // CHECK3-NEXT: [[TMP48:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP47]], 0 999 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 0 1000 // CHECK3-NEXT: store i32 3, ptr [[TMP49]], align 4 1001 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 1 1002 // CHECK3-NEXT: store i32 2, ptr [[TMP50]], align 4 1003 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 2 1004 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP51]], align 4 1005 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 3 1006 // CHECK3-NEXT: store ptr [[TMP45]], ptr [[TMP52]], align 4 1007 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 4 1008 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP53]], align 4 1009 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 5 1010 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP54]], align 4 1011 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 6 1012 // CHECK3-NEXT: store ptr null, ptr [[TMP55]], align 4 1013 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 7 1014 // CHECK3-NEXT: store ptr null, ptr [[TMP56]], align 4 1015 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 8 1016 // CHECK3-NEXT: store i64 0, ptr [[TMP57]], align 8 1017 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 9 1018 // CHECK3-NEXT: store i64 0, ptr [[TMP58]], align 8 1019 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 10 1020 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP59]], align 4 1021 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 11 1022 // CHECK3-NEXT: store [3 x i32] [[TMP48]], ptr [[TMP60]], align 4 1023 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS16]], i32 0, i32 12 1024 // CHECK3-NEXT: store i32 0, ptr [[TMP61]], align 4 1025 // CHECK3-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP47]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.region_id, ptr [[KERNEL_ARGS16]]) 1026 // CHECK3-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0 1027 // CHECK3-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 1028 // CHECK3: omp_offload.failed17: 1029 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i32 [[TMP36]]) #[[ATTR2]] 1030 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT18]] 1031 // CHECK3: omp_offload.cont18: 1032 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1033 // CHECK3: omp_if.else: 1034 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126(ptr [[THIS1]], i32 [[TMP36]]) #[[ATTR2]] 1035 // CHECK3-NEXT: br label [[OMP_IF_END]] 1036 // CHECK3: omp_if.end: 1037 // CHECK3-NEXT: [[A19:%.*]] = getelementptr inbounds nuw [[STRUCT_S1]], ptr [[THIS1]], i32 0, i32 0 1038 // CHECK3-NEXT: [[TMP64:%.*]] = load double, ptr [[A19]], align 4 1039 // CHECK3-NEXT: [[CONV:%.*]] = fptosi double [[TMP64]] to i32 1040 // CHECK3-NEXT: ret i32 [[CONV]] 1041 // 1042 // 1043 // CHECK3-LABEL: define {{[^@]+}}@_ZL7fstatici 1044 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] { 1045 // CHECK3-NEXT: entry: 1046 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1047 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1048 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 1049 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1050 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1051 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1052 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1053 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1054 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1055 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4 1056 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], 1 1057 // CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[CMP]] to i8 1058 // CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1 1059 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1060 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1 1061 // CHECK3-NEXT: [[STOREDV1:%.*]] = zext i1 [[LOADEDV]] to i8 1062 // CHECK3-NEXT: store i8 [[STOREDV1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1 1063 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4 1064 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1065 // CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP3]] to i1 1066 // CHECK3-NEXT: br i1 [[LOADEDV2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1067 // CHECK3: omp_if.then: 1068 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1069 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP4]], align 4 1070 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1071 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[TMP5]], align 4 1072 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1073 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4 1074 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1075 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1076 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1 1077 // CHECK3-NEXT: [[LOADEDV3:%.*]] = trunc i8 [[TMP9]] to i1 1078 // CHECK3-NEXT: [[TMP10:%.*]] = select i1 [[LOADEDV3]], i32 0, i32 1 1079 // CHECK3-NEXT: [[TMP11:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP10]], 0 1080 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1081 // CHECK3-NEXT: store i32 3, ptr [[TMP12]], align 4 1082 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1083 // CHECK3-NEXT: store i32 1, ptr [[TMP13]], align 4 1084 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1085 // CHECK3-NEXT: store ptr [[TMP7]], ptr [[TMP14]], align 4 1086 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1087 // CHECK3-NEXT: store ptr [[TMP8]], ptr [[TMP15]], align 4 1088 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1089 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP16]], align 4 1090 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1091 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP17]], align 4 1092 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1093 // CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 4 1094 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1095 // CHECK3-NEXT: store ptr null, ptr [[TMP19]], align 4 1096 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1097 // CHECK3-NEXT: store i64 0, ptr [[TMP20]], align 8 1098 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1099 // CHECK3-NEXT: store i64 0, ptr [[TMP21]], align 8 1100 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1101 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP22]], align 4 1102 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1103 // CHECK3-NEXT: store [3 x i32] [[TMP11]], ptr [[TMP23]], align 4 1104 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1105 // CHECK3-NEXT: store i32 0, ptr [[TMP24]], align 4 1106 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 [[TMP10]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.region_id, ptr [[KERNEL_ARGS]]) 1107 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1108 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1109 // CHECK3: omp_offload.failed: 1110 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR2]] 1111 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1112 // CHECK3: omp_offload.cont: 1113 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1114 // CHECK3: omp_if.else: 1115 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104(i32 [[TMP2]]) #[[ATTR2]] 1116 // CHECK3-NEXT: br label [[OMP_IF_END]] 1117 // CHECK3: omp_if.end: 1118 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[N_ADDR]], align 4 1119 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 2 1120 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[SUB]], 2 1121 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE9:%.*]] 1122 // CHECK3: omp_if.then5: 1123 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0 1124 // CHECK3-NEXT: store i32 3, ptr [[TMP28]], align 4 1125 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1 1126 // CHECK3-NEXT: store i32 0, ptr [[TMP29]], align 4 1127 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2 1128 // CHECK3-NEXT: store ptr null, ptr [[TMP30]], align 4 1129 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3 1130 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 1131 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4 1132 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4 1133 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5 1134 // CHECK3-NEXT: store ptr null, ptr [[TMP33]], align 4 1135 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6 1136 // CHECK3-NEXT: store ptr null, ptr [[TMP34]], align 4 1137 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7 1138 // CHECK3-NEXT: store ptr null, ptr [[TMP35]], align 4 1139 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8 1140 // CHECK3-NEXT: store i64 0, ptr [[TMP36]], align 8 1141 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9 1142 // CHECK3-NEXT: store i64 0, ptr [[TMP37]], align 8 1143 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10 1144 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP38]], align 4 1145 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11 1146 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 4 1147 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12 1148 // CHECK3-NEXT: store i32 0, ptr [[TMP40]], align 4 1149 // CHECK3-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.region_id, ptr [[KERNEL_ARGS6]]) 1150 // CHECK3-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 1151 // CHECK3-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1152 // CHECK3: omp_offload.failed7: 1153 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR2]] 1154 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1155 // CHECK3: omp_offload.cont8: 1156 // CHECK3-NEXT: br label [[OMP_IF_END10:%.*]] 1157 // CHECK3: omp_if.else9: 1158 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108() #[[ATTR2]] 1159 // CHECK3-NEXT: br label [[OMP_IF_END10]] 1160 // CHECK3: omp_if.end10: 1161 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, ptr [[N_ADDR]], align 4 1162 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP43]], 1 1163 // CHECK3-NEXT: ret i32 [[ADD]] 1164 // 1165 // 1166 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_i 1167 // CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0]] comdat { 1168 // CHECK3-NEXT: entry: 1169 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1170 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1171 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1172 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1173 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1174 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1175 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1176 // CHECK3-NEXT: [[B:%.*]] = alloca i16, align 2 1177 // CHECK3-NEXT: [[A_CASTED1:%.*]] = alloca i32, align 4 1178 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1179 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [2 x ptr], align 4 1180 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [2 x ptr], align 4 1181 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [2 x ptr], align 4 1182 // CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1183 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1184 // CHECK3-NEXT: store i32 0, ptr [[A]], align 4 1185 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4 1186 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1187 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4 1188 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1189 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4 1190 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1191 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4 1192 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1193 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4 1194 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1195 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1196 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1197 // CHECK3-NEXT: store i32 3, ptr [[TMP7]], align 4 1198 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1199 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4 1200 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1201 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4 1202 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1203 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4 1204 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1205 // CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP11]], align 4 1206 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1207 // CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP12]], align 4 1208 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1209 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4 1210 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1211 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4 1212 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1213 // CHECK3-NEXT: store i64 0, ptr [[TMP15]], align 8 1214 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1215 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8 1216 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1217 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP17]], align 4 1218 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1219 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4 1220 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1221 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4 1222 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.region_id, ptr [[KERNEL_ARGS]]) 1223 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1224 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1225 // CHECK3: omp_offload.failed: 1226 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87(i32 [[TMP1]]) #[[ATTR2]] 1227 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1228 // CHECK3: omp_offload.cont: 1229 // CHECK3-NEXT: store i16 1, ptr [[B]], align 2 1230 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[A]], align 4 1231 // CHECK3-NEXT: store i32 [[TMP22]], ptr [[A_CASTED1]], align 4 1232 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[A_CASTED1]], align 4 1233 // CHECK3-NEXT: [[TMP24:%.*]] = load i16, ptr [[B]], align 2 1234 // CHECK3-NEXT: store i16 [[TMP24]], ptr [[B_CASTED]], align 2 1235 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[B_CASTED]], align 4 1236 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 1237 // CHECK3-NEXT: store i32 [[TMP23]], ptr [[TMP26]], align 4 1238 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 1239 // CHECK3-NEXT: store i32 [[TMP23]], ptr [[TMP27]], align 4 1240 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0 1241 // CHECK3-NEXT: store ptr null, ptr [[TMP28]], align 4 1242 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1 1243 // CHECK3-NEXT: store i32 [[TMP25]], ptr [[TMP29]], align 4 1244 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 1 1245 // CHECK3-NEXT: store i32 [[TMP25]], ptr [[TMP30]], align 4 1246 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1 1247 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4 1248 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0 1249 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS3]], i32 0, i32 0 1250 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0 1251 // CHECK3-NEXT: store i32 3, ptr [[TMP34]], align 4 1252 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1 1253 // CHECK3-NEXT: store i32 2, ptr [[TMP35]], align 4 1254 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2 1255 // CHECK3-NEXT: store ptr [[TMP32]], ptr [[TMP36]], align 4 1256 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3 1257 // CHECK3-NEXT: store ptr [[TMP33]], ptr [[TMP37]], align 4 1258 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4 1259 // CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP38]], align 4 1260 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5 1261 // CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP39]], align 4 1262 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6 1263 // CHECK3-NEXT: store ptr null, ptr [[TMP40]], align 4 1264 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7 1265 // CHECK3-NEXT: store ptr null, ptr [[TMP41]], align 4 1266 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8 1267 // CHECK3-NEXT: store i64 0, ptr [[TMP42]], align 8 1268 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9 1269 // CHECK3-NEXT: store i64 0, ptr [[TMP43]], align 8 1270 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10 1271 // CHECK3-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP44]], align 4 1272 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11 1273 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4 1274 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12 1275 // CHECK3-NEXT: store i32 0, ptr [[TMP46]], align 4 1276 // CHECK3-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.region_id, ptr [[KERNEL_ARGS5]]) 1277 // CHECK3-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 1278 // CHECK3-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]] 1279 // CHECK3: omp_offload.failed6: 1280 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93(i32 [[TMP23]], i32 [[TMP25]]) #[[ATTR2]] 1281 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]] 1282 // CHECK3: omp_offload.cont7: 1283 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, ptr [[A]], align 4 1284 // CHECK3-NEXT: ret i32 [[TMP49]] 1285 // 1286 // 1287 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1288 // CHECK3-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 1289 // CHECK3-NEXT: entry: 1290 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1291 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1292 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1293 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1294 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1295 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1296 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1297 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1298 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1299 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1300 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1301 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 1302 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 1303 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1304 // CHECK3-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1305 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1 1306 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1307 // CHECK3: omp_if.then: 1308 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[TMP1]], i32 [[TMP3]]) 1309 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1310 // CHECK3: omp_if.else: 1311 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1312 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1313 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1314 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i32 [[TMP3]]) #[[ATTR2]] 1315 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1316 // CHECK3-NEXT: br label [[OMP_IF_END]] 1317 // CHECK3: omp_if.end: 1318 // CHECK3-NEXT: ret void 1319 // 1320 // 1321 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined 1322 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1323 // CHECK3-NEXT: entry: 1324 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1325 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1326 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1327 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1328 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1329 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1330 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1331 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1332 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1333 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 1334 // CHECK3-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1335 // CHECK3-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1336 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1337 // CHECK3-NEXT: store double [[ADD]], ptr [[A]], align 4 1338 // CHECK3-NEXT: ret void 1339 // 1340 // 1341 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1342 // CHECK3-SAME: (ptr noundef [[THIS:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1343 // CHECK3-NEXT: entry: 1344 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1345 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1346 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1347 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1348 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1349 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1350 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1351 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1352 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1353 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 1354 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1355 // CHECK3: omp_if.then: 1356 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[TMP1]]) 1357 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1358 // CHECK3: omp_if.else: 1359 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1360 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1361 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1362 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR2]] 1363 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1364 // CHECK3-NEXT: br label [[OMP_IF_END]] 1365 // CHECK3: omp_if.end: 1366 // CHECK3-NEXT: ret void 1367 // 1368 // 1369 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined 1370 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 1371 // CHECK3-NEXT: entry: 1372 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1373 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1374 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1375 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1376 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1377 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1378 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1379 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1380 // CHECK3-NEXT: store double 2.500000e+00, ptr [[A]], align 4 1381 // CHECK3-NEXT: ret void 1382 // 1383 // 1384 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1385 // CHECK3-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1386 // CHECK3-NEXT: entry: 1387 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1388 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1389 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1390 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1391 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1392 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1393 // CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1 1394 // CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1395 // CHECK3: omp_if.then: 1396 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined) 1397 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1398 // CHECK3: omp_if.else: 1399 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1400 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1401 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1402 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR2]] 1403 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1404 // CHECK3-NEXT: br label [[OMP_IF_END]] 1405 // CHECK3: omp_if.end: 1406 // CHECK3-NEXT: ret void 1407 // 1408 // 1409 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined 1410 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1411 // CHECK3-NEXT: entry: 1412 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1413 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1414 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1415 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1416 // CHECK3-NEXT: ret void 1417 // 1418 // 1419 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1420 // CHECK3-SAME: () #[[ATTR1]] { 1421 // CHECK3-NEXT: entry: 1422 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined) 1423 // CHECK3-NEXT: ret void 1424 // 1425 // 1426 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined 1427 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1428 // CHECK3-NEXT: entry: 1429 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1430 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1431 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1432 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1433 // CHECK3-NEXT: ret void 1434 // 1435 // 1436 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 1437 // CHECK3-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] { 1438 // CHECK3-NEXT: entry: 1439 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1440 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1441 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1442 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1443 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1444 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1445 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1446 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 1447 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_CASTED]], align 4 1448 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1449 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1450 // CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1451 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR2]] 1452 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1453 // CHECK3-NEXT: ret void 1454 // 1455 // 1456 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined 1457 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { 1458 // CHECK3-NEXT: entry: 1459 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1460 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1461 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1462 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1463 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1464 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1465 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1466 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1467 // CHECK3-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1468 // CHECK3-NEXT: ret void 1469 // 1470 // 1471 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1472 // CHECK3-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1473 // CHECK3-NEXT: entry: 1474 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1475 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1476 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1477 // CHECK3-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1478 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1479 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1480 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1481 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1482 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4 1483 // CHECK3-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 1484 // CHECK3-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 1485 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1486 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined, i32 [[TMP1]], i32 [[TMP3]]) 1487 // CHECK3-NEXT: ret void 1488 // 1489 // 1490 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined 1491 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1]] { 1492 // CHECK3-NEXT: entry: 1493 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1494 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1495 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1496 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1497 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1498 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1499 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1500 // CHECK3-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1501 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 1502 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 1503 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1504 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 1505 // CHECK3-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1506 // CHECK3-NEXT: ret void 1507 // 1508 // 1509 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1510 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { 1511 // CHECK9-NEXT: entry: 1512 // CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1513 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1514 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1515 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1516 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]]) 1517 // CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1518 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1519 // CHECK9-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1520 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1 1521 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1522 // CHECK9: omp_if.then: 1523 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined) 1524 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 1525 // CHECK9: omp_if.else: 1526 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1527 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1528 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1529 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR1:[0-9]+]] 1530 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1531 // CHECK9-NEXT: br label [[OMP_IF_END]] 1532 // CHECK9: omp_if.end: 1533 // CHECK9-NEXT: ret void 1534 // 1535 // 1536 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined 1537 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1538 // CHECK9-NEXT: entry: 1539 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1540 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1541 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1542 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1543 // CHECK9-NEXT: ret void 1544 // 1545 // 1546 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1547 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] { 1548 // CHECK9-NEXT: entry: 1549 // CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1550 // CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1551 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined) 1552 // CHECK9-NEXT: ret void 1553 // 1554 // 1555 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined 1556 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1557 // CHECK9-NEXT: entry: 1558 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1559 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1560 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1561 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1562 // CHECK9-NEXT: ret void 1563 // 1564 // 1565 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1566 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1567 // CHECK9-NEXT: entry: 1568 // CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1569 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1570 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1571 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1572 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1573 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1574 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1575 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1576 // CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1577 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1578 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1579 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1580 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1581 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 1582 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 1583 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 1584 // CHECK9-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1585 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1 1586 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1587 // CHECK9: omp_if.then: 1588 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[TMP1]], i64 [[TMP3]]) 1589 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 1590 // CHECK9: omp_if.else: 1591 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1592 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1593 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1594 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i64 [[TMP3]]) #[[ATTR1]] 1595 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1596 // CHECK9-NEXT: br label [[OMP_IF_END]] 1597 // CHECK9: omp_if.end: 1598 // CHECK9-NEXT: ret void 1599 // 1600 // 1601 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined 1602 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { 1603 // CHECK9-NEXT: entry: 1604 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1605 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1606 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1607 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1608 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1609 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1610 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1611 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1612 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1613 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 1614 // CHECK9-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1615 // CHECK9-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1616 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1617 // CHECK9-NEXT: store double [[ADD]], ptr [[A]], align 8 1618 // CHECK9-NEXT: ret void 1619 // 1620 // 1621 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1622 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[THIS:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1623 // CHECK9-NEXT: entry: 1624 // CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1625 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1626 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1627 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1628 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1629 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1630 // CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1631 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1632 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 1633 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1634 // CHECK9-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1635 // CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 1636 // CHECK9-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1637 // CHECK9: omp_if.then: 1638 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[TMP1]]) 1639 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]] 1640 // CHECK9: omp_if.else: 1641 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1642 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1643 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1644 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR1]] 1645 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1646 // CHECK9-NEXT: br label [[OMP_IF_END]] 1647 // CHECK9: omp_if.end: 1648 // CHECK9-NEXT: ret void 1649 // 1650 // 1651 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined 1652 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR0]] { 1653 // CHECK9-NEXT: entry: 1654 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1655 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1656 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1657 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1658 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1659 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1660 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1661 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1662 // CHECK9-NEXT: store double 2.500000e+00, ptr [[A]], align 8 1663 // CHECK9-NEXT: ret void 1664 // 1665 // 1666 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 1667 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] { 1668 // CHECK9-NEXT: entry: 1669 // CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1670 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1671 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1672 // CHECK9-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1673 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1674 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1675 // CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1676 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1677 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1678 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 1679 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[A_CASTED]], align 8 1680 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1681 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1682 // CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1683 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP2]]) #[[ATTR1]] 1684 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1685 // CHECK9-NEXT: ret void 1686 // 1687 // 1688 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined 1689 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] { 1690 // CHECK9-NEXT: entry: 1691 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1692 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1693 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1694 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1695 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1696 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1697 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1698 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1699 // CHECK9-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1700 // CHECK9-NEXT: ret void 1701 // 1702 // 1703 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1704 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { 1705 // CHECK9-NEXT: entry: 1706 // CHECK9-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8 1707 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1708 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1709 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1710 // CHECK9-NEXT: [[B_CASTED:%.*]] = alloca i64, align 8 1711 // CHECK9-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8 1712 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1713 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1714 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1715 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1716 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8 1717 // CHECK9-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 1718 // CHECK9-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 1719 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[B_CASTED]], align 8 1720 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined, i64 [[TMP1]], i64 [[TMP3]]) 1721 // CHECK9-NEXT: ret void 1722 // 1723 // 1724 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined 1725 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) #[[ATTR0]] { 1726 // CHECK9-NEXT: entry: 1727 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1728 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1729 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1730 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8 1731 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1732 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1733 // CHECK9-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8 1734 // CHECK9-NEXT: store i64 [[B]], ptr [[B_ADDR]], align 8 1735 // CHECK9-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 1736 // CHECK9-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 1737 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1738 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 1739 // CHECK9-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1740 // CHECK9-NEXT: ret void 1741 // 1742 // 1743 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104 1744 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { 1745 // CHECK11-NEXT: entry: 1746 // CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 1747 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1748 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1749 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1750 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]]) 1751 // CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 1752 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1753 // CHECK11-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1754 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1 1755 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1756 // CHECK11: omp_if.then: 1757 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined) 1758 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 1759 // CHECK11: omp_if.else: 1760 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1761 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1762 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1763 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]]) #[[ATTR1:[0-9]+]] 1764 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1765 // CHECK11-NEXT: br label [[OMP_IF_END]] 1766 // CHECK11: omp_if.end: 1767 // CHECK11-NEXT: ret void 1768 // 1769 // 1770 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l104.omp_outlined 1771 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1772 // CHECK11-NEXT: entry: 1773 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1774 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1775 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1776 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1777 // CHECK11-NEXT: ret void 1778 // 1779 // 1780 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108 1781 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0]] { 1782 // CHECK11-NEXT: entry: 1783 // CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 1784 // CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 1785 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined) 1786 // CHECK11-NEXT: ret void 1787 // 1788 // 1789 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZL7fstatici_l108.omp_outlined 1790 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { 1791 // CHECK11-NEXT: entry: 1792 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1793 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1794 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1795 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1796 // CHECK11-NEXT: ret void 1797 // 1798 // 1799 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121 1800 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1801 // CHECK11-NEXT: entry: 1802 // CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 1803 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1804 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1805 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1806 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1807 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1808 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1809 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1810 // CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 1811 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1812 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1813 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1814 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1815 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 4 1816 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[B_CASTED]], align 4 1817 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1818 // CHECK11-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1819 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP4]] to i1 1820 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1821 // CHECK11: omp_if.then: 1822 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined, ptr [[TMP1]], i32 [[TMP3]]) 1823 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 1824 // CHECK11: omp_if.else: 1825 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1826 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1827 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1828 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]], i32 [[TMP3]]) #[[ATTR1]] 1829 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1830 // CHECK11-NEXT: br label [[OMP_IF_END]] 1831 // CHECK11: omp_if.end: 1832 // CHECK11-NEXT: ret void 1833 // 1834 // 1835 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l121.omp_outlined 1836 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] { 1837 // CHECK11-NEXT: entry: 1838 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1839 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1840 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1841 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1842 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1843 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1844 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1845 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1846 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1847 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4 1848 // CHECK11-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double 1849 // CHECK11-NEXT: [[ADD:%.*]] = fadd double [[CONV]], 1.500000e+00 1850 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1851 // CHECK11-NEXT: store double [[ADD]], ptr [[A]], align 4 1852 // CHECK11-NEXT: ret void 1853 // 1854 // 1855 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126 1856 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[THIS:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0]] { 1857 // CHECK11-NEXT: entry: 1858 // CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 1859 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1860 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 1861 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1862 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1863 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1864 // CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 1865 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1866 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 1867 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1868 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1 1869 // CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1 1870 // CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1871 // CHECK11: omp_if.then: 1872 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined, ptr [[TMP1]]) 1873 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]] 1874 // CHECK11: omp_if.else: 1875 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1876 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1877 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1878 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[TMP1]]) #[[ATTR1]] 1879 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1880 // CHECK11-NEXT: br label [[OMP_IF_END]] 1881 // CHECK11: omp_if.end: 1882 // CHECK11-NEXT: ret void 1883 // 1884 // 1885 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2S12r1Ei_l126.omp_outlined 1886 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR0]] { 1887 // CHECK11-NEXT: entry: 1888 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1889 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1890 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1891 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1892 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1893 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1894 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1895 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S1:%.*]], ptr [[TMP0]], i32 0, i32 0 1896 // CHECK11-NEXT: store double 2.500000e+00, ptr [[A]], align 4 1897 // CHECK11-NEXT: ret void 1898 // 1899 // 1900 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87 1901 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] { 1902 // CHECK11-NEXT: entry: 1903 // CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 1904 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1905 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1906 // CHECK11-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1907 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1908 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]]) 1909 // CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 1910 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1911 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1912 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[A_CASTED]], align 4 1913 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[A_CASTED]], align 4 1914 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1915 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4 1916 // CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1917 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], i32 [[TMP2]]) #[[ATTR1]] 1918 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]]) 1919 // CHECK11-NEXT: ret void 1920 // 1921 // 1922 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l87.omp_outlined 1923 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] { 1924 // CHECK11-NEXT: entry: 1925 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1926 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1927 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1928 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1929 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1930 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1931 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1932 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], 1 1933 // CHECK11-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1934 // CHECK11-NEXT: ret void 1935 // 1936 // 1937 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93 1938 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] { 1939 // CHECK11-NEXT: entry: 1940 // CHECK11-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4 1941 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1942 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1943 // CHECK11-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 1944 // CHECK11-NEXT: [[B_CASTED:%.*]] = alloca i32, align 4 1945 // CHECK11-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4 1946 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1947 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1948 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1949 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4 1950 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4 1951 // CHECK11-NEXT: [[TMP2:%.*]] = load i16, ptr [[B_ADDR]], align 2 1952 // CHECK11-NEXT: store i16 [[TMP2]], ptr [[B_CASTED]], align 2 1953 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[B_CASTED]], align 4 1954 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined, i32 [[TMP1]], i32 [[TMP3]]) 1955 // CHECK11-NEXT: ret void 1956 // 1957 // 1958 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l93.omp_outlined 1959 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR0]] { 1960 // CHECK11-NEXT: entry: 1961 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1962 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1963 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1964 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4 1965 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1966 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1967 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1968 // CHECK11-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4 1969 // CHECK11-NEXT: [[TMP0:%.*]] = load i16, ptr [[B_ADDR]], align 2 1970 // CHECK11-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32 1971 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4 1972 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CONV]] 1973 // CHECK11-NEXT: store i32 [[ADD]], ptr [[A_ADDR]], align 4 1974 // CHECK11-NEXT: ret void 1975 // 1976