xref: /llvm-project/clang/test/OpenMP/target_in_reduction_codegen.cpp (revision 7eca38ce76d5d1915f4ab7e665964062c0b37697) 
1 // RUN: %clang_cc1 -no-enable-noundef-analysis -verify -Wno-vla -triple x86_64-apple-darwin10 -fopenmp -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
2 // RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s
3 // RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
4 // expected-no-diagnostics
5 #ifndef HEADER
6 #define HEADER
7 
8 struct S {
9   int a;
10   S() : a(0) {}
11   S(const S &) {}
12   S &operator=(const S &) { return *this; }
13   ~S() {}
14   friend S operator+(const S &a, const S &b) { return a; }
15 };
16 
17 int main(int argc, char **argv) {
18   int a;
19   float b;
20   S c[5];
21   short d[argc];
22 #pragma omp taskgroup task_reduction(+ \
23                                      : a, b, argc)
24   {
25 #pragma omp taskgroup task_reduction(- \
26                                      : c, d)
27 #pragma omp parallel
28 #pragma omp target in_reduction(+ \
29                                 : a)
30     for (int i = 0; i < 5; i++)
31       a += d[a];
32   }
33   return 0;
34 }
35 
36 #endif
37 // CHECK1-LABEL: define {{[^@]+}}@main
38 // CHECK1-SAME: (i32 [[ARGC:%.*]], ptr [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
39 // CHECK1-NEXT:  entry:
40 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
41 // CHECK1-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
42 // CHECK1-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
43 // CHECK1-NEXT:    [[A:%.*]] = alloca i32, align 4
44 // CHECK1-NEXT:    [[B:%.*]] = alloca float, align 4
45 // CHECK1-NEXT:    [[C:%.*]] = alloca [5 x %struct.S], align 16
46 // CHECK1-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
47 // CHECK1-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
48 // CHECK1-NEXT:    [[DOTRD_INPUT_:%.*]] = alloca [3 x %struct.kmp_taskred_input_t], align 8
49 // CHECK1-NEXT:    [[DOTTASK_RED_:%.*]] = alloca ptr, align 8
50 // CHECK1-NEXT:    [[DOTRD_INPUT_3:%.*]] = alloca [2 x %struct.kmp_taskred_input_t.0], align 8
51 // CHECK1-NEXT:    [[DOTTASK_RED_6:%.*]] = alloca ptr, align 8
52 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
53 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
54 // CHECK1-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
55 // CHECK1-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
56 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0
57 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5
58 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
59 // CHECK1:       arrayctor.loop:
60 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
61 // CHECK1-NEXT:    call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
62 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
63 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
64 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
65 // CHECK1:       arrayctor.cont:
66 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
67 // CHECK1-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
68 // CHECK1-NEXT:    [[TMP3:%.*]] = call ptr @llvm.stacksave.p0()
69 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[SAVED_STACK]], align 8
70 // CHECK1-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP2]], align 16
71 // CHECK1-NEXT:    store i64 [[TMP2]], ptr [[__VLA_EXPR0]], align 8
72 // CHECK1-NEXT:    call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
73 // CHECK1-NEXT:    [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 0
74 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0
75 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP4]], align 8
76 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1
77 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP6]], align 8
78 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2
79 // CHECK1-NEXT:    store i64 4, ptr [[TMP8]], align 8
80 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3
81 // CHECK1-NEXT:    store ptr @.red_init., ptr [[TMP9]], align 8
82 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4
83 // CHECK1-NEXT:    store ptr null, ptr [[TMP10]], align 8
84 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5
85 // CHECK1-NEXT:    store ptr @.red_comb., ptr [[TMP11]], align 8
86 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6
87 // CHECK1-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP12]], i8 0, i64 4, i1 false)
88 // CHECK1-NEXT:    [[DOTRD_INPUT_GEP_1:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 1
89 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 0
90 // CHECK1-NEXT:    store ptr [[B]], ptr [[TMP14]], align 8
91 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 1
92 // CHECK1-NEXT:    store ptr [[B]], ptr [[TMP16]], align 8
93 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 2
94 // CHECK1-NEXT:    store i64 4, ptr [[TMP18]], align 8
95 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 3
96 // CHECK1-NEXT:    store ptr @.red_init..1, ptr [[TMP19]], align 8
97 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 4
98 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
99 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 5
100 // CHECK1-NEXT:    store ptr @.red_comb..2, ptr [[TMP21]], align 8
101 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 6
102 // CHECK1-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP22]], i8 0, i64 4, i1 false)
103 // CHECK1-NEXT:    [[DOTRD_INPUT_GEP_2:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 2
104 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 0
105 // CHECK1-NEXT:    store ptr [[ARGC_ADDR]], ptr [[TMP24]], align 8
106 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 1
107 // CHECK1-NEXT:    store ptr [[ARGC_ADDR]], ptr [[TMP26]], align 8
108 // CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 2
109 // CHECK1-NEXT:    store i64 4, ptr [[TMP28]], align 8
110 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 3
111 // CHECK1-NEXT:    store ptr @.red_init..3, ptr [[TMP29]], align 8
112 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 4
113 // CHECK1-NEXT:    store ptr null, ptr [[TMP30]], align 8
114 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 5
115 // CHECK1-NEXT:    store ptr @.red_comb..4, ptr [[TMP31]], align 8
116 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 6
117 // CHECK1-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP32]], i8 0, i64 4, i1 false)
118 // CHECK1-NEXT:    [[TMP35:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 3, ptr [[DOTRD_INPUT_]])
119 // CHECK1-NEXT:    store ptr [[TMP35]], ptr [[DOTTASK_RED_]], align 8
120 // CHECK1-NEXT:    call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
121 // CHECK1-NEXT:    [[DOTRD_INPUT_GEP_4:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 0
122 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0:%.*]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 0
123 // CHECK1-NEXT:    store ptr [[C]], ptr [[TMP36]], align 8
124 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 1
125 // CHECK1-NEXT:    store ptr [[C]], ptr [[TMP38]], align 8
126 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 2
127 // CHECK1-NEXT:    store i64 20, ptr [[TMP40]], align 8
128 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 3
129 // CHECK1-NEXT:    store ptr @.red_init..5, ptr [[TMP41]], align 8
130 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 4
131 // CHECK1-NEXT:    store ptr @.red_fini., ptr [[TMP42]], align 8
132 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 5
133 // CHECK1-NEXT:    store ptr @.red_comb..6, ptr [[TMP43]], align 8
134 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 6
135 // CHECK1-NEXT:    call void @llvm.memset.p0.i64(ptr align 8 [[TMP44]], i8 0, i64 4, i1 false)
136 // CHECK1-NEXT:    [[DOTRD_INPUT_GEP_5:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 1
137 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 0
138 // CHECK1-NEXT:    store ptr [[VLA]], ptr [[TMP46]], align 8
139 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 1
140 // CHECK1-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 8
141 // CHECK1-NEXT:    [[TMP50:%.*]] = mul nuw i64 [[TMP2]], 2
142 // CHECK1-NEXT:    [[TMP51:%.*]] = udiv exact i64 [[TMP50]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
143 // CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 2
144 // CHECK1-NEXT:    store i64 [[TMP50]], ptr [[TMP52]], align 8
145 // CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 3
146 // CHECK1-NEXT:    store ptr @.red_init..7, ptr [[TMP53]], align 8
147 // CHECK1-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 4
148 // CHECK1-NEXT:    store ptr null, ptr [[TMP54]], align 8
149 // CHECK1-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 5
150 // CHECK1-NEXT:    store ptr @.red_comb..8, ptr [[TMP55]], align 8
151 // CHECK1-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 6
152 // CHECK1-NEXT:    store i32 1, ptr [[TMP56]], align 8
153 // CHECK1-NEXT:    [[TMP58:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 2, ptr [[DOTRD_INPUT_3]])
154 // CHECK1-NEXT:    store ptr [[TMP58]], ptr [[DOTTASK_RED_6]], align 8
155 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @main.omp_outlined, ptr [[A]], i64 [[TMP2]], ptr [[VLA]], ptr [[DOTTASK_RED_]])
156 // CHECK1-NEXT:    call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
157 // CHECK1-NEXT:    call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])
158 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
159 // CHECK1-NEXT:    [[TMP59:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
160 // CHECK1-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP59]])
161 // CHECK1-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0
162 // CHECK1-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 5
163 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
164 // CHECK1:       arraydestroy.body:
165 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP60]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
166 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
167 // CHECK1-NEXT:    call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3:[0-9]+]]
168 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
169 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
170 // CHECK1:       arraydestroy.done8:
171 // CHECK1-NEXT:    [[TMP61:%.*]] = load i32, ptr [[RETVAL]], align 4
172 // CHECK1-NEXT:    ret i32 [[TMP61]]
173 //
174 //
175 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ev
176 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
177 // CHECK1-NEXT:  entry:
178 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
179 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
180 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
181 // CHECK1-NEXT:    call void @_ZN1SC2Ev(ptr nonnull align 4 dereferenceable(4) [[THIS1]])
182 // CHECK1-NEXT:    ret void
183 //
184 //
185 // CHECK1-LABEL: define {{[^@]+}}@.red_init.
186 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
187 // CHECK1-NEXT:  entry:
188 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
189 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
190 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
191 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
192 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
193 // CHECK1-NEXT:    store i32 0, ptr [[TMP3]], align 4
194 // CHECK1-NEXT:    ret void
195 //
196 //
197 // CHECK1-LABEL: define {{[^@]+}}@.red_comb.
198 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
199 // CHECK1-NEXT:  entry:
200 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
201 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
202 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
203 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
204 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
205 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
206 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP3]], align 4
207 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
208 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
209 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP3]], align 4
210 // CHECK1-NEXT:    ret void
211 //
212 //
213 // CHECK1-LABEL: define {{[^@]+}}@.red_init..1
214 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
215 // CHECK1-NEXT:  entry:
216 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
217 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
218 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
219 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
220 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
221 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[TMP3]], align 4
222 // CHECK1-NEXT:    ret void
223 //
224 //
225 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..2
226 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
227 // CHECK1-NEXT:  entry:
228 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
229 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
230 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
231 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
232 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
233 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
234 // CHECK1-NEXT:    [[TMP6:%.*]] = load float, ptr [[TMP3]], align 4
235 // CHECK1-NEXT:    [[TMP7:%.*]] = load float, ptr [[TMP5]], align 4
236 // CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP6]], [[TMP7]]
237 // CHECK1-NEXT:    store float [[ADD]], ptr [[TMP3]], align 4
238 // CHECK1-NEXT:    ret void
239 //
240 //
241 // CHECK1-LABEL: define {{[^@]+}}@.red_init..3
242 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
243 // CHECK1-NEXT:  entry:
244 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
245 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
246 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
247 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
248 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
249 // CHECK1-NEXT:    store i32 0, ptr [[TMP3]], align 4
250 // CHECK1-NEXT:    ret void
251 //
252 //
253 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..4
254 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
255 // CHECK1-NEXT:  entry:
256 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
257 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
258 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
259 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
260 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
261 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
262 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP3]], align 4
263 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4
264 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
265 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP3]], align 4
266 // CHECK1-NEXT:    ret void
267 //
268 //
269 // CHECK1-LABEL: define {{[^@]+}}@.red_init..5
270 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
271 // CHECK1-NEXT:  entry:
272 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
273 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
274 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
275 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
276 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
277 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP3]], i32 0, i32 0
278 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5
279 // CHECK1-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP4]]
280 // CHECK1-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
281 // CHECK1:       omp.arrayinit.body:
282 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
283 // CHECK1-NEXT:    call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]])
284 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
285 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]]
286 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
287 // CHECK1:       omp.arrayinit.done:
288 // CHECK1-NEXT:    ret void
289 //
290 //
291 // CHECK1-LABEL: define {{[^@]+}}@.red_fini.
292 // CHECK1-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5]] {
293 // CHECK1-NEXT:  entry:
294 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
295 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
296 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8
297 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP1]], i32 0, i32 0
298 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5
299 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
300 // CHECK1:       arraydestroy.body:
301 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
302 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
303 // CHECK1-NEXT:    call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #3
304 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
305 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
306 // CHECK1:       arraydestroy.done1:
307 // CHECK1-NEXT:    ret void
308 //
309 //
310 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
311 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
312 // CHECK1-NEXT:  entry:
313 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
314 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
315 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
316 // CHECK1-NEXT:    call void @_ZN1SD2Ev(ptr nonnull align 4 dereferenceable(4) [[THIS1]]) #3
317 // CHECK1-NEXT:    ret void
318 //
319 //
320 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..6
321 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
322 // CHECK1-NEXT:  entry:
323 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
324 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
325 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4
326 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
327 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
328 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
329 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
330 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr [[STRUCT_S]], ptr [[TMP3]], i64 5
331 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP3]], [[TMP6]]
332 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
333 // CHECK1:       omp.arraycpy.body:
334 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
335 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
336 // CHECK1-NEXT:    call void @_ZplRK1SS1_(ptr dead_on_unwind writable sret([[STRUCT_S]]) align 4 [[REF_TMP]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
337 // CHECK1-NEXT:    [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) ptr @_ZN1SaSERKS_(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[REF_TMP]])
338 // CHECK1-NEXT:    call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[REF_TMP]]) #3
339 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
340 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
341 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]
342 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]]
343 // CHECK1:       omp.arraycpy.done2:
344 // CHECK1-NEXT:    ret void
345 //
346 //
347 // CHECK1-LABEL: define {{[^@]+}}@_ZplRK1SS1_
348 // CHECK1-SAME: (ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR7:[0-9]+]] {
349 // CHECK1-NEXT:  entry:
350 // CHECK1-NEXT:    [[RESULT_PTR:%.*]] = alloca ptr, align 8
351 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
352 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
353 // CHECK1-NEXT:    store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 8
354 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
355 // CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
356 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
357 // CHECK1-NEXT:    call void @_ZN1SC1ERKS_(ptr nonnull align 4 dereferenceable(4) [[AGG_RESULT]], ptr nonnull align 4 dereferenceable(4) [[TMP1]])
358 // CHECK1-NEXT:    ret void
359 //
360 //
361 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SaSERKS_
362 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR7]] align 2 {
363 // CHECK1-NEXT:  entry:
364 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
365 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
366 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
367 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
368 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
369 // CHECK1-NEXT:    ret ptr [[THIS1]]
370 //
371 //
372 // CHECK1-LABEL: define {{[^@]+}}@.red_init..7
373 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
374 // CHECK1-NEXT:  entry:
375 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
376 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
377 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
378 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
379 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
380 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8
381 // CHECK1-NEXT:    [[TMP5:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}})
382 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, ptr [[TMP5]], align 8
383 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr i16, ptr [[TMP4]], i64 [[TMP7]]
384 // CHECK1-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP4]], [[TMP8]]
385 // CHECK1-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
386 // CHECK1:       omp.arrayinit.body:
387 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP4]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
388 // CHECK1-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
389 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
390 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
391 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
392 // CHECK1:       omp.arrayinit.done:
393 // CHECK1-NEXT:    ret void
394 //
395 //
396 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..8
397 // CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {
398 // CHECK1-NEXT:  entry:
399 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
400 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
401 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
402 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
403 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
404 // CHECK1-NEXT:    [[TMP3:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}})
405 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[TMP3]], align 8
406 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTADDR]], align 8
407 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
408 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP5]]
409 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP10]]
410 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
411 // CHECK1:       omp.arraycpy.body:
412 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
413 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
414 // CHECK1-NEXT:    [[TMP11:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
415 // CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP11]] to i32
416 // CHECK1-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
417 // CHECK1-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP12]] to i32
418 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
419 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
420 // CHECK1-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
421 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
422 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
423 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
424 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
425 // CHECK1:       omp.arraycpy.done4:
426 // CHECK1-NEXT:    ret void
427 //
428 //
429 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
430 // CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]]) #[[ATTR8:[0-9]+]] {
431 // CHECK1-NEXT:  entry:
432 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
433 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
434 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
435 // CHECK1-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
436 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
437 // CHECK1-NEXT:    [[DOTTASK_RED__ADDR:%.*]] = alloca ptr, align 8
438 // CHECK1-NEXT:    [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
439 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
440 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
441 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
442 // CHECK1-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
443 // CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
444 // CHECK1-NEXT:    store ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED__ADDR]], align 8
445 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
446 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
447 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8
448 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR]], align 8
449 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
450 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
451 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 8
452 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1
453 // CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP6]], align 8
454 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2
455 // CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP7]], align 8
456 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 3
457 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP3]], align 8
458 // CHECK1-NEXT:    store ptr [[TMP9]], ptr [[TMP8]], align 8
459 // CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
460 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
461 // CHECK1-NEXT:    [[TMP12:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP11]], i32 1, i64 48, i64 32, ptr @.omp_task_entry.)
462 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP12]], i32 0, i32 0
463 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP14]], i32 0, i32 0
464 // CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
465 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP16]], ptr align 8 [[AGG_CAPTURED]], i64 32, i1 false)
466 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP12]], i32 0, i32 1
467 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP18]], i32 0, i32 0
468 // CHECK1-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP3]], align 8
469 // CHECK1-NEXT:    store ptr [[TMP21]], ptr [[TMP20]], align 8
470 // CHECK1-NEXT:    call void @__kmpc_omp_task_begin_if0(ptr @[[GLOB1]], i32 [[TMP11]], ptr [[TMP12]])
471 // CHECK1-NEXT:    [[TMP22:%.*]] = call i32 @.omp_task_entry.(i32 [[TMP11]], ptr [[TMP12]]) #[[ATTR3]]
472 // CHECK1-NEXT:    call void @__kmpc_omp_task_complete_if0(ptr @[[GLOB1]], i32 [[TMP11]], ptr [[TMP12]])
473 // CHECK1-NEXT:    ret void
474 //
475 //
476 // CHECK1-LABEL: define {{[^@]+}}@__omp_offloading_{{.*}}_main_l{{[0-9]+}}
477 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr [[DOTTASK_RED_:%.*]]) #[[ATTR9:[0-9]+]] {
478 // CHECK1-NEXT:  entry:
479 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
480 // CHECK1-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
481 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
482 // CHECK1-NEXT:    [[DOTTASK_RED__ADDR:%.*]] = alloca ptr, align 8
483 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
484 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
485 // CHECK1-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
486 // CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
487 // CHECK1-NEXT:    store ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED__ADDR]], align 8
488 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
489 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
490 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8
491 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
492 // CHECK1-NEXT:    br label [[FOR_COND:%.*]]
493 // CHECK1:       for.cond:
494 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[I]], align 4
495 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP3]], 5
496 // CHECK1-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
497 // CHECK1:       for.body:
498 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4
499 // CHECK1-NEXT:    [[IDXPROM_I:%.*]] = sext i32 [[TMP4]] to i64
500 // CHECK1-NEXT:    [[ARRAYIDX_I:%.*]] = getelementptr inbounds i16, ptr [[TMP2]], i64 [[IDXPROM_I]]
501 // CHECK1-NEXT:    [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX_I]], align 2
502 // CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP5]] to i32
503 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4
504 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP6]], [[CONV]]
505 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP0]], align 4
506 // CHECK1-NEXT:    br label [[FOR_INC:%.*]]
507 // CHECK1:       for.inc:
508 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4
509 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 1
510 // CHECK1-NEXT:    store i32 [[INC]], ptr [[I]], align 4
511 // CHECK1-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
512 // CHECK1:       for.end
513 // CHECK1-NEXT:    ret void
514 //
515 //
516 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map.
517 // CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] {
518 // CHECK1-NEXT:  entry:
519 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
520 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
521 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
522 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
523 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
524 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP2]], i32 0, i32 0
525 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
526 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP4]], align 8
527 // CHECK1-NEXT:    ret void
528 //
529 //
530 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.
531 // CHECK1-SAME: (i32 [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {
532 // CHECK1-NEXT:  entry:
533 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
534 // CHECK1-NEXT:    [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
535 // CHECK1-NEXT:    [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
536 // CHECK1-NEXT:    [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8
537 // CHECK1-NEXT:    [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8
538 // CHECK1-NEXT:    [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8
539 // CHECK1-NEXT:    [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8
540 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i32, align 4
541 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
542 // CHECK1-NEXT:    store i32 [[TMP0]], ptr [[DOTADDR]], align 4
543 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
544 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4
545 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
546 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0
547 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
548 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
549 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
550 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
551 // CHECK1-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
552 // CHECK1-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
553 // CHECK1-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
554 // CHECK1-NEXT:    call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
555 // CHECK1-NEXT:    store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14
556 // CHECK1-NEXT:    store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !14
557 // CHECK1-NEXT:    store ptr [[TMP9]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
558 // CHECK1-NEXT:    store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
559 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !14
560 // CHECK1-NEXT:    store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
561 // CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
562 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP12]], i32 0, i32 1
563 // CHECK1-NEXT:    [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
564 // CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
565 // CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
566 // CHECK1-NEXT:    call void [[TMP15]](ptr [[TMP16]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR3]]
567 // CHECK1-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !14
568 // CHECK1-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP12]], align 8
569 // CHECK1-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP18]], align 8
570 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14
571 // CHECK1-NEXT:    [[TMP24:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP22]], ptr [[TMP21]], ptr [[TMP20]])
572 // CHECK1-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[TMP12]], align 8
573 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP12]], i32 0, i32 2
574 // CHECK1-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8
575 // CHECK1-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[TMP18]], align 8
576 // CHECK1-NEXT:    call void @__omp_offloading_{{.*}}_main_l{{[0-9]+}}(ptr [[TMP26]], i64 [[TMP14]], ptr [[TMP28]], ptr [[TMP29]]) #[[ATTR3]]
577 // CHECK1-NEXT:    ret i32 0
578 //
579 //
580 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ev
581 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
582 // CHECK1-NEXT:  entry:
583 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
584 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
585 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
586 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
587 // CHECK1-NEXT:    store i32 0, ptr [[A]], align 4
588 // CHECK1-NEXT:    ret void
589 //
590 //
591 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
592 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
593 // CHECK1-NEXT:  entry:
594 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
595 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
596 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
597 // CHECK1-NEXT:    ret void
598 //
599 //
600 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1ERKS_
601 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
602 // CHECK1-NEXT:  entry:
603 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
604 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
605 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
606 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
607 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
608 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8
609 // CHECK1-NEXT:    call void @_ZN1SC2ERKS_(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP1]])
610 // CHECK1-NEXT:    ret void
611 //
612 //
613 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2ERKS_
614 // CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
615 // CHECK1-NEXT:  entry:
616 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
617 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
618 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
619 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
620 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
621 // CHECK1-NEXT:    ret void
622 //
623