1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 3 // expected-no-diagnostics 4 5 // Check code generation 6 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -std=c++20 -fclang-abi-compat=latest -fopenmp -fopenmp-version=60 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 7 8 // Check same results after serialization round-trip 9 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -std=c++20 -fclang-abi-compat=latest -fopenmp -fopenmp-version=60 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -std=c++20 -fclang-abi-compat=latest -fopenmp -fopenmp-version=60 -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2 11 12 #ifndef HEADER 13 #define HEADER 14 15 // placeholder for loop body code. 16 extern "C" void body(...) {} 17 18 19 struct S { 20 int i; 21 S() { 22 #pragma omp reverse 23 for (i = 7; i < 17; i += 3) 24 body(i); 25 } 26 } s; 27 28 29 extern "C" void foo1(int start, int end, int step) { 30 int i; 31 #pragma omp reverse 32 for (i = start; i < end; i += step) 33 body(i); 34 } 35 36 37 extern "C" void foo2() { 38 #pragma omp for 39 #pragma omp reverse 40 for (int i = 7; i < 17; i += 3) 41 body(i); 42 } 43 44 45 extern "C" void foo3() { 46 #pragma omp for collapse(3) 47 for (int k = 7; k < 17; k += 3) 48 #pragma omp reverse 49 for (int i = 7; i < 17; i += 3) 50 for (int j = 7; j < 17; j += 3) 51 body(k, i, j); 52 } 53 54 55 extern "C" void foo4() { 56 #pragma omp parallel for 57 #pragma omp reverse 58 for (int i = 7; i < 17; i += 3) 59 body(i); 60 } 61 62 63 template<typename T, T Step> 64 void foo5(T start, T end) { 65 #pragma omp reverse 66 for (T i = start; i < end; i += Step) 67 body(i); 68 } 69 70 extern "C" void tfoo5() { 71 foo5<int,3>(0, 42); 72 } 73 74 75 extern "C" void foo6() { 76 double arr[128]; 77 #pragma omp reverse 78 for (int c = 42; auto && v : arr) 79 body(v, c); 80 } 81 82 83 extern "C" void foo7() { 84 double A[128]; 85 86 #pragma omp for collapse(3) 87 for (int k = 7; k < 17; k += 3) 88 #pragma omp reverse 89 for (int c = 42; auto && v : A) 90 for (int j = 7; j < 17; j += 3) 91 body(k, c, v, j); 92 } 93 94 #endif /* HEADER */ 95 96 97 // CHECK1-LABEL: define {{[^@]+}}@body 98 // CHECK1-SAME: (...) #[[ATTR0:[0-9]+]] { 99 // CHECK1-NEXT: entry: 100 // CHECK1-NEXT: ret void 101 // 102 // 103 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init 104 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] section ".text.startup" { 105 // CHECK1-NEXT: entry: 106 // CHECK1-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s) 107 // CHECK1-NEXT: ret void 108 // 109 // 110 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ev 111 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 { 112 // CHECK1-NEXT: entry: 113 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 114 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 115 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 116 // CHECK1-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 117 // CHECK1-NEXT: ret void 118 // 119 // 120 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ev 121 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 { 122 // CHECK1-NEXT: entry: 123 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 124 // CHECK1-NEXT: [[I2:%.*]] = alloca ptr, align 8 125 // CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 126 // CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 127 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 128 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 129 // CHECK1-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 130 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 131 // CHECK1-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0 132 // CHECK1-NEXT: store ptr [[I3]], ptr [[I2]], align 8 133 // CHECK1-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4 134 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 135 // CHECK1: for.cond: 136 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 137 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 138 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 139 // CHECK1: for.body: 140 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 141 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP1]] 142 // CHECK1-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4 143 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 144 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 3 145 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]] 146 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[I2]], align 8 147 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4 148 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[I2]], align 8 149 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 150 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]]) 151 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 152 // CHECK1: for.inc: 153 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 154 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 155 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4 156 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 157 // CHECK1: for.end: 158 // CHECK1-NEXT: ret void 159 // 160 // 161 // CHECK1-LABEL: define {{[^@]+}}@foo1 162 // CHECK1-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR0]] { 163 // CHECK1-NEXT: entry: 164 // CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[DOTNEW_STEP:%.*]] = alloca i32, align 4 171 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 172 // CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 173 // CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 175 // CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 176 // CHECK1-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4 177 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 178 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 179 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 180 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 181 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 182 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 183 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[STEP_ADDR]], align 4 184 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTNEW_STEP]], align 4 185 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 186 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 187 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]] 188 // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 189 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 190 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], [[TMP6]] 191 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 192 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP7]] 193 // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 194 // CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 195 // CHECK1-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4 196 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 197 // CHECK1: for.cond: 198 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 199 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 200 // CHECK1-NEXT: [[ADD5:%.*]] = add i32 [[TMP9]], 1 201 // CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP8]], [[ADD5]] 202 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 203 // CHECK1: for.body: 204 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 205 // CHECK1-NEXT: [[ADD6:%.*]] = add i32 [[TMP10]], 1 206 // CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1 207 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 208 // CHECK1-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP11]] 209 // CHECK1-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4 210 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 211 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 212 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 213 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], [[TMP14]] 214 // CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP12]], [[MUL]] 215 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4 216 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 217 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP15]]) 218 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 219 // CHECK1: for.inc: 220 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 221 // CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP16]], 1 222 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4 223 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 224 // CHECK1: for.end: 225 // CHECK1-NEXT: ret void 226 // 227 // 228 // CHECK1-LABEL: define {{[^@]+}}@foo2 229 // CHECK1-SAME: () #[[ATTR0]] { 230 // CHECK1-NEXT: entry: 231 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]]) 241 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 242 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 243 // CHECK1-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4 244 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 245 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 246 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 247 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 248 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 3 249 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 250 // CHECK1: cond.true: 251 // CHECK1-NEXT: br label [[COND_END:%.*]] 252 // CHECK1: cond.false: 253 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 254 // CHECK1-NEXT: br label [[COND_END]] 255 // CHECK1: cond.end: 256 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 257 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 258 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 259 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 261 // CHECK1: omp.inner.for.cond: 262 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 264 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 265 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 266 // CHECK1: omp.inner.for.body: 267 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 268 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 269 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 270 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 4 271 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 272 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP7]] 273 // CHECK1-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4 274 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 275 // CHECK1-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP8]], 3 276 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]] 277 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[I]], align 4 278 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 279 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP9]]) 280 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 281 // CHECK1: omp.body.continue: 282 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 283 // CHECK1: omp.inner.for.inc: 284 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 285 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1 286 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 288 // CHECK1: omp.inner.for.end: 289 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 290 // CHECK1: omp.loop.exit: 291 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 292 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[TMP0]]) 293 // CHECK1-NEXT: ret void 294 // 295 // 296 // CHECK1-LABEL: define {{[^@]+}}@foo3 297 // CHECK1-SAME: () #[[ATTR0]] { 298 // CHECK1-NEXT: entry: 299 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 304 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 305 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 306 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 307 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 308 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 311 // CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 312 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 313 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 314 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 315 // CHECK1-NEXT: store i32 63, ptr [[DOTOMP_UB]], align 4 316 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 317 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 318 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 319 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 320 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 63 321 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 322 // CHECK1: cond.true: 323 // CHECK1-NEXT: br label [[COND_END:%.*]] 324 // CHECK1: cond.false: 325 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 326 // CHECK1-NEXT: br label [[COND_END]] 327 // CHECK1: cond.end: 328 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 63, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 329 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 330 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 331 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 332 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 333 // CHECK1: omp.inner.for.cond: 334 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 335 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 336 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 337 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 338 // CHECK1: omp.inner.for.body: 339 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 340 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP6]], 16 341 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 3 342 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]] 343 // CHECK1-NEXT: store i32 [[ADD]], ptr [[K]], align 4 344 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 345 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 346 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP8]], 16 347 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 16 348 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], [[MUL5]] 349 // CHECK1-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB]], 4 350 // CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[DIV6]], 1 351 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]] 352 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTFORWARD_IV_I]], align 4 353 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 354 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 355 // CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[TMP10]], 16 356 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 16 357 // CHECK1-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP9]], [[MUL10]] 358 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 359 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 360 // CHECK1-NEXT: [[DIV12:%.*]] = sdiv i32 [[TMP12]], 16 361 // CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 16 362 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP11]], [[MUL13]] 363 // CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 4 364 // CHECK1-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 4 365 // CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i32 [[SUB11]], [[MUL16]] 366 // CHECK1-NEXT: [[MUL18:%.*]] = mul nsw i32 [[SUB17]], 3 367 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 7, [[MUL18]] 368 // CHECK1-NEXT: store i32 [[ADD19]], ptr [[J]], align 4 369 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 370 // CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i32 3, [[TMP13]] 371 // CHECK1-NEXT: store i32 [[SUB20]], ptr [[DOTREVERSED_IV_I]], align 4 372 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 373 // CHECK1-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP14]], 3 374 // CHECK1-NEXT: [[ADD22:%.*]] = add nsw i32 7, [[MUL21]] 375 // CHECK1-NEXT: store i32 [[ADD22]], ptr [[I]], align 4 376 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[K]], align 4 377 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4 378 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[J]], align 4 379 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP15]], i32 noundef [[TMP16]], i32 noundef [[TMP17]]) 380 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 381 // CHECK1: omp.body.continue: 382 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 383 // CHECK1: omp.inner.for.inc: 384 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 385 // CHECK1-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP18]], 1 386 // CHECK1-NEXT: store i32 [[ADD23]], ptr [[DOTOMP_IV]], align 4 387 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 388 // CHECK1: omp.inner.for.end: 389 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 390 // CHECK1: omp.loop.exit: 391 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 392 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 393 // CHECK1-NEXT: ret void 394 // 395 // 396 // CHECK1-LABEL: define {{[^@]+}}@foo4 397 // CHECK1-SAME: () #[[ATTR0]] { 398 // CHECK1-NEXT: entry: 399 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @foo4.omp_outlined) 400 // CHECK1-NEXT: ret void 401 // 402 // 403 // CHECK1-LABEL: define {{[^@]+}}@foo4.omp_outlined 404 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] { 405 // CHECK1-NEXT: entry: 406 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 407 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 408 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 409 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 410 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 411 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 412 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 413 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 414 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 415 // CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 416 // CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 417 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 418 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 419 // CHECK1-NEXT: store i32 7, ptr [[I]], align 4 420 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 421 // CHECK1-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4 422 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 424 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 425 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 426 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 427 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 428 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 3 429 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 430 // CHECK1: cond.true: 431 // CHECK1-NEXT: br label [[COND_END:%.*]] 432 // CHECK1: cond.false: 433 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 434 // CHECK1-NEXT: br label [[COND_END]] 435 // CHECK1: cond.end: 436 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 437 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 438 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 439 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 440 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 441 // CHECK1: omp.inner.for.cond: 442 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 443 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 444 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 445 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 446 // CHECK1: omp.inner.for.body: 447 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 448 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 449 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 450 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 4 451 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 452 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP8]] 453 // CHECK1-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4 454 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 455 // CHECK1-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP9]], 3 456 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]] 457 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[I]], align 4 458 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 459 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP10]]) 460 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 461 // CHECK1: omp.body.continue: 462 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 463 // CHECK1: omp.inner.for.inc: 464 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 465 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 466 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 467 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 468 // CHECK1: omp.inner.for.end: 469 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 470 // CHECK1: omp.loop.exit: 471 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 472 // CHECK1-NEXT: ret void 473 // 474 // 475 // CHECK1-LABEL: define {{[^@]+}}@tfoo5 476 // CHECK1-SAME: () #[[ATTR0]] { 477 // CHECK1-NEXT: entry: 478 // CHECK1-NEXT: call void @_Z4foo5IiTnT_Li3EEvS0_S0_(i32 noundef 0, i32 noundef 42) 479 // CHECK1-NEXT: ret void 480 // 481 // 482 // CHECK1-LABEL: define {{[^@]+}}@_Z4foo5IiTnT_Li3EEvS0_S0_ 483 // CHECK1-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]]) #[[ATTR0]] comdat { 484 // CHECK1-NEXT: entry: 485 // CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 486 // CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 487 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 488 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 489 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 490 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 491 // CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 492 // CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 493 // CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 494 // CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 495 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 496 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 497 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 498 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 499 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 500 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 501 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 502 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 503 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 504 // CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 505 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 3 506 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 3 507 // CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 508 // CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 509 // CHECK1-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4 510 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 511 // CHECK1: for.cond: 512 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 513 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 514 // CHECK1-NEXT: [[ADD5:%.*]] = add i32 [[TMP6]], 1 515 // CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP5]], [[ADD5]] 516 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 517 // CHECK1: for.body: 518 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 519 // CHECK1-NEXT: [[ADD6:%.*]] = add i32 [[TMP7]], 1 520 // CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1 521 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 522 // CHECK1-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP8]] 523 // CHECK1-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4 524 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 525 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 526 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP10]], 3 527 // CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP9]], [[MUL]] 528 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4 529 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 530 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP11]]) 531 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 532 // CHECK1: for.inc: 533 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 534 // CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP12]], 1 535 // CHECK1-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4 536 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 537 // CHECK1: for.end: 538 // CHECK1-NEXT: ret void 539 // 540 // 541 // CHECK1-LABEL: define {{[^@]+}}@foo6 542 // CHECK1-SAME: () #[[ATTR0]] { 543 // CHECK1-NEXT: entry: 544 // CHECK1-NEXT: [[ARR:%.*]] = alloca [128 x double], align 16 545 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 546 // CHECK1-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8 547 // CHECK1-NEXT: [[__END2:%.*]] = alloca ptr, align 8 548 // CHECK1-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8 549 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 550 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8 551 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 552 // CHECK1-NEXT: [[DOTFORWARD_IV___BEGIN2:%.*]] = alloca i64, align 8 553 // CHECK1-NEXT: [[DOTREVERSED_IV___BEGIN2:%.*]] = alloca i64, align 8 554 // CHECK1-NEXT: [[V:%.*]] = alloca ptr, align 8 555 // CHECK1-NEXT: store i32 42, ptr [[C]], align 4 556 // CHECK1-NEXT: store ptr [[ARR]], ptr [[__RANGE2]], align 8 557 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8 558 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP0]], i64 0, i64 0 559 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 128 560 // CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8 561 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8 562 // CHECK1-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 0 563 // CHECK1-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8 564 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8 565 // CHECK1-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 0 566 // CHECK1-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8 567 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8 568 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8 569 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8 570 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 571 // CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64 572 // CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 573 // CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 574 // CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 575 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 576 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 577 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 578 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1 579 // CHECK1-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8 580 // CHECK1-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 581 // CHECK1-NEXT: br label [[FOR_COND:%.*]] 582 // CHECK1: for.cond: 583 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 584 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 585 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1 586 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]] 587 // CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 588 // CHECK1: for.body: 589 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 590 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP8]], 1 591 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i64 [[ADD7]], 1 592 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 593 // CHECK1-NEXT: [[SUB9:%.*]] = sub nsw i64 [[SUB8]], [[TMP9]] 594 // CHECK1-NEXT: store i64 [[SUB9]], ptr [[DOTREVERSED_IV___BEGIN2]], align 8 595 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 596 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN2]], align 8 597 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP11]], 1 598 // CHECK1-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds double, ptr [[TMP10]], i64 [[MUL]] 599 // CHECK1-NEXT: store ptr [[ADD_PTR10]], ptr [[__BEGIN2]], align 8 600 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[__BEGIN2]], align 8 601 // CHECK1-NEXT: store ptr [[TMP12]], ptr [[V]], align 8 602 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V]], align 8 603 // CHECK1-NEXT: [[TMP14:%.*]] = load double, ptr [[TMP13]], align 8 604 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[C]], align 4 605 // CHECK1-NEXT: call void (...) @body(double noundef [[TMP14]], i32 noundef [[TMP15]]) 606 // CHECK1-NEXT: br label [[FOR_INC:%.*]] 607 // CHECK1: for.inc: 608 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 609 // CHECK1-NEXT: [[INC:%.*]] = add nsw i64 [[TMP16]], 1 610 // CHECK1-NEXT: store i64 [[INC]], ptr [[DOTFORWARD_IV___BEGIN2]], align 8 611 // CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 612 // CHECK1: for.end: 613 // CHECK1-NEXT: ret void 614 // 615 // 616 // CHECK1-LABEL: define {{[^@]+}}@foo7 617 // CHECK1-SAME: () #[[ATTR0]] { 618 // CHECK1-NEXT: entry: 619 // CHECK1-NEXT: [[A:%.*]] = alloca [128 x double], align 16 620 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 621 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 622 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i64, align 8 623 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 624 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 625 // CHECK1-NEXT: [[__RANGE3:%.*]] = alloca ptr, align 8 626 // CHECK1-NEXT: [[__END3:%.*]] = alloca ptr, align 8 627 // CHECK1-NEXT: [[__BEGIN3:%.*]] = alloca ptr, align 8 628 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 629 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca ptr, align 8 630 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8 631 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i64, align 8 632 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i64, align 8 633 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4 634 // CHECK1-NEXT: [[DOTFORWARD_IV___BEGIN3:%.*]] = alloca i64, align 8 635 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 636 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 637 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 638 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 639 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 640 // CHECK1-NEXT: [[K15:%.*]] = alloca i32, align 4 641 // CHECK1-NEXT: [[DOTFORWARD_IV___BEGIN316:%.*]] = alloca i64, align 8 642 // CHECK1-NEXT: [[J17:%.*]] = alloca i32, align 4 643 // CHECK1-NEXT: [[DOTREVERSED_IV___BEGIN3:%.*]] = alloca i64, align 8 644 // CHECK1-NEXT: [[V:%.*]] = alloca ptr, align 8 645 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 646 // CHECK1-NEXT: store i32 42, ptr [[C]], align 4 647 // CHECK1-NEXT: store ptr [[A]], ptr [[__RANGE3]], align 8 648 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE3]], align 8 649 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 0 650 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 128 651 // CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END3]], align 8 652 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE3]], align 8 653 // CHECK1-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 0 654 // CHECK1-NEXT: store ptr [[ARRAYDECAY3]], ptr [[__BEGIN3]], align 8 655 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__RANGE3]], align 8 656 // CHECK1-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP3]], i64 0, i64 0 657 // CHECK1-NEXT: store ptr [[ARRAYDECAY4]], ptr [[DOTCAPTURE_EXPR_]], align 8 658 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[__END3]], align 8 659 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[DOTCAPTURE_EXPR_5]], align 8 660 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_5]], align 8 661 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 662 // CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 663 // CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP6]] to i64 664 // CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 665 // CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 666 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 667 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 668 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 669 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i64 [[DIV]], 1 670 // CHECK1-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_6]], align 8 671 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 8 672 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP7]], 1 673 // CHECK1-NEXT: store i64 [[ADD9]], ptr [[DOTCAPTURE_EXPR_8]], align 8 674 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 675 // CHECK1-NEXT: [[SUB11:%.*]] = sub nsw i64 [[TMP8]], 0 676 // CHECK1-NEXT: [[DIV12:%.*]] = sdiv i64 [[SUB11]], 1 677 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 4, [[DIV12]] 678 // CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i64 [[MUL]], 4 679 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL13]], 1 680 // CHECK1-NEXT: store i64 [[SUB14]], ptr [[DOTCAPTURE_EXPR_10]], align 8 681 // CHECK1-NEXT: store i32 7, ptr [[K]], align 4 682 // CHECK1-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN3]], align 8 683 // CHECK1-NEXT: store i32 7, ptr [[J]], align 4 684 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 685 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 0, [[TMP9]] 686 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 687 // CHECK1: omp.precond.then: 688 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 689 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8 690 // CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTOMP_UB]], align 8 691 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 692 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 693 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 694 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 695 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8 696 // CHECK1-NEXT: [[CMP18:%.*]] = icmp sgt i64 [[TMP11]], [[TMP12]] 697 // CHECK1-NEXT: br i1 [[CMP18]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 698 // CHECK1: cond.true: 699 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8 700 // CHECK1-NEXT: br label [[COND_END:%.*]] 701 // CHECK1: cond.false: 702 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 703 // CHECK1-NEXT: br label [[COND_END]] 704 // CHECK1: cond.end: 705 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 706 // CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 707 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 708 // CHECK1-NEXT: store i64 [[TMP15]], ptr [[DOTOMP_IV]], align 8 709 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 710 // CHECK1: omp.inner.for.cond: 711 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 712 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 713 // CHECK1-NEXT: [[CMP19:%.*]] = icmp sle i64 [[TMP16]], [[TMP17]] 714 // CHECK1-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 715 // CHECK1: omp.inner.for.body: 716 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 717 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 718 // CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i64 [[TMP19]], 0 719 // CHECK1-NEXT: [[DIV21:%.*]] = sdiv i64 [[SUB20]], 1 720 // CHECK1-NEXT: [[MUL22:%.*]] = mul nsw i64 1, [[DIV21]] 721 // CHECK1-NEXT: [[MUL23:%.*]] = mul nsw i64 [[MUL22]], 4 722 // CHECK1-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[MUL23]] 723 // CHECK1-NEXT: [[MUL25:%.*]] = mul nsw i64 [[DIV24]], 3 724 // CHECK1-NEXT: [[ADD26:%.*]] = add nsw i64 7, [[MUL25]] 725 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[ADD26]] to i32 726 // CHECK1-NEXT: store i32 [[CONV]], ptr [[K15]], align 4 727 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 728 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 729 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 730 // CHECK1-NEXT: [[SUB27:%.*]] = sub nsw i64 [[TMP22]], 0 731 // CHECK1-NEXT: [[DIV28:%.*]] = sdiv i64 [[SUB27]], 1 732 // CHECK1-NEXT: [[MUL29:%.*]] = mul nsw i64 1, [[DIV28]] 733 // CHECK1-NEXT: [[MUL30:%.*]] = mul nsw i64 [[MUL29]], 4 734 // CHECK1-NEXT: [[DIV31:%.*]] = sdiv i64 [[TMP21]], [[MUL30]] 735 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 736 // CHECK1-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], 0 737 // CHECK1-NEXT: [[DIV33:%.*]] = sdiv i64 [[SUB32]], 1 738 // CHECK1-NEXT: [[MUL34:%.*]] = mul nsw i64 1, [[DIV33]] 739 // CHECK1-NEXT: [[MUL35:%.*]] = mul nsw i64 [[MUL34]], 4 740 // CHECK1-NEXT: [[MUL36:%.*]] = mul nsw i64 [[DIV31]], [[MUL35]] 741 // CHECK1-NEXT: [[SUB37:%.*]] = sub nsw i64 [[TMP20]], [[MUL36]] 742 // CHECK1-NEXT: [[DIV38:%.*]] = sdiv i64 [[SUB37]], 4 743 // CHECK1-NEXT: [[MUL39:%.*]] = mul nsw i64 [[DIV38]], 1 744 // CHECK1-NEXT: [[ADD40:%.*]] = add nsw i64 0, [[MUL39]] 745 // CHECK1-NEXT: store i64 [[ADD40]], ptr [[DOTFORWARD_IV___BEGIN316]], align 8 746 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 747 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 748 // CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 749 // CHECK1-NEXT: [[SUB41:%.*]] = sub nsw i64 [[TMP26]], 0 750 // CHECK1-NEXT: [[DIV42:%.*]] = sdiv i64 [[SUB41]], 1 751 // CHECK1-NEXT: [[MUL43:%.*]] = mul nsw i64 1, [[DIV42]] 752 // CHECK1-NEXT: [[MUL44:%.*]] = mul nsw i64 [[MUL43]], 4 753 // CHECK1-NEXT: [[DIV45:%.*]] = sdiv i64 [[TMP25]], [[MUL44]] 754 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 755 // CHECK1-NEXT: [[SUB46:%.*]] = sub nsw i64 [[TMP27]], 0 756 // CHECK1-NEXT: [[DIV47:%.*]] = sdiv i64 [[SUB46]], 1 757 // CHECK1-NEXT: [[MUL48:%.*]] = mul nsw i64 1, [[DIV47]] 758 // CHECK1-NEXT: [[MUL49:%.*]] = mul nsw i64 [[MUL48]], 4 759 // CHECK1-NEXT: [[MUL50:%.*]] = mul nsw i64 [[DIV45]], [[MUL49]] 760 // CHECK1-NEXT: [[SUB51:%.*]] = sub nsw i64 [[TMP24]], [[MUL50]] 761 // CHECK1-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 762 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 763 // CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 764 // CHECK1-NEXT: [[SUB52:%.*]] = sub nsw i64 [[TMP30]], 0 765 // CHECK1-NEXT: [[DIV53:%.*]] = sdiv i64 [[SUB52]], 1 766 // CHECK1-NEXT: [[MUL54:%.*]] = mul nsw i64 1, [[DIV53]] 767 // CHECK1-NEXT: [[MUL55:%.*]] = mul nsw i64 [[MUL54]], 4 768 // CHECK1-NEXT: [[DIV56:%.*]] = sdiv i64 [[TMP29]], [[MUL55]] 769 // CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 770 // CHECK1-NEXT: [[SUB57:%.*]] = sub nsw i64 [[TMP31]], 0 771 // CHECK1-NEXT: [[DIV58:%.*]] = sdiv i64 [[SUB57]], 1 772 // CHECK1-NEXT: [[MUL59:%.*]] = mul nsw i64 1, [[DIV58]] 773 // CHECK1-NEXT: [[MUL60:%.*]] = mul nsw i64 [[MUL59]], 4 774 // CHECK1-NEXT: [[MUL61:%.*]] = mul nsw i64 [[DIV56]], [[MUL60]] 775 // CHECK1-NEXT: [[SUB62:%.*]] = sub nsw i64 [[TMP28]], [[MUL61]] 776 // CHECK1-NEXT: [[DIV63:%.*]] = sdiv i64 [[SUB62]], 4 777 // CHECK1-NEXT: [[MUL64:%.*]] = mul nsw i64 [[DIV63]], 4 778 // CHECK1-NEXT: [[SUB65:%.*]] = sub nsw i64 [[SUB51]], [[MUL64]] 779 // CHECK1-NEXT: [[MUL66:%.*]] = mul nsw i64 [[SUB65]], 3 780 // CHECK1-NEXT: [[ADD67:%.*]] = add nsw i64 7, [[MUL66]] 781 // CHECK1-NEXT: [[CONV68:%.*]] = trunc i64 [[ADD67]] to i32 782 // CHECK1-NEXT: store i32 [[CONV68]], ptr [[J17]], align 4 783 // CHECK1-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 8 784 // CHECK1-NEXT: [[ADD69:%.*]] = add nsw i64 [[TMP32]], 1 785 // CHECK1-NEXT: [[SUB70:%.*]] = sub nsw i64 [[ADD69]], 1 786 // CHECK1-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN316]], align 8 787 // CHECK1-NEXT: [[SUB71:%.*]] = sub nsw i64 [[SUB70]], [[TMP33]] 788 // CHECK1-NEXT: store i64 [[SUB71]], ptr [[DOTREVERSED_IV___BEGIN3]], align 8 789 // CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 790 // CHECK1-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN3]], align 8 791 // CHECK1-NEXT: [[MUL72:%.*]] = mul nsw i64 [[TMP35]], 1 792 // CHECK1-NEXT: [[ADD_PTR73:%.*]] = getelementptr inbounds double, ptr [[TMP34]], i64 [[MUL72]] 793 // CHECK1-NEXT: store ptr [[ADD_PTR73]], ptr [[__BEGIN3]], align 8 794 // CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[__BEGIN3]], align 8 795 // CHECK1-NEXT: store ptr [[TMP36]], ptr [[V]], align 8 796 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[K15]], align 4 797 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[C]], align 4 798 // CHECK1-NEXT: [[TMP39:%.*]] = load ptr, ptr [[V]], align 8 799 // CHECK1-NEXT: [[TMP40:%.*]] = load double, ptr [[TMP39]], align 8 800 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[J17]], align 4 801 // CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP37]], i32 noundef [[TMP38]], double noundef [[TMP40]], i32 noundef [[TMP41]]) 802 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 803 // CHECK1: omp.body.continue: 804 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 805 // CHECK1: omp.inner.for.inc: 806 // CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 807 // CHECK1-NEXT: [[ADD74:%.*]] = add nsw i64 [[TMP42]], 1 808 // CHECK1-NEXT: store i64 [[ADD74]], ptr [[DOTOMP_IV]], align 8 809 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 810 // CHECK1: omp.inner.for.end: 811 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 812 // CHECK1: omp.loop.exit: 813 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 814 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 815 // CHECK1: omp.precond.end: 816 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 817 // CHECK1-NEXT: ret void 818 // 819 // 820 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_reverse_codegen.cpp 821 // CHECK1-SAME: () #[[ATTR1]] section ".text.startup" { 822 // CHECK1-NEXT: entry: 823 // CHECK1-NEXT: call void @__cxx_global_var_init() 824 // CHECK1-NEXT: ret void 825 // 826 // 827 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init 828 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] section ".text.startup" { 829 // CHECK2-NEXT: entry: 830 // CHECK2-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s) 831 // CHECK2-NEXT: ret void 832 // 833 // 834 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1Ev 835 // CHECK2-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 836 // CHECK2-NEXT: entry: 837 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 838 // CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 839 // CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 840 // CHECK2-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 841 // CHECK2-NEXT: ret void 842 // 843 // 844 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2Ev 845 // CHECK2-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 846 // CHECK2-NEXT: entry: 847 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 848 // CHECK2-NEXT: [[I2:%.*]] = alloca ptr, align 8 849 // CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 850 // CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 851 // CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 852 // CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 853 // CHECK2-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 854 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 855 // CHECK2-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0 856 // CHECK2-NEXT: store ptr [[I3]], ptr [[I2]], align 8 857 // CHECK2-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4 858 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 859 // CHECK2: for.cond: 860 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 861 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4 862 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 863 // CHECK2: for.body: 864 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 865 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP1]] 866 // CHECK2-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4 867 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 868 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 3 869 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]] 870 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[I2]], align 8 871 // CHECK2-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4 872 // CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[I2]], align 8 873 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 874 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]]) 875 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 876 // CHECK2: for.inc: 877 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 878 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 879 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4 880 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 881 // CHECK2: for.end: 882 // CHECK2-NEXT: ret void 883 // 884 // 885 // CHECK2-LABEL: define {{[^@]+}}@body 886 // CHECK2-SAME: (...) #[[ATTR1]] { 887 // CHECK2-NEXT: entry: 888 // CHECK2-NEXT: ret void 889 // 890 // 891 // CHECK2-LABEL: define {{[^@]+}}@foo1 892 // CHECK2-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR1]] { 893 // CHECK2-NEXT: entry: 894 // CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 895 // CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 896 // CHECK2-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4 897 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 898 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 899 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 900 // CHECK2-NEXT: [[DOTNEW_STEP:%.*]] = alloca i32, align 4 901 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 902 // CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 903 // CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 904 // CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 905 // CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 906 // CHECK2-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4 907 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 908 // CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 909 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 910 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 911 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 912 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 913 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[STEP_ADDR]], align 4 914 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTNEW_STEP]], align 4 915 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 916 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 917 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]] 918 // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 919 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 920 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], [[TMP6]] 921 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 922 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP7]] 923 // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 924 // CHECK2-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 925 // CHECK2-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4 926 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 927 // CHECK2: for.cond: 928 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 929 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 930 // CHECK2-NEXT: [[ADD5:%.*]] = add i32 [[TMP9]], 1 931 // CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP8]], [[ADD5]] 932 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 933 // CHECK2: for.body: 934 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 935 // CHECK2-NEXT: [[ADD6:%.*]] = add i32 [[TMP10]], 1 936 // CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1 937 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 938 // CHECK2-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP11]] 939 // CHECK2-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4 940 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 941 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 942 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4 943 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], [[TMP14]] 944 // CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP12]], [[MUL]] 945 // CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 4 946 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 947 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP15]]) 948 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 949 // CHECK2: for.inc: 950 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 951 // CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP16]], 1 952 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4 953 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 954 // CHECK2: for.end: 955 // CHECK2-NEXT: ret void 956 // 957 // 958 // CHECK2-LABEL: define {{[^@]+}}@foo2 959 // CHECK2-SAME: () #[[ATTR1]] { 960 // CHECK2-NEXT: entry: 961 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 962 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 963 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 964 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 965 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 966 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 967 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 968 // CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 969 // CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 970 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]]) 971 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 972 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 973 // CHECK2-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4 974 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 975 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 976 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 977 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 978 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 3 979 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 980 // CHECK2: cond.true: 981 // CHECK2-NEXT: br label [[COND_END:%.*]] 982 // CHECK2: cond.false: 983 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 984 // CHECK2-NEXT: br label [[COND_END]] 985 // CHECK2: cond.end: 986 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 987 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 988 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 989 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 990 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 991 // CHECK2: omp.inner.for.cond: 992 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 993 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 994 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 995 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 996 // CHECK2: omp.inner.for.body: 997 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 998 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 999 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1000 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 4 1001 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 1002 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP7]] 1003 // CHECK2-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4 1004 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 1005 // CHECK2-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP8]], 3 1006 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]] 1007 // CHECK2-NEXT: store i32 [[ADD3]], ptr [[I]], align 4 1008 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4 1009 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP9]]) 1010 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1011 // CHECK2: omp.body.continue: 1012 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1013 // CHECK2: omp.inner.for.inc: 1014 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1015 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1 1016 // CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1017 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1018 // CHECK2: omp.inner.for.end: 1019 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1020 // CHECK2: omp.loop.exit: 1021 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 1022 // CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[TMP0]]) 1023 // CHECK2-NEXT: ret void 1024 // 1025 // 1026 // CHECK2-LABEL: define {{[^@]+}}@foo3 1027 // CHECK2-SAME: () #[[ATTR1]] { 1028 // CHECK2-NEXT: entry: 1029 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1030 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1031 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1032 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1033 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1034 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1035 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1036 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1037 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1038 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4 1039 // CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 1040 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 1041 // CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 1042 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 1043 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 1044 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1045 // CHECK2-NEXT: store i32 63, ptr [[DOTOMP_UB]], align 4 1046 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1047 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1048 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1049 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1050 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 63 1051 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1052 // CHECK2: cond.true: 1053 // CHECK2-NEXT: br label [[COND_END:%.*]] 1054 // CHECK2: cond.false: 1055 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1056 // CHECK2-NEXT: br label [[COND_END]] 1057 // CHECK2: cond.end: 1058 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 63, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ] 1059 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1060 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1061 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4 1062 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1063 // CHECK2: omp.inner.for.cond: 1064 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1065 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1066 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] 1067 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1068 // CHECK2: omp.inner.for.body: 1069 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1070 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP6]], 16 1071 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 3 1072 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]] 1073 // CHECK2-NEXT: store i32 [[ADD]], ptr [[K]], align 4 1074 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1075 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1076 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP8]], 16 1077 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 16 1078 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], [[MUL5]] 1079 // CHECK2-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB]], 4 1080 // CHECK2-NEXT: [[MUL7:%.*]] = mul nsw i32 [[DIV6]], 1 1081 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]] 1082 // CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTFORWARD_IV_I]], align 4 1083 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1084 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1085 // CHECK2-NEXT: [[DIV9:%.*]] = sdiv i32 [[TMP10]], 16 1086 // CHECK2-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 16 1087 // CHECK2-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP9]], [[MUL10]] 1088 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1089 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1090 // CHECK2-NEXT: [[DIV12:%.*]] = sdiv i32 [[TMP12]], 16 1091 // CHECK2-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 16 1092 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP11]], [[MUL13]] 1093 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 4 1094 // CHECK2-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 4 1095 // CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i32 [[SUB11]], [[MUL16]] 1096 // CHECK2-NEXT: [[MUL18:%.*]] = mul nsw i32 [[SUB17]], 3 1097 // CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 7, [[MUL18]] 1098 // CHECK2-NEXT: store i32 [[ADD19]], ptr [[J]], align 4 1099 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 1100 // CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i32 3, [[TMP13]] 1101 // CHECK2-NEXT: store i32 [[SUB20]], ptr [[DOTREVERSED_IV_I]], align 4 1102 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 1103 // CHECK2-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP14]], 3 1104 // CHECK2-NEXT: [[ADD22:%.*]] = add nsw i32 7, [[MUL21]] 1105 // CHECK2-NEXT: store i32 [[ADD22]], ptr [[I]], align 4 1106 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[K]], align 4 1107 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4 1108 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[J]], align 4 1109 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP15]], i32 noundef [[TMP16]], i32 noundef [[TMP17]]) 1110 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1111 // CHECK2: omp.body.continue: 1112 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1113 // CHECK2: omp.inner.for.inc: 1114 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1115 // CHECK2-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP18]], 1 1116 // CHECK2-NEXT: store i32 [[ADD23]], ptr [[DOTOMP_IV]], align 4 1117 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1118 // CHECK2: omp.inner.for.end: 1119 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1120 // CHECK2: omp.loop.exit: 1121 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 1122 // CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 1123 // CHECK2-NEXT: ret void 1124 // 1125 // 1126 // CHECK2-LABEL: define {{[^@]+}}@foo4 1127 // CHECK2-SAME: () #[[ATTR1]] { 1128 // CHECK2-NEXT: entry: 1129 // CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @foo4.omp_outlined) 1130 // CHECK2-NEXT: ret void 1131 // 1132 // 1133 // CHECK2-LABEL: define {{[^@]+}}@foo4.omp_outlined 1134 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] { 1135 // CHECK2-NEXT: entry: 1136 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1137 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1138 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1139 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1140 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1141 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1142 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1143 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1144 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1145 // CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 1146 // CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 1147 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1148 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1149 // CHECK2-NEXT: store i32 7, ptr [[I]], align 4 1150 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1151 // CHECK2-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4 1152 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1153 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1154 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1155 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1156 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1157 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1158 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 3 1159 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1160 // CHECK2: cond.true: 1161 // CHECK2-NEXT: br label [[COND_END:%.*]] 1162 // CHECK2: cond.false: 1163 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1164 // CHECK2-NEXT: br label [[COND_END]] 1165 // CHECK2: cond.end: 1166 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1167 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1168 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1169 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1170 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1171 // CHECK2: omp.inner.for.cond: 1172 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1173 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1174 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1175 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1176 // CHECK2: omp.inner.for.body: 1177 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1178 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1179 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1180 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 4 1181 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 1182 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP8]] 1183 // CHECK2-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4 1184 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 1185 // CHECK2-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP9]], 3 1186 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]] 1187 // CHECK2-NEXT: store i32 [[ADD3]], ptr [[I]], align 4 1188 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4 1189 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP10]]) 1190 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1191 // CHECK2: omp.body.continue: 1192 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1193 // CHECK2: omp.inner.for.inc: 1194 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1195 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1 1196 // CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4 1197 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1198 // CHECK2: omp.inner.for.end: 1199 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1200 // CHECK2: omp.loop.exit: 1201 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1202 // CHECK2-NEXT: ret void 1203 // 1204 // 1205 // CHECK2-LABEL: define {{[^@]+}}@foo6 1206 // CHECK2-SAME: () #[[ATTR1]] { 1207 // CHECK2-NEXT: entry: 1208 // CHECK2-NEXT: [[ARR:%.*]] = alloca [128 x double], align 16 1209 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 1210 // CHECK2-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8 1211 // CHECK2-NEXT: [[__END2:%.*]] = alloca ptr, align 8 1212 // CHECK2-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8 1213 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 1214 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8 1215 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 1216 // CHECK2-NEXT: [[DOTFORWARD_IV___BEGIN2:%.*]] = alloca i64, align 8 1217 // CHECK2-NEXT: [[DOTREVERSED_IV___BEGIN2:%.*]] = alloca i64, align 8 1218 // CHECK2-NEXT: [[V:%.*]] = alloca ptr, align 8 1219 // CHECK2-NEXT: store i32 42, ptr [[C]], align 4 1220 // CHECK2-NEXT: store ptr [[ARR]], ptr [[__RANGE2]], align 8 1221 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1222 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP0]], i64 0, i64 0 1223 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 128 1224 // CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8 1225 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1226 // CHECK2-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 0 1227 // CHECK2-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8 1228 // CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8 1229 // CHECK2-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 0 1230 // CHECK2-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8 1231 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8 1232 // CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8 1233 // CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8 1234 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1235 // CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64 1236 // CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 1237 // CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 1238 // CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 1239 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 1240 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 1241 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 1242 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1 1243 // CHECK2-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8 1244 // CHECK2-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 1245 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1246 // CHECK2: for.cond: 1247 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 1248 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1249 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1 1250 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]] 1251 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1252 // CHECK2: for.body: 1253 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8 1254 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP8]], 1 1255 // CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i64 [[ADD7]], 1 1256 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 1257 // CHECK2-NEXT: [[SUB9:%.*]] = sub nsw i64 [[SUB8]], [[TMP9]] 1258 // CHECK2-NEXT: store i64 [[SUB9]], ptr [[DOTREVERSED_IV___BEGIN2]], align 8 1259 // CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1260 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN2]], align 8 1261 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP11]], 1 1262 // CHECK2-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds double, ptr [[TMP10]], i64 [[MUL]] 1263 // CHECK2-NEXT: store ptr [[ADD_PTR10]], ptr [[__BEGIN2]], align 8 1264 // CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[__BEGIN2]], align 8 1265 // CHECK2-NEXT: store ptr [[TMP12]], ptr [[V]], align 8 1266 // CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V]], align 8 1267 // CHECK2-NEXT: [[TMP14:%.*]] = load double, ptr [[TMP13]], align 8 1268 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[C]], align 4 1269 // CHECK2-NEXT: call void (...) @body(double noundef [[TMP14]], i32 noundef [[TMP15]]) 1270 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1271 // CHECK2: for.inc: 1272 // CHECK2-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8 1273 // CHECK2-NEXT: [[INC:%.*]] = add nsw i64 [[TMP16]], 1 1274 // CHECK2-NEXT: store i64 [[INC]], ptr [[DOTFORWARD_IV___BEGIN2]], align 8 1275 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 1276 // CHECK2: for.end: 1277 // CHECK2-NEXT: ret void 1278 // 1279 // 1280 // CHECK2-LABEL: define {{[^@]+}}@foo7 1281 // CHECK2-SAME: () #[[ATTR1]] { 1282 // CHECK2-NEXT: entry: 1283 // CHECK2-NEXT: [[A:%.*]] = alloca [128 x double], align 16 1284 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1285 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1286 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i64, align 8 1287 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1288 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 1289 // CHECK2-NEXT: [[__RANGE3:%.*]] = alloca ptr, align 8 1290 // CHECK2-NEXT: [[__END3:%.*]] = alloca ptr, align 8 1291 // CHECK2-NEXT: [[__BEGIN3:%.*]] = alloca ptr, align 8 1292 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8 1293 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca ptr, align 8 1294 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8 1295 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i64, align 8 1296 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i64, align 8 1297 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4 1298 // CHECK2-NEXT: [[DOTFORWARD_IV___BEGIN3:%.*]] = alloca i64, align 8 1299 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4 1300 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1301 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1302 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1303 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1304 // CHECK2-NEXT: [[K15:%.*]] = alloca i32, align 4 1305 // CHECK2-NEXT: [[DOTFORWARD_IV___BEGIN316:%.*]] = alloca i64, align 8 1306 // CHECK2-NEXT: [[J17:%.*]] = alloca i32, align 4 1307 // CHECK2-NEXT: [[DOTREVERSED_IV___BEGIN3:%.*]] = alloca i64, align 8 1308 // CHECK2-NEXT: [[V:%.*]] = alloca ptr, align 8 1309 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]]) 1310 // CHECK2-NEXT: store i32 42, ptr [[C]], align 4 1311 // CHECK2-NEXT: store ptr [[A]], ptr [[__RANGE3]], align 8 1312 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE3]], align 8 1313 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 0 1314 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 128 1315 // CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END3]], align 8 1316 // CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE3]], align 8 1317 // CHECK2-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 0 1318 // CHECK2-NEXT: store ptr [[ARRAYDECAY3]], ptr [[__BEGIN3]], align 8 1319 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__RANGE3]], align 8 1320 // CHECK2-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP3]], i64 0, i64 0 1321 // CHECK2-NEXT: store ptr [[ARRAYDECAY4]], ptr [[DOTCAPTURE_EXPR_]], align 8 1322 // CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[__END3]], align 8 1323 // CHECK2-NEXT: store ptr [[TMP4]], ptr [[DOTCAPTURE_EXPR_5]], align 8 1324 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_5]], align 8 1325 // CHECK2-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1326 // CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64 1327 // CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP6]] to i64 1328 // CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]] 1329 // CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8 1330 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1 1331 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1 1332 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1 1333 // CHECK2-NEXT: [[SUB7:%.*]] = sub nsw i64 [[DIV]], 1 1334 // CHECK2-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_6]], align 8 1335 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 8 1336 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP7]], 1 1337 // CHECK2-NEXT: store i64 [[ADD9]], ptr [[DOTCAPTURE_EXPR_8]], align 8 1338 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1339 // CHECK2-NEXT: [[SUB11:%.*]] = sub nsw i64 [[TMP8]], 0 1340 // CHECK2-NEXT: [[DIV12:%.*]] = sdiv i64 [[SUB11]], 1 1341 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 4, [[DIV12]] 1342 // CHECK2-NEXT: [[MUL13:%.*]] = mul nsw i64 [[MUL]], 4 1343 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL13]], 1 1344 // CHECK2-NEXT: store i64 [[SUB14]], ptr [[DOTCAPTURE_EXPR_10]], align 8 1345 // CHECK2-NEXT: store i32 7, ptr [[K]], align 4 1346 // CHECK2-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN3]], align 8 1347 // CHECK2-NEXT: store i32 7, ptr [[J]], align 4 1348 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1349 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 0, [[TMP9]] 1350 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1351 // CHECK2: omp.precond.then: 1352 // CHECK2-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 1353 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8 1354 // CHECK2-NEXT: store i64 [[TMP10]], ptr [[DOTOMP_UB]], align 8 1355 // CHECK2-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 1356 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1357 // CHECK2-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 1358 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1359 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8 1360 // CHECK2-NEXT: [[CMP18:%.*]] = icmp sgt i64 [[TMP11]], [[TMP12]] 1361 // CHECK2-NEXT: br i1 [[CMP18]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1362 // CHECK2: cond.true: 1363 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8 1364 // CHECK2-NEXT: br label [[COND_END:%.*]] 1365 // CHECK2: cond.false: 1366 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1367 // CHECK2-NEXT: br label [[COND_END]] 1368 // CHECK2: cond.end: 1369 // CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 1370 // CHECK2-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 1371 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 1372 // CHECK2-NEXT: store i64 [[TMP15]], ptr [[DOTOMP_IV]], align 8 1373 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1374 // CHECK2: omp.inner.for.cond: 1375 // CHECK2-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1376 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1377 // CHECK2-NEXT: [[CMP19:%.*]] = icmp sle i64 [[TMP16]], [[TMP17]] 1378 // CHECK2-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1379 // CHECK2: omp.inner.for.body: 1380 // CHECK2-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1381 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1382 // CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i64 [[TMP19]], 0 1383 // CHECK2-NEXT: [[DIV21:%.*]] = sdiv i64 [[SUB20]], 1 1384 // CHECK2-NEXT: [[MUL22:%.*]] = mul nsw i64 1, [[DIV21]] 1385 // CHECK2-NEXT: [[MUL23:%.*]] = mul nsw i64 [[MUL22]], 4 1386 // CHECK2-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[MUL23]] 1387 // CHECK2-NEXT: [[MUL25:%.*]] = mul nsw i64 [[DIV24]], 3 1388 // CHECK2-NEXT: [[ADD26:%.*]] = add nsw i64 7, [[MUL25]] 1389 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[ADD26]] to i32 1390 // CHECK2-NEXT: store i32 [[CONV]], ptr [[K15]], align 4 1391 // CHECK2-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1392 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1393 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1394 // CHECK2-NEXT: [[SUB27:%.*]] = sub nsw i64 [[TMP22]], 0 1395 // CHECK2-NEXT: [[DIV28:%.*]] = sdiv i64 [[SUB27]], 1 1396 // CHECK2-NEXT: [[MUL29:%.*]] = mul nsw i64 1, [[DIV28]] 1397 // CHECK2-NEXT: [[MUL30:%.*]] = mul nsw i64 [[MUL29]], 4 1398 // CHECK2-NEXT: [[DIV31:%.*]] = sdiv i64 [[TMP21]], [[MUL30]] 1399 // CHECK2-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1400 // CHECK2-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], 0 1401 // CHECK2-NEXT: [[DIV33:%.*]] = sdiv i64 [[SUB32]], 1 1402 // CHECK2-NEXT: [[MUL34:%.*]] = mul nsw i64 1, [[DIV33]] 1403 // CHECK2-NEXT: [[MUL35:%.*]] = mul nsw i64 [[MUL34]], 4 1404 // CHECK2-NEXT: [[MUL36:%.*]] = mul nsw i64 [[DIV31]], [[MUL35]] 1405 // CHECK2-NEXT: [[SUB37:%.*]] = sub nsw i64 [[TMP20]], [[MUL36]] 1406 // CHECK2-NEXT: [[DIV38:%.*]] = sdiv i64 [[SUB37]], 4 1407 // CHECK2-NEXT: [[MUL39:%.*]] = mul nsw i64 [[DIV38]], 1 1408 // CHECK2-NEXT: [[ADD40:%.*]] = add nsw i64 0, [[MUL39]] 1409 // CHECK2-NEXT: store i64 [[ADD40]], ptr [[DOTFORWARD_IV___BEGIN316]], align 8 1410 // CHECK2-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1411 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1412 // CHECK2-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1413 // CHECK2-NEXT: [[SUB41:%.*]] = sub nsw i64 [[TMP26]], 0 1414 // CHECK2-NEXT: [[DIV42:%.*]] = sdiv i64 [[SUB41]], 1 1415 // CHECK2-NEXT: [[MUL43:%.*]] = mul nsw i64 1, [[DIV42]] 1416 // CHECK2-NEXT: [[MUL44:%.*]] = mul nsw i64 [[MUL43]], 4 1417 // CHECK2-NEXT: [[DIV45:%.*]] = sdiv i64 [[TMP25]], [[MUL44]] 1418 // CHECK2-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1419 // CHECK2-NEXT: [[SUB46:%.*]] = sub nsw i64 [[TMP27]], 0 1420 // CHECK2-NEXT: [[DIV47:%.*]] = sdiv i64 [[SUB46]], 1 1421 // CHECK2-NEXT: [[MUL48:%.*]] = mul nsw i64 1, [[DIV47]] 1422 // CHECK2-NEXT: [[MUL49:%.*]] = mul nsw i64 [[MUL48]], 4 1423 // CHECK2-NEXT: [[MUL50:%.*]] = mul nsw i64 [[DIV45]], [[MUL49]] 1424 // CHECK2-NEXT: [[SUB51:%.*]] = sub nsw i64 [[TMP24]], [[MUL50]] 1425 // CHECK2-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1426 // CHECK2-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1427 // CHECK2-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1428 // CHECK2-NEXT: [[SUB52:%.*]] = sub nsw i64 [[TMP30]], 0 1429 // CHECK2-NEXT: [[DIV53:%.*]] = sdiv i64 [[SUB52]], 1 1430 // CHECK2-NEXT: [[MUL54:%.*]] = mul nsw i64 1, [[DIV53]] 1431 // CHECK2-NEXT: [[MUL55:%.*]] = mul nsw i64 [[MUL54]], 4 1432 // CHECK2-NEXT: [[DIV56:%.*]] = sdiv i64 [[TMP29]], [[MUL55]] 1433 // CHECK2-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8 1434 // CHECK2-NEXT: [[SUB57:%.*]] = sub nsw i64 [[TMP31]], 0 1435 // CHECK2-NEXT: [[DIV58:%.*]] = sdiv i64 [[SUB57]], 1 1436 // CHECK2-NEXT: [[MUL59:%.*]] = mul nsw i64 1, [[DIV58]] 1437 // CHECK2-NEXT: [[MUL60:%.*]] = mul nsw i64 [[MUL59]], 4 1438 // CHECK2-NEXT: [[MUL61:%.*]] = mul nsw i64 [[DIV56]], [[MUL60]] 1439 // CHECK2-NEXT: [[SUB62:%.*]] = sub nsw i64 [[TMP28]], [[MUL61]] 1440 // CHECK2-NEXT: [[DIV63:%.*]] = sdiv i64 [[SUB62]], 4 1441 // CHECK2-NEXT: [[MUL64:%.*]] = mul nsw i64 [[DIV63]], 4 1442 // CHECK2-NEXT: [[SUB65:%.*]] = sub nsw i64 [[SUB51]], [[MUL64]] 1443 // CHECK2-NEXT: [[MUL66:%.*]] = mul nsw i64 [[SUB65]], 3 1444 // CHECK2-NEXT: [[ADD67:%.*]] = add nsw i64 7, [[MUL66]] 1445 // CHECK2-NEXT: [[CONV68:%.*]] = trunc i64 [[ADD67]] to i32 1446 // CHECK2-NEXT: store i32 [[CONV68]], ptr [[J17]], align 4 1447 // CHECK2-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 8 1448 // CHECK2-NEXT: [[ADD69:%.*]] = add nsw i64 [[TMP32]], 1 1449 // CHECK2-NEXT: [[SUB70:%.*]] = sub nsw i64 [[ADD69]], 1 1450 // CHECK2-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN316]], align 8 1451 // CHECK2-NEXT: [[SUB71:%.*]] = sub nsw i64 [[SUB70]], [[TMP33]] 1452 // CHECK2-NEXT: store i64 [[SUB71]], ptr [[DOTREVERSED_IV___BEGIN3]], align 8 1453 // CHECK2-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8 1454 // CHECK2-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN3]], align 8 1455 // CHECK2-NEXT: [[MUL72:%.*]] = mul nsw i64 [[TMP35]], 1 1456 // CHECK2-NEXT: [[ADD_PTR73:%.*]] = getelementptr inbounds double, ptr [[TMP34]], i64 [[MUL72]] 1457 // CHECK2-NEXT: store ptr [[ADD_PTR73]], ptr [[__BEGIN3]], align 8 1458 // CHECK2-NEXT: [[TMP36:%.*]] = load ptr, ptr [[__BEGIN3]], align 8 1459 // CHECK2-NEXT: store ptr [[TMP36]], ptr [[V]], align 8 1460 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[K15]], align 4 1461 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[C]], align 4 1462 // CHECK2-NEXT: [[TMP39:%.*]] = load ptr, ptr [[V]], align 8 1463 // CHECK2-NEXT: [[TMP40:%.*]] = load double, ptr [[TMP39]], align 8 1464 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[J17]], align 4 1465 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP37]], i32 noundef [[TMP38]], double noundef [[TMP40]], i32 noundef [[TMP41]]) 1466 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1467 // CHECK2: omp.body.continue: 1468 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1469 // CHECK2: omp.inner.for.inc: 1470 // CHECK2-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1471 // CHECK2-NEXT: [[ADD74:%.*]] = add nsw i64 [[TMP42]], 1 1472 // CHECK2-NEXT: store i64 [[ADD74]], ptr [[DOTOMP_IV]], align 8 1473 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1474 // CHECK2: omp.inner.for.end: 1475 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1476 // CHECK2: omp.loop.exit: 1477 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]]) 1478 // CHECK2-NEXT: br label [[OMP_PRECOND_END]] 1479 // CHECK2: omp.precond.end: 1480 // CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]]) 1481 // CHECK2-NEXT: ret void 1482 // 1483 // 1484 // CHECK2-LABEL: define {{[^@]+}}@tfoo5 1485 // CHECK2-SAME: () #[[ATTR1]] { 1486 // CHECK2-NEXT: entry: 1487 // CHECK2-NEXT: call void @_Z4foo5IiTnT_Li3EEvS0_S0_(i32 noundef 0, i32 noundef 42) 1488 // CHECK2-NEXT: ret void 1489 // 1490 // 1491 // CHECK2-LABEL: define {{[^@]+}}@_Z4foo5IiTnT_Li3EEvS0_S0_ 1492 // CHECK2-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]]) #[[ATTR1]] comdat { 1493 // CHECK2-NEXT: entry: 1494 // CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4 1495 // CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4 1496 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1497 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1498 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1499 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1500 // CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4 1501 // CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4 1502 // CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4 1503 // CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4 1504 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4 1505 // CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 1506 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4 1507 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4 1508 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4 1509 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1510 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1511 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1512 // CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]] 1513 // CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1 1514 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 3 1515 // CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 3 1516 // CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1 1517 // CHECK2-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1518 // CHECK2-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4 1519 // CHECK2-NEXT: br label [[FOR_COND:%.*]] 1520 // CHECK2: for.cond: 1521 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 1522 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1523 // CHECK2-NEXT: [[ADD5:%.*]] = add i32 [[TMP6]], 1 1524 // CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP5]], [[ADD5]] 1525 // CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1526 // CHECK2: for.body: 1527 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1528 // CHECK2-NEXT: [[ADD6:%.*]] = add i32 [[TMP7]], 1 1529 // CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1 1530 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 1531 // CHECK2-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP8]] 1532 // CHECK2-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4 1533 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1534 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4 1535 // CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP10]], 3 1536 // CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP9]], [[MUL]] 1537 // CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 4 1538 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1539 // CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP11]]) 1540 // CHECK2-NEXT: br label [[FOR_INC:%.*]] 1541 // CHECK2: for.inc: 1542 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4 1543 // CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP12]], 1 1544 // CHECK2-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4 1545 // CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 1546 // CHECK2: for.end: 1547 // CHECK2-NEXT: ret void 1548 // 1549 // 1550 // CHECK2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_reverse_codegen.cpp 1551 // CHECK2-SAME: () #[[ATTR0]] section ".text.startup" { 1552 // CHECK2-NEXT: entry: 1553 // CHECK2-NEXT: call void @__cxx_global_var_init() 1554 // CHECK2-NEXT: ret void 1555 // 1556