1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 enum omp_allocator_handle_t { 18 omp_null_allocator = 0, 19 omp_default_mem_alloc = 1, 20 omp_large_cap_mem_alloc = 2, 21 omp_const_mem_alloc = 3, 22 omp_high_bw_mem_alloc = 4, 23 omp_low_lat_mem_alloc = 5, 24 omp_cgroup_mem_alloc = 6, 25 omp_pteam_mem_alloc = 7, 26 omp_thread_mem_alloc = 8, 27 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__ 28 }; 29 30 template <class T> 31 struct S { 32 T f; 33 S(T a) : f(a) {} 34 S() : f() {} 35 operator T() { return T(); } 36 ~S() {} 37 }; 38 39 volatile int g __attribute__((aligned(128))) = 1212; 40 41 struct SS { 42 int a; 43 int b : 4; 44 int &c; 45 SS(int &d) : a(0), b(0), c(d) { 46 #pragma omp parallel private(a, b, c) 47 #ifdef LAMBDA 48 [&]() { 49 ++this->a, --b, (this)->c /= 1; 50 #pragma omp parallel private(a, b, c) 51 ++(this)->a, --b, this->c /= 1; 52 }(); 53 #elif defined(BLOCKS) 54 ^{ 55 ++a; 56 --this->b; 57 (this)->c /= 1; 58 #pragma omp parallel private(a, b, c) 59 ++(this)->a, --b, this->c /= 1; 60 }(); 61 #else 62 ++this->a, --b, c /= 1; 63 #endif 64 } 65 }; 66 67 template<typename T> 68 struct SST { 69 T a; 70 SST() : a(T()) { 71 #pragma omp parallel private(a) allocate(omp_large_cap_mem_alloc:a) 72 #ifdef LAMBDA 73 [&]() { 74 [&]() { 75 ++this->a; 76 #pragma omp parallel private(a) 77 ++(this)->a; 78 }(); 79 }(); 80 #elif defined(BLOCKS) 81 ^{ 82 ^{ 83 ++a; 84 #pragma omp parallel private(a) 85 ++(this)->a; 86 }(); 87 }(); 88 #else 89 ++(this)->a; 90 #endif 91 } 92 }; 93 94 template <typename T> 95 T tmain() { 96 S<T> test; 97 SST<T> sst; 98 T t_var __attribute__((aligned(128))) = T(); 99 T vec[] __attribute__((aligned(128))) = {1, 2}; 100 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2}; 101 S<T> var __attribute__((aligned(128))) (3); 102 #pragma omp parallel private(t_var, vec, s_arr, var) 103 { 104 vec[0] = t_var; 105 s_arr[0] = var; 106 } 107 return T(); 108 } 109 110 int main() { 111 static int sivar; 112 SS ss(sivar); 113 #ifdef LAMBDA 114 [&]() { 115 #pragma omp parallel private(g, sivar) 116 { 117 118 119 120 g = 1; 121 sivar = 2; 122 123 124 [&]() { 125 g = 2; 126 sivar = 4; 127 }(); 128 } 129 }(); 130 return 0; 131 #elif defined(BLOCKS) 132 ^{ 133 #pragma omp parallel private(g, sivar) 134 { 135 g = 1; 136 sivar = 20; 137 ^{ 138 g = 2; 139 sivar = 40; 140 }(); 141 } 142 }(); 143 return 0; 144 145 146 #else 147 S<float> test; 148 int t_var = 0; 149 int vec[] = {1, 2}; 150 S<float> s_arr[] = {1, 2}; 151 S<float> var(3); 152 #pragma omp parallel private(t_var, vec, s_arr, var, sivar) 153 { 154 vec[0] = t_var; 155 s_arr[0] = var; 156 sivar = 3; 157 } 158 return tmain<int>(); 159 #endif 160 } 161 162 163 164 165 166 167 168 #endif 169 170 // CHECK1-LABEL: define {{[^@]+}}@main 171 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 172 // CHECK1-NEXT: entry: 173 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 175 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 176 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 177 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 178 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 179 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 180 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 181 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 182 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 183 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 184 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 185 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 186 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 187 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 188 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 189 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 190 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 191 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 192 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 193 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 194 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 195 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 196 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 197 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 198 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 199 // CHECK1: arraydestroy.body: 200 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 201 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 202 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 203 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 204 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 205 // CHECK1: arraydestroy.done1: 206 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 207 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 208 // CHECK1-NEXT: ret i32 [[TMP2]] 209 // 210 // 211 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 212 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 213 // CHECK1-NEXT: entry: 214 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 215 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 216 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 217 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 218 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 219 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 220 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 221 // CHECK1-NEXT: ret void 222 // 223 // 224 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 225 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 226 // CHECK1-NEXT: entry: 227 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 228 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 229 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 230 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 231 // CHECK1-NEXT: ret void 232 // 233 // 234 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 235 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 236 // CHECK1-NEXT: entry: 237 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 238 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 239 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 240 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 241 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 242 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 243 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 244 // CHECK1-NEXT: ret void 245 // 246 // 247 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 248 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 249 // CHECK1-NEXT: entry: 250 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 251 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 252 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 253 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 254 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 255 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 256 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 257 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 258 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 259 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 260 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 261 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 262 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 263 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 264 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 265 // CHECK1: arrayctor.loop: 266 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 267 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 268 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 269 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 270 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 271 // CHECK1: arrayctor.cont: 272 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 273 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 274 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 275 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 276 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 277 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 278 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR]] to i8* 279 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 4, i1 false) 280 // CHECK1-NEXT: store i32 3, i32* [[SIVAR]], align 4 281 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 282 // CHECK1-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 283 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 284 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 285 // CHECK1: arraydestroy.body: 286 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 287 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 288 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 289 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 290 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 291 // CHECK1: arraydestroy.done3: 292 // CHECK1-NEXT: ret void 293 // 294 // 295 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 296 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 297 // CHECK1-NEXT: entry: 298 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 299 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 300 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 301 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 302 // CHECK1-NEXT: ret void 303 // 304 // 305 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 306 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 307 // CHECK1-NEXT: entry: 308 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_1:%.*]], align 4 310 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 311 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 312 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 313 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.1], align 128 314 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_1]], align 128 315 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 1 316 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[TEST]]) 317 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 318 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 319 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 320 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 321 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i64 0, i64 0 322 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 323 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYINIT_BEGIN]], i64 1 324 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 325 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 326 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 327 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 328 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 329 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i32 0, i32 0 330 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAY_BEGIN]], i64 2 331 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 332 // CHECK1: arraydestroy.body: 333 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.1* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 334 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 335 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 336 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 337 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 338 // CHECK1: arraydestroy.done1: 339 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 340 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 341 // CHECK1-NEXT: ret i32 [[TMP2]] 342 // 343 // 344 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 345 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 346 // CHECK1-NEXT: entry: 347 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 348 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 349 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 350 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 351 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 352 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 353 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 354 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 355 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 356 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 357 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 358 // CHECK1-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 359 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 360 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 361 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 362 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 363 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 364 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 365 // CHECK1-NEXT: ret void 366 // 367 // 368 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 369 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 370 // CHECK1-NEXT: entry: 371 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 372 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 373 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 374 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 375 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 376 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 377 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 378 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 379 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 380 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 381 // CHECK1-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 382 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 383 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 384 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 385 // CHECK1-NEXT: store i32* [[A]], i32** [[TMP]], align 8 386 // CHECK1-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 387 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 388 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 389 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 390 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 391 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 392 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP5]], -1 393 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B]], align 4 394 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 395 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 396 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP7]], 1 397 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP6]], align 4 398 // CHECK1-NEXT: ret void 399 // 400 // 401 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 402 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 403 // CHECK1-NEXT: entry: 404 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 405 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 406 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 407 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 408 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 409 // CHECK1-NEXT: ret void 410 // 411 // 412 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 413 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 414 // CHECK1-NEXT: entry: 415 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 416 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 417 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 418 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 419 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 420 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 421 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 422 // CHECK1-NEXT: store float [[TMP0]], float* [[F]], align 4 423 // CHECK1-NEXT: ret void 424 // 425 // 426 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 427 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 428 // CHECK1-NEXT: entry: 429 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 430 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 431 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 432 // CHECK1-NEXT: ret void 433 // 434 // 435 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 436 // CHECK1-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 437 // CHECK1-NEXT: entry: 438 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 439 // CHECK1-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 440 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 441 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS1]]) 442 // CHECK1-NEXT: ret void 443 // 444 // 445 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 446 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 447 // CHECK1-NEXT: entry: 448 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 449 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 450 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 451 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 452 // CHECK1-NEXT: ret void 453 // 454 // 455 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 456 // CHECK1-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 457 // CHECK1-NEXT: entry: 458 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 459 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 460 // CHECK1-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 461 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 462 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 463 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 464 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 465 // CHECK1-NEXT: ret void 466 // 467 // 468 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 469 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 470 // CHECK1-NEXT: entry: 471 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 472 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 473 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 474 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 475 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 476 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.1], align 128 477 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_1:%.*]], align 128 478 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 479 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 480 // CHECK1-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 481 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 482 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i32 0, i32 0 483 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAY_BEGIN]], i64 2 484 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 485 // CHECK1: arrayctor.loop: 486 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.1* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 487 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 488 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYCTOR_CUR]], i64 1 489 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.1* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 490 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 491 // CHECK1: arrayctor.cont: 492 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]]) 493 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 128 494 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 495 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 496 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i64 0, i64 0 497 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast %struct.S.1* [[ARRAYIDX1]] to i8* 498 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast %struct.S.1* [[VAR]] to i8* 499 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i64 4, i1 false) 500 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 501 // CHECK1-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i32 0, i32 0 502 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAY_BEGIN2]], i64 2 503 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 504 // CHECK1: arraydestroy.body: 505 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.1* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 506 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 507 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 508 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 509 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 510 // CHECK1: arraydestroy.done3: 511 // CHECK1-NEXT: ret void 512 // 513 // 514 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 515 // CHECK1-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 516 // CHECK1-NEXT: entry: 517 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 518 // CHECK1-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 519 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 520 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 521 // CHECK1-NEXT: ret void 522 // 523 // 524 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 525 // CHECK1-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 526 // CHECK1-NEXT: entry: 527 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 528 // CHECK1-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 529 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 530 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_1:%.*]], %struct.S.1* [[THIS1]], i32 0, i32 0 531 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 532 // CHECK1-NEXT: ret void 533 // 534 // 535 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 536 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 537 // CHECK1-NEXT: entry: 538 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 539 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 540 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 541 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 542 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 543 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 544 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 545 // CHECK1-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 8 546 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 547 // CHECK1-NEXT: ret void 548 // 549 // 550 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 551 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 552 // CHECK1-NEXT: entry: 553 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 554 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 555 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 556 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 557 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 558 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 559 // CHECK1-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 560 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 561 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 562 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 8 563 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 564 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 565 // CHECK1-NEXT: [[DOTA__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i64 4, i8* inttoptr (i64 2 to i8*)) 566 // CHECK1-NEXT: [[DOTA__ADDR:%.*]] = bitcast i8* [[DOTA__VOID_ADDR]] to i32* 567 // CHECK1-NEXT: store i32* [[DOTA__ADDR]], i32** [[TMP]], align 8 568 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 569 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 570 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 571 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP5]], align 4 572 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTA__ADDR]] to i8* 573 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP7]], i8* inttoptr (i64 2 to i8*)) 574 // CHECK1-NEXT: ret void 575 // 576 // 577 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 578 // CHECK1-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 579 // CHECK1-NEXT: entry: 580 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 581 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 582 // CHECK1-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 583 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 584 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 585 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_1:%.*]], %struct.S.1* [[THIS1]], i32 0, i32 0 586 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 587 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 588 // CHECK1-NEXT: ret void 589 // 590 // 591 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 592 // CHECK1-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 593 // CHECK1-NEXT: entry: 594 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 595 // CHECK1-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 596 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 597 // CHECK1-NEXT: ret void 598 // 599 // 600 // CHECK2-LABEL: define {{[^@]+}}@main 601 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 602 // CHECK2-NEXT: entry: 603 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 604 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 605 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 606 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 607 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 608 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 609 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 610 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 611 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 612 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 613 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 614 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 615 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 616 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 617 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 618 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 619 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 620 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 621 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 622 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 623 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 624 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 625 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]] 626 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 627 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 628 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 629 // CHECK2: arraydestroy.body: 630 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 631 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 632 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 633 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 634 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 635 // CHECK2: arraydestroy.done1: 636 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 637 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 638 // CHECK2-NEXT: ret i32 [[TMP2]] 639 // 640 // 641 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 642 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 643 // CHECK2-NEXT: entry: 644 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 645 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 646 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 647 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 648 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 649 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 650 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 651 // CHECK2-NEXT: ret void 652 // 653 // 654 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 655 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 656 // CHECK2-NEXT: entry: 657 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 658 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 659 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 660 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 661 // CHECK2-NEXT: ret void 662 // 663 // 664 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 665 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 666 // CHECK2-NEXT: entry: 667 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 668 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 669 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 670 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 671 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 672 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 673 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 674 // CHECK2-NEXT: ret void 675 // 676 // 677 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 678 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 679 // CHECK2-NEXT: entry: 680 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 681 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 682 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 683 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 684 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 685 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 686 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 687 // CHECK2-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 688 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 689 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 690 // CHECK2-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 691 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 692 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 693 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 694 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 695 // CHECK2: arrayctor.loop: 696 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 697 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 698 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 699 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 700 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 701 // CHECK2: arrayctor.cont: 702 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 703 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 704 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 705 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 4 706 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 707 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 708 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[VAR]] to i8* 709 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i64 4, i1 false) 710 // CHECK2-NEXT: store i32 3, i32* [[SIVAR]], align 4 711 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 712 // CHECK2-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 713 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2 714 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 715 // CHECK2: arraydestroy.body: 716 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 717 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 718 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 719 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 720 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 721 // CHECK2: arraydestroy.done3: 722 // CHECK2-NEXT: ret void 723 // 724 // 725 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 726 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 727 // CHECK2-NEXT: entry: 728 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 729 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 730 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 731 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 732 // CHECK2-NEXT: ret void 733 // 734 // 735 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 736 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat { 737 // CHECK2-NEXT: entry: 738 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 739 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_1:%.*]], align 4 740 // CHECK2-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 741 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 742 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 743 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.1], align 128 744 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_1]], align 128 745 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 1 746 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[TEST]]) 747 // CHECK2-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 748 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 128 749 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 750 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 751 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i64 0, i64 0 752 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 753 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYINIT_BEGIN]], i64 1 754 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 755 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 756 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 757 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 758 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 759 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i32 0, i32 0 760 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAY_BEGIN]], i64 2 761 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 762 // CHECK2: arraydestroy.body: 763 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.1* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 764 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 765 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 766 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 767 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 768 // CHECK2: arraydestroy.done1: 769 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 770 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 771 // CHECK2-NEXT: ret i32 [[TMP2]] 772 // 773 // 774 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 775 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 776 // CHECK2-NEXT: entry: 777 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 778 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 779 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 780 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 781 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 782 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 783 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 784 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 785 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 786 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 787 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 788 // CHECK2-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 789 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 790 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 791 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 792 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 793 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 794 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 795 // CHECK2-NEXT: ret void 796 // 797 // 798 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 799 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 800 // CHECK2-NEXT: entry: 801 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 802 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 803 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 804 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 805 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 806 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 807 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 808 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 809 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 810 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 811 // CHECK2-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 812 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 813 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 814 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 815 // CHECK2-NEXT: store i32* [[A]], i32** [[TMP]], align 8 816 // CHECK2-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 817 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 818 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 819 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 820 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 821 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 822 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP5]], -1 823 // CHECK2-NEXT: store i32 [[DEC]], i32* [[B]], align 4 824 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 825 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 826 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP7]], 1 827 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP6]], align 4 828 // CHECK2-NEXT: ret void 829 // 830 // 831 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 832 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 833 // CHECK2-NEXT: entry: 834 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 835 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 836 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 837 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 838 // CHECK2-NEXT: store float 0.000000e+00, float* [[F]], align 4 839 // CHECK2-NEXT: ret void 840 // 841 // 842 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 843 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 844 // CHECK2-NEXT: entry: 845 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 846 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 847 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 848 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 849 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 850 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 851 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 852 // CHECK2-NEXT: store float [[TMP0]], float* [[F]], align 4 853 // CHECK2-NEXT: ret void 854 // 855 // 856 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 857 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 858 // CHECK2-NEXT: entry: 859 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 860 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 861 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 862 // CHECK2-NEXT: ret void 863 // 864 // 865 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 866 // CHECK2-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 867 // CHECK2-NEXT: entry: 868 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 869 // CHECK2-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 870 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 871 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS1]]) 872 // CHECK2-NEXT: ret void 873 // 874 // 875 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 876 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 877 // CHECK2-NEXT: entry: 878 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 879 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 880 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 881 // CHECK2-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 882 // CHECK2-NEXT: ret void 883 // 884 // 885 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 886 // CHECK2-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 887 // CHECK2-NEXT: entry: 888 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 889 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 890 // CHECK2-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 891 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 892 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 893 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 894 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 895 // CHECK2-NEXT: ret void 896 // 897 // 898 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 899 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 900 // CHECK2-NEXT: entry: 901 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 902 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 903 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 904 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 905 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128 906 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.1], align 128 907 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_1:%.*]], align 128 908 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 909 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 910 // CHECK2-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 911 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 912 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i32 0, i32 0 913 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAY_BEGIN]], i64 2 914 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 915 // CHECK2: arrayctor.loop: 916 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.1* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 917 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 918 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYCTOR_CUR]], i64 1 919 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.1* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 920 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 921 // CHECK2: arrayctor.cont: 922 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]]) 923 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 128 924 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0 925 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX]], align 128 926 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i64 0, i64 0 927 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast %struct.S.1* [[ARRAYIDX1]] to i8* 928 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast %struct.S.1* [[VAR]] to i8* 929 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP2]], i8* align 128 [[TMP3]], i64 4, i1 false) 930 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 931 // CHECK2-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.1], [2 x %struct.S.1]* [[S_ARR]], i32 0, i32 0 932 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAY_BEGIN2]], i64 2 933 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 934 // CHECK2: arraydestroy.body: 935 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.1* [ [[TMP4]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 936 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_1]], %struct.S.1* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 937 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 938 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.1* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]] 939 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]] 940 // CHECK2: arraydestroy.done3: 941 // CHECK2-NEXT: ret void 942 // 943 // 944 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 945 // CHECK2-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 946 // CHECK2-NEXT: entry: 947 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 948 // CHECK2-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 949 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 950 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 951 // CHECK2-NEXT: ret void 952 // 953 // 954 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 955 // CHECK2-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 956 // CHECK2-NEXT: entry: 957 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 958 // CHECK2-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 959 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 960 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_1:%.*]], %struct.S.1* [[THIS1]], i32 0, i32 0 961 // CHECK2-NEXT: store i32 0, i32* [[F]], align 4 962 // CHECK2-NEXT: ret void 963 // 964 // 965 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 966 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 967 // CHECK2-NEXT: entry: 968 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 969 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 970 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 971 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 972 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 973 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 974 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 975 // CHECK2-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 8 976 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 977 // CHECK2-NEXT: ret void 978 // 979 // 980 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 981 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 982 // CHECK2-NEXT: entry: 983 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 984 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 985 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 986 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 987 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 988 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 989 // CHECK2-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 990 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 991 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 992 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 8 993 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 994 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 995 // CHECK2-NEXT: [[DOTA__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i64 4, i8* inttoptr (i64 2 to i8*)) 996 // CHECK2-NEXT: [[DOTA__ADDR:%.*]] = bitcast i8* [[DOTA__VOID_ADDR]] to i32* 997 // CHECK2-NEXT: store i32* [[DOTA__ADDR]], i32** [[TMP]], align 8 998 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 999 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1000 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1 1001 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP5]], align 4 1002 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast i32* [[DOTA__ADDR]] to i8* 1003 // CHECK2-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP7]], i8* inttoptr (i64 2 to i8*)) 1004 // CHECK2-NEXT: ret void 1005 // 1006 // 1007 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1008 // CHECK2-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1009 // CHECK2-NEXT: entry: 1010 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 1011 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1012 // CHECK2-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 1013 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1014 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 1015 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_1:%.*]], %struct.S.1* [[THIS1]], i32 0, i32 0 1016 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1017 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1018 // CHECK2-NEXT: ret void 1019 // 1020 // 1021 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1022 // CHECK2-SAME: (%struct.S.1* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1023 // CHECK2-NEXT: entry: 1024 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.1*, align 8 1025 // CHECK2-NEXT: store %struct.S.1* [[THIS]], %struct.S.1** [[THIS_ADDR]], align 8 1026 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.1*, %struct.S.1** [[THIS_ADDR]], align 8 1027 // CHECK2-NEXT: ret void 1028 // 1029 // 1030 // CHECK3-LABEL: define {{[^@]+}}@main 1031 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1032 // CHECK3-NEXT: entry: 1033 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1034 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1035 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1036 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1037 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1038 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 1039 // CHECK3-NEXT: ret i32 0 1040 // 1041 // 1042 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1043 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1044 // CHECK3-NEXT: entry: 1045 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1046 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1047 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1048 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1049 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1050 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1051 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1052 // CHECK3-NEXT: ret void 1053 // 1054 // 1055 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1056 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1057 // CHECK3-NEXT: entry: 1058 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1059 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1060 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 1061 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1062 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1063 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1064 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1065 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 1066 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1067 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1068 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1069 // CHECK3-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1070 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1071 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1072 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1073 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1074 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 1075 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1076 // CHECK3-NEXT: ret void 1077 // 1078 // 1079 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1080 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 1081 // CHECK3-NEXT: entry: 1082 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1083 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1084 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 1085 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1086 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1087 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1088 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 1089 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1090 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1091 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1092 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1093 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 1094 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 1095 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 1096 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 1097 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1098 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1099 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1100 // CHECK3-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[TMP3]], align 8 1101 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1102 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 1103 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[TMP4]], align 8 1104 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1105 // CHECK3-NEXT: store i32* [[B]], i32** [[TMP6]], align 8 1106 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1107 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP1]], align 8 1108 // CHECK3-NEXT: store i32* [[TMP8]], i32** [[TMP7]], align 8 1109 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 1110 // CHECK3-NEXT: ret void 1111 // 1112 // 1113 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 1114 // CHECK3-SAME: (%class.anon.0* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 { 1115 // CHECK3-NEXT: entry: 1116 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 1117 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 1118 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 1119 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 1120 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 1121 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 1122 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 1123 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 1124 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1125 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1126 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1127 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 1128 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1129 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1130 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 1131 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 1132 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 1133 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 1134 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1135 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1136 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1137 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1138 // CHECK3-NEXT: store %struct.SS* [[TMP1]], %struct.SS** [[TMP11]], align 8 1139 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 1140 // CHECK3-NEXT: ret void 1141 // 1142 // 1143 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1144 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1145 // CHECK3-NEXT: entry: 1146 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1147 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1148 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 1149 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 1150 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1151 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 1152 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 1153 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1154 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1155 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1156 // CHECK3-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1157 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1158 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1159 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 1160 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1161 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1162 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 1163 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1164 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1165 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1166 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 1167 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP5]], -1 1168 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1169 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 1170 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1171 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP7]], 1 1172 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP6]], align 4 1173 // CHECK3-NEXT: ret void 1174 // 1175 // 1176 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1177 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1178 // CHECK3-NEXT: entry: 1179 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1180 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1181 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 1182 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 1183 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1184 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 8 1185 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1186 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1187 // CHECK3-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 1188 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 1189 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128 1190 // CHECK3-NEXT: store i32 2, i32* [[SIVAR]], align 4 1191 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 0 1192 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP1]], align 8 1193 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_3]], %class.anon.3* [[REF_TMP]], i32 0, i32 1 1194 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[TMP2]], align 8 1195 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.3* nonnull align 8 dereferenceable(16) [[REF_TMP]]) 1196 // CHECK3-NEXT: ret void 1197 // 1198 // 1199 // CHECK4-LABEL: define {{[^@]+}}@main 1200 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 1201 // CHECK4-NEXT: entry: 1202 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1203 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1204 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1205 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar) 1206 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 1207 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 1208 // CHECK4-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 1209 // CHECK4-NEXT: ret i32 0 1210 // 1211 // 1212 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1213 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat align 2 { 1214 // CHECK4-NEXT: entry: 1215 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1216 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1217 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1218 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1219 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1220 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1221 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 1222 // CHECK4-NEXT: ret void 1223 // 1224 // 1225 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 1226 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1227 // CHECK4-NEXT: entry: 1228 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1229 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 1230 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 1231 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1232 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 1233 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 1234 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1235 // CHECK4-NEXT: ret void 1236 // 1237 // 1238 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1239 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 1240 // CHECK4-NEXT: entry: 1241 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1242 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1243 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 1244 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 128 1245 // CHECK4-NEXT: [[SIVAR:%.*]] = alloca i32, align 4 1246 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, align 128 1247 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1248 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1249 // CHECK4-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 1250 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 1251 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 1252 // CHECK4-NEXT: store i32 20, i32* [[SIVAR]], align 4 1253 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 1254 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 1255 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 1256 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1257 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 1258 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1259 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 1260 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16 1261 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 1262 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1263 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 1264 // CHECK4-NEXT: [[TMP1:%.*]] = load volatile i32, i32* [[G]], align 128 1265 // CHECK4-NEXT: store volatile i32 [[TMP1]], i32* [[BLOCK_CAPTURED]], align 128 1266 // CHECK4-NEXT: [[BLOCK_CAPTURED1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 1267 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[SIVAR]], align 4 1268 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[BLOCK_CAPTURED1]], align 32 1269 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]] to void ()* 1270 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP3]] to %struct.__block_literal_generic* 1271 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1272 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1273 // CHECK4-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP4]], align 8 1274 // CHECK4-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to void (i8*)* 1275 // CHECK4-NEXT: call void [[TMP7]](i8* [[TMP5]]) 1276 // CHECK4-NEXT: ret void 1277 // 1278 // 1279 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 1280 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1281 // CHECK4-NEXT: entry: 1282 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1283 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>*, align 8 1284 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1285 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* 1286 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>** [[BLOCK_ADDR]], align 8 1287 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 7 1288 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 1289 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32, [92 x i8], i32 }>* [[BLOCK]], i32 0, i32 5 1290 // CHECK4-NEXT: store i32 40, i32* [[BLOCK_CAPTURE_ADDR1]], align 32 1291 // CHECK4-NEXT: ret void 1292 // 1293 // 1294 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1295 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] comdat align 2 { 1296 // CHECK4-NEXT: entry: 1297 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1298 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1299 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 1300 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1301 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1302 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1303 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1304 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 1305 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1306 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1307 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1308 // CHECK4-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1309 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1310 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1311 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1312 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1313 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 1314 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 1315 // CHECK4-NEXT: ret void 1316 // 1317 // 1318 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 1319 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1320 // CHECK4-NEXT: entry: 1321 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1322 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1323 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 1324 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 1325 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1326 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 1327 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 1328 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1329 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 1330 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1331 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1332 // CHECK4-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 1333 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 1334 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 1335 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 1336 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1337 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1338 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 1339 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 1340 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 1341 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1342 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 1343 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1344 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 1345 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 1346 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 1347 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.4 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1348 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1349 // CHECK4-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 1350 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1351 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 1352 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[BLOCK_CAPTURED]], align 8 1353 // CHECK4-NEXT: [[BLOCK_CAPTURED2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1354 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B]], align 4 1355 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[BLOCK_CAPTURED2]], align 8 1356 // CHECK4-NEXT: [[BLOCK_CAPTURED3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1357 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 1358 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[BLOCK_CAPTURED3]], align 8 1359 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 1360 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP6]] to %struct.__block_literal_generic* 1361 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1362 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1363 // CHECK4-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP7]], align 8 1364 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to void (i8*)* 1365 // CHECK4-NEXT: call void [[TMP10]](i8* [[TMP8]]) 1366 // CHECK4-NEXT: ret void 1367 // 1368 // 1369 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2 1370 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1371 // CHECK4-NEXT: entry: 1372 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1373 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 1374 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 1375 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1376 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 1377 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 1378 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 1379 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 1380 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 1381 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 1382 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1383 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 1384 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 1385 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 1386 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 1387 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 1388 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 1389 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 1390 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 1391 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1392 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 1393 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 1394 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1395 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[TMP5]], align 8 1396 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 1397 // CHECK4-NEXT: ret void 1398 // 1399 // 1400 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 1401 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR3]] { 1402 // CHECK4-NEXT: entry: 1403 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1404 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1405 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 1406 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 1407 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1408 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 1409 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 1410 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1411 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1412 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1413 // CHECK4-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1414 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1415 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1416 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 1417 // CHECK4-NEXT: store i32* [[A]], i32** [[TMP]], align 8 1418 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8 1419 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8 1420 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1421 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1422 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1423 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[B]], align 4 1424 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP5]], -1 1425 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1426 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 1427 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1428 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP7]], 1 1429 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP6]], align 4 1430 // CHECK4-NEXT: ret void 1431 // 1432