1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test target codegen - host bc file has to be created first.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -fopenmp-optimistic-collapse -o - | FileCheck %s --check-prefix=CHECK2
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
7 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3
8 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3
9
10 // expected-no-diagnostics
11 #ifndef HEADER
12 #define HEADER
13
14 #define N 1000
15 #define M 10
16
17 template<typename tx>
ftemplate(int n)18 tx ftemplate(int n) {
19 tx a[N];
20 short aa[N];
21 tx b[10];
22 tx c[M][M];
23 tx f = n;
24 tx l;
25 int k;
26 tx *v;
27
28 #pragma omp target teams loop map(tofrom: aa) num_teams(M) thread_limit(64)
29 for(int i = 0; i < n; i++) {
30 aa[i] += 1;
31 }
32
33 #pragma omp target teams loop map(tofrom:a, aa, b) if(target: n>40)
34 for(int i = 0; i < 10; i++) {
35 b[i] += 1;
36 }
37
38 #pragma omp target teams loop collapse(2) firstprivate(f) private(k)
39 for(int i = 0; i < M; i++) {
40 for(int j = 0; j < M; j++) {
41 k = M;
42 c[i][j] = i + j * f + k;
43 }
44 }
45
46 #pragma omp target teams loop collapse(2)
47 for(int i = 0; i < n; i++) {
48 for(int j = 0; j < n; j++) {
49 c[i][j] = i + j;
50 }
51 }
52
53 #pragma omp target teams loop map(a, v[:N])
54 for(int i = 0; i < n; i++)
55 a[i] = v[i];
56 return a[0];
57 }
58
bar(int n)59 int bar(int n){
60 int a = 0;
61
62 a += ftemplate<int>(n);
63
64 return a;
65 }
66
67 #endif
68 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
69 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0:[0-9]+]] {
70 // CHECK1-NEXT: entry:
71 // CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
72 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
73 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
74 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
75 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
76 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
77 // CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
78 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
79 // CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
80 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
81 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_kernel_environment, ptr [[DYN_PTR]])
82 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
83 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
84 // CHECK1: user_code.entry:
85 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
86 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
87 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
88 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
89 // CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
90 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
91 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2:[0-9]+]]
92 // CHECK1-NEXT: call void @__kmpc_target_deinit()
93 // CHECK1-NEXT: ret void
94 // CHECK1: worker.exit:
95 // CHECK1-NEXT: ret void
96 //
97 //
98 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined
99 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1:[0-9]+]] {
100 // CHECK1-NEXT: entry:
101 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
102 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
103 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
104 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
105 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
106 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
107 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
108 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
109 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
110 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
111 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
112 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
113 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
114 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
115 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
116 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8
117 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
118 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
119 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
120 // CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
121 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
122 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
123 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
124 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
125 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
126 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
127 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
128 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
129 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4
130 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
131 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
132 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
133 // CHECK1: omp.precond.then:
134 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
135 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
136 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
137 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
138 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
139 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
140 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
141 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
142 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
143 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
144 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
145 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
146 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
147 // CHECK1: cond.true:
148 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
149 // CHECK1-NEXT: br label [[COND_END:%.*]]
150 // CHECK1: cond.false:
151 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
152 // CHECK1-NEXT: br label [[COND_END]]
153 // CHECK1: cond.end:
154 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
155 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
156 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
157 // CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
158 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
159 // CHECK1: omp.inner.for.cond:
160 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
161 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
162 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
163 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
164 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
165 // CHECK1: omp.inner.for.body:
166 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
167 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
168 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
169 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
170 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
171 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4
172 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
173 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
174 // CHECK1-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to ptr
175 // CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 8
176 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
177 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to ptr
178 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP22]], align 8
179 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
180 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to ptr
181 // CHECK1-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8
182 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
183 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP26]], align 8
184 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
185 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
186 // CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP28]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)
187 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
188 // CHECK1: omp.inner.for.inc:
189 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
190 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
191 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
192 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
193 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
194 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
195 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
196 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4
197 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
198 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
199 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
200 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4
201 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
203 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
204 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
205 // CHECK1: cond.true10:
206 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
207 // CHECK1-NEXT: br label [[COND_END12:%.*]]
208 // CHECK1: cond.false11:
209 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
210 // CHECK1-NEXT: br label [[COND_END12]]
211 // CHECK1: cond.end12:
212 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
213 // CHECK1-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4
214 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
215 // CHECK1-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_IV]], align 4
216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
217 // CHECK1: omp.inner.for.end:
218 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
219 // CHECK1: omp.loop.exit:
220 // CHECK1-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
221 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4
222 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP41]])
223 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
224 // CHECK1: omp.precond.end:
225 // CHECK1-NEXT: ret void
226 //
227 //
228 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined
229 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
230 // CHECK1-NEXT: entry:
231 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
232 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
233 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
234 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
235 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
236 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
237 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
238 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
240 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
241 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
242 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
246 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
247 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
248 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
249 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
250 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
251 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
252 // CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
253 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
254 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
255 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
256 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
257 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
258 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
259 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
260 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
261 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4
262 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
263 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
264 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
265 // CHECK1: omp.precond.then:
266 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
267 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
268 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
269 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
270 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
271 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
272 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
273 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
274 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
275 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
276 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
277 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
278 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
279 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
280 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
281 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
282 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
283 // CHECK1: omp.inner.for.cond:
284 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
285 // CHECK1-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i64
286 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
287 // CHECK1-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]
288 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
289 // CHECK1: omp.inner.for.body:
290 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
291 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
292 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
293 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4
294 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I4]], align 4
295 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
296 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
297 // CHECK1-NEXT: [[TMP14:%.*]] = load i16, ptr [[ARRAYIDX]], align 2
298 // CHECK1-NEXT: [[CONV7:%.*]] = sext i16 [[TMP14]] to i32
299 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[CONV7]], 1
300 // CHECK1-NEXT: [[CONV9:%.*]] = trunc i32 [[ADD8]] to i16
301 // CHECK1-NEXT: store i16 [[CONV9]], ptr [[ARRAYIDX]], align 2
302 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
303 // CHECK1: omp.body.continue:
304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
305 // CHECK1: omp.inner.for.inc:
306 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
307 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
308 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
309 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
310 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
311 // CHECK1: omp.inner.for.end:
312 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
313 // CHECK1: omp.loop.exit:
314 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
315 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
316 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP18]])
317 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
318 // CHECK1: omp.precond.end:
319 // CHECK1-NEXT: ret void
320 //
321 //
322 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33
323 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR4:[0-9]+]] {
324 // CHECK1-NEXT: entry:
325 // CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
326 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
327 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
328 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
329 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
330 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
331 // CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
332 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
333 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
334 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
335 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_kernel_environment, ptr [[DYN_PTR]])
336 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
337 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
338 // CHECK1: user_code.entry:
339 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
340 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
341 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
342 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
343 // CHECK1-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
344 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
345 // CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
346 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
347 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]
348 // CHECK1-NEXT: call void @__kmpc_target_deinit()
349 // CHECK1-NEXT: ret void
350 // CHECK1: worker.exit:
351 // CHECK1-NEXT: ret void
352 //
353 //
354 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined
355 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
356 // CHECK1-NEXT: entry:
357 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
358 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
359 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
360 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
361 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
362 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
364 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
365 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
366 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
367 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
368 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 8
369 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
370 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
371 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
372 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
373 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
374 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
375 // CHECK1-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
376 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
377 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
378 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
379 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
380 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
381 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
382 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
383 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
384 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
385 // CHECK1: cond.true:
386 // CHECK1-NEXT: br label [[COND_END:%.*]]
387 // CHECK1: cond.false:
388 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
389 // CHECK1-NEXT: br label [[COND_END]]
390 // CHECK1: cond.end:
391 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
392 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
393 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
394 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
395 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
396 // CHECK1: omp.inner.for.cond:
397 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
398 // CHECK1-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
399 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
400 // CHECK1: omp.inner.for.body:
401 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
402 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
403 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
404 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
405 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
406 // CHECK1-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to ptr
407 // CHECK1-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8
408 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
409 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to ptr
410 // CHECK1-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8
411 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
412 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP15]], align 8
413 // CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3)
414 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
415 // CHECK1: omp.inner.for.inc:
416 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
417 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
418 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
419 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
420 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
421 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
422 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
423 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
424 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
425 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
426 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
427 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
428 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
429 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
430 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
431 // CHECK1: cond.true5:
432 // CHECK1-NEXT: br label [[COND_END7:%.*]]
433 // CHECK1: cond.false6:
434 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
435 // CHECK1-NEXT: br label [[COND_END7]]
436 // CHECK1: cond.end7:
437 // CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
438 // CHECK1-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
439 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
440 // CHECK1-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV]], align 4
441 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
442 // CHECK1: omp.inner.for.end:
443 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
444 // CHECK1: omp.loop.exit:
445 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])
446 // CHECK1-NEXT: ret void
447 //
448 //
449 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined
450 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
451 // CHECK1-NEXT: entry:
452 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
453 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
454 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
455 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
456 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
457 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
458 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
459 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
460 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
461 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
462 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
463 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
464 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
465 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
466 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
467 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
468 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
469 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
470 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
471 // CHECK1-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
472 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
473 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
474 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
475 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
476 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
477 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
478 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
479 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
480 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
481 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
482 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
483 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
484 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
485 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
486 // CHECK1: omp.inner.for.cond:
487 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
488 // CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
489 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
490 // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
491 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
492 // CHECK1: omp.inner.for.body:
493 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
494 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
495 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
496 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
497 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
498 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
499 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
500 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
501 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
502 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[ARRAYIDX]], align 4
503 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
504 // CHECK1: omp.body.continue:
505 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
506 // CHECK1: omp.inner.for.inc:
507 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
508 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
509 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
510 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
512 // CHECK1: omp.inner.for.end:
513 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
514 // CHECK1: omp.loop.exit:
515 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
516 // CHECK1-NEXT: ret void
517 //
518 //
519 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
520 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR4]] {
521 // CHECK1-NEXT: entry:
522 // CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
523 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
524 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
525 // CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
526 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
527 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
528 // CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
529 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
530 // CHECK1-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8
531 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
532 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_kernel_environment, ptr [[DYN_PTR]])
533 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
534 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
535 // CHECK1: user_code.entry:
536 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
537 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[F_ADDR]], align 4
538 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[F_CASTED]], align 4
539 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[F_CASTED]], align 8
540 // CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
541 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
542 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]
543 // CHECK1-NEXT: call void @__kmpc_target_deinit()
544 // CHECK1-NEXT: ret void
545 // CHECK1: worker.exit:
546 // CHECK1-NEXT: ret void
547 //
548 //
549 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined
550 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
551 // CHECK1-NEXT: entry:
552 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
553 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
554 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
555 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
556 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
557 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
558 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
559 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
560 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
561 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
562 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
566 // CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
567 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8
568 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
569 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
570 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
571 // CHECK1-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8
572 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
573 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
574 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
575 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
576 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
577 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
578 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
579 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
580 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
581 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
582 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
583 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
584 // CHECK1: cond.true:
585 // CHECK1-NEXT: br label [[COND_END:%.*]]
586 // CHECK1: cond.false:
587 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
588 // CHECK1-NEXT: br label [[COND_END]]
589 // CHECK1: cond.end:
590 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
591 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
592 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
593 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
594 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
595 // CHECK1: omp.inner.for.cond:
596 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
597 // CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
598 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
599 // CHECK1: omp.inner.for.body:
600 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
601 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
602 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
603 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
604 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[F_ADDR]], align 4
605 // CHECK1-NEXT: store i32 [[TMP11]], ptr [[F_CASTED]], align 4
606 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[F_CASTED]], align 8
607 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
608 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to ptr
609 // CHECK1-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8
610 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
611 // CHECK1-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to ptr
612 // CHECK1-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 8
613 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
614 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP17]], align 8
615 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
616 // CHECK1-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP12]] to ptr
617 // CHECK1-NEXT: store ptr [[TMP19]], ptr [[TMP18]], align 8
618 // CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)
619 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
620 // CHECK1: omp.inner.for.inc:
621 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
622 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
623 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
624 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
625 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
626 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
627 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
628 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4
629 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
630 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
631 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
632 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4
633 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
634 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
635 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
636 // CHECK1: cond.true6:
637 // CHECK1-NEXT: br label [[COND_END8:%.*]]
638 // CHECK1: cond.false7:
639 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
640 // CHECK1-NEXT: br label [[COND_END8]]
641 // CHECK1: cond.end8:
642 // CHECK1-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
643 // CHECK1-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4
644 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
645 // CHECK1-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_IV]], align 4
646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
647 // CHECK1: omp.inner.for.end:
648 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
649 // CHECK1: omp.loop.exit:
650 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])
651 // CHECK1-NEXT: ret void
652 //
653 //
654 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined
655 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
656 // CHECK1-NEXT: entry:
657 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
658 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
659 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
660 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
661 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
662 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
663 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
664 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
665 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
666 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
667 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
668 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
669 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
670 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4
671 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
672 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
673 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
674 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
675 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
676 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
677 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
678 // CHECK1-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8
679 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
680 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
681 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
682 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
683 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
684 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
685 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
686 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
687 // CHECK1-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
688 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
689 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
690 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
691 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
692 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
693 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
694 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
695 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
696 // CHECK1: omp.inner.for.cond:
697 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
698 // CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64
699 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
700 // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP7]]
701 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
702 // CHECK1: omp.inner.for.body:
703 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
704 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
705 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
706 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
707 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
708 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
709 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
710 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP10]], 10
711 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 10
712 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL5]]
713 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
714 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
715 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[J]], align 4
716 // CHECK1-NEXT: store i32 10, ptr [[K]], align 4
717 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
718 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
719 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[F_ADDR]], align 4
720 // CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
721 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], [[MUL8]]
722 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[K]], align 4
723 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD9]], [[TMP14]]
724 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
725 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
726 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
727 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[J]], align 4
728 // CHECK1-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP16]] to i64
729 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM11]]
730 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[ARRAYIDX12]], align 4
731 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
732 // CHECK1: omp.body.continue:
733 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
734 // CHECK1: omp.inner.for.inc:
735 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
736 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
737 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
738 // CHECK1-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_IV]], align 4
739 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
740 // CHECK1: omp.inner.for.end:
741 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
742 // CHECK1: omp.loop.exit:
743 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
744 // CHECK1-NEXT: ret void
745 //
746 //
747 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46
748 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR4]] {
749 // CHECK1-NEXT: entry:
750 // CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
751 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
752 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
753 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
754 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
755 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
756 // CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
757 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
758 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
759 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
760 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_kernel_environment, ptr [[DYN_PTR]])
761 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
762 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
763 // CHECK1: user_code.entry:
764 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
765 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
766 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
767 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
768 // CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
769 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
770 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2]]
771 // CHECK1-NEXT: call void @__kmpc_target_deinit()
772 // CHECK1-NEXT: ret void
773 // CHECK1: worker.exit:
774 // CHECK1-NEXT: ret void
775 //
776 //
777 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined
778 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
779 // CHECK1-NEXT: entry:
780 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
781 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
782 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
783 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
784 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
785 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
786 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
787 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
788 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
789 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
790 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
791 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
792 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
793 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
794 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
795 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
796 // CHECK1-NEXT: [[I9:%.*]] = alloca i32, align 4
797 // CHECK1-NEXT: [[J10:%.*]] = alloca i32, align 4
798 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
799 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8
800 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
801 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
802 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
803 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
804 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
805 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
806 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
807 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
808 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4
809 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
810 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
811 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
812 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
813 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
814 // CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
815 // CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
816 // CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
817 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
818 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
819 // CHECK1-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
820 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4
821 // CHECK1-NEXT: store i32 0, ptr [[J]], align 4
822 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
823 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
824 // CHECK1-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
825 // CHECK1: land.lhs.true:
826 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
827 // CHECK1-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
828 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
829 // CHECK1: omp.precond.then:
830 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8
831 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
832 // CHECK1-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 8
833 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
834 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
835 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
836 // CHECK1-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
837 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
838 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
839 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_8(ptr @[[GLOB2]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
840 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
841 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
842 // CHECK1-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
843 // CHECK1-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
844 // CHECK1: cond.true:
845 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
846 // CHECK1-NEXT: br label [[COND_END:%.*]]
847 // CHECK1: cond.false:
848 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
849 // CHECK1-NEXT: br label [[COND_END]]
850 // CHECK1: cond.end:
851 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
852 // CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8
853 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
854 // CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTOMP_IV]], align 8
855 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
856 // CHECK1: omp.inner.for.cond:
857 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
858 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
859 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
860 // CHECK1-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
861 // CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
862 // CHECK1: omp.inner.for.body:
863 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
864 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
865 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
866 // CHECK1-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4
867 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
868 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
869 // CHECK1-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP17]] to ptr
870 // CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 8
871 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
872 // CHECK1-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to ptr
873 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 8
874 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
875 // CHECK1-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to ptr
876 // CHECK1-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 8
877 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
878 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP27]], align 8
879 // CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
880 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
881 // CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)
882 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
883 // CHECK1: omp.inner.for.inc:
884 // CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
885 // CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
886 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP30]], [[TMP31]]
887 // CHECK1-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 8
888 // CHECK1-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
889 // CHECK1-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
890 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]
891 // CHECK1-NEXT: store i64 [[ADD15]], ptr [[DOTOMP_COMB_LB]], align 8
892 // CHECK1-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
893 // CHECK1-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
894 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
895 // CHECK1-NEXT: store i64 [[ADD16]], ptr [[DOTOMP_COMB_UB]], align 8
896 // CHECK1-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
897 // CHECK1-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
898 // CHECK1-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP36]], [[TMP37]]
899 // CHECK1-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
900 // CHECK1: cond.true18:
901 // CHECK1-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
902 // CHECK1-NEXT: br label [[COND_END20:%.*]]
903 // CHECK1: cond.false19:
904 // CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
905 // CHECK1-NEXT: br label [[COND_END20]]
906 // CHECK1: cond.end20:
907 // CHECK1-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP38]], [[COND_TRUE18]] ], [ [[TMP39]], [[COND_FALSE19]] ]
908 // CHECK1-NEXT: store i64 [[COND21]], ptr [[DOTOMP_COMB_UB]], align 8
909 // CHECK1-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
910 // CHECK1-NEXT: store i64 [[TMP40]], ptr [[DOTOMP_IV]], align 8
911 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
912 // CHECK1: omp.inner.for.end:
913 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
914 // CHECK1: omp.loop.exit:
915 // CHECK1-NEXT: [[TMP41:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
916 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[TMP41]], align 4
917 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP42]])
918 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
919 // CHECK1: omp.precond.end:
920 // CHECK1-NEXT: ret void
921 //
922 //
923 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined
924 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
925 // CHECK1-NEXT: entry:
926 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
927 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
928 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
929 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
930 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
931 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
932 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
933 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
934 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
935 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
936 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
937 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
938 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
939 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
940 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
941 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
942 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
943 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
944 // CHECK1-NEXT: [[I9:%.*]] = alloca i32, align 4
945 // CHECK1-NEXT: [[J10:%.*]] = alloca i32, align 4
946 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
947 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
948 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
949 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
950 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
951 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
952 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
953 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
954 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
955 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
956 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4
957 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
958 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
959 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
960 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
961 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
962 // CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
963 // CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
964 // CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
965 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
966 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
967 // CHECK1-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
968 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4
969 // CHECK1-NEXT: store i32 0, ptr [[J]], align 4
970 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
971 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
972 // CHECK1-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
973 // CHECK1: land.lhs.true:
974 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
975 // CHECK1-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
976 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
977 // CHECK1: omp.precond.then:
978 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8
979 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
980 // CHECK1-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_UB]], align 8
981 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
982 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
983 // CHECK1-NEXT: store i64 [[TMP8]], ptr [[DOTOMP_LB]], align 8
984 // CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8
985 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
986 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
987 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
988 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
989 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3]], i32 [[TMP11]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
990 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
991 // CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTOMP_IV]], align 8
992 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
993 // CHECK1: omp.inner.for.cond:
994 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
995 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
996 // CHECK1-NEXT: [[CMP11:%.*]] = icmp ule i64 [[TMP13]], [[TMP14]]
997 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
998 // CHECK1: omp.inner.for.body:
999 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1000 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1001 // CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP16]], 0
1002 // CHECK1-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1003 // CHECK1-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
1004 // CHECK1-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
1005 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP15]], [[CONV15]]
1006 // CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
1007 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
1008 // CHECK1-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
1009 // CHECK1-NEXT: store i32 [[CONV18]], ptr [[I9]], align 4
1010 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1011 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1012 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1013 // CHECK1-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP19]], 0
1014 // CHECK1-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
1015 // CHECK1-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
1016 // CHECK1-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
1017 // CHECK1-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP18]], [[CONV22]]
1018 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1019 // CHECK1-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP20]], 0
1020 // CHECK1-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
1021 // CHECK1-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
1022 // CHECK1-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
1023 // CHECK1-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
1024 // CHECK1-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP17]], [[MUL28]]
1025 // CHECK1-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
1026 // CHECK1-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
1027 // CHECK1-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
1028 // CHECK1-NEXT: store i32 [[CONV32]], ptr [[J10]], align 4
1029 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I9]], align 4
1030 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[J10]], align 4
1031 // CHECK1-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1032 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[I9]], align 4
1033 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
1034 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1035 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[J10]], align 4
1036 // CHECK1-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP24]] to i64
1037 // CHECK1-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM34]]
1038 // CHECK1-NEXT: store i32 [[ADD33]], ptr [[ARRAYIDX35]], align 4
1039 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1040 // CHECK1: omp.body.continue:
1041 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1042 // CHECK1: omp.inner.for.inc:
1043 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1044 // CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
1045 // CHECK1-NEXT: [[ADD36:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
1046 // CHECK1-NEXT: store i64 [[ADD36]], ptr [[DOTOMP_IV]], align 8
1047 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1048 // CHECK1: omp.inner.for.end:
1049 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1050 // CHECK1: omp.loop.exit:
1051 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1052 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
1053 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP28]])
1054 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1055 // CHECK1: omp.precond.end:
1056 // CHECK1-NEXT: ret void
1057 //
1058 //
1059 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53
1060 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR4]] {
1061 // CHECK1-NEXT: entry:
1062 // CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1063 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1064 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1065 // CHECK1-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
1066 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1067 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1068 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1069 // CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1070 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1071 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1072 // CHECK1-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
1073 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1074 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_kernel_environment, ptr [[DYN_PTR]])
1075 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1076 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1077 // CHECK1: user_code.entry:
1078 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1079 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
1080 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
1081 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
1082 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[V_ADDR]], align 8
1083 // CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1084 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
1085 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]], ptr [[TMP5]]) #[[ATTR2]]
1086 // CHECK1-NEXT: call void @__kmpc_target_deinit()
1087 // CHECK1-NEXT: ret void
1088 // CHECK1: worker.exit:
1089 // CHECK1-NEXT: ret void
1090 //
1091 //
1092 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined
1093 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {
1094 // CHECK1-NEXT: entry:
1095 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1096 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1097 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1098 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1099 // CHECK1-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
1100 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1101 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1102 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1103 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1104 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1105 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1106 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1107 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1108 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1109 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
1110 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1111 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x ptr], align 8
1112 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1113 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1114 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1115 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1116 // CHECK1-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
1117 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1118 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1119 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1120 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1121 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1122 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1123 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1124 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1125 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4
1126 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1127 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1128 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1129 // CHECK1: omp.precond.then:
1130 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1131 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1132 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1133 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1134 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1135 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1136 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1137 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1138 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1139 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1140 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1141 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1142 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1143 // CHECK1: cond.true:
1144 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1145 // CHECK1-NEXT: br label [[COND_END:%.*]]
1146 // CHECK1: cond.false:
1147 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1148 // CHECK1-NEXT: br label [[COND_END]]
1149 // CHECK1: cond.end:
1150 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1151 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1152 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1153 // CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1154 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1155 // CHECK1: omp.inner.for.cond:
1156 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1157 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1158 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
1159 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
1160 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1161 // CHECK1: omp.inner.for.body:
1162 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1163 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1164 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1165 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1166 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
1167 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4
1168 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
1169 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[V_ADDR]], align 8
1170 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1171 // CHECK1-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to ptr
1172 // CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 8
1173 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1174 // CHECK1-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to ptr
1175 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 8
1176 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1177 // CHECK1-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to ptr
1178 // CHECK1-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 8
1179 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
1180 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP27]], align 8
1181 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
1182 // CHECK1-NEXT: store ptr [[TMP20]], ptr [[TMP28]], align 8
1183 // CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1184 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4
1185 // CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 5)
1186 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1187 // CHECK1: omp.inner.for.inc:
1188 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1189 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1190 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
1191 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1192 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1193 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1194 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
1195 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4
1196 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1197 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1198 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
1199 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4
1200 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1201 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1202 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
1203 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
1204 // CHECK1: cond.true10:
1205 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1206 // CHECK1-NEXT: br label [[COND_END12:%.*]]
1207 // CHECK1: cond.false11:
1208 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1209 // CHECK1-NEXT: br label [[COND_END12]]
1210 // CHECK1: cond.end12:
1211 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE10]] ], [ [[TMP40]], [[COND_FALSE11]] ]
1212 // CHECK1-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4
1213 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1214 // CHECK1-NEXT: store i32 [[TMP41]], ptr [[DOTOMP_IV]], align 4
1215 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1216 // CHECK1: omp.inner.for.end:
1217 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1218 // CHECK1: omp.loop.exit:
1219 // CHECK1-NEXT: [[TMP42:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1220 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP42]], align 4
1221 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP43]])
1222 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1223 // CHECK1: omp.precond.end:
1224 // CHECK1-NEXT: ret void
1225 //
1226 //
1227 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined
1228 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {
1229 // CHECK1-NEXT: entry:
1230 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1231 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1232 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1233 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1234 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1235 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1236 // CHECK1-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
1237 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1238 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1239 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1240 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1241 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1242 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1243 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1244 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1245 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1246 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
1247 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1248 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1249 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1250 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1251 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1252 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1253 // CHECK1-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
1254 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1255 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1256 // CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1257 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1258 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1259 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1260 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1261 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1262 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4
1263 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1264 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1265 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1266 // CHECK1: omp.precond.then:
1267 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1268 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1269 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1270 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1271 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1272 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1273 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
1274 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1275 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
1276 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1277 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1278 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1279 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1280 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1281 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1282 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
1283 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1284 // CHECK1: omp.inner.for.cond:
1285 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1286 // CHECK1-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i64
1287 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1288 // CHECK1-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]
1289 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1290 // CHECK1: omp.inner.for.body:
1291 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1292 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1293 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1294 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4
1295 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V_ADDR]], align 8
1296 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[I4]], align 4
1297 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
1298 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 [[IDXPROM]]
1299 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1300 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I4]], align 4
1301 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP16]] to i64
1302 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM7]]
1303 // CHECK1-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX8]], align 4
1304 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1305 // CHECK1: omp.body.continue:
1306 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1307 // CHECK1: omp.inner.for.inc:
1308 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1309 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1310 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1311 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
1312 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1313 // CHECK1: omp.inner.for.end:
1314 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1315 // CHECK1: omp.loop.exit:
1316 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1317 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1318 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
1319 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1320 // CHECK1: omp.precond.end:
1321 // CHECK1-NEXT: ret void
1322 //
1323 //
1324 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
1325 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0:[0-9]+]] {
1326 // CHECK2-NEXT: entry:
1327 // CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1328 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1329 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
1330 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1331 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1332 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1333 // CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1334 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1335 // CHECK2-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
1336 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
1337 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_kernel_environment, ptr [[DYN_PTR]])
1338 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1339 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1340 // CHECK2: user_code.entry:
1341 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
1342 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
1343 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
1344 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
1345 // CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1346 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
1347 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2:[0-9]+]]
1348 // CHECK2-NEXT: call void @__kmpc_target_deinit()
1349 // CHECK2-NEXT: ret void
1350 // CHECK2: worker.exit:
1351 // CHECK2-NEXT: ret void
1352 //
1353 //
1354 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined
1355 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1:[0-9]+]] {
1356 // CHECK2-NEXT: entry:
1357 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1358 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1359 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1360 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
1361 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1362 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1363 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1364 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1365 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1366 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1367 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1368 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1369 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1370 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
1371 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1372 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8
1373 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1374 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1375 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1376 // CHECK2-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
1377 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
1378 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1379 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1380 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1381 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1382 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1383 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1384 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1385 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4
1386 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1387 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1388 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1389 // CHECK2: omp.precond.then:
1390 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1391 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1392 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1393 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1394 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1395 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1396 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1397 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1398 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1399 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1400 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1401 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1402 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1403 // CHECK2: cond.true:
1404 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1405 // CHECK2-NEXT: br label [[COND_END:%.*]]
1406 // CHECK2: cond.false:
1407 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1408 // CHECK2-NEXT: br label [[COND_END]]
1409 // CHECK2: cond.end:
1410 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1411 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1412 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1413 // CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1414 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1415 // CHECK2: omp.inner.for.cond:
1416 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1417 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1418 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
1419 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
1420 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1421 // CHECK2: omp.inner.for.body:
1422 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1423 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1424 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1425 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1426 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
1427 // CHECK2-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4
1428 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
1429 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1430 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to ptr
1431 // CHECK2-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 8
1432 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1433 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to ptr
1434 // CHECK2-NEXT: store ptr [[TMP23]], ptr [[TMP22]], align 8
1435 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1436 // CHECK2-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to ptr
1437 // CHECK2-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8
1438 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
1439 // CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP26]], align 8
1440 // CHECK2-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1441 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
1442 // CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP28]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)
1443 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1444 // CHECK2: omp.inner.for.inc:
1445 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1446 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1447 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
1448 // CHECK2-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1449 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1450 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1451 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
1452 // CHECK2-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4
1453 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1454 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1455 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
1456 // CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4
1457 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1458 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1459 // CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
1460 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
1461 // CHECK2: cond.true10:
1462 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1463 // CHECK2-NEXT: br label [[COND_END12:%.*]]
1464 // CHECK2: cond.false11:
1465 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1466 // CHECK2-NEXT: br label [[COND_END12]]
1467 // CHECK2: cond.end12:
1468 // CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
1469 // CHECK2-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4
1470 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1471 // CHECK2-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_IV]], align 4
1472 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1473 // CHECK2: omp.inner.for.end:
1474 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1475 // CHECK2: omp.loop.exit:
1476 // CHECK2-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1477 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4
1478 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP41]])
1479 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1480 // CHECK2: omp.precond.end:
1481 // CHECK2-NEXT: ret void
1482 //
1483 //
1484 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined
1485 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
1486 // CHECK2-NEXT: entry:
1487 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1488 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1489 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1490 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1491 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1492 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
1493 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1494 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1495 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1496 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1497 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1498 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1499 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1500 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1501 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1502 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
1503 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1504 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1505 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1506 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1507 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1508 // CHECK2-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
1509 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
1510 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1511 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1512 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1513 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1514 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1515 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1516 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1517 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4
1518 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1519 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1520 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1521 // CHECK2: omp.precond.then:
1522 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1523 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1524 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1525 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1526 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1527 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1528 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
1529 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1530 // CHECK2-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
1531 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1532 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1533 // CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1534 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1535 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1536 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1537 // CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
1538 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1539 // CHECK2: omp.inner.for.cond:
1540 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1541 // CHECK2-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i64
1542 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1543 // CHECK2-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]
1544 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1545 // CHECK2: omp.inner.for.body:
1546 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1547 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1548 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1549 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I4]], align 4
1550 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[I4]], align 4
1551 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1552 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1553 // CHECK2-NEXT: [[TMP14:%.*]] = load i16, ptr [[ARRAYIDX]], align 2
1554 // CHECK2-NEXT: [[CONV7:%.*]] = sext i16 [[TMP14]] to i32
1555 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[CONV7]], 1
1556 // CHECK2-NEXT: [[CONV9:%.*]] = trunc i32 [[ADD8]] to i16
1557 // CHECK2-NEXT: store i16 [[CONV9]], ptr [[ARRAYIDX]], align 2
1558 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1559 // CHECK2: omp.body.continue:
1560 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1561 // CHECK2: omp.inner.for.inc:
1562 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1563 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1564 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1565 // CHECK2-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
1566 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1567 // CHECK2: omp.inner.for.end:
1568 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1569 // CHECK2: omp.loop.exit:
1570 // CHECK2-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1571 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
1572 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP18]])
1573 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1574 // CHECK2: omp.precond.end:
1575 // CHECK2-NEXT: ret void
1576 //
1577 //
1578 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33
1579 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR4:[0-9]+]] {
1580 // CHECK2-NEXT: entry:
1581 // CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1582 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1583 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1584 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1585 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1586 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1587 // CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1588 // CHECK2-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
1589 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1590 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1591 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_kernel_environment, ptr [[DYN_PTR]])
1592 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1593 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1594 // CHECK2: user_code.entry:
1595 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1596 // CHECK2-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
1597 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
1598 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1599 // CHECK2-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
1600 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
1601 // CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1602 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
1603 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]
1604 // CHECK2-NEXT: call void @__kmpc_target_deinit()
1605 // CHECK2-NEXT: ret void
1606 // CHECK2: worker.exit:
1607 // CHECK2-NEXT: ret void
1608 //
1609 //
1610 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined
1611 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1612 // CHECK2-NEXT: entry:
1613 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1614 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1615 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1616 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1617 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1618 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1619 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1620 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1621 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1622 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1623 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1624 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 8
1625 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1626 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1627 // CHECK2-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
1628 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1629 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1630 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1631 // CHECK2-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
1632 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1633 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1634 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1635 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1636 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1637 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1638 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1639 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1640 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1641 // CHECK2: cond.true:
1642 // CHECK2-NEXT: br label [[COND_END:%.*]]
1643 // CHECK2: cond.false:
1644 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1645 // CHECK2-NEXT: br label [[COND_END]]
1646 // CHECK2: cond.end:
1647 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1648 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1649 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1650 // CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1651 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1652 // CHECK2: omp.inner.for.cond:
1653 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1654 // CHECK2-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
1655 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1656 // CHECK2: omp.inner.for.body:
1657 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1658 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1659 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1660 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1661 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1662 // CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to ptr
1663 // CHECK2-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8
1664 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1665 // CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to ptr
1666 // CHECK2-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8
1667 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1668 // CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP15]], align 8
1669 // CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3)
1670 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1671 // CHECK2: omp.inner.for.inc:
1672 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1673 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1674 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1675 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1676 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1677 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1678 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1679 // CHECK2-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
1680 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1681 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1682 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1683 // CHECK2-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
1684 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1685 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
1686 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
1687 // CHECK2: cond.true5:
1688 // CHECK2-NEXT: br label [[COND_END7:%.*]]
1689 // CHECK2: cond.false6:
1690 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1691 // CHECK2-NEXT: br label [[COND_END7]]
1692 // CHECK2: cond.end7:
1693 // CHECK2-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
1694 // CHECK2-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
1695 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1696 // CHECK2-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV]], align 4
1697 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1698 // CHECK2: omp.inner.for.end:
1699 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1700 // CHECK2: omp.loop.exit:
1701 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])
1702 // CHECK2-NEXT: ret void
1703 //
1704 //
1705 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined
1706 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
1707 // CHECK2-NEXT: entry:
1708 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1709 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1710 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1711 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1712 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1713 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1714 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1715 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1716 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1717 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1718 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1719 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1720 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1721 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1722 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1723 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1724 // CHECK2-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
1725 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1726 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1727 // CHECK2-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1728 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1729 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1730 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1731 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1732 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1733 // CHECK2-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1734 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1735 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1736 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1737 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1738 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1739 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1740 // CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1741 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1742 // CHECK2: omp.inner.for.cond:
1743 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1744 // CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
1745 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1746 // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
1747 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1748 // CHECK2: omp.inner.for.body:
1749 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1750 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1751 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1752 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1753 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
1754 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
1755 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1756 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1757 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1758 // CHECK2-NEXT: store i32 [[ADD3]], ptr [[ARRAYIDX]], align 4
1759 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1760 // CHECK2: omp.body.continue:
1761 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1762 // CHECK2: omp.inner.for.inc:
1763 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1764 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1765 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1766 // CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
1767 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1768 // CHECK2: omp.inner.for.end:
1769 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1770 // CHECK2: omp.loop.exit:
1771 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
1772 // CHECK2-NEXT: ret void
1773 //
1774 //
1775 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
1776 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR4]] {
1777 // CHECK2-NEXT: entry:
1778 // CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1779 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1780 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
1781 // CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
1782 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1783 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1784 // CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1785 // CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
1786 // CHECK2-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8
1787 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1788 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_kernel_environment, ptr [[DYN_PTR]])
1789 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1790 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1791 // CHECK2: user_code.entry:
1792 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
1793 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[F_ADDR]], align 4
1794 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[F_CASTED]], align 4
1795 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[F_CASTED]], align 8
1796 // CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
1797 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
1798 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]
1799 // CHECK2-NEXT: call void @__kmpc_target_deinit()
1800 // CHECK2-NEXT: ret void
1801 // CHECK2: worker.exit:
1802 // CHECK2-NEXT: ret void
1803 //
1804 //
1805 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined
1806 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
1807 // CHECK2-NEXT: entry:
1808 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1809 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1810 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1811 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
1812 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1813 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1814 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1815 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1816 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1817 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1818 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1819 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4
1820 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1821 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
1822 // CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
1823 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8
1824 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1825 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1826 // CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
1827 // CHECK2-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8
1828 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1829 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1830 // CHECK2-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1831 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1832 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1833 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1834 // CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1835 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1836 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1837 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1838 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1839 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1840 // CHECK2: cond.true:
1841 // CHECK2-NEXT: br label [[COND_END:%.*]]
1842 // CHECK2: cond.false:
1843 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1844 // CHECK2-NEXT: br label [[COND_END]]
1845 // CHECK2: cond.end:
1846 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1847 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1848 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1849 // CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1850 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1851 // CHECK2: omp.inner.for.cond:
1852 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1853 // CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
1854 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1855 // CHECK2: omp.inner.for.body:
1856 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1857 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1858 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1859 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1860 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[F_ADDR]], align 4
1861 // CHECK2-NEXT: store i32 [[TMP11]], ptr [[F_CASTED]], align 4
1862 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[F_CASTED]], align 8
1863 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1864 // CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to ptr
1865 // CHECK2-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8
1866 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1867 // CHECK2-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to ptr
1868 // CHECK2-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 8
1869 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1870 // CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP17]], align 8
1871 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
1872 // CHECK2-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP12]] to ptr
1873 // CHECK2-NEXT: store ptr [[TMP19]], ptr [[TMP18]], align 8
1874 // CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)
1875 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1876 // CHECK2: omp.inner.for.inc:
1877 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1878 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1879 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1880 // CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1881 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1882 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1883 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1884 // CHECK2-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4
1885 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1886 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1887 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1888 // CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4
1889 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1890 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
1891 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
1892 // CHECK2: cond.true6:
1893 // CHECK2-NEXT: br label [[COND_END8:%.*]]
1894 // CHECK2: cond.false7:
1895 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1896 // CHECK2-NEXT: br label [[COND_END8]]
1897 // CHECK2: cond.end8:
1898 // CHECK2-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
1899 // CHECK2-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4
1900 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1901 // CHECK2-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_IV]], align 4
1902 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1903 // CHECK2: omp.inner.for.end:
1904 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1905 // CHECK2: omp.loop.exit:
1906 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])
1907 // CHECK2-NEXT: ret void
1908 //
1909 //
1910 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined
1911 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
1912 // CHECK2-NEXT: entry:
1913 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1914 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1915 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1916 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1917 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1918 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
1919 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1920 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1921 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1922 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1923 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1924 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1925 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1926 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4
1927 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1928 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
1929 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1930 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1931 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1932 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1933 // CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
1934 // CHECK2-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8
1935 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1936 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1937 // CHECK2-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
1938 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1939 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1940 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1941 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
1942 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1943 // CHECK2-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1944 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1945 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1946 // CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1947 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1948 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1949 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1950 // CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1951 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1952 // CHECK2: omp.inner.for.cond:
1953 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1954 // CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64
1955 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1956 // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP7]]
1957 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1958 // CHECK2: omp.inner.for.body:
1959 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1960 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
1961 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1962 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1963 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1964 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1965 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1966 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP10]], 10
1967 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 10
1968 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL5]]
1969 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
1970 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
1971 // CHECK2-NEXT: store i32 [[ADD7]], ptr [[J]], align 4
1972 // CHECK2-NEXT: store i32 10, ptr [[K]], align 4
1973 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1974 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
1975 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[F_ADDR]], align 4
1976 // CHECK2-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
1977 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], [[MUL8]]
1978 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[K]], align 4
1979 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD9]], [[TMP14]]
1980 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1981 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1982 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1983 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[J]], align 4
1984 // CHECK2-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP16]] to i64
1985 // CHECK2-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM11]]
1986 // CHECK2-NEXT: store i32 [[ADD10]], ptr [[ARRAYIDX12]], align 4
1987 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1988 // CHECK2: omp.body.continue:
1989 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1990 // CHECK2: omp.inner.for.inc:
1991 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1992 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1993 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1994 // CHECK2-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_IV]], align 4
1995 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1996 // CHECK2: omp.inner.for.end:
1997 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1998 // CHECK2: omp.loop.exit:
1999 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
2000 // CHECK2-NEXT: ret void
2001 //
2002 //
2003 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46
2004 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR4]] {
2005 // CHECK2-NEXT: entry:
2006 // CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2007 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2008 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2009 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2010 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2011 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2012 // CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2013 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
2014 // CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2015 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2016 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_kernel_environment, ptr [[DYN_PTR]])
2017 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2018 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2019 // CHECK2: user_code.entry:
2020 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2021 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
2022 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
2023 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
2024 // CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2025 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
2026 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2]]
2027 // CHECK2-NEXT: call void @__kmpc_target_deinit()
2028 // CHECK2-NEXT: ret void
2029 // CHECK2: worker.exit:
2030 // CHECK2-NEXT: ret void
2031 //
2032 //
2033 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined
2034 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
2035 // CHECK2-NEXT: entry:
2036 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2037 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2038 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2039 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2040 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2041 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2042 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2043 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2044 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2045 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2046 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2047 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
2048 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2049 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2050 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2051 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2052 // CHECK2-NEXT: [[I8:%.*]] = alloca i32, align 4
2053 // CHECK2-NEXT: [[J9:%.*]] = alloca i32, align 4
2054 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2055 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8
2056 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2057 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2058 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
2059 // CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2060 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2061 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2062 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2063 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2064 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4
2065 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2066 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2067 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2068 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2069 // CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
2070 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2071 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
2072 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
2073 // CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_3]], align 4
2074 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4
2075 // CHECK2-NEXT: store i32 0, ptr [[J]], align 4
2076 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2077 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2078 // CHECK2-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2079 // CHECK2: land.lhs.true:
2080 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2081 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
2082 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2083 // CHECK2: omp.precond.then:
2084 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2085 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2086 // CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4
2087 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2088 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2089 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2090 // CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2091 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
2092 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2093 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2094 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2095 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
2096 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2097 // CHECK2: cond.true:
2098 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2099 // CHECK2-NEXT: br label [[COND_END:%.*]]
2100 // CHECK2: cond.false:
2101 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2102 // CHECK2-NEXT: br label [[COND_END]]
2103 // CHECK2: cond.end:
2104 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
2105 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2106 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2107 // CHECK2-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
2108 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2109 // CHECK2: omp.inner.for.cond:
2110 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2111 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2112 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
2113 // CHECK2-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
2114 // CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2115 // CHECK2: omp.inner.for.body:
2116 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2117 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
2118 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2119 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
2120 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[N_ADDR]], align 4
2121 // CHECK2-NEXT: store i32 [[TMP21]], ptr [[N_CASTED]], align 4
2122 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, ptr [[N_CASTED]], align 8
2123 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2124 // CHECK2-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to ptr
2125 // CHECK2-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 8
2126 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2127 // CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to ptr
2128 // CHECK2-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 8
2129 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
2130 // CHECK2-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP22]] to ptr
2131 // CHECK2-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 8
2132 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
2133 // CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP29]], align 8
2134 // CHECK2-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2135 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4
2136 // CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)
2137 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2138 // CHECK2: omp.inner.for.inc:
2139 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2140 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2141 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
2142 // CHECK2-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4
2143 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2144 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2145 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
2146 // CHECK2-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_COMB_LB]], align 4
2147 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2148 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2149 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
2150 // CHECK2-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_COMB_UB]], align 4
2151 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2152 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2153 // CHECK2-NEXT: [[CMP15:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
2154 // CHECK2-NEXT: br i1 [[CMP15]], label [[COND_TRUE16:%.*]], label [[COND_FALSE17:%.*]]
2155 // CHECK2: cond.true16:
2156 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2157 // CHECK2-NEXT: br label [[COND_END18:%.*]]
2158 // CHECK2: cond.false17:
2159 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2160 // CHECK2-NEXT: br label [[COND_END18]]
2161 // CHECK2: cond.end18:
2162 // CHECK2-NEXT: [[COND19:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE16]] ], [ [[TMP41]], [[COND_FALSE17]] ]
2163 // CHECK2-NEXT: store i32 [[COND19]], ptr [[DOTOMP_COMB_UB]], align 4
2164 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2165 // CHECK2-NEXT: store i32 [[TMP42]], ptr [[DOTOMP_IV]], align 4
2166 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2167 // CHECK2: omp.inner.for.end:
2168 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2169 // CHECK2: omp.loop.exit:
2170 // CHECK2-NEXT: [[TMP43:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2171 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 4
2172 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP44]])
2173 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2174 // CHECK2: omp.precond.end:
2175 // CHECK2-NEXT: ret void
2176 //
2177 //
2178 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined
2179 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
2180 // CHECK2-NEXT: entry:
2181 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2182 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2183 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2184 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2185 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2186 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2187 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2188 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2189 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2190 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2191 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2192 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2193 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2194 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
2195 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2196 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2197 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2198 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2199 // CHECK2-NEXT: [[I9:%.*]] = alloca i32, align 4
2200 // CHECK2-NEXT: [[J10:%.*]] = alloca i32, align 4
2201 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2202 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2203 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2204 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2205 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
2206 // CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2207 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2208 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2209 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2210 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2211 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4
2212 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2213 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2214 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2215 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2216 // CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
2217 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2218 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
2219 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
2220 // CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_3]], align 4
2221 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4
2222 // CHECK2-NEXT: store i32 0, ptr [[J]], align 4
2223 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2224 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2225 // CHECK2-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2226 // CHECK2: land.lhs.true:
2227 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2228 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
2229 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2230 // CHECK2: omp.precond.then:
2231 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2232 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2233 // CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
2234 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2235 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32
2236 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2237 // CHECK2-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP9]] to i32
2238 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2239 // CHECK2-NEXT: store i32 [[CONV8]], ptr [[DOTOMP_UB]], align 4
2240 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2241 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2242 // CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2243 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
2244 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2245 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2246 // CHECK2-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2247 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2248 // CHECK2: omp.inner.for.cond:
2249 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2250 // CHECK2-NEXT: [[CONV11:%.*]] = sext i32 [[TMP13]] to i64
2251 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2252 // CHECK2-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP14]]
2253 // CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2254 // CHECK2: omp.inner.for.body:
2255 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2256 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2257 // CHECK2-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP16]], 0
2258 // CHECK2-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
2259 // CHECK2-NEXT: [[MUL15:%.*]] = mul nsw i32 1, [[DIV14]]
2260 // CHECK2-NEXT: [[DIV16:%.*]] = sdiv i32 [[TMP15]], [[MUL15]]
2261 // CHECK2-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
2262 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL17]]
2263 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I9]], align 4
2264 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2265 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2266 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2267 // CHECK2-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP19]], 0
2268 // CHECK2-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
2269 // CHECK2-NEXT: [[MUL20:%.*]] = mul nsw i32 1, [[DIV19]]
2270 // CHECK2-NEXT: [[DIV21:%.*]] = sdiv i32 [[TMP18]], [[MUL20]]
2271 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2272 // CHECK2-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP20]], 0
2273 // CHECK2-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
2274 // CHECK2-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
2275 // CHECK2-NEXT: [[MUL25:%.*]] = mul nsw i32 [[DIV21]], [[MUL24]]
2276 // CHECK2-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP17]], [[MUL25]]
2277 // CHECK2-NEXT: [[MUL27:%.*]] = mul nsw i32 [[SUB26]], 1
2278 // CHECK2-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
2279 // CHECK2-NEXT: store i32 [[ADD28]], ptr [[J10]], align 4
2280 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[I9]], align 4
2281 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[J10]], align 4
2282 // CHECK2-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2283 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[I9]], align 4
2284 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
2285 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2286 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[J10]], align 4
2287 // CHECK2-NEXT: [[IDXPROM30:%.*]] = sext i32 [[TMP24]] to i64
2288 // CHECK2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM30]]
2289 // CHECK2-NEXT: store i32 [[ADD29]], ptr [[ARRAYIDX31]], align 4
2290 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2291 // CHECK2: omp.body.continue:
2292 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2293 // CHECK2: omp.inner.for.inc:
2294 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2295 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2296 // CHECK2-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
2297 // CHECK2-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV]], align 4
2298 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2299 // CHECK2: omp.inner.for.end:
2300 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2301 // CHECK2: omp.loop.exit:
2302 // CHECK2-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2303 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
2304 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP28]])
2305 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2306 // CHECK2: omp.precond.end:
2307 // CHECK2-NEXT: ret void
2308 //
2309 //
2310 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53
2311 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR4]] {
2312 // CHECK2-NEXT: entry:
2313 // CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2314 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2315 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2316 // CHECK2-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
2317 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2318 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2319 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2320 // CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2321 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
2322 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2323 // CHECK2-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
2324 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2325 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_kernel_environment, ptr [[DYN_PTR]])
2326 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2327 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2328 // CHECK2: user_code.entry:
2329 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2330 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
2331 // CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
2332 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
2333 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[V_ADDR]], align 8
2334 // CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2335 // CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
2336 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]], ptr [[TMP5]]) #[[ATTR2]]
2337 // CHECK2-NEXT: call void @__kmpc_target_deinit()
2338 // CHECK2-NEXT: ret void
2339 // CHECK2: worker.exit:
2340 // CHECK2-NEXT: ret void
2341 //
2342 //
2343 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined
2344 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {
2345 // CHECK2-NEXT: entry:
2346 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2347 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2348 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2349 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2350 // CHECK2-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
2351 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2352 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2353 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2354 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2355 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2356 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2357 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2358 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2359 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2360 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
2361 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2362 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x ptr], align 8
2363 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2364 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2365 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
2366 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2367 // CHECK2-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
2368 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2369 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2370 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2371 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2372 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2373 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2374 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2375 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2376 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4
2377 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2378 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2379 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2380 // CHECK2: omp.precond.then:
2381 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2382 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2383 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2384 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2385 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2386 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2387 // CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2388 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2389 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2390 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2391 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2392 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2393 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2394 // CHECK2: cond.true:
2395 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2396 // CHECK2-NEXT: br label [[COND_END:%.*]]
2397 // CHECK2: cond.false:
2398 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2399 // CHECK2-NEXT: br label [[COND_END]]
2400 // CHECK2: cond.end:
2401 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2402 // CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2403 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2404 // CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2405 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2406 // CHECK2: omp.inner.for.cond:
2407 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2408 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2409 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
2410 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
2411 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2412 // CHECK2: omp.inner.for.body:
2413 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2414 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2415 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2416 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2417 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
2418 // CHECK2-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4
2419 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
2420 // CHECK2-NEXT: [[TMP20:%.*]] = load ptr, ptr [[V_ADDR]], align 8
2421 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2422 // CHECK2-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to ptr
2423 // CHECK2-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 8
2424 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2425 // CHECK2-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to ptr
2426 // CHECK2-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 8
2427 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
2428 // CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to ptr
2429 // CHECK2-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 8
2430 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
2431 // CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP27]], align 8
2432 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
2433 // CHECK2-NEXT: store ptr [[TMP20]], ptr [[TMP28]], align 8
2434 // CHECK2-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2435 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4
2436 // CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 5)
2437 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2438 // CHECK2: omp.inner.for.inc:
2439 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2440 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2441 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
2442 // CHECK2-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2443 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2444 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2445 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
2446 // CHECK2-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4
2447 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2448 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2449 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
2450 // CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4
2451 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2452 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2453 // CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
2454 // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
2455 // CHECK2: cond.true10:
2456 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2457 // CHECK2-NEXT: br label [[COND_END12:%.*]]
2458 // CHECK2: cond.false11:
2459 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2460 // CHECK2-NEXT: br label [[COND_END12]]
2461 // CHECK2: cond.end12:
2462 // CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE10]] ], [ [[TMP40]], [[COND_FALSE11]] ]
2463 // CHECK2-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4
2464 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2465 // CHECK2-NEXT: store i32 [[TMP41]], ptr [[DOTOMP_IV]], align 4
2466 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2467 // CHECK2: omp.inner.for.end:
2468 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2469 // CHECK2: omp.loop.exit:
2470 // CHECK2-NEXT: [[TMP42:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2471 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP42]], align 4
2472 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP43]])
2473 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2474 // CHECK2: omp.precond.end:
2475 // CHECK2-NEXT: ret void
2476 //
2477 //
2478 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined
2479 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {
2480 // CHECK2-NEXT: entry:
2481 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2482 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2483 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2484 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2485 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2486 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2487 // CHECK2-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 8
2488 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2489 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2490 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2491 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2492 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2493 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2494 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2495 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2496 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2497 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
2498 // CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2499 // CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2500 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2501 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2502 // CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
2503 // CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2504 // CHECK2-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 8
2505 // CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2506 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2507 // CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2508 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2509 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2510 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2511 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2512 // CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2513 // CHECK2-NEXT: store i32 0, ptr [[I]], align 4
2514 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2515 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2516 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2517 // CHECK2: omp.precond.then:
2518 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2519 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2520 // CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2521 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2522 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
2523 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2524 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
2525 // CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2526 // CHECK2-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
2527 // CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2528 // CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2529 // CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2530 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2531 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2532 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2533 // CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
2534 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2535 // CHECK2: omp.inner.for.cond:
2536 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2537 // CHECK2-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i64
2538 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2539 // CHECK2-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]
2540 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2541 // CHECK2: omp.inner.for.body:
2542 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2543 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2544 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2545 // CHECK2-NEXT: store i32 [[ADD]], ptr [[I4]], align 4
2546 // CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V_ADDR]], align 8
2547 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[I4]], align 4
2548 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
2549 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 [[IDXPROM]]
2550 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2551 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[I4]], align 4
2552 // CHECK2-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP16]] to i64
2553 // CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM7]]
2554 // CHECK2-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX8]], align 4
2555 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2556 // CHECK2: omp.body.continue:
2557 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2558 // CHECK2: omp.inner.for.inc:
2559 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2560 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2561 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2562 // CHECK2-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
2563 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2564 // CHECK2: omp.inner.for.end:
2565 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2566 // CHECK2: omp.loop.exit:
2567 // CHECK2-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2568 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2569 // CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
2570 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2571 // CHECK2: omp.precond.end:
2572 // CHECK2-NEXT: ret void
2573 //
2574 //
2575 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
2576 // CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0:[0-9]+]] {
2577 // CHECK3-NEXT: entry:
2578 // CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2579 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2580 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 4
2581 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2582 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2583 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2584 // CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2585 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2586 // CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 4
2587 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 4
2588 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_kernel_environment, ptr [[DYN_PTR]])
2589 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2590 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2591 // CHECK3: user_code.entry:
2592 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
2593 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
2594 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
2595 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4
2596 // CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2597 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
2598 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], ptr [[TMP0]]) #[[ATTR2:[0-9]+]]
2599 // CHECK3-NEXT: call void @__kmpc_target_deinit()
2600 // CHECK3-NEXT: ret void
2601 // CHECK3: worker.exit:
2602 // CHECK3-NEXT: ret void
2603 //
2604 //
2605 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined
2606 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1:[0-9]+]] {
2607 // CHECK3-NEXT: entry:
2608 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2609 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2610 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2611 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 4
2612 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2613 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2614 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2615 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2616 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2617 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2618 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2619 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2620 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2621 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
2622 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2623 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 4
2624 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2625 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2626 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2627 // CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 4
2628 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 4
2629 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2630 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2631 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2632 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2633 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2634 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2635 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2636 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4
2637 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2638 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2639 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2640 // CHECK3: omp.precond.then:
2641 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2642 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2643 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2644 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2645 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2646 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2647 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2648 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2649 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2650 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2651 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2652 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2653 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2654 // CHECK3: cond.true:
2655 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2656 // CHECK3-NEXT: br label [[COND_END:%.*]]
2657 // CHECK3: cond.false:
2658 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2659 // CHECK3-NEXT: br label [[COND_END]]
2660 // CHECK3: cond.end:
2661 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2662 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2663 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2664 // CHECK3-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2665 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2666 // CHECK3: omp.inner.for.cond:
2667 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2668 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2669 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
2670 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
2671 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2672 // CHECK3: omp.inner.for.body:
2673 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2674 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2675 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4
2676 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 4
2677 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4
2678 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
2679 // CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to ptr
2680 // CHECK3-NEXT: store ptr [[TMP19]], ptr [[TMP18]], align 4
2681 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
2682 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to ptr
2683 // CHECK3-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 4
2684 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
2685 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to ptr
2686 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP22]], align 4
2687 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
2688 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP24]], align 4
2689 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2690 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
2691 // CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP26]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 4)
2692 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2693 // CHECK3: omp.inner.for.inc:
2694 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2695 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2696 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
2697 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2698 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2699 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2700 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
2701 // CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4
2702 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2703 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2704 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
2705 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4
2706 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2707 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2708 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP33]], [[TMP34]]
2709 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
2710 // CHECK3: cond.true10:
2711 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2712 // CHECK3-NEXT: br label [[COND_END12:%.*]]
2713 // CHECK3: cond.false11:
2714 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2715 // CHECK3-NEXT: br label [[COND_END12]]
2716 // CHECK3: cond.end12:
2717 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP35]], [[COND_TRUE10]] ], [ [[TMP36]], [[COND_FALSE11]] ]
2718 // CHECK3-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4
2719 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2720 // CHECK3-NEXT: store i32 [[TMP37]], ptr [[DOTOMP_IV]], align 4
2721 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
2722 // CHECK3: omp.inner.for.end:
2723 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2724 // CHECK3: omp.loop.exit:
2725 // CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2726 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4
2727 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP39]])
2728 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
2729 // CHECK3: omp.precond.end:
2730 // CHECK3-NEXT: ret void
2731 //
2732 //
2733 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined
2734 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
2735 // CHECK3-NEXT: entry:
2736 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2737 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2738 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2739 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2740 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2741 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 4
2742 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2743 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2744 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2745 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2746 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2747 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2748 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2749 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2750 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2751 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
2752 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2753 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2754 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2755 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2756 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2757 // CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 4
2758 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 4
2759 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2760 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2761 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2762 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2763 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2764 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2765 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2766 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4
2767 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2768 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2769 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2770 // CHECK3: omp.precond.then:
2771 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2772 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2773 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2774 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2775 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2776 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
2777 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2778 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2779 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2780 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2781 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2782 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2783 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2784 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
2785 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2786 // CHECK3: omp.inner.for.cond:
2787 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2788 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2789 // CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
2790 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2791 // CHECK3: omp.inner.for.body:
2792 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2793 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2794 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2795 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4
2796 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I3]], align 4
2797 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], ptr [[TMP0]], i32 0, i32 [[TMP13]]
2798 // CHECK3-NEXT: [[TMP14:%.*]] = load i16, ptr [[ARRAYIDX]], align 2
2799 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
2800 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
2801 // CHECK3-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
2802 // CHECK3-NEXT: store i16 [[CONV6]], ptr [[ARRAYIDX]], align 2
2803 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2804 // CHECK3: omp.body.continue:
2805 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2806 // CHECK3: omp.inner.for.inc:
2807 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2808 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2809 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2810 // CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
2811 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
2812 // CHECK3: omp.inner.for.end:
2813 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2814 // CHECK3: omp.loop.exit:
2815 // CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2816 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
2817 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP18]])
2818 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
2819 // CHECK3: omp.precond.end:
2820 // CHECK3-NEXT: ret void
2821 //
2822 //
2823 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33
2824 // CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR4:[0-9]+]] {
2825 // CHECK3-NEXT: entry:
2826 // CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2827 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2828 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2829 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2830 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2831 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2832 // CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2833 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2834 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2835 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 4
2836 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_kernel_environment, ptr [[DYN_PTR]])
2837 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2838 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2839 // CHECK3: user_code.entry:
2840 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
2841 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2842 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1
2843 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2844 // CHECK3-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1
2845 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2846 // CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
2847 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
2848 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i32 [[TMP4]]) #[[ATTR2]]
2849 // CHECK3-NEXT: call void @__kmpc_target_deinit()
2850 // CHECK3-NEXT: ret void
2851 // CHECK3: worker.exit:
2852 // CHECK3-NEXT: ret void
2853 //
2854 //
2855 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined
2856 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2857 // CHECK3-NEXT: entry:
2858 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2859 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2860 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2861 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2862 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2863 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2864 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2865 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2866 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2867 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2868 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2869 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 4
2870 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2871 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2872 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2873 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2874 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 4
2875 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2876 // CHECK3-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
2877 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2878 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2879 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2880 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2881 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2882 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2883 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2884 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2885 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2886 // CHECK3: cond.true:
2887 // CHECK3-NEXT: br label [[COND_END:%.*]]
2888 // CHECK3: cond.false:
2889 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2890 // CHECK3-NEXT: br label [[COND_END]]
2891 // CHECK3: cond.end:
2892 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2893 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2894 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2895 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2896 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2897 // CHECK3: omp.inner.for.cond:
2898 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2899 // CHECK3-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
2900 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2901 // CHECK3: omp.inner.for.body:
2902 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2903 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2904 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
2905 // CHECK3-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to ptr
2906 // CHECK3-NEXT: store ptr [[TMP10]], ptr [[TMP9]], align 4
2907 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
2908 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to ptr
2909 // CHECK3-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 4
2910 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
2911 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP13]], align 4
2912 // CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3)
2913 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2914 // CHECK3: omp.inner.for.inc:
2915 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2916 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2917 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2918 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2919 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2920 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2921 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2922 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4
2923 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2924 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2925 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2926 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4
2927 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2928 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9
2929 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2930 // CHECK3: cond.true5:
2931 // CHECK3-NEXT: br label [[COND_END7:%.*]]
2932 // CHECK3: cond.false6:
2933 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2934 // CHECK3-NEXT: br label [[COND_END7]]
2935 // CHECK3: cond.end7:
2936 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]
2937 // CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4
2938 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2939 // CHECK3-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 4
2940 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
2941 // CHECK3: omp.inner.for.end:
2942 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2943 // CHECK3: omp.loop.exit:
2944 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])
2945 // CHECK3-NEXT: ret void
2946 //
2947 //
2948 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined
2949 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
2950 // CHECK3-NEXT: entry:
2951 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2952 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2953 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2954 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2955 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2956 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2957 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2958 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2959 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2960 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2961 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2962 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2963 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2964 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2965 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2966 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2967 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2968 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 4
2969 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2970 // CHECK3-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2971 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2972 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2973 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
2974 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
2975 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2976 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2977 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2978 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2979 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2980 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2981 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2982 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2983 // CHECK3: omp.inner.for.cond:
2984 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2985 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2986 // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
2987 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2988 // CHECK3: omp.inner.for.body:
2989 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2990 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2991 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2992 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2993 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
2994 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]
2995 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2996 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
2997 // CHECK3-NEXT: store i32 [[ADD1]], ptr [[ARRAYIDX]], align 4
2998 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2999 // CHECK3: omp.body.continue:
3000 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3001 // CHECK3: omp.inner.for.inc:
3002 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3003 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3004 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3005 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3006 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3007 // CHECK3: omp.inner.for.end:
3008 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3009 // CHECK3: omp.loop.exit:
3010 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
3011 // CHECK3-NEXT: ret void
3012 //
3013 //
3014 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38
3015 // CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR4]] {
3016 // CHECK3-NEXT: entry:
3017 // CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
3018 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
3019 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
3020 // CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
3021 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3022 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3023 // CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
3024 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
3025 // CHECK3-NEXT: store i32 [[F]], ptr [[F_ADDR]], align 4
3026 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
3027 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_kernel_environment, ptr [[DYN_PTR]])
3028 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3029 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3030 // CHECK3: user_code.entry:
3031 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3032 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[F_ADDR]], align 4
3033 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[F_CASTED]], align 4
3034 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[F_CASTED]], align 4
3035 // CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3036 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
3037 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i32 [[TMP4]]) #[[ATTR2]]
3038 // CHECK3-NEXT: call void @__kmpc_target_deinit()
3039 // CHECK3-NEXT: ret void
3040 // CHECK3: worker.exit:
3041 // CHECK3-NEXT: ret void
3042 //
3043 //
3044 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined
3045 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR1]] {
3046 // CHECK3-NEXT: entry:
3047 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3048 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3049 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
3050 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
3051 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3052 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3053 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3054 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3055 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3056 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3057 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3058 // CHECK3-NEXT: [[K:%.*]] = alloca i32, align 4
3059 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3060 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
3061 // CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
3062 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 4
3063 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3064 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3065 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
3066 // CHECK3-NEXT: store i32 [[F]], ptr [[F_ADDR]], align 4
3067 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
3068 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3069 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3070 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3071 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3072 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3073 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3074 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3075 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3076 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3077 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
3078 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3079 // CHECK3: cond.true:
3080 // CHECK3-NEXT: br label [[COND_END:%.*]]
3081 // CHECK3: cond.false:
3082 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3083 // CHECK3-NEXT: br label [[COND_END]]
3084 // CHECK3: cond.end:
3085 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3086 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3087 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3088 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3089 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3090 // CHECK3: omp.inner.for.cond:
3091 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3092 // CHECK3-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
3093 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3094 // CHECK3: omp.inner.for.body:
3095 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3096 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3097 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[F_ADDR]], align 4
3098 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[F_CASTED]], align 4
3099 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[F_CASTED]], align 4
3100 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
3101 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to ptr
3102 // CHECK3-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 4
3103 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
3104 // CHECK3-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to ptr
3105 // CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4
3106 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
3107 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP15]], align 4
3108 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
3109 // CHECK3-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP10]] to ptr
3110 // CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 4
3111 // CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 4)
3112 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3113 // CHECK3: omp.inner.for.inc:
3114 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3115 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3116 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3117 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3118 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3119 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3120 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
3121 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4
3122 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3123 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3124 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3125 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4
3126 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3127 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP24]], 99
3128 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
3129 // CHECK3: cond.true6:
3130 // CHECK3-NEXT: br label [[COND_END8:%.*]]
3131 // CHECK3: cond.false7:
3132 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3133 // CHECK3-NEXT: br label [[COND_END8]]
3134 // CHECK3: cond.end8:
3135 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP25]], [[COND_FALSE7]] ]
3136 // CHECK3-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4
3137 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3138 // CHECK3-NEXT: store i32 [[TMP26]], ptr [[DOTOMP_IV]], align 4
3139 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3140 // CHECK3: omp.inner.for.end:
3141 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3142 // CHECK3: omp.loop.exit:
3143 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])
3144 // CHECK3-NEXT: ret void
3145 //
3146 //
3147 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined
3148 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR1]] {
3149 // CHECK3-NEXT: entry:
3150 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3151 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3152 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3153 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3154 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
3155 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
3156 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3157 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3158 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3159 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3160 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3161 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3162 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3163 // CHECK3-NEXT: [[K:%.*]] = alloca i32, align 4
3164 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3165 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
3166 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3167 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3168 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3169 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3170 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
3171 // CHECK3-NEXT: store i32 [[F]], ptr [[F_ADDR]], align 4
3172 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
3173 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3174 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
3175 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3176 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3177 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3178 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3179 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3180 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3181 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3182 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3183 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3184 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3185 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3186 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3187 // CHECK3: omp.inner.for.cond:
3188 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3189 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3190 // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
3191 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3192 // CHECK3: omp.inner.for.body:
3193 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3194 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
3195 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
3196 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3197 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
3198 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3199 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3200 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
3201 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
3202 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
3203 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
3204 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
3205 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[J]], align 4
3206 // CHECK3-NEXT: store i32 10, ptr [[K]], align 4
3207 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
3208 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
3209 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[F_ADDR]], align 4
3210 // CHECK3-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
3211 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
3212 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[K]], align 4
3213 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
3214 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
3215 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP15]]
3216 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[J]], align 4
3217 // CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP16]]
3218 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[ARRAYIDX9]], align 4
3219 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3220 // CHECK3: omp.body.continue:
3221 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3222 // CHECK3: omp.inner.for.inc:
3223 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3224 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3225 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3226 // CHECK3-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
3227 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3228 // CHECK3: omp.inner.for.end:
3229 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3230 // CHECK3: omp.loop.exit:
3231 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
3232 // CHECK3-NEXT: ret void
3233 //
3234 //
3235 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46
3236 // CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR4]] {
3237 // CHECK3-NEXT: entry:
3238 // CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
3239 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3240 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
3241 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3242 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3243 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3244 // CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
3245 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
3246 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
3247 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
3248 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_kernel_environment, ptr [[DYN_PTR]])
3249 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3250 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3251 // CHECK3: user_code.entry:
3252 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3253 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
3254 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
3255 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4
3256 // CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3257 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
3258 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], ptr [[TMP0]]) #[[ATTR2]]
3259 // CHECK3-NEXT: call void @__kmpc_target_deinit()
3260 // CHECK3-NEXT: ret void
3261 // CHECK3: worker.exit:
3262 // CHECK3-NEXT: ret void
3263 //
3264 //
3265 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined
3266 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
3267 // CHECK3-NEXT: entry:
3268 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3269 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3270 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3271 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
3272 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
3273 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3274 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3275 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3276 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3277 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
3278 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3279 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
3280 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
3281 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
3282 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
3283 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3284 // CHECK3-NEXT: [[I9:%.*]] = alloca i32, align 4
3285 // CHECK3-NEXT: [[J10:%.*]] = alloca i32, align 4
3286 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3287 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 4
3288 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3289 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3290 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
3291 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
3292 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
3293 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3294 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3295 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
3296 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4
3297 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3298 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3299 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3300 // CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3301 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3302 // CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
3303 // CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
3304 // CHECK3-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
3305 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
3306 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
3307 // CHECK3-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
3308 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4
3309 // CHECK3-NEXT: store i32 0, ptr [[J]], align 4
3310 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3311 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3312 // CHECK3-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3313 // CHECK3: land.lhs.true:
3314 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3315 // CHECK3-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
3316 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3317 // CHECK3: omp.precond.then:
3318 // CHECK3-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8
3319 // CHECK3-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3320 // CHECK3-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 8
3321 // CHECK3-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
3322 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3323 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3324 // CHECK3-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
3325 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3326 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
3327 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_8(ptr @[[GLOB2]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
3328 // CHECK3-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
3329 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3330 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
3331 // CHECK3-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3332 // CHECK3: cond.true:
3333 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3334 // CHECK3-NEXT: br label [[COND_END:%.*]]
3335 // CHECK3: cond.false:
3336 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
3337 // CHECK3-NEXT: br label [[COND_END]]
3338 // CHECK3: cond.end:
3339 // CHECK3-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
3340 // CHECK3-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8
3341 // CHECK3-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
3342 // CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTOMP_IV]], align 8
3343 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3344 // CHECK3: omp.inner.for.cond:
3345 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3346 // CHECK3-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3347 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
3348 // CHECK3-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
3349 // CHECK3-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3350 // CHECK3: omp.inner.for.body:
3351 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
3352 // CHECK3-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
3353 // CHECK3-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
3354 // CHECK3-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
3355 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[N_ADDR]], align 4
3356 // CHECK3-NEXT: store i32 [[TMP21]], ptr [[N_CASTED]], align 4
3357 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[N_CASTED]], align 4
3358 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
3359 // CHECK3-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to ptr
3360 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 4
3361 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
3362 // CHECK3-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to ptr
3363 // CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 4
3364 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
3365 // CHECK3-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to ptr
3366 // CHECK3-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 4
3367 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
3368 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP29]], align 4
3369 // CHECK3-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3370 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4
3371 // CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 4)
3372 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3373 // CHECK3: omp.inner.for.inc:
3374 // CHECK3-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3375 // CHECK3-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
3376 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]
3377 // CHECK3-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 8
3378 // CHECK3-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
3379 // CHECK3-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
3380 // CHECK3-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
3381 // CHECK3-NEXT: store i64 [[ADD15]], ptr [[DOTOMP_COMB_LB]], align 8
3382 // CHECK3-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
3383 // CHECK3-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
3384 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
3385 // CHECK3-NEXT: store i64 [[ADD16]], ptr [[DOTOMP_COMB_UB]], align 8
3386 // CHECK3-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
3387 // CHECK3-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3388 // CHECK3-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP38]], [[TMP39]]
3389 // CHECK3-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
3390 // CHECK3: cond.true18:
3391 // CHECK3-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3392 // CHECK3-NEXT: br label [[COND_END20:%.*]]
3393 // CHECK3: cond.false19:
3394 // CHECK3-NEXT: [[TMP41:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8
3395 // CHECK3-NEXT: br label [[COND_END20]]
3396 // CHECK3: cond.end20:
3397 // CHECK3-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP40]], [[COND_TRUE18]] ], [ [[TMP41]], [[COND_FALSE19]] ]
3398 // CHECK3-NEXT: store i64 [[COND21]], ptr [[DOTOMP_COMB_UB]], align 8
3399 // CHECK3-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8
3400 // CHECK3-NEXT: store i64 [[TMP42]], ptr [[DOTOMP_IV]], align 8
3401 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3402 // CHECK3: omp.inner.for.end:
3403 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3404 // CHECK3: omp.loop.exit:
3405 // CHECK3-NEXT: [[TMP43:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3406 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 4
3407 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP44]])
3408 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3409 // CHECK3: omp.precond.end:
3410 // CHECK3-NEXT: ret void
3411 //
3412 //
3413 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined
3414 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
3415 // CHECK3-NEXT: entry:
3416 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3417 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3418 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3419 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3420 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3421 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
3422 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
3423 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3424 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3425 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3426 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3427 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
3428 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3429 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
3430 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
3431 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
3432 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
3433 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3434 // CHECK3-NEXT: [[I11:%.*]] = alloca i32, align 4
3435 // CHECK3-NEXT: [[J12:%.*]] = alloca i32, align 4
3436 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3437 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3438 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3439 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3440 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
3441 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
3442 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
3443 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3444 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3445 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
3446 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4
3447 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3448 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3449 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3450 // CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3451 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3452 // CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
3453 // CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
3454 // CHECK3-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
3455 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
3456 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
3457 // CHECK3-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
3458 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4
3459 // CHECK3-NEXT: store i32 0, ptr [[J]], align 4
3460 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3461 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3462 // CHECK3-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3463 // CHECK3: land.lhs.true:
3464 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3465 // CHECK3-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
3466 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3467 // CHECK3: omp.precond.then:
3468 // CHECK3-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8
3469 // CHECK3-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
3470 // CHECK3-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_UB]], align 8
3471 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3472 // CHECK3-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
3473 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3474 // CHECK3-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
3475 // CHECK3-NEXT: store i64 [[CONV9]], ptr [[DOTOMP_LB]], align 8
3476 // CHECK3-NEXT: store i64 [[CONV10]], ptr [[DOTOMP_UB]], align 8
3477 // CHECK3-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
3478 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3479 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3480 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
3481 // CHECK3-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3]], i32 [[TMP11]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
3482 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
3483 // CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTOMP_IV]], align 8
3484 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3485 // CHECK3: omp.inner.for.cond:
3486 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3487 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3488 // CHECK3-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
3489 // CHECK3-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
3490 // CHECK3-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3491 // CHECK3: omp.inner.for.body:
3492 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3493 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3494 // CHECK3-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
3495 // CHECK3-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
3496 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
3497 // CHECK3-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
3498 // CHECK3-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
3499 // CHECK3-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
3500 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
3501 // CHECK3-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
3502 // CHECK3-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4
3503 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3504 // CHECK3-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3505 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3506 // CHECK3-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
3507 // CHECK3-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
3508 // CHECK3-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
3509 // CHECK3-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
3510 // CHECK3-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
3511 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
3512 // CHECK3-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
3513 // CHECK3-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
3514 // CHECK3-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
3515 // CHECK3-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
3516 // CHECK3-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
3517 // CHECK3-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
3518 // CHECK3-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
3519 // CHECK3-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
3520 // CHECK3-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
3521 // CHECK3-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4
3522 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I11]], align 4
3523 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[J12]], align 4
3524 // CHECK3-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3525 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[I11]], align 4
3526 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP23]]
3527 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[J12]], align 4
3528 // CHECK3-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP24]]
3529 // CHECK3-NEXT: store i32 [[ADD36]], ptr [[ARRAYIDX37]], align 4
3530 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3531 // CHECK3: omp.body.continue:
3532 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3533 // CHECK3: omp.inner.for.inc:
3534 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
3535 // CHECK3-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8
3536 // CHECK3-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
3537 // CHECK3-NEXT: store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8
3538 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3539 // CHECK3: omp.inner.for.end:
3540 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3541 // CHECK3: omp.loop.exit:
3542 // CHECK3-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3543 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
3544 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP28]])
3545 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3546 // CHECK3: omp.precond.end:
3547 // CHECK3-NEXT: ret void
3548 //
3549 //
3550 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53
3551 // CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR4]] {
3552 // CHECK3-NEXT: entry:
3553 // CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
3554 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3555 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
3556 // CHECK3-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
3557 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3558 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3559 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3560 // CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
3561 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
3562 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
3563 // CHECK3-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
3564 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3565 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_kernel_environment, ptr [[DYN_PTR]])
3566 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3567 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3568 // CHECK3: user_code.entry:
3569 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
3570 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
3571 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
3572 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4
3573 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[V_ADDR]], align 4
3574 // CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4
3575 // CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4
3576 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], ptr [[TMP0]], ptr [[TMP5]]) #[[ATTR2]]
3577 // CHECK3-NEXT: call void @__kmpc_target_deinit()
3578 // CHECK3-NEXT: ret void
3579 // CHECK3: worker.exit:
3580 // CHECK3-NEXT: ret void
3581 //
3582 //
3583 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined
3584 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {
3585 // CHECK3-NEXT: entry:
3586 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3587 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3588 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3589 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
3590 // CHECK3-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
3591 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3592 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3593 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3594 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3595 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3596 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3597 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3598 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3599 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3600 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
3601 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3602 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x ptr], align 4
3603 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3604 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3605 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
3606 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
3607 // CHECK3-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
3608 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3609 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3610 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3611 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3612 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3613 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3614 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3615 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3616 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4
3617 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3618 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3619 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3620 // CHECK3: omp.precond.then:
3621 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3622 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3623 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
3624 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3625 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3626 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3627 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3628 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3629 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3630 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3631 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3632 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3633 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3634 // CHECK3: cond.true:
3635 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3636 // CHECK3-NEXT: br label [[COND_END:%.*]]
3637 // CHECK3: cond.false:
3638 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3639 // CHECK3-NEXT: br label [[COND_END]]
3640 // CHECK3: cond.end:
3641 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3642 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3643 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3644 // CHECK3-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
3645 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3646 // CHECK3: omp.inner.for.cond:
3647 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3648 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3649 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
3650 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
3651 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3652 // CHECK3: omp.inner.for.body:
3653 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3654 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3655 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4
3656 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 4
3657 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4
3658 // CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[V_ADDR]], align 4
3659 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
3660 // CHECK3-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to ptr
3661 // CHECK3-NEXT: store ptr [[TMP20]], ptr [[TMP19]], align 4
3662 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
3663 // CHECK3-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to ptr
3664 // CHECK3-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 4
3665 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
3666 // CHECK3-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to ptr
3667 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 4
3668 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
3669 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP25]], align 4
3670 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
3671 // CHECK3-NEXT: store ptr [[TMP18]], ptr [[TMP26]], align 4
3672 // CHECK3-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3673 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
3674 // CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP28]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 5)
3675 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3676 // CHECK3: omp.inner.for.inc:
3677 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3678 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3679 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
3680 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
3681 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3682 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3683 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
3684 // CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4
3685 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3686 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3687 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
3688 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4
3689 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3690 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3691 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
3692 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
3693 // CHECK3: cond.true10:
3694 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3695 // CHECK3-NEXT: br label [[COND_END12:%.*]]
3696 // CHECK3: cond.false11:
3697 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3698 // CHECK3-NEXT: br label [[COND_END12]]
3699 // CHECK3: cond.end12:
3700 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
3701 // CHECK3-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4
3702 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3703 // CHECK3-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_IV]], align 4
3704 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3705 // CHECK3: omp.inner.for.end:
3706 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3707 // CHECK3: omp.loop.exit:
3708 // CHECK3-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3709 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4
3710 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP41]])
3711 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3712 // CHECK3: omp.precond.end:
3713 // CHECK3-NEXT: ret void
3714 //
3715 //
3716 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined
3717 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {
3718 // CHECK3-NEXT: entry:
3719 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3720 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3721 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3722 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3723 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3724 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
3725 // CHECK3-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 4
3726 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3727 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3728 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3729 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3730 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3731 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3732 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3733 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3734 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3735 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
3736 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3737 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3738 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3739 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3740 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
3741 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
3742 // CHECK3-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 4
3743 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3744 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3745 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3746 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3747 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3748 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3749 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3750 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3751 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4
3752 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3753 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3754 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3755 // CHECK3: omp.precond.then:
3756 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
3757 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3758 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
3759 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3760 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3761 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
3762 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
3763 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3764 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3765 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3766 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
3767 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3768 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3769 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
3770 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3771 // CHECK3: omp.inner.for.cond:
3772 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3773 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3774 // CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
3775 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3776 // CHECK3: omp.inner.for.body:
3777 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3778 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3779 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3780 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4
3781 // CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V_ADDR]], align 4
3782 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[I3]], align 4
3783 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 [[TMP14]]
3784 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
3785 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4
3786 // CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]
3787 // CHECK3-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX5]], align 4
3788 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3789 // CHECK3: omp.body.continue:
3790 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3791 // CHECK3: omp.inner.for.inc:
3792 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3793 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3794 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3795 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
3796 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3797 // CHECK3: omp.inner.for.end:
3798 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3799 // CHECK3: omp.loop.exit:
3800 // CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3801 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
3802 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])
3803 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3804 // CHECK3: omp.precond.end:
3805 // CHECK3-NEXT: ret void
3806 //
3807