1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute simd private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute simd private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 g = 1; 73 g1 = 1; 74 svar = 3; 75 sfvar = 4.0; 76 [&]() { 77 g = 2; 78 g1 = 2; 79 svar = 4; 80 sfvar = 8.0; 81 82 }(); 83 } 84 }(); 85 return 0; 86 #else 87 S<float> test; 88 int t_var = 0; 89 int vec[] = {1, 2}; 90 S<float> s_arr[] = {1, 2}; 91 S<float> &var = test; 92 93 #pragma omp target 94 #pragma omp teams 95 #pragma omp distribute simd private(t_var, vec, s_arr, s_arr, var, var, svar) 96 for (int i = 0; i < 2; ++i) { 97 vec[i] = t_var; 98 s_arr[i] = var; 99 } 100 int i; 101 102 #pragma omp target 103 #pragma omp teams 104 #pragma omp distribute simd 105 for (i = 0; i < 2; ++i) { 106 ; 107 } 108 return tmain<int>(); 109 #endif 110 } 111 112 113 114 115 116 117 #endif 118 // CHECK1-LABEL: define {{[^@]+}}@main 119 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 120 // CHECK1-NEXT: entry: 121 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 122 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 123 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8 124 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 125 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 126 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8 127 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 128 // CHECK1-NEXT: ret i32 0 129 // 130 // 131 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 132 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 133 // CHECK1-NEXT: entry: 134 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined) 135 // CHECK1-NEXT: ret void 136 // 137 // 138 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 139 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 140 // CHECK1-NEXT: entry: 141 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 142 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 143 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 144 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 146 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 147 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 151 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 152 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 153 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 155 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 156 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 157 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 158 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 159 // CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8 160 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 161 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 162 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 163 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 164 // CHECK1-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 8 165 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 166 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 167 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 168 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 169 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 170 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 171 // CHECK1: cond.true: 172 // CHECK1-NEXT: br label [[COND_END:%.*]] 173 // CHECK1: cond.false: 174 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 175 // CHECK1-NEXT: br label [[COND_END]] 176 // CHECK1: cond.end: 177 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 178 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 179 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 180 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 181 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 182 // CHECK1: omp.inner.for.cond: 183 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]] 184 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]] 185 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 186 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 187 // CHECK1: omp.inner.for.body: 188 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 189 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 190 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 191 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]] 192 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP4]] 193 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 8, !llvm.access.group [[ACC_GRP4]] 194 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP8]], align 8, !llvm.access.group [[ACC_GRP4]] 195 // CHECK1-NEXT: store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP4]] 196 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP4]] 197 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 198 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP9]], align 8, !llvm.access.group [[ACC_GRP4]] 199 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 200 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 8, !llvm.access.group [[ACC_GRP4]] 201 // CHECK1-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP4]] 202 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 203 // CHECK1-NEXT: store ptr [[SVAR]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP4]] 204 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 205 // CHECK1-NEXT: store ptr [[SFVAR]], ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP4]] 206 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP4]] 207 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 208 // CHECK1: omp.body.continue: 209 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 210 // CHECK1: omp.inner.for.inc: 211 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 212 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 213 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 214 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 215 // CHECK1: omp.inner.for.end: 216 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 217 // CHECK1: omp.loop.exit: 218 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 219 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 220 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 221 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 222 // CHECK1: .omp.final.then: 223 // CHECK1-NEXT: store i32 2, ptr [[I]], align 4 224 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 225 // CHECK1: .omp.final.done: 226 // CHECK1-NEXT: ret void 227 // 228 // 229 // CHECK3-LABEL: define {{[^@]+}}@main 230 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 231 // CHECK3-NEXT: entry: 232 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 233 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 234 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4 235 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 236 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 237 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4 238 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 239 // CHECK3-NEXT: ret i32 0 240 // 241 // 242 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 243 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 244 // CHECK3-NEXT: entry: 245 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined) 246 // CHECK3-NEXT: ret void 247 // 248 // 249 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 250 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 251 // CHECK3-NEXT: entry: 252 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 253 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 254 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 255 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 256 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 257 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 258 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 259 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 260 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 261 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 262 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 263 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 264 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 265 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 266 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 267 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 268 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 269 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 270 // CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4 271 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 272 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 273 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 274 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 275 // CHECK3-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 4 276 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 277 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 278 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 279 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 280 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 281 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 282 // CHECK3: cond.true: 283 // CHECK3-NEXT: br label [[COND_END:%.*]] 284 // CHECK3: cond.false: 285 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 286 // CHECK3-NEXT: br label [[COND_END]] 287 // CHECK3: cond.end: 288 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 289 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 290 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 291 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 292 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 293 // CHECK3: omp.inner.for.cond: 294 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 295 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 296 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 297 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 298 // CHECK3: omp.inner.for.body: 299 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 300 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 301 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 302 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]] 303 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP5]] 304 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP5]] 305 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP5]] 306 // CHECK3-NEXT: store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP5]] 307 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP5]] 308 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 309 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP9]], align 4, !llvm.access.group [[ACC_GRP5]] 310 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 311 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP5]] 312 // CHECK3-NEXT: store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP5]] 313 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 314 // CHECK3-NEXT: store ptr [[SVAR]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP5]] 315 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 316 // CHECK3-NEXT: store ptr [[SFVAR]], ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP5]] 317 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP5]] 318 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 319 // CHECK3: omp.body.continue: 320 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 321 // CHECK3: omp.inner.for.inc: 322 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 323 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 324 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 325 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 326 // CHECK3: omp.inner.for.end: 327 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 328 // CHECK3: omp.loop.exit: 329 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 330 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 331 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 332 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 333 // CHECK3: .omp.final.then: 334 // CHECK3-NEXT: store i32 2, ptr [[I]], align 4 335 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 336 // CHECK3: .omp.final.done: 337 // CHECK3-NEXT: ret void 338 // 339 // 340 // CHECK5-LABEL: define {{[^@]+}}@main 341 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 342 // CHECK5-NEXT: entry: 343 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 344 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 345 // CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8 346 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 347 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 348 // CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8 349 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 350 // CHECK5-NEXT: ret i32 0 351 // 352 // 353 // CHECK7-LABEL: define {{[^@]+}}@main 354 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 355 // CHECK7-NEXT: entry: 356 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 357 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 358 // CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4 359 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 360 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4 361 // CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4 362 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 363 // CHECK7-NEXT: ret i32 0 364 // 365 // 366 // CHECK9-LABEL: define {{[^@]+}}@main 367 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 368 // CHECK9-NEXT: entry: 369 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 370 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 371 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8 372 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 373 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 374 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 375 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 376 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 377 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 378 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 379 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 380 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 381 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8 382 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 383 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 384 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 385 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 386 // CHECK9-NEXT: [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 387 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 388 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8 389 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 390 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 391 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 392 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 393 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 394 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 395 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 396 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 397 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 398 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 399 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 400 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 401 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 402 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 403 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 404 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 405 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 406 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 407 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 408 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 409 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 410 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 411 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 412 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 413 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 414 // CHECK9-NEXT: store i64 2, ptr [[TMP8]], align 8 415 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 416 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 417 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 418 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 419 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 420 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 4 421 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 422 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 423 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, ptr [[KERNEL_ARGS]]) 424 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 425 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 426 // CHECK9: omp_offload.failed: 427 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 428 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 429 // CHECK9: omp_offload.cont: 430 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 431 // CHECK9-NEXT: store i32 [[TMP15]], ptr [[I_CASTED]], align 4 432 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[I_CASTED]], align 8 433 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 434 // CHECK9-NEXT: store i64 [[TMP16]], ptr [[TMP17]], align 8 435 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 436 // CHECK9-NEXT: store i64 [[TMP16]], ptr [[TMP18]], align 8 437 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 438 // CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8 439 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 440 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 441 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 0 442 // CHECK9-NEXT: store i32 3, ptr [[TMP22]], align 4 443 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 1 444 // CHECK9-NEXT: store i32 1, ptr [[TMP23]], align 4 445 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 2 446 // CHECK9-NEXT: store ptr [[TMP20]], ptr [[TMP24]], align 8 447 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 3 448 // CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 8 449 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 4 450 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP26]], align 8 451 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 5 452 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP27]], align 8 453 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 6 454 // CHECK9-NEXT: store ptr null, ptr [[TMP28]], align 8 455 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 7 456 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 457 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 8 458 // CHECK9-NEXT: store i64 2, ptr [[TMP30]], align 8 459 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 9 460 // CHECK9-NEXT: store i64 0, ptr [[TMP31]], align 8 461 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 10 462 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4 463 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 11 464 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4 465 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 12 466 // CHECK9-NEXT: store i32 0, ptr [[TMP34]], align 4 467 // CHECK9-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS3]]) 468 // CHECK9-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 469 // CHECK9-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]] 470 // CHECK9: omp_offload.failed4: 471 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP16]]) #[[ATTR4]] 472 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT5]] 473 // CHECK9: omp_offload.cont5: 474 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 475 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 476 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 477 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 478 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 479 // CHECK9: arraydestroy.body: 480 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP37]], [[OMP_OFFLOAD_CONT5]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 481 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 482 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 483 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 484 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 485 // CHECK9: arraydestroy.done6: 486 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 487 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 4 488 // CHECK9-NEXT: ret i32 [[TMP38]] 489 // 490 // 491 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 492 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 493 // CHECK9-NEXT: entry: 494 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 495 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 496 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 497 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 498 // CHECK9-NEXT: ret void 499 // 500 // 501 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 502 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 503 // CHECK9-NEXT: entry: 504 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 505 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 506 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 507 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 508 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 509 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 510 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 511 // CHECK9-NEXT: ret void 512 // 513 // 514 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 515 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 516 // CHECK9-NEXT: entry: 517 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined) 518 // CHECK9-NEXT: ret void 519 // 520 // 521 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined 522 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 523 // CHECK9-NEXT: entry: 524 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 525 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 526 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 527 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 528 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 529 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 530 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 531 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 532 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 533 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 534 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 535 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 536 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 537 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 538 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 539 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 540 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 541 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 542 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 543 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 544 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 545 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 546 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 547 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 548 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 549 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 550 // CHECK9: arrayctor.loop: 551 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 552 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 553 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 554 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 555 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 556 // CHECK9: arrayctor.cont: 557 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 558 // CHECK9-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8 559 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 560 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 561 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 562 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 563 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 564 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 565 // CHECK9: cond.true: 566 // CHECK9-NEXT: br label [[COND_END:%.*]] 567 // CHECK9: cond.false: 568 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 569 // CHECK9-NEXT: br label [[COND_END]] 570 // CHECK9: cond.end: 571 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 572 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 573 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 574 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 575 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 576 // CHECK9: omp.inner.for.cond: 577 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 578 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 579 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 580 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 581 // CHECK9: omp.inner.for.cond.cleanup: 582 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 583 // CHECK9: omp.inner.for.body: 584 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 585 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 586 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 587 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 588 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP6]] 589 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 590 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 591 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 592 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 593 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8, !llvm.access.group [[ACC_GRP6]] 594 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 595 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 596 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]] 597 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]] 598 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 599 // CHECK9: omp.body.continue: 600 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 601 // CHECK9: omp.inner.for.inc: 602 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 603 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 604 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 605 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 606 // CHECK9: omp.inner.for.end: 607 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 608 // CHECK9: omp.loop.exit: 609 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 610 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 611 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 612 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 613 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 614 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 615 // CHECK9: .omp.final.then: 616 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 617 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 618 // CHECK9: .omp.final.done: 619 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 620 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 621 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2 622 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 623 // CHECK9: arraydestroy.body: 624 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 625 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 626 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 627 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 628 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 629 // CHECK9: arraydestroy.done8: 630 // CHECK9-NEXT: ret void 631 // 632 // 633 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 634 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 635 // CHECK9-NEXT: entry: 636 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 637 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 638 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 639 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 640 // CHECK9-NEXT: ret void 641 // 642 // 643 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 644 // CHECK9-SAME: (i64 noundef [[I:%.*]]) #[[ATTR3]] { 645 // CHECK9-NEXT: entry: 646 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8 647 // CHECK9-NEXT: store i64 [[I]], ptr [[I_ADDR]], align 8 648 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[I_ADDR]]) 649 // CHECK9-NEXT: ret void 650 // 651 // 652 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined 653 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] { 654 // CHECK9-NEXT: entry: 655 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 656 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 657 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 8 658 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 659 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 660 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 661 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 662 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 663 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 664 // CHECK9-NEXT: [[I1:%.*]] = alloca i32, align 4 665 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 666 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 667 // CHECK9-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 8 668 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8 669 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 670 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 671 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 672 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 673 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 674 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 675 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 676 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 677 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 678 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 679 // CHECK9: cond.true: 680 // CHECK9-NEXT: br label [[COND_END:%.*]] 681 // CHECK9: cond.false: 682 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 683 // CHECK9-NEXT: br label [[COND_END]] 684 // CHECK9: cond.end: 685 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 686 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 687 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 688 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 689 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 690 // CHECK9: omp.inner.for.cond: 691 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 692 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]] 693 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 694 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 695 // CHECK9: omp.inner.for.body: 696 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 697 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 698 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 699 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I1]], align 4, !llvm.access.group [[ACC_GRP12]] 700 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 701 // CHECK9: omp.body.continue: 702 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 703 // CHECK9: omp.inner.for.inc: 704 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 705 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 706 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]] 707 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 708 // CHECK9: omp.inner.for.end: 709 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 710 // CHECK9: omp.loop.exit: 711 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 712 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 713 // CHECK9-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 714 // CHECK9-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 715 // CHECK9: .omp.final.then: 716 // CHECK9-NEXT: store i32 2, ptr [[TMP0]], align 4 717 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 718 // CHECK9: .omp.final.done: 719 // CHECK9-NEXT: ret void 720 // 721 // 722 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 723 // CHECK9-SAME: () #[[ATTR1]] comdat { 724 // CHECK9-NEXT: entry: 725 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 726 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 727 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 728 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 729 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 730 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 731 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 732 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 733 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 734 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 735 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 736 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 737 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 738 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 739 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 740 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 741 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 742 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 743 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 744 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 745 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 746 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 747 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 748 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 749 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 750 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 751 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 752 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 753 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 754 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 755 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 756 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 757 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 758 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 759 // CHECK9-NEXT: store i64 2, ptr [[TMP8]], align 8 760 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 761 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 762 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 763 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 764 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 765 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 4 766 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 767 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 768 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 769 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 770 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 771 // CHECK9: omp_offload.failed: 772 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 773 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 774 // CHECK9: omp_offload.cont: 775 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 776 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 777 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 778 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 779 // CHECK9: arraydestroy.body: 780 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 781 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 782 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 783 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 784 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 785 // CHECK9: arraydestroy.done2: 786 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 787 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 788 // CHECK9-NEXT: ret i32 [[TMP16]] 789 // 790 // 791 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 792 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 793 // CHECK9-NEXT: entry: 794 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 795 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 796 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 797 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 798 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 799 // CHECK9-NEXT: ret void 800 // 801 // 802 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 803 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 804 // CHECK9-NEXT: entry: 805 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 806 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 807 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 808 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 809 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 810 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 811 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 812 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 813 // CHECK9-NEXT: ret void 814 // 815 // 816 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 817 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 818 // CHECK9-NEXT: entry: 819 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 820 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 821 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 822 // CHECK9-NEXT: ret void 823 // 824 // 825 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 826 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 827 // CHECK9-NEXT: entry: 828 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 829 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 830 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 831 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 832 // CHECK9-NEXT: ret void 833 // 834 // 835 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 836 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 837 // CHECK9-NEXT: entry: 838 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 839 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 840 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 841 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 842 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 843 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 844 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 845 // CHECK9-NEXT: ret void 846 // 847 // 848 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 849 // CHECK9-SAME: () #[[ATTR3]] { 850 // CHECK9-NEXT: entry: 851 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined) 852 // CHECK9-NEXT: ret void 853 // 854 // 855 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 856 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 857 // CHECK9-NEXT: entry: 858 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 859 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 860 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 861 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 862 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 863 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 864 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 865 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 866 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 867 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 868 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 869 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 870 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 871 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 872 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 873 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 874 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 875 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 876 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 877 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 878 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 879 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 880 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 881 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 882 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 883 // CHECK9: arrayctor.loop: 884 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 885 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 886 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 887 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 888 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 889 // CHECK9: arrayctor.cont: 890 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 891 // CHECK9-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8 892 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 893 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 894 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 895 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 896 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 897 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 898 // CHECK9: cond.true: 899 // CHECK9-NEXT: br label [[COND_END:%.*]] 900 // CHECK9: cond.false: 901 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 902 // CHECK9-NEXT: br label [[COND_END]] 903 // CHECK9: cond.end: 904 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 905 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 906 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 907 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 908 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 909 // CHECK9: omp.inner.for.cond: 910 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 911 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 912 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 913 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 914 // CHECK9: omp.inner.for.cond.cleanup: 915 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 916 // CHECK9: omp.inner.for.body: 917 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 918 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 919 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 920 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 921 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP15]] 922 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 923 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 924 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 925 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 926 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8, !llvm.access.group [[ACC_GRP15]] 927 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]] 928 // CHECK9-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 929 // CHECK9-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]] 930 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP15]] 931 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 932 // CHECK9: omp.body.continue: 933 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 934 // CHECK9: omp.inner.for.inc: 935 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 936 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1 937 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 938 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 939 // CHECK9: omp.inner.for.end: 940 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 941 // CHECK9: omp.loop.exit: 942 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 943 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 944 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 945 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 946 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 947 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 948 // CHECK9: .omp.final.then: 949 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 950 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 951 // CHECK9: .omp.final.done: 952 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 953 // CHECK9-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 954 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN7]], i64 2 955 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 956 // CHECK9: arraydestroy.body: 957 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 958 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 959 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 960 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 961 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 962 // CHECK9: arraydestroy.done8: 963 // CHECK9-NEXT: ret void 964 // 965 // 966 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 967 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 968 // CHECK9-NEXT: entry: 969 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 970 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 971 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 972 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 973 // CHECK9-NEXT: ret void 974 // 975 // 976 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 977 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 978 // CHECK9-NEXT: entry: 979 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 980 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 981 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 982 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 983 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 984 // CHECK9-NEXT: ret void 985 // 986 // 987 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 988 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 989 // CHECK9-NEXT: entry: 990 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 991 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 992 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 993 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 994 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 995 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 996 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 997 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 998 // CHECK9-NEXT: ret void 999 // 1000 // 1001 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1002 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1003 // CHECK9-NEXT: entry: 1004 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1005 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1006 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1007 // CHECK9-NEXT: ret void 1008 // 1009 // 1010 // CHECK11-LABEL: define {{[^@]+}}@main 1011 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1012 // CHECK11-NEXT: entry: 1013 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1014 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1015 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4 1016 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1017 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1018 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1019 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1020 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1021 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1022 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1023 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1024 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1025 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4 1026 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1027 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1028 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1029 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1030 // CHECK11-NEXT: [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1031 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1032 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4 1033 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1034 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1035 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1036 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1037 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1038 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1039 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1040 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1041 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1042 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 1043 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1044 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 1045 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1046 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1047 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1048 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1049 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1050 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 4 1051 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1052 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 4 1053 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1054 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1055 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1056 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 1057 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1058 // CHECK11-NEXT: store i64 2, ptr [[TMP8]], align 8 1059 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1060 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 1061 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1062 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1063 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1064 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 4 1065 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1066 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 1067 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, ptr [[KERNEL_ARGS]]) 1068 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1069 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1070 // CHECK11: omp_offload.failed: 1071 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]] 1072 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1073 // CHECK11: omp_offload.cont: 1074 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4 1075 // CHECK11-NEXT: store i32 [[TMP15]], ptr [[I_CASTED]], align 4 1076 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I_CASTED]], align 4 1077 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1078 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[TMP17]], align 4 1079 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1080 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[TMP18]], align 4 1081 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1082 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4 1083 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1084 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1085 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 0 1086 // CHECK11-NEXT: store i32 3, ptr [[TMP22]], align 4 1087 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 1 1088 // CHECK11-NEXT: store i32 1, ptr [[TMP23]], align 4 1089 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 2 1090 // CHECK11-NEXT: store ptr [[TMP20]], ptr [[TMP24]], align 4 1091 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 3 1092 // CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 4 1093 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 4 1094 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP26]], align 4 1095 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 5 1096 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP27]], align 4 1097 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 6 1098 // CHECK11-NEXT: store ptr null, ptr [[TMP28]], align 4 1099 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 7 1100 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 1101 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 8 1102 // CHECK11-NEXT: store i64 2, ptr [[TMP30]], align 8 1103 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 9 1104 // CHECK11-NEXT: store i64 0, ptr [[TMP31]], align 8 1105 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 10 1106 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4 1107 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 11 1108 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4 1109 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 12 1110 // CHECK11-NEXT: store i32 0, ptr [[TMP34]], align 4 1111 // CHECK11-NEXT: [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS3]]) 1112 // CHECK11-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1113 // CHECK11-NEXT: br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]] 1114 // CHECK11: omp_offload.failed4: 1115 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP16]]) #[[ATTR4]] 1116 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT5]] 1117 // CHECK11: omp_offload.cont5: 1118 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1119 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1120 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1121 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1122 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1123 // CHECK11: arraydestroy.body: 1124 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP37]], [[OMP_OFFLOAD_CONT5]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1125 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1126 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1127 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1128 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]] 1129 // CHECK11: arraydestroy.done6: 1130 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1131 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 4 1132 // CHECK11-NEXT: ret i32 [[TMP38]] 1133 // 1134 // 1135 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1136 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1137 // CHECK11-NEXT: entry: 1138 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1139 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1140 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1141 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1142 // CHECK11-NEXT: ret void 1143 // 1144 // 1145 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1146 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1147 // CHECK11-NEXT: entry: 1148 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1149 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1150 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1151 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1152 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1153 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1154 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1155 // CHECK11-NEXT: ret void 1156 // 1157 // 1158 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93 1159 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 1160 // CHECK11-NEXT: entry: 1161 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined) 1162 // CHECK11-NEXT: ret void 1163 // 1164 // 1165 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined 1166 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1167 // CHECK11-NEXT: entry: 1168 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1169 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1170 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1171 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1172 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1173 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1174 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1175 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1176 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1177 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1178 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1179 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1180 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1181 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1182 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1183 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1184 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1185 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1186 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1187 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1188 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1189 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1190 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1191 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1192 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1193 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1194 // CHECK11: arrayctor.loop: 1195 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1196 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1197 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1198 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1199 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1200 // CHECK11: arrayctor.cont: 1201 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1202 // CHECK11-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1203 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1204 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1205 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1206 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1207 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1208 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1209 // CHECK11: cond.true: 1210 // CHECK11-NEXT: br label [[COND_END:%.*]] 1211 // CHECK11: cond.false: 1212 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1213 // CHECK11-NEXT: br label [[COND_END]] 1214 // CHECK11: cond.end: 1215 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1216 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1217 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1218 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1219 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1220 // CHECK11: omp.inner.for.cond: 1221 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 1222 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 1223 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1224 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1225 // CHECK11: omp.inner.for.cond.cleanup: 1226 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1227 // CHECK11: omp.inner.for.body: 1228 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 1229 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1230 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1231 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 1232 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP7]] 1233 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 1234 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]] 1235 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]] 1236 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP7]] 1237 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 1238 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP11]] 1239 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]] 1240 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1241 // CHECK11: omp.body.continue: 1242 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1243 // CHECK11: omp.inner.for.inc: 1244 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 1245 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 1246 // CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 1247 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 1248 // CHECK11: omp.inner.for.end: 1249 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1250 // CHECK11: omp.loop.exit: 1251 // CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1252 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 1253 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 1254 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1255 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1256 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1257 // CHECK11: .omp.final.then: 1258 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1259 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1260 // CHECK11: .omp.final.done: 1261 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1262 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1263 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i32 2 1264 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1265 // CHECK11: arraydestroy.body: 1266 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1267 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1268 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1269 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1270 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1271 // CHECK11: arraydestroy.done7: 1272 // CHECK11-NEXT: ret void 1273 // 1274 // 1275 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1276 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1277 // CHECK11-NEXT: entry: 1278 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1279 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1280 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1281 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1282 // CHECK11-NEXT: ret void 1283 // 1284 // 1285 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1286 // CHECK11-SAME: (i32 noundef [[I:%.*]]) #[[ATTR3]] { 1287 // CHECK11-NEXT: entry: 1288 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4 1289 // CHECK11-NEXT: store i32 [[I]], ptr [[I_ADDR]], align 4 1290 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[I_ADDR]]) 1291 // CHECK11-NEXT: ret void 1292 // 1293 // 1294 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined 1295 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] { 1296 // CHECK11-NEXT: entry: 1297 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1298 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1299 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca ptr, align 4 1300 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1301 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1302 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1303 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1304 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1305 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1306 // CHECK11-NEXT: [[I1:%.*]] = alloca i32, align 4 1307 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1308 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1309 // CHECK11-NEXT: store ptr [[I]], ptr [[I_ADDR]], align 4 1310 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4 1311 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1312 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1313 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1314 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1315 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1316 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1317 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1318 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1319 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1320 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1321 // CHECK11: cond.true: 1322 // CHECK11-NEXT: br label [[COND_END:%.*]] 1323 // CHECK11: cond.false: 1324 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1325 // CHECK11-NEXT: br label [[COND_END]] 1326 // CHECK11: cond.end: 1327 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1328 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1329 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1330 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1331 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1332 // CHECK11: omp.inner.for.cond: 1333 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 1334 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]] 1335 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1336 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1337 // CHECK11: omp.inner.for.body: 1338 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1339 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1340 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1341 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I1]], align 4, !llvm.access.group [[ACC_GRP13]] 1342 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1343 // CHECK11: omp.body.continue: 1344 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1345 // CHECK11: omp.inner.for.inc: 1346 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1347 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1 1348 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]] 1349 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1350 // CHECK11: omp.inner.for.end: 1351 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1352 // CHECK11: omp.loop.exit: 1353 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1354 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1355 // CHECK11-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 1356 // CHECK11-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1357 // CHECK11: .omp.final.then: 1358 // CHECK11-NEXT: store i32 2, ptr [[TMP0]], align 4 1359 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1360 // CHECK11: .omp.final.done: 1361 // CHECK11-NEXT: ret void 1362 // 1363 // 1364 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1365 // CHECK11-SAME: () #[[ATTR1]] comdat { 1366 // CHECK11-NEXT: entry: 1367 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1368 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1369 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1370 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1371 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1372 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1373 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1374 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1375 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1376 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1377 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1378 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1379 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1380 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1381 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1382 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1383 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1384 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1385 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 1386 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1387 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 1388 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1389 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1390 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1391 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1392 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1393 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 4 1394 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1395 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 4 1396 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1397 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1398 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1399 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 1400 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1401 // CHECK11-NEXT: store i64 2, ptr [[TMP8]], align 8 1402 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1403 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 1404 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1405 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1406 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1407 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 4 1408 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1409 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 1410 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 1411 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1412 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1413 // CHECK11: omp_offload.failed: 1414 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1415 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1416 // CHECK11: omp_offload.cont: 1417 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1418 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1419 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1420 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1421 // CHECK11: arraydestroy.body: 1422 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1423 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1424 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1425 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1426 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1427 // CHECK11: arraydestroy.done2: 1428 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1429 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1430 // CHECK11-NEXT: ret i32 [[TMP16]] 1431 // 1432 // 1433 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1434 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1435 // CHECK11-NEXT: entry: 1436 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1437 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1438 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1439 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1440 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1441 // CHECK11-NEXT: ret void 1442 // 1443 // 1444 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1445 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1446 // CHECK11-NEXT: entry: 1447 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1448 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1449 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1450 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1451 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1452 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1453 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1454 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1455 // CHECK11-NEXT: ret void 1456 // 1457 // 1458 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1459 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1460 // CHECK11-NEXT: entry: 1461 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1462 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1463 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1464 // CHECK11-NEXT: ret void 1465 // 1466 // 1467 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1468 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1469 // CHECK11-NEXT: entry: 1470 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1471 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1472 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1473 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1474 // CHECK11-NEXT: ret void 1475 // 1476 // 1477 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1478 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1479 // CHECK11-NEXT: entry: 1480 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1481 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1482 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1483 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1484 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1485 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1486 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1487 // CHECK11-NEXT: ret void 1488 // 1489 // 1490 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1491 // CHECK11-SAME: () #[[ATTR3]] { 1492 // CHECK11-NEXT: entry: 1493 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined) 1494 // CHECK11-NEXT: ret void 1495 // 1496 // 1497 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1498 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1499 // CHECK11-NEXT: entry: 1500 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1501 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1502 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1503 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1504 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1505 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1506 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1507 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1508 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1509 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1510 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1511 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1512 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1513 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1514 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1515 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1516 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1517 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1518 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1519 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1520 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1521 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1522 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1523 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1524 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1525 // CHECK11: arrayctor.loop: 1526 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1527 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1528 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1529 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1530 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1531 // CHECK11: arrayctor.cont: 1532 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1533 // CHECK11-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1534 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1535 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1536 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1537 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1538 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1539 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1540 // CHECK11: cond.true: 1541 // CHECK11-NEXT: br label [[COND_END:%.*]] 1542 // CHECK11: cond.false: 1543 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1544 // CHECK11-NEXT: br label [[COND_END]] 1545 // CHECK11: cond.end: 1546 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1547 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1548 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1549 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1550 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1551 // CHECK11: omp.inner.for.cond: 1552 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 1553 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]] 1554 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1555 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1556 // CHECK11: omp.inner.for.cond.cleanup: 1557 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1558 // CHECK11: omp.inner.for.body: 1559 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 1560 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1561 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1562 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 1563 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP16]] 1564 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 1565 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]] 1566 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]] 1567 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP16]] 1568 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]] 1569 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP11]] 1570 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP16]] 1571 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1572 // CHECK11: omp.body.continue: 1573 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1574 // CHECK11: omp.inner.for.inc: 1575 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 1576 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 1577 // CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]] 1578 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 1579 // CHECK11: omp.inner.for.end: 1580 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1581 // CHECK11: omp.loop.exit: 1582 // CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1583 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 1584 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 1585 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1586 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1587 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1588 // CHECK11: .omp.final.then: 1589 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1590 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1591 // CHECK11: .omp.final.done: 1592 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1593 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1594 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 2 1595 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1596 // CHECK11: arraydestroy.body: 1597 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1598 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1599 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1600 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1601 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1602 // CHECK11: arraydestroy.done7: 1603 // CHECK11-NEXT: ret void 1604 // 1605 // 1606 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1607 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1608 // CHECK11-NEXT: entry: 1609 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1610 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1611 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1612 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1613 // CHECK11-NEXT: ret void 1614 // 1615 // 1616 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1617 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1618 // CHECK11-NEXT: entry: 1619 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1620 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1621 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1622 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1623 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1624 // CHECK11-NEXT: ret void 1625 // 1626 // 1627 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1628 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1629 // CHECK11-NEXT: entry: 1630 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1631 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1632 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1633 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1634 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1635 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1636 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1637 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1638 // CHECK11-NEXT: ret void 1639 // 1640 // 1641 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1642 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1643 // CHECK11-NEXT: entry: 1644 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1645 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1646 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1647 // CHECK11-NEXT: ret void 1648 // 1649 // 1650 // CHECK13-LABEL: define {{[^@]+}}@main 1651 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 1652 // CHECK13-NEXT: entry: 1653 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1654 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 1655 // CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 8 1656 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1657 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1658 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1659 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1660 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 1661 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 1662 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1663 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1664 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1665 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1666 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1667 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1668 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 1669 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 1670 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 1671 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1672 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 1673 // CHECK13-NEXT: [[I12:%.*]] = alloca i32, align 4 1674 // CHECK13-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1675 // CHECK13-NEXT: [[DOTOMP_LB14:%.*]] = alloca i32, align 4 1676 // CHECK13-NEXT: [[DOTOMP_UB15:%.*]] = alloca i32, align 4 1677 // CHECK13-NEXT: [[DOTOMP_IV16:%.*]] = alloca i32, align 4 1678 // CHECK13-NEXT: [[I17:%.*]] = alloca i32, align 4 1679 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 1680 // CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 8 1681 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1682 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 1683 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 1684 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1685 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 1686 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1687 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 1688 // CHECK13-NEXT: store ptr undef, ptr [[_TMP1]], align 8 1689 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1690 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1691 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1692 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 1693 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1694 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 1695 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1696 // CHECK13: arrayctor.loop: 1697 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1698 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1699 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 1700 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1701 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1702 // CHECK13: arrayctor.cont: 1703 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1704 // CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 1705 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1706 // CHECK13: omp.inner.for.cond: 1707 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 1708 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 1709 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1710 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1711 // CHECK13: omp.inner.for.cond.cleanup: 1712 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1713 // CHECK13: omp.inner.for.body: 1714 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1715 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1716 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1717 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1718 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]] 1719 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1720 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 1721 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 1722 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 1723 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP2]] 1724 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 1725 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64 1726 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 1727 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]] 1728 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1729 // CHECK13: omp.body.continue: 1730 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1731 // CHECK13: omp.inner.for.inc: 1732 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1733 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1 1734 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 1735 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1736 // CHECK13: omp.inner.for.end: 1737 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 1738 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]] 1739 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 1740 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 2 1741 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1742 // CHECK13: arraydestroy.body: 1743 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1744 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1745 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1746 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 1747 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 1748 // CHECK13: arraydestroy.done11: 1749 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB14]], align 4 1750 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB15]], align 4 1751 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB14]], align 4 1752 // CHECK13-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV16]], align 4 1753 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND18:%.*]] 1754 // CHECK13: omp.inner.for.cond18: 1755 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1756 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB15]], align 4, !llvm.access.group [[ACC_GRP6]] 1757 // CHECK13-NEXT: [[CMP19:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 1758 // CHECK13-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY20:%.*]], label [[OMP_INNER_FOR_END26:%.*]] 1759 // CHECK13: omp.inner.for.body20: 1760 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP6]] 1761 // CHECK13-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP13]], 1 1762 // CHECK13-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]] 1763 // CHECK13-NEXT: store i32 [[ADD22]], ptr [[I17]], align 4, !llvm.access.group [[ACC_GRP6]] 1764 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE23:%.*]] 1765 // CHECK13: omp.body.continue23: 1766 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC24:%.*]] 1767 // CHECK13: omp.inner.for.inc24: 1768 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP6]] 1769 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 [[TMP14]], 1 1770 // CHECK13-NEXT: store i32 [[ADD25]], ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP6]] 1771 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND18]], !llvm.loop [[LOOP7:![0-9]+]] 1772 // CHECK13: omp.inner.for.end26: 1773 // CHECK13-NEXT: store i32 2, ptr [[I12]], align 4 1774 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 1775 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1776 // CHECK13-NEXT: [[ARRAY_BEGIN27:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1777 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN27]], i64 2 1778 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY28:%.*]] 1779 // CHECK13: arraydestroy.body28: 1780 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST29:%.*]] = phi ptr [ [[TMP15]], [[OMP_INNER_FOR_END26]] ], [ [[ARRAYDESTROY_ELEMENT30:%.*]], [[ARRAYDESTROY_BODY28]] ] 1781 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT30]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST29]], i64 -1 1782 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT30]]) #[[ATTR3]] 1783 // CHECK13-NEXT: [[ARRAYDESTROY_DONE31:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT30]], [[ARRAY_BEGIN27]] 1784 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE31]], label [[ARRAYDESTROY_DONE32:%.*]], label [[ARRAYDESTROY_BODY28]] 1785 // CHECK13: arraydestroy.done32: 1786 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 1787 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1788 // CHECK13-NEXT: ret i32 [[TMP16]] 1789 // 1790 // 1791 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1792 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 1793 // CHECK13-NEXT: entry: 1794 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1795 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1796 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1797 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1798 // CHECK13-NEXT: ret void 1799 // 1800 // 1801 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1802 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1803 // CHECK13-NEXT: entry: 1804 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1805 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1806 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1807 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1808 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1809 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1810 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1811 // CHECK13-NEXT: ret void 1812 // 1813 // 1814 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1815 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1816 // CHECK13-NEXT: entry: 1817 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1818 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1819 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1820 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 1821 // CHECK13-NEXT: ret void 1822 // 1823 // 1824 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1825 // CHECK13-SAME: () #[[ATTR1]] comdat { 1826 // CHECK13-NEXT: entry: 1827 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1828 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1829 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1830 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1831 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1832 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 1833 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 1834 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1835 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1836 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1837 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1838 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1839 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 1840 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 1841 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 1842 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 1843 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 1844 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1845 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 1846 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 1847 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 1848 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 1849 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 1850 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 1851 // CHECK13-NEXT: store ptr undef, ptr [[_TMP1]], align 8 1852 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1853 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1854 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1855 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 1856 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1857 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1858 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1859 // CHECK13: arrayctor.loop: 1860 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1861 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1862 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 1863 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1864 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1865 // CHECK13: arrayctor.cont: 1866 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 1867 // CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 1868 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1869 // CHECK13: omp.inner.for.cond: 1870 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 1871 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 1872 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1873 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1874 // CHECK13: omp.inner.for.cond.cleanup: 1875 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1876 // CHECK13: omp.inner.for.body: 1877 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1878 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1879 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1880 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 1881 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP9]] 1882 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 1883 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 1884 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 1885 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]] 1886 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP9]] 1887 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 1888 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64 1889 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 1890 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]] 1891 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1892 // CHECK13: omp.body.continue: 1893 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1894 // CHECK13: omp.inner.for.inc: 1895 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1896 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1 1897 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 1898 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1899 // CHECK13: omp.inner.for.end: 1900 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 1901 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]] 1902 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 1903 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2 1904 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1905 // CHECK13: arraydestroy.body: 1906 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1907 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1908 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 1909 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 1910 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 1911 // CHECK13: arraydestroy.done11: 1912 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 1913 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1914 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2 1915 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 1916 // CHECK13: arraydestroy.body13: 1917 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 1918 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 1919 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR3]] 1920 // CHECK13-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 1921 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 1922 // CHECK13: arraydestroy.done17: 1923 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 1924 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4 1925 // CHECK13-NEXT: ret i32 [[TMP11]] 1926 // 1927 // 1928 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1929 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1930 // CHECK13-NEXT: entry: 1931 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1932 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1933 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1934 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1935 // CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1936 // CHECK13-NEXT: ret void 1937 // 1938 // 1939 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1940 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1941 // CHECK13-NEXT: entry: 1942 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1943 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1944 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1945 // CHECK13-NEXT: ret void 1946 // 1947 // 1948 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1949 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1950 // CHECK13-NEXT: entry: 1951 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1952 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1953 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1954 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1955 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1956 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1957 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1958 // CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 4 1959 // CHECK13-NEXT: ret void 1960 // 1961 // 1962 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1963 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1964 // CHECK13-NEXT: entry: 1965 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1966 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1967 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1968 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1969 // CHECK13-NEXT: ret void 1970 // 1971 // 1972 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1973 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1974 // CHECK13-NEXT: entry: 1975 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1976 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1977 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1978 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1979 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1980 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1981 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1982 // CHECK13-NEXT: ret void 1983 // 1984 // 1985 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1986 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1987 // CHECK13-NEXT: entry: 1988 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1989 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1990 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1991 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 1992 // CHECK13-NEXT: ret void 1993 // 1994 // 1995 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1996 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1997 // CHECK13-NEXT: entry: 1998 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1999 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2000 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2001 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2002 // CHECK13-NEXT: store i32 0, ptr [[F]], align 4 2003 // CHECK13-NEXT: ret void 2004 // 2005 // 2006 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2007 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2008 // CHECK13-NEXT: entry: 2009 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2010 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2011 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2012 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2013 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2014 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2015 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2016 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2017 // CHECK13-NEXT: ret void 2018 // 2019 // 2020 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2021 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2022 // CHECK13-NEXT: entry: 2023 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2024 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2025 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2026 // CHECK13-NEXT: ret void 2027 // 2028 // 2029 // CHECK15-LABEL: define {{[^@]+}}@main 2030 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2031 // CHECK15-NEXT: entry: 2032 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2033 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 2034 // CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 4 2035 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2036 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2037 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2038 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2039 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2040 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2041 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2042 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2043 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2044 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2045 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2046 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2047 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2048 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 2049 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 2050 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2051 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2052 // CHECK15-NEXT: [[I11:%.*]] = alloca i32, align 4 2053 // CHECK15-NEXT: [[_TMP12:%.*]] = alloca i32, align 4 2054 // CHECK15-NEXT: [[DOTOMP_LB13:%.*]] = alloca i32, align 4 2055 // CHECK15-NEXT: [[DOTOMP_UB14:%.*]] = alloca i32, align 4 2056 // CHECK15-NEXT: [[DOTOMP_IV15:%.*]] = alloca i32, align 4 2057 // CHECK15-NEXT: [[I16:%.*]] = alloca i32, align 4 2058 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2059 // CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 4 2060 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2061 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2062 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 2063 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 2064 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 2065 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2066 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2067 // CHECK15-NEXT: store ptr undef, ptr [[_TMP1]], align 4 2068 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2069 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2070 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2071 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 2072 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2073 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 2074 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2075 // CHECK15: arrayctor.loop: 2076 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2077 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2078 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 2079 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2080 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2081 // CHECK15: arrayctor.cont: 2082 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2083 // CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 2084 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2085 // CHECK15: omp.inner.for.cond: 2086 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 2087 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 2088 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2089 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2090 // CHECK15: omp.inner.for.cond.cleanup: 2091 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2092 // CHECK15: omp.inner.for.body: 2093 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2094 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2095 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2096 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2097 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP3]] 2098 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2099 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]] 2100 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 2101 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP3]] 2102 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2103 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP7]] 2104 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]] 2105 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2106 // CHECK15: omp.body.continue: 2107 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2108 // CHECK15: omp.inner.for.inc: 2109 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2110 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1 2111 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2112 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2113 // CHECK15: omp.inner.for.end: 2114 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2115 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]] 2116 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2117 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 2 2118 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2119 // CHECK15: arraydestroy.body: 2120 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2121 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2122 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2123 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 2124 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 2125 // CHECK15: arraydestroy.done10: 2126 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB13]], align 4 2127 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB14]], align 4 2128 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB13]], align 4 2129 // CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV15]], align 4 2130 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND17:%.*]] 2131 // CHECK15: omp.inner.for.cond17: 2132 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 2133 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB14]], align 4, !llvm.access.group [[ACC_GRP7]] 2134 // CHECK15-NEXT: [[CMP18:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 2135 // CHECK15-NEXT: br i1 [[CMP18]], label [[OMP_INNER_FOR_BODY19:%.*]], label [[OMP_INNER_FOR_END25:%.*]] 2136 // CHECK15: omp.inner.for.body19: 2137 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP7]] 2138 // CHECK15-NEXT: [[MUL20:%.*]] = mul nsw i32 [[TMP13]], 1 2139 // CHECK15-NEXT: [[ADD21:%.*]] = add nsw i32 0, [[MUL20]] 2140 // CHECK15-NEXT: store i32 [[ADD21]], ptr [[I16]], align 4, !llvm.access.group [[ACC_GRP7]] 2141 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE22:%.*]] 2142 // CHECK15: omp.body.continue22: 2143 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC23:%.*]] 2144 // CHECK15: omp.inner.for.inc23: 2145 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP7]] 2146 // CHECK15-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP14]], 1 2147 // CHECK15-NEXT: store i32 [[ADD24]], ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP7]] 2148 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND17]], !llvm.loop [[LOOP8:![0-9]+]] 2149 // CHECK15: omp.inner.for.end25: 2150 // CHECK15-NEXT: store i32 2, ptr [[I11]], align 4 2151 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2152 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2153 // CHECK15-NEXT: [[ARRAY_BEGIN26:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2154 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN26]], i32 2 2155 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY27:%.*]] 2156 // CHECK15: arraydestroy.body27: 2157 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST28:%.*]] = phi ptr [ [[TMP15]], [[OMP_INNER_FOR_END25]] ], [ [[ARRAYDESTROY_ELEMENT29:%.*]], [[ARRAYDESTROY_BODY27]] ] 2158 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT29]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST28]], i32 -1 2159 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT29]]) #[[ATTR3]] 2160 // CHECK15-NEXT: [[ARRAYDESTROY_DONE30:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT29]], [[ARRAY_BEGIN26]] 2161 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE30]], label [[ARRAYDESTROY_DONE31:%.*]], label [[ARRAYDESTROY_BODY27]] 2162 // CHECK15: arraydestroy.done31: 2163 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2164 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 2165 // CHECK15-NEXT: ret i32 [[TMP16]] 2166 // 2167 // 2168 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2169 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2170 // CHECK15-NEXT: entry: 2171 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2172 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2173 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2174 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2175 // CHECK15-NEXT: ret void 2176 // 2177 // 2178 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2179 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2180 // CHECK15-NEXT: entry: 2181 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2182 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2183 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2184 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2185 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2186 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2187 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2188 // CHECK15-NEXT: ret void 2189 // 2190 // 2191 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2192 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2193 // CHECK15-NEXT: entry: 2194 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2195 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2196 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2197 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2198 // CHECK15-NEXT: ret void 2199 // 2200 // 2201 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2202 // CHECK15-SAME: () #[[ATTR1]] comdat { 2203 // CHECK15-NEXT: entry: 2204 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2205 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2206 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2207 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2208 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2209 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2210 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2211 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2212 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2213 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2214 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2215 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2216 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2217 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2218 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 2219 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 2220 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2221 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2222 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2223 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 2224 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 2225 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 2226 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2227 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2228 // CHECK15-NEXT: store ptr undef, ptr [[_TMP1]], align 4 2229 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2230 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2231 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2232 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 2233 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2234 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 2235 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2236 // CHECK15: arrayctor.loop: 2237 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2238 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2239 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 2240 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2241 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2242 // CHECK15: arrayctor.cont: 2243 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2244 // CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 2245 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2246 // CHECK15: omp.inner.for.cond: 2247 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 2248 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 2249 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2250 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2251 // CHECK15: omp.inner.for.cond.cleanup: 2252 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2253 // CHECK15: omp.inner.for.body: 2254 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 2255 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2256 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2257 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 2258 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP10]] 2259 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 2260 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]] 2261 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 2262 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP10]] 2263 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 2264 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP7]] 2265 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]] 2266 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2267 // CHECK15: omp.body.continue: 2268 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2269 // CHECK15: omp.inner.for.inc: 2270 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 2271 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1 2272 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 2273 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2274 // CHECK15: omp.inner.for.end: 2275 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2276 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]] 2277 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2278 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2 2279 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2280 // CHECK15: arraydestroy.body: 2281 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2282 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2283 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2284 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 2285 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 2286 // CHECK15: arraydestroy.done10: 2287 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2288 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2289 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2 2290 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 2291 // CHECK15: arraydestroy.body12: 2292 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 2293 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 2294 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR3]] 2295 // CHECK15-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 2296 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 2297 // CHECK15: arraydestroy.done16: 2298 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2299 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4 2300 // CHECK15-NEXT: ret i32 [[TMP11]] 2301 // 2302 // 2303 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2304 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2305 // CHECK15-NEXT: entry: 2306 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2307 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2308 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2309 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2310 // CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2311 // CHECK15-NEXT: ret void 2312 // 2313 // 2314 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2315 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2316 // CHECK15-NEXT: entry: 2317 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2318 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2319 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2320 // CHECK15-NEXT: ret void 2321 // 2322 // 2323 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2324 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2325 // CHECK15-NEXT: entry: 2326 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2327 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2328 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2329 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2330 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2331 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2332 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2333 // CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 4 2334 // CHECK15-NEXT: ret void 2335 // 2336 // 2337 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2338 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2339 // CHECK15-NEXT: entry: 2340 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2341 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2342 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2343 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2344 // CHECK15-NEXT: ret void 2345 // 2346 // 2347 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2348 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2349 // CHECK15-NEXT: entry: 2350 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2351 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2352 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2353 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2354 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2355 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2356 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2357 // CHECK15-NEXT: ret void 2358 // 2359 // 2360 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2361 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2362 // CHECK15-NEXT: entry: 2363 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2364 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2365 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2366 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2367 // CHECK15-NEXT: ret void 2368 // 2369 // 2370 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2371 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2372 // CHECK15-NEXT: entry: 2373 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2374 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2375 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2376 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2377 // CHECK15-NEXT: store i32 0, ptr [[F]], align 4 2378 // CHECK15-NEXT: ret void 2379 // 2380 // 2381 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2382 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2383 // CHECK15-NEXT: entry: 2384 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2385 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2386 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2387 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2388 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2389 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2390 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2391 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2392 // CHECK15-NEXT: ret void 2393 // 2394 // 2395 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2396 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2397 // CHECK15-NEXT: entry: 2398 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2399 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2400 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2401 // CHECK15-NEXT: ret void 2402 // 2403