1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute parallel for simd private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 73 74 g = 1; 75 g1 = 1; 76 svar = 3; 77 sfvar = 4.0; 78 [&]() { 79 g = 2; 80 g1 = 2; 81 svar = 4; 82 sfvar = 8.0; 83 84 }(); 85 } 86 }(); 87 return 0; 88 #else 89 S<float> test; 90 int t_var = 0; 91 int vec[] = {1, 2}; 92 S<float> s_arr[] = {1, 2}; 93 S<float> &var = test; 94 95 #pragma omp target 96 #pragma omp teams 97 #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var, svar) 98 for (int i = 0; i < 2; ++i) { 99 vec[i] = t_var; 100 s_arr[i] = var; 101 } 102 return tmain<int>(); 103 #endif 104 } 105 106 107 108 // this is the ctor loop 109 110 // call destructors: var.. 111 112 // ..and s_arr 113 114 115 // By OpenMP specifications, private applies to both distribute and parallel for. 116 // However, the support for 'private' of 'parallel' is only used when 'parallel' 117 // is found alone. Therefore we only have one 'private' support for 'parallel for' 118 // in combination 119 // this is the ctor loop 120 121 // call destructors: var.. 122 123 // ..and s_arr 124 125 126 // template tmain with S_INT_TY 127 128 129 130 // this is the ctor loop 131 132 // call destructors: var.. 133 134 // ..and s_arr 135 136 137 #endif 138 // CHECK1-LABEL: define {{[^@]+}}@main 139 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 140 // CHECK1-NEXT: entry: 141 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 142 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 143 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8 144 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 145 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 146 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8 147 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 148 // CHECK1-NEXT: ret i32 0 149 // 150 // 151 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 152 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] { 153 // CHECK1-NEXT: entry: 154 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined) 155 // CHECK1-NEXT: ret void 156 // 157 // 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 159 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 160 // CHECK1-NEXT: entry: 161 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 162 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 163 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 166 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 171 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 172 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 173 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 174 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 175 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 176 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 177 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 178 // CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8 179 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 180 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 181 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 182 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 183 // CHECK1-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 8 184 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 185 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 186 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 187 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 188 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 189 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 190 // CHECK1: cond.true: 191 // CHECK1-NEXT: br label [[COND_END:%.*]] 192 // CHECK1: cond.false: 193 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 194 // CHECK1-NEXT: br label [[COND_END]] 195 // CHECK1: cond.end: 196 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 197 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 198 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 199 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 201 // CHECK1: omp.inner.for.cond: 202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]] 203 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]] 204 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 205 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 206 // CHECK1: omp.inner.for.body: 207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP4]] 208 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 209 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]] 210 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 211 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP4]] 212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 213 // CHECK1: omp.inner.for.inc: 214 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 215 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP4]] 216 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 217 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]] 218 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 219 // CHECK1: omp.inner.for.end: 220 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 221 // CHECK1: omp.loop.exit: 222 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 223 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 224 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 225 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 226 // CHECK1: .omp.final.then: 227 // CHECK1-NEXT: store i32 2, ptr [[I]], align 4 228 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 229 // CHECK1: .omp.final.done: 230 // CHECK1-NEXT: ret void 231 // 232 // 233 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined 234 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 235 // CHECK1-NEXT: entry: 236 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 237 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 238 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 239 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 240 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 243 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 246 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 247 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 248 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8 249 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 250 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 251 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4 252 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 254 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 255 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 256 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 257 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 258 // CHECK1-NEXT: store ptr undef, ptr [[_TMP1]], align 8 259 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 261 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 262 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 263 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 264 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 265 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 266 // CHECK1-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 267 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 268 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 269 // CHECK1-NEXT: store ptr [[G1]], ptr [[_TMP3]], align 8 270 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 271 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 272 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 273 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 274 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 275 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 276 // CHECK1: cond.true: 277 // CHECK1-NEXT: br label [[COND_END:%.*]] 278 // CHECK1: cond.false: 279 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 280 // CHECK1-NEXT: br label [[COND_END]] 281 // CHECK1: cond.end: 282 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 283 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 284 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 285 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 287 // CHECK1: omp.inner.for.cond: 288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]] 289 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]] 290 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 291 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 292 // CHECK1: omp.inner.for.body: 293 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 294 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 295 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 296 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]] 297 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP8]] 298 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP8]] 299 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP8]] 300 // CHECK1-NEXT: store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP8]] 301 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP8]] 302 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 303 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP11]], align 8, !llvm.access.group [[ACC_GRP8]] 304 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 305 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP8]] 306 // CHECK1-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP8]] 307 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 308 // CHECK1-NEXT: store ptr [[SVAR]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP8]] 309 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 310 // CHECK1-NEXT: store ptr [[SFVAR]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP8]] 311 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]] 312 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 313 // CHECK1: omp.body.continue: 314 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 315 // CHECK1: omp.inner.for.inc: 316 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 317 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 318 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]] 319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 320 // CHECK1: omp.inner.for.end: 321 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 322 // CHECK1: omp.loop.exit: 323 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 324 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 325 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 326 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 327 // CHECK1: .omp.final.then: 328 // CHECK1-NEXT: store i32 2, ptr [[I]], align 4 329 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 330 // CHECK1: .omp.final.done: 331 // CHECK1-NEXT: ret void 332 // 333 // 334 // CHECK3-LABEL: define {{[^@]+}}@main 335 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 336 // CHECK3-NEXT: entry: 337 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 338 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 339 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4 340 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 341 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 342 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4 343 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 344 // CHECK3-NEXT: ret i32 0 345 // 346 // 347 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 348 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] { 349 // CHECK3-NEXT: entry: 350 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined) 351 // CHECK3-NEXT: ret void 352 // 353 // 354 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 355 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] { 356 // CHECK3-NEXT: entry: 357 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 358 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 359 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 360 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 361 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 362 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 363 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 364 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 365 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 366 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 367 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 368 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 369 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 370 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 371 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 372 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 373 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 374 // CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4 375 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 376 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 377 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 378 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 379 // CHECK3-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 4 380 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 381 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 382 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 383 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 384 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 385 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 386 // CHECK3: cond.true: 387 // CHECK3-NEXT: br label [[COND_END:%.*]] 388 // CHECK3: cond.false: 389 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 390 // CHECK3-NEXT: br label [[COND_END]] 391 // CHECK3: cond.end: 392 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 393 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 394 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 395 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 396 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 397 // CHECK3: omp.inner.for.cond: 398 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 399 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 400 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 401 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 402 // CHECK3: omp.inner.for.body: 403 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]] 404 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 405 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP5]] 406 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 407 // CHECK3: omp.inner.for.inc: 408 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 409 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]] 410 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 411 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 412 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 413 // CHECK3: omp.inner.for.end: 414 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 415 // CHECK3: omp.loop.exit: 416 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 417 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 418 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 419 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 420 // CHECK3: .omp.final.then: 421 // CHECK3-NEXT: store i32 2, ptr [[I]], align 4 422 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 423 // CHECK3: .omp.final.done: 424 // CHECK3-NEXT: ret void 425 // 426 // 427 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined 428 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] { 429 // CHECK3-NEXT: entry: 430 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 431 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 432 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 433 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 434 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 435 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 436 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 437 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 438 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 439 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 440 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 441 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 442 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 443 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 444 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 445 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 446 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 447 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 448 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 449 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 450 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 451 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 452 // CHECK3-NEXT: store ptr undef, ptr [[_TMP1]], align 4 453 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 454 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 455 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 456 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 457 // CHECK3-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 458 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 459 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 460 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 461 // CHECK3-NEXT: store ptr [[G1]], ptr [[_TMP2]], align 4 462 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 463 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 464 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 465 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 466 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 467 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 468 // CHECK3: cond.true: 469 // CHECK3-NEXT: br label [[COND_END:%.*]] 470 // CHECK3: cond.false: 471 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 472 // CHECK3-NEXT: br label [[COND_END]] 473 // CHECK3: cond.end: 474 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 475 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 476 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 477 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 478 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 479 // CHECK3: omp.inner.for.cond: 480 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 481 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 482 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 483 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 484 // CHECK3: omp.inner.for.body: 485 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 486 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 487 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 488 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 489 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP9]] 490 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP9]] 491 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP9]] 492 // CHECK3-NEXT: store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP9]] 493 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP9]] 494 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 495 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP9]] 496 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 497 // CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP9]] 498 // CHECK3-NEXT: store ptr [[TMP13]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP9]] 499 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 500 // CHECK3-NEXT: store ptr [[SVAR]], ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP9]] 501 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 502 // CHECK3-NEXT: store ptr [[SFVAR]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP9]] 503 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP9]] 504 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 505 // CHECK3: omp.body.continue: 506 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 507 // CHECK3: omp.inner.for.inc: 508 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 509 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1 510 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 511 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 512 // CHECK3: omp.inner.for.end: 513 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 514 // CHECK3: omp.loop.exit: 515 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 516 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 517 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 518 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 519 // CHECK3: .omp.final.then: 520 // CHECK3-NEXT: store i32 2, ptr [[I]], align 4 521 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 522 // CHECK3: .omp.final.done: 523 // CHECK3-NEXT: ret void 524 // 525 // 526 // CHECK5-LABEL: define {{[^@]+}}@main 527 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 528 // CHECK5-NEXT: entry: 529 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 530 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8 531 // CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8 532 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 533 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 534 // CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8 535 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 536 // CHECK5-NEXT: ret i32 0 537 // 538 // 539 // CHECK7-LABEL: define {{[^@]+}}@main 540 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 541 // CHECK7-NEXT: entry: 542 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 543 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8 544 // CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4 545 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 546 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4 547 // CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4 548 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 549 // CHECK7-NEXT: ret i32 0 550 // 551 // 552 // CHECK9-LABEL: define {{[^@]+}}@main 553 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 554 // CHECK9-NEXT: entry: 555 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 556 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 557 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8 558 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 559 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 560 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 561 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 562 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 563 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 564 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 565 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 566 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 567 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8 568 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 569 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 570 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 571 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 572 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 573 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 574 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 575 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 576 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 577 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 578 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 579 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 580 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 581 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 582 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 583 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 584 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 585 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 586 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 587 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 588 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 589 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 590 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 591 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 592 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 593 // CHECK9-NEXT: store i64 2, ptr [[TMP8]], align 8 594 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 595 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 596 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 597 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 598 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 599 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 600 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 601 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 602 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, ptr [[KERNEL_ARGS]]) 603 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 604 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 605 // CHECK9: omp_offload.failed: 606 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 607 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 608 // CHECK9: omp_offload.cont: 609 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 610 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 611 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 612 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 613 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 614 // CHECK9: arraydestroy.body: 615 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 616 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 617 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 618 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 619 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 620 // CHECK9: arraydestroy.done2: 621 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 622 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 623 // CHECK9-NEXT: ret i32 [[TMP16]] 624 // 625 // 626 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 627 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 628 // CHECK9-NEXT: entry: 629 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 630 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 631 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 632 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 633 // CHECK9-NEXT: ret void 634 // 635 // 636 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 637 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 638 // CHECK9-NEXT: entry: 639 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 640 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 641 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 642 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 643 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 644 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 645 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 646 // CHECK9-NEXT: ret void 647 // 648 // 649 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 650 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 651 // CHECK9-NEXT: entry: 652 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined) 653 // CHECK9-NEXT: ret void 654 // 655 // 656 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined 657 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 658 // CHECK9-NEXT: entry: 659 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 660 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 661 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 662 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 663 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 664 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 665 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 666 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 667 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 668 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 669 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 670 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 671 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 672 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 673 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 674 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 675 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 677 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 678 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 679 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 680 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 681 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 682 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 683 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 684 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 685 // CHECK9: arrayctor.loop: 686 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 687 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 688 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 689 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 690 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 691 // CHECK9: arrayctor.cont: 692 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 693 // CHECK9-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8 694 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 695 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 696 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 697 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 698 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 699 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 700 // CHECK9: cond.true: 701 // CHECK9-NEXT: br label [[COND_END:%.*]] 702 // CHECK9: cond.false: 703 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 704 // CHECK9-NEXT: br label [[COND_END]] 705 // CHECK9: cond.end: 706 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 707 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 708 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 709 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 710 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 711 // CHECK9: omp.inner.for.cond: 712 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]] 713 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 714 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 715 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 716 // CHECK9: omp.inner.for.cond.cleanup: 717 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 718 // CHECK9: omp.inner.for.body: 719 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]] 720 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 721 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]] 722 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 723 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP5]] 724 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 725 // CHECK9: omp.inner.for.inc: 726 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 727 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]] 728 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 729 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]] 730 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]] 731 // CHECK9: omp.inner.for.end: 732 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 733 // CHECK9: omp.loop.exit: 734 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 735 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 736 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 737 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 738 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 739 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 740 // CHECK9: .omp.final.then: 741 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 742 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 743 // CHECK9: .omp.final.done: 744 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 745 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 746 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN4]], i64 2 747 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 748 // CHECK9: arraydestroy.body: 749 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 750 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 751 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 752 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 753 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 754 // CHECK9: arraydestroy.done5: 755 // CHECK9-NEXT: ret void 756 // 757 // 758 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined 759 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 760 // CHECK9-NEXT: entry: 761 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 762 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 763 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 764 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 765 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 766 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 767 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 768 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 769 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 770 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 771 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 772 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 773 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 774 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 775 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 776 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 777 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4 778 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 779 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 780 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 781 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 782 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 783 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 784 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 785 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 786 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 787 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 788 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 789 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 790 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 791 // CHECK9-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 792 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 793 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 794 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 795 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 796 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 797 // CHECK9: arrayctor.loop: 798 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 799 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 800 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 801 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 802 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 803 // CHECK9: arrayctor.cont: 804 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 805 // CHECK9-NEXT: store ptr [[VAR]], ptr [[_TMP3]], align 8 806 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 807 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 808 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 809 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 810 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 811 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 812 // CHECK9: cond.true: 813 // CHECK9-NEXT: br label [[COND_END:%.*]] 814 // CHECK9: cond.false: 815 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 816 // CHECK9-NEXT: br label [[COND_END]] 817 // CHECK9: cond.end: 818 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 819 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 820 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 821 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 822 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 823 // CHECK9: omp.inner.for.cond: 824 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 825 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]] 826 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 827 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 828 // CHECK9: omp.inner.for.cond.cleanup: 829 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 830 // CHECK9: omp.inner.for.body: 831 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 832 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 833 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 834 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 835 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP9]] 836 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 837 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 838 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 839 // CHECK9-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]] 840 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP9]] 841 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]] 842 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 843 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]] 844 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]] 845 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 846 // CHECK9: omp.body.continue: 847 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 848 // CHECK9: omp.inner.for.inc: 849 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 850 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1 851 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]] 852 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 853 // CHECK9: omp.inner.for.end: 854 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 855 // CHECK9: omp.loop.exit: 856 // CHECK9-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 857 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 858 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 859 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 860 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 861 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 862 // CHECK9: .omp.final.then: 863 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 864 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 865 // CHECK9: .omp.final.done: 866 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 867 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 868 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN8]], i64 2 869 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 870 // CHECK9: arraydestroy.body: 871 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 872 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 873 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 874 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 875 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 876 // CHECK9: arraydestroy.done9: 877 // CHECK9-NEXT: ret void 878 // 879 // 880 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 881 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 882 // CHECK9-NEXT: entry: 883 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 884 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 885 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 886 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 887 // CHECK9-NEXT: ret void 888 // 889 // 890 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 891 // CHECK9-SAME: () #[[ATTR1]] comdat { 892 // CHECK9-NEXT: entry: 893 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 894 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 895 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 896 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 897 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 898 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 899 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 900 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 901 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 902 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 903 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 904 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 905 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 906 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 907 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 908 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 909 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 910 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 911 // CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 4 912 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 913 // CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 4 914 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 915 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 916 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 917 // CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 8 918 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 919 // CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 8 920 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 921 // CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 8 922 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 923 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8 924 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 925 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 926 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 927 // CHECK9-NEXT: store i64 2, ptr [[TMP8]], align 8 928 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 929 // CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 8 930 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 931 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 932 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 933 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 934 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 935 // CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 4 936 // CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 937 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 938 // CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 939 // CHECK9: omp_offload.failed: 940 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 941 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 942 // CHECK9: omp_offload.cont: 943 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 944 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 945 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 946 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 947 // CHECK9: arraydestroy.body: 948 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 949 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 950 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 951 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 952 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 953 // CHECK9: arraydestroy.done2: 954 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 955 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 956 // CHECK9-NEXT: ret i32 [[TMP16]] 957 // 958 // 959 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 960 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 961 // CHECK9-NEXT: entry: 962 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 963 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 964 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 965 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 966 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 967 // CHECK9-NEXT: ret void 968 // 969 // 970 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 971 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 972 // CHECK9-NEXT: entry: 973 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 974 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 975 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 976 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 977 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 978 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 979 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 980 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 981 // CHECK9-NEXT: ret void 982 // 983 // 984 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 985 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 986 // CHECK9-NEXT: entry: 987 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 988 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 989 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 990 // CHECK9-NEXT: ret void 991 // 992 // 993 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 994 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 995 // CHECK9-NEXT: entry: 996 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 997 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 998 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 999 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1000 // CHECK9-NEXT: ret void 1001 // 1002 // 1003 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1004 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1005 // CHECK9-NEXT: entry: 1006 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1007 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1008 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1009 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1010 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1011 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1012 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 1013 // CHECK9-NEXT: ret void 1014 // 1015 // 1016 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1017 // CHECK9-SAME: () #[[ATTR3]] { 1018 // CHECK9-NEXT: entry: 1019 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined) 1020 // CHECK9-NEXT: ret void 1021 // 1022 // 1023 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1024 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1025 // CHECK9-NEXT: entry: 1026 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1027 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1028 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1029 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1030 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1031 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1032 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1033 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1034 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1035 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1036 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1037 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1038 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1039 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8 1040 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1041 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1042 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1043 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 1044 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1045 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1046 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1047 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1048 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1049 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1050 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1051 // CHECK9: arrayctor.loop: 1052 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1053 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1054 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 1055 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1056 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1057 // CHECK9: arrayctor.cont: 1058 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1059 // CHECK9-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 8 1060 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1061 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1062 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1063 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1064 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1065 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1066 // CHECK9: cond.true: 1067 // CHECK9-NEXT: br label [[COND_END:%.*]] 1068 // CHECK9: cond.false: 1069 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1070 // CHECK9-NEXT: br label [[COND_END]] 1071 // CHECK9: cond.end: 1072 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1073 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1074 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1075 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1076 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1077 // CHECK9: omp.inner.for.cond: 1078 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 1079 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 1080 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1081 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1082 // CHECK9: omp.inner.for.cond.cleanup: 1083 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1084 // CHECK9: omp.inner.for.body: 1085 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]] 1086 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1087 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 1088 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1089 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP14]] 1090 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1091 // CHECK9: omp.inner.for.inc: 1092 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1093 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]] 1094 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1095 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1096 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1097 // CHECK9: omp.inner.for.end: 1098 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1099 // CHECK9: omp.loop.exit: 1100 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1101 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 1102 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]]) 1103 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1104 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 1105 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1106 // CHECK9: .omp.final.then: 1107 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 1108 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1109 // CHECK9: .omp.final.done: 1110 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1111 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1112 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i64 2 1113 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1114 // CHECK9: arraydestroy.body: 1115 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1116 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1117 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1118 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1119 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1120 // CHECK9: arraydestroy.done5: 1121 // CHECK9-NEXT: ret void 1122 // 1123 // 1124 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined 1125 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1126 // CHECK9-NEXT: entry: 1127 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1128 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1129 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1130 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1131 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1132 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1133 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 1134 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1135 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1136 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1137 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1138 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1139 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1140 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1141 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1142 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8 1143 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1144 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1145 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1146 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1147 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1148 // CHECK9-NEXT: store ptr undef, ptr [[_TMP1]], align 8 1149 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1150 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1151 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1152 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1153 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1154 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 1155 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1156 // CHECK9-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4 1157 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1158 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1159 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1160 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1161 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1162 // CHECK9: arrayctor.loop: 1163 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1164 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1165 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 1166 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1167 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1168 // CHECK9: arrayctor.cont: 1169 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1170 // CHECK9-NEXT: store ptr [[VAR]], ptr [[_TMP3]], align 8 1171 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1172 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1173 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1174 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1175 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1176 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1177 // CHECK9: cond.true: 1178 // CHECK9-NEXT: br label [[COND_END:%.*]] 1179 // CHECK9: cond.false: 1180 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1181 // CHECK9-NEXT: br label [[COND_END]] 1182 // CHECK9: cond.end: 1183 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1184 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1185 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1186 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1187 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1188 // CHECK9: omp.inner.for.cond: 1189 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]] 1190 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 1191 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1192 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1193 // CHECK9: omp.inner.for.cond.cleanup: 1194 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1195 // CHECK9: omp.inner.for.body: 1196 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 1197 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1198 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1199 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]] 1200 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP17]] 1201 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]] 1202 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1203 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]] 1204 // CHECK9-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]] 1205 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP17]] 1206 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]] 1207 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64 1208 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]] 1209 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false), !llvm.access.group [[ACC_GRP17]] 1210 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1211 // CHECK9: omp.body.continue: 1212 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1213 // CHECK9: omp.inner.for.inc: 1214 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 1215 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1 1216 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 1217 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 1218 // CHECK9: omp.inner.for.end: 1219 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1220 // CHECK9: omp.loop.exit: 1221 // CHECK9-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1222 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 1223 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 1224 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1225 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1226 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1227 // CHECK9: .omp.final.then: 1228 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4 1229 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1230 // CHECK9: .omp.final.done: 1231 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1232 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1233 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 2 1234 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1235 // CHECK9: arraydestroy.body: 1236 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1237 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1238 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1239 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]] 1240 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]] 1241 // CHECK9: arraydestroy.done9: 1242 // CHECK9-NEXT: ret void 1243 // 1244 // 1245 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1246 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1247 // CHECK9-NEXT: entry: 1248 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1249 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1250 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1251 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1252 // CHECK9-NEXT: ret void 1253 // 1254 // 1255 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1256 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1257 // CHECK9-NEXT: entry: 1258 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1259 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1260 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1261 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1262 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 1263 // CHECK9-NEXT: ret void 1264 // 1265 // 1266 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1267 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1268 // CHECK9-NEXT: entry: 1269 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1270 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1271 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1272 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1273 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1274 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1275 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1276 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1277 // CHECK9-NEXT: ret void 1278 // 1279 // 1280 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1281 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1282 // CHECK9-NEXT: entry: 1283 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1284 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1285 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1286 // CHECK9-NEXT: ret void 1287 // 1288 // 1289 // CHECK11-LABEL: define {{[^@]+}}@main 1290 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1291 // CHECK11-NEXT: entry: 1292 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1293 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1294 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4 1295 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1296 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1297 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1298 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1299 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1300 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1301 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1302 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1303 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1304 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4 1305 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1306 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1307 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1308 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1309 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1310 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1311 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1312 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1313 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1314 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 1315 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1316 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 1317 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1318 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1319 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1320 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1321 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1322 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 4 1323 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1324 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 4 1325 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1326 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1327 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1328 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 1329 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1330 // CHECK11-NEXT: store i64 2, ptr [[TMP8]], align 8 1331 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1332 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 1333 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1334 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1335 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1336 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1337 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1338 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 1339 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, ptr [[KERNEL_ARGS]]) 1340 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1341 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1342 // CHECK11: omp_offload.failed: 1343 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]] 1344 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1345 // CHECK11: omp_offload.cont: 1346 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1347 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1348 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1349 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1350 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1351 // CHECK11: arraydestroy.body: 1352 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1353 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1354 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1355 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1356 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1357 // CHECK11: arraydestroy.done2: 1358 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1359 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1360 // CHECK11-NEXT: ret i32 [[TMP16]] 1361 // 1362 // 1363 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1364 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1365 // CHECK11-NEXT: entry: 1366 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1367 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1368 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1369 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1370 // CHECK11-NEXT: ret void 1371 // 1372 // 1373 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1374 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1375 // CHECK11-NEXT: entry: 1376 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1377 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1378 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1379 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1380 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1381 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1382 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1383 // CHECK11-NEXT: ret void 1384 // 1385 // 1386 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95 1387 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] { 1388 // CHECK11-NEXT: entry: 1389 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined) 1390 // CHECK11-NEXT: ret void 1391 // 1392 // 1393 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined 1394 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1395 // CHECK11-NEXT: entry: 1396 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1397 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1398 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1399 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1400 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1401 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1402 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1403 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1404 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1405 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1406 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1407 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1408 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1409 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1410 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1411 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1412 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1413 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1414 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1415 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1416 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1417 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1418 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1419 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1420 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1421 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1422 // CHECK11: arrayctor.loop: 1423 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1424 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1425 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1426 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1427 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1428 // CHECK11: arrayctor.cont: 1429 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1430 // CHECK11-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1431 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1432 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1433 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1434 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1435 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1436 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1437 // CHECK11: cond.true: 1438 // CHECK11-NEXT: br label [[COND_END:%.*]] 1439 // CHECK11: cond.false: 1440 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1441 // CHECK11-NEXT: br label [[COND_END]] 1442 // CHECK11: cond.end: 1443 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1444 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1445 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1446 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1447 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1448 // CHECK11: omp.inner.for.cond: 1449 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 1450 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 1451 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1452 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1453 // CHECK11: omp.inner.for.cond.cleanup: 1454 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1455 // CHECK11: omp.inner.for.body: 1456 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]] 1457 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 1458 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP6]] 1459 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1460 // CHECK11: omp.inner.for.inc: 1461 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1462 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]] 1463 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1464 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 1465 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 1466 // CHECK11: omp.inner.for.end: 1467 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1468 // CHECK11: omp.loop.exit: 1469 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1470 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 1471 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]]) 1472 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1473 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1474 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1475 // CHECK11: .omp.final.then: 1476 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1477 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1478 // CHECK11: .omp.final.done: 1479 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1480 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1481 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN4]], i32 2 1482 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1483 // CHECK11: arraydestroy.body: 1484 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1485 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1486 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1487 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1488 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1489 // CHECK11: arraydestroy.done5: 1490 // CHECK11-NEXT: ret void 1491 // 1492 // 1493 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined 1494 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1495 // CHECK11-NEXT: entry: 1496 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1497 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1498 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1499 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1500 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1501 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1502 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1503 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1504 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1505 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1506 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1507 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1508 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1509 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1510 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1511 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1512 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1513 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1514 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1515 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1516 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1517 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1518 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1519 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1520 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1521 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1522 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1523 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 1524 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 1525 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1526 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1527 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1528 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1529 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1530 // CHECK11: arrayctor.loop: 1531 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1532 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1533 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 1534 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1535 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1536 // CHECK11: arrayctor.cont: 1537 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1538 // CHECK11-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1539 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1540 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1541 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1542 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1543 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1544 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1545 // CHECK11: cond.true: 1546 // CHECK11-NEXT: br label [[COND_END:%.*]] 1547 // CHECK11: cond.false: 1548 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1549 // CHECK11-NEXT: br label [[COND_END]] 1550 // CHECK11: cond.end: 1551 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1552 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1553 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1554 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1555 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1556 // CHECK11: omp.inner.for.cond: 1557 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 1558 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 1559 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1560 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1561 // CHECK11: omp.inner.for.cond.cleanup: 1562 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1563 // CHECK11: omp.inner.for.body: 1564 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 1565 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1566 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1567 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 1568 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP10]] 1569 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 1570 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]] 1571 // CHECK11-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]] 1572 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP10]] 1573 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]] 1574 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP13]] 1575 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]] 1576 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1577 // CHECK11: omp.body.continue: 1578 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1579 // CHECK11: omp.inner.for.inc: 1580 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 1581 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1582 // CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 1583 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 1584 // CHECK11: omp.inner.for.end: 1585 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1586 // CHECK11: omp.loop.exit: 1587 // CHECK11-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1588 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 1589 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 1590 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1591 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1592 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1593 // CHECK11: .omp.final.then: 1594 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1595 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1596 // CHECK11: .omp.final.done: 1597 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1598 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1599 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i32 2 1600 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1601 // CHECK11: arraydestroy.body: 1602 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1603 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1604 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1605 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1606 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1607 // CHECK11: arraydestroy.done7: 1608 // CHECK11-NEXT: ret void 1609 // 1610 // 1611 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1612 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1613 // CHECK11-NEXT: entry: 1614 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1615 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1616 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1617 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1618 // CHECK11-NEXT: ret void 1619 // 1620 // 1621 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1622 // CHECK11-SAME: () #[[ATTR1]] comdat { 1623 // CHECK11-NEXT: entry: 1624 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1625 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1626 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1627 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1628 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1629 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1630 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1631 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1632 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1633 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1634 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1635 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1636 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1637 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1638 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1639 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1640 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1641 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1642 // CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 4 1643 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1644 // CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 4 1645 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1646 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1647 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1648 // CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 4 1649 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1650 // CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 4 1651 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1652 // CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 4 1653 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1654 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4 1655 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1656 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 1657 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1658 // CHECK11-NEXT: store i64 2, ptr [[TMP8]], align 8 1659 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1660 // CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 8 1661 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1662 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1663 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1664 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1665 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1666 // CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 4 1667 // CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 1668 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1669 // CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1670 // CHECK11: omp_offload.failed: 1671 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]] 1672 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1673 // CHECK11: omp_offload.cont: 1674 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1675 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1676 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1677 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1678 // CHECK11: arraydestroy.body: 1679 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1680 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1681 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1682 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1683 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1684 // CHECK11: arraydestroy.done2: 1685 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1686 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4 1687 // CHECK11-NEXT: ret i32 [[TMP16]] 1688 // 1689 // 1690 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1691 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1692 // CHECK11-NEXT: entry: 1693 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1694 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1695 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1696 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1697 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1698 // CHECK11-NEXT: ret void 1699 // 1700 // 1701 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1702 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1703 // CHECK11-NEXT: entry: 1704 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1705 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1706 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1707 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1708 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1709 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1710 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1711 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1712 // CHECK11-NEXT: ret void 1713 // 1714 // 1715 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1716 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1717 // CHECK11-NEXT: entry: 1718 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1719 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1720 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1721 // CHECK11-NEXT: ret void 1722 // 1723 // 1724 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1725 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1726 // CHECK11-NEXT: entry: 1727 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1728 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1729 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1730 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1731 // CHECK11-NEXT: ret void 1732 // 1733 // 1734 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1735 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1736 // CHECK11-NEXT: entry: 1737 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1738 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1739 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1740 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1741 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1742 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1743 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1744 // CHECK11-NEXT: ret void 1745 // 1746 // 1747 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1748 // CHECK11-SAME: () #[[ATTR3]] { 1749 // CHECK11-NEXT: entry: 1750 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined) 1751 // CHECK11-NEXT: ret void 1752 // 1753 // 1754 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1755 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1756 // CHECK11-NEXT: entry: 1757 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1758 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1759 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1760 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1761 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1762 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1763 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1764 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1765 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1766 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1767 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1768 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1769 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1770 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1771 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1772 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1773 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1774 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1775 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1776 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_COMB_UB]], align 4 1777 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1778 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1779 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1780 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1781 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1782 // CHECK11: arrayctor.loop: 1783 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1784 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1785 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1786 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1787 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1788 // CHECK11: arrayctor.cont: 1789 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1790 // CHECK11-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1791 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1792 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1793 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1794 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1795 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1796 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1797 // CHECK11: cond.true: 1798 // CHECK11-NEXT: br label [[COND_END:%.*]] 1799 // CHECK11: cond.false: 1800 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1801 // CHECK11-NEXT: br label [[COND_END]] 1802 // CHECK11: cond.end: 1803 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1804 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1805 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1806 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1807 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1808 // CHECK11: omp.inner.for.cond: 1809 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 1810 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 1811 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1812 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1813 // CHECK11: omp.inner.for.cond.cleanup: 1814 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1815 // CHECK11: omp.inner.for.body: 1816 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP15]] 1817 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 1818 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP15]] 1819 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1820 // CHECK11: omp.inner.for.inc: 1821 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 1822 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP15]] 1823 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] 1824 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 1825 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1826 // CHECK11: omp.inner.for.end: 1827 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1828 // CHECK11: omp.loop.exit: 1829 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1830 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 1831 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]]) 1832 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1833 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1834 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1835 // CHECK11: .omp.final.then: 1836 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1837 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1838 // CHECK11: .omp.final.done: 1839 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1840 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1841 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i32 2 1842 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1843 // CHECK11: arraydestroy.body: 1844 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1845 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1846 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1847 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]] 1848 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]] 1849 // CHECK11: arraydestroy.done5: 1850 // CHECK11-NEXT: ret void 1851 // 1852 // 1853 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined 1854 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] { 1855 // CHECK11-NEXT: entry: 1856 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1857 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1858 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1859 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1860 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1861 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1862 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1863 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1864 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1865 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1866 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1867 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1868 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1869 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1870 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1871 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4 1872 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1873 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1874 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1875 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1876 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1877 // CHECK11-NEXT: store ptr undef, ptr [[_TMP1]], align 4 1878 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1879 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1880 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 1881 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 1882 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4 1883 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4 1884 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1885 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1886 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1887 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1888 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1889 // CHECK11: arrayctor.loop: 1890 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1891 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 1892 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 1893 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1894 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1895 // CHECK11: arrayctor.cont: 1896 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) 1897 // CHECK11-NEXT: store ptr [[VAR]], ptr [[_TMP2]], align 4 1898 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1899 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1900 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1901 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1902 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1 1903 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1904 // CHECK11: cond.true: 1905 // CHECK11-NEXT: br label [[COND_END:%.*]] 1906 // CHECK11: cond.false: 1907 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1908 // CHECK11-NEXT: br label [[COND_END]] 1909 // CHECK11: cond.end: 1910 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1911 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1912 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1913 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1914 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1915 // CHECK11: omp.inner.for.cond: 1916 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 1917 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 1918 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1919 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1920 // CHECK11: omp.inner.for.cond.cleanup: 1921 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1922 // CHECK11: omp.inner.for.body: 1923 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1924 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1925 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1926 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 1927 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP18]] 1928 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 1929 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]] 1930 // CHECK11-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]] 1931 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP18]] 1932 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]] 1933 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP13]] 1934 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false), !llvm.access.group [[ACC_GRP18]] 1935 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1936 // CHECK11: omp.body.continue: 1937 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1938 // CHECK11: omp.inner.for.inc: 1939 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1940 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 1941 // CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 1942 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 1943 // CHECK11: omp.inner.for.end: 1944 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1945 // CHECK11: omp.loop.exit: 1946 // CHECK11-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1947 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 1948 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]]) 1949 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1950 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1951 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1952 // CHECK11: .omp.final.then: 1953 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4 1954 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 1955 // CHECK11: .omp.final.done: 1956 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]] 1957 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1958 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 2 1959 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1960 // CHECK11: arraydestroy.body: 1961 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1962 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1963 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1964 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]] 1965 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]] 1966 // CHECK11: arraydestroy.done7: 1967 // CHECK11-NEXT: ret void 1968 // 1969 // 1970 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1971 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1972 // CHECK11-NEXT: entry: 1973 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1974 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1975 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1976 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1977 // CHECK11-NEXT: ret void 1978 // 1979 // 1980 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1981 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1982 // CHECK11-NEXT: entry: 1983 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1984 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1985 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1986 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1987 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1988 // CHECK11-NEXT: ret void 1989 // 1990 // 1991 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1992 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1993 // CHECK11-NEXT: entry: 1994 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1995 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1996 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1997 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1998 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1999 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2000 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2001 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2002 // CHECK11-NEXT: ret void 2003 // 2004 // 2005 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2006 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2007 // CHECK11-NEXT: entry: 2008 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2009 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2010 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2011 // CHECK11-NEXT: ret void 2012 // 2013 // 2014 // CHECK13-LABEL: define {{[^@]+}}@main 2015 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 2016 // CHECK13-NEXT: entry: 2017 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2018 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8 2019 // CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 8 2020 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2021 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2022 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2023 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2024 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 2025 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2026 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 2027 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2028 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2029 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2030 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2031 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2032 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2033 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 2034 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 2035 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2036 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2037 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 2038 // CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 8 2039 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2040 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 2041 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 2042 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 2043 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 2044 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2045 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 2046 // CHECK13-NEXT: store ptr undef, ptr [[_TMP1]], align 8 2047 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2048 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2049 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2050 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 2051 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2052 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 2053 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2054 // CHECK13: arrayctor.loop: 2055 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2056 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2057 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1 2058 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2059 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2060 // CHECK13: arrayctor.cont: 2061 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2062 // CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 2063 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2064 // CHECK13: omp.inner.for.cond: 2065 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 2066 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 2067 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2068 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2069 // CHECK13: omp.inner.for.cond.cleanup: 2070 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2071 // CHECK13: omp.inner.for.body: 2072 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 2073 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2074 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2075 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 2076 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]] 2077 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 2078 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 2079 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 2080 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]] 2081 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP2]] 2082 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]] 2083 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64 2084 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 2085 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]] 2086 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2087 // CHECK13: omp.body.continue: 2088 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2089 // CHECK13: omp.inner.for.inc: 2090 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 2091 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1 2092 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 2093 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2094 // CHECK13: omp.inner.for.end: 2095 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 2096 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]] 2097 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2098 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 2 2099 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2100 // CHECK13: arraydestroy.body: 2101 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2102 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2103 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2104 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 2105 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 2106 // CHECK13: arraydestroy.done11: 2107 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 2108 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2109 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2110 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2 2111 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 2112 // CHECK13: arraydestroy.body13: 2113 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 2114 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 2115 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR3]] 2116 // CHECK13-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 2117 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 2118 // CHECK13: arraydestroy.done17: 2119 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2120 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4 2121 // CHECK13-NEXT: ret i32 [[TMP11]] 2122 // 2123 // 2124 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2125 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 2126 // CHECK13-NEXT: entry: 2127 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2128 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2129 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2130 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2131 // CHECK13-NEXT: ret void 2132 // 2133 // 2134 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2135 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2136 // CHECK13-NEXT: entry: 2137 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2138 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2139 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2140 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2141 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2142 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2143 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2144 // CHECK13-NEXT: ret void 2145 // 2146 // 2147 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2148 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2149 // CHECK13-NEXT: entry: 2150 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2151 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2152 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2153 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2154 // CHECK13-NEXT: ret void 2155 // 2156 // 2157 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2158 // CHECK13-SAME: () #[[ATTR1]] comdat { 2159 // CHECK13-NEXT: entry: 2160 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2161 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2162 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2163 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2164 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2165 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8 2166 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 2167 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 2168 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2169 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2170 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2171 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2172 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2173 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2174 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 2175 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 2176 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 2177 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2178 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4 2179 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 2180 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 2181 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 2182 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 2183 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 2184 // CHECK13-NEXT: store ptr undef, ptr [[_TMP1]], align 8 2185 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2186 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2187 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2188 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 2189 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2190 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 2191 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2192 // CHECK13: arrayctor.loop: 2193 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2194 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2195 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1 2196 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2197 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2198 // CHECK13: arrayctor.cont: 2199 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2200 // CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8 2201 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2202 // CHECK13: omp.inner.for.cond: 2203 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 2204 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]] 2205 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2206 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2207 // CHECK13: omp.inner.for.cond.cleanup: 2208 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2209 // CHECK13: omp.inner.for.body: 2210 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2211 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2212 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2213 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2214 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP6]] 2215 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2216 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64 2217 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]] 2218 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]] 2219 // CHECK13-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP6]] 2220 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]] 2221 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64 2222 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]] 2223 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]] 2224 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2225 // CHECK13: omp.body.continue: 2226 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2227 // CHECK13: omp.inner.for.inc: 2228 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2229 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1 2230 // CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]] 2231 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 2232 // CHECK13: omp.inner.for.end: 2233 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4 2234 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]] 2235 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2236 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2 2237 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2238 // CHECK13: arraydestroy.body: 2239 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2240 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2241 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2242 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]] 2243 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]] 2244 // CHECK13: arraydestroy.done11: 2245 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 2246 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2247 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2 2248 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY13:%.*]] 2249 // CHECK13: arraydestroy.body13: 2250 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ] 2251 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1 2252 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR3]] 2253 // CHECK13-NEXT: [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]] 2254 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]] 2255 // CHECK13: arraydestroy.done17: 2256 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2257 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4 2258 // CHECK13-NEXT: ret i32 [[TMP11]] 2259 // 2260 // 2261 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2262 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2263 // CHECK13-NEXT: entry: 2264 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2265 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2266 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2267 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2268 // CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2269 // CHECK13-NEXT: ret void 2270 // 2271 // 2272 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2273 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2274 // CHECK13-NEXT: entry: 2275 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2276 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2277 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2278 // CHECK13-NEXT: ret void 2279 // 2280 // 2281 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2282 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2283 // CHECK13-NEXT: entry: 2284 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2285 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2286 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2287 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2288 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2289 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2290 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2291 // CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 4 2292 // CHECK13-NEXT: ret void 2293 // 2294 // 2295 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2296 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2297 // CHECK13-NEXT: entry: 2298 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2299 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2300 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2301 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2302 // CHECK13-NEXT: ret void 2303 // 2304 // 2305 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2306 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2307 // CHECK13-NEXT: entry: 2308 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2309 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2310 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2311 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2312 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2313 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2314 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 2315 // CHECK13-NEXT: ret void 2316 // 2317 // 2318 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2319 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2320 // CHECK13-NEXT: entry: 2321 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2322 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2323 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2324 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2325 // CHECK13-NEXT: ret void 2326 // 2327 // 2328 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2329 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2330 // CHECK13-NEXT: entry: 2331 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2332 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2333 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2334 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2335 // CHECK13-NEXT: store i32 0, ptr [[F]], align 4 2336 // CHECK13-NEXT: ret void 2337 // 2338 // 2339 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2340 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2341 // CHECK13-NEXT: entry: 2342 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2343 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2344 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2345 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2346 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2347 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2348 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2349 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2350 // CHECK13-NEXT: ret void 2351 // 2352 // 2353 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2354 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 2355 // CHECK13-NEXT: entry: 2356 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 2357 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 2358 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 2359 // CHECK13-NEXT: ret void 2360 // 2361 // 2362 // CHECK15-LABEL: define {{[^@]+}}@main 2363 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 2364 // CHECK15-NEXT: entry: 2365 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2366 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8 2367 // CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 4 2368 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2369 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2370 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2371 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 2372 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2373 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2374 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2375 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2376 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2377 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2378 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2379 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2380 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4 2381 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4 2382 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 2383 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2384 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2385 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2386 // CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 4 2387 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2388 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2389 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 2390 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 2391 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 2392 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 2393 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2394 // CHECK15-NEXT: store ptr undef, ptr [[_TMP1]], align 4 2395 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2396 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2397 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2398 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 2399 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2400 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 2401 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2402 // CHECK15: arrayctor.loop: 2403 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2404 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2405 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1 2406 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2407 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2408 // CHECK15: arrayctor.cont: 2409 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2410 // CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 2411 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2412 // CHECK15: omp.inner.for.cond: 2413 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 2414 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 2415 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2416 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2417 // CHECK15: omp.inner.for.cond.cleanup: 2418 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2419 // CHECK15: omp.inner.for.body: 2420 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2421 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2422 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2423 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2424 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP3]] 2425 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2426 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]] 2427 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 2428 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP3]] 2429 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]] 2430 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP7]] 2431 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]] 2432 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2433 // CHECK15: omp.body.continue: 2434 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2435 // CHECK15: omp.inner.for.inc: 2436 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2437 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1 2438 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 2439 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2440 // CHECK15: omp.inner.for.end: 2441 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2442 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]] 2443 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0 2444 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 2 2445 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2446 // CHECK15: arraydestroy.body: 2447 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2448 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2449 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2450 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 2451 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 2452 // CHECK15: arraydestroy.done10: 2453 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 2454 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 2455 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 2456 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2 2457 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 2458 // CHECK15: arraydestroy.body12: 2459 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 2460 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 2461 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR3]] 2462 // CHECK15-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 2463 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 2464 // CHECK15: arraydestroy.done16: 2465 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2466 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4 2467 // CHECK15-NEXT: ret i32 [[TMP11]] 2468 // 2469 // 2470 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2471 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2472 // CHECK15-NEXT: entry: 2473 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2474 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2475 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2476 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2477 // CHECK15-NEXT: ret void 2478 // 2479 // 2480 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2481 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2482 // CHECK15-NEXT: entry: 2483 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2484 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2485 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2486 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2487 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2488 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2489 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 2490 // CHECK15-NEXT: ret void 2491 // 2492 // 2493 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2494 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2495 // CHECK15-NEXT: entry: 2496 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2497 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2498 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2499 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2500 // CHECK15-NEXT: ret void 2501 // 2502 // 2503 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2504 // CHECK15-SAME: () #[[ATTR1]] comdat { 2505 // CHECK15-NEXT: entry: 2506 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2507 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2508 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2509 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2510 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2511 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4 2512 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 2513 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 2514 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2515 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2516 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2517 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 2518 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4 2519 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4 2520 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4 2521 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4 2522 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 2523 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2524 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4 2525 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 2526 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 2527 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 2528 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2529 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 2530 // CHECK15-NEXT: store ptr undef, ptr [[_TMP1]], align 4 2531 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2532 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 2533 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2534 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4 2535 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2536 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 2537 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 2538 // CHECK15: arrayctor.loop: 2539 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 2540 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]]) 2541 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1 2542 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 2543 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 2544 // CHECK15: arrayctor.cont: 2545 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) 2546 // CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4 2547 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2548 // CHECK15: omp.inner.for.cond: 2549 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 2550 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]] 2551 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2552 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 2553 // CHECK15: omp.inner.for.cond.cleanup: 2554 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 2555 // CHECK15: omp.inner.for.body: 2556 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2557 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2558 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2559 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2560 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP7]] 2561 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2562 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]] 2563 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]] 2564 // CHECK15-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP7]] 2565 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]] 2566 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP7]] 2567 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]] 2568 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2569 // CHECK15: omp.body.continue: 2570 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2571 // CHECK15: omp.inner.for.inc: 2572 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2573 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1 2574 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]] 2575 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 2576 // CHECK15: omp.inner.for.end: 2577 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4 2578 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]] 2579 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0 2580 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2 2581 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2582 // CHECK15: arraydestroy.body: 2583 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2584 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 2585 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]] 2586 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]] 2587 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]] 2588 // CHECK15: arraydestroy.done10: 2589 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 2590 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 2591 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2 2592 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY12:%.*]] 2593 // CHECK15: arraydestroy.body12: 2594 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ] 2595 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1 2596 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR3]] 2597 // CHECK15-NEXT: [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]] 2598 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]] 2599 // CHECK15: arraydestroy.done16: 2600 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]] 2601 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4 2602 // CHECK15-NEXT: ret i32 [[TMP11]] 2603 // 2604 // 2605 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2606 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2607 // CHECK15-NEXT: entry: 2608 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2609 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2610 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2611 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2612 // CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 4 2613 // CHECK15-NEXT: ret void 2614 // 2615 // 2616 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2617 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2618 // CHECK15-NEXT: entry: 2619 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2620 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2621 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2622 // CHECK15-NEXT: ret void 2623 // 2624 // 2625 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2626 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2627 // CHECK15-NEXT: entry: 2628 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2629 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2630 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2631 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 2632 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2633 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 2634 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 2635 // CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 4 2636 // CHECK15-NEXT: ret void 2637 // 2638 // 2639 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2640 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2641 // CHECK15-NEXT: entry: 2642 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2643 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2644 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2645 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2646 // CHECK15-NEXT: ret void 2647 // 2648 // 2649 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2650 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2651 // CHECK15-NEXT: entry: 2652 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2653 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2654 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2655 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2656 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2657 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2658 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2659 // CHECK15-NEXT: ret void 2660 // 2661 // 2662 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2663 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2664 // CHECK15-NEXT: entry: 2665 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2666 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2667 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2668 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]] 2669 // CHECK15-NEXT: ret void 2670 // 2671 // 2672 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2673 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2674 // CHECK15-NEXT: entry: 2675 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2676 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2677 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2678 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2679 // CHECK15-NEXT: store i32 0, ptr [[F]], align 4 2680 // CHECK15-NEXT: ret void 2681 // 2682 // 2683 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 2684 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2685 // CHECK15-NEXT: entry: 2686 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2687 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2688 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2689 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 2690 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2691 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 2692 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 2693 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 2694 // CHECK15-NEXT: ret void 2695 // 2696 // 2697 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 2698 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 2699 // CHECK15-NEXT: entry: 2700 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 2701 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 2702 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 2703 // CHECK15-NEXT: ret void 2704 // 2705