1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // Test host code gen 3 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 5 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 6 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 8 // RUN: %clang_cc1 -DLAMBDA -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 9 10 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 13 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 15 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 16 17 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 20 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 23 24 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 25 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 28 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 30 // expected-no-diagnostics 31 #ifndef HEADER 32 #define HEADER 33 34 35 template <typename T> 36 T tmain() { 37 T *a, *b, *c; 38 int n = 10000; 39 int ch = 100; 40 41 // no schedule clauses 42 #pragma omp target 43 #pragma omp teams 44 #pragma omp distribute parallel for simd 45 for (int i = 0; i < n; ++i) { 46 a[i] = b[i] + c[i]; 47 } 48 49 // dist_schedule: static no chunk 50 #pragma omp target 51 #pragma omp teams 52 #pragma omp distribute parallel for simd dist_schedule(static) 53 for (int i = 0; i < n; ++i) { 54 a[i] = b[i] + c[i]; 55 } 56 57 // dist_schedule: static chunk 58 #pragma omp target 59 #pragma omp teams 60 #pragma omp distribute parallel for simd dist_schedule(static, ch) 61 for (int i = 0; i < n; ++i) { 62 a[i] = b[i] + c[i]; 63 } 64 65 // schedule: static no chunk 66 #pragma omp target 67 #pragma omp teams 68 #pragma omp distribute parallel for simd schedule(static) 69 for (int i = 0; i < n; ++i) { 70 a[i] = b[i] + c[i]; 71 } 72 73 // schedule: static chunk 74 #pragma omp target 75 #pragma omp teams 76 #pragma omp distribute parallel for simd schedule(static, ch) 77 for (int i = 0; i < n; ++i) { 78 a[i] = b[i] + c[i]; 79 } 80 81 // schedule: dynamic no chunk 82 #pragma omp target 83 #pragma omp teams 84 #pragma omp distribute parallel for simd schedule(dynamic) 85 for (int i = 0; i < n; ++i) { 86 a[i] = b[i] + c[i]; 87 } 88 89 // schedule: dynamic chunk 90 #pragma omp target 91 #pragma omp teams 92 #pragma omp distribute parallel for simd schedule(dynamic, ch) 93 for (int i = 0; i < n; ++i) { 94 a[i] = b[i] + c[i]; 95 } 96 97 return T(); 98 } 99 100 int main() { 101 double *a, *b, *c; 102 int n = 10000; 103 int ch = 100; 104 105 #ifdef LAMBDA 106 [&]() { 107 108 109 110 111 112 113 114 115 // no schedule clauses 116 #pragma omp target 117 #pragma omp teams 118 119 #pragma omp distribute parallel for simd 120 for (int i = 0; i < n; ++i) { 121 a[i] = b[i] + c[i]; 122 123 124 // check EUB for distribute 125 126 // initialize omp.iv 127 128 // check exit condition 129 130 // check that PrevLB and PrevUB are passed to the 'for' 131 // check that distlb and distub are properly passed to fork_call 132 133 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 134 135 136 // implementation of 'parallel for' 137 138 139 // initialize lb and ub to PrevLB and PrevUB 140 141 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 142 // In this case we use EUB 143 144 // initialize omp.iv 145 146 // check exit condition 147 148 // check that PrevLB and PrevUB are passed to the 'for' 149 150 // check stride 1 for 'for' in 'distribute parallel for simd' 151 152 153 [&]() { 154 a[i] = b[i] + c[i]; 155 }(); 156 } 157 158 // dist_schedule: static no chunk (same sa default - no dist_schedule) 159 #pragma omp target 160 #pragma omp teams 161 162 #pragma omp distribute parallel for simd dist_schedule(static) 163 for (int i = 0; i < n; ++i) { 164 a[i] = b[i] + c[i]; 165 166 167 // check EUB for distribute 168 169 // initialize omp.iv 170 171 // check exit condition 172 173 // check that PrevLB and PrevUB are passed to the 'for' 174 // check that distlb and distub are properly passed to fork_call 175 176 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 177 178 179 // implementation of 'parallel for' 180 181 182 // initialize lb and ub to PrevLB and PrevUB 183 184 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 185 // In this case we use EUB 186 187 // initialize omp.iv 188 189 // check exit condition 190 191 // check that PrevLB and PrevUB are passed to the 'for' 192 193 // check stride 1 for 'for' in 'distribute parallel for simd' 194 195 [&]() { 196 a[i] = b[i] + c[i]; 197 }(); 198 } 199 200 // dist_schedule: static chunk 201 #pragma omp target 202 #pragma omp teams 203 204 #pragma omp distribute parallel for simd dist_schedule(static, ch) 205 for (int i = 0; i < n; ++i) { 206 a[i] = b[i] + c[i]; 207 208 209 // check EUB for distribute 210 211 // initialize omp.iv 212 213 // check exit condition 214 215 // check that PrevLB and PrevUB are passed to the 'for' 216 // check that distlb and distub are properly passed to fork_call 217 218 // check DistInc 219 220 // Update UB 221 222 // Store LB in IV 223 224 225 // loop exit 226 227 // skip implementation of 'parallel for': using default scheduling and was tested above 228 [&]() { 229 a[i] = b[i] + c[i]; 230 }(); 231 } 232 233 // schedule: static no chunk 234 #pragma omp target 235 #pragma omp teams 236 237 #pragma omp distribute parallel for simd schedule(static) 238 for (int i = 0; i < n; ++i) { 239 a[i] = b[i] + c[i]; 240 241 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 242 243 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 244 245 246 // initialize lb and ub to PrevLB and PrevUB 247 248 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 249 // In this case we use EUB 250 251 // initialize omp.iv 252 253 // check exit condition 254 255 // check that PrevLB and PrevUB are passed to the 'for' 256 257 // check stride 1 for 'for' in 'distribute parallel for simd' 258 259 260 [&]() { 261 a[i] = b[i] + c[i]; 262 }(); 263 } 264 265 // schedule: static chunk 266 #pragma omp target 267 #pragma omp teams 268 269 #pragma omp distribute parallel for simd schedule(static, ch) 270 for (int i = 0; i < n; ++i) { 271 a[i] = b[i] + c[i]; 272 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 273 274 // 'parallel for' implementation using outer and inner loops and PrevEUB 275 276 // initialize lb and ub to PrevLB and PrevUB 277 278 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 279 280 // initialize omp.iv (IV = LB) 281 282 // outer loop: while (IV < UB) { 283 284 285 286 // skip body branch 287 288 // IV = IV + 1 and inner loop latch 289 290 // check NextLB and NextUB 291 292 293 [&]() { 294 a[i] = b[i] + c[i]; 295 }(); 296 } 297 298 // schedule: dynamic no chunk 299 #pragma omp target 300 #pragma omp teams 301 302 #pragma omp distribute parallel for simd schedule(dynamic) 303 for (int i = 0; i < n; ++i) { 304 a[i] = b[i] + c[i]; 305 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 306 307 // 'parallel for' implementation using outer and inner loops and PrevEUB 308 309 // initialize lb and ub to PrevLB and PrevUB 310 311 312 // initialize omp.iv (IV = LB) 313 314 315 // skip body branch 316 317 // IV = IV + 1 and inner loop latch 318 319 // check NextLB and NextUB 320 321 322 [&]() { 323 a[i] = b[i] + c[i]; 324 }(); 325 } 326 327 // schedule: dynamic chunk 328 #pragma omp target 329 #pragma omp teams 330 331 #pragma omp distribute parallel for simd schedule(dynamic, ch) 332 for (int i = 0; i < n; ++i) { 333 a[i] = b[i] + c[i]; 334 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 335 336 // 'parallel for' implementation using outer and inner loops and PrevEUB 337 338 // initialize lb and ub to PrevLB and PrevUB 339 340 341 // initialize omp.iv (IV = LB) 342 343 344 // skip body branch 345 346 // IV = IV + 1 and inner loop latch 347 348 // check NextLB and NextUB 349 350 351 [&]() { 352 a[i] = b[i] + c[i]; 353 }(); 354 } 355 }(); 356 return 0; 357 #else 358 359 360 361 362 363 364 365 366 367 // no schedule clauses 368 #pragma omp target 369 #pragma omp teams 370 371 #pragma omp distribute parallel for simd 372 for (int i = 0; i < n; ++i) { 373 a[i] = b[i] + c[i]; 374 375 376 // check EUB for distribute 377 378 // initialize omp.iv 379 380 // check exit condition 381 382 // check that PrevLB and PrevUB are passed to the 'for' 383 // check that distlb and distub are properly passed to fork_call 384 385 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 386 387 388 // implementation of 'parallel for' 389 390 391 // initialize lb and ub to PrevLB and PrevUB 392 393 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 394 // In this case we use EUB 395 396 // initialize omp.iv 397 398 // check exit condition 399 400 // check that PrevLB and PrevUB are passed to the 'for' 401 402 // check stride 1 for 'for' in 'distribute parallel for simd' 403 404 } 405 406 // dist_schedule: static no chunk 407 #pragma omp target 408 #pragma omp teams 409 410 #pragma omp distribute parallel for simd dist_schedule(static) 411 for (int i = 0; i < n; ++i) { 412 a[i] = b[i] + c[i]; 413 414 415 // check EUB for distribute 416 417 // initialize omp.iv 418 419 // check exit condition 420 421 // check that PrevLB and PrevUB are passed to the 'for' 422 // check that distlb and distub are properly passed to fork_call 423 424 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 425 426 427 // implementation of 'parallel for' 428 429 430 // initialize lb and ub to PrevLB and PrevUB 431 432 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 433 // In this case we use EUB 434 435 // initialize omp.iv 436 437 // check exit condition 438 439 // check that PrevLB and PrevUB are passed to the 'for' 440 441 // check stride 1 for 'for' in 'distribute parallel for simd' 442 443 } 444 445 // dist_schedule: static chunk 446 #pragma omp target 447 #pragma omp teams 448 449 #pragma omp distribute parallel for simd dist_schedule(static, ch) 450 for (int i = 0; i < n; ++i) { 451 a[i] = b[i] + c[i]; 452 453 // unlike the previous tests, in this one we have a outer and inner loop for 'distribute' 454 455 // check EUB for distribute 456 457 // initialize omp.iv 458 459 // check exit condition 460 461 // check that PrevLB and PrevUB are passed to the 'for' 462 // check that distlb and distub are properly passed to fork_call 463 464 // check DistInc 465 466 // Update UB 467 468 // Store LB in IV 469 470 471 // loop exit 472 473 // skip implementation of 'parallel for': using default scheduling and was tested above 474 } 475 476 // schedule: static no chunk 477 #pragma omp target 478 #pragma omp teams 479 480 #pragma omp distribute parallel for simd schedule(static) 481 for (int i = 0; i < n; ++i) { 482 a[i] = b[i] + c[i]; 483 484 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 485 486 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 487 488 489 // initialize lb and ub to PrevLB and PrevUB 490 491 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 492 // In this case we use EUB 493 494 // initialize omp.iv 495 496 // check exit condition 497 498 // check that PrevLB and PrevUB are passed to the 'for' 499 500 // check stride 1 for 'for' in 'distribute parallel for simd' 501 502 } 503 504 // schedule: static chunk 505 #pragma omp target 506 #pragma omp teams 507 508 #pragma omp distribute parallel for simd schedule(static, ch) 509 for (int i = 0; i < n; ++i) { 510 a[i] = b[i] + c[i]; 511 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 512 513 // 'parallel for' implementation using outer and inner loops and PrevEUB 514 515 // initialize lb and ub to PrevLB and PrevUB 516 517 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 518 519 // initialize omp.iv (IV = LB) 520 521 // outer loop: while (IV < UB) { 522 523 524 525 // skip body branch 526 527 // IV = IV + 1 and inner loop latch 528 529 // check NextLB and NextUB 530 531 532 } 533 534 // schedule: dynamic no chunk 535 #pragma omp target 536 #pragma omp teams 537 538 #pragma omp distribute parallel for simd schedule(dynamic) 539 for (int i = 0; i < n; ++i) { 540 a[i] = b[i] + c[i]; 541 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 542 543 // 'parallel for' implementation using outer and inner loops and PrevEUB 544 545 // initialize lb and ub to PrevLB and PrevUB 546 547 548 // initialize omp.iv (IV = LB) 549 550 551 // skip body branch 552 553 // IV = IV + 1 and inner loop latch 554 555 // check NextLB and NextUB 556 557 558 } 559 560 // schedule: dynamic chunk 561 #pragma omp target 562 #pragma omp teams 563 564 #pragma omp distribute parallel for simd schedule(dynamic, ch) 565 for (int i = 0; i < n; ++i) { 566 a[i] = b[i] + c[i]; 567 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 568 569 // 'parallel for' implementation using outer and inner loops and PrevEUB 570 571 // initialize lb and ub to PrevLB and PrevUB 572 573 574 // initialize omp.iv (IV = LB) 575 576 577 // skip body branch 578 579 // IV = IV + 1 and inner loop latch 580 581 // check NextLB and NextUB 582 583 584 } 585 586 return tmain<int>(); 587 #endif 588 } 589 590 // check code 591 592 593 594 595 596 597 598 599 600 601 602 // check EUB for distribute 603 604 // initialize omp.iv 605 606 // check exit condition 607 608 // check that PrevLB and PrevUB are passed to the 'for' 609 // check that distlb and distub are properly passed to fork_call 610 611 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 612 613 614 // implementation of 'parallel for' 615 616 617 // initialize lb and ub to PrevLB and PrevUB 618 619 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 620 // In this case we use EUB 621 622 // initialize omp.iv 623 624 // check exit condition 625 626 // check that PrevLB and PrevUB are passed to the 'for' 627 628 // check stride 1 for 'for' in 'distribute parallel for simd' 629 630 631 632 633 634 // check EUB for distribute 635 636 // initialize omp.iv 637 638 // check exit condition 639 640 // check that PrevLB and PrevUB are passed to the 'for' 641 // check that distlb and distub are properly passed to fork_call 642 643 // increment by stride (distInc - 'parallel for' executes the whole chunk) and latch 644 645 646 // implementation of 'parallel for' 647 648 649 // initialize lb and ub to PrevLB and PrevUB 650 651 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 652 // In this case we use EUB 653 654 // initialize omp.iv 655 656 // check exit condition 657 658 // check that PrevLB and PrevUB are passed to the 'for' 659 660 // check stride 1 for 'for' in 'distribute parallel for simd' 661 662 663 664 665 // unlike the previous tests, in this one we have a outer and inner loop for 'distribute' 666 667 // check EUB for distribute 668 669 // initialize omp.iv 670 671 // check exit condition 672 673 // check that PrevLB and PrevUB are passed to the 'for' 674 // check that distlb and distub are properly passed to fork_call 675 676 // check DistInc 677 678 // Update UB 679 680 // Store LB in IV 681 682 683 // loop exit 684 685 // skip implementation of 'parallel for': using default scheduling and was tested above 686 687 688 689 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 690 691 // 'parallel for' implementation is the same as the case without schedule clase (static no chunk is the default) 692 693 694 // initialize lb and ub to PrevLB and PrevUB 695 696 // PrevEUB is only used when 'for' has a chunked schedule, otherwise EUB is used 697 // In this case we use EUB 698 699 // initialize omp.iv 700 701 // check exit condition 702 703 // check that PrevLB and PrevUB are passed to the 'for' 704 705 // check stride 1 for 'for' in 'distribute parallel for simd' 706 707 708 709 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 710 711 // 'parallel for' implementation using outer and inner loops and PrevEUB 712 713 // initialize lb and ub to PrevLB and PrevUB 714 715 // check PrevEUB (using PrevUB instead of NumIt as upper bound) 716 717 // initialize omp.iv (IV = LB) 718 719 // outer loop: while (IV < UB) { 720 721 722 723 // skip body branch 724 725 // IV = IV + 1 and inner loop latch 726 727 // check NextLB and NextUB 728 729 730 731 732 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 733 734 // 'parallel for' implementation using outer and inner loops and PrevEUB 735 736 // initialize lb and ub to PrevLB and PrevUB 737 738 739 // initialize omp.iv (IV = LB) 740 741 742 // skip body branch 743 744 // IV = IV + 1 and inner loop latch 745 746 // check NextLB and NextUB 747 748 749 750 751 // skip rest of implementation of 'distribute' as it is tested above for default dist_schedule case 752 753 // 'parallel for' implementation using outer and inner loops and PrevEUB 754 755 // initialize lb and ub to PrevLB and PrevUB 756 757 758 // initialize omp.iv (IV = LB) 759 760 761 // skip body branch 762 763 // IV = IV + 1 and inner loop latch 764 765 // check NextLB and NextUB 766 767 768 769 #endif 770 // CHECK1-LABEL: define {{[^@]+}}@main 771 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 772 // CHECK1-NEXT: entry: 773 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 774 // CHECK1-NEXT: [[A:%.*]] = alloca ptr, align 8 775 // CHECK1-NEXT: [[B:%.*]] = alloca ptr, align 8 776 // CHECK1-NEXT: [[C:%.*]] = alloca ptr, align 8 777 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4 778 // CHECK1-NEXT: [[CH:%.*]] = alloca i32, align 4 779 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 780 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 781 // CHECK1-NEXT: store i32 10000, ptr [[N]], align 4 782 // CHECK1-NEXT: store i32 100, ptr [[CH]], align 4 783 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 784 // CHECK1-NEXT: store ptr [[N]], ptr [[TMP0]], align 8 785 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 786 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 787 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 2 788 // CHECK1-NEXT: store ptr [[B]], ptr [[TMP2]], align 8 789 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 3 790 // CHECK1-NEXT: store ptr [[C]], ptr [[TMP3]], align 8 791 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 4 792 // CHECK1-NEXT: store ptr [[CH]], ptr [[TMP4]], align 8 793 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(40) [[REF_TMP]]) 794 // CHECK1-NEXT: ret i32 0 795 // 796 // 797 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 798 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { 799 // CHECK1-NEXT: entry: 800 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 801 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 802 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 803 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 804 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 805 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 806 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 807 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 808 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 809 // CHECK1-NEXT: ret void 810 // 811 // 812 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined 813 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 814 // CHECK1-NEXT: entry: 815 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 816 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 817 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 818 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 819 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 820 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 821 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 822 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 823 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 824 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 825 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 826 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 827 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 828 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 829 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 830 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 831 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 832 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 833 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 834 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 835 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 836 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 837 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 838 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 839 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 840 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 841 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 842 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 843 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 844 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 845 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 846 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 847 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 848 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 849 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 850 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 851 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 852 // CHECK1: omp.precond.then: 853 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 854 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 855 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 856 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 857 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 858 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 859 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 860 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 861 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 862 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 863 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 864 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 865 // CHECK1: cond.true: 866 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 867 // CHECK1-NEXT: br label [[COND_END:%.*]] 868 // CHECK1: cond.false: 869 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 870 // CHECK1-NEXT: br label [[COND_END]] 871 // CHECK1: cond.end: 872 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 873 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 874 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 875 // CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 876 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 877 // CHECK1: omp.inner.for.cond: 878 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 879 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 880 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 881 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 882 // CHECK1: omp.inner.for.body: 883 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP10]] 884 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 885 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP10]] 886 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 887 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP10]] 888 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 889 // CHECK1: omp.inner.for.inc: 890 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 891 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP10]] 892 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 893 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]] 894 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 895 // CHECK1: omp.inner.for.end: 896 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 897 // CHECK1: omp.loop.exit: 898 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 899 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 900 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 901 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 902 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 903 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 904 // CHECK1: .omp.final.then: 905 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 906 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 907 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 908 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 909 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 910 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 911 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 912 // CHECK1: .omp.final.done: 913 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 914 // CHECK1: omp.precond.end: 915 // CHECK1-NEXT: ret void 916 // 917 // 918 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined.omp_outlined 919 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 920 // CHECK1-NEXT: entry: 921 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 922 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 923 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 924 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 925 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 926 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 927 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 928 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 929 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 930 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 931 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 932 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 933 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 934 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 935 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 936 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 937 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 938 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 939 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 940 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 941 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 942 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 943 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 944 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 945 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 946 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 947 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 948 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 949 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 950 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 951 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 952 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 953 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 954 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 955 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 956 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 957 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 958 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 959 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 960 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 961 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 962 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 963 // CHECK1: omp.precond.then: 964 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 965 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 966 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 967 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 968 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 969 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 970 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 971 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 972 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 973 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 974 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 975 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 976 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 977 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 978 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 979 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 980 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 981 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 982 // CHECK1: cond.true: 983 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 984 // CHECK1-NEXT: br label [[COND_END:%.*]] 985 // CHECK1: cond.false: 986 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 987 // CHECK1-NEXT: br label [[COND_END]] 988 // CHECK1: cond.end: 989 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 990 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 991 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 992 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 993 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 994 // CHECK1: omp.inner.for.cond: 995 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]] 996 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]] 997 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 998 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 999 // CHECK1: omp.inner.for.body: 1000 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1001 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1002 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1003 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP14]] 1004 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP14]] 1005 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP14]] 1006 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1007 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 1008 // CHECK1-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP14]] 1009 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP14]] 1010 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP14]] 1011 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1012 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 1013 // CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP14]] 1014 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1015 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP14]] 1016 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP14]] 1017 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1018 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 1019 // CHECK1-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP14]] 1020 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 1021 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 8, !llvm.access.group [[ACC_GRP14]] 1022 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 1023 // CHECK1-NEXT: store ptr [[I4]], ptr [[TMP29]], align 8, !llvm.access.group [[ACC_GRP14]] 1024 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 1025 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 8, !llvm.access.group [[ACC_GRP14]] 1026 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 1027 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP14]] 1028 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP14]] 1029 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1030 // CHECK1: omp.body.continue: 1031 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1032 // CHECK1: omp.inner.for.inc: 1033 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1034 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1035 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]] 1036 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1037 // CHECK1: omp.inner.for.end: 1038 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1039 // CHECK1: omp.loop.exit: 1040 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1041 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 1042 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 1043 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1044 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1045 // CHECK1-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1046 // CHECK1: .omp.final.then: 1047 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1048 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP37]], 0 1049 // CHECK1-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 1050 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 1051 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 1052 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 1053 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1054 // CHECK1: .omp.final.done: 1055 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1056 // CHECK1: omp.precond.end: 1057 // CHECK1-NEXT: ret void 1058 // 1059 // 1060 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 1061 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 1062 // CHECK1-NEXT: entry: 1063 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1064 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1065 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1066 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1067 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1068 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1069 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1070 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1071 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 1072 // CHECK1-NEXT: ret void 1073 // 1074 // 1075 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined 1076 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1077 // CHECK1-NEXT: entry: 1078 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1079 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1080 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1081 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1082 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1083 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1084 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1085 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1086 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1087 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1088 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1089 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1090 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1091 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1092 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1093 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1094 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1095 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1096 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1097 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1098 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1099 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1100 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1101 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1102 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1103 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1104 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 1105 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 1106 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1107 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1108 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1109 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1110 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1111 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1112 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1113 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1114 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1115 // CHECK1: omp.precond.then: 1116 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1117 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1118 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 1119 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1120 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1121 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1122 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 1123 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1124 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1125 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1126 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1127 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1128 // CHECK1: cond.true: 1129 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1130 // CHECK1-NEXT: br label [[COND_END:%.*]] 1131 // CHECK1: cond.false: 1132 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1133 // CHECK1-NEXT: br label [[COND_END]] 1134 // CHECK1: cond.end: 1135 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1136 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1137 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1138 // CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 1139 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1140 // CHECK1: omp.inner.for.cond: 1141 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 1142 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 1143 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1144 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1145 // CHECK1: omp.inner.for.body: 1146 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]] 1147 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1148 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]] 1149 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1150 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP19]] 1151 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1152 // CHECK1: omp.inner.for.inc: 1153 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 1154 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]] 1155 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1156 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]] 1157 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 1158 // CHECK1: omp.inner.for.end: 1159 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1160 // CHECK1: omp.loop.exit: 1161 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1162 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 1163 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 1164 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1165 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1166 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1167 // CHECK1: .omp.final.then: 1168 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1169 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 1170 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1171 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 1172 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 1173 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 1174 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1175 // CHECK1: .omp.final.done: 1176 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1177 // CHECK1: omp.precond.end: 1178 // CHECK1-NEXT: ret void 1179 // 1180 // 1181 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined.omp_outlined 1182 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1183 // CHECK1-NEXT: entry: 1184 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1185 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1186 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1187 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1188 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1189 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1190 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1191 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1192 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1193 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1194 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1195 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1196 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1197 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1198 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1199 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1200 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1201 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1202 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 1203 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1204 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1205 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1206 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1207 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1208 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1209 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1210 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1211 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1212 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1213 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1214 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1215 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 1216 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 1217 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1218 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1219 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1220 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1221 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1222 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1223 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1224 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1225 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1226 // CHECK1: omp.precond.then: 1227 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1228 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1229 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 1230 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1231 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1232 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1233 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1234 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1235 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 1236 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1237 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1238 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1239 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1240 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1241 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1242 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1243 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1244 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1245 // CHECK1: cond.true: 1246 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1247 // CHECK1-NEXT: br label [[COND_END:%.*]] 1248 // CHECK1: cond.false: 1249 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1250 // CHECK1-NEXT: br label [[COND_END]] 1251 // CHECK1: cond.end: 1252 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1253 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1254 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1255 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 1256 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1257 // CHECK1: omp.inner.for.cond: 1258 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 1259 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 1260 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1261 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1262 // CHECK1: omp.inner.for.body: 1263 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 1264 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1265 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1266 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP22]] 1267 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP22]] 1268 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP22]] 1269 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1270 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 1271 // CHECK1-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP22]] 1272 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP22]] 1273 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP22]] 1274 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1275 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 1276 // CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP22]] 1277 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1278 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP22]] 1279 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP22]] 1280 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1281 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 1282 // CHECK1-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP22]] 1283 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 0 1284 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 8, !llvm.access.group [[ACC_GRP22]] 1285 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 1 1286 // CHECK1-NEXT: store ptr [[I4]], ptr [[TMP29]], align 8, !llvm.access.group [[ACC_GRP22]] 1287 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 2 1288 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 8, !llvm.access.group [[ACC_GRP22]] 1289 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 3 1290 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP22]] 1291 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP22]] 1292 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1293 // CHECK1: omp.body.continue: 1294 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1295 // CHECK1: omp.inner.for.inc: 1296 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 1297 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1298 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 1299 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 1300 // CHECK1: omp.inner.for.end: 1301 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1302 // CHECK1: omp.loop.exit: 1303 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1304 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 1305 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 1306 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1307 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1308 // CHECK1-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1309 // CHECK1: .omp.final.then: 1310 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1311 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP37]], 0 1312 // CHECK1-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 1313 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 1314 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 1315 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 1316 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1317 // CHECK1: .omp.final.done: 1318 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1319 // CHECK1: omp.precond.end: 1320 // CHECK1-NEXT: ret void 1321 // 1322 // 1323 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201 1324 // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 1325 // CHECK1-NEXT: entry: 1326 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 1327 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1328 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1329 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1330 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1331 // CHECK1-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 1332 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1333 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1334 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1335 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1336 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 1337 // CHECK1-NEXT: ret void 1338 // 1339 // 1340 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined 1341 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1342 // CHECK1-NEXT: entry: 1343 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1344 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1345 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 1346 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1347 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1348 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1349 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1350 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1351 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1352 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1353 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1354 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1355 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1356 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1357 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1358 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1359 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1360 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1361 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1362 // CHECK1-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 1363 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1364 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1365 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1366 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1367 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 1368 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1369 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1370 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1371 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1372 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4 1373 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 1374 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1375 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 1376 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1377 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1378 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1379 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1380 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1381 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 1382 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1383 // CHECK1: omp.precond.then: 1384 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1385 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1386 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_COMB_UB]], align 4 1387 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1388 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1389 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4 1390 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1391 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1392 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 1393 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1394 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1395 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1396 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1397 // CHECK1: cond.true: 1398 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1399 // CHECK1-NEXT: br label [[COND_END:%.*]] 1400 // CHECK1: cond.false: 1401 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1402 // CHECK1-NEXT: br label [[COND_END]] 1403 // CHECK1: cond.end: 1404 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1405 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1406 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1407 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 1408 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1409 // CHECK1: omp.inner.for.cond: 1410 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 1411 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP25]] 1412 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 1413 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 1414 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1415 // CHECK1: omp.inner.for.body: 1416 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 1417 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1418 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1419 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1420 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]), !llvm.access.group [[ACC_GRP25]] 1421 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1422 // CHECK1: omp.inner.for.inc: 1423 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 1424 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 1425 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1426 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 1427 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 1428 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 1429 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1430 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 1431 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1432 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]] 1433 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 1434 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1435 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1436 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP25]] 1437 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 1438 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 1439 // CHECK1: cond.true10: 1440 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP25]] 1441 // CHECK1-NEXT: br label [[COND_END12:%.*]] 1442 // CHECK1: cond.false11: 1443 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1444 // CHECK1-NEXT: br label [[COND_END12]] 1445 // CHECK1: cond.end12: 1446 // CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 1447 // CHECK1-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 1448 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]] 1449 // CHECK1-NEXT: store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 1450 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 1451 // CHECK1: omp.inner.for.end: 1452 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1453 // CHECK1: omp.loop.exit: 1454 // CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1455 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 1456 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]]) 1457 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1458 // CHECK1-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 1459 // CHECK1-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1460 // CHECK1: .omp.final.then: 1461 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1462 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP38]], 0 1463 // CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 1464 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1 1465 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]] 1466 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I3]], align 4 1467 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1468 // CHECK1: .omp.final.done: 1469 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1470 // CHECK1: omp.precond.end: 1471 // CHECK1-NEXT: ret void 1472 // 1473 // 1474 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined.omp_outlined 1475 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1476 // CHECK1-NEXT: entry: 1477 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1478 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1479 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1480 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1481 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1482 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1483 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1484 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1485 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1486 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1487 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1488 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1489 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1490 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1491 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1492 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1493 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1494 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1495 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 8 1496 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1497 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1498 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1499 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1500 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1501 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1502 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1503 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1504 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1505 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1506 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1507 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1508 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 1509 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 1510 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1511 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1512 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1513 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1514 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1515 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1516 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1517 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1518 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1519 // CHECK1: omp.precond.then: 1520 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1521 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1522 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 1523 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1524 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1525 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1526 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1527 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1528 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 1529 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1530 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1531 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1532 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1533 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1534 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1535 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1536 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1537 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1538 // CHECK1: cond.true: 1539 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1540 // CHECK1-NEXT: br label [[COND_END:%.*]] 1541 // CHECK1: cond.false: 1542 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1543 // CHECK1-NEXT: br label [[COND_END]] 1544 // CHECK1: cond.end: 1545 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1546 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1547 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1548 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 1549 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1550 // CHECK1: omp.inner.for.cond: 1551 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 1552 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]] 1553 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1554 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1555 // CHECK1: omp.inner.for.body: 1556 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 1557 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1558 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1559 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP28]] 1560 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP28]] 1561 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP28]] 1562 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1563 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 1564 // CHECK1-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP28]] 1565 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP28]] 1566 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP28]] 1567 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1568 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 1569 // CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP28]] 1570 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1571 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP28]] 1572 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP28]] 1573 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1574 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 1575 // CHECK1-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP28]] 1576 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 0 1577 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 8, !llvm.access.group [[ACC_GRP28]] 1578 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 1 1579 // CHECK1-NEXT: store ptr [[I4]], ptr [[TMP29]], align 8, !llvm.access.group [[ACC_GRP28]] 1580 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 2 1581 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 8, !llvm.access.group [[ACC_GRP28]] 1582 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 3 1583 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP28]] 1584 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP28]] 1585 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1586 // CHECK1: omp.body.continue: 1587 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1588 // CHECK1: omp.inner.for.inc: 1589 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 1590 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1591 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]] 1592 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 1593 // CHECK1: omp.inner.for.end: 1594 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1595 // CHECK1: omp.loop.exit: 1596 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1597 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 1598 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 1599 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1600 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1601 // CHECK1-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1602 // CHECK1: .omp.final.then: 1603 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1604 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP37]], 0 1605 // CHECK1-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 1606 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 1607 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 1608 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 1609 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1610 // CHECK1: .omp.final.done: 1611 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1612 // CHECK1: omp.precond.end: 1613 // CHECK1-NEXT: ret void 1614 // 1615 // 1616 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234 1617 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 1618 // CHECK1-NEXT: entry: 1619 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1620 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1621 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1622 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1623 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1624 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1625 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1626 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1627 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 1628 // CHECK1-NEXT: ret void 1629 // 1630 // 1631 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined 1632 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1633 // CHECK1-NEXT: entry: 1634 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1635 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1636 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1637 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1638 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1639 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1640 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1641 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1642 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1643 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1644 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1645 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1646 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1647 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1648 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1649 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 1650 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1651 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1652 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1653 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1654 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1655 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1656 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1657 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1658 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1659 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1660 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 1661 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 1662 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1663 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1664 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1665 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1666 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1667 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1668 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1669 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1670 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1671 // CHECK1: omp.precond.then: 1672 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1673 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1674 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 1675 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1676 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1677 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1678 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 1679 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1680 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1681 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1682 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 1683 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1684 // CHECK1: cond.true: 1685 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1686 // CHECK1-NEXT: br label [[COND_END:%.*]] 1687 // CHECK1: cond.false: 1688 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1689 // CHECK1-NEXT: br label [[COND_END]] 1690 // CHECK1: cond.end: 1691 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1692 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1693 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1694 // CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 1695 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1696 // CHECK1: omp.inner.for.cond: 1697 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31:![0-9]+]] 1698 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP31]] 1699 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1700 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1701 // CHECK1: omp.inner.for.body: 1702 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP31]] 1703 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 1704 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP31]] 1705 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1706 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP31]] 1707 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1708 // CHECK1: omp.inner.for.inc: 1709 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 1710 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP31]] 1711 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1712 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP31]] 1713 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] 1714 // CHECK1: omp.inner.for.end: 1715 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1716 // CHECK1: omp.loop.exit: 1717 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1718 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 1719 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 1720 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1721 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1722 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1723 // CHECK1: .omp.final.then: 1724 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1725 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 1726 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1727 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 1728 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 1729 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 1730 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1731 // CHECK1: .omp.final.done: 1732 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1733 // CHECK1: omp.precond.end: 1734 // CHECK1-NEXT: ret void 1735 // 1736 // 1737 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined.omp_outlined 1738 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1739 // CHECK1-NEXT: entry: 1740 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1741 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1742 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1743 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1744 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1745 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1746 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1747 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1748 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1749 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1750 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1751 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1752 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1753 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1754 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1755 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1756 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1757 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1758 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 8 1759 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1760 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1761 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1762 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1763 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1764 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1765 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1766 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1767 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1768 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1769 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1770 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1771 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 1772 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 1773 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1774 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 1775 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1776 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1777 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1778 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1779 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1780 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 1781 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1782 // CHECK1: omp.precond.then: 1783 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1784 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1785 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 1786 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1787 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 1788 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1789 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 1790 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1791 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 1792 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1793 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1794 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1795 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1796 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1797 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1798 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1799 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1800 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1801 // CHECK1: cond.true: 1802 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1803 // CHECK1-NEXT: br label [[COND_END:%.*]] 1804 // CHECK1: cond.false: 1805 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1806 // CHECK1-NEXT: br label [[COND_END]] 1807 // CHECK1: cond.end: 1808 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1809 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1810 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1811 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 1812 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1813 // CHECK1: omp.inner.for.cond: 1814 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 1815 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP34]] 1816 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1817 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1818 // CHECK1: omp.inner.for.body: 1819 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 1820 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 1821 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1822 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP34]] 1823 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP34]] 1824 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP34]] 1825 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 1826 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 1827 // CHECK1-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP34]] 1828 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP34]] 1829 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP34]] 1830 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 1831 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 1832 // CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP34]] 1833 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 1834 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP34]] 1835 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP34]] 1836 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 1837 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 1838 // CHECK1-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP34]] 1839 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 0 1840 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 8, !llvm.access.group [[ACC_GRP34]] 1841 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 1 1842 // CHECK1-NEXT: store ptr [[I4]], ptr [[TMP29]], align 8, !llvm.access.group [[ACC_GRP34]] 1843 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 2 1844 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 8, !llvm.access.group [[ACC_GRP34]] 1845 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 3 1846 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP34]] 1847 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP34]] 1848 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1849 // CHECK1: omp.body.continue: 1850 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1851 // CHECK1: omp.inner.for.inc: 1852 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 1853 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], 1 1854 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]] 1855 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] 1856 // CHECK1: omp.inner.for.end: 1857 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1858 // CHECK1: omp.loop.exit: 1859 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1860 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 1861 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 1862 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1863 // CHECK1-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 1864 // CHECK1-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1865 // CHECK1: .omp.final.then: 1866 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1867 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP37]], 0 1868 // CHECK1-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 1869 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 1870 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 1871 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 1872 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 1873 // CHECK1: .omp.final.done: 1874 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 1875 // CHECK1: omp.precond.end: 1876 // CHECK1-NEXT: ret void 1877 // 1878 // 1879 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266 1880 // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 1881 // CHECK1-NEXT: entry: 1882 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 1883 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1884 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1885 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1886 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1887 // CHECK1-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 1888 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 1889 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1890 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1891 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1892 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 1893 // CHECK1-NEXT: ret void 1894 // 1895 // 1896 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined 1897 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 1898 // CHECK1-NEXT: entry: 1899 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1900 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1901 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 1902 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 1903 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 1904 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 1905 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 1906 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1907 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1908 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1909 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1910 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1911 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1912 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1913 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1914 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1915 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1916 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 1917 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1918 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1919 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1920 // CHECK1-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 1921 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 1922 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 1923 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 1924 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 1925 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 1926 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 1927 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 1928 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 1929 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 1930 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 1931 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 1932 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 1933 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 1934 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1935 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1936 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1937 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 1938 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 1939 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 1940 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 1941 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 1942 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1943 // CHECK1: omp.precond.then: 1944 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1945 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1946 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 1947 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1948 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1949 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1950 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1951 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1952 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1953 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1954 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 1955 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1956 // CHECK1: cond.true: 1957 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 1958 // CHECK1-NEXT: br label [[COND_END:%.*]] 1959 // CHECK1: cond.false: 1960 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1961 // CHECK1-NEXT: br label [[COND_END]] 1962 // CHECK1: cond.end: 1963 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 1964 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1965 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1966 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 1967 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1968 // CHECK1: omp.inner.for.cond: 1969 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37:![0-9]+]] 1970 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP37]] 1971 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 1972 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1973 // CHECK1: omp.inner.for.body: 1974 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP37]] 1975 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 1976 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP37]] 1977 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 1978 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP37]] 1979 // CHECK1-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP37]] 1980 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP37]] 1981 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP24]]), !llvm.access.group [[ACC_GRP37]] 1982 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1983 // CHECK1: omp.inner.for.inc: 1984 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 1985 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP37]] 1986 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1987 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP37]] 1988 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]] 1989 // CHECK1: omp.inner.for.end: 1990 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1991 // CHECK1: omp.loop.exit: 1992 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1993 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 1994 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 1995 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 1996 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 1997 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1998 // CHECK1: .omp.final.then: 1999 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2000 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP31]], 0 2001 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2002 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2003 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2004 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 2005 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 2006 // CHECK1: .omp.final.done: 2007 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2008 // CHECK1: omp.precond.end: 2009 // CHECK1-NEXT: ret void 2010 // 2011 // 2012 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined.omp_outlined 2013 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2014 // CHECK1-NEXT: entry: 2015 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2016 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2017 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2018 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2019 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2020 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2021 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2022 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2023 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2024 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2025 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2026 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2027 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2028 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2029 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2030 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2031 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2032 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2033 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 2034 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 8 2035 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2036 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2037 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2038 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2039 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2040 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2041 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2042 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2043 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2044 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2045 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2046 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 2047 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 2048 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 2049 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2050 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2051 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2052 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2053 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2054 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2055 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 2056 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2057 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2058 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2059 // CHECK1: omp.precond.then: 2060 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2061 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2062 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 2063 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2064 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2065 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2066 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 2067 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2068 // CHECK1-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 2069 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2070 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2071 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2072 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2073 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 2074 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 2075 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2076 // CHECK1: omp.dispatch.cond: 2077 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2078 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2079 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP14]] to i32 2080 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP13]], [[CONV6]] 2081 // CHECK1-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2082 // CHECK1: cond.true: 2083 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2084 // CHECK1-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP15]] to i32 2085 // CHECK1-NEXT: br label [[COND_END:%.*]] 2086 // CHECK1: cond.false: 2087 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2088 // CHECK1-NEXT: br label [[COND_END]] 2089 // CHECK1: cond.end: 2090 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV8]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 2091 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2092 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2093 // CHECK1-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 2094 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 2095 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2096 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 2097 // CHECK1-NEXT: br i1 [[CMP9]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2098 // CHECK1: omp.dispatch.body: 2099 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2100 // CHECK1: omp.inner.for.cond: 2101 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40:![0-9]+]] 2102 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP40]] 2103 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 2104 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2105 // CHECK1: omp.inner.for.body: 2106 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 2107 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 2108 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2109 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP40]] 2110 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP40]] 2111 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP40]] 2112 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 2113 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM]] 2114 // CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP40]] 2115 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP40]] 2116 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP40]] 2117 // CHECK1-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP27]] to i64 2118 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM11]] 2119 // CHECK1-NEXT: [[TMP28:%.*]] = load double, ptr [[ARRAYIDX12]], align 8, !llvm.access.group [[ACC_GRP40]] 2120 // CHECK1-NEXT: [[ADD13:%.*]] = fadd double [[TMP25]], [[TMP28]] 2121 // CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP40]] 2122 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP40]] 2123 // CHECK1-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP30]] to i64 2124 // CHECK1-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds double, ptr [[TMP29]], i64 [[IDXPROM14]] 2125 // CHECK1-NEXT: store double [[ADD13]], ptr [[ARRAYIDX15]], align 8, !llvm.access.group [[ACC_GRP40]] 2126 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 0 2127 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP40]] 2128 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 1 2129 // CHECK1-NEXT: store ptr [[I5]], ptr [[TMP32]], align 8, !llvm.access.group [[ACC_GRP40]] 2130 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 2 2131 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP33]], align 8, !llvm.access.group [[ACC_GRP40]] 2132 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 3 2133 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP34]], align 8, !llvm.access.group [[ACC_GRP40]] 2134 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP40]] 2135 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2136 // CHECK1: omp.body.continue: 2137 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2138 // CHECK1: omp.inner.for.inc: 2139 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 2140 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP35]], 1 2141 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP40]] 2142 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] 2143 // CHECK1: omp.inner.for.end: 2144 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2145 // CHECK1: omp.dispatch.inc: 2146 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2147 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2148 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 2149 // CHECK1-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_LB]], align 4 2150 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2151 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 2152 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 2153 // CHECK1-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_UB]], align 4 2154 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2155 // CHECK1: omp.dispatch.end: 2156 // CHECK1-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2157 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4 2158 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP41]]) 2159 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2160 // CHECK1-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 2161 // CHECK1-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2162 // CHECK1: .omp.final.then: 2163 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2164 // CHECK1-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP44]], 0 2165 // CHECK1-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1 2166 // CHECK1-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1 2167 // CHECK1-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]] 2168 // CHECK1-NEXT: store i32 [[ADD22]], ptr [[I5]], align 4 2169 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 2170 // CHECK1: .omp.final.done: 2171 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2172 // CHECK1: omp.precond.end: 2173 // CHECK1-NEXT: ret void 2174 // 2175 // 2176 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299 2177 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 2178 // CHECK1-NEXT: entry: 2179 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2180 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2181 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2182 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2183 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2184 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2185 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2186 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2187 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 2188 // CHECK1-NEXT: ret void 2189 // 2190 // 2191 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined 2192 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2193 // CHECK1-NEXT: entry: 2194 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2195 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2196 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2197 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2198 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2199 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2200 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2201 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2202 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2203 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2204 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2205 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2206 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2207 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2208 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2209 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4 2210 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2211 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2212 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2213 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2214 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2215 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2216 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2217 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2218 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 2219 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 2220 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 2221 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2222 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2223 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2224 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2225 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2226 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2227 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 2228 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2229 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2230 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2231 // CHECK1: omp.precond.then: 2232 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2233 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2234 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 2235 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2236 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2237 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2238 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 2239 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2240 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2241 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2242 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2243 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2244 // CHECK1: cond.true: 2245 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2246 // CHECK1-NEXT: br label [[COND_END:%.*]] 2247 // CHECK1: cond.false: 2248 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2249 // CHECK1-NEXT: br label [[COND_END]] 2250 // CHECK1: cond.end: 2251 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2252 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2253 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2254 // CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 2255 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2256 // CHECK1: omp.inner.for.cond: 2257 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]] 2258 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 2259 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2260 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2261 // CHECK1: omp.inner.for.body: 2262 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP43]] 2263 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 2264 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP43]] 2265 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2266 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP43]] 2267 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2268 // CHECK1: omp.inner.for.inc: 2269 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 2270 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP43]] 2271 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2272 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]] 2273 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]] 2274 // CHECK1: omp.inner.for.end: 2275 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2276 // CHECK1: omp.loop.exit: 2277 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2278 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 2279 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 2280 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2281 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2282 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2283 // CHECK1: .omp.final.then: 2284 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2285 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 2286 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2287 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 2288 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 2289 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 2290 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 2291 // CHECK1: .omp.final.done: 2292 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2293 // CHECK1: omp.precond.end: 2294 // CHECK1-NEXT: ret void 2295 // 2296 // 2297 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined.omp_outlined 2298 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2299 // CHECK1-NEXT: entry: 2300 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2301 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2302 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2303 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2304 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2305 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2306 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2307 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2308 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2309 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2310 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2311 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2312 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2313 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2314 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2315 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2316 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2317 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 2318 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 8 2319 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2320 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2321 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2322 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2323 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2324 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2325 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2326 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2327 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2328 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2329 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 2330 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 2331 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 2332 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2333 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2334 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2335 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2336 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2337 // CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2338 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 2339 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2340 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2341 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2342 // CHECK1: omp.precond.then: 2343 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2344 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2345 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 2346 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2347 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2348 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2349 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 2350 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2351 // CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 2352 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2353 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2354 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2355 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2356 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2357 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 2358 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 2359 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2360 // CHECK1: omp.dispatch.cond: 2361 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2362 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 2363 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 2364 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 2365 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2366 // CHECK1: omp.dispatch.body: 2367 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2368 // CHECK1-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 2369 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2370 // CHECK1: omp.inner.for.cond: 2371 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]] 2372 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP46]] 2373 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 2374 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2375 // CHECK1: omp.inner.for.body: 2376 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 2377 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 2378 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2379 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP46]] 2380 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP46]] 2381 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP46]] 2382 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 2383 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP21]], i64 [[IDXPROM]] 2384 // CHECK1-NEXT: [[TMP23:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP46]] 2385 // CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP46]] 2386 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP46]] 2387 // CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 2388 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, ptr [[TMP24]], i64 [[IDXPROM6]] 2389 // CHECK1-NEXT: [[TMP26:%.*]] = load double, ptr [[ARRAYIDX7]], align 8, !llvm.access.group [[ACC_GRP46]] 2390 // CHECK1-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 2391 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP46]] 2392 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP46]] 2393 // CHECK1-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 2394 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, ptr [[TMP27]], i64 [[IDXPROM9]] 2395 // CHECK1-NEXT: store double [[ADD8]], ptr [[ARRAYIDX10]], align 8, !llvm.access.group [[ACC_GRP46]] 2396 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 0 2397 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP29]], align 8, !llvm.access.group [[ACC_GRP46]] 2398 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 1 2399 // CHECK1-NEXT: store ptr [[I4]], ptr [[TMP30]], align 8, !llvm.access.group [[ACC_GRP46]] 2400 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 2 2401 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP46]] 2402 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 3 2403 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP32]], align 8, !llvm.access.group [[ACC_GRP46]] 2404 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP46]] 2405 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2406 // CHECK1: omp.body.continue: 2407 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2408 // CHECK1: omp.inner.for.inc: 2409 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 2410 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP33]], 1 2411 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]] 2412 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]] 2413 // CHECK1: omp.inner.for.end: 2414 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2415 // CHECK1: omp.dispatch.inc: 2416 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2417 // CHECK1: omp.dispatch.end: 2418 // CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2419 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 2420 // CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP35]]) 2421 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2422 // CHECK1-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 2423 // CHECK1-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2424 // CHECK1: .omp.final.then: 2425 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2426 // CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP38]], 0 2427 // CHECK1-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 2428 // CHECK1-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1 2429 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 2430 // CHECK1-NEXT: store i32 [[ADD15]], ptr [[I4]], align 4 2431 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 2432 // CHECK1: .omp.final.done: 2433 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2434 // CHECK1: omp.precond.end: 2435 // CHECK1-NEXT: ret void 2436 // 2437 // 2438 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328 2439 // CHECK1-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 2440 // CHECK1-NEXT: entry: 2441 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 2442 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2443 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2444 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2445 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2446 // CHECK1-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 2447 // CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 2448 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2449 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2450 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2451 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 2452 // CHECK1-NEXT: ret void 2453 // 2454 // 2455 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined 2456 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] { 2457 // CHECK1-NEXT: entry: 2458 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2459 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2460 // CHECK1-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 2461 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2462 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2463 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2464 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2465 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2466 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2467 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2468 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2469 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2470 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2471 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2472 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2473 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2474 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2475 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4 2476 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2477 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2478 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2479 // CHECK1-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 2480 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2481 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2482 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2483 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2484 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 2485 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2486 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2487 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 2488 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 2489 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 2490 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 2491 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 2492 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2493 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2494 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 2495 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2496 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2497 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2498 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 2499 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2500 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 2501 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2502 // CHECK1: omp.precond.then: 2503 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2504 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2505 // CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 2506 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2507 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2508 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2509 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 2510 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2511 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2512 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2513 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2514 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2515 // CHECK1: cond.true: 2516 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2517 // CHECK1-NEXT: br label [[COND_END:%.*]] 2518 // CHECK1: cond.false: 2519 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2520 // CHECK1-NEXT: br label [[COND_END]] 2521 // CHECK1: cond.end: 2522 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2523 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2524 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2525 // CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 2526 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2527 // CHECK1: omp.inner.for.cond: 2528 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]] 2529 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP49]] 2530 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2531 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2532 // CHECK1: omp.inner.for.body: 2533 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP49]] 2534 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 2535 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP49]] 2536 // CHECK1-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 2537 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP49]] 2538 // CHECK1-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP49]] 2539 // CHECK1-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP49]] 2540 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP24]]), !llvm.access.group [[ACC_GRP49]] 2541 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2542 // CHECK1: omp.inner.for.inc: 2543 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 2544 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP49]] 2545 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 2546 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]] 2547 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]] 2548 // CHECK1: omp.inner.for.end: 2549 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2550 // CHECK1: omp.loop.exit: 2551 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2552 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 2553 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 2554 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2555 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 2556 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2557 // CHECK1: .omp.final.then: 2558 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2559 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP31]], 0 2560 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2561 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 2562 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 2563 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 2564 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 2565 // CHECK1: .omp.final.done: 2566 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2567 // CHECK1: omp.precond.end: 2568 // CHECK1-NEXT: ret void 2569 // 2570 // 2571 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined.omp_outlined 2572 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2573 // CHECK1-NEXT: entry: 2574 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 2575 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 2576 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2577 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2578 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 2579 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 2580 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 2581 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 2582 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2583 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2584 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 2585 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2586 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2587 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 2588 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2589 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2590 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2591 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2592 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4 2593 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 8 2594 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 2595 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 2596 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2597 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2598 // CHECK1-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 2599 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 2600 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 2601 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 2602 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 2603 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 2604 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 2605 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 2606 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 2607 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 2608 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2609 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2610 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2611 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2612 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2613 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 2614 // CHECK1-NEXT: store i32 0, ptr [[I]], align 4 2615 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2616 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2617 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2618 // CHECK1: omp.precond.then: 2619 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2620 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 2621 // CHECK1-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 2622 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 2623 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 2624 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 2625 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 2626 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 2627 // CHECK1-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 2628 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2629 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2630 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 2631 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2632 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2633 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2634 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 2635 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 2636 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2637 // CHECK1: omp.dispatch.cond: 2638 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2639 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 2640 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP16]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 2641 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 2642 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2643 // CHECK1: omp.dispatch.body: 2644 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2645 // CHECK1-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 2646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2647 // CHECK1: omp.inner.for.cond: 2648 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52:![0-9]+]] 2649 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP52]] 2650 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 2651 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2652 // CHECK1: omp.inner.for.body: 2653 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 2654 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 2655 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2656 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP52]] 2657 // CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP52]] 2658 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP52]] 2659 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 2660 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP22]], i64 [[IDXPROM]] 2661 // CHECK1-NEXT: [[TMP24:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP52]] 2662 // CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP52]] 2663 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP52]] 2664 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP26]] to i64 2665 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP25]], i64 [[IDXPROM7]] 2666 // CHECK1-NEXT: [[TMP27:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP52]] 2667 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP24]], [[TMP27]] 2668 // CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP52]] 2669 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP52]] 2670 // CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP29]] to i64 2671 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP28]], i64 [[IDXPROM10]] 2672 // CHECK1-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP52]] 2673 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 0 2674 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP30]], align 8, !llvm.access.group [[ACC_GRP52]] 2675 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 1 2676 // CHECK1-NEXT: store ptr [[I5]], ptr [[TMP31]], align 8, !llvm.access.group [[ACC_GRP52]] 2677 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 2 2678 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP32]], align 8, !llvm.access.group [[ACC_GRP52]] 2679 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 3 2680 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP33]], align 8, !llvm.access.group [[ACC_GRP52]] 2681 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP52]] 2682 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2683 // CHECK1: omp.body.continue: 2684 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2685 // CHECK1: omp.inner.for.inc: 2686 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 2687 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP34]], 1 2688 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP52]] 2689 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]] 2690 // CHECK1: omp.inner.for.end: 2691 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2692 // CHECK1: omp.dispatch.inc: 2693 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 2694 // CHECK1: omp.dispatch.end: 2695 // CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 2696 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 2697 // CHECK1-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP36]]) 2698 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2699 // CHECK1-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 2700 // CHECK1-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2701 // CHECK1: .omp.final.then: 2702 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2703 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP39]], 0 2704 // CHECK1-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 2705 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 2706 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 2707 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[I5]], align 4 2708 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 2709 // CHECK1: .omp.final.done: 2710 // CHECK1-NEXT: br label [[OMP_PRECOND_END]] 2711 // CHECK1: omp.precond.end: 2712 // CHECK1-NEXT: ret void 2713 // 2714 // 2715 // CHECK3-LABEL: define {{[^@]+}}@main 2716 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 2717 // CHECK3-NEXT: entry: 2718 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2719 // CHECK3-NEXT: [[A:%.*]] = alloca ptr, align 4 2720 // CHECK3-NEXT: [[B:%.*]] = alloca ptr, align 4 2721 // CHECK3-NEXT: [[C:%.*]] = alloca ptr, align 4 2722 // CHECK3-NEXT: [[N:%.*]] = alloca i32, align 4 2723 // CHECK3-NEXT: [[CH:%.*]] = alloca i32, align 4 2724 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 2725 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 2726 // CHECK3-NEXT: store i32 10000, ptr [[N]], align 4 2727 // CHECK3-NEXT: store i32 100, ptr [[CH]], align 4 2728 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 2729 // CHECK3-NEXT: store ptr [[N]], ptr [[TMP0]], align 4 2730 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 2731 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 2732 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 2 2733 // CHECK3-NEXT: store ptr [[B]], ptr [[TMP2]], align 4 2734 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 3 2735 // CHECK3-NEXT: store ptr [[C]], ptr [[TMP3]], align 4 2736 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 4 2737 // CHECK3-NEXT: store ptr [[CH]], ptr [[TMP4]], align 4 2738 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(20) [[REF_TMP]]) 2739 // CHECK3-NEXT: ret i32 0 2740 // 2741 // 2742 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116 2743 // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2:[0-9]+]] { 2744 // CHECK3-NEXT: entry: 2745 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2746 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2747 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 2748 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 2749 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 2750 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2751 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 2752 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 2753 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 2754 // CHECK3-NEXT: ret void 2755 // 2756 // 2757 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined 2758 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2759 // CHECK3-NEXT: entry: 2760 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2761 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2762 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 2763 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2764 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 2765 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 2766 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2767 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2768 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2769 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2770 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2771 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2772 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2773 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2774 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2775 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 2776 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2777 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2778 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 2779 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2780 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 2781 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 2782 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 2783 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2784 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 2785 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 2786 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 2787 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2788 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2789 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2790 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2791 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2792 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2793 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 2794 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2795 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2796 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2797 // CHECK3: omp.precond.then: 2798 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 2799 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2800 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 2801 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2802 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2803 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2804 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 2805 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2806 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2807 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2808 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 2809 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2810 // CHECK3: cond.true: 2811 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2812 // CHECK3-NEXT: br label [[COND_END:%.*]] 2813 // CHECK3: cond.false: 2814 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 2815 // CHECK3-NEXT: br label [[COND_END]] 2816 // CHECK3: cond.end: 2817 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 2818 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 2819 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 2820 // CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 2821 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2822 // CHECK3: omp.inner.for.cond: 2823 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]] 2824 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 2825 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 2826 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2827 // CHECK3: omp.inner.for.body: 2828 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]] 2829 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]] 2830 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP11]] 2831 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2832 // CHECK3: omp.inner.for.inc: 2833 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 2834 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]] 2835 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2836 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]] 2837 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2838 // CHECK3: omp.inner.for.end: 2839 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2840 // CHECK3: omp.loop.exit: 2841 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2842 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 2843 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 2844 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2845 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 2846 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2847 // CHECK3: .omp.final.then: 2848 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2849 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 2850 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 2851 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 2852 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 2853 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 2854 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2855 // CHECK3: .omp.final.done: 2856 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 2857 // CHECK3: omp.precond.end: 2858 // CHECK3-NEXT: ret void 2859 // 2860 // 2861 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l116.omp_outlined.omp_outlined 2862 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 2863 // CHECK3-NEXT: entry: 2864 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 2865 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 2866 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2867 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2868 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 2869 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 2870 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 2871 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 2872 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2873 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2874 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2875 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2876 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2877 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2878 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2879 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2880 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2881 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 2882 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 2883 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 2884 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 2885 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2886 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2887 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 2888 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 2889 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 2890 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 2891 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 2892 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 2893 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 2894 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 2895 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 2896 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 2897 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2898 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 2899 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2900 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2901 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 2902 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 2903 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2904 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 2905 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2906 // CHECK3: omp.precond.then: 2907 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 2908 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2909 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 2910 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 2911 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 2912 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 2913 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 2914 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 2915 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 2916 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2917 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 2918 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 2919 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2920 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2921 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 2922 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2923 // CHECK3: cond.true: 2924 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 2925 // CHECK3-NEXT: br label [[COND_END:%.*]] 2926 // CHECK3: cond.false: 2927 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 2928 // CHECK3-NEXT: br label [[COND_END]] 2929 // CHECK3: cond.end: 2930 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 2931 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 2932 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 2933 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 2934 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2935 // CHECK3: omp.inner.for.cond: 2936 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 2937 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]] 2938 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 2939 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2940 // CHECK3: omp.inner.for.body: 2941 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 2942 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 2943 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2944 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]] 2945 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP15]] 2946 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]] 2947 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 2948 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]] 2949 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP15]] 2950 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]] 2951 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 2952 // CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP15]] 2953 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 2954 // CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP15]] 2955 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]] 2956 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 2957 // CHECK3-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP15]] 2958 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 2959 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 4, !llvm.access.group [[ACC_GRP15]] 2960 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 2961 // CHECK3-NEXT: store ptr [[I3]], ptr [[TMP29]], align 4, !llvm.access.group [[ACC_GRP15]] 2962 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 2963 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 4, !llvm.access.group [[ACC_GRP15]] 2964 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 2965 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP15]] 2966 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP15]] 2967 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2968 // CHECK3: omp.body.continue: 2969 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2970 // CHECK3: omp.inner.for.inc: 2971 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 2972 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 2973 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]] 2974 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2975 // CHECK3: omp.inner.for.end: 2976 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2977 // CHECK3: omp.loop.exit: 2978 // CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 2979 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 2980 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 2981 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 2982 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 2983 // CHECK3-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2984 // CHECK3: .omp.final.then: 2985 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 2986 // CHECK3-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP37]], 0 2987 // CHECK3-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 2988 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 2989 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 2990 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 2991 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 2992 // CHECK3: .omp.final.done: 2993 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 2994 // CHECK3: omp.precond.end: 2995 // CHECK3-NEXT: ret void 2996 // 2997 // 2998 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159 2999 // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 3000 // CHECK3-NEXT: entry: 3001 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3002 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3003 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3004 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3005 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 3006 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3007 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3008 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3009 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 3010 // CHECK3-NEXT: ret void 3011 // 3012 // 3013 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined 3014 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3015 // CHECK3-NEXT: entry: 3016 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3017 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3018 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3019 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3020 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3021 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3022 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3023 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3024 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3025 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3026 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3027 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3028 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3029 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3030 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3031 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3032 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3033 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3034 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3035 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3036 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3037 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3038 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3039 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3040 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3041 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3042 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 3043 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3044 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3045 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3046 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3047 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3048 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3049 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3050 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3051 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3052 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3053 // CHECK3: omp.precond.then: 3054 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3055 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3056 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 3057 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3058 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3059 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3060 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 3061 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3062 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3063 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3064 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3065 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3066 // CHECK3: cond.true: 3067 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3068 // CHECK3-NEXT: br label [[COND_END:%.*]] 3069 // CHECK3: cond.false: 3070 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3071 // CHECK3-NEXT: br label [[COND_END]] 3072 // CHECK3: cond.end: 3073 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3074 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3075 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3076 // CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 3077 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3078 // CHECK3: omp.inner.for.cond: 3079 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]] 3080 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]] 3081 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3082 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3083 // CHECK3: omp.inner.for.body: 3084 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]] 3085 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]] 3086 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP20]] 3087 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3088 // CHECK3: omp.inner.for.inc: 3089 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 3090 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]] 3091 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3092 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]] 3093 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 3094 // CHECK3: omp.inner.for.end: 3095 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3096 // CHECK3: omp.loop.exit: 3097 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3098 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 3099 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 3100 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3101 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3102 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3103 // CHECK3: .omp.final.then: 3104 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3105 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 3106 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3107 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 3108 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 3109 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 3110 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3111 // CHECK3: .omp.final.done: 3112 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3113 // CHECK3: omp.precond.end: 3114 // CHECK3-NEXT: ret void 3115 // 3116 // 3117 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.omp_outlined.omp_outlined 3118 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3119 // CHECK3-NEXT: entry: 3120 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3121 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3122 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3123 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3124 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3125 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3126 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3127 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3128 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3129 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3130 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3131 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3132 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3133 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3134 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3135 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3136 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3137 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3138 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4 3139 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3140 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3141 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3142 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3143 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3144 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3145 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3146 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3147 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3148 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3149 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3150 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3151 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 3152 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3153 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3154 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3155 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3156 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3157 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3158 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3159 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3160 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3161 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3162 // CHECK3: omp.precond.then: 3163 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3164 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3165 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 3166 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3167 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3168 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 3169 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 3170 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3171 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3172 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3173 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 3174 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3175 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3176 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3177 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3178 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3179 // CHECK3: cond.true: 3180 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3181 // CHECK3-NEXT: br label [[COND_END:%.*]] 3182 // CHECK3: cond.false: 3183 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3184 // CHECK3-NEXT: br label [[COND_END]] 3185 // CHECK3: cond.end: 3186 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3187 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3188 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3189 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 3190 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3191 // CHECK3: omp.inner.for.cond: 3192 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]] 3193 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]] 3194 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3195 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3196 // CHECK3: omp.inner.for.body: 3197 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 3198 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3199 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3200 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP23]] 3201 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP23]] 3202 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP23]] 3203 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 3204 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP23]] 3205 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP23]] 3206 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP23]] 3207 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 3208 // CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP23]] 3209 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 3210 // CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP23]] 3211 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP23]] 3212 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 3213 // CHECK3-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP23]] 3214 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 0 3215 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 4, !llvm.access.group [[ACC_GRP23]] 3216 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 1 3217 // CHECK3-NEXT: store ptr [[I3]], ptr [[TMP29]], align 4, !llvm.access.group [[ACC_GRP23]] 3218 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 2 3219 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 4, !llvm.access.group [[ACC_GRP23]] 3220 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 3 3221 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP23]] 3222 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE0_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP23]] 3223 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3224 // CHECK3: omp.body.continue: 3225 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3226 // CHECK3: omp.inner.for.inc: 3227 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 3228 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 3229 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]] 3230 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 3231 // CHECK3: omp.inner.for.end: 3232 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3233 // CHECK3: omp.loop.exit: 3234 // CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3235 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 3236 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 3237 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3238 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 3239 // CHECK3-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3240 // CHECK3: .omp.final.then: 3241 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3242 // CHECK3-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP37]], 0 3243 // CHECK3-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 3244 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 3245 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 3246 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 3247 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3248 // CHECK3: .omp.final.done: 3249 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3250 // CHECK3: omp.precond.end: 3251 // CHECK3-NEXT: ret void 3252 // 3253 // 3254 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201 3255 // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 3256 // CHECK3-NEXT: entry: 3257 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 3258 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3259 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3260 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3261 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3262 // CHECK3-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 3263 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 3264 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3265 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3266 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3267 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 3268 // CHECK3-NEXT: ret void 3269 // 3270 // 3271 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined 3272 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3273 // CHECK3-NEXT: entry: 3274 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3275 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3276 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 3277 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3278 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3279 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3280 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3281 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3282 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3283 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3284 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3285 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3286 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3287 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3288 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3289 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3290 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3291 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3292 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3293 // CHECK3-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 3294 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3295 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3296 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3297 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3298 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 3299 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3300 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3301 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3302 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3303 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4 3304 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 3305 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3306 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 3307 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3308 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3309 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3310 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3311 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3312 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 3313 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3314 // CHECK3: omp.precond.then: 3315 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3316 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3317 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_COMB_UB]], align 4 3318 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3319 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3320 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4 3321 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3322 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 3323 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 3324 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3325 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3326 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3327 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3328 // CHECK3: cond.true: 3329 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3330 // CHECK3-NEXT: br label [[COND_END:%.*]] 3331 // CHECK3: cond.false: 3332 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3333 // CHECK3-NEXT: br label [[COND_END]] 3334 // CHECK3: cond.end: 3335 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3336 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3337 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3338 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 3339 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3340 // CHECK3: omp.inner.for.cond: 3341 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]] 3342 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP26]] 3343 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 3344 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 3345 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3346 // CHECK3: omp.inner.for.body: 3347 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]] 3348 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3349 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]), !llvm.access.group [[ACC_GRP26]] 3350 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3351 // CHECK3: omp.inner.for.inc: 3352 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 3353 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]] 3354 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3355 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 3356 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]] 3357 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]] 3358 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3359 // CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]] 3360 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3361 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]] 3362 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 3363 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3364 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3365 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP26]] 3366 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 3367 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 3368 // CHECK3: cond.true10: 3369 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP26]] 3370 // CHECK3-NEXT: br label [[COND_END12:%.*]] 3371 // CHECK3: cond.false11: 3372 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3373 // CHECK3-NEXT: br label [[COND_END12]] 3374 // CHECK3: cond.end12: 3375 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 3376 // CHECK3-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 3377 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]] 3378 // CHECK3-NEXT: store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 3379 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 3380 // CHECK3: omp.inner.for.end: 3381 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3382 // CHECK3: omp.loop.exit: 3383 // CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3384 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4 3385 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]]) 3386 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3387 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3388 // CHECK3-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3389 // CHECK3: .omp.final.then: 3390 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3391 // CHECK3-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP36]], 0 3392 // CHECK3-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 3393 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1 3394 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]] 3395 // CHECK3-NEXT: store i32 [[ADD16]], ptr [[I3]], align 4 3396 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3397 // CHECK3: .omp.final.done: 3398 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3399 // CHECK3: omp.precond.end: 3400 // CHECK3-NEXT: ret void 3401 // 3402 // 3403 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l201.omp_outlined.omp_outlined 3404 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3405 // CHECK3-NEXT: entry: 3406 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3407 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3408 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3409 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3410 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3411 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3412 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3413 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3414 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3415 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3416 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3417 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3418 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3419 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3420 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3421 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3422 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3423 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3424 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 4 3425 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3426 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3427 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3428 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3429 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3430 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3431 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3432 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3433 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3434 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3435 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3436 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3437 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 3438 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3439 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3440 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3441 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3442 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3443 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3444 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3445 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3446 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3447 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3448 // CHECK3: omp.precond.then: 3449 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3450 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3451 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 3452 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3453 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3454 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 3455 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 3456 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3457 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3458 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3459 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 3460 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3461 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3462 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3463 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3464 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3465 // CHECK3: cond.true: 3466 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3467 // CHECK3-NEXT: br label [[COND_END:%.*]] 3468 // CHECK3: cond.false: 3469 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3470 // CHECK3-NEXT: br label [[COND_END]] 3471 // CHECK3: cond.end: 3472 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3473 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3474 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3475 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 3476 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3477 // CHECK3: omp.inner.for.cond: 3478 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]] 3479 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 3480 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3481 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3482 // CHECK3: omp.inner.for.body: 3483 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 3484 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3485 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3486 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP29]] 3487 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP29]] 3488 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP29]] 3489 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 3490 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP29]] 3491 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP29]] 3492 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP29]] 3493 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 3494 // CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP29]] 3495 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 3496 // CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP29]] 3497 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP29]] 3498 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 3499 // CHECK3-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP29]] 3500 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 0 3501 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 4, !llvm.access.group [[ACC_GRP29]] 3502 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 1 3503 // CHECK3-NEXT: store ptr [[I3]], ptr [[TMP29]], align 4, !llvm.access.group [[ACC_GRP29]] 3504 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 2 3505 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 4, !llvm.access.group [[ACC_GRP29]] 3506 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_2]], ptr [[REF_TMP]], i32 0, i32 3 3507 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP29]] 3508 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE1_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP29]] 3509 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3510 // CHECK3: omp.body.continue: 3511 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3512 // CHECK3: omp.inner.for.inc: 3513 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 3514 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 3515 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 3516 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 3517 // CHECK3: omp.inner.for.end: 3518 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3519 // CHECK3: omp.loop.exit: 3520 // CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3521 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 3522 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 3523 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3524 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 3525 // CHECK3-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3526 // CHECK3: .omp.final.then: 3527 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3528 // CHECK3-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP37]], 0 3529 // CHECK3-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 3530 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 3531 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 3532 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 3533 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3534 // CHECK3: .omp.final.done: 3535 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3536 // CHECK3: omp.precond.end: 3537 // CHECK3-NEXT: ret void 3538 // 3539 // 3540 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234 3541 // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 3542 // CHECK3-NEXT: entry: 3543 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3544 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3545 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3546 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3547 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 3548 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3549 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3550 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3551 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 3552 // CHECK3-NEXT: ret void 3553 // 3554 // 3555 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined 3556 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3557 // CHECK3-NEXT: entry: 3558 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3559 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3560 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3561 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3562 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3563 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3564 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3565 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3566 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3567 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3568 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3569 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3570 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3571 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3572 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3573 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3574 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3575 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3576 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3577 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3578 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3579 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3580 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3581 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3582 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3583 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3584 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 3585 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3586 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3587 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3588 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3589 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3590 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3591 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3592 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3593 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3594 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3595 // CHECK3: omp.precond.then: 3596 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3597 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3598 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 3599 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3600 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3601 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3602 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 3603 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3604 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3605 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3606 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 3607 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3608 // CHECK3: cond.true: 3609 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3610 // CHECK3-NEXT: br label [[COND_END:%.*]] 3611 // CHECK3: cond.false: 3612 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3613 // CHECK3-NEXT: br label [[COND_END]] 3614 // CHECK3: cond.end: 3615 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 3616 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3617 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3618 // CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 3619 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3620 // CHECK3: omp.inner.for.cond: 3621 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]] 3622 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 3623 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 3624 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3625 // CHECK3: omp.inner.for.body: 3626 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]] 3627 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 3628 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP32]] 3629 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3630 // CHECK3: omp.inner.for.inc: 3631 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 3632 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]] 3633 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3634 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 3635 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 3636 // CHECK3: omp.inner.for.end: 3637 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3638 // CHECK3: omp.loop.exit: 3639 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3640 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 3641 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 3642 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3643 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 3644 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3645 // CHECK3: .omp.final.then: 3646 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3647 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 3648 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3649 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 3650 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 3651 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 3652 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3653 // CHECK3: .omp.final.done: 3654 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3655 // CHECK3: omp.precond.end: 3656 // CHECK3-NEXT: ret void 3657 // 3658 // 3659 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l234.omp_outlined.omp_outlined 3660 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3661 // CHECK3-NEXT: entry: 3662 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3663 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3664 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3665 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3666 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3667 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3668 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3669 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3670 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3671 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3672 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3673 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3674 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3675 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3676 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3677 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3678 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3679 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 3680 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_3:%.*]], align 4 3681 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3682 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3683 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3684 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3685 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3686 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3687 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3688 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3689 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3690 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3691 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3692 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3693 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 3694 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 3695 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3696 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3697 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3698 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3699 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3700 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3701 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3702 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3703 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3704 // CHECK3: omp.precond.then: 3705 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3706 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3707 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 3708 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3709 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3710 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 3711 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 3712 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3713 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3714 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3715 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 3716 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3717 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3718 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3719 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3720 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3721 // CHECK3: cond.true: 3722 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3723 // CHECK3-NEXT: br label [[COND_END:%.*]] 3724 // CHECK3: cond.false: 3725 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3726 // CHECK3-NEXT: br label [[COND_END]] 3727 // CHECK3: cond.end: 3728 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3729 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 3730 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 3731 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 3732 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3733 // CHECK3: omp.inner.for.cond: 3734 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]] 3735 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 3736 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3737 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3738 // CHECK3: omp.inner.for.body: 3739 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 3740 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 3741 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3742 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP35]] 3743 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP35]] 3744 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP35]] 3745 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 3746 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP35]] 3747 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP35]] 3748 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP35]] 3749 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 3750 // CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP35]] 3751 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 3752 // CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP35]] 3753 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP35]] 3754 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 3755 // CHECK3-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP35]] 3756 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 0 3757 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP28]], align 4, !llvm.access.group [[ACC_GRP35]] 3758 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 1 3759 // CHECK3-NEXT: store ptr [[I3]], ptr [[TMP29]], align 4, !llvm.access.group [[ACC_GRP35]] 3760 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 2 3761 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP30]], align 4, !llvm.access.group [[ACC_GRP35]] 3762 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_3]], ptr [[REF_TMP]], i32 0, i32 3 3763 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP35]] 3764 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE2_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP35]] 3765 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3766 // CHECK3: omp.body.continue: 3767 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3768 // CHECK3: omp.inner.for.inc: 3769 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 3770 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP32]], 1 3771 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 3772 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] 3773 // CHECK3: omp.inner.for.end: 3774 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3775 // CHECK3: omp.loop.exit: 3776 // CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3777 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 3778 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]]) 3779 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3780 // CHECK3-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 3781 // CHECK3-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3782 // CHECK3: .omp.final.then: 3783 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 3784 // CHECK3-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP37]], 0 3785 // CHECK3-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 3786 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 3787 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 3788 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 3789 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3790 // CHECK3: .omp.final.done: 3791 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3792 // CHECK3: omp.precond.end: 3793 // CHECK3-NEXT: ret void 3794 // 3795 // 3796 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266 3797 // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 3798 // CHECK3-NEXT: entry: 3799 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 3800 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3801 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3802 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3803 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3804 // CHECK3-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 3805 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 3806 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3807 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3808 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3809 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 3810 // CHECK3-NEXT: ret void 3811 // 3812 // 3813 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined 3814 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 3815 // CHECK3-NEXT: entry: 3816 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3817 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3818 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 3819 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3820 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3821 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3822 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3823 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3824 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3825 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3826 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3827 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3828 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3829 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3830 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3831 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3832 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3833 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 3834 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 3835 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3836 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3837 // CHECK3-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 3838 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3839 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3840 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3841 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3842 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 3843 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3844 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3845 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3846 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3847 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 3848 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 3849 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 3850 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3851 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3852 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 3853 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3854 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3855 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 3856 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3857 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3858 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 3859 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3860 // CHECK3: omp.precond.then: 3861 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 3862 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 3863 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 3864 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3865 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3866 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3867 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 3868 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 3869 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3870 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 3871 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 3872 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3873 // CHECK3: cond.true: 3874 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 3875 // CHECK3-NEXT: br label [[COND_END:%.*]] 3876 // CHECK3: cond.false: 3877 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 3878 // CHECK3-NEXT: br label [[COND_END]] 3879 // CHECK3: cond.end: 3880 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 3881 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 3882 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 3883 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 3884 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3885 // CHECK3: omp.inner.for.cond: 3886 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 3887 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 3888 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 3889 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3890 // CHECK3: omp.inner.for.body: 3891 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]] 3892 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 3893 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP38]] 3894 // CHECK3-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP38]] 3895 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP38]] 3896 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i32 [[TMP22]]), !llvm.access.group [[ACC_GRP38]] 3897 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3898 // CHECK3: omp.inner.for.inc: 3899 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 3900 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]] 3901 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3902 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 3903 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 3904 // CHECK3: omp.inner.for.end: 3905 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3906 // CHECK3: omp.loop.exit: 3907 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3908 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 3909 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 3910 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 3911 // CHECK3-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3912 // CHECK3-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3913 // CHECK3: .omp.final.then: 3914 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3915 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 3916 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3917 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 3918 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 3919 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 3920 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 3921 // CHECK3: .omp.final.done: 3922 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 3923 // CHECK3: omp.precond.end: 3924 // CHECK3-NEXT: ret void 3925 // 3926 // 3927 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l266.omp_outlined.omp_outlined 3928 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3929 // CHECK3-NEXT: entry: 3930 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 3931 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 3932 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3933 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3934 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 3935 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 3936 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 3937 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 3938 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 3939 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3940 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 3941 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3942 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3943 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 3944 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3945 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3946 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3947 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3948 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 3949 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 4 3950 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 3951 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 3952 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3953 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3954 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 3955 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 3956 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 3957 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 3958 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 3959 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 3960 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 3961 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 3962 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 3963 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 3964 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 3965 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3966 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 3967 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3968 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3969 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 3970 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 3971 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 3972 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3973 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3974 // CHECK3: omp.precond.then: 3975 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 3976 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 3977 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 3978 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 3979 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3980 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 3981 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 3982 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 3983 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 3984 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 3985 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 3986 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 3987 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 3988 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3989 // CHECK3: omp.dispatch.cond: 3990 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3991 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3992 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 3993 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3994 // CHECK3: cond.true: 3995 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 3996 // CHECK3-NEXT: br label [[COND_END:%.*]] 3997 // CHECK3: cond.false: 3998 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 3999 // CHECK3-NEXT: br label [[COND_END]] 4000 // CHECK3: cond.end: 4001 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 4002 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 4003 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4004 // CHECK3-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 4005 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 4006 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4007 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 4008 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4009 // CHECK3: omp.dispatch.body: 4010 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4011 // CHECK3: omp.inner.for.cond: 4012 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]] 4013 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]] 4014 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 4015 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4016 // CHECK3: omp.inner.for.body: 4017 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 4018 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 4019 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4020 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 4021 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP41]] 4022 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 4023 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 4024 // CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP41]] 4025 // CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP41]] 4026 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 4027 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 4028 // CHECK3-NEXT: [[TMP28:%.*]] = load double, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP41]] 4029 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 4030 // CHECK3-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP41]] 4031 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 4032 // CHECK3-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, ptr [[TMP29]], i32 [[TMP30]] 4033 // CHECK3-NEXT: store double [[ADD9]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP41]] 4034 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 0 4035 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP41]] 4036 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 1 4037 // CHECK3-NEXT: store ptr [[I4]], ptr [[TMP32]], align 4, !llvm.access.group [[ACC_GRP41]] 4038 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 2 4039 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP33]], align 4, !llvm.access.group [[ACC_GRP41]] 4040 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_4]], ptr [[REF_TMP]], i32 0, i32 3 4041 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP34]], align 4, !llvm.access.group [[ACC_GRP41]] 4042 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE3_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP41]] 4043 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4044 // CHECK3: omp.body.continue: 4045 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4046 // CHECK3: omp.inner.for.inc: 4047 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 4048 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP35]], 1 4049 // CHECK3-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 4050 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]] 4051 // CHECK3: omp.inner.for.end: 4052 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4053 // CHECK3: omp.dispatch.inc: 4054 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4055 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4056 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] 4057 // CHECK3-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 4 4058 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4059 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 4060 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] 4061 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 4 4062 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 4063 // CHECK3: omp.dispatch.end: 4064 // CHECK3-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4065 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4 4066 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP41]]) 4067 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4068 // CHECK3-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 4069 // CHECK3-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4070 // CHECK3: .omp.final.then: 4071 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4072 // CHECK3-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP44]], 0 4073 // CHECK3-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 4074 // CHECK3-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 1 4075 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL16]] 4076 // CHECK3-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 4077 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 4078 // CHECK3: .omp.final.done: 4079 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4080 // CHECK3: omp.precond.end: 4081 // CHECK3-NEXT: ret void 4082 // 4083 // 4084 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299 4085 // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 4086 // CHECK3-NEXT: entry: 4087 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4088 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4089 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 4090 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 4091 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 4092 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4093 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 4094 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 4095 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 4096 // CHECK3-NEXT: ret void 4097 // 4098 // 4099 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined 4100 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4101 // CHECK3-NEXT: entry: 4102 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4103 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4104 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4105 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4106 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 4107 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 4108 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4109 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4110 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4111 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4112 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4113 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4114 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4115 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4116 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4117 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4118 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4119 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4120 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4121 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4122 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 4123 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 4124 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4125 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4126 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 4127 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 4128 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 4129 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 4130 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4131 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4132 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4133 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4134 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4135 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 4136 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4137 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4138 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4139 // CHECK3: omp.precond.then: 4140 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4141 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4142 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 4143 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4144 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4145 // CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4146 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 4147 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4148 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4149 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4150 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4151 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4152 // CHECK3: cond.true: 4153 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4154 // CHECK3-NEXT: br label [[COND_END:%.*]] 4155 // CHECK3: cond.false: 4156 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4157 // CHECK3-NEXT: br label [[COND_END]] 4158 // CHECK3: cond.end: 4159 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4160 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4161 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4162 // CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 4163 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4164 // CHECK3: omp.inner.for.cond: 4165 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]] 4166 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]] 4167 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 4168 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4169 // CHECK3: omp.inner.for.body: 4170 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]] 4171 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]] 4172 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP44]] 4173 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4174 // CHECK3: omp.inner.for.inc: 4175 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 4176 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]] 4177 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4178 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 4179 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]] 4180 // CHECK3: omp.inner.for.end: 4181 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4182 // CHECK3: omp.loop.exit: 4183 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4184 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 4185 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 4186 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4187 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 4188 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4189 // CHECK3: .omp.final.then: 4190 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4191 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 4192 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 4193 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 4194 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 4195 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 4196 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 4197 // CHECK3: .omp.final.done: 4198 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4199 // CHECK3: omp.precond.end: 4200 // CHECK3-NEXT: ret void 4201 // 4202 // 4203 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l299.omp_outlined.omp_outlined 4204 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4205 // CHECK3-NEXT: entry: 4206 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4207 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4208 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4209 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4210 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4211 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4212 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 4213 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 4214 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4215 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4216 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4217 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4218 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4219 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4220 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4221 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4222 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4223 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4 4224 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_5:%.*]], align 4 4225 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4226 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4227 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4228 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4229 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4230 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4231 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 4232 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 4233 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4234 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4235 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 4236 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 4237 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 4238 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 4239 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4240 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4241 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4242 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4243 // CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4244 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 4245 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4246 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4247 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4248 // CHECK3: omp.precond.then: 4249 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4250 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4251 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 4252 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4253 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4254 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 4255 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 4256 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4257 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4258 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4259 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4260 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4261 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 4262 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 4263 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4264 // CHECK3: omp.dispatch.cond: 4265 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4266 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 4267 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 4268 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 4269 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4270 // CHECK3: omp.dispatch.body: 4271 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4272 // CHECK3-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 4273 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4274 // CHECK3: omp.inner.for.cond: 4275 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]] 4276 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]] 4277 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 4278 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4279 // CHECK3: omp.inner.for.body: 4280 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 4281 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 4282 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4283 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP47]] 4284 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP47]] 4285 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP47]] 4286 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP21]], i32 [[TMP22]] 4287 // CHECK3-NEXT: [[TMP23:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP47]] 4288 // CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP47]] 4289 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP47]] 4290 // CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[TMP24]], i32 [[TMP25]] 4291 // CHECK3-NEXT: [[TMP26:%.*]] = load double, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP47]] 4292 // CHECK3-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 4293 // CHECK3-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP47]] 4294 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP47]] 4295 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, ptr [[TMP27]], i32 [[TMP28]] 4296 // CHECK3-NEXT: store double [[ADD6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP47]] 4297 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 0 4298 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP29]], align 4, !llvm.access.group [[ACC_GRP47]] 4299 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 1 4300 // CHECK3-NEXT: store ptr [[I3]], ptr [[TMP30]], align 4, !llvm.access.group [[ACC_GRP47]] 4301 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 2 4302 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP47]] 4303 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_5]], ptr [[REF_TMP]], i32 0, i32 3 4304 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP32]], align 4, !llvm.access.group [[ACC_GRP47]] 4305 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE4_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP47]] 4306 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4307 // CHECK3: omp.body.continue: 4308 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4309 // CHECK3: omp.inner.for.inc: 4310 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 4311 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], 1 4312 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 4313 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]] 4314 // CHECK3: omp.inner.for.end: 4315 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4316 // CHECK3: omp.dispatch.inc: 4317 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 4318 // CHECK3: omp.dispatch.end: 4319 // CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4320 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 4321 // CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP35]]) 4322 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4323 // CHECK3-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 4324 // CHECK3-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4325 // CHECK3: .omp.final.then: 4326 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4327 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP38]], 0 4328 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 4329 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 4330 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 4331 // CHECK3-NEXT: store i32 [[ADD12]], ptr [[I3]], align 4 4332 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 4333 // CHECK3: .omp.final.done: 4334 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4335 // CHECK3: omp.precond.end: 4336 // CHECK3-NEXT: ret void 4337 // 4338 // 4339 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328 4340 // CHECK3-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR2]] { 4341 // CHECK3-NEXT: entry: 4342 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 4343 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4344 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4345 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 4346 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 4347 // CHECK3-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 4348 // CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 4349 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4350 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 4351 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 4352 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 4353 // CHECK3-NEXT: ret void 4354 // 4355 // 4356 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined 4357 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4358 // CHECK3-NEXT: entry: 4359 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4360 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4361 // CHECK3-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 4362 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4363 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4364 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 4365 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 4366 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4367 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4368 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4369 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4370 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4371 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4372 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4373 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4374 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4375 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4376 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 4377 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4378 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4379 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4380 // CHECK3-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 4381 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4382 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4383 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 4384 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 4385 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 4386 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4387 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4388 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 4389 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 4390 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 4391 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 4392 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 4393 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4394 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4395 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 4396 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4397 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4398 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 4399 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 4400 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4401 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 4402 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4403 // CHECK3: omp.precond.then: 4404 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 4405 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4406 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 4407 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4408 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4409 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4410 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 4411 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 4412 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4413 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4414 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 4415 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4416 // CHECK3: cond.true: 4417 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4418 // CHECK3-NEXT: br label [[COND_END:%.*]] 4419 // CHECK3: cond.false: 4420 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 4421 // CHECK3-NEXT: br label [[COND_END]] 4422 // CHECK3: cond.end: 4423 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 4424 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 4425 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 4426 // CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 4427 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4428 // CHECK3: omp.inner.for.cond: 4429 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]] 4430 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]] 4431 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 4432 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4433 // CHECK3: omp.inner.for.body: 4434 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]] 4435 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]] 4436 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP50]] 4437 // CHECK3-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP50]] 4438 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP50]] 4439 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i32 [[TMP22]]), !llvm.access.group [[ACC_GRP50]] 4440 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4441 // CHECK3: omp.inner.for.inc: 4442 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 4443 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]] 4444 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4445 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 4446 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]] 4447 // CHECK3: omp.inner.for.end: 4448 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4449 // CHECK3: omp.loop.exit: 4450 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4451 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 4452 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 4453 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4454 // CHECK3-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 4455 // CHECK3-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4456 // CHECK3: .omp.final.then: 4457 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4458 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 4459 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4460 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 4461 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 4462 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 4463 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 4464 // CHECK3: .omp.final.done: 4465 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4466 // CHECK3: omp.precond.end: 4467 // CHECK3-NEXT: ret void 4468 // 4469 // 4470 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l328.omp_outlined.omp_outlined 4471 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4472 // CHECK3-NEXT: entry: 4473 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 4474 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 4475 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 4476 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 4477 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 4478 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 4479 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 4480 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 4481 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4482 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4483 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 4484 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4485 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4486 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 4487 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4488 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4489 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4490 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4491 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4 4492 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 4 4493 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 4494 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 4495 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4496 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4497 // CHECK3-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 4498 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 4499 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 4500 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 4501 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4502 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 4503 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 4504 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 4505 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 4506 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 4507 // CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4508 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4509 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 4510 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4511 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4512 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 4513 // CHECK3-NEXT: store i32 0, ptr [[I]], align 4 4514 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4515 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 4516 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4517 // CHECK3: omp.precond.then: 4518 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 4519 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 4520 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 4521 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 4522 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 4523 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 4524 // CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 4525 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 4526 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 4527 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 4528 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4529 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 4530 // CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4531 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 4532 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 4533 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4534 // CHECK3: omp.dispatch.cond: 4535 // CHECK3-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4536 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 4537 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP16]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 4538 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 4539 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4540 // CHECK3: omp.dispatch.body: 4541 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 4542 // CHECK3-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 4543 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4544 // CHECK3: omp.inner.for.cond: 4545 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]] 4546 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]] 4547 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 4548 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4549 // CHECK3: omp.inner.for.body: 4550 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 4551 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 4552 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4553 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 4554 // CHECK3-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP53]] 4555 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 4556 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP22]], i32 [[TMP23]] 4557 // CHECK3-NEXT: [[TMP24:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP53]] 4558 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP53]] 4559 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 4560 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP25]], i32 [[TMP26]] 4561 // CHECK3-NEXT: [[TMP27:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP53]] 4562 // CHECK3-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 4563 // CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP53]] 4564 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 4565 // CHECK3-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP28]], i32 [[TMP29]] 4566 // CHECK3-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP53]] 4567 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 0 4568 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP30]], align 4, !llvm.access.group [[ACC_GRP53]] 4569 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 1 4570 // CHECK3-NEXT: store ptr [[I4]], ptr [[TMP31]], align 4, !llvm.access.group [[ACC_GRP53]] 4571 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 2 4572 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP32]], align 4, !llvm.access.group [[ACC_GRP53]] 4573 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_6]], ptr [[REF_TMP]], i32 0, i32 3 4574 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP33]], align 4, !llvm.access.group [[ACC_GRP53]] 4575 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE5_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP53]] 4576 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4577 // CHECK3: omp.body.continue: 4578 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4579 // CHECK3: omp.inner.for.inc: 4580 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 4581 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP34]], 1 4582 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 4583 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]] 4584 // CHECK3: omp.inner.for.end: 4585 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4586 // CHECK3: omp.dispatch.inc: 4587 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 4588 // CHECK3: omp.dispatch.end: 4589 // CHECK3-NEXT: [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 4590 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 4591 // CHECK3-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP36]]) 4592 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 4593 // CHECK3-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 4594 // CHECK3-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4595 // CHECK3: .omp.final.then: 4596 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4597 // CHECK3-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP39]], 0 4598 // CHECK3-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 4599 // CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 4600 // CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 4601 // CHECK3-NEXT: store i32 [[ADD13]], ptr [[I4]], align 4 4602 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 4603 // CHECK3: .omp.final.done: 4604 // CHECK3-NEXT: br label [[OMP_PRECOND_END]] 4605 // CHECK3: omp.precond.end: 4606 // CHECK3-NEXT: ret void 4607 // 4608 // 4609 // CHECK5-LABEL: define {{[^@]+}}@main 4610 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 4611 // CHECK5-NEXT: entry: 4612 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4613 // CHECK5-NEXT: [[A:%.*]] = alloca ptr, align 8 4614 // CHECK5-NEXT: [[B:%.*]] = alloca ptr, align 8 4615 // CHECK5-NEXT: [[C:%.*]] = alloca ptr, align 8 4616 // CHECK5-NEXT: [[N:%.*]] = alloca i32, align 4 4617 // CHECK5-NEXT: [[CH:%.*]] = alloca i32, align 4 4618 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 4619 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4 4620 // CHECK5-NEXT: store i32 10000, ptr [[N]], align 4 4621 // CHECK5-NEXT: store i32 100, ptr [[CH]], align 4 4622 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 4623 // CHECK5-NEXT: store ptr [[N]], ptr [[TMP0]], align 8 4624 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 4625 // CHECK5-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 4626 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 2 4627 // CHECK5-NEXT: store ptr [[B]], ptr [[TMP2]], align 8 4628 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 3 4629 // CHECK5-NEXT: store ptr [[C]], ptr [[TMP3]], align 8 4630 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 4 4631 // CHECK5-NEXT: store ptr [[CH]], ptr [[TMP4]], align 8 4632 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(40) [[REF_TMP]]) 4633 // CHECK5-NEXT: ret i32 0 4634 // 4635 // 4636 // CHECK7-LABEL: define {{[^@]+}}@main 4637 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 4638 // CHECK7-NEXT: entry: 4639 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4640 // CHECK7-NEXT: [[A:%.*]] = alloca ptr, align 4 4641 // CHECK7-NEXT: [[B:%.*]] = alloca ptr, align 4 4642 // CHECK7-NEXT: [[C:%.*]] = alloca ptr, align 4 4643 // CHECK7-NEXT: [[N:%.*]] = alloca i32, align 4 4644 // CHECK7-NEXT: [[CH:%.*]] = alloca i32, align 4 4645 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 4646 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4 4647 // CHECK7-NEXT: store i32 10000, ptr [[N]], align 4 4648 // CHECK7-NEXT: store i32 100, ptr [[CH]], align 4 4649 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 4650 // CHECK7-NEXT: store ptr [[N]], ptr [[TMP0]], align 4 4651 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 4652 // CHECK7-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 4653 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 2 4654 // CHECK7-NEXT: store ptr [[B]], ptr [[TMP2]], align 4 4655 // CHECK7-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 3 4656 // CHECK7-NEXT: store ptr [[C]], ptr [[TMP3]], align 4 4657 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 4 4658 // CHECK7-NEXT: store ptr [[CH]], ptr [[TMP4]], align 4 4659 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(20) [[REF_TMP]]) 4660 // CHECK7-NEXT: ret i32 0 4661 // 4662 // 4663 // CHECK9-LABEL: define {{[^@]+}}@main 4664 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 4665 // CHECK9-NEXT: entry: 4666 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4667 // CHECK9-NEXT: [[A:%.*]] = alloca ptr, align 8 4668 // CHECK9-NEXT: [[B:%.*]] = alloca ptr, align 8 4669 // CHECK9-NEXT: [[C:%.*]] = alloca ptr, align 8 4670 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 4671 // CHECK9-NEXT: [[CH:%.*]] = alloca i32, align 4 4672 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 4673 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 4674 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 4675 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 4676 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 4677 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4678 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4679 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 4680 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 4681 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x ptr], align 8 4682 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x ptr], align 8 4683 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x ptr], align 8 4684 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 4685 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 4686 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4687 // CHECK9-NEXT: [[KERNEL_ARGS14:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4688 // CHECK9-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 4689 // CHECK9-NEXT: [[N_CASTED17:%.*]] = alloca i64, align 8 4690 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [5 x ptr], align 8 4691 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [5 x ptr], align 8 4692 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [5 x ptr], align 8 4693 // CHECK9-NEXT: [[_TMP21:%.*]] = alloca i32, align 4 4694 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 4695 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 4696 // CHECK9-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4697 // CHECK9-NEXT: [[N_CASTED31:%.*]] = alloca i64, align 8 4698 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [4 x ptr], align 8 4699 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [4 x ptr], align 8 4700 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [4 x ptr], align 8 4701 // CHECK9-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 4702 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_36:%.*]] = alloca i32, align 4 4703 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 4704 // CHECK9-NEXT: [[KERNEL_ARGS42:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4705 // CHECK9-NEXT: [[CH_CASTED45:%.*]] = alloca i64, align 8 4706 // CHECK9-NEXT: [[N_CASTED46:%.*]] = alloca i64, align 8 4707 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [5 x ptr], align 8 4708 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [5 x ptr], align 8 4709 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [5 x ptr], align 8 4710 // CHECK9-NEXT: [[_TMP50:%.*]] = alloca i32, align 4 4711 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_51:%.*]] = alloca i32, align 4 4712 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 4713 // CHECK9-NEXT: [[KERNEL_ARGS57:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4714 // CHECK9-NEXT: [[N_CASTED60:%.*]] = alloca i64, align 8 4715 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS61:%.*]] = alloca [4 x ptr], align 8 4716 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS62:%.*]] = alloca [4 x ptr], align 8 4717 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS63:%.*]] = alloca [4 x ptr], align 8 4718 // CHECK9-NEXT: [[_TMP64:%.*]] = alloca i32, align 4 4719 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_65:%.*]] = alloca i32, align 4 4720 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_66:%.*]] = alloca i32, align 4 4721 // CHECK9-NEXT: [[KERNEL_ARGS71:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4722 // CHECK9-NEXT: [[CH_CASTED74:%.*]] = alloca i64, align 8 4723 // CHECK9-NEXT: [[N_CASTED75:%.*]] = alloca i64, align 8 4724 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS76:%.*]] = alloca [5 x ptr], align 8 4725 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS77:%.*]] = alloca [5 x ptr], align 8 4726 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS78:%.*]] = alloca [5 x ptr], align 8 4727 // CHECK9-NEXT: [[_TMP79:%.*]] = alloca i32, align 4 4728 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_80:%.*]] = alloca i32, align 4 4729 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_81:%.*]] = alloca i32, align 4 4730 // CHECK9-NEXT: [[KERNEL_ARGS86:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 4731 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 4732 // CHECK9-NEXT: store i32 10000, ptr [[N]], align 4 4733 // CHECK9-NEXT: store i32 100, ptr [[CH]], align 4 4734 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 4735 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[N_CASTED]], align 4 4736 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[N_CASTED]], align 8 4737 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8 4738 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B]], align 8 4739 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C]], align 8 4740 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4741 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP5]], align 8 4742 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4743 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP6]], align 8 4744 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4745 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 4746 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4747 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 8 4748 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4749 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP9]], align 8 4750 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 4751 // CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8 4752 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4753 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP11]], align 8 4754 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4755 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP12]], align 8 4756 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 4757 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8 4758 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 4759 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP14]], align 8 4760 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 4761 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8 4762 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 4763 // CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8 4764 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4765 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4766 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 4767 // CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 4768 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 4769 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 4770 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4771 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4772 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 4773 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 4774 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 4775 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 4776 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 4777 // CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4 4778 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 4779 // CHECK9-NEXT: store i32 4, ptr [[TMP24]], align 4 4780 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 4781 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP25]], align 8 4782 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 4783 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP26]], align 8 4784 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 4785 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 8 4786 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 4787 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8 4788 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 4789 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 4790 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 4791 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8 4792 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 4793 // CHECK9-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 4794 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 4795 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8 4796 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 4797 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 4798 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 4799 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 4800 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 4801 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4 4802 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.region_id, ptr [[KERNEL_ARGS]]) 4803 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 4804 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4805 // CHECK9: omp_offload.failed: 4806 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368(i64 [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]) #[[ATTR2:[0-9]+]] 4807 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 4808 // CHECK9: omp_offload.cont: 4809 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 4810 // CHECK9-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 4811 // CHECK9-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 4812 // CHECK9-NEXT: [[TMP40:%.*]] = load ptr, ptr [[A]], align 8 4813 // CHECK9-NEXT: [[TMP41:%.*]] = load ptr, ptr [[B]], align 8 4814 // CHECK9-NEXT: [[TMP42:%.*]] = load ptr, ptr [[C]], align 8 4815 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4816 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP43]], align 8 4817 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4818 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP44]], align 8 4819 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 4820 // CHECK9-NEXT: store ptr null, ptr [[TMP45]], align 8 4821 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 4822 // CHECK9-NEXT: store ptr [[TMP40]], ptr [[TMP46]], align 8 4823 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 4824 // CHECK9-NEXT: store ptr [[TMP40]], ptr [[TMP47]], align 8 4825 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 4826 // CHECK9-NEXT: store ptr null, ptr [[TMP48]], align 8 4827 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 4828 // CHECK9-NEXT: store ptr [[TMP41]], ptr [[TMP49]], align 8 4829 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 4830 // CHECK9-NEXT: store ptr [[TMP41]], ptr [[TMP50]], align 8 4831 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 4832 // CHECK9-NEXT: store ptr null, ptr [[TMP51]], align 8 4833 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 4834 // CHECK9-NEXT: store ptr [[TMP42]], ptr [[TMP52]], align 8 4835 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 4836 // CHECK9-NEXT: store ptr [[TMP42]], ptr [[TMP53]], align 8 4837 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 3 4838 // CHECK9-NEXT: store ptr null, ptr [[TMP54]], align 8 4839 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4840 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4841 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, ptr [[N]], align 4 4842 // CHECK9-NEXT: store i32 [[TMP57]], ptr [[DOTCAPTURE_EXPR_8]], align 4 4843 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_8]], align 4 4844 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP58]], 0 4845 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 4846 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 4847 // CHECK9-NEXT: store i32 [[SUB12]], ptr [[DOTCAPTURE_EXPR_9]], align 4 4848 // CHECK9-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 4849 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP59]], 1 4850 // CHECK9-NEXT: [[TMP60:%.*]] = zext i32 [[ADD13]] to i64 4851 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 0 4852 // CHECK9-NEXT: store i32 3, ptr [[TMP61]], align 4 4853 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 1 4854 // CHECK9-NEXT: store i32 4, ptr [[TMP62]], align 4 4855 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 2 4856 // CHECK9-NEXT: store ptr [[TMP55]], ptr [[TMP63]], align 8 4857 // CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 3 4858 // CHECK9-NEXT: store ptr [[TMP56]], ptr [[TMP64]], align 8 4859 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 4 4860 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP65]], align 8 4861 // CHECK9-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 5 4862 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP66]], align 8 4863 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 6 4864 // CHECK9-NEXT: store ptr null, ptr [[TMP67]], align 8 4865 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 7 4866 // CHECK9-NEXT: store ptr null, ptr [[TMP68]], align 8 4867 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 8 4868 // CHECK9-NEXT: store i64 [[TMP60]], ptr [[TMP69]], align 8 4869 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 9 4870 // CHECK9-NEXT: store i64 0, ptr [[TMP70]], align 8 4871 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 10 4872 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP71]], align 4 4873 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 11 4874 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP72]], align 4 4875 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 12 4876 // CHECK9-NEXT: store i32 0, ptr [[TMP73]], align 4 4877 // CHECK9-NEXT: [[TMP74:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.region_id, ptr [[KERNEL_ARGS14]]) 4878 // CHECK9-NEXT: [[TMP75:%.*]] = icmp ne i32 [[TMP74]], 0 4879 // CHECK9-NEXT: br i1 [[TMP75]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 4880 // CHECK9: omp_offload.failed15: 4881 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407(i64 [[TMP39]], ptr [[TMP40]], ptr [[TMP41]], ptr [[TMP42]]) #[[ATTR2]] 4882 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT16]] 4883 // CHECK9: omp_offload.cont16: 4884 // CHECK9-NEXT: [[TMP76:%.*]] = load i32, ptr [[CH]], align 4 4885 // CHECK9-NEXT: store i32 [[TMP76]], ptr [[CH_CASTED]], align 4 4886 // CHECK9-NEXT: [[TMP77:%.*]] = load i64, ptr [[CH_CASTED]], align 8 4887 // CHECK9-NEXT: [[TMP78:%.*]] = load i32, ptr [[N]], align 4 4888 // CHECK9-NEXT: store i32 [[TMP78]], ptr [[N_CASTED17]], align 4 4889 // CHECK9-NEXT: [[TMP79:%.*]] = load i64, ptr [[N_CASTED17]], align 8 4890 // CHECK9-NEXT: [[TMP80:%.*]] = load ptr, ptr [[A]], align 8 4891 // CHECK9-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 8 4892 // CHECK9-NEXT: [[TMP82:%.*]] = load ptr, ptr [[C]], align 8 4893 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 4894 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP83]], align 8 4895 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 4896 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP84]], align 8 4897 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 0 4898 // CHECK9-NEXT: store ptr null, ptr [[TMP85]], align 8 4899 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 4900 // CHECK9-NEXT: store i64 [[TMP79]], ptr [[TMP86]], align 8 4901 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 4902 // CHECK9-NEXT: store i64 [[TMP79]], ptr [[TMP87]], align 8 4903 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 1 4904 // CHECK9-NEXT: store ptr null, ptr [[TMP88]], align 8 4905 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 4906 // CHECK9-NEXT: store ptr [[TMP80]], ptr [[TMP89]], align 8 4907 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 4908 // CHECK9-NEXT: store ptr [[TMP80]], ptr [[TMP90]], align 8 4909 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 2 4910 // CHECK9-NEXT: store ptr null, ptr [[TMP91]], align 8 4911 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 4912 // CHECK9-NEXT: store ptr [[TMP81]], ptr [[TMP92]], align 8 4913 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 4914 // CHECK9-NEXT: store ptr [[TMP81]], ptr [[TMP93]], align 8 4915 // CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 3 4916 // CHECK9-NEXT: store ptr null, ptr [[TMP94]], align 8 4917 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 4 4918 // CHECK9-NEXT: store ptr [[TMP82]], ptr [[TMP95]], align 8 4919 // CHECK9-NEXT: [[TMP96:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 4 4920 // CHECK9-NEXT: store ptr [[TMP82]], ptr [[TMP96]], align 8 4921 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 4 4922 // CHECK9-NEXT: store ptr null, ptr [[TMP97]], align 8 4923 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 4924 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 4925 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, ptr [[N]], align 4 4926 // CHECK9-NEXT: store i32 [[TMP100]], ptr [[DOTCAPTURE_EXPR_22]], align 4 4927 // CHECK9-NEXT: [[TMP101:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 4928 // CHECK9-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP101]], 0 4929 // CHECK9-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 4930 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[DIV25]], 1 4931 // CHECK9-NEXT: store i32 [[SUB26]], ptr [[DOTCAPTURE_EXPR_23]], align 4 4932 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_23]], align 4 4933 // CHECK9-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP102]], 1 4934 // CHECK9-NEXT: [[TMP103:%.*]] = zext i32 [[ADD27]] to i64 4935 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 4936 // CHECK9-NEXT: store i32 3, ptr [[TMP104]], align 4 4937 // CHECK9-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 4938 // CHECK9-NEXT: store i32 5, ptr [[TMP105]], align 4 4939 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 4940 // CHECK9-NEXT: store ptr [[TMP98]], ptr [[TMP106]], align 8 4941 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 4942 // CHECK9-NEXT: store ptr [[TMP99]], ptr [[TMP107]], align 8 4943 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 4944 // CHECK9-NEXT: store ptr @.offload_sizes.3, ptr [[TMP108]], align 8 4945 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 4946 // CHECK9-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP109]], align 8 4947 // CHECK9-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 4948 // CHECK9-NEXT: store ptr null, ptr [[TMP110]], align 8 4949 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 4950 // CHECK9-NEXT: store ptr null, ptr [[TMP111]], align 8 4951 // CHECK9-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 4952 // CHECK9-NEXT: store i64 [[TMP103]], ptr [[TMP112]], align 8 4953 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 4954 // CHECK9-NEXT: store i64 0, ptr [[TMP113]], align 8 4955 // CHECK9-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 4956 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP114]], align 4 4957 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 4958 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4 4959 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 4960 // CHECK9-NEXT: store i32 0, ptr [[TMP116]], align 4 4961 // CHECK9-NEXT: [[TMP117:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.region_id, ptr [[KERNEL_ARGS28]]) 4962 // CHECK9-NEXT: [[TMP118:%.*]] = icmp ne i32 [[TMP117]], 0 4963 // CHECK9-NEXT: br i1 [[TMP118]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 4964 // CHECK9: omp_offload.failed29: 4965 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446(i64 [[TMP77]], i64 [[TMP79]], ptr [[TMP80]], ptr [[TMP81]], ptr [[TMP82]]) #[[ATTR2]] 4966 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT30]] 4967 // CHECK9: omp_offload.cont30: 4968 // CHECK9-NEXT: [[TMP119:%.*]] = load i32, ptr [[N]], align 4 4969 // CHECK9-NEXT: store i32 [[TMP119]], ptr [[N_CASTED31]], align 4 4970 // CHECK9-NEXT: [[TMP120:%.*]] = load i64, ptr [[N_CASTED31]], align 8 4971 // CHECK9-NEXT: [[TMP121:%.*]] = load ptr, ptr [[A]], align 8 4972 // CHECK9-NEXT: [[TMP122:%.*]] = load ptr, ptr [[B]], align 8 4973 // CHECK9-NEXT: [[TMP123:%.*]] = load ptr, ptr [[C]], align 8 4974 // CHECK9-NEXT: [[TMP124:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 4975 // CHECK9-NEXT: store i64 [[TMP120]], ptr [[TMP124]], align 8 4976 // CHECK9-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 4977 // CHECK9-NEXT: store i64 [[TMP120]], ptr [[TMP125]], align 8 4978 // CHECK9-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 0 4979 // CHECK9-NEXT: store ptr null, ptr [[TMP126]], align 8 4980 // CHECK9-NEXT: [[TMP127:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 4981 // CHECK9-NEXT: store ptr [[TMP121]], ptr [[TMP127]], align 8 4982 // CHECK9-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 4983 // CHECK9-NEXT: store ptr [[TMP121]], ptr [[TMP128]], align 8 4984 // CHECK9-NEXT: [[TMP129:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 1 4985 // CHECK9-NEXT: store ptr null, ptr [[TMP129]], align 8 4986 // CHECK9-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 4987 // CHECK9-NEXT: store ptr [[TMP122]], ptr [[TMP130]], align 8 4988 // CHECK9-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 4989 // CHECK9-NEXT: store ptr [[TMP122]], ptr [[TMP131]], align 8 4990 // CHECK9-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 2 4991 // CHECK9-NEXT: store ptr null, ptr [[TMP132]], align 8 4992 // CHECK9-NEXT: [[TMP133:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 3 4993 // CHECK9-NEXT: store ptr [[TMP123]], ptr [[TMP133]], align 8 4994 // CHECK9-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 3 4995 // CHECK9-NEXT: store ptr [[TMP123]], ptr [[TMP134]], align 8 4996 // CHECK9-NEXT: [[TMP135:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 3 4997 // CHECK9-NEXT: store ptr null, ptr [[TMP135]], align 8 4998 // CHECK9-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 4999 // CHECK9-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 5000 // CHECK9-NEXT: [[TMP138:%.*]] = load i32, ptr [[N]], align 4 5001 // CHECK9-NEXT: store i32 [[TMP138]], ptr [[DOTCAPTURE_EXPR_36]], align 4 5002 // CHECK9-NEXT: [[TMP139:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_36]], align 4 5003 // CHECK9-NEXT: [[SUB38:%.*]] = sub nsw i32 [[TMP139]], 0 5004 // CHECK9-NEXT: [[DIV39:%.*]] = sdiv i32 [[SUB38]], 1 5005 // CHECK9-NEXT: [[SUB40:%.*]] = sub nsw i32 [[DIV39]], 1 5006 // CHECK9-NEXT: store i32 [[SUB40]], ptr [[DOTCAPTURE_EXPR_37]], align 4 5007 // CHECK9-NEXT: [[TMP140:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_37]], align 4 5008 // CHECK9-NEXT: [[ADD41:%.*]] = add nsw i32 [[TMP140]], 1 5009 // CHECK9-NEXT: [[TMP141:%.*]] = zext i32 [[ADD41]] to i64 5010 // CHECK9-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 0 5011 // CHECK9-NEXT: store i32 3, ptr [[TMP142]], align 4 5012 // CHECK9-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 1 5013 // CHECK9-NEXT: store i32 4, ptr [[TMP143]], align 4 5014 // CHECK9-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 2 5015 // CHECK9-NEXT: store ptr [[TMP136]], ptr [[TMP144]], align 8 5016 // CHECK9-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 3 5017 // CHECK9-NEXT: store ptr [[TMP137]], ptr [[TMP145]], align 8 5018 // CHECK9-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 4 5019 // CHECK9-NEXT: store ptr @.offload_sizes.5, ptr [[TMP146]], align 8 5020 // CHECK9-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 5 5021 // CHECK9-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP147]], align 8 5022 // CHECK9-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 6 5023 // CHECK9-NEXT: store ptr null, ptr [[TMP148]], align 8 5024 // CHECK9-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 7 5025 // CHECK9-NEXT: store ptr null, ptr [[TMP149]], align 8 5026 // CHECK9-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 8 5027 // CHECK9-NEXT: store i64 [[TMP141]], ptr [[TMP150]], align 8 5028 // CHECK9-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 9 5029 // CHECK9-NEXT: store i64 0, ptr [[TMP151]], align 8 5030 // CHECK9-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 10 5031 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP152]], align 4 5032 // CHECK9-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 11 5033 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 4 5034 // CHECK9-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 12 5035 // CHECK9-NEXT: store i32 0, ptr [[TMP154]], align 4 5036 // CHECK9-NEXT: [[TMP155:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.region_id, ptr [[KERNEL_ARGS42]]) 5037 // CHECK9-NEXT: [[TMP156:%.*]] = icmp ne i32 [[TMP155]], 0 5038 // CHECK9-NEXT: br i1 [[TMP156]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 5039 // CHECK9: omp_offload.failed43: 5040 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477(i64 [[TMP120]], ptr [[TMP121]], ptr [[TMP122]], ptr [[TMP123]]) #[[ATTR2]] 5041 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT44]] 5042 // CHECK9: omp_offload.cont44: 5043 // CHECK9-NEXT: [[TMP157:%.*]] = load i32, ptr [[CH]], align 4 5044 // CHECK9-NEXT: store i32 [[TMP157]], ptr [[CH_CASTED45]], align 4 5045 // CHECK9-NEXT: [[TMP158:%.*]] = load i64, ptr [[CH_CASTED45]], align 8 5046 // CHECK9-NEXT: [[TMP159:%.*]] = load i32, ptr [[N]], align 4 5047 // CHECK9-NEXT: store i32 [[TMP159]], ptr [[N_CASTED46]], align 4 5048 // CHECK9-NEXT: [[TMP160:%.*]] = load i64, ptr [[N_CASTED46]], align 8 5049 // CHECK9-NEXT: [[TMP161:%.*]] = load ptr, ptr [[A]], align 8 5050 // CHECK9-NEXT: [[TMP162:%.*]] = load ptr, ptr [[B]], align 8 5051 // CHECK9-NEXT: [[TMP163:%.*]] = load ptr, ptr [[C]], align 8 5052 // CHECK9-NEXT: [[TMP164:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 5053 // CHECK9-NEXT: store i64 [[TMP158]], ptr [[TMP164]], align 8 5054 // CHECK9-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 5055 // CHECK9-NEXT: store i64 [[TMP158]], ptr [[TMP165]], align 8 5056 // CHECK9-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 0 5057 // CHECK9-NEXT: store ptr null, ptr [[TMP166]], align 8 5058 // CHECK9-NEXT: [[TMP167:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 5059 // CHECK9-NEXT: store i64 [[TMP160]], ptr [[TMP167]], align 8 5060 // CHECK9-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 5061 // CHECK9-NEXT: store i64 [[TMP160]], ptr [[TMP168]], align 8 5062 // CHECK9-NEXT: [[TMP169:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 1 5063 // CHECK9-NEXT: store ptr null, ptr [[TMP169]], align 8 5064 // CHECK9-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 5065 // CHECK9-NEXT: store ptr [[TMP161]], ptr [[TMP170]], align 8 5066 // CHECK9-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 5067 // CHECK9-NEXT: store ptr [[TMP161]], ptr [[TMP171]], align 8 5068 // CHECK9-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 2 5069 // CHECK9-NEXT: store ptr null, ptr [[TMP172]], align 8 5070 // CHECK9-NEXT: [[TMP173:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 5071 // CHECK9-NEXT: store ptr [[TMP162]], ptr [[TMP173]], align 8 5072 // CHECK9-NEXT: [[TMP174:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 5073 // CHECK9-NEXT: store ptr [[TMP162]], ptr [[TMP174]], align 8 5074 // CHECK9-NEXT: [[TMP175:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 3 5075 // CHECK9-NEXT: store ptr null, ptr [[TMP175]], align 8 5076 // CHECK9-NEXT: [[TMP176:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 4 5077 // CHECK9-NEXT: store ptr [[TMP163]], ptr [[TMP176]], align 8 5078 // CHECK9-NEXT: [[TMP177:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 4 5079 // CHECK9-NEXT: store ptr [[TMP163]], ptr [[TMP177]], align 8 5080 // CHECK9-NEXT: [[TMP178:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 4 5081 // CHECK9-NEXT: store ptr null, ptr [[TMP178]], align 8 5082 // CHECK9-NEXT: [[TMP179:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 5083 // CHECK9-NEXT: [[TMP180:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 5084 // CHECK9-NEXT: [[TMP181:%.*]] = load i32, ptr [[N]], align 4 5085 // CHECK9-NEXT: store i32 [[TMP181]], ptr [[DOTCAPTURE_EXPR_51]], align 4 5086 // CHECK9-NEXT: [[TMP182:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_51]], align 4 5087 // CHECK9-NEXT: [[SUB53:%.*]] = sub nsw i32 [[TMP182]], 0 5088 // CHECK9-NEXT: [[DIV54:%.*]] = sdiv i32 [[SUB53]], 1 5089 // CHECK9-NEXT: [[SUB55:%.*]] = sub nsw i32 [[DIV54]], 1 5090 // CHECK9-NEXT: store i32 [[SUB55]], ptr [[DOTCAPTURE_EXPR_52]], align 4 5091 // CHECK9-NEXT: [[TMP183:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_52]], align 4 5092 // CHECK9-NEXT: [[ADD56:%.*]] = add nsw i32 [[TMP183]], 1 5093 // CHECK9-NEXT: [[TMP184:%.*]] = zext i32 [[ADD56]] to i64 5094 // CHECK9-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 0 5095 // CHECK9-NEXT: store i32 3, ptr [[TMP185]], align 4 5096 // CHECK9-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 1 5097 // CHECK9-NEXT: store i32 5, ptr [[TMP186]], align 4 5098 // CHECK9-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 2 5099 // CHECK9-NEXT: store ptr [[TMP179]], ptr [[TMP187]], align 8 5100 // CHECK9-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 3 5101 // CHECK9-NEXT: store ptr [[TMP180]], ptr [[TMP188]], align 8 5102 // CHECK9-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 4 5103 // CHECK9-NEXT: store ptr @.offload_sizes.7, ptr [[TMP189]], align 8 5104 // CHECK9-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 5 5105 // CHECK9-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP190]], align 8 5106 // CHECK9-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 6 5107 // CHECK9-NEXT: store ptr null, ptr [[TMP191]], align 8 5108 // CHECK9-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 7 5109 // CHECK9-NEXT: store ptr null, ptr [[TMP192]], align 8 5110 // CHECK9-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 8 5111 // CHECK9-NEXT: store i64 [[TMP184]], ptr [[TMP193]], align 8 5112 // CHECK9-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 9 5113 // CHECK9-NEXT: store i64 0, ptr [[TMP194]], align 8 5114 // CHECK9-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 10 5115 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4 5116 // CHECK9-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 11 5117 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4 5118 // CHECK9-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 12 5119 // CHECK9-NEXT: store i32 0, ptr [[TMP197]], align 4 5120 // CHECK9-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.region_id, ptr [[KERNEL_ARGS57]]) 5121 // CHECK9-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0 5122 // CHECK9-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 5123 // CHECK9: omp_offload.failed58: 5124 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505(i64 [[TMP158]], i64 [[TMP160]], ptr [[TMP161]], ptr [[TMP162]], ptr [[TMP163]]) #[[ATTR2]] 5125 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT59]] 5126 // CHECK9: omp_offload.cont59: 5127 // CHECK9-NEXT: [[TMP200:%.*]] = load i32, ptr [[N]], align 4 5128 // CHECK9-NEXT: store i32 [[TMP200]], ptr [[N_CASTED60]], align 4 5129 // CHECK9-NEXT: [[TMP201:%.*]] = load i64, ptr [[N_CASTED60]], align 8 5130 // CHECK9-NEXT: [[TMP202:%.*]] = load ptr, ptr [[A]], align 8 5131 // CHECK9-NEXT: [[TMP203:%.*]] = load ptr, ptr [[B]], align 8 5132 // CHECK9-NEXT: [[TMP204:%.*]] = load ptr, ptr [[C]], align 8 5133 // CHECK9-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 5134 // CHECK9-NEXT: store i64 [[TMP201]], ptr [[TMP205]], align 8 5135 // CHECK9-NEXT: [[TMP206:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 5136 // CHECK9-NEXT: store i64 [[TMP201]], ptr [[TMP206]], align 8 5137 // CHECK9-NEXT: [[TMP207:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 0 5138 // CHECK9-NEXT: store ptr null, ptr [[TMP207]], align 8 5139 // CHECK9-NEXT: [[TMP208:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 1 5140 // CHECK9-NEXT: store ptr [[TMP202]], ptr [[TMP208]], align 8 5141 // CHECK9-NEXT: [[TMP209:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 1 5142 // CHECK9-NEXT: store ptr [[TMP202]], ptr [[TMP209]], align 8 5143 // CHECK9-NEXT: [[TMP210:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 1 5144 // CHECK9-NEXT: store ptr null, ptr [[TMP210]], align 8 5145 // CHECK9-NEXT: [[TMP211:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 2 5146 // CHECK9-NEXT: store ptr [[TMP203]], ptr [[TMP211]], align 8 5147 // CHECK9-NEXT: [[TMP212:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 2 5148 // CHECK9-NEXT: store ptr [[TMP203]], ptr [[TMP212]], align 8 5149 // CHECK9-NEXT: [[TMP213:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 2 5150 // CHECK9-NEXT: store ptr null, ptr [[TMP213]], align 8 5151 // CHECK9-NEXT: [[TMP214:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 3 5152 // CHECK9-NEXT: store ptr [[TMP204]], ptr [[TMP214]], align 8 5153 // CHECK9-NEXT: [[TMP215:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 3 5154 // CHECK9-NEXT: store ptr [[TMP204]], ptr [[TMP215]], align 8 5155 // CHECK9-NEXT: [[TMP216:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 3 5156 // CHECK9-NEXT: store ptr null, ptr [[TMP216]], align 8 5157 // CHECK9-NEXT: [[TMP217:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 5158 // CHECK9-NEXT: [[TMP218:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 5159 // CHECK9-NEXT: [[TMP219:%.*]] = load i32, ptr [[N]], align 4 5160 // CHECK9-NEXT: store i32 [[TMP219]], ptr [[DOTCAPTURE_EXPR_65]], align 4 5161 // CHECK9-NEXT: [[TMP220:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_65]], align 4 5162 // CHECK9-NEXT: [[SUB67:%.*]] = sub nsw i32 [[TMP220]], 0 5163 // CHECK9-NEXT: [[DIV68:%.*]] = sdiv i32 [[SUB67]], 1 5164 // CHECK9-NEXT: [[SUB69:%.*]] = sub nsw i32 [[DIV68]], 1 5165 // CHECK9-NEXT: store i32 [[SUB69]], ptr [[DOTCAPTURE_EXPR_66]], align 4 5166 // CHECK9-NEXT: [[TMP221:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_66]], align 4 5167 // CHECK9-NEXT: [[ADD70:%.*]] = add nsw i32 [[TMP221]], 1 5168 // CHECK9-NEXT: [[TMP222:%.*]] = zext i32 [[ADD70]] to i64 5169 // CHECK9-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 0 5170 // CHECK9-NEXT: store i32 3, ptr [[TMP223]], align 4 5171 // CHECK9-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 1 5172 // CHECK9-NEXT: store i32 4, ptr [[TMP224]], align 4 5173 // CHECK9-NEXT: [[TMP225:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 2 5174 // CHECK9-NEXT: store ptr [[TMP217]], ptr [[TMP225]], align 8 5175 // CHECK9-NEXT: [[TMP226:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 3 5176 // CHECK9-NEXT: store ptr [[TMP218]], ptr [[TMP226]], align 8 5177 // CHECK9-NEXT: [[TMP227:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 4 5178 // CHECK9-NEXT: store ptr @.offload_sizes.9, ptr [[TMP227]], align 8 5179 // CHECK9-NEXT: [[TMP228:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 5 5180 // CHECK9-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP228]], align 8 5181 // CHECK9-NEXT: [[TMP229:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 6 5182 // CHECK9-NEXT: store ptr null, ptr [[TMP229]], align 8 5183 // CHECK9-NEXT: [[TMP230:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 7 5184 // CHECK9-NEXT: store ptr null, ptr [[TMP230]], align 8 5185 // CHECK9-NEXT: [[TMP231:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 8 5186 // CHECK9-NEXT: store i64 [[TMP222]], ptr [[TMP231]], align 8 5187 // CHECK9-NEXT: [[TMP232:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 9 5188 // CHECK9-NEXT: store i64 0, ptr [[TMP232]], align 8 5189 // CHECK9-NEXT: [[TMP233:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 10 5190 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP233]], align 4 5191 // CHECK9-NEXT: [[TMP234:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 11 5192 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP234]], align 4 5193 // CHECK9-NEXT: [[TMP235:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 12 5194 // CHECK9-NEXT: store i32 0, ptr [[TMP235]], align 4 5195 // CHECK9-NEXT: [[TMP236:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.region_id, ptr [[KERNEL_ARGS71]]) 5196 // CHECK9-NEXT: [[TMP237:%.*]] = icmp ne i32 [[TMP236]], 0 5197 // CHECK9-NEXT: br i1 [[TMP237]], label [[OMP_OFFLOAD_FAILED72:%.*]], label [[OMP_OFFLOAD_CONT73:%.*]] 5198 // CHECK9: omp_offload.failed72: 5199 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535(i64 [[TMP201]], ptr [[TMP202]], ptr [[TMP203]], ptr [[TMP204]]) #[[ATTR2]] 5200 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT73]] 5201 // CHECK9: omp_offload.cont73: 5202 // CHECK9-NEXT: [[TMP238:%.*]] = load i32, ptr [[CH]], align 4 5203 // CHECK9-NEXT: store i32 [[TMP238]], ptr [[CH_CASTED74]], align 4 5204 // CHECK9-NEXT: [[TMP239:%.*]] = load i64, ptr [[CH_CASTED74]], align 8 5205 // CHECK9-NEXT: [[TMP240:%.*]] = load i32, ptr [[N]], align 4 5206 // CHECK9-NEXT: store i32 [[TMP240]], ptr [[N_CASTED75]], align 4 5207 // CHECK9-NEXT: [[TMP241:%.*]] = load i64, ptr [[N_CASTED75]], align 8 5208 // CHECK9-NEXT: [[TMP242:%.*]] = load ptr, ptr [[A]], align 8 5209 // CHECK9-NEXT: [[TMP243:%.*]] = load ptr, ptr [[B]], align 8 5210 // CHECK9-NEXT: [[TMP244:%.*]] = load ptr, ptr [[C]], align 8 5211 // CHECK9-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 5212 // CHECK9-NEXT: store i64 [[TMP239]], ptr [[TMP245]], align 8 5213 // CHECK9-NEXT: [[TMP246:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 5214 // CHECK9-NEXT: store i64 [[TMP239]], ptr [[TMP246]], align 8 5215 // CHECK9-NEXT: [[TMP247:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 0 5216 // CHECK9-NEXT: store ptr null, ptr [[TMP247]], align 8 5217 // CHECK9-NEXT: [[TMP248:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 1 5218 // CHECK9-NEXT: store i64 [[TMP241]], ptr [[TMP248]], align 8 5219 // CHECK9-NEXT: [[TMP249:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 1 5220 // CHECK9-NEXT: store i64 [[TMP241]], ptr [[TMP249]], align 8 5221 // CHECK9-NEXT: [[TMP250:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 1 5222 // CHECK9-NEXT: store ptr null, ptr [[TMP250]], align 8 5223 // CHECK9-NEXT: [[TMP251:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 2 5224 // CHECK9-NEXT: store ptr [[TMP242]], ptr [[TMP251]], align 8 5225 // CHECK9-NEXT: [[TMP252:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 2 5226 // CHECK9-NEXT: store ptr [[TMP242]], ptr [[TMP252]], align 8 5227 // CHECK9-NEXT: [[TMP253:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 2 5228 // CHECK9-NEXT: store ptr null, ptr [[TMP253]], align 8 5229 // CHECK9-NEXT: [[TMP254:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 3 5230 // CHECK9-NEXT: store ptr [[TMP243]], ptr [[TMP254]], align 8 5231 // CHECK9-NEXT: [[TMP255:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 3 5232 // CHECK9-NEXT: store ptr [[TMP243]], ptr [[TMP255]], align 8 5233 // CHECK9-NEXT: [[TMP256:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 3 5234 // CHECK9-NEXT: store ptr null, ptr [[TMP256]], align 8 5235 // CHECK9-NEXT: [[TMP257:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 4 5236 // CHECK9-NEXT: store ptr [[TMP244]], ptr [[TMP257]], align 8 5237 // CHECK9-NEXT: [[TMP258:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 4 5238 // CHECK9-NEXT: store ptr [[TMP244]], ptr [[TMP258]], align 8 5239 // CHECK9-NEXT: [[TMP259:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 4 5240 // CHECK9-NEXT: store ptr null, ptr [[TMP259]], align 8 5241 // CHECK9-NEXT: [[TMP260:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 5242 // CHECK9-NEXT: [[TMP261:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 5243 // CHECK9-NEXT: [[TMP262:%.*]] = load i32, ptr [[N]], align 4 5244 // CHECK9-NEXT: store i32 [[TMP262]], ptr [[DOTCAPTURE_EXPR_80]], align 4 5245 // CHECK9-NEXT: [[TMP263:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_80]], align 4 5246 // CHECK9-NEXT: [[SUB82:%.*]] = sub nsw i32 [[TMP263]], 0 5247 // CHECK9-NEXT: [[DIV83:%.*]] = sdiv i32 [[SUB82]], 1 5248 // CHECK9-NEXT: [[SUB84:%.*]] = sub nsw i32 [[DIV83]], 1 5249 // CHECK9-NEXT: store i32 [[SUB84]], ptr [[DOTCAPTURE_EXPR_81]], align 4 5250 // CHECK9-NEXT: [[TMP264:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_81]], align 4 5251 // CHECK9-NEXT: [[ADD85:%.*]] = add nsw i32 [[TMP264]], 1 5252 // CHECK9-NEXT: [[TMP265:%.*]] = zext i32 [[ADD85]] to i64 5253 // CHECK9-NEXT: [[TMP266:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 0 5254 // CHECK9-NEXT: store i32 3, ptr [[TMP266]], align 4 5255 // CHECK9-NEXT: [[TMP267:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 1 5256 // CHECK9-NEXT: store i32 5, ptr [[TMP267]], align 4 5257 // CHECK9-NEXT: [[TMP268:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 2 5258 // CHECK9-NEXT: store ptr [[TMP260]], ptr [[TMP268]], align 8 5259 // CHECK9-NEXT: [[TMP269:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 3 5260 // CHECK9-NEXT: store ptr [[TMP261]], ptr [[TMP269]], align 8 5261 // CHECK9-NEXT: [[TMP270:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 4 5262 // CHECK9-NEXT: store ptr @.offload_sizes.11, ptr [[TMP270]], align 8 5263 // CHECK9-NEXT: [[TMP271:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 5 5264 // CHECK9-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP271]], align 8 5265 // CHECK9-NEXT: [[TMP272:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 6 5266 // CHECK9-NEXT: store ptr null, ptr [[TMP272]], align 8 5267 // CHECK9-NEXT: [[TMP273:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 7 5268 // CHECK9-NEXT: store ptr null, ptr [[TMP273]], align 8 5269 // CHECK9-NEXT: [[TMP274:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 8 5270 // CHECK9-NEXT: store i64 [[TMP265]], ptr [[TMP274]], align 8 5271 // CHECK9-NEXT: [[TMP275:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 9 5272 // CHECK9-NEXT: store i64 0, ptr [[TMP275]], align 8 5273 // CHECK9-NEXT: [[TMP276:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 10 5274 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP276]], align 4 5275 // CHECK9-NEXT: [[TMP277:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 11 5276 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP277]], align 4 5277 // CHECK9-NEXT: [[TMP278:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 12 5278 // CHECK9-NEXT: store i32 0, ptr [[TMP278]], align 4 5279 // CHECK9-NEXT: [[TMP279:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.region_id, ptr [[KERNEL_ARGS86]]) 5280 // CHECK9-NEXT: [[TMP280:%.*]] = icmp ne i32 [[TMP279]], 0 5281 // CHECK9-NEXT: br i1 [[TMP280]], label [[OMP_OFFLOAD_FAILED87:%.*]], label [[OMP_OFFLOAD_CONT88:%.*]] 5282 // CHECK9: omp_offload.failed87: 5283 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561(i64 [[TMP239]], i64 [[TMP241]], ptr [[TMP242]], ptr [[TMP243]], ptr [[TMP244]]) #[[ATTR2]] 5284 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT88]] 5285 // CHECK9: omp_offload.cont88: 5286 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 5287 // CHECK9-NEXT: ret i32 [[CALL]] 5288 // 5289 // 5290 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368 5291 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { 5292 // CHECK9-NEXT: entry: 5293 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5294 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5295 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5296 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5297 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5298 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5299 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5300 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5301 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 5302 // CHECK9-NEXT: ret void 5303 // 5304 // 5305 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined 5306 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5307 // CHECK9-NEXT: entry: 5308 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5309 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5310 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 5311 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5312 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5313 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5314 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5315 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5316 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5317 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5318 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5319 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5320 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5321 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5322 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5323 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 5324 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5325 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5326 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 5327 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5328 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5329 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5330 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 5331 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5332 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 5333 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 5334 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 5335 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 5336 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5337 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5338 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5339 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5340 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5341 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 5342 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5343 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5344 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5345 // CHECK9: omp.precond.then: 5346 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5347 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5348 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 5349 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5350 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5351 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5352 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 5353 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5354 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5355 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5356 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5357 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5358 // CHECK9: cond.true: 5359 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5360 // CHECK9-NEXT: br label [[COND_END:%.*]] 5361 // CHECK9: cond.false: 5362 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5363 // CHECK9-NEXT: br label [[COND_END]] 5364 // CHECK9: cond.end: 5365 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5366 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5367 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5368 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 5369 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5370 // CHECK9: omp.inner.for.cond: 5371 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]] 5372 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 5373 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5374 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5375 // CHECK9: omp.inner.for.body: 5376 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP17]] 5377 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5378 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP17]] 5379 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5380 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP17]] 5381 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5382 // CHECK9: omp.inner.for.inc: 5383 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 5384 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP17]] 5385 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5386 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]] 5387 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 5388 // CHECK9: omp.inner.for.end: 5389 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5390 // CHECK9: omp.loop.exit: 5391 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5392 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 5393 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 5394 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5395 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5396 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5397 // CHECK9: .omp.final.then: 5398 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5399 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 5400 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 5401 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 5402 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 5403 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 5404 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5405 // CHECK9: .omp.final.done: 5406 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5407 // CHECK9: omp.precond.end: 5408 // CHECK9-NEXT: ret void 5409 // 5410 // 5411 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined.omp_outlined 5412 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5413 // CHECK9-NEXT: entry: 5414 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5415 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5416 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5417 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5418 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 5419 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5420 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5421 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5422 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5423 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5424 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5425 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5426 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5427 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5428 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5429 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5430 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5431 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5432 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5433 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5434 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5435 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5436 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 5437 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5438 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5439 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5440 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 5441 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5442 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 5443 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 5444 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 5445 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 5446 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5447 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5448 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5449 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5450 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5451 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 5452 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5453 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5454 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5455 // CHECK9: omp.precond.then: 5456 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5457 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5458 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 5459 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5460 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 5461 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5462 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 5463 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5464 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 5465 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5466 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5467 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5468 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 5469 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5470 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5471 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5472 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5473 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5474 // CHECK9: cond.true: 5475 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5476 // CHECK9-NEXT: br label [[COND_END:%.*]] 5477 // CHECK9: cond.false: 5478 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5479 // CHECK9-NEXT: br label [[COND_END]] 5480 // CHECK9: cond.end: 5481 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5482 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5483 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5484 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 5485 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5486 // CHECK9: omp.inner.for.cond: 5487 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 5488 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]] 5489 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5490 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5491 // CHECK9: omp.inner.for.body: 5492 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 5493 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5494 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5495 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP21]] 5496 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP21]] 5497 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP21]] 5498 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5499 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 5500 // CHECK9-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP21]] 5501 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP21]] 5502 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP21]] 5503 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 5504 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 5505 // CHECK9-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP21]] 5506 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 5507 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP21]] 5508 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP21]] 5509 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 5510 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 5511 // CHECK9-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP21]] 5512 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5513 // CHECK9: omp.body.continue: 5514 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5515 // CHECK9: omp.inner.for.inc: 5516 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 5517 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 5518 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]] 5519 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 5520 // CHECK9: omp.inner.for.end: 5521 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5522 // CHECK9: omp.loop.exit: 5523 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5524 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 5525 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 5526 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5527 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 5528 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5529 // CHECK9: .omp.final.then: 5530 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5531 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 5532 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 5533 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 5534 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 5535 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 5536 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5537 // CHECK9: .omp.final.done: 5538 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5539 // CHECK9: omp.precond.end: 5540 // CHECK9-NEXT: ret void 5541 // 5542 // 5543 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407 5544 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 5545 // CHECK9-NEXT: entry: 5546 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5547 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5548 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5549 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5550 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5551 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5552 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5553 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5554 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 5555 // CHECK9-NEXT: ret void 5556 // 5557 // 5558 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined 5559 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5560 // CHECK9-NEXT: entry: 5561 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5562 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5563 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 5564 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5565 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5566 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5567 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5568 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5569 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5570 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5571 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5572 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5573 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5574 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5575 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5576 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 5577 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5578 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5579 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 5580 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5581 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5582 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5583 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 5584 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5585 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 5586 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 5587 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 5588 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 5589 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5590 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5591 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5592 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5593 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5594 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 5595 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5596 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5597 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5598 // CHECK9: omp.precond.then: 5599 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5600 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5601 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 5602 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5603 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5604 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5605 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 5606 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5607 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5608 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5609 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 5610 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5611 // CHECK9: cond.true: 5612 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5613 // CHECK9-NEXT: br label [[COND_END:%.*]] 5614 // CHECK9: cond.false: 5615 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5616 // CHECK9-NEXT: br label [[COND_END]] 5617 // CHECK9: cond.end: 5618 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 5619 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5620 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5621 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 5622 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5623 // CHECK9: omp.inner.for.cond: 5624 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]] 5625 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 5626 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 5627 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5628 // CHECK9: omp.inner.for.body: 5629 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]] 5630 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 5631 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]] 5632 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5633 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP26]] 5634 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5635 // CHECK9: omp.inner.for.inc: 5636 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 5637 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]] 5638 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5639 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]] 5640 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] 5641 // CHECK9: omp.inner.for.end: 5642 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5643 // CHECK9: omp.loop.exit: 5644 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5645 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 5646 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 5647 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5648 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5649 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5650 // CHECK9: .omp.final.then: 5651 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5652 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 5653 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 5654 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 5655 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 5656 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 5657 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5658 // CHECK9: .omp.final.done: 5659 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5660 // CHECK9: omp.precond.end: 5661 // CHECK9-NEXT: ret void 5662 // 5663 // 5664 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined.omp_outlined 5665 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5666 // CHECK9-NEXT: entry: 5667 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5668 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5669 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5670 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5671 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 5672 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5673 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5674 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5675 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5676 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5677 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5678 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5679 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5680 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5681 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5682 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5683 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5684 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5685 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5686 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5687 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5688 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5689 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 5690 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5691 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5692 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5693 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 5694 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5695 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 5696 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 5697 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 5698 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 5699 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5700 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5701 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5702 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5703 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5704 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 5705 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5706 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5707 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5708 // CHECK9: omp.precond.then: 5709 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5710 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5711 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 5712 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5713 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 5714 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5715 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 5716 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 5717 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 5718 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5719 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5720 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5721 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 5722 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 5723 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5724 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5725 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5726 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5727 // CHECK9: cond.true: 5728 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5729 // CHECK9-NEXT: br label [[COND_END:%.*]] 5730 // CHECK9: cond.false: 5731 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 5732 // CHECK9-NEXT: br label [[COND_END]] 5733 // CHECK9: cond.end: 5734 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5735 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 5736 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 5737 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 5738 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5739 // CHECK9: omp.inner.for.cond: 5740 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]] 5741 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]] 5742 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5743 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5744 // CHECK9: omp.inner.for.body: 5745 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 5746 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5747 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5748 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP29]] 5749 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP29]] 5750 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP29]] 5751 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5752 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 5753 // CHECK9-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP29]] 5754 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP29]] 5755 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP29]] 5756 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 5757 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 5758 // CHECK9-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP29]] 5759 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 5760 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP29]] 5761 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP29]] 5762 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 5763 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 5764 // CHECK9-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP29]] 5765 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5766 // CHECK9: omp.body.continue: 5767 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5768 // CHECK9: omp.inner.for.inc: 5769 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 5770 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 5771 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]] 5772 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]] 5773 // CHECK9: omp.inner.for.end: 5774 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5775 // CHECK9: omp.loop.exit: 5776 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5777 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 5778 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 5779 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5780 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 5781 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5782 // CHECK9: .omp.final.then: 5783 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5784 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 5785 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 5786 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 5787 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 5788 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 5789 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5790 // CHECK9: .omp.final.done: 5791 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5792 // CHECK9: omp.precond.end: 5793 // CHECK9-NEXT: ret void 5794 // 5795 // 5796 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446 5797 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 5798 // CHECK9-NEXT: entry: 5799 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 5800 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5801 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5802 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5803 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5804 // CHECK9-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 5805 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 5806 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5807 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5808 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5809 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 5810 // CHECK9-NEXT: ret void 5811 // 5812 // 5813 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined 5814 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5815 // CHECK9-NEXT: entry: 5816 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5817 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5818 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 5819 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 5820 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5821 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5822 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5823 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5824 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5825 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5826 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5827 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5828 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5829 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5830 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5831 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5832 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 5833 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5834 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5835 // CHECK9-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 5836 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 5837 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5838 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5839 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5840 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 5841 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 5842 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5843 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 5844 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 5845 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4 5846 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 5847 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5848 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 5849 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5850 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5851 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5852 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 5853 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5854 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 5855 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5856 // CHECK9: omp.precond.then: 5857 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 5858 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5859 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_COMB_UB]], align 4 5860 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 5861 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 5862 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4 5863 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5864 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 5865 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 5866 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5867 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5868 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 5869 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5870 // CHECK9: cond.true: 5871 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5872 // CHECK9-NEXT: br label [[COND_END:%.*]] 5873 // CHECK9: cond.false: 5874 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 5875 // CHECK9-NEXT: br label [[COND_END]] 5876 // CHECK9: cond.end: 5877 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 5878 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 5879 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 5880 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 5881 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5882 // CHECK9: omp.inner.for.cond: 5883 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]] 5884 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP32]] 5885 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 5886 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 5887 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5888 // CHECK9: omp.inner.for.body: 5889 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]] 5890 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 5891 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 5892 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 5893 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]), !llvm.access.group [[ACC_GRP32]] 5894 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5895 // CHECK9: omp.inner.for.inc: 5896 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 5897 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]] 5898 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 5899 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 5900 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]] 5901 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]] 5902 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 5903 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]] 5904 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 5905 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]] 5906 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 5907 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 5908 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 5909 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP32]] 5910 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 5911 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 5912 // CHECK9: cond.true10: 5913 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP32]] 5914 // CHECK9-NEXT: br label [[COND_END12:%.*]] 5915 // CHECK9: cond.false11: 5916 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 5917 // CHECK9-NEXT: br label [[COND_END12]] 5918 // CHECK9: cond.end12: 5919 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 5920 // CHECK9-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]] 5921 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]] 5922 // CHECK9-NEXT: store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]] 5923 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]] 5924 // CHECK9: omp.inner.for.end: 5925 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5926 // CHECK9: omp.loop.exit: 5927 // CHECK9-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 5928 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 5929 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]]) 5930 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 5931 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 5932 // CHECK9-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5933 // CHECK9: .omp.final.then: 5934 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5935 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP38]], 0 5936 // CHECK9-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 5937 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1 5938 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]] 5939 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I3]], align 4 5940 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 5941 // CHECK9: .omp.final.done: 5942 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 5943 // CHECK9: omp.precond.end: 5944 // CHECK9-NEXT: ret void 5945 // 5946 // 5947 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined.omp_outlined 5948 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 5949 // CHECK9-NEXT: entry: 5950 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 5951 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 5952 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5953 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5954 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 5955 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 5956 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 5957 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 5958 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5959 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 5960 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5961 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5962 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 5963 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5964 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5965 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5966 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5967 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 5968 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 5969 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 5970 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5971 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5972 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 5973 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 5974 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 5975 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 5976 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 5977 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 5978 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 5979 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 5980 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 5981 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 5982 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5983 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 5984 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5985 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5986 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 5987 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 5988 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 5989 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 5990 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5991 // CHECK9: omp.precond.then: 5992 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 5993 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 5994 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 5995 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 5996 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 5997 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 5998 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 5999 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6000 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 6001 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6002 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6003 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6004 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 6005 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6006 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6007 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6008 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6009 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6010 // CHECK9: cond.true: 6011 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6012 // CHECK9-NEXT: br label [[COND_END:%.*]] 6013 // CHECK9: cond.false: 6014 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6015 // CHECK9-NEXT: br label [[COND_END]] 6016 // CHECK9: cond.end: 6017 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6018 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6019 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6020 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6021 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6022 // CHECK9: omp.inner.for.cond: 6023 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]] 6024 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]] 6025 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6026 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6027 // CHECK9: omp.inner.for.body: 6028 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 6029 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 6030 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6031 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP35]] 6032 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP35]] 6033 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP35]] 6034 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 6035 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 6036 // CHECK9-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP35]] 6037 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP35]] 6038 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP35]] 6039 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 6040 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 6041 // CHECK9-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP35]] 6042 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 6043 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP35]] 6044 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP35]] 6045 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 6046 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 6047 // CHECK9-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP35]] 6048 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6049 // CHECK9: omp.body.continue: 6050 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6051 // CHECK9: omp.inner.for.inc: 6052 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 6053 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 6054 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]] 6055 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]] 6056 // CHECK9: omp.inner.for.end: 6057 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6058 // CHECK9: omp.loop.exit: 6059 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6060 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 6061 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 6062 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6063 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 6064 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6065 // CHECK9: .omp.final.then: 6066 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6067 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 6068 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 6069 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 6070 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 6071 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 6072 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6073 // CHECK9: .omp.final.done: 6074 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6075 // CHECK9: omp.precond.end: 6076 // CHECK9-NEXT: ret void 6077 // 6078 // 6079 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477 6080 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 6081 // CHECK9-NEXT: entry: 6082 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6083 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6084 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6085 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6086 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6087 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6088 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6089 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6090 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 6091 // CHECK9-NEXT: ret void 6092 // 6093 // 6094 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined 6095 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6096 // CHECK9-NEXT: entry: 6097 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6098 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6099 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6100 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6101 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6102 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6103 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6104 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6105 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6106 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6107 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6108 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6109 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6110 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6111 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6112 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 6113 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6114 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6115 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6116 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6117 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6118 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6119 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6120 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6121 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6122 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6123 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 6124 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 6125 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6126 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6127 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6128 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6129 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6130 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6131 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6132 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6133 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6134 // CHECK9: omp.precond.then: 6135 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6136 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6137 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 6138 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6139 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6140 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6141 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 6142 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6143 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6144 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6145 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6146 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6147 // CHECK9: cond.true: 6148 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6149 // CHECK9-NEXT: br label [[COND_END:%.*]] 6150 // CHECK9: cond.false: 6151 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6152 // CHECK9-NEXT: br label [[COND_END]] 6153 // CHECK9: cond.end: 6154 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6155 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6156 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6157 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 6158 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6159 // CHECK9: omp.inner.for.cond: 6160 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]] 6161 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 6162 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6163 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6164 // CHECK9: omp.inner.for.body: 6165 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]] 6166 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 6167 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]] 6168 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 6169 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP38]] 6170 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6171 // CHECK9: omp.inner.for.inc: 6172 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 6173 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]] 6174 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 6175 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]] 6176 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]] 6177 // CHECK9: omp.inner.for.end: 6178 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6179 // CHECK9: omp.loop.exit: 6180 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6181 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 6182 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 6183 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6184 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 6185 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6186 // CHECK9: .omp.final.then: 6187 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6188 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 6189 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 6190 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 6191 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 6192 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 6193 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6194 // CHECK9: .omp.final.done: 6195 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6196 // CHECK9: omp.precond.end: 6197 // CHECK9-NEXT: ret void 6198 // 6199 // 6200 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined.omp_outlined 6201 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6202 // CHECK9-NEXT: entry: 6203 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6204 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6205 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6206 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6207 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6208 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6209 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6210 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6211 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6212 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6213 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6214 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6215 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6216 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6217 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6218 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6219 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6220 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 6221 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6222 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6223 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6224 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6225 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6226 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6227 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6228 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6229 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6230 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6231 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6232 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6233 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 6234 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 6235 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6236 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6237 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6238 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6239 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6240 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6241 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6242 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6243 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6244 // CHECK9: omp.precond.then: 6245 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6246 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6247 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 6248 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6249 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 6250 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6251 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 6252 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6253 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 6254 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6255 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6256 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6257 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 6258 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6259 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6260 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6261 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6262 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6263 // CHECK9: cond.true: 6264 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6265 // CHECK9-NEXT: br label [[COND_END:%.*]] 6266 // CHECK9: cond.false: 6267 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6268 // CHECK9-NEXT: br label [[COND_END]] 6269 // CHECK9: cond.end: 6270 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6271 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6272 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6273 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6274 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6275 // CHECK9: omp.inner.for.cond: 6276 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]] 6277 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]] 6278 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6279 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6280 // CHECK9: omp.inner.for.body: 6281 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 6282 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 6283 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6284 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 6285 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP41]] 6286 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 6287 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 6288 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i64 [[IDXPROM]] 6289 // CHECK9-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP41]] 6290 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP41]] 6291 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 6292 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 6293 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM7]] 6294 // CHECK9-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP41]] 6295 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP22]], [[TMP25]] 6296 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP41]] 6297 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP41]] 6298 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 6299 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM10]] 6300 // CHECK9-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP41]] 6301 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6302 // CHECK9: omp.body.continue: 6303 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6304 // CHECK9: omp.inner.for.inc: 6305 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 6306 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 6307 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]] 6308 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]] 6309 // CHECK9: omp.inner.for.end: 6310 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6311 // CHECK9: omp.loop.exit: 6312 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6313 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 6314 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 6315 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6316 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 6317 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6318 // CHECK9: .omp.final.then: 6319 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6320 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 6321 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 6322 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 6323 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 6324 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 6325 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6326 // CHECK9: .omp.final.done: 6327 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6328 // CHECK9: omp.precond.end: 6329 // CHECK9-NEXT: ret void 6330 // 6331 // 6332 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505 6333 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 6334 // CHECK9-NEXT: entry: 6335 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 6336 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6337 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6338 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6339 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6340 // CHECK9-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 6341 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6342 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6343 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6344 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6345 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 6346 // CHECK9-NEXT: ret void 6347 // 6348 // 6349 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined 6350 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6351 // CHECK9-NEXT: entry: 6352 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6353 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6354 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 6355 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6356 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6357 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6358 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6359 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6360 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6361 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6362 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6363 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6364 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6365 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6366 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6367 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6368 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6369 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 6370 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6371 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6372 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6373 // CHECK9-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 6374 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6375 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6376 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6377 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6378 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 6379 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6380 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6381 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6382 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6383 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 6384 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 6385 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 6386 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6387 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6388 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 6389 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6390 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6391 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 6392 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6393 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6394 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 6395 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6396 // CHECK9: omp.precond.then: 6397 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6398 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6399 // CHECK9-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 6400 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6401 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6402 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6403 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 6404 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6405 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6406 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6407 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6408 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6409 // CHECK9: cond.true: 6410 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6411 // CHECK9-NEXT: br label [[COND_END:%.*]] 6412 // CHECK9: cond.false: 6413 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6414 // CHECK9-NEXT: br label [[COND_END]] 6415 // CHECK9: cond.end: 6416 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6417 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6418 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6419 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6420 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6421 // CHECK9: omp.inner.for.cond: 6422 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]] 6423 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]] 6424 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6425 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6426 // CHECK9: omp.inner.for.body: 6427 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]] 6428 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 6429 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]] 6430 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 6431 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP44]] 6432 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP44]] 6433 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP44]] 6434 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP24]]), !llvm.access.group [[ACC_GRP44]] 6435 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6436 // CHECK9: omp.inner.for.inc: 6437 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 6438 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]] 6439 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 6440 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]] 6441 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]] 6442 // CHECK9: omp.inner.for.end: 6443 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6444 // CHECK9: omp.loop.exit: 6445 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6446 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 6447 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 6448 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6449 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 6450 // CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6451 // CHECK9: .omp.final.then: 6452 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6453 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP31]], 0 6454 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 6455 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 6456 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 6457 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 6458 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6459 // CHECK9: .omp.final.done: 6460 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6461 // CHECK9: omp.precond.end: 6462 // CHECK9-NEXT: ret void 6463 // 6464 // 6465 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined.omp_outlined 6466 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 6467 // CHECK9-NEXT: entry: 6468 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6469 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6470 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6471 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6472 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6473 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6474 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6475 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6476 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6477 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6478 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6479 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6480 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6481 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6482 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6483 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6484 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6485 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6486 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 6487 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6488 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6489 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6490 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6491 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6492 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6493 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6494 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6495 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 6496 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6497 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6498 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6499 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6500 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 6501 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6502 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6503 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6504 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6505 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6506 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 6507 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6508 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6509 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6510 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6511 // CHECK9: omp.precond.then: 6512 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6513 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6514 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 6515 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6516 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 6517 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6518 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 6519 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6520 // CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 6521 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6522 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6523 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 6524 // CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6525 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 6526 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 6527 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6528 // CHECK9: omp.dispatch.cond: 6529 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6530 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6531 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP14]] to i32 6532 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP13]], [[CONV6]] 6533 // CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6534 // CHECK9: cond.true: 6535 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6536 // CHECK9-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP15]] to i32 6537 // CHECK9-NEXT: br label [[COND_END:%.*]] 6538 // CHECK9: cond.false: 6539 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6540 // CHECK9-NEXT: br label [[COND_END]] 6541 // CHECK9: cond.end: 6542 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV8]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 6543 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 6544 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6545 // CHECK9-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 6546 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 6547 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6548 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 6549 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6550 // CHECK9: omp.dispatch.body: 6551 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6552 // CHECK9: omp.inner.for.cond: 6553 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]] 6554 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]] 6555 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 6556 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6557 // CHECK9: omp.inner.for.body: 6558 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 6559 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 6560 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6561 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP47]] 6562 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP47]] 6563 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP47]] 6564 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 6565 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i64 [[IDXPROM]] 6566 // CHECK9-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP47]] 6567 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP47]] 6568 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP47]] 6569 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP27]] to i64 6570 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM11]] 6571 // CHECK9-NEXT: [[TMP28:%.*]] = load double, ptr [[ARRAYIDX12]], align 8, !llvm.access.group [[ACC_GRP47]] 6572 // CHECK9-NEXT: [[ADD13:%.*]] = fadd double [[TMP25]], [[TMP28]] 6573 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP47]] 6574 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP47]] 6575 // CHECK9-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP30]] to i64 6576 // CHECK9-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds double, ptr [[TMP29]], i64 [[IDXPROM14]] 6577 // CHECK9-NEXT: store double [[ADD13]], ptr [[ARRAYIDX15]], align 8, !llvm.access.group [[ACC_GRP47]] 6578 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6579 // CHECK9: omp.body.continue: 6580 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6581 // CHECK9: omp.inner.for.inc: 6582 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 6583 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP31]], 1 6584 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]] 6585 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]] 6586 // CHECK9: omp.inner.for.end: 6587 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6588 // CHECK9: omp.dispatch.inc: 6589 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6590 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6591 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 6592 // CHECK9-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_LB]], align 4 6593 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6594 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 6595 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 6596 // CHECK9-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_UB]], align 4 6597 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 6598 // CHECK9: omp.dispatch.end: 6599 // CHECK9-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6600 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 6601 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP37]]) 6602 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6603 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 6604 // CHECK9-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6605 // CHECK9: .omp.final.then: 6606 // CHECK9-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6607 // CHECK9-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP40]], 0 6608 // CHECK9-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1 6609 // CHECK9-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1 6610 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]] 6611 // CHECK9-NEXT: store i32 [[ADD22]], ptr [[I5]], align 4 6612 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6613 // CHECK9: .omp.final.done: 6614 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6615 // CHECK9: omp.precond.end: 6616 // CHECK9-NEXT: ret void 6617 // 6618 // 6619 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535 6620 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 6621 // CHECK9-NEXT: entry: 6622 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6623 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6624 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6625 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6626 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6627 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6628 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6629 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6630 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 6631 // CHECK9-NEXT: ret void 6632 // 6633 // 6634 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined 6635 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6636 // CHECK9-NEXT: entry: 6637 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6638 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6639 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6640 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6641 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6642 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6643 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6644 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6645 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6646 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6647 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6648 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6649 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6650 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6651 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6652 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 6653 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6654 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6655 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6656 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6657 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6658 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6659 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6660 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6661 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6662 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6663 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 6664 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 6665 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6666 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6667 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6668 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6669 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6670 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6671 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6672 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6673 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6674 // CHECK9: omp.precond.then: 6675 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6676 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6677 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 6678 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6679 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6680 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6681 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 6682 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6683 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6684 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6685 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 6686 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6687 // CHECK9: cond.true: 6688 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6689 // CHECK9-NEXT: br label [[COND_END:%.*]] 6690 // CHECK9: cond.false: 6691 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6692 // CHECK9-NEXT: br label [[COND_END]] 6693 // CHECK9: cond.end: 6694 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 6695 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6696 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6697 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 6698 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6699 // CHECK9: omp.inner.for.cond: 6700 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]] 6701 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]] 6702 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 6703 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6704 // CHECK9: omp.inner.for.body: 6705 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]] 6706 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 6707 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]] 6708 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 6709 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP50]] 6710 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6711 // CHECK9: omp.inner.for.inc: 6712 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 6713 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]] 6714 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 6715 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]] 6716 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]] 6717 // CHECK9: omp.inner.for.end: 6718 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6719 // CHECK9: omp.loop.exit: 6720 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6721 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 6722 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 6723 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6724 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 6725 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6726 // CHECK9: .omp.final.then: 6727 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6728 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 6729 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 6730 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 6731 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 6732 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 6733 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6734 // CHECK9: .omp.final.done: 6735 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6736 // CHECK9: omp.precond.end: 6737 // CHECK9-NEXT: ret void 6738 // 6739 // 6740 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined.omp_outlined 6741 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6742 // CHECK9-NEXT: entry: 6743 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6744 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6745 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6746 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6747 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6748 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6749 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6750 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6751 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6752 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6753 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6754 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6755 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6756 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6757 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6758 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6759 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6760 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 6761 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6762 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6763 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6764 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6765 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6766 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6767 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6768 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6769 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6770 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6771 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6772 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6773 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 6774 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 6775 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6776 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 6777 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6778 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6779 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6780 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6781 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6782 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6783 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6784 // CHECK9: omp.precond.then: 6785 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 6786 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6787 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 6788 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 6789 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 6790 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 6791 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 6792 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 6793 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 6794 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6795 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6796 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6797 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 6798 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6799 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 6800 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 6801 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6802 // CHECK9: omp.dispatch.cond: 6803 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6804 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 6805 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 6806 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 6807 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6808 // CHECK9: omp.dispatch.body: 6809 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 6810 // CHECK9-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 6811 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6812 // CHECK9: omp.inner.for.cond: 6813 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]] 6814 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]] 6815 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 6816 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6817 // CHECK9: omp.inner.for.body: 6818 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 6819 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 6820 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6821 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 6822 // CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP53]] 6823 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 6824 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 6825 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP21]], i64 [[IDXPROM]] 6826 // CHECK9-NEXT: [[TMP23:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP53]] 6827 // CHECK9-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP53]] 6828 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 6829 // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 6830 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, ptr [[TMP24]], i64 [[IDXPROM6]] 6831 // CHECK9-NEXT: [[TMP26:%.*]] = load double, ptr [[ARRAYIDX7]], align 8, !llvm.access.group [[ACC_GRP53]] 6832 // CHECK9-NEXT: [[ADD8:%.*]] = fadd double [[TMP23]], [[TMP26]] 6833 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP53]] 6834 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP53]] 6835 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 6836 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, ptr [[TMP27]], i64 [[IDXPROM9]] 6837 // CHECK9-NEXT: store double [[ADD8]], ptr [[ARRAYIDX10]], align 8, !llvm.access.group [[ACC_GRP53]] 6838 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6839 // CHECK9: omp.body.continue: 6840 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6841 // CHECK9: omp.inner.for.inc: 6842 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 6843 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 6844 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]] 6845 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]] 6846 // CHECK9: omp.inner.for.end: 6847 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6848 // CHECK9: omp.dispatch.inc: 6849 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 6850 // CHECK9: omp.dispatch.end: 6851 // CHECK9-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6852 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 6853 // CHECK9-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP31]]) 6854 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6855 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 6856 // CHECK9-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6857 // CHECK9: .omp.final.then: 6858 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 6859 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP34]], 0 6860 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 6861 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1 6862 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 6863 // CHECK9-NEXT: store i32 [[ADD15]], ptr [[I4]], align 4 6864 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6865 // CHECK9: .omp.final.done: 6866 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 6867 // CHECK9: omp.precond.end: 6868 // CHECK9-NEXT: ret void 6869 // 6870 // 6871 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561 6872 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 6873 // CHECK9-NEXT: entry: 6874 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 6875 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 6876 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6877 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6878 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6879 // CHECK9-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 6880 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 6881 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6882 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6883 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6884 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 6885 // CHECK9-NEXT: ret void 6886 // 6887 // 6888 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined 6889 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 6890 // CHECK9-NEXT: entry: 6891 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 6892 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 6893 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 6894 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 6895 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 6896 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 6897 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 6898 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6899 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6900 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 6901 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6902 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 6903 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 6904 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6905 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6906 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6907 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6908 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 6909 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6910 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 6911 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 6912 // CHECK9-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 6913 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 6914 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 6915 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 6916 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 6917 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 6918 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 6919 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 6920 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 6921 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 6922 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 6923 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 6924 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 6925 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 6926 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6927 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 6928 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6929 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 6930 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 6931 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 6932 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6933 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 6934 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6935 // CHECK9: omp.precond.then: 6936 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 6937 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6938 // CHECK9-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 6939 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 6940 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 6941 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6942 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 6943 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 6944 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6945 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6946 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 6947 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6948 // CHECK9: cond.true: 6949 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 6950 // CHECK9-NEXT: br label [[COND_END:%.*]] 6951 // CHECK9: cond.false: 6952 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 6953 // CHECK9-NEXT: br label [[COND_END]] 6954 // CHECK9: cond.end: 6955 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 6956 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 6957 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 6958 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 6959 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6960 // CHECK9: omp.inner.for.cond: 6961 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]] 6962 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]] 6963 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 6964 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6965 // CHECK9: omp.inner.for.body: 6966 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]] 6967 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 6968 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]] 6969 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 6970 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP56]] 6971 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP56]] 6972 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP56]] 6973 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP24]]), !llvm.access.group [[ACC_GRP56]] 6974 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6975 // CHECK9: omp.inner.for.inc: 6976 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 6977 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]] 6978 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 6979 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]] 6980 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]] 6981 // CHECK9: omp.inner.for.end: 6982 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6983 // CHECK9: omp.loop.exit: 6984 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 6985 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 6986 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 6987 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 6988 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 6989 // CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6990 // CHECK9: .omp.final.then: 6991 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 6992 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP31]], 0 6993 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 6994 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 6995 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 6996 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 6997 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 6998 // CHECK9: .omp.final.done: 6999 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7000 // CHECK9: omp.precond.end: 7001 // CHECK9-NEXT: ret void 7002 // 7003 // 7004 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined.omp_outlined 7005 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 7006 // CHECK9-NEXT: entry: 7007 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7008 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7009 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7010 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7011 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 7012 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7013 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 7014 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 7015 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 7016 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7017 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7018 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7019 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7020 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7021 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7022 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7023 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7024 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7025 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 7026 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7027 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7028 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7029 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7030 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 7031 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7032 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 7033 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 7034 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 7035 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 7036 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7037 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 7038 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 7039 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 7040 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7041 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7042 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7043 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7044 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7045 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 7046 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 7047 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7048 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7049 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7050 // CHECK9: omp.precond.then: 7051 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7052 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 7053 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 7054 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7055 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 7056 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7057 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 7058 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7059 // CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 7060 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7061 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7062 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 7063 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7064 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7065 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7066 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 7067 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 7068 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7069 // CHECK9: omp.dispatch.cond: 7070 // CHECK9-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7071 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 7072 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP16]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 7073 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 7074 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7075 // CHECK9: omp.dispatch.body: 7076 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7077 // CHECK9-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 7078 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7079 // CHECK9: omp.inner.for.cond: 7080 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]] 7081 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]] 7082 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 7083 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7084 // CHECK9: omp.inner.for.body: 7085 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 7086 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 7087 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7088 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP59]] 7089 // CHECK9-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP59]] 7090 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP59]] 7091 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 7092 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP22]], i64 [[IDXPROM]] 7093 // CHECK9-NEXT: [[TMP24:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP59]] 7094 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP59]] 7095 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP59]] 7096 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP26]] to i64 7097 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP25]], i64 [[IDXPROM7]] 7098 // CHECK9-NEXT: [[TMP27:%.*]] = load double, ptr [[ARRAYIDX8]], align 8, !llvm.access.group [[ACC_GRP59]] 7099 // CHECK9-NEXT: [[ADD9:%.*]] = fadd double [[TMP24]], [[TMP27]] 7100 // CHECK9-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP59]] 7101 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP59]] 7102 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP29]] to i64 7103 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds double, ptr [[TMP28]], i64 [[IDXPROM10]] 7104 // CHECK9-NEXT: store double [[ADD9]], ptr [[ARRAYIDX11]], align 8, !llvm.access.group [[ACC_GRP59]] 7105 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7106 // CHECK9: omp.body.continue: 7107 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7108 // CHECK9: omp.inner.for.inc: 7109 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 7110 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP30]], 1 7111 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]] 7112 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]] 7113 // CHECK9: omp.inner.for.end: 7114 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7115 // CHECK9: omp.dispatch.inc: 7116 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 7117 // CHECK9: omp.dispatch.end: 7118 // CHECK9-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7119 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 7120 // CHECK9-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP32]]) 7121 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7122 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 7123 // CHECK9-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7124 // CHECK9: .omp.final.then: 7125 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7126 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP35]], 0 7127 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 7128 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 7129 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 7130 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I5]], align 4 7131 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 7132 // CHECK9: .omp.final.done: 7133 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7134 // CHECK9: omp.precond.end: 7135 // CHECK9-NEXT: ret void 7136 // 7137 // 7138 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 7139 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] comdat { 7140 // CHECK9-NEXT: entry: 7141 // CHECK9-NEXT: [[A:%.*]] = alloca ptr, align 8 7142 // CHECK9-NEXT: [[B:%.*]] = alloca ptr, align 8 7143 // CHECK9-NEXT: [[C:%.*]] = alloca ptr, align 8 7144 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 7145 // CHECK9-NEXT: [[CH:%.*]] = alloca i32, align 4 7146 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 7147 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 7148 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 7149 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 7150 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7151 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7152 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7153 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 7154 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 7155 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x ptr], align 8 7156 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x ptr], align 8 7157 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x ptr], align 8 7158 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 7159 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 7160 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 7161 // CHECK9-NEXT: [[KERNEL_ARGS14:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7162 // CHECK9-NEXT: [[CH_CASTED:%.*]] = alloca i64, align 8 7163 // CHECK9-NEXT: [[N_CASTED17:%.*]] = alloca i64, align 8 7164 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [5 x ptr], align 8 7165 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [5 x ptr], align 8 7166 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [5 x ptr], align 8 7167 // CHECK9-NEXT: [[_TMP21:%.*]] = alloca i32, align 4 7168 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 7169 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 7170 // CHECK9-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7171 // CHECK9-NEXT: [[N_CASTED31:%.*]] = alloca i64, align 8 7172 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [4 x ptr], align 8 7173 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [4 x ptr], align 8 7174 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [4 x ptr], align 8 7175 // CHECK9-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 7176 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_36:%.*]] = alloca i32, align 4 7177 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 7178 // CHECK9-NEXT: [[KERNEL_ARGS42:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7179 // CHECK9-NEXT: [[CH_CASTED45:%.*]] = alloca i64, align 8 7180 // CHECK9-NEXT: [[N_CASTED46:%.*]] = alloca i64, align 8 7181 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [5 x ptr], align 8 7182 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [5 x ptr], align 8 7183 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [5 x ptr], align 8 7184 // CHECK9-NEXT: [[_TMP50:%.*]] = alloca i32, align 4 7185 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_51:%.*]] = alloca i32, align 4 7186 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 7187 // CHECK9-NEXT: [[KERNEL_ARGS57:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7188 // CHECK9-NEXT: [[N_CASTED60:%.*]] = alloca i64, align 8 7189 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS61:%.*]] = alloca [4 x ptr], align 8 7190 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS62:%.*]] = alloca [4 x ptr], align 8 7191 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS63:%.*]] = alloca [4 x ptr], align 8 7192 // CHECK9-NEXT: [[_TMP64:%.*]] = alloca i32, align 4 7193 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_65:%.*]] = alloca i32, align 4 7194 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_66:%.*]] = alloca i32, align 4 7195 // CHECK9-NEXT: [[KERNEL_ARGS71:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7196 // CHECK9-NEXT: [[CH_CASTED74:%.*]] = alloca i64, align 8 7197 // CHECK9-NEXT: [[N_CASTED75:%.*]] = alloca i64, align 8 7198 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS76:%.*]] = alloca [5 x ptr], align 8 7199 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS77:%.*]] = alloca [5 x ptr], align 8 7200 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS78:%.*]] = alloca [5 x ptr], align 8 7201 // CHECK9-NEXT: [[_TMP79:%.*]] = alloca i32, align 4 7202 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_80:%.*]] = alloca i32, align 4 7203 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_81:%.*]] = alloca i32, align 4 7204 // CHECK9-NEXT: [[KERNEL_ARGS86:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 7205 // CHECK9-NEXT: store i32 10000, ptr [[N]], align 4 7206 // CHECK9-NEXT: store i32 100, ptr [[CH]], align 4 7207 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 7208 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[N_CASTED]], align 4 7209 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[N_CASTED]], align 8 7210 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8 7211 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B]], align 8 7212 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C]], align 8 7213 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7214 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP5]], align 8 7215 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7216 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP6]], align 8 7217 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7218 // CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 8 7219 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7220 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 8 7221 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7222 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP9]], align 8 7223 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 7224 // CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8 7225 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7226 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP11]], align 8 7227 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7228 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP12]], align 8 7229 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 7230 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8 7231 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 7232 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP14]], align 8 7233 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 7234 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8 7235 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 7236 // CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8 7237 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7238 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7239 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 7240 // CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 7241 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7242 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 7243 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7244 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7245 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7246 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7247 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 7248 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 7249 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 7250 // CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4 7251 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 7252 // CHECK9-NEXT: store i32 4, ptr [[TMP24]], align 4 7253 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 7254 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP25]], align 8 7255 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 7256 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP26]], align 8 7257 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 7258 // CHECK9-NEXT: store ptr @.offload_sizes.13, ptr [[TMP27]], align 8 7259 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 7260 // CHECK9-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP28]], align 8 7261 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 7262 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8 7263 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 7264 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8 7265 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 7266 // CHECK9-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 7267 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 7268 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8 7269 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 7270 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 7271 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 7272 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 7273 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 7274 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4 7275 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, ptr [[KERNEL_ARGS]]) 7276 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 7277 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7278 // CHECK9: omp_offload.failed: 7279 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i64 [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]) #[[ATTR2]] 7280 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 7281 // CHECK9: omp_offload.cont: 7282 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 7283 // CHECK9-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 7284 // CHECK9-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8 7285 // CHECK9-NEXT: [[TMP40:%.*]] = load ptr, ptr [[A]], align 8 7286 // CHECK9-NEXT: [[TMP41:%.*]] = load ptr, ptr [[B]], align 8 7287 // CHECK9-NEXT: [[TMP42:%.*]] = load ptr, ptr [[C]], align 8 7288 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 7289 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP43]], align 8 7290 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 7291 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP44]], align 8 7292 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0 7293 // CHECK9-NEXT: store ptr null, ptr [[TMP45]], align 8 7294 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 7295 // CHECK9-NEXT: store ptr [[TMP40]], ptr [[TMP46]], align 8 7296 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 7297 // CHECK9-NEXT: store ptr [[TMP40]], ptr [[TMP47]], align 8 7298 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1 7299 // CHECK9-NEXT: store ptr null, ptr [[TMP48]], align 8 7300 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 7301 // CHECK9-NEXT: store ptr [[TMP41]], ptr [[TMP49]], align 8 7302 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 7303 // CHECK9-NEXT: store ptr [[TMP41]], ptr [[TMP50]], align 8 7304 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2 7305 // CHECK9-NEXT: store ptr null, ptr [[TMP51]], align 8 7306 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 7307 // CHECK9-NEXT: store ptr [[TMP42]], ptr [[TMP52]], align 8 7308 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 7309 // CHECK9-NEXT: store ptr [[TMP42]], ptr [[TMP53]], align 8 7310 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 3 7311 // CHECK9-NEXT: store ptr null, ptr [[TMP54]], align 8 7312 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 7313 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 7314 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, ptr [[N]], align 4 7315 // CHECK9-NEXT: store i32 [[TMP57]], ptr [[DOTCAPTURE_EXPR_8]], align 4 7316 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_8]], align 4 7317 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP58]], 0 7318 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 7319 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 7320 // CHECK9-NEXT: store i32 [[SUB12]], ptr [[DOTCAPTURE_EXPR_9]], align 4 7321 // CHECK9-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 7322 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP59]], 1 7323 // CHECK9-NEXT: [[TMP60:%.*]] = zext i32 [[ADD13]] to i64 7324 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 0 7325 // CHECK9-NEXT: store i32 3, ptr [[TMP61]], align 4 7326 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 1 7327 // CHECK9-NEXT: store i32 4, ptr [[TMP62]], align 4 7328 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 2 7329 // CHECK9-NEXT: store ptr [[TMP55]], ptr [[TMP63]], align 8 7330 // CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 3 7331 // CHECK9-NEXT: store ptr [[TMP56]], ptr [[TMP64]], align 8 7332 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 4 7333 // CHECK9-NEXT: store ptr @.offload_sizes.15, ptr [[TMP65]], align 8 7334 // CHECK9-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 5 7335 // CHECK9-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP66]], align 8 7336 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 6 7337 // CHECK9-NEXT: store ptr null, ptr [[TMP67]], align 8 7338 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 7 7339 // CHECK9-NEXT: store ptr null, ptr [[TMP68]], align 8 7340 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 8 7341 // CHECK9-NEXT: store i64 [[TMP60]], ptr [[TMP69]], align 8 7342 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 9 7343 // CHECK9-NEXT: store i64 0, ptr [[TMP70]], align 8 7344 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 10 7345 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP71]], align 4 7346 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 11 7347 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP72]], align 4 7348 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 12 7349 // CHECK9-NEXT: store i32 0, ptr [[TMP73]], align 4 7350 // CHECK9-NEXT: [[TMP74:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.region_id, ptr [[KERNEL_ARGS14]]) 7351 // CHECK9-NEXT: [[TMP75:%.*]] = icmp ne i32 [[TMP74]], 0 7352 // CHECK9-NEXT: br i1 [[TMP75]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 7353 // CHECK9: omp_offload.failed15: 7354 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(i64 [[TMP39]], ptr [[TMP40]], ptr [[TMP41]], ptr [[TMP42]]) #[[ATTR2]] 7355 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT16]] 7356 // CHECK9: omp_offload.cont16: 7357 // CHECK9-NEXT: [[TMP76:%.*]] = load i32, ptr [[CH]], align 4 7358 // CHECK9-NEXT: store i32 [[TMP76]], ptr [[CH_CASTED]], align 4 7359 // CHECK9-NEXT: [[TMP77:%.*]] = load i64, ptr [[CH_CASTED]], align 8 7360 // CHECK9-NEXT: [[TMP78:%.*]] = load i32, ptr [[N]], align 4 7361 // CHECK9-NEXT: store i32 [[TMP78]], ptr [[N_CASTED17]], align 4 7362 // CHECK9-NEXT: [[TMP79:%.*]] = load i64, ptr [[N_CASTED17]], align 8 7363 // CHECK9-NEXT: [[TMP80:%.*]] = load ptr, ptr [[A]], align 8 7364 // CHECK9-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 8 7365 // CHECK9-NEXT: [[TMP82:%.*]] = load ptr, ptr [[C]], align 8 7366 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 7367 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP83]], align 8 7368 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 7369 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP84]], align 8 7370 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 0 7371 // CHECK9-NEXT: store ptr null, ptr [[TMP85]], align 8 7372 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 7373 // CHECK9-NEXT: store i64 [[TMP79]], ptr [[TMP86]], align 8 7374 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 7375 // CHECK9-NEXT: store i64 [[TMP79]], ptr [[TMP87]], align 8 7376 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 1 7377 // CHECK9-NEXT: store ptr null, ptr [[TMP88]], align 8 7378 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 7379 // CHECK9-NEXT: store ptr [[TMP80]], ptr [[TMP89]], align 8 7380 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 7381 // CHECK9-NEXT: store ptr [[TMP80]], ptr [[TMP90]], align 8 7382 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 2 7383 // CHECK9-NEXT: store ptr null, ptr [[TMP91]], align 8 7384 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 7385 // CHECK9-NEXT: store ptr [[TMP81]], ptr [[TMP92]], align 8 7386 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 7387 // CHECK9-NEXT: store ptr [[TMP81]], ptr [[TMP93]], align 8 7388 // CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 3 7389 // CHECK9-NEXT: store ptr null, ptr [[TMP94]], align 8 7390 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 4 7391 // CHECK9-NEXT: store ptr [[TMP82]], ptr [[TMP95]], align 8 7392 // CHECK9-NEXT: [[TMP96:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 4 7393 // CHECK9-NEXT: store ptr [[TMP82]], ptr [[TMP96]], align 8 7394 // CHECK9-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i64 0, i64 4 7395 // CHECK9-NEXT: store ptr null, ptr [[TMP97]], align 8 7396 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 7397 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 7398 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, ptr [[N]], align 4 7399 // CHECK9-NEXT: store i32 [[TMP100]], ptr [[DOTCAPTURE_EXPR_22]], align 4 7400 // CHECK9-NEXT: [[TMP101:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 7401 // CHECK9-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP101]], 0 7402 // CHECK9-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 7403 // CHECK9-NEXT: [[SUB26:%.*]] = sub nsw i32 [[DIV25]], 1 7404 // CHECK9-NEXT: store i32 [[SUB26]], ptr [[DOTCAPTURE_EXPR_23]], align 4 7405 // CHECK9-NEXT: [[TMP102:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_23]], align 4 7406 // CHECK9-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP102]], 1 7407 // CHECK9-NEXT: [[TMP103:%.*]] = zext i32 [[ADD27]] to i64 7408 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 7409 // CHECK9-NEXT: store i32 3, ptr [[TMP104]], align 4 7410 // CHECK9-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 7411 // CHECK9-NEXT: store i32 5, ptr [[TMP105]], align 4 7412 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 7413 // CHECK9-NEXT: store ptr [[TMP98]], ptr [[TMP106]], align 8 7414 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 7415 // CHECK9-NEXT: store ptr [[TMP99]], ptr [[TMP107]], align 8 7416 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 7417 // CHECK9-NEXT: store ptr @.offload_sizes.17, ptr [[TMP108]], align 8 7418 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 7419 // CHECK9-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP109]], align 8 7420 // CHECK9-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 7421 // CHECK9-NEXT: store ptr null, ptr [[TMP110]], align 8 7422 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 7423 // CHECK9-NEXT: store ptr null, ptr [[TMP111]], align 8 7424 // CHECK9-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 7425 // CHECK9-NEXT: store i64 [[TMP103]], ptr [[TMP112]], align 8 7426 // CHECK9-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 7427 // CHECK9-NEXT: store i64 0, ptr [[TMP113]], align 8 7428 // CHECK9-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 7429 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP114]], align 4 7430 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 7431 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4 7432 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 7433 // CHECK9-NEXT: store i32 0, ptr [[TMP116]], align 4 7434 // CHECK9-NEXT: [[TMP117:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.region_id, ptr [[KERNEL_ARGS28]]) 7435 // CHECK9-NEXT: [[TMP118:%.*]] = icmp ne i32 [[TMP117]], 0 7436 // CHECK9-NEXT: br i1 [[TMP118]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 7437 // CHECK9: omp_offload.failed29: 7438 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58(i64 [[TMP77]], i64 [[TMP79]], ptr [[TMP80]], ptr [[TMP81]], ptr [[TMP82]]) #[[ATTR2]] 7439 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT30]] 7440 // CHECK9: omp_offload.cont30: 7441 // CHECK9-NEXT: [[TMP119:%.*]] = load i32, ptr [[N]], align 4 7442 // CHECK9-NEXT: store i32 [[TMP119]], ptr [[N_CASTED31]], align 4 7443 // CHECK9-NEXT: [[TMP120:%.*]] = load i64, ptr [[N_CASTED31]], align 8 7444 // CHECK9-NEXT: [[TMP121:%.*]] = load ptr, ptr [[A]], align 8 7445 // CHECK9-NEXT: [[TMP122:%.*]] = load ptr, ptr [[B]], align 8 7446 // CHECK9-NEXT: [[TMP123:%.*]] = load ptr, ptr [[C]], align 8 7447 // CHECK9-NEXT: [[TMP124:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 7448 // CHECK9-NEXT: store i64 [[TMP120]], ptr [[TMP124]], align 8 7449 // CHECK9-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 7450 // CHECK9-NEXT: store i64 [[TMP120]], ptr [[TMP125]], align 8 7451 // CHECK9-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 0 7452 // CHECK9-NEXT: store ptr null, ptr [[TMP126]], align 8 7453 // CHECK9-NEXT: [[TMP127:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 7454 // CHECK9-NEXT: store ptr [[TMP121]], ptr [[TMP127]], align 8 7455 // CHECK9-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 7456 // CHECK9-NEXT: store ptr [[TMP121]], ptr [[TMP128]], align 8 7457 // CHECK9-NEXT: [[TMP129:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 1 7458 // CHECK9-NEXT: store ptr null, ptr [[TMP129]], align 8 7459 // CHECK9-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 7460 // CHECK9-NEXT: store ptr [[TMP122]], ptr [[TMP130]], align 8 7461 // CHECK9-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 7462 // CHECK9-NEXT: store ptr [[TMP122]], ptr [[TMP131]], align 8 7463 // CHECK9-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 2 7464 // CHECK9-NEXT: store ptr null, ptr [[TMP132]], align 8 7465 // CHECK9-NEXT: [[TMP133:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 3 7466 // CHECK9-NEXT: store ptr [[TMP123]], ptr [[TMP133]], align 8 7467 // CHECK9-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 3 7468 // CHECK9-NEXT: store ptr [[TMP123]], ptr [[TMP134]], align 8 7469 // CHECK9-NEXT: [[TMP135:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i64 0, i64 3 7470 // CHECK9-NEXT: store ptr null, ptr [[TMP135]], align 8 7471 // CHECK9-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 7472 // CHECK9-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 7473 // CHECK9-NEXT: [[TMP138:%.*]] = load i32, ptr [[N]], align 4 7474 // CHECK9-NEXT: store i32 [[TMP138]], ptr [[DOTCAPTURE_EXPR_36]], align 4 7475 // CHECK9-NEXT: [[TMP139:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_36]], align 4 7476 // CHECK9-NEXT: [[SUB38:%.*]] = sub nsw i32 [[TMP139]], 0 7477 // CHECK9-NEXT: [[DIV39:%.*]] = sdiv i32 [[SUB38]], 1 7478 // CHECK9-NEXT: [[SUB40:%.*]] = sub nsw i32 [[DIV39]], 1 7479 // CHECK9-NEXT: store i32 [[SUB40]], ptr [[DOTCAPTURE_EXPR_37]], align 4 7480 // CHECK9-NEXT: [[TMP140:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_37]], align 4 7481 // CHECK9-NEXT: [[ADD41:%.*]] = add nsw i32 [[TMP140]], 1 7482 // CHECK9-NEXT: [[TMP141:%.*]] = zext i32 [[ADD41]] to i64 7483 // CHECK9-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 0 7484 // CHECK9-NEXT: store i32 3, ptr [[TMP142]], align 4 7485 // CHECK9-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 1 7486 // CHECK9-NEXT: store i32 4, ptr [[TMP143]], align 4 7487 // CHECK9-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 2 7488 // CHECK9-NEXT: store ptr [[TMP136]], ptr [[TMP144]], align 8 7489 // CHECK9-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 3 7490 // CHECK9-NEXT: store ptr [[TMP137]], ptr [[TMP145]], align 8 7491 // CHECK9-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 4 7492 // CHECK9-NEXT: store ptr @.offload_sizes.19, ptr [[TMP146]], align 8 7493 // CHECK9-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 5 7494 // CHECK9-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP147]], align 8 7495 // CHECK9-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 6 7496 // CHECK9-NEXT: store ptr null, ptr [[TMP148]], align 8 7497 // CHECK9-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 7 7498 // CHECK9-NEXT: store ptr null, ptr [[TMP149]], align 8 7499 // CHECK9-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 8 7500 // CHECK9-NEXT: store i64 [[TMP141]], ptr [[TMP150]], align 8 7501 // CHECK9-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 9 7502 // CHECK9-NEXT: store i64 0, ptr [[TMP151]], align 8 7503 // CHECK9-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 10 7504 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP152]], align 4 7505 // CHECK9-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 11 7506 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 4 7507 // CHECK9-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 12 7508 // CHECK9-NEXT: store i32 0, ptr [[TMP154]], align 4 7509 // CHECK9-NEXT: [[TMP155:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.region_id, ptr [[KERNEL_ARGS42]]) 7510 // CHECK9-NEXT: [[TMP156:%.*]] = icmp ne i32 [[TMP155]], 0 7511 // CHECK9-NEXT: br i1 [[TMP156]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 7512 // CHECK9: omp_offload.failed43: 7513 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66(i64 [[TMP120]], ptr [[TMP121]], ptr [[TMP122]], ptr [[TMP123]]) #[[ATTR2]] 7514 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT44]] 7515 // CHECK9: omp_offload.cont44: 7516 // CHECK9-NEXT: [[TMP157:%.*]] = load i32, ptr [[CH]], align 4 7517 // CHECK9-NEXT: store i32 [[TMP157]], ptr [[CH_CASTED45]], align 4 7518 // CHECK9-NEXT: [[TMP158:%.*]] = load i64, ptr [[CH_CASTED45]], align 8 7519 // CHECK9-NEXT: [[TMP159:%.*]] = load i32, ptr [[N]], align 4 7520 // CHECK9-NEXT: store i32 [[TMP159]], ptr [[N_CASTED46]], align 4 7521 // CHECK9-NEXT: [[TMP160:%.*]] = load i64, ptr [[N_CASTED46]], align 8 7522 // CHECK9-NEXT: [[TMP161:%.*]] = load ptr, ptr [[A]], align 8 7523 // CHECK9-NEXT: [[TMP162:%.*]] = load ptr, ptr [[B]], align 8 7524 // CHECK9-NEXT: [[TMP163:%.*]] = load ptr, ptr [[C]], align 8 7525 // CHECK9-NEXT: [[TMP164:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 7526 // CHECK9-NEXT: store i64 [[TMP158]], ptr [[TMP164]], align 8 7527 // CHECK9-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 7528 // CHECK9-NEXT: store i64 [[TMP158]], ptr [[TMP165]], align 8 7529 // CHECK9-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 0 7530 // CHECK9-NEXT: store ptr null, ptr [[TMP166]], align 8 7531 // CHECK9-NEXT: [[TMP167:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 7532 // CHECK9-NEXT: store i64 [[TMP160]], ptr [[TMP167]], align 8 7533 // CHECK9-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 7534 // CHECK9-NEXT: store i64 [[TMP160]], ptr [[TMP168]], align 8 7535 // CHECK9-NEXT: [[TMP169:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 1 7536 // CHECK9-NEXT: store ptr null, ptr [[TMP169]], align 8 7537 // CHECK9-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 7538 // CHECK9-NEXT: store ptr [[TMP161]], ptr [[TMP170]], align 8 7539 // CHECK9-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 7540 // CHECK9-NEXT: store ptr [[TMP161]], ptr [[TMP171]], align 8 7541 // CHECK9-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 2 7542 // CHECK9-NEXT: store ptr null, ptr [[TMP172]], align 8 7543 // CHECK9-NEXT: [[TMP173:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 7544 // CHECK9-NEXT: store ptr [[TMP162]], ptr [[TMP173]], align 8 7545 // CHECK9-NEXT: [[TMP174:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 7546 // CHECK9-NEXT: store ptr [[TMP162]], ptr [[TMP174]], align 8 7547 // CHECK9-NEXT: [[TMP175:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 3 7548 // CHECK9-NEXT: store ptr null, ptr [[TMP175]], align 8 7549 // CHECK9-NEXT: [[TMP176:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 4 7550 // CHECK9-NEXT: store ptr [[TMP163]], ptr [[TMP176]], align 8 7551 // CHECK9-NEXT: [[TMP177:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 4 7552 // CHECK9-NEXT: store ptr [[TMP163]], ptr [[TMP177]], align 8 7553 // CHECK9-NEXT: [[TMP178:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i64 0, i64 4 7554 // CHECK9-NEXT: store ptr null, ptr [[TMP178]], align 8 7555 // CHECK9-NEXT: [[TMP179:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 7556 // CHECK9-NEXT: [[TMP180:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 7557 // CHECK9-NEXT: [[TMP181:%.*]] = load i32, ptr [[N]], align 4 7558 // CHECK9-NEXT: store i32 [[TMP181]], ptr [[DOTCAPTURE_EXPR_51]], align 4 7559 // CHECK9-NEXT: [[TMP182:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_51]], align 4 7560 // CHECK9-NEXT: [[SUB53:%.*]] = sub nsw i32 [[TMP182]], 0 7561 // CHECK9-NEXT: [[DIV54:%.*]] = sdiv i32 [[SUB53]], 1 7562 // CHECK9-NEXT: [[SUB55:%.*]] = sub nsw i32 [[DIV54]], 1 7563 // CHECK9-NEXT: store i32 [[SUB55]], ptr [[DOTCAPTURE_EXPR_52]], align 4 7564 // CHECK9-NEXT: [[TMP183:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_52]], align 4 7565 // CHECK9-NEXT: [[ADD56:%.*]] = add nsw i32 [[TMP183]], 1 7566 // CHECK9-NEXT: [[TMP184:%.*]] = zext i32 [[ADD56]] to i64 7567 // CHECK9-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 0 7568 // CHECK9-NEXT: store i32 3, ptr [[TMP185]], align 4 7569 // CHECK9-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 1 7570 // CHECK9-NEXT: store i32 5, ptr [[TMP186]], align 4 7571 // CHECK9-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 2 7572 // CHECK9-NEXT: store ptr [[TMP179]], ptr [[TMP187]], align 8 7573 // CHECK9-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 3 7574 // CHECK9-NEXT: store ptr [[TMP180]], ptr [[TMP188]], align 8 7575 // CHECK9-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 4 7576 // CHECK9-NEXT: store ptr @.offload_sizes.21, ptr [[TMP189]], align 8 7577 // CHECK9-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 5 7578 // CHECK9-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP190]], align 8 7579 // CHECK9-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 6 7580 // CHECK9-NEXT: store ptr null, ptr [[TMP191]], align 8 7581 // CHECK9-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 7 7582 // CHECK9-NEXT: store ptr null, ptr [[TMP192]], align 8 7583 // CHECK9-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 8 7584 // CHECK9-NEXT: store i64 [[TMP184]], ptr [[TMP193]], align 8 7585 // CHECK9-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 9 7586 // CHECK9-NEXT: store i64 0, ptr [[TMP194]], align 8 7587 // CHECK9-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 10 7588 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4 7589 // CHECK9-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 11 7590 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4 7591 // CHECK9-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 12 7592 // CHECK9-NEXT: store i32 0, ptr [[TMP197]], align 4 7593 // CHECK9-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.region_id, ptr [[KERNEL_ARGS57]]) 7594 // CHECK9-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0 7595 // CHECK9-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 7596 // CHECK9: omp_offload.failed58: 7597 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74(i64 [[TMP158]], i64 [[TMP160]], ptr [[TMP161]], ptr [[TMP162]], ptr [[TMP163]]) #[[ATTR2]] 7598 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT59]] 7599 // CHECK9: omp_offload.cont59: 7600 // CHECK9-NEXT: [[TMP200:%.*]] = load i32, ptr [[N]], align 4 7601 // CHECK9-NEXT: store i32 [[TMP200]], ptr [[N_CASTED60]], align 4 7602 // CHECK9-NEXT: [[TMP201:%.*]] = load i64, ptr [[N_CASTED60]], align 8 7603 // CHECK9-NEXT: [[TMP202:%.*]] = load ptr, ptr [[A]], align 8 7604 // CHECK9-NEXT: [[TMP203:%.*]] = load ptr, ptr [[B]], align 8 7605 // CHECK9-NEXT: [[TMP204:%.*]] = load ptr, ptr [[C]], align 8 7606 // CHECK9-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 7607 // CHECK9-NEXT: store i64 [[TMP201]], ptr [[TMP205]], align 8 7608 // CHECK9-NEXT: [[TMP206:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 7609 // CHECK9-NEXT: store i64 [[TMP201]], ptr [[TMP206]], align 8 7610 // CHECK9-NEXT: [[TMP207:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 0 7611 // CHECK9-NEXT: store ptr null, ptr [[TMP207]], align 8 7612 // CHECK9-NEXT: [[TMP208:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 1 7613 // CHECK9-NEXT: store ptr [[TMP202]], ptr [[TMP208]], align 8 7614 // CHECK9-NEXT: [[TMP209:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 1 7615 // CHECK9-NEXT: store ptr [[TMP202]], ptr [[TMP209]], align 8 7616 // CHECK9-NEXT: [[TMP210:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 1 7617 // CHECK9-NEXT: store ptr null, ptr [[TMP210]], align 8 7618 // CHECK9-NEXT: [[TMP211:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 2 7619 // CHECK9-NEXT: store ptr [[TMP203]], ptr [[TMP211]], align 8 7620 // CHECK9-NEXT: [[TMP212:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 2 7621 // CHECK9-NEXT: store ptr [[TMP203]], ptr [[TMP212]], align 8 7622 // CHECK9-NEXT: [[TMP213:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 2 7623 // CHECK9-NEXT: store ptr null, ptr [[TMP213]], align 8 7624 // CHECK9-NEXT: [[TMP214:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 3 7625 // CHECK9-NEXT: store ptr [[TMP204]], ptr [[TMP214]], align 8 7626 // CHECK9-NEXT: [[TMP215:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 3 7627 // CHECK9-NEXT: store ptr [[TMP204]], ptr [[TMP215]], align 8 7628 // CHECK9-NEXT: [[TMP216:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i64 0, i64 3 7629 // CHECK9-NEXT: store ptr null, ptr [[TMP216]], align 8 7630 // CHECK9-NEXT: [[TMP217:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 7631 // CHECK9-NEXT: [[TMP218:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 7632 // CHECK9-NEXT: [[TMP219:%.*]] = load i32, ptr [[N]], align 4 7633 // CHECK9-NEXT: store i32 [[TMP219]], ptr [[DOTCAPTURE_EXPR_65]], align 4 7634 // CHECK9-NEXT: [[TMP220:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_65]], align 4 7635 // CHECK9-NEXT: [[SUB67:%.*]] = sub nsw i32 [[TMP220]], 0 7636 // CHECK9-NEXT: [[DIV68:%.*]] = sdiv i32 [[SUB67]], 1 7637 // CHECK9-NEXT: [[SUB69:%.*]] = sub nsw i32 [[DIV68]], 1 7638 // CHECK9-NEXT: store i32 [[SUB69]], ptr [[DOTCAPTURE_EXPR_66]], align 4 7639 // CHECK9-NEXT: [[TMP221:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_66]], align 4 7640 // CHECK9-NEXT: [[ADD70:%.*]] = add nsw i32 [[TMP221]], 1 7641 // CHECK9-NEXT: [[TMP222:%.*]] = zext i32 [[ADD70]] to i64 7642 // CHECK9-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 0 7643 // CHECK9-NEXT: store i32 3, ptr [[TMP223]], align 4 7644 // CHECK9-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 1 7645 // CHECK9-NEXT: store i32 4, ptr [[TMP224]], align 4 7646 // CHECK9-NEXT: [[TMP225:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 2 7647 // CHECK9-NEXT: store ptr [[TMP217]], ptr [[TMP225]], align 8 7648 // CHECK9-NEXT: [[TMP226:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 3 7649 // CHECK9-NEXT: store ptr [[TMP218]], ptr [[TMP226]], align 8 7650 // CHECK9-NEXT: [[TMP227:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 4 7651 // CHECK9-NEXT: store ptr @.offload_sizes.23, ptr [[TMP227]], align 8 7652 // CHECK9-NEXT: [[TMP228:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 5 7653 // CHECK9-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP228]], align 8 7654 // CHECK9-NEXT: [[TMP229:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 6 7655 // CHECK9-NEXT: store ptr null, ptr [[TMP229]], align 8 7656 // CHECK9-NEXT: [[TMP230:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 7 7657 // CHECK9-NEXT: store ptr null, ptr [[TMP230]], align 8 7658 // CHECK9-NEXT: [[TMP231:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 8 7659 // CHECK9-NEXT: store i64 [[TMP222]], ptr [[TMP231]], align 8 7660 // CHECK9-NEXT: [[TMP232:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 9 7661 // CHECK9-NEXT: store i64 0, ptr [[TMP232]], align 8 7662 // CHECK9-NEXT: [[TMP233:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 10 7663 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP233]], align 4 7664 // CHECK9-NEXT: [[TMP234:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 11 7665 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP234]], align 4 7666 // CHECK9-NEXT: [[TMP235:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 12 7667 // CHECK9-NEXT: store i32 0, ptr [[TMP235]], align 4 7668 // CHECK9-NEXT: [[TMP236:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.region_id, ptr [[KERNEL_ARGS71]]) 7669 // CHECK9-NEXT: [[TMP237:%.*]] = icmp ne i32 [[TMP236]], 0 7670 // CHECK9-NEXT: br i1 [[TMP237]], label [[OMP_OFFLOAD_FAILED72:%.*]], label [[OMP_OFFLOAD_CONT73:%.*]] 7671 // CHECK9: omp_offload.failed72: 7672 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82(i64 [[TMP201]], ptr [[TMP202]], ptr [[TMP203]], ptr [[TMP204]]) #[[ATTR2]] 7673 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT73]] 7674 // CHECK9: omp_offload.cont73: 7675 // CHECK9-NEXT: [[TMP238:%.*]] = load i32, ptr [[CH]], align 4 7676 // CHECK9-NEXT: store i32 [[TMP238]], ptr [[CH_CASTED74]], align 4 7677 // CHECK9-NEXT: [[TMP239:%.*]] = load i64, ptr [[CH_CASTED74]], align 8 7678 // CHECK9-NEXT: [[TMP240:%.*]] = load i32, ptr [[N]], align 4 7679 // CHECK9-NEXT: store i32 [[TMP240]], ptr [[N_CASTED75]], align 4 7680 // CHECK9-NEXT: [[TMP241:%.*]] = load i64, ptr [[N_CASTED75]], align 8 7681 // CHECK9-NEXT: [[TMP242:%.*]] = load ptr, ptr [[A]], align 8 7682 // CHECK9-NEXT: [[TMP243:%.*]] = load ptr, ptr [[B]], align 8 7683 // CHECK9-NEXT: [[TMP244:%.*]] = load ptr, ptr [[C]], align 8 7684 // CHECK9-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 7685 // CHECK9-NEXT: store i64 [[TMP239]], ptr [[TMP245]], align 8 7686 // CHECK9-NEXT: [[TMP246:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 7687 // CHECK9-NEXT: store i64 [[TMP239]], ptr [[TMP246]], align 8 7688 // CHECK9-NEXT: [[TMP247:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 0 7689 // CHECK9-NEXT: store ptr null, ptr [[TMP247]], align 8 7690 // CHECK9-NEXT: [[TMP248:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 1 7691 // CHECK9-NEXT: store i64 [[TMP241]], ptr [[TMP248]], align 8 7692 // CHECK9-NEXT: [[TMP249:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 1 7693 // CHECK9-NEXT: store i64 [[TMP241]], ptr [[TMP249]], align 8 7694 // CHECK9-NEXT: [[TMP250:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 1 7695 // CHECK9-NEXT: store ptr null, ptr [[TMP250]], align 8 7696 // CHECK9-NEXT: [[TMP251:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 2 7697 // CHECK9-NEXT: store ptr [[TMP242]], ptr [[TMP251]], align 8 7698 // CHECK9-NEXT: [[TMP252:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 2 7699 // CHECK9-NEXT: store ptr [[TMP242]], ptr [[TMP252]], align 8 7700 // CHECK9-NEXT: [[TMP253:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 2 7701 // CHECK9-NEXT: store ptr null, ptr [[TMP253]], align 8 7702 // CHECK9-NEXT: [[TMP254:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 3 7703 // CHECK9-NEXT: store ptr [[TMP243]], ptr [[TMP254]], align 8 7704 // CHECK9-NEXT: [[TMP255:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 3 7705 // CHECK9-NEXT: store ptr [[TMP243]], ptr [[TMP255]], align 8 7706 // CHECK9-NEXT: [[TMP256:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 3 7707 // CHECK9-NEXT: store ptr null, ptr [[TMP256]], align 8 7708 // CHECK9-NEXT: [[TMP257:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 4 7709 // CHECK9-NEXT: store ptr [[TMP244]], ptr [[TMP257]], align 8 7710 // CHECK9-NEXT: [[TMP258:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 4 7711 // CHECK9-NEXT: store ptr [[TMP244]], ptr [[TMP258]], align 8 7712 // CHECK9-NEXT: [[TMP259:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i64 0, i64 4 7713 // CHECK9-NEXT: store ptr null, ptr [[TMP259]], align 8 7714 // CHECK9-NEXT: [[TMP260:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 7715 // CHECK9-NEXT: [[TMP261:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 7716 // CHECK9-NEXT: [[TMP262:%.*]] = load i32, ptr [[N]], align 4 7717 // CHECK9-NEXT: store i32 [[TMP262]], ptr [[DOTCAPTURE_EXPR_80]], align 4 7718 // CHECK9-NEXT: [[TMP263:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_80]], align 4 7719 // CHECK9-NEXT: [[SUB82:%.*]] = sub nsw i32 [[TMP263]], 0 7720 // CHECK9-NEXT: [[DIV83:%.*]] = sdiv i32 [[SUB82]], 1 7721 // CHECK9-NEXT: [[SUB84:%.*]] = sub nsw i32 [[DIV83]], 1 7722 // CHECK9-NEXT: store i32 [[SUB84]], ptr [[DOTCAPTURE_EXPR_81]], align 4 7723 // CHECK9-NEXT: [[TMP264:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_81]], align 4 7724 // CHECK9-NEXT: [[ADD85:%.*]] = add nsw i32 [[TMP264]], 1 7725 // CHECK9-NEXT: [[TMP265:%.*]] = zext i32 [[ADD85]] to i64 7726 // CHECK9-NEXT: [[TMP266:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 0 7727 // CHECK9-NEXT: store i32 3, ptr [[TMP266]], align 4 7728 // CHECK9-NEXT: [[TMP267:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 1 7729 // CHECK9-NEXT: store i32 5, ptr [[TMP267]], align 4 7730 // CHECK9-NEXT: [[TMP268:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 2 7731 // CHECK9-NEXT: store ptr [[TMP260]], ptr [[TMP268]], align 8 7732 // CHECK9-NEXT: [[TMP269:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 3 7733 // CHECK9-NEXT: store ptr [[TMP261]], ptr [[TMP269]], align 8 7734 // CHECK9-NEXT: [[TMP270:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 4 7735 // CHECK9-NEXT: store ptr @.offload_sizes.25, ptr [[TMP270]], align 8 7736 // CHECK9-NEXT: [[TMP271:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 5 7737 // CHECK9-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP271]], align 8 7738 // CHECK9-NEXT: [[TMP272:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 6 7739 // CHECK9-NEXT: store ptr null, ptr [[TMP272]], align 8 7740 // CHECK9-NEXT: [[TMP273:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 7 7741 // CHECK9-NEXT: store ptr null, ptr [[TMP273]], align 8 7742 // CHECK9-NEXT: [[TMP274:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 8 7743 // CHECK9-NEXT: store i64 [[TMP265]], ptr [[TMP274]], align 8 7744 // CHECK9-NEXT: [[TMP275:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 9 7745 // CHECK9-NEXT: store i64 0, ptr [[TMP275]], align 8 7746 // CHECK9-NEXT: [[TMP276:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 10 7747 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP276]], align 4 7748 // CHECK9-NEXT: [[TMP277:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 11 7749 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP277]], align 4 7750 // CHECK9-NEXT: [[TMP278:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 12 7751 // CHECK9-NEXT: store i32 0, ptr [[TMP278]], align 4 7752 // CHECK9-NEXT: [[TMP279:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.region_id, ptr [[KERNEL_ARGS86]]) 7753 // CHECK9-NEXT: [[TMP280:%.*]] = icmp ne i32 [[TMP279]], 0 7754 // CHECK9-NEXT: br i1 [[TMP280]], label [[OMP_OFFLOAD_FAILED87:%.*]], label [[OMP_OFFLOAD_CONT88:%.*]] 7755 // CHECK9: omp_offload.failed87: 7756 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90(i64 [[TMP239]], i64 [[TMP241]], ptr [[TMP242]], ptr [[TMP243]], ptr [[TMP244]]) #[[ATTR2]] 7757 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT88]] 7758 // CHECK9: omp_offload.cont88: 7759 // CHECK9-NEXT: ret i32 0 7760 // 7761 // 7762 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 7763 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 7764 // CHECK9-NEXT: entry: 7765 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7766 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7767 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 7768 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 7769 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 7770 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7771 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 7772 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 7773 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 7774 // CHECK9-NEXT: ret void 7775 // 7776 // 7777 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined 7778 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7779 // CHECK9-NEXT: entry: 7780 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7781 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7782 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 7783 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7784 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 7785 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 7786 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7787 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7788 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7789 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7790 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7791 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7792 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7793 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7794 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7795 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 7796 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7797 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7798 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 7799 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7800 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 7801 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 7802 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 7803 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7804 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 7805 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 7806 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 7807 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 7808 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7809 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7810 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7811 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7812 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7813 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 7814 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7815 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7816 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7817 // CHECK9: omp.precond.then: 7818 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 7819 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7820 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 7821 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7822 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7823 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7824 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 7825 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7826 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7827 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7828 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7829 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7830 // CHECK9: cond.true: 7831 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7832 // CHECK9-NEXT: br label [[COND_END:%.*]] 7833 // CHECK9: cond.false: 7834 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 7835 // CHECK9-NEXT: br label [[COND_END]] 7836 // CHECK9: cond.end: 7837 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7838 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 7839 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 7840 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 7841 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7842 // CHECK9: omp.inner.for.cond: 7843 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62:![0-9]+]] 7844 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP62]] 7845 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 7846 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7847 // CHECK9: omp.inner.for.body: 7848 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP62]] 7849 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 7850 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP62]] 7851 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 7852 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP62]] 7853 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7854 // CHECK9: omp.inner.for.inc: 7855 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 7856 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP62]] 7857 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 7858 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP62]] 7859 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]] 7860 // CHECK9: omp.inner.for.end: 7861 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7862 // CHECK9: omp.loop.exit: 7863 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7864 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 7865 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 7866 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7867 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 7868 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 7869 // CHECK9: .omp.final.then: 7870 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7871 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 7872 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 7873 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 7874 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 7875 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 7876 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 7877 // CHECK9: .omp.final.done: 7878 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 7879 // CHECK9: omp.precond.end: 7880 // CHECK9-NEXT: ret void 7881 // 7882 // 7883 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined.omp_outlined 7884 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 7885 // CHECK9-NEXT: entry: 7886 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 7887 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 7888 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7889 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7890 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 7891 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 7892 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 7893 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 7894 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7895 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 7896 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7897 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7898 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 7899 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7900 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7901 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7902 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7903 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 7904 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 7905 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 7906 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7907 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7908 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 7909 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 7910 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 7911 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 7912 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 7913 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 7914 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 7915 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 7916 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 7917 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 7918 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7919 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 7920 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7921 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7922 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 7923 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 7924 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 7925 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 7926 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7927 // CHECK9: omp.precond.then: 7928 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 7929 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7930 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 7931 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 7932 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 7933 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 7934 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 7935 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 7936 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 7937 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 7938 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 7939 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7940 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 7941 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 7942 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7943 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7944 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 7945 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7946 // CHECK9: cond.true: 7947 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 7948 // CHECK9-NEXT: br label [[COND_END:%.*]] 7949 // CHECK9: cond.false: 7950 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 7951 // CHECK9-NEXT: br label [[COND_END]] 7952 // CHECK9: cond.end: 7953 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 7954 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 7955 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 7956 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 7957 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7958 // CHECK9: omp.inner.for.cond: 7959 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65:![0-9]+]] 7960 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP65]] 7961 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7962 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7963 // CHECK9: omp.inner.for.body: 7964 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 7965 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7966 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7967 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP65]] 7968 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP65]] 7969 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP65]] 7970 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 7971 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]] 7972 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP65]] 7973 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP65]] 7974 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP65]] 7975 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 7976 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i64 [[IDXPROM7]] 7977 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP65]] 7978 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 7979 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP65]] 7980 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP65]] 7981 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 7982 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i64 [[IDXPROM10]] 7983 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[ARRAYIDX11]], align 4, !llvm.access.group [[ACC_GRP65]] 7984 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7985 // CHECK9: omp.body.continue: 7986 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7987 // CHECK9: omp.inner.for.inc: 7988 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 7989 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 7990 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP65]] 7991 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]] 7992 // CHECK9: omp.inner.for.end: 7993 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7994 // CHECK9: omp.loop.exit: 7995 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 7996 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 7997 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 7998 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 7999 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 8000 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8001 // CHECK9: .omp.final.then: 8002 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8003 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 8004 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 8005 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 8006 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 8007 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 8008 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8009 // CHECK9: .omp.final.done: 8010 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8011 // CHECK9: omp.precond.end: 8012 // CHECK9-NEXT: ret void 8013 // 8014 // 8015 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50 8016 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 8017 // CHECK9-NEXT: entry: 8018 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8019 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8020 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8021 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8022 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 8023 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8024 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8025 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8026 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 8027 // CHECK9-NEXT: ret void 8028 // 8029 // 8030 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined 8031 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8032 // CHECK9-NEXT: entry: 8033 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8034 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8035 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8036 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8037 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8038 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8039 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8040 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8041 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8042 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8043 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8044 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8045 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8046 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8047 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8048 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8049 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8050 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8051 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8052 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8053 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8054 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8055 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8056 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8057 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8058 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8059 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 8060 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 8061 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8062 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8063 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8064 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8065 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8066 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8067 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8068 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8069 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8070 // CHECK9: omp.precond.then: 8071 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8072 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8073 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 8074 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8075 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8076 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8077 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 8078 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8079 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8080 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8081 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8082 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8083 // CHECK9: cond.true: 8084 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8085 // CHECK9-NEXT: br label [[COND_END:%.*]] 8086 // CHECK9: cond.false: 8087 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8088 // CHECK9-NEXT: br label [[COND_END]] 8089 // CHECK9: cond.end: 8090 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8091 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8092 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8093 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 8094 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8095 // CHECK9: omp.inner.for.cond: 8096 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68:![0-9]+]] 8097 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP68]] 8098 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8099 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8100 // CHECK9: omp.inner.for.body: 8101 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP68]] 8102 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8103 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP68]] 8104 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8105 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP68]] 8106 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8107 // CHECK9: omp.inner.for.inc: 8108 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 8109 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP68]] 8110 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 8111 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP68]] 8112 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]] 8113 // CHECK9: omp.inner.for.end: 8114 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8115 // CHECK9: omp.loop.exit: 8116 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8117 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 8118 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 8119 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8120 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 8121 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8122 // CHECK9: .omp.final.then: 8123 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8124 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 8125 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 8126 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 8127 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 8128 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 8129 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8130 // CHECK9: .omp.final.done: 8131 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8132 // CHECK9: omp.precond.end: 8133 // CHECK9-NEXT: ret void 8134 // 8135 // 8136 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined 8137 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8138 // CHECK9-NEXT: entry: 8139 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8140 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8141 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8142 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8143 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8144 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8145 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8146 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8147 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8148 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8149 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8150 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8151 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8152 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8153 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8154 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8155 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8156 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8157 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8158 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8159 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8160 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8161 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8162 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8163 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8164 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8165 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8166 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8167 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8168 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8169 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 8170 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 8171 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8172 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8173 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8174 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8175 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8176 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8177 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8178 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8179 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8180 // CHECK9: omp.precond.then: 8181 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8182 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8183 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8184 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8185 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8186 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8187 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8188 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 8189 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 8190 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8191 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8192 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8193 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 8194 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8195 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8196 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8197 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8198 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8199 // CHECK9: cond.true: 8200 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8201 // CHECK9-NEXT: br label [[COND_END:%.*]] 8202 // CHECK9: cond.false: 8203 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8204 // CHECK9-NEXT: br label [[COND_END]] 8205 // CHECK9: cond.end: 8206 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8207 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8208 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8209 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 8210 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8211 // CHECK9: omp.inner.for.cond: 8212 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71:![0-9]+]] 8213 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP71]] 8214 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8215 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8216 // CHECK9: omp.inner.for.body: 8217 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 8218 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8219 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8220 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP71]] 8221 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP71]] 8222 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP71]] 8223 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8224 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]] 8225 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP71]] 8226 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP71]] 8227 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP71]] 8228 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 8229 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i64 [[IDXPROM7]] 8230 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP71]] 8231 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 8232 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP71]] 8233 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP71]] 8234 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 8235 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i64 [[IDXPROM10]] 8236 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[ARRAYIDX11]], align 4, !llvm.access.group [[ACC_GRP71]] 8237 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8238 // CHECK9: omp.body.continue: 8239 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8240 // CHECK9: omp.inner.for.inc: 8241 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 8242 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 8243 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP71]] 8244 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]] 8245 // CHECK9: omp.inner.for.end: 8246 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8247 // CHECK9: omp.loop.exit: 8248 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8249 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 8250 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 8251 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8252 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 8253 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8254 // CHECK9: .omp.final.then: 8255 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8256 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 8257 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 8258 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 8259 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 8260 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 8261 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8262 // CHECK9: .omp.final.done: 8263 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8264 // CHECK9: omp.precond.end: 8265 // CHECK9-NEXT: ret void 8266 // 8267 // 8268 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58 8269 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 8270 // CHECK9-NEXT: entry: 8271 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 8272 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8273 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8274 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8275 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8276 // CHECK9-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 8277 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 8278 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8279 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8280 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8281 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 8282 // CHECK9-NEXT: ret void 8283 // 8284 // 8285 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined 8286 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8287 // CHECK9-NEXT: entry: 8288 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8289 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8290 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 8291 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8292 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8293 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8294 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8295 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8296 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8297 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8298 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8299 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8300 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8301 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8302 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8303 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8304 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8305 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8306 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8307 // CHECK9-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 8308 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8309 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8310 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8311 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8312 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 8313 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8314 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8315 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8316 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8317 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4 8318 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 8319 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8320 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 8321 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8322 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8323 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8324 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8325 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8326 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 8327 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8328 // CHECK9: omp.precond.then: 8329 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8330 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8331 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_COMB_UB]], align 4 8332 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8333 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8334 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4 8335 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8336 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 8337 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 8338 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8339 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8340 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8341 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8342 // CHECK9: cond.true: 8343 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8344 // CHECK9-NEXT: br label [[COND_END:%.*]] 8345 // CHECK9: cond.false: 8346 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8347 // CHECK9-NEXT: br label [[COND_END]] 8348 // CHECK9: cond.end: 8349 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8350 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8351 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8352 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 8353 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8354 // CHECK9: omp.inner.for.cond: 8355 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74:![0-9]+]] 8356 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP74]] 8357 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 8358 // CHECK9-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 8359 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8360 // CHECK9: omp.inner.for.body: 8361 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP74]] 8362 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8363 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 8364 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 8365 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]), !llvm.access.group [[ACC_GRP74]] 8366 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8367 // CHECK9: omp.inner.for.inc: 8368 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 8369 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP74]] 8370 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 8371 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 8372 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP74]] 8373 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP74]] 8374 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8375 // CHECK9-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP74]] 8376 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 8377 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP74]] 8378 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 8379 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 8380 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 8381 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP74]] 8382 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 8383 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 8384 // CHECK9: cond.true10: 8385 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP74]] 8386 // CHECK9-NEXT: br label [[COND_END12:%.*]] 8387 // CHECK9: cond.false11: 8388 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 8389 // CHECK9-NEXT: br label [[COND_END12]] 8390 // CHECK9: cond.end12: 8391 // CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE10]] ], [ [[TMP32]], [[COND_FALSE11]] ] 8392 // CHECK9-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP74]] 8393 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP74]] 8394 // CHECK9-NEXT: store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP74]] 8395 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]] 8396 // CHECK9: omp.inner.for.end: 8397 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8398 // CHECK9: omp.loop.exit: 8399 // CHECK9-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8400 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 8401 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]]) 8402 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8403 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 8404 // CHECK9-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8405 // CHECK9: .omp.final.then: 8406 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8407 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP38]], 0 8408 // CHECK9-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 8409 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1 8410 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]] 8411 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I3]], align 4 8412 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8413 // CHECK9: .omp.final.done: 8414 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8415 // CHECK9: omp.precond.end: 8416 // CHECK9-NEXT: ret void 8417 // 8418 // 8419 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined.omp_outlined 8420 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8421 // CHECK9-NEXT: entry: 8422 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8423 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8424 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8425 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8426 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8427 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8428 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8429 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8430 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8431 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8432 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8433 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8434 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8435 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8436 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8437 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8438 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8439 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8440 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8441 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8442 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8443 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8444 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8445 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8446 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8447 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8448 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8449 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8450 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8451 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8452 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 8453 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 8454 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8455 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8456 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8457 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8458 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8459 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8460 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8461 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8462 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8463 // CHECK9: omp.precond.then: 8464 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8465 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8466 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8467 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8468 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8469 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8470 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8471 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 8472 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 8473 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8474 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8475 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8476 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 8477 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8478 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8479 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8480 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8481 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8482 // CHECK9: cond.true: 8483 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8484 // CHECK9-NEXT: br label [[COND_END:%.*]] 8485 // CHECK9: cond.false: 8486 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8487 // CHECK9-NEXT: br label [[COND_END]] 8488 // CHECK9: cond.end: 8489 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8490 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8491 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8492 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 8493 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8494 // CHECK9: omp.inner.for.cond: 8495 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP77:![0-9]+]] 8496 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP77]] 8497 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8498 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8499 // CHECK9: omp.inner.for.body: 8500 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP77]] 8501 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8502 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8503 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP77]] 8504 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP77]] 8505 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP77]] 8506 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8507 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]] 8508 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP77]] 8509 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP77]] 8510 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP77]] 8511 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 8512 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i64 [[IDXPROM7]] 8513 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP77]] 8514 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 8515 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP77]] 8516 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP77]] 8517 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 8518 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i64 [[IDXPROM10]] 8519 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[ARRAYIDX11]], align 4, !llvm.access.group [[ACC_GRP77]] 8520 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8521 // CHECK9: omp.body.continue: 8522 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8523 // CHECK9: omp.inner.for.inc: 8524 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP77]] 8525 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 8526 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP77]] 8527 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP78:![0-9]+]] 8528 // CHECK9: omp.inner.for.end: 8529 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8530 // CHECK9: omp.loop.exit: 8531 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8532 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 8533 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 8534 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8535 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 8536 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8537 // CHECK9: .omp.final.then: 8538 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8539 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 8540 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 8541 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 8542 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 8543 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 8544 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8545 // CHECK9: .omp.final.done: 8546 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8547 // CHECK9: omp.precond.end: 8548 // CHECK9-NEXT: ret void 8549 // 8550 // 8551 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 8552 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 8553 // CHECK9-NEXT: entry: 8554 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8555 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8556 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8557 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8558 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 8559 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8560 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8561 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8562 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 8563 // CHECK9-NEXT: ret void 8564 // 8565 // 8566 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined 8567 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8568 // CHECK9-NEXT: entry: 8569 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8570 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8571 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8572 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8573 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8574 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8575 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8576 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8577 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8578 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8579 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8580 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8581 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8582 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8583 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8584 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 8585 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8586 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8587 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8588 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8589 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8590 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8591 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8592 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8593 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8594 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8595 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 8596 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 8597 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8598 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8599 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8600 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8601 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8602 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8603 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8604 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8605 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8606 // CHECK9: omp.precond.then: 8607 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8608 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8609 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 8610 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8611 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8612 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8613 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 8614 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8615 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8616 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8617 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8618 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8619 // CHECK9: cond.true: 8620 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8621 // CHECK9-NEXT: br label [[COND_END:%.*]] 8622 // CHECK9: cond.false: 8623 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8624 // CHECK9-NEXT: br label [[COND_END]] 8625 // CHECK9: cond.end: 8626 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8627 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8628 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8629 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 8630 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8631 // CHECK9: omp.inner.for.cond: 8632 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP80:![0-9]+]] 8633 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP80]] 8634 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 8635 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8636 // CHECK9: omp.inner.for.body: 8637 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP80]] 8638 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8639 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP80]] 8640 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8641 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP80]] 8642 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8643 // CHECK9: omp.inner.for.inc: 8644 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP80]] 8645 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP80]] 8646 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 8647 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP80]] 8648 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP81:![0-9]+]] 8649 // CHECK9: omp.inner.for.end: 8650 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8651 // CHECK9: omp.loop.exit: 8652 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8653 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 8654 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 8655 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8656 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 8657 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8658 // CHECK9: .omp.final.then: 8659 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8660 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 8661 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 8662 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 8663 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 8664 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 8665 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8666 // CHECK9: .omp.final.done: 8667 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8668 // CHECK9: omp.precond.end: 8669 // CHECK9-NEXT: ret void 8670 // 8671 // 8672 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp_outlined 8673 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8674 // CHECK9-NEXT: entry: 8675 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8676 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8677 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8678 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8679 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8680 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8681 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8682 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8683 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8684 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8685 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8686 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8687 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8688 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8689 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8690 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8691 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8692 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8693 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8694 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8695 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8696 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8697 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8698 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8699 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8700 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8701 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8702 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8703 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8704 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8705 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 8706 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 8707 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8708 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8709 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8710 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8711 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8712 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8713 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8714 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8715 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8716 // CHECK9: omp.precond.then: 8717 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8718 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8719 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8720 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8721 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8722 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8723 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 8724 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 8725 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 8726 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8727 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8728 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8729 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 8730 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8731 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8732 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8733 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8734 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8735 // CHECK9: cond.true: 8736 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8737 // CHECK9-NEXT: br label [[COND_END:%.*]] 8738 // CHECK9: cond.false: 8739 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 8740 // CHECK9-NEXT: br label [[COND_END]] 8741 // CHECK9: cond.end: 8742 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8743 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 8744 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 8745 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 8746 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8747 // CHECK9: omp.inner.for.cond: 8748 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP83:![0-9]+]] 8749 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP83]] 8750 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8751 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8752 // CHECK9: omp.inner.for.body: 8753 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP83]] 8754 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8755 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8756 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP83]] 8757 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP83]] 8758 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP83]] 8759 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8760 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i64 [[IDXPROM]] 8761 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP83]] 8762 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP83]] 8763 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP83]] 8764 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP24]] to i64 8765 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i64 [[IDXPROM7]] 8766 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP83]] 8767 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 8768 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP83]] 8769 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP83]] 8770 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP27]] to i64 8771 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i64 [[IDXPROM10]] 8772 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[ARRAYIDX11]], align 4, !llvm.access.group [[ACC_GRP83]] 8773 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8774 // CHECK9: omp.body.continue: 8775 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8776 // CHECK9: omp.inner.for.inc: 8777 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP83]] 8778 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1 8779 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP83]] 8780 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP84:![0-9]+]] 8781 // CHECK9: omp.inner.for.end: 8782 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8783 // CHECK9: omp.loop.exit: 8784 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8785 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 8786 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 8787 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8788 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 8789 // CHECK9-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8790 // CHECK9: .omp.final.then: 8791 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 8792 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP33]], 0 8793 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 8794 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 8795 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 8796 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I4]], align 4 8797 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8798 // CHECK9: .omp.final.done: 8799 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8800 // CHECK9: omp.precond.end: 8801 // CHECK9-NEXT: ret void 8802 // 8803 // 8804 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74 8805 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 8806 // CHECK9-NEXT: entry: 8807 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 8808 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8809 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8810 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8811 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8812 // CHECK9-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 8813 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 8814 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8815 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8816 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8817 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 8818 // CHECK9-NEXT: ret void 8819 // 8820 // 8821 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined 8822 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 8823 // CHECK9-NEXT: entry: 8824 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8825 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8826 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 8827 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8828 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8829 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8830 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8831 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8832 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8833 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8834 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8835 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8836 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8837 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8838 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8839 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8840 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8841 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 8842 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8843 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8844 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8845 // CHECK9-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 8846 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8847 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8848 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8849 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8850 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 8851 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8852 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8853 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8854 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8855 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 8856 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 8857 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 8858 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8859 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8860 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 8861 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8862 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8863 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 8864 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8865 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8866 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 8867 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8868 // CHECK9: omp.precond.then: 8869 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 8870 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8871 // CHECK9-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 8872 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8873 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8874 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8875 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 8876 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 8877 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8878 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8879 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 8880 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8881 // CHECK9: cond.true: 8882 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8883 // CHECK9-NEXT: br label [[COND_END:%.*]] 8884 // CHECK9: cond.false: 8885 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 8886 // CHECK9-NEXT: br label [[COND_END]] 8887 // CHECK9: cond.end: 8888 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 8889 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 8890 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 8891 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 8892 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8893 // CHECK9: omp.inner.for.cond: 8894 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP86:![0-9]+]] 8895 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP86]] 8896 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8897 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8898 // CHECK9: omp.inner.for.body: 8899 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP86]] 8900 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8901 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP86]] 8902 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 8903 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP86]] 8904 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP86]] 8905 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP86]] 8906 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP24]]), !llvm.access.group [[ACC_GRP86]] 8907 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8908 // CHECK9: omp.inner.for.inc: 8909 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP86]] 8910 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP86]] 8911 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8912 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP86]] 8913 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP87:![0-9]+]] 8914 // CHECK9: omp.inner.for.end: 8915 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8916 // CHECK9: omp.loop.exit: 8917 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8918 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 8919 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 8920 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 8921 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 8922 // CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 8923 // CHECK9: .omp.final.then: 8924 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8925 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP31]], 0 8926 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 8927 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 8928 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 8929 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 8930 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 8931 // CHECK9: .omp.final.done: 8932 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 8933 // CHECK9: omp.precond.end: 8934 // CHECK9-NEXT: ret void 8935 // 8936 // 8937 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined.omp_outlined 8938 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 8939 // CHECK9-NEXT: entry: 8940 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 8941 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 8942 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8943 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8944 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 8945 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 8946 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 8947 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 8948 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8949 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8950 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 8951 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8952 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8953 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 8954 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8955 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8956 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8957 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8958 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 8959 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 8960 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 8961 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8962 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8963 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 8964 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 8965 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 8966 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 8967 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 8968 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 8969 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 8970 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 8971 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 8972 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 8973 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 8974 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8975 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 8976 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8977 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8978 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 8979 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 8980 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 8981 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 8982 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8983 // CHECK9: omp.precond.then: 8984 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 8985 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 8986 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 8987 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 8988 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 8989 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 8990 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 8991 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 8992 // CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 8993 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 8994 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 8995 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 8996 // CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 8997 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 8998 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 8999 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9000 // CHECK9: omp.dispatch.cond: 9001 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9002 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 9003 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP14]] to i32 9004 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP13]], [[CONV6]] 9005 // CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9006 // CHECK9: cond.true: 9007 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 9008 // CHECK9-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP15]] to i32 9009 // CHECK9-NEXT: br label [[COND_END:%.*]] 9010 // CHECK9: cond.false: 9011 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9012 // CHECK9-NEXT: br label [[COND_END]] 9013 // CHECK9: cond.end: 9014 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV8]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 9015 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 9016 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9017 // CHECK9-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 9018 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 9019 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9020 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 9021 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9022 // CHECK9: omp.dispatch.body: 9023 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9024 // CHECK9: omp.inner.for.cond: 9025 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP89:![0-9]+]] 9026 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP89]] 9027 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 9028 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9029 // CHECK9: omp.inner.for.body: 9030 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP89]] 9031 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 9032 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9033 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP89]] 9034 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP89]] 9035 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP89]] 9036 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 9037 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i64 [[IDXPROM]] 9038 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP89]] 9039 // CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP89]] 9040 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP89]] 9041 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP27]] to i64 9042 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i64 [[IDXPROM11]] 9043 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP89]] 9044 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 9045 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP89]] 9046 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP89]] 9047 // CHECK9-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP30]] to i64 9048 // CHECK9-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i64 [[IDXPROM14]] 9049 // CHECK9-NEXT: store i32 [[ADD13]], ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP89]] 9050 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9051 // CHECK9: omp.body.continue: 9052 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9053 // CHECK9: omp.inner.for.inc: 9054 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP89]] 9055 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP31]], 1 9056 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP89]] 9057 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP90:![0-9]+]] 9058 // CHECK9: omp.inner.for.end: 9059 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9060 // CHECK9: omp.dispatch.inc: 9061 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9062 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9063 // CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 9064 // CHECK9-NEXT: store i32 [[ADD17]], ptr [[DOTOMP_LB]], align 4 9065 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9066 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 9067 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 9068 // CHECK9-NEXT: store i32 [[ADD18]], ptr [[DOTOMP_UB]], align 4 9069 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 9070 // CHECK9: omp.dispatch.end: 9071 // CHECK9-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9072 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 9073 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP37]]) 9074 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9075 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 9076 // CHECK9-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9077 // CHECK9: .omp.final.then: 9078 // CHECK9-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9079 // CHECK9-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP40]], 0 9080 // CHECK9-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1 9081 // CHECK9-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1 9082 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]] 9083 // CHECK9-NEXT: store i32 [[ADD22]], ptr [[I5]], align 4 9084 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 9085 // CHECK9: .omp.final.done: 9086 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9087 // CHECK9: omp.precond.end: 9088 // CHECK9-NEXT: ret void 9089 // 9090 // 9091 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82 9092 // CHECK9-SAME: (i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 9093 // CHECK9-NEXT: entry: 9094 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9095 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9096 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 9097 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 9098 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 9099 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9100 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 9101 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 9102 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 9103 // CHECK9-NEXT: ret void 9104 // 9105 // 9106 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined 9107 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9108 // CHECK9-NEXT: entry: 9109 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 9110 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 9111 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 9112 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9113 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 9114 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 9115 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9116 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9117 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9118 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9119 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9120 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9121 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9122 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9123 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9124 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 9125 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 9126 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 9127 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 9128 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9129 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 9130 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 9131 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 9132 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 9133 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 9134 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 9135 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 9136 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 9137 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9138 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9139 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9140 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9141 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9142 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 9143 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9144 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9145 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9146 // CHECK9: omp.precond.then: 9147 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9148 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9149 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 9150 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9151 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9152 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9153 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 9154 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9155 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9156 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9157 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9158 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9159 // CHECK9: cond.true: 9160 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9161 // CHECK9-NEXT: br label [[COND_END:%.*]] 9162 // CHECK9: cond.false: 9163 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9164 // CHECK9-NEXT: br label [[COND_END]] 9165 // CHECK9: cond.end: 9166 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9167 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9168 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9169 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 9170 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9171 // CHECK9: omp.inner.for.cond: 9172 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP92:![0-9]+]] 9173 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP92]] 9174 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 9175 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9176 // CHECK9: omp.inner.for.body: 9177 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP92]] 9178 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 9179 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP92]] 9180 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9181 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP92]] 9182 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9183 // CHECK9: omp.inner.for.inc: 9184 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP92]] 9185 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP92]] 9186 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 9187 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP92]] 9188 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP93:![0-9]+]] 9189 // CHECK9: omp.inner.for.end: 9190 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9191 // CHECK9: omp.loop.exit: 9192 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9193 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 9194 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 9195 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9196 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 9197 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9198 // CHECK9: .omp.final.then: 9199 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9200 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0 9201 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 9202 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 9203 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 9204 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 9205 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 9206 // CHECK9: .omp.final.done: 9207 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9208 // CHECK9: omp.precond.end: 9209 // CHECK9-NEXT: ret void 9210 // 9211 // 9212 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined.omp_outlined 9213 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9214 // CHECK9-NEXT: entry: 9215 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 9216 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 9217 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9218 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9219 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 9220 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9221 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 9222 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 9223 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9224 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9225 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9226 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9227 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9228 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9229 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9230 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9231 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9232 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 9233 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 9234 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 9235 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 9236 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 9237 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 9238 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9239 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 9240 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 9241 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 9242 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 9243 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 9244 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 9245 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 9246 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 9247 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9248 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9249 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9250 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9251 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9252 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 9253 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9254 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9255 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9256 // CHECK9: omp.precond.then: 9257 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9258 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9259 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 9260 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 9261 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 9262 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 9263 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP9]] to i32 9264 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 9265 // CHECK9-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4 9266 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9267 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9268 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9269 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9270 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9271 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 9272 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 9273 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9274 // CHECK9: omp.dispatch.cond: 9275 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9276 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 9277 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 9278 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 9279 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9280 // CHECK9: omp.dispatch.body: 9281 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9282 // CHECK9-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 9283 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9284 // CHECK9: omp.inner.for.cond: 9285 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP95:![0-9]+]] 9286 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP95]] 9287 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 9288 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9289 // CHECK9: omp.inner.for.body: 9290 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP95]] 9291 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 9292 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9293 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP95]] 9294 // CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP95]] 9295 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP95]] 9296 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 9297 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP21]], i64 [[IDXPROM]] 9298 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP95]] 9299 // CHECK9-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP95]] 9300 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP95]] 9301 // CHECK9-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP25]] to i64 9302 // CHECK9-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, ptr [[TMP24]], i64 [[IDXPROM6]] 9303 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP95]] 9304 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 9305 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP95]] 9306 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP95]] 9307 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP28]] to i64 9308 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[TMP27]], i64 [[IDXPROM9]] 9309 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP95]] 9310 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9311 // CHECK9: omp.body.continue: 9312 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9313 // CHECK9: omp.inner.for.inc: 9314 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP95]] 9315 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1 9316 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP95]] 9317 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP96:![0-9]+]] 9318 // CHECK9: omp.inner.for.end: 9319 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9320 // CHECK9: omp.dispatch.inc: 9321 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 9322 // CHECK9: omp.dispatch.end: 9323 // CHECK9-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9324 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 9325 // CHECK9-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP31]]) 9326 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9327 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 9328 // CHECK9-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9329 // CHECK9: .omp.final.then: 9330 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9331 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP34]], 0 9332 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 9333 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1 9334 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 9335 // CHECK9-NEXT: store i32 [[ADD15]], ptr [[I4]], align 4 9336 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 9337 // CHECK9: .omp.final.done: 9338 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9339 // CHECK9: omp.precond.end: 9340 // CHECK9-NEXT: ret void 9341 // 9342 // 9343 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90 9344 // CHECK9-SAME: (i64 noundef [[CH:%.*]], i64 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 9345 // CHECK9-NEXT: entry: 9346 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca i64, align 8 9347 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9348 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9349 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 9350 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 9351 // CHECK9-NEXT: store i64 [[CH]], ptr [[CH_ADDR]], align 8 9352 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 9353 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9354 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 9355 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 9356 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 9357 // CHECK9-NEXT: ret void 9358 // 9359 // 9360 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined 9361 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1]] { 9362 // CHECK9-NEXT: entry: 9363 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 9364 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 9365 // CHECK9-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 8 9366 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 9367 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9368 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 9369 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 9370 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9371 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9372 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9373 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9374 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9375 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9376 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9377 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9378 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9379 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9380 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4 9381 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9382 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 9383 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 9384 // CHECK9-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 8 9385 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 9386 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9387 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 9388 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 9389 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 8 9390 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 8 9391 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 9392 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8 9393 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 8 9394 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 9395 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 9396 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 9397 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9398 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9399 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 9400 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9401 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9402 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 9403 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 9404 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9405 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 9406 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9407 // CHECK9: omp.precond.then: 9408 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 9409 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9410 // CHECK9-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 9411 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9412 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9413 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9414 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 9415 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 9416 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9417 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9418 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 9419 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9420 // CHECK9: cond.true: 9421 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9422 // CHECK9-NEXT: br label [[COND_END:%.*]] 9423 // CHECK9: cond.false: 9424 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 9425 // CHECK9-NEXT: br label [[COND_END]] 9426 // CHECK9: cond.end: 9427 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 9428 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 9429 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 9430 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 9431 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9432 // CHECK9: omp.inner.for.cond: 9433 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP98:![0-9]+]] 9434 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP98]] 9435 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9436 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9437 // CHECK9: omp.inner.for.body: 9438 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP98]] 9439 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9440 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP98]] 9441 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[TMP21]] to i64 9442 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP98]] 9443 // CHECK9-NEXT: store i32 [[TMP23]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP98]] 9444 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP98]] 9445 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined.omp_outlined, i64 [[TMP20]], i64 [[TMP22]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i64 [[TMP24]]), !llvm.access.group [[ACC_GRP98]] 9446 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9447 // CHECK9: omp.inner.for.inc: 9448 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP98]] 9449 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP98]] 9450 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 9451 // CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP98]] 9452 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP99:![0-9]+]] 9453 // CHECK9: omp.inner.for.end: 9454 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9455 // CHECK9: omp.loop.exit: 9456 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9457 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4 9458 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]]) 9459 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9460 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 9461 // CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9462 // CHECK9: .omp.final.then: 9463 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9464 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP31]], 0 9465 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 9466 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 9467 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 9468 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 9469 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 9470 // CHECK9: .omp.final.done: 9471 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9472 // CHECK9: omp.precond.end: 9473 // CHECK9-NEXT: ret void 9474 // 9475 // 9476 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined.omp_outlined 9477 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 9478 // CHECK9-NEXT: entry: 9479 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 9480 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 9481 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9482 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9483 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 9484 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 9485 // CHECK9-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8 9486 // CHECK9-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8 9487 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9488 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9489 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 9490 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9491 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9492 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 9493 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9494 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9495 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9496 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9497 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 9498 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 9499 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 9500 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 9501 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 9502 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 9503 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 9504 // CHECK9-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8 9505 // CHECK9-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8 9506 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8 9507 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 9508 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8 9509 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8 9510 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8 9511 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 9512 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9513 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9514 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 9515 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9516 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9517 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 9518 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 9519 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9520 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 9521 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9522 // CHECK9: omp.precond.then: 9523 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 9524 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 9525 // CHECK9-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 9526 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 9527 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32 9528 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 9529 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32 9530 // CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 9531 // CHECK9-NEXT: store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4 9532 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 9533 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 9534 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 9535 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9536 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 9537 // CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9538 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 9539 // CHECK9-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 9540 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9541 // CHECK9: omp.dispatch.cond: 9542 // CHECK9-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9543 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 9544 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP16]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 9545 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 9546 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9547 // CHECK9: omp.dispatch.body: 9548 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 9549 // CHECK9-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 9550 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9551 // CHECK9: omp.inner.for.cond: 9552 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP101:![0-9]+]] 9553 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP101]] 9554 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 9555 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9556 // CHECK9: omp.inner.for.body: 9557 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP101]] 9558 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 9559 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9560 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP101]] 9561 // CHECK9-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP101]] 9562 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP101]] 9563 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64 9564 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i64 [[IDXPROM]] 9565 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP101]] 9566 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP101]] 9567 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP101]] 9568 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP26]] to i64 9569 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i64 [[IDXPROM7]] 9570 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP101]] 9571 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 9572 // CHECK9-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP101]] 9573 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP101]] 9574 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP29]] to i64 9575 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i64 [[IDXPROM10]] 9576 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[ARRAYIDX11]], align 4, !llvm.access.group [[ACC_GRP101]] 9577 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9578 // CHECK9: omp.body.continue: 9579 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9580 // CHECK9: omp.inner.for.inc: 9581 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP101]] 9582 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP30]], 1 9583 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP101]] 9584 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP102:![0-9]+]] 9585 // CHECK9: omp.inner.for.end: 9586 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9587 // CHECK9: omp.dispatch.inc: 9588 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 9589 // CHECK9: omp.dispatch.end: 9590 // CHECK9-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 9591 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 9592 // CHECK9-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP32]]) 9593 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 9594 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 9595 // CHECK9-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 9596 // CHECK9: .omp.final.then: 9597 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9598 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP35]], 0 9599 // CHECK9-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 9600 // CHECK9-NEXT: [[MUL15:%.*]] = mul nsw i32 [[DIV14]], 1 9601 // CHECK9-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL15]] 9602 // CHECK9-NEXT: store i32 [[ADD16]], ptr [[I5]], align 4 9603 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 9604 // CHECK9: .omp.final.done: 9605 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 9606 // CHECK9: omp.precond.end: 9607 // CHECK9-NEXT: ret void 9608 // 9609 // 9610 // CHECK11-LABEL: define {{[^@]+}}@main 9611 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 9612 // CHECK11-NEXT: entry: 9613 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 9614 // CHECK11-NEXT: [[A:%.*]] = alloca ptr, align 4 9615 // CHECK11-NEXT: [[B:%.*]] = alloca ptr, align 4 9616 // CHECK11-NEXT: [[C:%.*]] = alloca ptr, align 4 9617 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 9618 // CHECK11-NEXT: [[CH:%.*]] = alloca i32, align 4 9619 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 9620 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 9621 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 9622 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 9623 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 9624 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9625 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9626 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 9627 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 9628 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x ptr], align 4 9629 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x ptr], align 4 9630 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x ptr], align 4 9631 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 9632 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 9633 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 9634 // CHECK11-NEXT: [[KERNEL_ARGS14:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9635 // CHECK11-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 9636 // CHECK11-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 9637 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [5 x ptr], align 4 9638 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [5 x ptr], align 4 9639 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [5 x ptr], align 4 9640 // CHECK11-NEXT: [[_TMP21:%.*]] = alloca i32, align 4 9641 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 9642 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 9643 // CHECK11-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9644 // CHECK11-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 9645 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [4 x ptr], align 4 9646 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [4 x ptr], align 4 9647 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [4 x ptr], align 4 9648 // CHECK11-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 9649 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_36:%.*]] = alloca i32, align 4 9650 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 9651 // CHECK11-NEXT: [[KERNEL_ARGS42:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9652 // CHECK11-NEXT: [[CH_CASTED45:%.*]] = alloca i32, align 4 9653 // CHECK11-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 9654 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [5 x ptr], align 4 9655 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [5 x ptr], align 4 9656 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [5 x ptr], align 4 9657 // CHECK11-NEXT: [[_TMP50:%.*]] = alloca i32, align 4 9658 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_51:%.*]] = alloca i32, align 4 9659 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 9660 // CHECK11-NEXT: [[KERNEL_ARGS57:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9661 // CHECK11-NEXT: [[N_CASTED60:%.*]] = alloca i32, align 4 9662 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS61:%.*]] = alloca [4 x ptr], align 4 9663 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS62:%.*]] = alloca [4 x ptr], align 4 9664 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS63:%.*]] = alloca [4 x ptr], align 4 9665 // CHECK11-NEXT: [[_TMP64:%.*]] = alloca i32, align 4 9666 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_65:%.*]] = alloca i32, align 4 9667 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_66:%.*]] = alloca i32, align 4 9668 // CHECK11-NEXT: [[KERNEL_ARGS71:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9669 // CHECK11-NEXT: [[CH_CASTED74:%.*]] = alloca i32, align 4 9670 // CHECK11-NEXT: [[N_CASTED75:%.*]] = alloca i32, align 4 9671 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS76:%.*]] = alloca [5 x ptr], align 4 9672 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS77:%.*]] = alloca [5 x ptr], align 4 9673 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS78:%.*]] = alloca [5 x ptr], align 4 9674 // CHECK11-NEXT: [[_TMP79:%.*]] = alloca i32, align 4 9675 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_80:%.*]] = alloca i32, align 4 9676 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_81:%.*]] = alloca i32, align 4 9677 // CHECK11-NEXT: [[KERNEL_ARGS86:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 9678 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 9679 // CHECK11-NEXT: store i32 10000, ptr [[N]], align 4 9680 // CHECK11-NEXT: store i32 100, ptr [[CH]], align 4 9681 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 9682 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[N_CASTED]], align 4 9683 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_CASTED]], align 4 9684 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 4 9685 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B]], align 4 9686 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C]], align 4 9687 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9688 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 4 9689 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9690 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP6]], align 4 9691 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 9692 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 9693 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9694 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 4 9695 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9696 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP9]], align 4 9697 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 9698 // CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 4 9699 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9700 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP11]], align 4 9701 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9702 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP12]], align 4 9703 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 9704 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 9705 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 9706 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP14]], align 4 9707 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 9708 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 4 9709 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 9710 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 9711 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9712 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9713 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 9714 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 9715 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 9716 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 9717 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9718 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9719 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 9720 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 9721 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 9722 // CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 9723 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 9724 // CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 4 9725 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 9726 // CHECK11-NEXT: store i32 4, ptr [[TMP24]], align 4 9727 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 9728 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP25]], align 4 9729 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 9730 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP26]], align 4 9731 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 9732 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 4 9733 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 9734 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4 9735 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 9736 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 9737 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 9738 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4 9739 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 9740 // CHECK11-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 9741 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 9742 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8 9743 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 9744 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 9745 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 9746 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 9747 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 9748 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4 9749 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.region_id, ptr [[KERNEL_ARGS]]) 9750 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 9751 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9752 // CHECK11: omp_offload.failed: 9753 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368(i32 [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]) #[[ATTR2:[0-9]+]] 9754 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 9755 // CHECK11: omp_offload.cont: 9756 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 9757 // CHECK11-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 9758 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 9759 // CHECK11-NEXT: [[TMP40:%.*]] = load ptr, ptr [[A]], align 4 9760 // CHECK11-NEXT: [[TMP41:%.*]] = load ptr, ptr [[B]], align 4 9761 // CHECK11-NEXT: [[TMP42:%.*]] = load ptr, ptr [[C]], align 4 9762 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 9763 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 9764 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 9765 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP44]], align 4 9766 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 9767 // CHECK11-NEXT: store ptr null, ptr [[TMP45]], align 4 9768 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 9769 // CHECK11-NEXT: store ptr [[TMP40]], ptr [[TMP46]], align 4 9770 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 9771 // CHECK11-NEXT: store ptr [[TMP40]], ptr [[TMP47]], align 4 9772 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 9773 // CHECK11-NEXT: store ptr null, ptr [[TMP48]], align 4 9774 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 9775 // CHECK11-NEXT: store ptr [[TMP41]], ptr [[TMP49]], align 4 9776 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 9777 // CHECK11-NEXT: store ptr [[TMP41]], ptr [[TMP50]], align 4 9778 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 9779 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4 9780 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 9781 // CHECK11-NEXT: store ptr [[TMP42]], ptr [[TMP52]], align 4 9782 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 9783 // CHECK11-NEXT: store ptr [[TMP42]], ptr [[TMP53]], align 4 9784 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 9785 // CHECK11-NEXT: store ptr null, ptr [[TMP54]], align 4 9786 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 9787 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 9788 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, ptr [[N]], align 4 9789 // CHECK11-NEXT: store i32 [[TMP57]], ptr [[DOTCAPTURE_EXPR_8]], align 4 9790 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_8]], align 4 9791 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP58]], 0 9792 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 9793 // CHECK11-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 9794 // CHECK11-NEXT: store i32 [[SUB12]], ptr [[DOTCAPTURE_EXPR_9]], align 4 9795 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 9796 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP59]], 1 9797 // CHECK11-NEXT: [[TMP60:%.*]] = zext i32 [[ADD13]] to i64 9798 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 0 9799 // CHECK11-NEXT: store i32 3, ptr [[TMP61]], align 4 9800 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 1 9801 // CHECK11-NEXT: store i32 4, ptr [[TMP62]], align 4 9802 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 2 9803 // CHECK11-NEXT: store ptr [[TMP55]], ptr [[TMP63]], align 4 9804 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 3 9805 // CHECK11-NEXT: store ptr [[TMP56]], ptr [[TMP64]], align 4 9806 // CHECK11-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 4 9807 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP65]], align 4 9808 // CHECK11-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 5 9809 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP66]], align 4 9810 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 6 9811 // CHECK11-NEXT: store ptr null, ptr [[TMP67]], align 4 9812 // CHECK11-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 7 9813 // CHECK11-NEXT: store ptr null, ptr [[TMP68]], align 4 9814 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 8 9815 // CHECK11-NEXT: store i64 [[TMP60]], ptr [[TMP69]], align 8 9816 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 9 9817 // CHECK11-NEXT: store i64 0, ptr [[TMP70]], align 8 9818 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 10 9819 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP71]], align 4 9820 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 11 9821 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP72]], align 4 9822 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 12 9823 // CHECK11-NEXT: store i32 0, ptr [[TMP73]], align 4 9824 // CHECK11-NEXT: [[TMP74:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.region_id, ptr [[KERNEL_ARGS14]]) 9825 // CHECK11-NEXT: [[TMP75:%.*]] = icmp ne i32 [[TMP74]], 0 9826 // CHECK11-NEXT: br i1 [[TMP75]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 9827 // CHECK11: omp_offload.failed15: 9828 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407(i32 [[TMP39]], ptr [[TMP40]], ptr [[TMP41]], ptr [[TMP42]]) #[[ATTR2]] 9829 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 9830 // CHECK11: omp_offload.cont16: 9831 // CHECK11-NEXT: [[TMP76:%.*]] = load i32, ptr [[CH]], align 4 9832 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[CH_CASTED]], align 4 9833 // CHECK11-NEXT: [[TMP77:%.*]] = load i32, ptr [[CH_CASTED]], align 4 9834 // CHECK11-NEXT: [[TMP78:%.*]] = load i32, ptr [[N]], align 4 9835 // CHECK11-NEXT: store i32 [[TMP78]], ptr [[N_CASTED17]], align 4 9836 // CHECK11-NEXT: [[TMP79:%.*]] = load i32, ptr [[N_CASTED17]], align 4 9837 // CHECK11-NEXT: [[TMP80:%.*]] = load ptr, ptr [[A]], align 4 9838 // CHECK11-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 4 9839 // CHECK11-NEXT: [[TMP82:%.*]] = load ptr, ptr [[C]], align 4 9840 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 9841 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[TMP83]], align 4 9842 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 9843 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[TMP84]], align 4 9844 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 9845 // CHECK11-NEXT: store ptr null, ptr [[TMP85]], align 4 9846 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 9847 // CHECK11-NEXT: store i32 [[TMP79]], ptr [[TMP86]], align 4 9848 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 9849 // CHECK11-NEXT: store i32 [[TMP79]], ptr [[TMP87]], align 4 9850 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 9851 // CHECK11-NEXT: store ptr null, ptr [[TMP88]], align 4 9852 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 9853 // CHECK11-NEXT: store ptr [[TMP80]], ptr [[TMP89]], align 4 9854 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 9855 // CHECK11-NEXT: store ptr [[TMP80]], ptr [[TMP90]], align 4 9856 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 9857 // CHECK11-NEXT: store ptr null, ptr [[TMP91]], align 4 9858 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 9859 // CHECK11-NEXT: store ptr [[TMP81]], ptr [[TMP92]], align 4 9860 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 9861 // CHECK11-NEXT: store ptr [[TMP81]], ptr [[TMP93]], align 4 9862 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 9863 // CHECK11-NEXT: store ptr null, ptr [[TMP94]], align 4 9864 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 4 9865 // CHECK11-NEXT: store ptr [[TMP82]], ptr [[TMP95]], align 4 9866 // CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 4 9867 // CHECK11-NEXT: store ptr [[TMP82]], ptr [[TMP96]], align 4 9868 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 4 9869 // CHECK11-NEXT: store ptr null, ptr [[TMP97]], align 4 9870 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 9871 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 9872 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, ptr [[N]], align 4 9873 // CHECK11-NEXT: store i32 [[TMP100]], ptr [[DOTCAPTURE_EXPR_22]], align 4 9874 // CHECK11-NEXT: [[TMP101:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 9875 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP101]], 0 9876 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 9877 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[DIV25]], 1 9878 // CHECK11-NEXT: store i32 [[SUB26]], ptr [[DOTCAPTURE_EXPR_23]], align 4 9879 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_23]], align 4 9880 // CHECK11-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP102]], 1 9881 // CHECK11-NEXT: [[TMP103:%.*]] = zext i32 [[ADD27]] to i64 9882 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 9883 // CHECK11-NEXT: store i32 3, ptr [[TMP104]], align 4 9884 // CHECK11-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 9885 // CHECK11-NEXT: store i32 5, ptr [[TMP105]], align 4 9886 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 9887 // CHECK11-NEXT: store ptr [[TMP98]], ptr [[TMP106]], align 4 9888 // CHECK11-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 9889 // CHECK11-NEXT: store ptr [[TMP99]], ptr [[TMP107]], align 4 9890 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 9891 // CHECK11-NEXT: store ptr @.offload_sizes.3, ptr [[TMP108]], align 4 9892 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 9893 // CHECK11-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP109]], align 4 9894 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 9895 // CHECK11-NEXT: store ptr null, ptr [[TMP110]], align 4 9896 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 9897 // CHECK11-NEXT: store ptr null, ptr [[TMP111]], align 4 9898 // CHECK11-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 9899 // CHECK11-NEXT: store i64 [[TMP103]], ptr [[TMP112]], align 8 9900 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 9901 // CHECK11-NEXT: store i64 0, ptr [[TMP113]], align 8 9902 // CHECK11-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 9903 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP114]], align 4 9904 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 9905 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4 9906 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 9907 // CHECK11-NEXT: store i32 0, ptr [[TMP116]], align 4 9908 // CHECK11-NEXT: [[TMP117:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.region_id, ptr [[KERNEL_ARGS28]]) 9909 // CHECK11-NEXT: [[TMP118:%.*]] = icmp ne i32 [[TMP117]], 0 9910 // CHECK11-NEXT: br i1 [[TMP118]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 9911 // CHECK11: omp_offload.failed29: 9912 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446(i32 [[TMP77]], i32 [[TMP79]], ptr [[TMP80]], ptr [[TMP81]], ptr [[TMP82]]) #[[ATTR2]] 9913 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT30]] 9914 // CHECK11: omp_offload.cont30: 9915 // CHECK11-NEXT: [[TMP119:%.*]] = load i32, ptr [[N]], align 4 9916 // CHECK11-NEXT: store i32 [[TMP119]], ptr [[N_CASTED31]], align 4 9917 // CHECK11-NEXT: [[TMP120:%.*]] = load i32, ptr [[N_CASTED31]], align 4 9918 // CHECK11-NEXT: [[TMP121:%.*]] = load ptr, ptr [[A]], align 4 9919 // CHECK11-NEXT: [[TMP122:%.*]] = load ptr, ptr [[B]], align 4 9920 // CHECK11-NEXT: [[TMP123:%.*]] = load ptr, ptr [[C]], align 4 9921 // CHECK11-NEXT: [[TMP124:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 9922 // CHECK11-NEXT: store i32 [[TMP120]], ptr [[TMP124]], align 4 9923 // CHECK11-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 9924 // CHECK11-NEXT: store i32 [[TMP120]], ptr [[TMP125]], align 4 9925 // CHECK11-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 9926 // CHECK11-NEXT: store ptr null, ptr [[TMP126]], align 4 9927 // CHECK11-NEXT: [[TMP127:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 9928 // CHECK11-NEXT: store ptr [[TMP121]], ptr [[TMP127]], align 4 9929 // CHECK11-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 9930 // CHECK11-NEXT: store ptr [[TMP121]], ptr [[TMP128]], align 4 9931 // CHECK11-NEXT: [[TMP129:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 9932 // CHECK11-NEXT: store ptr null, ptr [[TMP129]], align 4 9933 // CHECK11-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 9934 // CHECK11-NEXT: store ptr [[TMP122]], ptr [[TMP130]], align 4 9935 // CHECK11-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 9936 // CHECK11-NEXT: store ptr [[TMP122]], ptr [[TMP131]], align 4 9937 // CHECK11-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 9938 // CHECK11-NEXT: store ptr null, ptr [[TMP132]], align 4 9939 // CHECK11-NEXT: [[TMP133:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 3 9940 // CHECK11-NEXT: store ptr [[TMP123]], ptr [[TMP133]], align 4 9941 // CHECK11-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 3 9942 // CHECK11-NEXT: store ptr [[TMP123]], ptr [[TMP134]], align 4 9943 // CHECK11-NEXT: [[TMP135:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 3 9944 // CHECK11-NEXT: store ptr null, ptr [[TMP135]], align 4 9945 // CHECK11-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 9946 // CHECK11-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 9947 // CHECK11-NEXT: [[TMP138:%.*]] = load i32, ptr [[N]], align 4 9948 // CHECK11-NEXT: store i32 [[TMP138]], ptr [[DOTCAPTURE_EXPR_36]], align 4 9949 // CHECK11-NEXT: [[TMP139:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_36]], align 4 9950 // CHECK11-NEXT: [[SUB38:%.*]] = sub nsw i32 [[TMP139]], 0 9951 // CHECK11-NEXT: [[DIV39:%.*]] = sdiv i32 [[SUB38]], 1 9952 // CHECK11-NEXT: [[SUB40:%.*]] = sub nsw i32 [[DIV39]], 1 9953 // CHECK11-NEXT: store i32 [[SUB40]], ptr [[DOTCAPTURE_EXPR_37]], align 4 9954 // CHECK11-NEXT: [[TMP140:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_37]], align 4 9955 // CHECK11-NEXT: [[ADD41:%.*]] = add nsw i32 [[TMP140]], 1 9956 // CHECK11-NEXT: [[TMP141:%.*]] = zext i32 [[ADD41]] to i64 9957 // CHECK11-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 0 9958 // CHECK11-NEXT: store i32 3, ptr [[TMP142]], align 4 9959 // CHECK11-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 1 9960 // CHECK11-NEXT: store i32 4, ptr [[TMP143]], align 4 9961 // CHECK11-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 2 9962 // CHECK11-NEXT: store ptr [[TMP136]], ptr [[TMP144]], align 4 9963 // CHECK11-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 3 9964 // CHECK11-NEXT: store ptr [[TMP137]], ptr [[TMP145]], align 4 9965 // CHECK11-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 4 9966 // CHECK11-NEXT: store ptr @.offload_sizes.5, ptr [[TMP146]], align 4 9967 // CHECK11-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 5 9968 // CHECK11-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP147]], align 4 9969 // CHECK11-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 6 9970 // CHECK11-NEXT: store ptr null, ptr [[TMP148]], align 4 9971 // CHECK11-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 7 9972 // CHECK11-NEXT: store ptr null, ptr [[TMP149]], align 4 9973 // CHECK11-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 8 9974 // CHECK11-NEXT: store i64 [[TMP141]], ptr [[TMP150]], align 8 9975 // CHECK11-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 9 9976 // CHECK11-NEXT: store i64 0, ptr [[TMP151]], align 8 9977 // CHECK11-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 10 9978 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP152]], align 4 9979 // CHECK11-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 11 9980 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 4 9981 // CHECK11-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 12 9982 // CHECK11-NEXT: store i32 0, ptr [[TMP154]], align 4 9983 // CHECK11-NEXT: [[TMP155:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.region_id, ptr [[KERNEL_ARGS42]]) 9984 // CHECK11-NEXT: [[TMP156:%.*]] = icmp ne i32 [[TMP155]], 0 9985 // CHECK11-NEXT: br i1 [[TMP156]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 9986 // CHECK11: omp_offload.failed43: 9987 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477(i32 [[TMP120]], ptr [[TMP121]], ptr [[TMP122]], ptr [[TMP123]]) #[[ATTR2]] 9988 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT44]] 9989 // CHECK11: omp_offload.cont44: 9990 // CHECK11-NEXT: [[TMP157:%.*]] = load i32, ptr [[CH]], align 4 9991 // CHECK11-NEXT: store i32 [[TMP157]], ptr [[CH_CASTED45]], align 4 9992 // CHECK11-NEXT: [[TMP158:%.*]] = load i32, ptr [[CH_CASTED45]], align 4 9993 // CHECK11-NEXT: [[TMP159:%.*]] = load i32, ptr [[N]], align 4 9994 // CHECK11-NEXT: store i32 [[TMP159]], ptr [[N_CASTED46]], align 4 9995 // CHECK11-NEXT: [[TMP160:%.*]] = load i32, ptr [[N_CASTED46]], align 4 9996 // CHECK11-NEXT: [[TMP161:%.*]] = load ptr, ptr [[A]], align 4 9997 // CHECK11-NEXT: [[TMP162:%.*]] = load ptr, ptr [[B]], align 4 9998 // CHECK11-NEXT: [[TMP163:%.*]] = load ptr, ptr [[C]], align 4 9999 // CHECK11-NEXT: [[TMP164:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 10000 // CHECK11-NEXT: store i32 [[TMP158]], ptr [[TMP164]], align 4 10001 // CHECK11-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 10002 // CHECK11-NEXT: store i32 [[TMP158]], ptr [[TMP165]], align 4 10003 // CHECK11-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 10004 // CHECK11-NEXT: store ptr null, ptr [[TMP166]], align 4 10005 // CHECK11-NEXT: [[TMP167:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 10006 // CHECK11-NEXT: store i32 [[TMP160]], ptr [[TMP167]], align 4 10007 // CHECK11-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 10008 // CHECK11-NEXT: store i32 [[TMP160]], ptr [[TMP168]], align 4 10009 // CHECK11-NEXT: [[TMP169:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 10010 // CHECK11-NEXT: store ptr null, ptr [[TMP169]], align 4 10011 // CHECK11-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 10012 // CHECK11-NEXT: store ptr [[TMP161]], ptr [[TMP170]], align 4 10013 // CHECK11-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 10014 // CHECK11-NEXT: store ptr [[TMP161]], ptr [[TMP171]], align 4 10015 // CHECK11-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 10016 // CHECK11-NEXT: store ptr null, ptr [[TMP172]], align 4 10017 // CHECK11-NEXT: [[TMP173:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 10018 // CHECK11-NEXT: store ptr [[TMP162]], ptr [[TMP173]], align 4 10019 // CHECK11-NEXT: [[TMP174:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 10020 // CHECK11-NEXT: store ptr [[TMP162]], ptr [[TMP174]], align 4 10021 // CHECK11-NEXT: [[TMP175:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 10022 // CHECK11-NEXT: store ptr null, ptr [[TMP175]], align 4 10023 // CHECK11-NEXT: [[TMP176:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 4 10024 // CHECK11-NEXT: store ptr [[TMP163]], ptr [[TMP176]], align 4 10025 // CHECK11-NEXT: [[TMP177:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 4 10026 // CHECK11-NEXT: store ptr [[TMP163]], ptr [[TMP177]], align 4 10027 // CHECK11-NEXT: [[TMP178:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 4 10028 // CHECK11-NEXT: store ptr null, ptr [[TMP178]], align 4 10029 // CHECK11-NEXT: [[TMP179:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 10030 // CHECK11-NEXT: [[TMP180:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 10031 // CHECK11-NEXT: [[TMP181:%.*]] = load i32, ptr [[N]], align 4 10032 // CHECK11-NEXT: store i32 [[TMP181]], ptr [[DOTCAPTURE_EXPR_51]], align 4 10033 // CHECK11-NEXT: [[TMP182:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_51]], align 4 10034 // CHECK11-NEXT: [[SUB53:%.*]] = sub nsw i32 [[TMP182]], 0 10035 // CHECK11-NEXT: [[DIV54:%.*]] = sdiv i32 [[SUB53]], 1 10036 // CHECK11-NEXT: [[SUB55:%.*]] = sub nsw i32 [[DIV54]], 1 10037 // CHECK11-NEXT: store i32 [[SUB55]], ptr [[DOTCAPTURE_EXPR_52]], align 4 10038 // CHECK11-NEXT: [[TMP183:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_52]], align 4 10039 // CHECK11-NEXT: [[ADD56:%.*]] = add nsw i32 [[TMP183]], 1 10040 // CHECK11-NEXT: [[TMP184:%.*]] = zext i32 [[ADD56]] to i64 10041 // CHECK11-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 0 10042 // CHECK11-NEXT: store i32 3, ptr [[TMP185]], align 4 10043 // CHECK11-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 1 10044 // CHECK11-NEXT: store i32 5, ptr [[TMP186]], align 4 10045 // CHECK11-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 2 10046 // CHECK11-NEXT: store ptr [[TMP179]], ptr [[TMP187]], align 4 10047 // CHECK11-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 3 10048 // CHECK11-NEXT: store ptr [[TMP180]], ptr [[TMP188]], align 4 10049 // CHECK11-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 4 10050 // CHECK11-NEXT: store ptr @.offload_sizes.7, ptr [[TMP189]], align 4 10051 // CHECK11-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 5 10052 // CHECK11-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP190]], align 4 10053 // CHECK11-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 6 10054 // CHECK11-NEXT: store ptr null, ptr [[TMP191]], align 4 10055 // CHECK11-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 7 10056 // CHECK11-NEXT: store ptr null, ptr [[TMP192]], align 4 10057 // CHECK11-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 8 10058 // CHECK11-NEXT: store i64 [[TMP184]], ptr [[TMP193]], align 8 10059 // CHECK11-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 9 10060 // CHECK11-NEXT: store i64 0, ptr [[TMP194]], align 8 10061 // CHECK11-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 10 10062 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4 10063 // CHECK11-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 11 10064 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4 10065 // CHECK11-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 12 10066 // CHECK11-NEXT: store i32 0, ptr [[TMP197]], align 4 10067 // CHECK11-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.region_id, ptr [[KERNEL_ARGS57]]) 10068 // CHECK11-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0 10069 // CHECK11-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 10070 // CHECK11: omp_offload.failed58: 10071 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505(i32 [[TMP158]], i32 [[TMP160]], ptr [[TMP161]], ptr [[TMP162]], ptr [[TMP163]]) #[[ATTR2]] 10072 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT59]] 10073 // CHECK11: omp_offload.cont59: 10074 // CHECK11-NEXT: [[TMP200:%.*]] = load i32, ptr [[N]], align 4 10075 // CHECK11-NEXT: store i32 [[TMP200]], ptr [[N_CASTED60]], align 4 10076 // CHECK11-NEXT: [[TMP201:%.*]] = load i32, ptr [[N_CASTED60]], align 4 10077 // CHECK11-NEXT: [[TMP202:%.*]] = load ptr, ptr [[A]], align 4 10078 // CHECK11-NEXT: [[TMP203:%.*]] = load ptr, ptr [[B]], align 4 10079 // CHECK11-NEXT: [[TMP204:%.*]] = load ptr, ptr [[C]], align 4 10080 // CHECK11-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 10081 // CHECK11-NEXT: store i32 [[TMP201]], ptr [[TMP205]], align 4 10082 // CHECK11-NEXT: [[TMP206:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 10083 // CHECK11-NEXT: store i32 [[TMP201]], ptr [[TMP206]], align 4 10084 // CHECK11-NEXT: [[TMP207:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 0 10085 // CHECK11-NEXT: store ptr null, ptr [[TMP207]], align 4 10086 // CHECK11-NEXT: [[TMP208:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 1 10087 // CHECK11-NEXT: store ptr [[TMP202]], ptr [[TMP208]], align 4 10088 // CHECK11-NEXT: [[TMP209:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 1 10089 // CHECK11-NEXT: store ptr [[TMP202]], ptr [[TMP209]], align 4 10090 // CHECK11-NEXT: [[TMP210:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 1 10091 // CHECK11-NEXT: store ptr null, ptr [[TMP210]], align 4 10092 // CHECK11-NEXT: [[TMP211:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 2 10093 // CHECK11-NEXT: store ptr [[TMP203]], ptr [[TMP211]], align 4 10094 // CHECK11-NEXT: [[TMP212:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 2 10095 // CHECK11-NEXT: store ptr [[TMP203]], ptr [[TMP212]], align 4 10096 // CHECK11-NEXT: [[TMP213:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 2 10097 // CHECK11-NEXT: store ptr null, ptr [[TMP213]], align 4 10098 // CHECK11-NEXT: [[TMP214:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 3 10099 // CHECK11-NEXT: store ptr [[TMP204]], ptr [[TMP214]], align 4 10100 // CHECK11-NEXT: [[TMP215:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 3 10101 // CHECK11-NEXT: store ptr [[TMP204]], ptr [[TMP215]], align 4 10102 // CHECK11-NEXT: [[TMP216:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 3 10103 // CHECK11-NEXT: store ptr null, ptr [[TMP216]], align 4 10104 // CHECK11-NEXT: [[TMP217:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 10105 // CHECK11-NEXT: [[TMP218:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 10106 // CHECK11-NEXT: [[TMP219:%.*]] = load i32, ptr [[N]], align 4 10107 // CHECK11-NEXT: store i32 [[TMP219]], ptr [[DOTCAPTURE_EXPR_65]], align 4 10108 // CHECK11-NEXT: [[TMP220:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_65]], align 4 10109 // CHECK11-NEXT: [[SUB67:%.*]] = sub nsw i32 [[TMP220]], 0 10110 // CHECK11-NEXT: [[DIV68:%.*]] = sdiv i32 [[SUB67]], 1 10111 // CHECK11-NEXT: [[SUB69:%.*]] = sub nsw i32 [[DIV68]], 1 10112 // CHECK11-NEXT: store i32 [[SUB69]], ptr [[DOTCAPTURE_EXPR_66]], align 4 10113 // CHECK11-NEXT: [[TMP221:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_66]], align 4 10114 // CHECK11-NEXT: [[ADD70:%.*]] = add nsw i32 [[TMP221]], 1 10115 // CHECK11-NEXT: [[TMP222:%.*]] = zext i32 [[ADD70]] to i64 10116 // CHECK11-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 0 10117 // CHECK11-NEXT: store i32 3, ptr [[TMP223]], align 4 10118 // CHECK11-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 1 10119 // CHECK11-NEXT: store i32 4, ptr [[TMP224]], align 4 10120 // CHECK11-NEXT: [[TMP225:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 2 10121 // CHECK11-NEXT: store ptr [[TMP217]], ptr [[TMP225]], align 4 10122 // CHECK11-NEXT: [[TMP226:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 3 10123 // CHECK11-NEXT: store ptr [[TMP218]], ptr [[TMP226]], align 4 10124 // CHECK11-NEXT: [[TMP227:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 4 10125 // CHECK11-NEXT: store ptr @.offload_sizes.9, ptr [[TMP227]], align 4 10126 // CHECK11-NEXT: [[TMP228:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 5 10127 // CHECK11-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP228]], align 4 10128 // CHECK11-NEXT: [[TMP229:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 6 10129 // CHECK11-NEXT: store ptr null, ptr [[TMP229]], align 4 10130 // CHECK11-NEXT: [[TMP230:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 7 10131 // CHECK11-NEXT: store ptr null, ptr [[TMP230]], align 4 10132 // CHECK11-NEXT: [[TMP231:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 8 10133 // CHECK11-NEXT: store i64 [[TMP222]], ptr [[TMP231]], align 8 10134 // CHECK11-NEXT: [[TMP232:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 9 10135 // CHECK11-NEXT: store i64 0, ptr [[TMP232]], align 8 10136 // CHECK11-NEXT: [[TMP233:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 10 10137 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP233]], align 4 10138 // CHECK11-NEXT: [[TMP234:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 11 10139 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP234]], align 4 10140 // CHECK11-NEXT: [[TMP235:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 12 10141 // CHECK11-NEXT: store i32 0, ptr [[TMP235]], align 4 10142 // CHECK11-NEXT: [[TMP236:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.region_id, ptr [[KERNEL_ARGS71]]) 10143 // CHECK11-NEXT: [[TMP237:%.*]] = icmp ne i32 [[TMP236]], 0 10144 // CHECK11-NEXT: br i1 [[TMP237]], label [[OMP_OFFLOAD_FAILED72:%.*]], label [[OMP_OFFLOAD_CONT73:%.*]] 10145 // CHECK11: omp_offload.failed72: 10146 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535(i32 [[TMP201]], ptr [[TMP202]], ptr [[TMP203]], ptr [[TMP204]]) #[[ATTR2]] 10147 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT73]] 10148 // CHECK11: omp_offload.cont73: 10149 // CHECK11-NEXT: [[TMP238:%.*]] = load i32, ptr [[CH]], align 4 10150 // CHECK11-NEXT: store i32 [[TMP238]], ptr [[CH_CASTED74]], align 4 10151 // CHECK11-NEXT: [[TMP239:%.*]] = load i32, ptr [[CH_CASTED74]], align 4 10152 // CHECK11-NEXT: [[TMP240:%.*]] = load i32, ptr [[N]], align 4 10153 // CHECK11-NEXT: store i32 [[TMP240]], ptr [[N_CASTED75]], align 4 10154 // CHECK11-NEXT: [[TMP241:%.*]] = load i32, ptr [[N_CASTED75]], align 4 10155 // CHECK11-NEXT: [[TMP242:%.*]] = load ptr, ptr [[A]], align 4 10156 // CHECK11-NEXT: [[TMP243:%.*]] = load ptr, ptr [[B]], align 4 10157 // CHECK11-NEXT: [[TMP244:%.*]] = load ptr, ptr [[C]], align 4 10158 // CHECK11-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 10159 // CHECK11-NEXT: store i32 [[TMP239]], ptr [[TMP245]], align 4 10160 // CHECK11-NEXT: [[TMP246:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 10161 // CHECK11-NEXT: store i32 [[TMP239]], ptr [[TMP246]], align 4 10162 // CHECK11-NEXT: [[TMP247:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 0 10163 // CHECK11-NEXT: store ptr null, ptr [[TMP247]], align 4 10164 // CHECK11-NEXT: [[TMP248:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 1 10165 // CHECK11-NEXT: store i32 [[TMP241]], ptr [[TMP248]], align 4 10166 // CHECK11-NEXT: [[TMP249:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 1 10167 // CHECK11-NEXT: store i32 [[TMP241]], ptr [[TMP249]], align 4 10168 // CHECK11-NEXT: [[TMP250:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 1 10169 // CHECK11-NEXT: store ptr null, ptr [[TMP250]], align 4 10170 // CHECK11-NEXT: [[TMP251:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 2 10171 // CHECK11-NEXT: store ptr [[TMP242]], ptr [[TMP251]], align 4 10172 // CHECK11-NEXT: [[TMP252:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 2 10173 // CHECK11-NEXT: store ptr [[TMP242]], ptr [[TMP252]], align 4 10174 // CHECK11-NEXT: [[TMP253:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 2 10175 // CHECK11-NEXT: store ptr null, ptr [[TMP253]], align 4 10176 // CHECK11-NEXT: [[TMP254:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 3 10177 // CHECK11-NEXT: store ptr [[TMP243]], ptr [[TMP254]], align 4 10178 // CHECK11-NEXT: [[TMP255:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 3 10179 // CHECK11-NEXT: store ptr [[TMP243]], ptr [[TMP255]], align 4 10180 // CHECK11-NEXT: [[TMP256:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 3 10181 // CHECK11-NEXT: store ptr null, ptr [[TMP256]], align 4 10182 // CHECK11-NEXT: [[TMP257:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 4 10183 // CHECK11-NEXT: store ptr [[TMP244]], ptr [[TMP257]], align 4 10184 // CHECK11-NEXT: [[TMP258:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 4 10185 // CHECK11-NEXT: store ptr [[TMP244]], ptr [[TMP258]], align 4 10186 // CHECK11-NEXT: [[TMP259:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 4 10187 // CHECK11-NEXT: store ptr null, ptr [[TMP259]], align 4 10188 // CHECK11-NEXT: [[TMP260:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 10189 // CHECK11-NEXT: [[TMP261:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 10190 // CHECK11-NEXT: [[TMP262:%.*]] = load i32, ptr [[N]], align 4 10191 // CHECK11-NEXT: store i32 [[TMP262]], ptr [[DOTCAPTURE_EXPR_80]], align 4 10192 // CHECK11-NEXT: [[TMP263:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_80]], align 4 10193 // CHECK11-NEXT: [[SUB82:%.*]] = sub nsw i32 [[TMP263]], 0 10194 // CHECK11-NEXT: [[DIV83:%.*]] = sdiv i32 [[SUB82]], 1 10195 // CHECK11-NEXT: [[SUB84:%.*]] = sub nsw i32 [[DIV83]], 1 10196 // CHECK11-NEXT: store i32 [[SUB84]], ptr [[DOTCAPTURE_EXPR_81]], align 4 10197 // CHECK11-NEXT: [[TMP264:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_81]], align 4 10198 // CHECK11-NEXT: [[ADD85:%.*]] = add nsw i32 [[TMP264]], 1 10199 // CHECK11-NEXT: [[TMP265:%.*]] = zext i32 [[ADD85]] to i64 10200 // CHECK11-NEXT: [[TMP266:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 0 10201 // CHECK11-NEXT: store i32 3, ptr [[TMP266]], align 4 10202 // CHECK11-NEXT: [[TMP267:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 1 10203 // CHECK11-NEXT: store i32 5, ptr [[TMP267]], align 4 10204 // CHECK11-NEXT: [[TMP268:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 2 10205 // CHECK11-NEXT: store ptr [[TMP260]], ptr [[TMP268]], align 4 10206 // CHECK11-NEXT: [[TMP269:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 3 10207 // CHECK11-NEXT: store ptr [[TMP261]], ptr [[TMP269]], align 4 10208 // CHECK11-NEXT: [[TMP270:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 4 10209 // CHECK11-NEXT: store ptr @.offload_sizes.11, ptr [[TMP270]], align 4 10210 // CHECK11-NEXT: [[TMP271:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 5 10211 // CHECK11-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP271]], align 4 10212 // CHECK11-NEXT: [[TMP272:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 6 10213 // CHECK11-NEXT: store ptr null, ptr [[TMP272]], align 4 10214 // CHECK11-NEXT: [[TMP273:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 7 10215 // CHECK11-NEXT: store ptr null, ptr [[TMP273]], align 4 10216 // CHECK11-NEXT: [[TMP274:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 8 10217 // CHECK11-NEXT: store i64 [[TMP265]], ptr [[TMP274]], align 8 10218 // CHECK11-NEXT: [[TMP275:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 9 10219 // CHECK11-NEXT: store i64 0, ptr [[TMP275]], align 8 10220 // CHECK11-NEXT: [[TMP276:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 10 10221 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP276]], align 4 10222 // CHECK11-NEXT: [[TMP277:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 11 10223 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP277]], align 4 10224 // CHECK11-NEXT: [[TMP278:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 12 10225 // CHECK11-NEXT: store i32 0, ptr [[TMP278]], align 4 10226 // CHECK11-NEXT: [[TMP279:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.region_id, ptr [[KERNEL_ARGS86]]) 10227 // CHECK11-NEXT: [[TMP280:%.*]] = icmp ne i32 [[TMP279]], 0 10228 // CHECK11-NEXT: br i1 [[TMP280]], label [[OMP_OFFLOAD_FAILED87:%.*]], label [[OMP_OFFLOAD_CONT88:%.*]] 10229 // CHECK11: omp_offload.failed87: 10230 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561(i32 [[TMP239]], i32 [[TMP241]], ptr [[TMP242]], ptr [[TMP243]], ptr [[TMP244]]) #[[ATTR2]] 10231 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT88]] 10232 // CHECK11: omp_offload.cont88: 10233 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 10234 // CHECK11-NEXT: ret i32 [[CALL]] 10235 // 10236 // 10237 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368 10238 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] { 10239 // CHECK11-NEXT: entry: 10240 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10241 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10242 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10243 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10244 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 10245 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10246 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10247 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10248 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 10249 // CHECK11-NEXT: ret void 10250 // 10251 // 10252 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined 10253 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10254 // CHECK11-NEXT: entry: 10255 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10256 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10257 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 10258 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10259 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10260 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10261 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10262 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10263 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10264 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10265 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10266 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10267 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10268 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10269 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10270 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10271 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10272 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10273 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 10274 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10275 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10276 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10277 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 10278 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10279 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 10280 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 10281 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 10282 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 10283 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10284 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10285 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10286 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10287 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10288 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 10289 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10290 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10291 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10292 // CHECK11: omp.precond.then: 10293 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10294 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10295 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 10296 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10297 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10298 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10299 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 10300 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10301 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10302 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10303 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10304 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10305 // CHECK11: cond.true: 10306 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10307 // CHECK11-NEXT: br label [[COND_END:%.*]] 10308 // CHECK11: cond.false: 10309 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10310 // CHECK11-NEXT: br label [[COND_END]] 10311 // CHECK11: cond.end: 10312 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10313 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10314 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10315 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 10316 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10317 // CHECK11: omp.inner.for.cond: 10318 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 10319 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 10320 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10321 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10322 // CHECK11: omp.inner.for.body: 10323 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]] 10324 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]] 10325 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP18]] 10326 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10327 // CHECK11: omp.inner.for.inc: 10328 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 10329 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]] 10330 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 10331 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]] 10332 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 10333 // CHECK11: omp.inner.for.end: 10334 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10335 // CHECK11: omp.loop.exit: 10336 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10337 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 10338 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 10339 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10340 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 10341 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10342 // CHECK11: .omp.final.then: 10343 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10344 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 10345 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 10346 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 10347 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 10348 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 10349 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 10350 // CHECK11: .omp.final.done: 10351 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10352 // CHECK11: omp.precond.end: 10353 // CHECK11-NEXT: ret void 10354 // 10355 // 10356 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l368.omp_outlined.omp_outlined 10357 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10358 // CHECK11-NEXT: entry: 10359 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10360 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10361 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10362 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10363 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 10364 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10365 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10366 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10367 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10368 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10369 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10370 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10371 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10372 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10373 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10374 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10375 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10376 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10377 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10378 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10379 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10380 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10381 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 10382 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10383 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10384 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10385 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 10386 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10387 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 10388 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 10389 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 10390 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 10391 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10392 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10393 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10394 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10395 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10396 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 10397 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10398 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10399 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10400 // CHECK11: omp.precond.then: 10401 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10402 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10403 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 10404 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10405 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10406 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 10407 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 10408 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10409 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10410 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10411 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 10412 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10413 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10414 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10415 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10416 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10417 // CHECK11: cond.true: 10418 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10419 // CHECK11-NEXT: br label [[COND_END:%.*]] 10420 // CHECK11: cond.false: 10421 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10422 // CHECK11-NEXT: br label [[COND_END]] 10423 // CHECK11: cond.end: 10424 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10425 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10426 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10427 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 10428 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10429 // CHECK11: omp.inner.for.cond: 10430 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 10431 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]] 10432 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10433 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10434 // CHECK11: omp.inner.for.body: 10435 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 10436 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 10437 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10438 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP22]] 10439 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP22]] 10440 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP22]] 10441 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 10442 // CHECK11-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]] 10443 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP22]] 10444 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP22]] 10445 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 10446 // CHECK11-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP22]] 10447 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 10448 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP22]] 10449 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP22]] 10450 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 10451 // CHECK11-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP22]] 10452 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10453 // CHECK11: omp.body.continue: 10454 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10455 // CHECK11: omp.inner.for.inc: 10456 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 10457 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 10458 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]] 10459 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 10460 // CHECK11: omp.inner.for.end: 10461 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10462 // CHECK11: omp.loop.exit: 10463 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10464 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 10465 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 10466 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10467 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 10468 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10469 // CHECK11: .omp.final.then: 10470 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10471 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 10472 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 10473 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 10474 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 10475 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 10476 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 10477 // CHECK11: .omp.final.done: 10478 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10479 // CHECK11: omp.precond.end: 10480 // CHECK11-NEXT: ret void 10481 // 10482 // 10483 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407 10484 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 10485 // CHECK11-NEXT: entry: 10486 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10487 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10488 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10489 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10490 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 10491 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10492 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10493 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10494 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 10495 // CHECK11-NEXT: ret void 10496 // 10497 // 10498 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined 10499 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10500 // CHECK11-NEXT: entry: 10501 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10502 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10503 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 10504 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10505 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10506 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10507 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10508 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10509 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10510 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10511 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10512 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10513 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10514 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10515 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10516 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10517 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10518 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10519 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 10520 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10521 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10522 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10523 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 10524 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10525 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 10526 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 10527 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 10528 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 10529 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10530 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10531 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10532 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10533 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10534 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 10535 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10536 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10537 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10538 // CHECK11: omp.precond.then: 10539 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10540 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10541 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 10542 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10543 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10544 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10545 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 10546 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10547 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10548 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10549 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10550 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10551 // CHECK11: cond.true: 10552 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10553 // CHECK11-NEXT: br label [[COND_END:%.*]] 10554 // CHECK11: cond.false: 10555 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10556 // CHECK11-NEXT: br label [[COND_END]] 10557 // CHECK11: cond.end: 10558 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10559 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10560 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10561 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 10562 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10563 // CHECK11: omp.inner.for.cond: 10564 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 10565 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 10566 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 10567 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10568 // CHECK11: omp.inner.for.body: 10569 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP27]] 10570 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP27]] 10571 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP27]] 10572 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10573 // CHECK11: omp.inner.for.inc: 10574 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 10575 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP27]] 10576 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 10577 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]] 10578 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 10579 // CHECK11: omp.inner.for.end: 10580 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10581 // CHECK11: omp.loop.exit: 10582 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10583 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 10584 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 10585 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10586 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 10587 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10588 // CHECK11: .omp.final.then: 10589 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10590 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 10591 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 10592 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 10593 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 10594 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 10595 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 10596 // CHECK11: .omp.final.done: 10597 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10598 // CHECK11: omp.precond.end: 10599 // CHECK11-NEXT: ret void 10600 // 10601 // 10602 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l407.omp_outlined.omp_outlined 10603 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10604 // CHECK11-NEXT: entry: 10605 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10606 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10607 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10608 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10609 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 10610 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10611 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10612 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10613 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10614 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10615 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10616 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10617 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10618 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10619 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10620 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10621 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10622 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10623 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10624 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10625 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10626 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10627 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 10628 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10629 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10630 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10631 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 10632 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10633 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 10634 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 10635 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 10636 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 10637 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10638 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10639 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10640 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10641 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10642 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 10643 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10644 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10645 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10646 // CHECK11: omp.precond.then: 10647 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10648 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10649 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 10650 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10651 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10652 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 10653 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 10654 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10655 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10656 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10657 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 10658 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10659 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10660 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10661 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10662 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10663 // CHECK11: cond.true: 10664 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10665 // CHECK11-NEXT: br label [[COND_END:%.*]] 10666 // CHECK11: cond.false: 10667 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10668 // CHECK11-NEXT: br label [[COND_END]] 10669 // CHECK11: cond.end: 10670 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10671 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10672 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10673 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 10674 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10675 // CHECK11: omp.inner.for.cond: 10676 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 10677 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP30]] 10678 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10679 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10680 // CHECK11: omp.inner.for.body: 10681 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 10682 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 10683 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10684 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP30]] 10685 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP30]] 10686 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP30]] 10687 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 10688 // CHECK11-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP30]] 10689 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP30]] 10690 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP30]] 10691 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 10692 // CHECK11-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP30]] 10693 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 10694 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP30]] 10695 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP30]] 10696 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 10697 // CHECK11-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP30]] 10698 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10699 // CHECK11: omp.body.continue: 10700 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10701 // CHECK11: omp.inner.for.inc: 10702 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 10703 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 10704 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]] 10705 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]] 10706 // CHECK11: omp.inner.for.end: 10707 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10708 // CHECK11: omp.loop.exit: 10709 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10710 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 10711 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 10712 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10713 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 10714 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10715 // CHECK11: .omp.final.then: 10716 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10717 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 10718 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 10719 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 10720 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 10721 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 10722 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 10723 // CHECK11: .omp.final.done: 10724 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10725 // CHECK11: omp.precond.end: 10726 // CHECK11-NEXT: ret void 10727 // 10728 // 10729 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446 10730 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 10731 // CHECK11-NEXT: entry: 10732 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 10733 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 10734 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10735 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10736 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10737 // CHECK11-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 10738 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 10739 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10740 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10741 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10742 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 10743 // CHECK11-NEXT: ret void 10744 // 10745 // 10746 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined 10747 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10748 // CHECK11-NEXT: entry: 10749 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10750 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10751 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 10752 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 10753 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10754 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10755 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10756 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10757 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10758 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10759 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10760 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10761 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10762 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10763 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10764 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10765 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10766 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10767 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10768 // CHECK11-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 10769 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 10770 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10771 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10772 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10773 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 10774 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 10775 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10776 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 10777 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 10778 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4 10779 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 10780 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10781 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 10782 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10783 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10784 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10785 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 10786 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10787 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 10788 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10789 // CHECK11: omp.precond.then: 10790 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 10791 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10792 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_COMB_UB]], align 4 10793 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10794 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10795 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4 10796 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10797 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 10798 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 10799 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10800 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10801 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10802 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10803 // CHECK11: cond.true: 10804 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10805 // CHECK11-NEXT: br label [[COND_END:%.*]] 10806 // CHECK11: cond.false: 10807 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 10808 // CHECK11-NEXT: br label [[COND_END]] 10809 // CHECK11: cond.end: 10810 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10811 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 10812 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 10813 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 10814 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10815 // CHECK11: omp.inner.for.cond: 10816 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 10817 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP33]] 10818 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 10819 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 10820 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10821 // CHECK11: omp.inner.for.body: 10822 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP33]] 10823 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 10824 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]), !llvm.access.group [[ACC_GRP33]] 10825 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10826 // CHECK11: omp.inner.for.inc: 10827 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 10828 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP33]] 10829 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 10830 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 10831 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP33]] 10832 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP33]] 10833 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 10834 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP33]] 10835 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 10836 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP33]] 10837 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 10838 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 10839 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 10840 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP33]] 10841 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 10842 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 10843 // CHECK11: cond.true10: 10844 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP33]] 10845 // CHECK11-NEXT: br label [[COND_END12:%.*]] 10846 // CHECK11: cond.false11: 10847 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 10848 // CHECK11-NEXT: br label [[COND_END12]] 10849 // CHECK11: cond.end12: 10850 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 10851 // CHECK11-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP33]] 10852 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP33]] 10853 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]] 10854 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]] 10855 // CHECK11: omp.inner.for.end: 10856 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10857 // CHECK11: omp.loop.exit: 10858 // CHECK11-NEXT: [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10859 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4 10860 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]]) 10861 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10862 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 10863 // CHECK11-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10864 // CHECK11: .omp.final.then: 10865 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10866 // CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP36]], 0 10867 // CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 10868 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1 10869 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]] 10870 // CHECK11-NEXT: store i32 [[ADD16]], ptr [[I3]], align 4 10871 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 10872 // CHECK11: .omp.final.done: 10873 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 10874 // CHECK11: omp.precond.end: 10875 // CHECK11-NEXT: ret void 10876 // 10877 // 10878 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l446.omp_outlined.omp_outlined 10879 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 10880 // CHECK11-NEXT: entry: 10881 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 10882 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 10883 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 10884 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 10885 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 10886 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 10887 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 10888 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 10889 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10890 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 10891 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10892 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10893 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 10894 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10895 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10896 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10897 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10898 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 10899 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 10900 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 10901 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10902 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10903 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 10904 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 10905 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 10906 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 10907 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 10908 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 10909 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 10910 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 10911 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 10912 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 10913 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10914 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 10915 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10916 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10917 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 10918 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 10919 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10920 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 10921 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10922 // CHECK11: omp.precond.then: 10923 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 10924 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10925 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 10926 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 10927 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 10928 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 10929 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 10930 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 10931 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 10932 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10933 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 10934 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 10935 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10936 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10937 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 10938 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10939 // CHECK11: cond.true: 10940 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 10941 // CHECK11-NEXT: br label [[COND_END:%.*]] 10942 // CHECK11: cond.false: 10943 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 10944 // CHECK11-NEXT: br label [[COND_END]] 10945 // CHECK11: cond.end: 10946 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 10947 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 10948 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 10949 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 10950 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10951 // CHECK11: omp.inner.for.cond: 10952 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 10953 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP36]] 10954 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 10955 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10956 // CHECK11: omp.inner.for.body: 10957 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 10958 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 10959 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10960 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP36]] 10961 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP36]] 10962 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP36]] 10963 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 10964 // CHECK11-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP36]] 10965 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP36]] 10966 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP36]] 10967 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 10968 // CHECK11-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP36]] 10969 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 10970 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP36]] 10971 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP36]] 10972 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 10973 // CHECK11-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP36]] 10974 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10975 // CHECK11: omp.body.continue: 10976 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10977 // CHECK11: omp.inner.for.inc: 10978 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 10979 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 10980 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]] 10981 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]] 10982 // CHECK11: omp.inner.for.end: 10983 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10984 // CHECK11: omp.loop.exit: 10985 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 10986 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 10987 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 10988 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 10989 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 10990 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 10991 // CHECK11: .omp.final.then: 10992 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 10993 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 10994 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 10995 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 10996 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 10997 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 10998 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 10999 // CHECK11: .omp.final.done: 11000 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11001 // CHECK11: omp.precond.end: 11002 // CHECK11-NEXT: ret void 11003 // 11004 // 11005 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477 11006 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 11007 // CHECK11-NEXT: entry: 11008 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11009 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11010 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11011 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11012 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 11013 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11014 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11015 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11016 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 11017 // CHECK11-NEXT: ret void 11018 // 11019 // 11020 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined 11021 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11022 // CHECK11-NEXT: entry: 11023 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11024 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11025 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11026 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11027 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11028 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11029 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11030 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11031 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11032 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11033 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11034 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11035 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11036 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11037 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11038 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11039 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11040 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11041 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11042 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11043 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11044 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11045 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11046 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11047 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11048 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11049 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 11050 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 11051 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11052 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11053 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11054 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11055 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11056 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11057 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11058 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11059 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11060 // CHECK11: omp.precond.then: 11061 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11062 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11063 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 11064 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11065 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11066 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11067 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 11068 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11069 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11070 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11071 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11072 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11073 // CHECK11: cond.true: 11074 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11075 // CHECK11-NEXT: br label [[COND_END:%.*]] 11076 // CHECK11: cond.false: 11077 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11078 // CHECK11-NEXT: br label [[COND_END]] 11079 // CHECK11: cond.end: 11080 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11081 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11082 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11083 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 11084 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11085 // CHECK11: omp.inner.for.cond: 11086 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 11087 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 11088 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11089 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11090 // CHECK11: omp.inner.for.body: 11091 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP39]] 11092 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP39]] 11093 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP39]] 11094 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11095 // CHECK11: omp.inner.for.inc: 11096 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 11097 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP39]] 11098 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 11099 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]] 11100 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]] 11101 // CHECK11: omp.inner.for.end: 11102 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11103 // CHECK11: omp.loop.exit: 11104 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11105 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 11106 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 11107 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11108 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 11109 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11110 // CHECK11: .omp.final.then: 11111 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11112 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 11113 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 11114 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 11115 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 11116 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 11117 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11118 // CHECK11: .omp.final.done: 11119 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11120 // CHECK11: omp.precond.end: 11121 // CHECK11-NEXT: ret void 11122 // 11123 // 11124 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l477.omp_outlined.omp_outlined 11125 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11126 // CHECK11-NEXT: entry: 11127 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11128 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11129 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11130 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11131 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11132 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11133 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11134 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11135 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11136 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11137 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11138 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11139 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11140 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11141 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11142 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11143 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11144 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11145 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11146 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11147 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11148 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11149 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11150 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11151 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11152 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11153 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11154 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11155 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11156 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11157 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 11158 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 11159 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11160 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11161 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11162 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11163 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11164 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11165 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11166 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11167 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11168 // CHECK11: omp.precond.then: 11169 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11170 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11171 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 11172 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11173 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11174 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 11175 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 11176 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11177 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11178 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11179 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 11180 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11181 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11182 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11183 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11184 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11185 // CHECK11: cond.true: 11186 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11187 // CHECK11-NEXT: br label [[COND_END:%.*]] 11188 // CHECK11: cond.false: 11189 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11190 // CHECK11-NEXT: br label [[COND_END]] 11191 // CHECK11: cond.end: 11192 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11193 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11194 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11195 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 11196 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11197 // CHECK11: omp.inner.for.cond: 11198 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 11199 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP42]] 11200 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11201 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11202 // CHECK11: omp.inner.for.body: 11203 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 11204 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11205 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11206 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP42]] 11207 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP42]] 11208 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP42]] 11209 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP20]], i32 [[TMP21]] 11210 // CHECK11-NEXT: [[TMP22:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP42]] 11211 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP42]] 11212 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP42]] 11213 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 11214 // CHECK11-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP42]] 11215 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP22]], [[TMP25]] 11216 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP42]] 11217 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP42]] 11218 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 11219 // CHECK11-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP42]] 11220 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11221 // CHECK11: omp.body.continue: 11222 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11223 // CHECK11: omp.inner.for.inc: 11224 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 11225 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 11226 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]] 11227 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]] 11228 // CHECK11: omp.inner.for.end: 11229 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11230 // CHECK11: omp.loop.exit: 11231 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11232 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 11233 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 11234 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11235 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 11236 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11237 // CHECK11: .omp.final.then: 11238 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11239 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 11240 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 11241 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 11242 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 11243 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 11244 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11245 // CHECK11: .omp.final.done: 11246 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11247 // CHECK11: omp.precond.end: 11248 // CHECK11-NEXT: ret void 11249 // 11250 // 11251 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505 11252 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 11253 // CHECK11-NEXT: entry: 11254 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 11255 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11256 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11257 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11258 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11259 // CHECK11-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 11260 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 11261 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11262 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11263 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11264 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 11265 // CHECK11-NEXT: ret void 11266 // 11267 // 11268 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined 11269 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11270 // CHECK11-NEXT: entry: 11271 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11272 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11273 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 11274 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11275 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11276 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11277 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11278 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11279 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11280 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11281 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11282 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11283 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11284 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11285 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11286 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11287 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11288 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 11289 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 11290 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11291 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11292 // CHECK11-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 11293 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11294 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11295 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11296 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11297 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 11298 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11299 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11300 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11301 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11302 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 11303 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 11304 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 11305 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11306 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11307 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 11308 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11309 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11310 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11311 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11312 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11313 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 11314 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11315 // CHECK11: omp.precond.then: 11316 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11317 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11318 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 11319 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11320 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11321 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11322 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 11323 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11324 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11325 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11326 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11327 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11328 // CHECK11: cond.true: 11329 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11330 // CHECK11-NEXT: br label [[COND_END:%.*]] 11331 // CHECK11: cond.false: 11332 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11333 // CHECK11-NEXT: br label [[COND_END]] 11334 // CHECK11: cond.end: 11335 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11336 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11337 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11338 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 11339 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11340 // CHECK11: omp.inner.for.cond: 11341 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]] 11342 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP45]] 11343 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11344 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11345 // CHECK11: omp.inner.for.body: 11346 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP45]] 11347 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP45]] 11348 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP45]] 11349 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP45]] 11350 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP45]] 11351 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i32 [[TMP22]]), !llvm.access.group [[ACC_GRP45]] 11352 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11353 // CHECK11: omp.inner.for.inc: 11354 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 11355 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP45]] 11356 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 11357 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]] 11358 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]] 11359 // CHECK11: omp.inner.for.end: 11360 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11361 // CHECK11: omp.loop.exit: 11362 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11363 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 11364 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 11365 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11366 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 11367 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11368 // CHECK11: .omp.final.then: 11369 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11370 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 11371 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 11372 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 11373 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 11374 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 11375 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11376 // CHECK11: .omp.final.done: 11377 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11378 // CHECK11: omp.precond.end: 11379 // CHECK11-NEXT: ret void 11380 // 11381 // 11382 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l505.omp_outlined.omp_outlined 11383 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 11384 // CHECK11-NEXT: entry: 11385 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11386 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11387 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11388 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11389 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11390 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11391 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11392 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11393 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 11394 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11395 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11396 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11397 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11398 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11399 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11400 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11401 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11402 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11403 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 11404 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11405 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11406 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11407 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11408 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11409 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11410 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11411 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11412 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11413 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11414 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11415 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11416 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11417 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 11418 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11419 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11420 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11421 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11422 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11423 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11424 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11425 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11426 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11427 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11428 // CHECK11: omp.precond.then: 11429 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11430 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11431 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 11432 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11433 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11434 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 11435 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 11436 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11437 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11438 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11439 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11440 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 11441 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 11442 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11443 // CHECK11: omp.dispatch.cond: 11444 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11445 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11446 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 11447 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11448 // CHECK11: cond.true: 11449 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11450 // CHECK11-NEXT: br label [[COND_END:%.*]] 11451 // CHECK11: cond.false: 11452 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11453 // CHECK11-NEXT: br label [[COND_END]] 11454 // CHECK11: cond.end: 11455 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 11456 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 11457 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11458 // CHECK11-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 11459 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 11460 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11461 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 11462 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11463 // CHECK11: omp.dispatch.body: 11464 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11465 // CHECK11: omp.inner.for.cond: 11466 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48:![0-9]+]] 11467 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP48]] 11468 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 11469 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11470 // CHECK11: omp.inner.for.body: 11471 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 11472 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 11473 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11474 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP48]] 11475 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP48]] 11476 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP48]] 11477 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP23]], i32 [[TMP24]] 11478 // CHECK11-NEXT: [[TMP25:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP48]] 11479 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP48]] 11480 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP48]] 11481 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 11482 // CHECK11-NEXT: [[TMP28:%.*]] = load double, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP48]] 11483 // CHECK11-NEXT: [[ADD9:%.*]] = fadd double [[TMP25]], [[TMP28]] 11484 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP48]] 11485 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP48]] 11486 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, ptr [[TMP29]], i32 [[TMP30]] 11487 // CHECK11-NEXT: store double [[ADD9]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP48]] 11488 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11489 // CHECK11: omp.body.continue: 11490 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11491 // CHECK11: omp.inner.for.inc: 11492 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 11493 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 11494 // CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]] 11495 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]] 11496 // CHECK11: omp.inner.for.end: 11497 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11498 // CHECK11: omp.dispatch.inc: 11499 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11500 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11501 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 11502 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 4 11503 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11504 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 11505 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 11506 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 4 11507 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 11508 // CHECK11: omp.dispatch.end: 11509 // CHECK11-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11510 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 11511 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP37]]) 11512 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11513 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 11514 // CHECK11-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11515 // CHECK11: .omp.final.then: 11516 // CHECK11-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11517 // CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP40]], 0 11518 // CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 11519 // CHECK11-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 1 11520 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL16]] 11521 // CHECK11-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 11522 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11523 // CHECK11: .omp.final.done: 11524 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11525 // CHECK11: omp.precond.end: 11526 // CHECK11-NEXT: ret void 11527 // 11528 // 11529 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535 11530 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 11531 // CHECK11-NEXT: entry: 11532 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11533 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11534 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11535 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11536 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 11537 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11538 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11539 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11540 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 11541 // CHECK11-NEXT: ret void 11542 // 11543 // 11544 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined 11545 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11546 // CHECK11-NEXT: entry: 11547 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11548 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11549 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11550 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11551 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11552 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11553 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11554 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11555 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11556 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11557 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11558 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11559 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11560 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11561 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11562 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11563 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11564 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11565 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11566 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11567 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11568 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11569 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11570 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11571 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11572 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11573 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 11574 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 11575 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11576 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11577 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11578 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11579 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11580 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11581 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11582 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11583 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11584 // CHECK11: omp.precond.then: 11585 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11586 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11587 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 11588 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11589 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11590 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11591 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 11592 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11593 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11594 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11595 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11596 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11597 // CHECK11: cond.true: 11598 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11599 // CHECK11-NEXT: br label [[COND_END:%.*]] 11600 // CHECK11: cond.false: 11601 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11602 // CHECK11-NEXT: br label [[COND_END]] 11603 // CHECK11: cond.end: 11604 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11605 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11606 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11607 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 11608 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11609 // CHECK11: omp.inner.for.cond: 11610 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51:![0-9]+]] 11611 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP51]] 11612 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 11613 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11614 // CHECK11: omp.inner.for.body: 11615 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP51]] 11616 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP51]] 11617 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP51]] 11618 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11619 // CHECK11: omp.inner.for.inc: 11620 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 11621 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP51]] 11622 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 11623 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]] 11624 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]] 11625 // CHECK11: omp.inner.for.end: 11626 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11627 // CHECK11: omp.loop.exit: 11628 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11629 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 11630 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 11631 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11632 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 11633 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11634 // CHECK11: .omp.final.then: 11635 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11636 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 11637 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 11638 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 11639 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 11640 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 11641 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11642 // CHECK11: .omp.final.done: 11643 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11644 // CHECK11: omp.precond.end: 11645 // CHECK11-NEXT: ret void 11646 // 11647 // 11648 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l535.omp_outlined.omp_outlined 11649 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11650 // CHECK11-NEXT: entry: 11651 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11652 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11653 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11654 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11655 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11656 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11657 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11658 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11659 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11660 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11661 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11662 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11663 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11664 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11665 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11666 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11667 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11668 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 11669 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11670 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11671 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11672 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11673 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11674 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11675 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11676 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11677 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11678 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11679 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11680 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11681 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 11682 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 11683 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11684 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11685 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11686 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11687 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11688 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11689 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11690 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11691 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11692 // CHECK11: omp.precond.then: 11693 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11694 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11695 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 11696 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11697 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11698 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 11699 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 11700 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11701 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11702 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11703 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11704 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11705 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 11706 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 11707 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11708 // CHECK11: omp.dispatch.cond: 11709 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11710 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 11711 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 11712 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 11713 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11714 // CHECK11: omp.dispatch.body: 11715 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11716 // CHECK11-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 11717 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11718 // CHECK11: omp.inner.for.cond: 11719 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]] 11720 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP54]] 11721 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 11722 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11723 // CHECK11: omp.inner.for.body: 11724 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 11725 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 11726 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11727 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP54]] 11728 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP54]] 11729 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP54]] 11730 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP21]], i32 [[TMP22]] 11731 // CHECK11-NEXT: [[TMP23:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP54]] 11732 // CHECK11-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP54]] 11733 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP54]] 11734 // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[TMP24]], i32 [[TMP25]] 11735 // CHECK11-NEXT: [[TMP26:%.*]] = load double, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP54]] 11736 // CHECK11-NEXT: [[ADD6:%.*]] = fadd double [[TMP23]], [[TMP26]] 11737 // CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP54]] 11738 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP54]] 11739 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, ptr [[TMP27]], i32 [[TMP28]] 11740 // CHECK11-NEXT: store double [[ADD6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP54]] 11741 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11742 // CHECK11: omp.body.continue: 11743 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11744 // CHECK11: omp.inner.for.inc: 11745 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 11746 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 11747 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]] 11748 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]] 11749 // CHECK11: omp.inner.for.end: 11750 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11751 // CHECK11: omp.dispatch.inc: 11752 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 11753 // CHECK11: omp.dispatch.end: 11754 // CHECK11-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11755 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 11756 // CHECK11-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP31]]) 11757 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11758 // CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 11759 // CHECK11-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11760 // CHECK11: .omp.final.then: 11761 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 11762 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP34]], 0 11763 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 11764 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 11765 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 11766 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[I3]], align 4 11767 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11768 // CHECK11: .omp.final.done: 11769 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11770 // CHECK11: omp.precond.end: 11771 // CHECK11-NEXT: ret void 11772 // 11773 // 11774 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561 11775 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 11776 // CHECK11-NEXT: entry: 11777 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 11778 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11779 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11780 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11781 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11782 // CHECK11-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 11783 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 11784 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11785 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11786 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11787 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 11788 // CHECK11-NEXT: ret void 11789 // 11790 // 11791 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined 11792 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 11793 // CHECK11-NEXT: entry: 11794 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11795 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11796 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 11797 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11798 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11799 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11800 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11801 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11802 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11803 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11804 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11805 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11806 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11807 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11808 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11809 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11810 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11811 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 11812 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 11813 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11814 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11815 // CHECK11-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 11816 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11817 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11818 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11819 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11820 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 11821 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11822 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11823 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11824 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11825 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 11826 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 11827 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 11828 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11829 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11830 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 11831 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11832 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11833 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11834 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11835 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11836 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 11837 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11838 // CHECK11: omp.precond.then: 11839 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 11840 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11841 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 11842 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11843 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11844 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11845 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 11846 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 11847 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11848 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11849 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 11850 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11851 // CHECK11: cond.true: 11852 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11853 // CHECK11-NEXT: br label [[COND_END:%.*]] 11854 // CHECK11: cond.false: 11855 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 11856 // CHECK11-NEXT: br label [[COND_END]] 11857 // CHECK11: cond.end: 11858 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 11859 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 11860 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 11861 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 11862 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11863 // CHECK11: omp.inner.for.cond: 11864 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]] 11865 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP57]] 11866 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11867 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11868 // CHECK11: omp.inner.for.body: 11869 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP57]] 11870 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP57]] 11871 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP57]] 11872 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP57]] 11873 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP57]] 11874 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i32 [[TMP22]]), !llvm.access.group [[ACC_GRP57]] 11875 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11876 // CHECK11: omp.inner.for.inc: 11877 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 11878 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP57]] 11879 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 11880 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]] 11881 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]] 11882 // CHECK11: omp.inner.for.end: 11883 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11884 // CHECK11: omp.loop.exit: 11885 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11886 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 11887 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 11888 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 11889 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 11890 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 11891 // CHECK11: .omp.final.then: 11892 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11893 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 11894 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 11895 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 11896 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 11897 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 11898 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 11899 // CHECK11: .omp.final.done: 11900 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 11901 // CHECK11: omp.precond.end: 11902 // CHECK11-NEXT: ret void 11903 // 11904 // 11905 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l561.omp_outlined.omp_outlined 11906 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 11907 // CHECK11-NEXT: entry: 11908 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 11909 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 11910 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11911 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11912 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 11913 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 11914 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 11915 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 11916 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 11917 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11918 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 11919 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11920 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11921 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 11922 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11923 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11924 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11925 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11926 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 11927 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 11928 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 11929 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11930 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11931 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 11932 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 11933 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 11934 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 11935 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11936 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 11937 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 11938 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 11939 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 11940 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 11941 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 11942 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11943 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 11944 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11945 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11946 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 11947 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 11948 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 11949 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 11950 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11951 // CHECK11: omp.precond.then: 11952 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 11953 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 11954 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 11955 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 11956 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 11957 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 11958 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 11959 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 11960 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 11961 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 11962 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11963 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 11964 // CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11965 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 11966 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 11967 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11968 // CHECK11: omp.dispatch.cond: 11969 // CHECK11-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 11970 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 11971 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP16]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 11972 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 11973 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11974 // CHECK11: omp.dispatch.body: 11975 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 11976 // CHECK11-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 11977 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11978 // CHECK11: omp.inner.for.cond: 11979 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP60:![0-9]+]] 11980 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP60]] 11981 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 11982 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11983 // CHECK11: omp.inner.for.body: 11984 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP60]] 11985 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 11986 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11987 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP60]] 11988 // CHECK11-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP60]] 11989 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP60]] 11990 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP22]], i32 [[TMP23]] 11991 // CHECK11-NEXT: [[TMP24:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP60]] 11992 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP60]] 11993 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP60]] 11994 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP25]], i32 [[TMP26]] 11995 // CHECK11-NEXT: [[TMP27:%.*]] = load double, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP60]] 11996 // CHECK11-NEXT: [[ADD7:%.*]] = fadd double [[TMP24]], [[TMP27]] 11997 // CHECK11-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP60]] 11998 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP60]] 11999 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds double, ptr [[TMP28]], i32 [[TMP29]] 12000 // CHECK11-NEXT: store double [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP60]] 12001 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12002 // CHECK11: omp.body.continue: 12003 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12004 // CHECK11: omp.inner.for.inc: 12005 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP60]] 12006 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 12007 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP60]] 12008 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP61:![0-9]+]] 12009 // CHECK11: omp.inner.for.end: 12010 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12011 // CHECK11: omp.dispatch.inc: 12012 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 12013 // CHECK11: omp.dispatch.end: 12014 // CHECK11-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12015 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 12016 // CHECK11-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP32]]) 12017 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12018 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 12019 // CHECK11-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12020 // CHECK11: .omp.final.then: 12021 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12022 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP35]], 0 12023 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 12024 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 12025 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 12026 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I4]], align 4 12027 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 12028 // CHECK11: .omp.final.done: 12029 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12030 // CHECK11: omp.precond.end: 12031 // CHECK11-NEXT: ret void 12032 // 12033 // 12034 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 12035 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] comdat { 12036 // CHECK11-NEXT: entry: 12037 // CHECK11-NEXT: [[A:%.*]] = alloca ptr, align 4 12038 // CHECK11-NEXT: [[B:%.*]] = alloca ptr, align 4 12039 // CHECK11-NEXT: [[C:%.*]] = alloca ptr, align 4 12040 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 12041 // CHECK11-NEXT: [[CH:%.*]] = alloca i32, align 4 12042 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12043 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 12044 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 12045 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 12046 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12047 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12048 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12049 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 12050 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 12051 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [4 x ptr], align 4 12052 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [4 x ptr], align 4 12053 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [4 x ptr], align 4 12054 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca i32, align 4 12055 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i32, align 4 12056 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 12057 // CHECK11-NEXT: [[KERNEL_ARGS14:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12058 // CHECK11-NEXT: [[CH_CASTED:%.*]] = alloca i32, align 4 12059 // CHECK11-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 12060 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [5 x ptr], align 4 12061 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [5 x ptr], align 4 12062 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [5 x ptr], align 4 12063 // CHECK11-NEXT: [[_TMP21:%.*]] = alloca i32, align 4 12064 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 12065 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 12066 // CHECK11-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12067 // CHECK11-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 12068 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [4 x ptr], align 4 12069 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [4 x ptr], align 4 12070 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [4 x ptr], align 4 12071 // CHECK11-NEXT: [[_TMP35:%.*]] = alloca i32, align 4 12072 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_36:%.*]] = alloca i32, align 4 12073 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 12074 // CHECK11-NEXT: [[KERNEL_ARGS42:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12075 // CHECK11-NEXT: [[CH_CASTED45:%.*]] = alloca i32, align 4 12076 // CHECK11-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 12077 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [5 x ptr], align 4 12078 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [5 x ptr], align 4 12079 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [5 x ptr], align 4 12080 // CHECK11-NEXT: [[_TMP50:%.*]] = alloca i32, align 4 12081 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_51:%.*]] = alloca i32, align 4 12082 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 12083 // CHECK11-NEXT: [[KERNEL_ARGS57:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12084 // CHECK11-NEXT: [[N_CASTED60:%.*]] = alloca i32, align 4 12085 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS61:%.*]] = alloca [4 x ptr], align 4 12086 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS62:%.*]] = alloca [4 x ptr], align 4 12087 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS63:%.*]] = alloca [4 x ptr], align 4 12088 // CHECK11-NEXT: [[_TMP64:%.*]] = alloca i32, align 4 12089 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_65:%.*]] = alloca i32, align 4 12090 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_66:%.*]] = alloca i32, align 4 12091 // CHECK11-NEXT: [[KERNEL_ARGS71:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12092 // CHECK11-NEXT: [[CH_CASTED74:%.*]] = alloca i32, align 4 12093 // CHECK11-NEXT: [[N_CASTED75:%.*]] = alloca i32, align 4 12094 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS76:%.*]] = alloca [5 x ptr], align 4 12095 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS77:%.*]] = alloca [5 x ptr], align 4 12096 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS78:%.*]] = alloca [5 x ptr], align 4 12097 // CHECK11-NEXT: [[_TMP79:%.*]] = alloca i32, align 4 12098 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_80:%.*]] = alloca i32, align 4 12099 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_81:%.*]] = alloca i32, align 4 12100 // CHECK11-NEXT: [[KERNEL_ARGS86:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 12101 // CHECK11-NEXT: store i32 10000, ptr [[N]], align 4 12102 // CHECK11-NEXT: store i32 100, ptr [[CH]], align 4 12103 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 12104 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[N_CASTED]], align 4 12105 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_CASTED]], align 4 12106 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 4 12107 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B]], align 4 12108 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C]], align 4 12109 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12110 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP5]], align 4 12111 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12112 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP6]], align 4 12113 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 12114 // CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 4 12115 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 12116 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 4 12117 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 12118 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP9]], align 4 12119 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 12120 // CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 4 12121 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 12122 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP11]], align 4 12123 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 12124 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP12]], align 4 12125 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 12126 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 12127 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 12128 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP14]], align 4 12129 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 12130 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 4 12131 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 12132 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 12133 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12134 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12135 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4 12136 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4 12137 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12138 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 12139 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12140 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12141 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12142 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12143 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1 12144 // CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64 12145 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 12146 // CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 4 12147 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 12148 // CHECK11-NEXT: store i32 4, ptr [[TMP24]], align 4 12149 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 12150 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP25]], align 4 12151 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 12152 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP26]], align 4 12153 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 12154 // CHECK11-NEXT: store ptr @.offload_sizes.13, ptr [[TMP27]], align 4 12155 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 12156 // CHECK11-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP28]], align 4 12157 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 12158 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4 12159 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 12160 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4 12161 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 12162 // CHECK11-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8 12163 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 12164 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8 12165 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 12166 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4 12167 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 12168 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4 12169 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 12170 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4 12171 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.region_id, ptr [[KERNEL_ARGS]]) 12172 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 12173 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12174 // CHECK11: omp_offload.failed: 12175 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42(i32 [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]) #[[ATTR2]] 12176 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 12177 // CHECK11: omp_offload.cont: 12178 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4 12179 // CHECK11-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4 12180 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4 12181 // CHECK11-NEXT: [[TMP40:%.*]] = load ptr, ptr [[A]], align 4 12182 // CHECK11-NEXT: [[TMP41:%.*]] = load ptr, ptr [[B]], align 4 12183 // CHECK11-NEXT: [[TMP42:%.*]] = load ptr, ptr [[C]], align 4 12184 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12185 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4 12186 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12187 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP44]], align 4 12188 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 12189 // CHECK11-NEXT: store ptr null, ptr [[TMP45]], align 4 12190 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 12191 // CHECK11-NEXT: store ptr [[TMP40]], ptr [[TMP46]], align 4 12192 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 12193 // CHECK11-NEXT: store ptr [[TMP40]], ptr [[TMP47]], align 4 12194 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 12195 // CHECK11-NEXT: store ptr null, ptr [[TMP48]], align 4 12196 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 12197 // CHECK11-NEXT: store ptr [[TMP41]], ptr [[TMP49]], align 4 12198 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 12199 // CHECK11-NEXT: store ptr [[TMP41]], ptr [[TMP50]], align 4 12200 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 12201 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4 12202 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 3 12203 // CHECK11-NEXT: store ptr [[TMP42]], ptr [[TMP52]], align 4 12204 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 3 12205 // CHECK11-NEXT: store ptr [[TMP42]], ptr [[TMP53]], align 4 12206 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 3 12207 // CHECK11-NEXT: store ptr null, ptr [[TMP54]], align 4 12208 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12209 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12210 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, ptr [[N]], align 4 12211 // CHECK11-NEXT: store i32 [[TMP57]], ptr [[DOTCAPTURE_EXPR_8]], align 4 12212 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_8]], align 4 12213 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP58]], 0 12214 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 12215 // CHECK11-NEXT: [[SUB12:%.*]] = sub nsw i32 [[DIV11]], 1 12216 // CHECK11-NEXT: store i32 [[SUB12]], ptr [[DOTCAPTURE_EXPR_9]], align 4 12217 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4 12218 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP59]], 1 12219 // CHECK11-NEXT: [[TMP60:%.*]] = zext i32 [[ADD13]] to i64 12220 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 0 12221 // CHECK11-NEXT: store i32 3, ptr [[TMP61]], align 4 12222 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 1 12223 // CHECK11-NEXT: store i32 4, ptr [[TMP62]], align 4 12224 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 2 12225 // CHECK11-NEXT: store ptr [[TMP55]], ptr [[TMP63]], align 4 12226 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 3 12227 // CHECK11-NEXT: store ptr [[TMP56]], ptr [[TMP64]], align 4 12228 // CHECK11-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 4 12229 // CHECK11-NEXT: store ptr @.offload_sizes.15, ptr [[TMP65]], align 4 12230 // CHECK11-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 5 12231 // CHECK11-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP66]], align 4 12232 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 6 12233 // CHECK11-NEXT: store ptr null, ptr [[TMP67]], align 4 12234 // CHECK11-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 7 12235 // CHECK11-NEXT: store ptr null, ptr [[TMP68]], align 4 12236 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 8 12237 // CHECK11-NEXT: store i64 [[TMP60]], ptr [[TMP69]], align 8 12238 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 9 12239 // CHECK11-NEXT: store i64 0, ptr [[TMP70]], align 8 12240 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 10 12241 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP71]], align 4 12242 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 11 12243 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP72]], align 4 12244 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS14]], i32 0, i32 12 12245 // CHECK11-NEXT: store i32 0, ptr [[TMP73]], align 4 12246 // CHECK11-NEXT: [[TMP74:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.region_id, ptr [[KERNEL_ARGS14]]) 12247 // CHECK11-NEXT: [[TMP75:%.*]] = icmp ne i32 [[TMP74]], 0 12248 // CHECK11-NEXT: br i1 [[TMP75]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 12249 // CHECK11: omp_offload.failed15: 12250 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50(i32 [[TMP39]], ptr [[TMP40]], ptr [[TMP41]], ptr [[TMP42]]) #[[ATTR2]] 12251 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 12252 // CHECK11: omp_offload.cont16: 12253 // CHECK11-NEXT: [[TMP76:%.*]] = load i32, ptr [[CH]], align 4 12254 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[CH_CASTED]], align 4 12255 // CHECK11-NEXT: [[TMP77:%.*]] = load i32, ptr [[CH_CASTED]], align 4 12256 // CHECK11-NEXT: [[TMP78:%.*]] = load i32, ptr [[N]], align 4 12257 // CHECK11-NEXT: store i32 [[TMP78]], ptr [[N_CASTED17]], align 4 12258 // CHECK11-NEXT: [[TMP79:%.*]] = load i32, ptr [[N_CASTED17]], align 4 12259 // CHECK11-NEXT: [[TMP80:%.*]] = load ptr, ptr [[A]], align 4 12260 // CHECK11-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 4 12261 // CHECK11-NEXT: [[TMP82:%.*]] = load ptr, ptr [[C]], align 4 12262 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 12263 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[TMP83]], align 4 12264 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 12265 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[TMP84]], align 4 12266 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 12267 // CHECK11-NEXT: store ptr null, ptr [[TMP85]], align 4 12268 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 12269 // CHECK11-NEXT: store i32 [[TMP79]], ptr [[TMP86]], align 4 12270 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 12271 // CHECK11-NEXT: store i32 [[TMP79]], ptr [[TMP87]], align 4 12272 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 12273 // CHECK11-NEXT: store ptr null, ptr [[TMP88]], align 4 12274 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 12275 // CHECK11-NEXT: store ptr [[TMP80]], ptr [[TMP89]], align 4 12276 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 12277 // CHECK11-NEXT: store ptr [[TMP80]], ptr [[TMP90]], align 4 12278 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 12279 // CHECK11-NEXT: store ptr null, ptr [[TMP91]], align 4 12280 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 12281 // CHECK11-NEXT: store ptr [[TMP81]], ptr [[TMP92]], align 4 12282 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 12283 // CHECK11-NEXT: store ptr [[TMP81]], ptr [[TMP93]], align 4 12284 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 12285 // CHECK11-NEXT: store ptr null, ptr [[TMP94]], align 4 12286 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 4 12287 // CHECK11-NEXT: store ptr [[TMP82]], ptr [[TMP95]], align 4 12288 // CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 4 12289 // CHECK11-NEXT: store ptr [[TMP82]], ptr [[TMP96]], align 4 12290 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 4 12291 // CHECK11-NEXT: store ptr null, ptr [[TMP97]], align 4 12292 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 12293 // CHECK11-NEXT: [[TMP99:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 12294 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, ptr [[N]], align 4 12295 // CHECK11-NEXT: store i32 [[TMP100]], ptr [[DOTCAPTURE_EXPR_22]], align 4 12296 // CHECK11-NEXT: [[TMP101:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4 12297 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP101]], 0 12298 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1 12299 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[DIV25]], 1 12300 // CHECK11-NEXT: store i32 [[SUB26]], ptr [[DOTCAPTURE_EXPR_23]], align 4 12301 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_23]], align 4 12302 // CHECK11-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP102]], 1 12303 // CHECK11-NEXT: [[TMP103:%.*]] = zext i32 [[ADD27]] to i64 12304 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0 12305 // CHECK11-NEXT: store i32 3, ptr [[TMP104]], align 4 12306 // CHECK11-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1 12307 // CHECK11-NEXT: store i32 5, ptr [[TMP105]], align 4 12308 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2 12309 // CHECK11-NEXT: store ptr [[TMP98]], ptr [[TMP106]], align 4 12310 // CHECK11-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3 12311 // CHECK11-NEXT: store ptr [[TMP99]], ptr [[TMP107]], align 4 12312 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4 12313 // CHECK11-NEXT: store ptr @.offload_sizes.17, ptr [[TMP108]], align 4 12314 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5 12315 // CHECK11-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP109]], align 4 12316 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6 12317 // CHECK11-NEXT: store ptr null, ptr [[TMP110]], align 4 12318 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7 12319 // CHECK11-NEXT: store ptr null, ptr [[TMP111]], align 4 12320 // CHECK11-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8 12321 // CHECK11-NEXT: store i64 [[TMP103]], ptr [[TMP112]], align 8 12322 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9 12323 // CHECK11-NEXT: store i64 0, ptr [[TMP113]], align 8 12324 // CHECK11-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10 12325 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP114]], align 4 12326 // CHECK11-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11 12327 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4 12328 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12 12329 // CHECK11-NEXT: store i32 0, ptr [[TMP116]], align 4 12330 // CHECK11-NEXT: [[TMP117:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.region_id, ptr [[KERNEL_ARGS28]]) 12331 // CHECK11-NEXT: [[TMP118:%.*]] = icmp ne i32 [[TMP117]], 0 12332 // CHECK11-NEXT: br i1 [[TMP118]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 12333 // CHECK11: omp_offload.failed29: 12334 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58(i32 [[TMP77]], i32 [[TMP79]], ptr [[TMP80]], ptr [[TMP81]], ptr [[TMP82]]) #[[ATTR2]] 12335 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT30]] 12336 // CHECK11: omp_offload.cont30: 12337 // CHECK11-NEXT: [[TMP119:%.*]] = load i32, ptr [[N]], align 4 12338 // CHECK11-NEXT: store i32 [[TMP119]], ptr [[N_CASTED31]], align 4 12339 // CHECK11-NEXT: [[TMP120:%.*]] = load i32, ptr [[N_CASTED31]], align 4 12340 // CHECK11-NEXT: [[TMP121:%.*]] = load ptr, ptr [[A]], align 4 12341 // CHECK11-NEXT: [[TMP122:%.*]] = load ptr, ptr [[B]], align 4 12342 // CHECK11-NEXT: [[TMP123:%.*]] = load ptr, ptr [[C]], align 4 12343 // CHECK11-NEXT: [[TMP124:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 12344 // CHECK11-NEXT: store i32 [[TMP120]], ptr [[TMP124]], align 4 12345 // CHECK11-NEXT: [[TMP125:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 12346 // CHECK11-NEXT: store i32 [[TMP120]], ptr [[TMP125]], align 4 12347 // CHECK11-NEXT: [[TMP126:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 12348 // CHECK11-NEXT: store ptr null, ptr [[TMP126]], align 4 12349 // CHECK11-NEXT: [[TMP127:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 12350 // CHECK11-NEXT: store ptr [[TMP121]], ptr [[TMP127]], align 4 12351 // CHECK11-NEXT: [[TMP128:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 12352 // CHECK11-NEXT: store ptr [[TMP121]], ptr [[TMP128]], align 4 12353 // CHECK11-NEXT: [[TMP129:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 12354 // CHECK11-NEXT: store ptr null, ptr [[TMP129]], align 4 12355 // CHECK11-NEXT: [[TMP130:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 12356 // CHECK11-NEXT: store ptr [[TMP122]], ptr [[TMP130]], align 4 12357 // CHECK11-NEXT: [[TMP131:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 12358 // CHECK11-NEXT: store ptr [[TMP122]], ptr [[TMP131]], align 4 12359 // CHECK11-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 12360 // CHECK11-NEXT: store ptr null, ptr [[TMP132]], align 4 12361 // CHECK11-NEXT: [[TMP133:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 3 12362 // CHECK11-NEXT: store ptr [[TMP123]], ptr [[TMP133]], align 4 12363 // CHECK11-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 3 12364 // CHECK11-NEXT: store ptr [[TMP123]], ptr [[TMP134]], align 4 12365 // CHECK11-NEXT: [[TMP135:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 3 12366 // CHECK11-NEXT: store ptr null, ptr [[TMP135]], align 4 12367 // CHECK11-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 12368 // CHECK11-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 12369 // CHECK11-NEXT: [[TMP138:%.*]] = load i32, ptr [[N]], align 4 12370 // CHECK11-NEXT: store i32 [[TMP138]], ptr [[DOTCAPTURE_EXPR_36]], align 4 12371 // CHECK11-NEXT: [[TMP139:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_36]], align 4 12372 // CHECK11-NEXT: [[SUB38:%.*]] = sub nsw i32 [[TMP139]], 0 12373 // CHECK11-NEXT: [[DIV39:%.*]] = sdiv i32 [[SUB38]], 1 12374 // CHECK11-NEXT: [[SUB40:%.*]] = sub nsw i32 [[DIV39]], 1 12375 // CHECK11-NEXT: store i32 [[SUB40]], ptr [[DOTCAPTURE_EXPR_37]], align 4 12376 // CHECK11-NEXT: [[TMP140:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_37]], align 4 12377 // CHECK11-NEXT: [[ADD41:%.*]] = add nsw i32 [[TMP140]], 1 12378 // CHECK11-NEXT: [[TMP141:%.*]] = zext i32 [[ADD41]] to i64 12379 // CHECK11-NEXT: [[TMP142:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 0 12380 // CHECK11-NEXT: store i32 3, ptr [[TMP142]], align 4 12381 // CHECK11-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 1 12382 // CHECK11-NEXT: store i32 4, ptr [[TMP143]], align 4 12383 // CHECK11-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 2 12384 // CHECK11-NEXT: store ptr [[TMP136]], ptr [[TMP144]], align 4 12385 // CHECK11-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 3 12386 // CHECK11-NEXT: store ptr [[TMP137]], ptr [[TMP145]], align 4 12387 // CHECK11-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 4 12388 // CHECK11-NEXT: store ptr @.offload_sizes.19, ptr [[TMP146]], align 4 12389 // CHECK11-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 5 12390 // CHECK11-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP147]], align 4 12391 // CHECK11-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 6 12392 // CHECK11-NEXT: store ptr null, ptr [[TMP148]], align 4 12393 // CHECK11-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 7 12394 // CHECK11-NEXT: store ptr null, ptr [[TMP149]], align 4 12395 // CHECK11-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 8 12396 // CHECK11-NEXT: store i64 [[TMP141]], ptr [[TMP150]], align 8 12397 // CHECK11-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 9 12398 // CHECK11-NEXT: store i64 0, ptr [[TMP151]], align 8 12399 // CHECK11-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 10 12400 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP152]], align 4 12401 // CHECK11-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 11 12402 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 4 12403 // CHECK11-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS42]], i32 0, i32 12 12404 // CHECK11-NEXT: store i32 0, ptr [[TMP154]], align 4 12405 // CHECK11-NEXT: [[TMP155:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.region_id, ptr [[KERNEL_ARGS42]]) 12406 // CHECK11-NEXT: [[TMP156:%.*]] = icmp ne i32 [[TMP155]], 0 12407 // CHECK11-NEXT: br i1 [[TMP156]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 12408 // CHECK11: omp_offload.failed43: 12409 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66(i32 [[TMP120]], ptr [[TMP121]], ptr [[TMP122]], ptr [[TMP123]]) #[[ATTR2]] 12410 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT44]] 12411 // CHECK11: omp_offload.cont44: 12412 // CHECK11-NEXT: [[TMP157:%.*]] = load i32, ptr [[CH]], align 4 12413 // CHECK11-NEXT: store i32 [[TMP157]], ptr [[CH_CASTED45]], align 4 12414 // CHECK11-NEXT: [[TMP158:%.*]] = load i32, ptr [[CH_CASTED45]], align 4 12415 // CHECK11-NEXT: [[TMP159:%.*]] = load i32, ptr [[N]], align 4 12416 // CHECK11-NEXT: store i32 [[TMP159]], ptr [[N_CASTED46]], align 4 12417 // CHECK11-NEXT: [[TMP160:%.*]] = load i32, ptr [[N_CASTED46]], align 4 12418 // CHECK11-NEXT: [[TMP161:%.*]] = load ptr, ptr [[A]], align 4 12419 // CHECK11-NEXT: [[TMP162:%.*]] = load ptr, ptr [[B]], align 4 12420 // CHECK11-NEXT: [[TMP163:%.*]] = load ptr, ptr [[C]], align 4 12421 // CHECK11-NEXT: [[TMP164:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 12422 // CHECK11-NEXT: store i32 [[TMP158]], ptr [[TMP164]], align 4 12423 // CHECK11-NEXT: [[TMP165:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 12424 // CHECK11-NEXT: store i32 [[TMP158]], ptr [[TMP165]], align 4 12425 // CHECK11-NEXT: [[TMP166:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 12426 // CHECK11-NEXT: store ptr null, ptr [[TMP166]], align 4 12427 // CHECK11-NEXT: [[TMP167:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 12428 // CHECK11-NEXT: store i32 [[TMP160]], ptr [[TMP167]], align 4 12429 // CHECK11-NEXT: [[TMP168:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 12430 // CHECK11-NEXT: store i32 [[TMP160]], ptr [[TMP168]], align 4 12431 // CHECK11-NEXT: [[TMP169:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 12432 // CHECK11-NEXT: store ptr null, ptr [[TMP169]], align 4 12433 // CHECK11-NEXT: [[TMP170:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 12434 // CHECK11-NEXT: store ptr [[TMP161]], ptr [[TMP170]], align 4 12435 // CHECK11-NEXT: [[TMP171:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 12436 // CHECK11-NEXT: store ptr [[TMP161]], ptr [[TMP171]], align 4 12437 // CHECK11-NEXT: [[TMP172:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 12438 // CHECK11-NEXT: store ptr null, ptr [[TMP172]], align 4 12439 // CHECK11-NEXT: [[TMP173:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 12440 // CHECK11-NEXT: store ptr [[TMP162]], ptr [[TMP173]], align 4 12441 // CHECK11-NEXT: [[TMP174:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 12442 // CHECK11-NEXT: store ptr [[TMP162]], ptr [[TMP174]], align 4 12443 // CHECK11-NEXT: [[TMP175:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 12444 // CHECK11-NEXT: store ptr null, ptr [[TMP175]], align 4 12445 // CHECK11-NEXT: [[TMP176:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 4 12446 // CHECK11-NEXT: store ptr [[TMP163]], ptr [[TMP176]], align 4 12447 // CHECK11-NEXT: [[TMP177:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 4 12448 // CHECK11-NEXT: store ptr [[TMP163]], ptr [[TMP177]], align 4 12449 // CHECK11-NEXT: [[TMP178:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 4 12450 // CHECK11-NEXT: store ptr null, ptr [[TMP178]], align 4 12451 // CHECK11-NEXT: [[TMP179:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 12452 // CHECK11-NEXT: [[TMP180:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 12453 // CHECK11-NEXT: [[TMP181:%.*]] = load i32, ptr [[N]], align 4 12454 // CHECK11-NEXT: store i32 [[TMP181]], ptr [[DOTCAPTURE_EXPR_51]], align 4 12455 // CHECK11-NEXT: [[TMP182:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_51]], align 4 12456 // CHECK11-NEXT: [[SUB53:%.*]] = sub nsw i32 [[TMP182]], 0 12457 // CHECK11-NEXT: [[DIV54:%.*]] = sdiv i32 [[SUB53]], 1 12458 // CHECK11-NEXT: [[SUB55:%.*]] = sub nsw i32 [[DIV54]], 1 12459 // CHECK11-NEXT: store i32 [[SUB55]], ptr [[DOTCAPTURE_EXPR_52]], align 4 12460 // CHECK11-NEXT: [[TMP183:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_52]], align 4 12461 // CHECK11-NEXT: [[ADD56:%.*]] = add nsw i32 [[TMP183]], 1 12462 // CHECK11-NEXT: [[TMP184:%.*]] = zext i32 [[ADD56]] to i64 12463 // CHECK11-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 0 12464 // CHECK11-NEXT: store i32 3, ptr [[TMP185]], align 4 12465 // CHECK11-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 1 12466 // CHECK11-NEXT: store i32 5, ptr [[TMP186]], align 4 12467 // CHECK11-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 2 12468 // CHECK11-NEXT: store ptr [[TMP179]], ptr [[TMP187]], align 4 12469 // CHECK11-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 3 12470 // CHECK11-NEXT: store ptr [[TMP180]], ptr [[TMP188]], align 4 12471 // CHECK11-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 4 12472 // CHECK11-NEXT: store ptr @.offload_sizes.21, ptr [[TMP189]], align 4 12473 // CHECK11-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 5 12474 // CHECK11-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP190]], align 4 12475 // CHECK11-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 6 12476 // CHECK11-NEXT: store ptr null, ptr [[TMP191]], align 4 12477 // CHECK11-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 7 12478 // CHECK11-NEXT: store ptr null, ptr [[TMP192]], align 4 12479 // CHECK11-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 8 12480 // CHECK11-NEXT: store i64 [[TMP184]], ptr [[TMP193]], align 8 12481 // CHECK11-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 9 12482 // CHECK11-NEXT: store i64 0, ptr [[TMP194]], align 8 12483 // CHECK11-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 10 12484 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4 12485 // CHECK11-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 11 12486 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4 12487 // CHECK11-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS57]], i32 0, i32 12 12488 // CHECK11-NEXT: store i32 0, ptr [[TMP197]], align 4 12489 // CHECK11-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.region_id, ptr [[KERNEL_ARGS57]]) 12490 // CHECK11-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0 12491 // CHECK11-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 12492 // CHECK11: omp_offload.failed58: 12493 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74(i32 [[TMP158]], i32 [[TMP160]], ptr [[TMP161]], ptr [[TMP162]], ptr [[TMP163]]) #[[ATTR2]] 12494 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT59]] 12495 // CHECK11: omp_offload.cont59: 12496 // CHECK11-NEXT: [[TMP200:%.*]] = load i32, ptr [[N]], align 4 12497 // CHECK11-NEXT: store i32 [[TMP200]], ptr [[N_CASTED60]], align 4 12498 // CHECK11-NEXT: [[TMP201:%.*]] = load i32, ptr [[N_CASTED60]], align 4 12499 // CHECK11-NEXT: [[TMP202:%.*]] = load ptr, ptr [[A]], align 4 12500 // CHECK11-NEXT: [[TMP203:%.*]] = load ptr, ptr [[B]], align 4 12501 // CHECK11-NEXT: [[TMP204:%.*]] = load ptr, ptr [[C]], align 4 12502 // CHECK11-NEXT: [[TMP205:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 12503 // CHECK11-NEXT: store i32 [[TMP201]], ptr [[TMP205]], align 4 12504 // CHECK11-NEXT: [[TMP206:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 12505 // CHECK11-NEXT: store i32 [[TMP201]], ptr [[TMP206]], align 4 12506 // CHECK11-NEXT: [[TMP207:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 0 12507 // CHECK11-NEXT: store ptr null, ptr [[TMP207]], align 4 12508 // CHECK11-NEXT: [[TMP208:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 1 12509 // CHECK11-NEXT: store ptr [[TMP202]], ptr [[TMP208]], align 4 12510 // CHECK11-NEXT: [[TMP209:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 1 12511 // CHECK11-NEXT: store ptr [[TMP202]], ptr [[TMP209]], align 4 12512 // CHECK11-NEXT: [[TMP210:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 1 12513 // CHECK11-NEXT: store ptr null, ptr [[TMP210]], align 4 12514 // CHECK11-NEXT: [[TMP211:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 2 12515 // CHECK11-NEXT: store ptr [[TMP203]], ptr [[TMP211]], align 4 12516 // CHECK11-NEXT: [[TMP212:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 2 12517 // CHECK11-NEXT: store ptr [[TMP203]], ptr [[TMP212]], align 4 12518 // CHECK11-NEXT: [[TMP213:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 2 12519 // CHECK11-NEXT: store ptr null, ptr [[TMP213]], align 4 12520 // CHECK11-NEXT: [[TMP214:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 3 12521 // CHECK11-NEXT: store ptr [[TMP204]], ptr [[TMP214]], align 4 12522 // CHECK11-NEXT: [[TMP215:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 3 12523 // CHECK11-NEXT: store ptr [[TMP204]], ptr [[TMP215]], align 4 12524 // CHECK11-NEXT: [[TMP216:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS63]], i32 0, i32 3 12525 // CHECK11-NEXT: store ptr null, ptr [[TMP216]], align 4 12526 // CHECK11-NEXT: [[TMP217:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS61]], i32 0, i32 0 12527 // CHECK11-NEXT: [[TMP218:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS62]], i32 0, i32 0 12528 // CHECK11-NEXT: [[TMP219:%.*]] = load i32, ptr [[N]], align 4 12529 // CHECK11-NEXT: store i32 [[TMP219]], ptr [[DOTCAPTURE_EXPR_65]], align 4 12530 // CHECK11-NEXT: [[TMP220:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_65]], align 4 12531 // CHECK11-NEXT: [[SUB67:%.*]] = sub nsw i32 [[TMP220]], 0 12532 // CHECK11-NEXT: [[DIV68:%.*]] = sdiv i32 [[SUB67]], 1 12533 // CHECK11-NEXT: [[SUB69:%.*]] = sub nsw i32 [[DIV68]], 1 12534 // CHECK11-NEXT: store i32 [[SUB69]], ptr [[DOTCAPTURE_EXPR_66]], align 4 12535 // CHECK11-NEXT: [[TMP221:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_66]], align 4 12536 // CHECK11-NEXT: [[ADD70:%.*]] = add nsw i32 [[TMP221]], 1 12537 // CHECK11-NEXT: [[TMP222:%.*]] = zext i32 [[ADD70]] to i64 12538 // CHECK11-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 0 12539 // CHECK11-NEXT: store i32 3, ptr [[TMP223]], align 4 12540 // CHECK11-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 1 12541 // CHECK11-NEXT: store i32 4, ptr [[TMP224]], align 4 12542 // CHECK11-NEXT: [[TMP225:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 2 12543 // CHECK11-NEXT: store ptr [[TMP217]], ptr [[TMP225]], align 4 12544 // CHECK11-NEXT: [[TMP226:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 3 12545 // CHECK11-NEXT: store ptr [[TMP218]], ptr [[TMP226]], align 4 12546 // CHECK11-NEXT: [[TMP227:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 4 12547 // CHECK11-NEXT: store ptr @.offload_sizes.23, ptr [[TMP227]], align 4 12548 // CHECK11-NEXT: [[TMP228:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 5 12549 // CHECK11-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP228]], align 4 12550 // CHECK11-NEXT: [[TMP229:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 6 12551 // CHECK11-NEXT: store ptr null, ptr [[TMP229]], align 4 12552 // CHECK11-NEXT: [[TMP230:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 7 12553 // CHECK11-NEXT: store ptr null, ptr [[TMP230]], align 4 12554 // CHECK11-NEXT: [[TMP231:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 8 12555 // CHECK11-NEXT: store i64 [[TMP222]], ptr [[TMP231]], align 8 12556 // CHECK11-NEXT: [[TMP232:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 9 12557 // CHECK11-NEXT: store i64 0, ptr [[TMP232]], align 8 12558 // CHECK11-NEXT: [[TMP233:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 10 12559 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP233]], align 4 12560 // CHECK11-NEXT: [[TMP234:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 11 12561 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP234]], align 4 12562 // CHECK11-NEXT: [[TMP235:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS71]], i32 0, i32 12 12563 // CHECK11-NEXT: store i32 0, ptr [[TMP235]], align 4 12564 // CHECK11-NEXT: [[TMP236:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.region_id, ptr [[KERNEL_ARGS71]]) 12565 // CHECK11-NEXT: [[TMP237:%.*]] = icmp ne i32 [[TMP236]], 0 12566 // CHECK11-NEXT: br i1 [[TMP237]], label [[OMP_OFFLOAD_FAILED72:%.*]], label [[OMP_OFFLOAD_CONT73:%.*]] 12567 // CHECK11: omp_offload.failed72: 12568 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82(i32 [[TMP201]], ptr [[TMP202]], ptr [[TMP203]], ptr [[TMP204]]) #[[ATTR2]] 12569 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT73]] 12570 // CHECK11: omp_offload.cont73: 12571 // CHECK11-NEXT: [[TMP238:%.*]] = load i32, ptr [[CH]], align 4 12572 // CHECK11-NEXT: store i32 [[TMP238]], ptr [[CH_CASTED74]], align 4 12573 // CHECK11-NEXT: [[TMP239:%.*]] = load i32, ptr [[CH_CASTED74]], align 4 12574 // CHECK11-NEXT: [[TMP240:%.*]] = load i32, ptr [[N]], align 4 12575 // CHECK11-NEXT: store i32 [[TMP240]], ptr [[N_CASTED75]], align 4 12576 // CHECK11-NEXT: [[TMP241:%.*]] = load i32, ptr [[N_CASTED75]], align 4 12577 // CHECK11-NEXT: [[TMP242:%.*]] = load ptr, ptr [[A]], align 4 12578 // CHECK11-NEXT: [[TMP243:%.*]] = load ptr, ptr [[B]], align 4 12579 // CHECK11-NEXT: [[TMP244:%.*]] = load ptr, ptr [[C]], align 4 12580 // CHECK11-NEXT: [[TMP245:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 12581 // CHECK11-NEXT: store i32 [[TMP239]], ptr [[TMP245]], align 4 12582 // CHECK11-NEXT: [[TMP246:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 12583 // CHECK11-NEXT: store i32 [[TMP239]], ptr [[TMP246]], align 4 12584 // CHECK11-NEXT: [[TMP247:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 0 12585 // CHECK11-NEXT: store ptr null, ptr [[TMP247]], align 4 12586 // CHECK11-NEXT: [[TMP248:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 1 12587 // CHECK11-NEXT: store i32 [[TMP241]], ptr [[TMP248]], align 4 12588 // CHECK11-NEXT: [[TMP249:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 1 12589 // CHECK11-NEXT: store i32 [[TMP241]], ptr [[TMP249]], align 4 12590 // CHECK11-NEXT: [[TMP250:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 1 12591 // CHECK11-NEXT: store ptr null, ptr [[TMP250]], align 4 12592 // CHECK11-NEXT: [[TMP251:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 2 12593 // CHECK11-NEXT: store ptr [[TMP242]], ptr [[TMP251]], align 4 12594 // CHECK11-NEXT: [[TMP252:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 2 12595 // CHECK11-NEXT: store ptr [[TMP242]], ptr [[TMP252]], align 4 12596 // CHECK11-NEXT: [[TMP253:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 2 12597 // CHECK11-NEXT: store ptr null, ptr [[TMP253]], align 4 12598 // CHECK11-NEXT: [[TMP254:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 3 12599 // CHECK11-NEXT: store ptr [[TMP243]], ptr [[TMP254]], align 4 12600 // CHECK11-NEXT: [[TMP255:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 3 12601 // CHECK11-NEXT: store ptr [[TMP243]], ptr [[TMP255]], align 4 12602 // CHECK11-NEXT: [[TMP256:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 3 12603 // CHECK11-NEXT: store ptr null, ptr [[TMP256]], align 4 12604 // CHECK11-NEXT: [[TMP257:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 4 12605 // CHECK11-NEXT: store ptr [[TMP244]], ptr [[TMP257]], align 4 12606 // CHECK11-NEXT: [[TMP258:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 4 12607 // CHECK11-NEXT: store ptr [[TMP244]], ptr [[TMP258]], align 4 12608 // CHECK11-NEXT: [[TMP259:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS78]], i32 0, i32 4 12609 // CHECK11-NEXT: store ptr null, ptr [[TMP259]], align 4 12610 // CHECK11-NEXT: [[TMP260:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS76]], i32 0, i32 0 12611 // CHECK11-NEXT: [[TMP261:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS77]], i32 0, i32 0 12612 // CHECK11-NEXT: [[TMP262:%.*]] = load i32, ptr [[N]], align 4 12613 // CHECK11-NEXT: store i32 [[TMP262]], ptr [[DOTCAPTURE_EXPR_80]], align 4 12614 // CHECK11-NEXT: [[TMP263:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_80]], align 4 12615 // CHECK11-NEXT: [[SUB82:%.*]] = sub nsw i32 [[TMP263]], 0 12616 // CHECK11-NEXT: [[DIV83:%.*]] = sdiv i32 [[SUB82]], 1 12617 // CHECK11-NEXT: [[SUB84:%.*]] = sub nsw i32 [[DIV83]], 1 12618 // CHECK11-NEXT: store i32 [[SUB84]], ptr [[DOTCAPTURE_EXPR_81]], align 4 12619 // CHECK11-NEXT: [[TMP264:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_81]], align 4 12620 // CHECK11-NEXT: [[ADD85:%.*]] = add nsw i32 [[TMP264]], 1 12621 // CHECK11-NEXT: [[TMP265:%.*]] = zext i32 [[ADD85]] to i64 12622 // CHECK11-NEXT: [[TMP266:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 0 12623 // CHECK11-NEXT: store i32 3, ptr [[TMP266]], align 4 12624 // CHECK11-NEXT: [[TMP267:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 1 12625 // CHECK11-NEXT: store i32 5, ptr [[TMP267]], align 4 12626 // CHECK11-NEXT: [[TMP268:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 2 12627 // CHECK11-NEXT: store ptr [[TMP260]], ptr [[TMP268]], align 4 12628 // CHECK11-NEXT: [[TMP269:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 3 12629 // CHECK11-NEXT: store ptr [[TMP261]], ptr [[TMP269]], align 4 12630 // CHECK11-NEXT: [[TMP270:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 4 12631 // CHECK11-NEXT: store ptr @.offload_sizes.25, ptr [[TMP270]], align 4 12632 // CHECK11-NEXT: [[TMP271:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 5 12633 // CHECK11-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP271]], align 4 12634 // CHECK11-NEXT: [[TMP272:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 6 12635 // CHECK11-NEXT: store ptr null, ptr [[TMP272]], align 4 12636 // CHECK11-NEXT: [[TMP273:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 7 12637 // CHECK11-NEXT: store ptr null, ptr [[TMP273]], align 4 12638 // CHECK11-NEXT: [[TMP274:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 8 12639 // CHECK11-NEXT: store i64 [[TMP265]], ptr [[TMP274]], align 8 12640 // CHECK11-NEXT: [[TMP275:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 9 12641 // CHECK11-NEXT: store i64 0, ptr [[TMP275]], align 8 12642 // CHECK11-NEXT: [[TMP276:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 10 12643 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP276]], align 4 12644 // CHECK11-NEXT: [[TMP277:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 11 12645 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP277]], align 4 12646 // CHECK11-NEXT: [[TMP278:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS86]], i32 0, i32 12 12647 // CHECK11-NEXT: store i32 0, ptr [[TMP278]], align 4 12648 // CHECK11-NEXT: [[TMP279:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.region_id, ptr [[KERNEL_ARGS86]]) 12649 // CHECK11-NEXT: [[TMP280:%.*]] = icmp ne i32 [[TMP279]], 0 12650 // CHECK11-NEXT: br i1 [[TMP280]], label [[OMP_OFFLOAD_FAILED87:%.*]], label [[OMP_OFFLOAD_CONT88:%.*]] 12651 // CHECK11: omp_offload.failed87: 12652 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90(i32 [[TMP239]], i32 [[TMP241]], ptr [[TMP242]], ptr [[TMP243]], ptr [[TMP244]]) #[[ATTR2]] 12653 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT88]] 12654 // CHECK11: omp_offload.cont88: 12655 // CHECK11-NEXT: ret i32 0 12656 // 12657 // 12658 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42 12659 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 12660 // CHECK11-NEXT: entry: 12661 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12662 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12663 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 12664 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 12665 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12666 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12667 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 12668 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 12669 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 12670 // CHECK11-NEXT: ret void 12671 // 12672 // 12673 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined 12674 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12675 // CHECK11-NEXT: entry: 12676 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12677 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12678 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 12679 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12680 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 12681 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 12682 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12683 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12684 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12685 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12686 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12687 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12688 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12689 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12690 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12691 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12692 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12693 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12694 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 12695 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12696 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 12697 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 12698 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 12699 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12700 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 12701 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 12702 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 12703 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 12704 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12705 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12706 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12707 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12708 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12709 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 12710 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12711 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12712 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12713 // CHECK11: omp.precond.then: 12714 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12715 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12716 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 12717 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12718 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12719 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12720 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 12721 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12722 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12723 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12724 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 12725 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12726 // CHECK11: cond.true: 12727 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12728 // CHECK11-NEXT: br label [[COND_END:%.*]] 12729 // CHECK11: cond.false: 12730 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12731 // CHECK11-NEXT: br label [[COND_END]] 12732 // CHECK11: cond.end: 12733 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 12734 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12735 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12736 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 12737 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12738 // CHECK11: omp.inner.for.cond: 12739 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP63:![0-9]+]] 12740 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP63]] 12741 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 12742 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12743 // CHECK11: omp.inner.for.body: 12744 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP63]] 12745 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP63]] 12746 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP63]] 12747 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12748 // CHECK11: omp.inner.for.inc: 12749 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP63]] 12750 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP63]] 12751 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 12752 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP63]] 12753 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP64:![0-9]+]] 12754 // CHECK11: omp.inner.for.end: 12755 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12756 // CHECK11: omp.loop.exit: 12757 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12758 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 12759 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 12760 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12761 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 12762 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12763 // CHECK11: .omp.final.then: 12764 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12765 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 12766 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 12767 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 12768 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 12769 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 12770 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 12771 // CHECK11: .omp.final.done: 12772 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12773 // CHECK11: omp.precond.end: 12774 // CHECK11-NEXT: ret void 12775 // 12776 // 12777 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l42.omp_outlined.omp_outlined 12778 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12779 // CHECK11-NEXT: entry: 12780 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12781 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12782 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12783 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12784 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 12785 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12786 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 12787 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 12788 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12789 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12790 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12791 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12792 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12793 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12794 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12795 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12796 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12797 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12798 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12799 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12800 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 12801 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 12802 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 12803 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12804 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 12805 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 12806 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 12807 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12808 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 12809 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 12810 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 12811 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 12812 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12813 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12814 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12815 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12816 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12817 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 12818 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12819 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12820 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12821 // CHECK11: omp.precond.then: 12822 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 12823 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12824 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 12825 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 12826 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 12827 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 12828 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 12829 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12830 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12831 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12832 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 12833 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12834 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12835 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12836 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 12837 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12838 // CHECK11: cond.true: 12839 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12840 // CHECK11-NEXT: br label [[COND_END:%.*]] 12841 // CHECK11: cond.false: 12842 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 12843 // CHECK11-NEXT: br label [[COND_END]] 12844 // CHECK11: cond.end: 12845 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 12846 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 12847 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 12848 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 12849 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12850 // CHECK11: omp.inner.for.cond: 12851 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP66:![0-9]+]] 12852 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP66]] 12853 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12854 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12855 // CHECK11: omp.inner.for.body: 12856 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP66]] 12857 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 12858 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12859 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP66]] 12860 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP66]] 12861 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP66]] 12862 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 [[TMP21]] 12863 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP66]] 12864 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP66]] 12865 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP66]] 12866 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 [[TMP24]] 12867 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP66]] 12868 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 12869 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP66]] 12870 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP66]] 12871 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 [[TMP27]] 12872 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP66]] 12873 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12874 // CHECK11: omp.body.continue: 12875 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12876 // CHECK11: omp.inner.for.inc: 12877 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP66]] 12878 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 12879 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP66]] 12880 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP67:![0-9]+]] 12881 // CHECK11: omp.inner.for.end: 12882 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12883 // CHECK11: omp.loop.exit: 12884 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12885 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 12886 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 12887 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 12888 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 12889 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 12890 // CHECK11: .omp.final.then: 12891 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12892 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 12893 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 12894 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 12895 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 12896 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 12897 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 12898 // CHECK11: .omp.final.done: 12899 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 12900 // CHECK11: omp.precond.end: 12901 // CHECK11-NEXT: ret void 12902 // 12903 // 12904 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50 12905 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 12906 // CHECK11-NEXT: entry: 12907 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12908 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12909 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 12910 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 12911 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 12912 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12913 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 12914 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 12915 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 12916 // CHECK11-NEXT: ret void 12917 // 12918 // 12919 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined 12920 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 12921 // CHECK11-NEXT: entry: 12922 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 12923 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 12924 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 12925 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 12926 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 12927 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 12928 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12929 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 12930 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12931 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12932 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 12933 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12934 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12935 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12936 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12937 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 12938 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 12939 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 12940 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 12941 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 12942 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 12943 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 12944 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 12945 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 12946 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 12947 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 12948 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 12949 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 12950 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12951 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 12952 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12953 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12954 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 12955 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 12956 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 12957 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 12958 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12959 // CHECK11: omp.precond.then: 12960 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 12961 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12962 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 12963 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 12964 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 12965 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 12966 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 12967 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 12968 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12969 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12970 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 12971 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12972 // CHECK11: cond.true: 12973 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 12974 // CHECK11-NEXT: br label [[COND_END:%.*]] 12975 // CHECK11: cond.false: 12976 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 12977 // CHECK11-NEXT: br label [[COND_END]] 12978 // CHECK11: cond.end: 12979 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 12980 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 12981 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 12982 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 12983 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12984 // CHECK11: omp.inner.for.cond: 12985 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP69:![0-9]+]] 12986 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP69]] 12987 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 12988 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12989 // CHECK11: omp.inner.for.body: 12990 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP69]] 12991 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP69]] 12992 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP69]] 12993 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12994 // CHECK11: omp.inner.for.inc: 12995 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP69]] 12996 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP69]] 12997 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 12998 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP69]] 12999 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP70:![0-9]+]] 13000 // CHECK11: omp.inner.for.end: 13001 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13002 // CHECK11: omp.loop.exit: 13003 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13004 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 13005 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 13006 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13007 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 13008 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13009 // CHECK11: .omp.final.then: 13010 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13011 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 13012 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 13013 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 13014 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 13015 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 13016 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13017 // CHECK11: .omp.final.done: 13018 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13019 // CHECK11: omp.precond.end: 13020 // CHECK11-NEXT: ret void 13021 // 13022 // 13023 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.omp_outlined.omp_outlined 13024 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13025 // CHECK11-NEXT: entry: 13026 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13027 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13028 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13029 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13030 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13031 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13032 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13033 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13034 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13035 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13036 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13037 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13038 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13039 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13040 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13041 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13042 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13043 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 13044 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13045 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13046 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13047 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13048 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13049 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13050 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13051 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13052 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13053 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13054 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13055 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13056 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 13057 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 13058 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13059 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13060 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13061 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13062 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13063 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13064 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13065 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13066 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13067 // CHECK11: omp.precond.then: 13068 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13069 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13070 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13071 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13072 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13073 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 13074 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 13075 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13076 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13077 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13078 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 13079 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13080 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13081 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13082 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13083 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13084 // CHECK11: cond.true: 13085 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13086 // CHECK11-NEXT: br label [[COND_END:%.*]] 13087 // CHECK11: cond.false: 13088 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13089 // CHECK11-NEXT: br label [[COND_END]] 13090 // CHECK11: cond.end: 13091 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13092 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13093 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13094 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 13095 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13096 // CHECK11: omp.inner.for.cond: 13097 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP72:![0-9]+]] 13098 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP72]] 13099 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13100 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13101 // CHECK11: omp.inner.for.body: 13102 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP72]] 13103 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13104 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13105 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP72]] 13106 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP72]] 13107 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP72]] 13108 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 [[TMP21]] 13109 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP72]] 13110 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP72]] 13111 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP72]] 13112 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 [[TMP24]] 13113 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP72]] 13114 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 13115 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP72]] 13116 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP72]] 13117 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 [[TMP27]] 13118 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP72]] 13119 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13120 // CHECK11: omp.body.continue: 13121 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13122 // CHECK11: omp.inner.for.inc: 13123 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP72]] 13124 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 13125 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP72]] 13126 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP73:![0-9]+]] 13127 // CHECK11: omp.inner.for.end: 13128 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13129 // CHECK11: omp.loop.exit: 13130 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13131 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 13132 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 13133 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13134 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 13135 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13136 // CHECK11: .omp.final.then: 13137 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13138 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 13139 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 13140 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 13141 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 13142 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 13143 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13144 // CHECK11: .omp.final.done: 13145 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13146 // CHECK11: omp.precond.end: 13147 // CHECK11-NEXT: ret void 13148 // 13149 // 13150 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58 13151 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 13152 // CHECK11-NEXT: entry: 13153 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 13154 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13155 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13156 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13157 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13158 // CHECK11-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 13159 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13160 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13161 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13162 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13163 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 13164 // CHECK11-NEXT: ret void 13165 // 13166 // 13167 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined 13168 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13169 // CHECK11-NEXT: entry: 13170 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13171 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13172 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 13173 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13174 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13175 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13176 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13177 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13178 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13179 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13180 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13181 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13182 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13183 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13184 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13185 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13186 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 13187 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13188 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13189 // CHECK11-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 13190 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13191 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13192 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13193 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13194 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 13195 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13196 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13197 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13198 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13199 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP1]], align 4 13200 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 13201 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13202 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0 13203 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13204 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13205 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13206 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13207 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13208 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]] 13209 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13210 // CHECK11: omp.precond.then: 13211 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13212 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13213 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_COMB_UB]], align 4 13214 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13215 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13216 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4 13217 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13218 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 13219 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP9]]) 13220 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13221 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13222 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13223 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13224 // CHECK11: cond.true: 13225 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13226 // CHECK11-NEXT: br label [[COND_END:%.*]] 13227 // CHECK11: cond.false: 13228 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13229 // CHECK11-NEXT: br label [[COND_END]] 13230 // CHECK11: cond.end: 13231 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13232 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13233 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13234 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 13235 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13236 // CHECK11: omp.inner.for.cond: 13237 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP75:![0-9]+]] 13238 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP75]] 13239 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], 1 13240 // CHECK11-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP17]], [[ADD]] 13241 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13242 // CHECK11: omp.inner.for.body: 13243 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP75]] 13244 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP75]] 13245 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]]), !llvm.access.group [[ACC_GRP75]] 13246 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13247 // CHECK11: omp.inner.for.inc: 13248 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP75]] 13249 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP75]] 13250 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 13251 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP75]] 13252 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP75]] 13253 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP75]] 13254 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 13255 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP75]] 13256 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP75]] 13257 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP75]] 13258 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 13259 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP75]] 13260 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP75]] 13261 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP75]] 13262 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 13263 // CHECK11-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] 13264 // CHECK11: cond.true10: 13265 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group [[ACC_GRP75]] 13266 // CHECK11-NEXT: br label [[COND_END12:%.*]] 13267 // CHECK11: cond.false11: 13268 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP75]] 13269 // CHECK11-NEXT: br label [[COND_END12]] 13270 // CHECK11: cond.end12: 13271 // CHECK11-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE10]] ], [ [[TMP30]], [[COND_FALSE11]] ] 13272 // CHECK11-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP75]] 13273 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP75]] 13274 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP75]] 13275 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP76:![0-9]+]] 13276 // CHECK11: omp.inner.for.end: 13277 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13278 // CHECK11: omp.loop.exit: 13279 // CHECK11-NEXT: [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13280 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4 13281 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]]) 13282 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13283 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 13284 // CHECK11-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13285 // CHECK11: .omp.final.then: 13286 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13287 // CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP36]], 0 13288 // CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 13289 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV15]], 1 13290 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 0, [[MUL]] 13291 // CHECK11-NEXT: store i32 [[ADD16]], ptr [[I3]], align 4 13292 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13293 // CHECK11: .omp.final.done: 13294 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13295 // CHECK11: omp.precond.end: 13296 // CHECK11-NEXT: ret void 13297 // 13298 // 13299 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l58.omp_outlined.omp_outlined 13300 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13301 // CHECK11-NEXT: entry: 13302 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13303 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13304 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13305 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13306 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13307 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13308 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13309 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13310 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13311 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13312 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13313 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13314 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13315 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13316 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13317 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13318 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13319 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 13320 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13321 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13322 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13323 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13324 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13325 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13326 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13327 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13328 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13329 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13330 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13331 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13332 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 13333 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 13334 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13335 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13336 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13337 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13338 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13339 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13340 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13341 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13342 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13343 // CHECK11: omp.precond.then: 13344 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13345 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13346 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13347 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13348 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13349 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 13350 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 13351 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13352 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13353 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13354 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 13355 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13356 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13357 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13358 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13359 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13360 // CHECK11: cond.true: 13361 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13362 // CHECK11-NEXT: br label [[COND_END:%.*]] 13363 // CHECK11: cond.false: 13364 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13365 // CHECK11-NEXT: br label [[COND_END]] 13366 // CHECK11: cond.end: 13367 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13368 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13369 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13370 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 13371 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13372 // CHECK11: omp.inner.for.cond: 13373 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP78:![0-9]+]] 13374 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP78]] 13375 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13376 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13377 // CHECK11: omp.inner.for.body: 13378 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP78]] 13379 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13380 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13381 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP78]] 13382 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP78]] 13383 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP78]] 13384 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 [[TMP21]] 13385 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP78]] 13386 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP78]] 13387 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP78]] 13388 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 [[TMP24]] 13389 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP78]] 13390 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 13391 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP78]] 13392 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP78]] 13393 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 [[TMP27]] 13394 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP78]] 13395 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13396 // CHECK11: omp.body.continue: 13397 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13398 // CHECK11: omp.inner.for.inc: 13399 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP78]] 13400 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 13401 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP78]] 13402 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP79:![0-9]+]] 13403 // CHECK11: omp.inner.for.end: 13404 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13405 // CHECK11: omp.loop.exit: 13406 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13407 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 13408 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 13409 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13410 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 13411 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13412 // CHECK11: .omp.final.then: 13413 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13414 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 13415 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 13416 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 13417 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 13418 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 13419 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13420 // CHECK11: .omp.final.done: 13421 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13422 // CHECK11: omp.precond.end: 13423 // CHECK11-NEXT: ret void 13424 // 13425 // 13426 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66 13427 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 13428 // CHECK11-NEXT: entry: 13429 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13430 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13431 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13432 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13433 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13434 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13435 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13436 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13437 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 13438 // CHECK11-NEXT: ret void 13439 // 13440 // 13441 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined 13442 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13443 // CHECK11-NEXT: entry: 13444 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13445 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13446 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13447 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13448 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13449 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13450 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13451 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13452 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13453 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13454 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13455 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13456 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13457 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13458 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13459 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 13460 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13461 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13462 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13463 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13464 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13465 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13466 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13467 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13468 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13469 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13470 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 13471 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 13472 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13473 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13474 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13475 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13476 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13477 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13478 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13479 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13480 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13481 // CHECK11: omp.precond.then: 13482 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13483 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13484 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 13485 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13486 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13487 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13488 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 13489 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13490 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13491 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13492 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13493 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13494 // CHECK11: cond.true: 13495 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13496 // CHECK11-NEXT: br label [[COND_END:%.*]] 13497 // CHECK11: cond.false: 13498 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13499 // CHECK11-NEXT: br label [[COND_END]] 13500 // CHECK11: cond.end: 13501 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13502 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13503 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13504 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 13505 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13506 // CHECK11: omp.inner.for.cond: 13507 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP81:![0-9]+]] 13508 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP81]] 13509 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 13510 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13511 // CHECK11: omp.inner.for.body: 13512 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP81]] 13513 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP81]] 13514 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP81]] 13515 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13516 // CHECK11: omp.inner.for.inc: 13517 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP81]] 13518 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP81]] 13519 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 13520 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP81]] 13521 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP82:![0-9]+]] 13522 // CHECK11: omp.inner.for.end: 13523 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13524 // CHECK11: omp.loop.exit: 13525 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13526 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 13527 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 13528 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13529 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 13530 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13531 // CHECK11: .omp.final.then: 13532 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13533 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 13534 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 13535 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 13536 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 13537 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 13538 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13539 // CHECK11: .omp.final.done: 13540 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13541 // CHECK11: omp.precond.end: 13542 // CHECK11-NEXT: ret void 13543 // 13544 // 13545 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp_outlined 13546 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13547 // CHECK11-NEXT: entry: 13548 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13549 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13550 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13551 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13552 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13553 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13554 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13555 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13556 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13557 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13558 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13559 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13560 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13561 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13562 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13563 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13564 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13565 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 13566 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13567 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13568 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13569 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13570 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13571 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13572 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13573 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13574 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13575 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13576 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13577 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13578 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 13579 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 13580 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13581 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13582 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13583 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13584 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13585 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13586 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13587 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13588 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13589 // CHECK11: omp.precond.then: 13590 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13591 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13592 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13593 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13594 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13595 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 13596 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 13597 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13598 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13599 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13600 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 13601 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP11]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13602 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13603 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13604 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13605 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13606 // CHECK11: cond.true: 13607 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13608 // CHECK11-NEXT: br label [[COND_END:%.*]] 13609 // CHECK11: cond.false: 13610 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13611 // CHECK11-NEXT: br label [[COND_END]] 13612 // CHECK11: cond.end: 13613 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13614 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13615 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13616 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 13617 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13618 // CHECK11: omp.inner.for.cond: 13619 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP84:![0-9]+]] 13620 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP84]] 13621 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13622 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13623 // CHECK11: omp.inner.for.body: 13624 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP84]] 13625 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13626 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13627 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP84]] 13628 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP84]] 13629 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP84]] 13630 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 [[TMP21]] 13631 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP84]] 13632 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP84]] 13633 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP84]] 13634 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 [[TMP24]] 13635 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP84]] 13636 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP25]] 13637 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP84]] 13638 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP84]] 13639 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 [[TMP27]] 13640 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP84]] 13641 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13642 // CHECK11: omp.body.continue: 13643 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13644 // CHECK11: omp.inner.for.inc: 13645 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP84]] 13646 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1 13647 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP84]] 13648 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP85:![0-9]+]] 13649 // CHECK11: omp.inner.for.end: 13650 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13651 // CHECK11: omp.loop.exit: 13652 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13653 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 13654 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP30]]) 13655 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13656 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 13657 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13658 // CHECK11: .omp.final.then: 13659 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13660 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP33]], 0 13661 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 13662 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 13663 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 13664 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I3]], align 4 13665 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13666 // CHECK11: .omp.final.done: 13667 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13668 // CHECK11: omp.precond.end: 13669 // CHECK11-NEXT: ret void 13670 // 13671 // 13672 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74 13673 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 13674 // CHECK11-NEXT: entry: 13675 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 13676 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13677 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13678 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13679 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13680 // CHECK11-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 13681 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13682 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13683 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13684 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13685 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 13686 // CHECK11-NEXT: ret void 13687 // 13688 // 13689 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined 13690 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13691 // CHECK11-NEXT: entry: 13692 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13693 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13694 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 13695 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13696 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13697 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13698 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13699 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13700 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13701 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13702 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13703 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13704 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13705 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13706 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13707 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13708 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13709 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 13710 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13711 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13712 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13713 // CHECK11-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 13714 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13715 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13716 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13717 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13718 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 13719 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13720 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13721 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13722 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13723 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 13724 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 13725 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 13726 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13727 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13728 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 13729 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13730 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13731 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 13732 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13733 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13734 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 13735 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13736 // CHECK11: omp.precond.then: 13737 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 13738 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13739 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 13740 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13741 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13742 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13743 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 13744 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 13745 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13746 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13747 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 13748 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13749 // CHECK11: cond.true: 13750 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13751 // CHECK11-NEXT: br label [[COND_END:%.*]] 13752 // CHECK11: cond.false: 13753 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 13754 // CHECK11-NEXT: br label [[COND_END]] 13755 // CHECK11: cond.end: 13756 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 13757 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 13758 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 13759 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 13760 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13761 // CHECK11: omp.inner.for.cond: 13762 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP87:![0-9]+]] 13763 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP87]] 13764 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13765 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13766 // CHECK11: omp.inner.for.body: 13767 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP87]] 13768 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP87]] 13769 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP87]] 13770 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP87]] 13771 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP87]] 13772 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i32 [[TMP22]]), !llvm.access.group [[ACC_GRP87]] 13773 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13774 // CHECK11: omp.inner.for.inc: 13775 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP87]] 13776 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP87]] 13777 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 13778 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP87]] 13779 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP88:![0-9]+]] 13780 // CHECK11: omp.inner.for.end: 13781 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13782 // CHECK11: omp.loop.exit: 13783 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13784 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 13785 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 13786 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13787 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 13788 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13789 // CHECK11: .omp.final.then: 13790 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13791 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 13792 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 13793 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 13794 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 13795 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 13796 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13797 // CHECK11: .omp.final.done: 13798 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13799 // CHECK11: omp.precond.end: 13800 // CHECK11-NEXT: ret void 13801 // 13802 // 13803 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l74.omp_outlined.omp_outlined 13804 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 13805 // CHECK11-NEXT: entry: 13806 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13807 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13808 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13809 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13810 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13811 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13812 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13813 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13814 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13815 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13816 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13817 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13818 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13819 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13820 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13821 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13822 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13823 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13824 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 13825 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13826 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13827 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13828 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13829 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13830 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13831 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13832 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13833 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13834 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13835 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13836 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13837 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13838 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 13839 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 13840 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13841 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13842 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13843 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13844 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 13845 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 13846 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13847 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 13848 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13849 // CHECK11: omp.precond.then: 13850 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 13851 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 13852 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 13853 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 13854 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13855 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 13856 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 13857 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 13858 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 13859 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 13860 // CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13861 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 13862 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP10]]) 13863 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13864 // CHECK11: omp.dispatch.cond: 13865 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13866 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13867 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] 13868 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13869 // CHECK11: cond.true: 13870 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 13871 // CHECK11-NEXT: br label [[COND_END:%.*]] 13872 // CHECK11: cond.false: 13873 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13874 // CHECK11-NEXT: br label [[COND_END]] 13875 // CHECK11: cond.end: 13876 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] 13877 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 13878 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13879 // CHECK11-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 13880 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 13881 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13882 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 13883 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13884 // CHECK11: omp.dispatch.body: 13885 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13886 // CHECK11: omp.inner.for.cond: 13887 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP90:![0-9]+]] 13888 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP90]] 13889 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] 13890 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13891 // CHECK11: omp.inner.for.body: 13892 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP90]] 13893 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 13894 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13895 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP90]] 13896 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP90]] 13897 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP90]] 13898 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 [[TMP24]] 13899 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP90]] 13900 // CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP90]] 13901 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP90]] 13902 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 [[TMP27]] 13903 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP90]] 13904 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] 13905 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP90]] 13906 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP90]] 13907 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 [[TMP30]] 13908 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP90]] 13909 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13910 // CHECK11: omp.body.continue: 13911 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13912 // CHECK11: omp.inner.for.inc: 13913 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP90]] 13914 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 13915 // CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP90]] 13916 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP91:![0-9]+]] 13917 // CHECK11: omp.inner.for.end: 13918 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13919 // CHECK11: omp.dispatch.inc: 13920 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 13921 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13922 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] 13923 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 4 13924 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 13925 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 13926 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] 13927 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 4 13928 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 13929 // CHECK11: omp.dispatch.end: 13930 // CHECK11-NEXT: [[TMP36:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 13931 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 13932 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP37]]) 13933 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 13934 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 13935 // CHECK11-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 13936 // CHECK11: .omp.final.then: 13937 // CHECK11-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 13938 // CHECK11-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP40]], 0 13939 // CHECK11-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1 13940 // CHECK11-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 1 13941 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL16]] 13942 // CHECK11-NEXT: store i32 [[ADD17]], ptr [[I4]], align 4 13943 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 13944 // CHECK11: .omp.final.done: 13945 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 13946 // CHECK11: omp.precond.end: 13947 // CHECK11-NEXT: ret void 13948 // 13949 // 13950 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82 13951 // CHECK11-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 13952 // CHECK11-NEXT: entry: 13953 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13954 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13955 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13956 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13957 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 13958 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13959 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13960 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13961 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined, ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 13962 // CHECK11-NEXT: ret void 13963 // 13964 // 13965 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined 13966 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 13967 // CHECK11-NEXT: entry: 13968 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 13969 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 13970 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 13971 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 13972 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 13973 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 13974 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13975 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 13976 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13977 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13978 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 13979 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13980 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13981 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13982 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13983 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 13984 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 13985 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 13986 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 13987 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 13988 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 13989 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 13990 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 13991 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 13992 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 13993 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 13994 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 13995 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 13996 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 13997 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 13998 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13999 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14000 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14001 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 14002 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14003 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 14004 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14005 // CHECK11: omp.precond.then: 14006 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14007 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14008 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 4 14009 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14010 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14011 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14012 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 14013 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14014 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14015 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14016 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 14017 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14018 // CHECK11: cond.true: 14019 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14020 // CHECK11-NEXT: br label [[COND_END:%.*]] 14021 // CHECK11: cond.false: 14022 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14023 // CHECK11-NEXT: br label [[COND_END]] 14024 // CHECK11: cond.end: 14025 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 14026 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14027 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14028 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 14029 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14030 // CHECK11: omp.inner.for.cond: 14031 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP93:![0-9]+]] 14032 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP93]] 14033 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 14034 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14035 // CHECK11: omp.inner.for.body: 14036 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP93]] 14037 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP93]] 14038 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]), !llvm.access.group [[ACC_GRP93]] 14039 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14040 // CHECK11: omp.inner.for.inc: 14041 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP93]] 14042 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP93]] 14043 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 14044 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP93]] 14045 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP94:![0-9]+]] 14046 // CHECK11: omp.inner.for.end: 14047 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14048 // CHECK11: omp.loop.exit: 14049 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14050 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 14051 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 14052 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14053 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 14054 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14055 // CHECK11: .omp.final.then: 14056 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14057 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0 14058 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 14059 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1 14060 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]] 14061 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[I3]], align 4 14062 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 14063 // CHECK11: .omp.final.done: 14064 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 14065 // CHECK11: omp.precond.end: 14066 // CHECK11-NEXT: ret void 14067 // 14068 // 14069 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l82.omp_outlined.omp_outlined 14070 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 14071 // CHECK11-NEXT: entry: 14072 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14073 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14074 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14075 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14076 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 14077 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14078 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 14079 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 14080 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14081 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 14082 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14083 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14084 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 14085 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14086 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14087 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14088 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14089 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 14090 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14091 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14092 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14093 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14094 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 14095 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14096 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 14097 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 14098 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 14099 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14100 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 14101 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 14102 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 14103 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_]], align 4 14104 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14105 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 14106 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14107 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14108 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14109 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 14110 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14111 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 14112 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14113 // CHECK11: omp.precond.then: 14114 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14115 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14116 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 14117 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14118 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14119 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 14120 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 14121 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14122 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14123 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14124 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14125 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14126 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 14127 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 1) 14128 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14129 // CHECK11: omp.dispatch.cond: 14130 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14131 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 14132 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 14133 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 14134 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14135 // CHECK11: omp.dispatch.body: 14136 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14137 // CHECK11-NEXT: store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4 14138 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14139 // CHECK11: omp.inner.for.cond: 14140 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP96:![0-9]+]] 14141 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP96]] 14142 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 14143 // CHECK11-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14144 // CHECK11: omp.inner.for.body: 14145 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP96]] 14146 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 14147 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14148 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP96]] 14149 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP96]] 14150 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP96]] 14151 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP21]], i32 [[TMP22]] 14152 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP96]] 14153 // CHECK11-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP96]] 14154 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP96]] 14155 // CHECK11-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, ptr [[TMP24]], i32 [[TMP25]] 14156 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP96]] 14157 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], [[TMP26]] 14158 // CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP96]] 14159 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP96]] 14160 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, ptr [[TMP27]], i32 [[TMP28]] 14161 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP96]] 14162 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14163 // CHECK11: omp.body.continue: 14164 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14165 // CHECK11: omp.inner.for.inc: 14166 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP96]] 14167 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP29]], 1 14168 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP96]] 14169 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP97:![0-9]+]] 14170 // CHECK11: omp.inner.for.end: 14171 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14172 // CHECK11: omp.dispatch.inc: 14173 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 14174 // CHECK11: omp.dispatch.end: 14175 // CHECK11-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14176 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 14177 // CHECK11-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP31]]) 14178 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14179 // CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 14180 // CHECK11-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14181 // CHECK11: .omp.final.then: 14182 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14183 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP34]], 0 14184 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 14185 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 14186 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 14187 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[I3]], align 4 14188 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 14189 // CHECK11: .omp.final.done: 14190 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 14191 // CHECK11: omp.precond.end: 14192 // CHECK11-NEXT: ret void 14193 // 14194 // 14195 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90 14196 // CHECK11-SAME: (i32 noundef [[CH:%.*]], i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]]) #[[ATTR1]] { 14197 // CHECK11-NEXT: entry: 14198 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca i32, align 4 14199 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 14200 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14201 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 14202 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 14203 // CHECK11-NEXT: store i32 [[CH]], ptr [[CH_ADDR]], align 4 14204 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 14205 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14206 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 14207 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 14208 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined, ptr [[CH_ADDR]], ptr [[N_ADDR]], ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]]) 14209 // CHECK11-NEXT: ret void 14210 // 14211 // 14212 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined 14213 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[CH:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 14214 // CHECK11-NEXT: entry: 14215 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14216 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14217 // CHECK11-NEXT: [[CH_ADDR:%.*]] = alloca ptr, align 4 14218 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 14219 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14220 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 14221 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 14222 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14223 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14224 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 14225 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14226 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14227 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 14228 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14229 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14230 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14231 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14232 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 14233 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14234 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14235 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14236 // CHECK11-NEXT: store ptr [[CH]], ptr [[CH_ADDR]], align 4 14237 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 14238 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14239 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 14240 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 14241 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[CH_ADDR]], align 4 14242 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[N_ADDR]], align 4 14243 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14244 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 4 14245 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[C_ADDR]], align 4 14246 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 14247 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 14248 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 14249 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14250 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14251 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 14252 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14253 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14254 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 14255 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 14256 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14257 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP8]] 14258 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14259 // CHECK11: omp.precond.then: 14260 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 14261 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14262 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_COMB_UB]], align 4 14263 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14264 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14265 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14266 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 14267 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 14268 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14269 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14270 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP12]], [[TMP13]] 14271 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14272 // CHECK11: cond.true: 14273 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14274 // CHECK11-NEXT: br label [[COND_END:%.*]] 14275 // CHECK11: cond.false: 14276 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 14277 // CHECK11-NEXT: br label [[COND_END]] 14278 // CHECK11: cond.end: 14279 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ] 14280 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 14281 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 14282 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4 14283 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14284 // CHECK11: omp.inner.for.cond: 14285 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP99:![0-9]+]] 14286 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP99]] 14287 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 14288 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14289 // CHECK11: omp.inner.for.body: 14290 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP99]] 14291 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP99]] 14292 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4, !llvm.access.group [[ACC_GRP99]] 14293 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP99]] 14294 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP99]] 14295 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined.omp_outlined, i32 [[TMP19]], i32 [[TMP20]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]], ptr [[TMP4]], i32 [[TMP22]]), !llvm.access.group [[ACC_GRP99]] 14296 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14297 // CHECK11: omp.inner.for.inc: 14298 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP99]] 14299 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP99]] 14300 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 14301 // CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP99]] 14302 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP100:![0-9]+]] 14303 // CHECK11: omp.inner.for.end: 14304 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14305 // CHECK11: omp.loop.exit: 14306 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14307 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 14308 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]]) 14309 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14310 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 14311 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14312 // CHECK11: .omp.final.then: 14313 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14314 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP29]], 0 14315 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 14316 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1 14317 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]] 14318 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[I4]], align 4 14319 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 14320 // CHECK11: .omp.final.done: 14321 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 14322 // CHECK11: omp.precond.end: 14323 // CHECK11-NEXT: ret void 14324 // 14325 // 14326 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l90.omp_outlined.omp_outlined 14327 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 14328 // CHECK11-NEXT: entry: 14329 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 14330 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 14331 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14332 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14333 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 14334 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 14335 // CHECK11-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4 14336 // CHECK11-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4 14337 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14338 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14339 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 14340 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14341 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 14342 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 14343 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14344 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14345 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14346 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14347 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 14348 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 14349 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 14350 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14351 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14352 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 14353 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 14354 // CHECK11-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4 14355 // CHECK11-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4 14356 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14357 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 14358 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4 14359 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 4 14360 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 4 14361 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP0]], align 4 14362 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14363 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14364 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0 14365 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14366 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 14367 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4 14368 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 14369 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14370 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 14371 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 14372 // CHECK11: omp.precond.then: 14373 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14374 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 14375 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4 14376 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4 14377 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4 14378 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_LB]], align 4 14379 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_UB]], align 4 14380 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 14381 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 14382 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4 14383 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14384 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 14385 // CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14386 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 14387 // CHECK11-NEXT: call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP14]], i32 35, i32 [[TMP11]], i32 [[TMP12]], i32 1, i32 [[TMP10]]) 14388 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14389 // CHECK11: omp.dispatch.cond: 14390 // CHECK11-NEXT: [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14391 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 14392 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP16]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]]) 14393 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP17]], 0 14394 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14395 // CHECK11: omp.dispatch.body: 14396 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14397 // CHECK11-NEXT: store i32 [[TMP18]], ptr [[DOTOMP_IV]], align 4 14398 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14399 // CHECK11: omp.inner.for.cond: 14400 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP102:![0-9]+]] 14401 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP102]] 14402 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 14403 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14404 // CHECK11: omp.inner.for.body: 14405 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP102]] 14406 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1 14407 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14408 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP102]] 14409 // CHECK11-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP102]] 14410 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP102]] 14411 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 [[TMP23]] 14412 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP102]] 14413 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP102]] 14414 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP102]] 14415 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i32 [[TMP26]] 14416 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP102]] 14417 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP27]] 14418 // CHECK11-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP102]] 14419 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP102]] 14420 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 [[TMP29]] 14421 // CHECK11-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP102]] 14422 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14423 // CHECK11: omp.body.continue: 14424 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14425 // CHECK11: omp.inner.for.inc: 14426 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP102]] 14427 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP30]], 1 14428 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP102]] 14429 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP103:![0-9]+]] 14430 // CHECK11: omp.inner.for.end: 14431 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14432 // CHECK11: omp.dispatch.inc: 14433 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 14434 // CHECK11: omp.dispatch.end: 14435 // CHECK11-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 14436 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 14437 // CHECK11-NEXT: call void @__kmpc_dispatch_deinit(ptr @[[GLOB3]], i32 [[TMP32]]) 14438 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4 14439 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 14440 // CHECK11-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 14441 // CHECK11: .omp.final.then: 14442 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14443 // CHECK11-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP35]], 0 14444 // CHECK11-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1 14445 // CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1 14446 // CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]] 14447 // CHECK11-NEXT: store i32 [[ADD13]], ptr [[I4]], align 4 14448 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 14449 // CHECK11: .omp.final.done: 14450 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 14451 // CHECK11: omp.precond.end: 14452 // CHECK11-NEXT: ret void 14453 // 14454 // 14455 // CHECK13-LABEL: define {{[^@]+}}@main 14456 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] { 14457 // CHECK13-NEXT: entry: 14458 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 14459 // CHECK13-NEXT: [[A:%.*]] = alloca ptr, align 8 14460 // CHECK13-NEXT: [[B:%.*]] = alloca ptr, align 8 14461 // CHECK13-NEXT: [[C:%.*]] = alloca ptr, align 8 14462 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 14463 // CHECK13-NEXT: [[CH:%.*]] = alloca i32, align 4 14464 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 14465 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14466 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14467 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14468 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14469 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 14470 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14471 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 14472 // CHECK13-NEXT: [[_TMP15:%.*]] = alloca i32, align 4 14473 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4 14474 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 14475 // CHECK13-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 14476 // CHECK13-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 14477 // CHECK13-NEXT: [[I23:%.*]] = alloca i32, align 4 14478 // CHECK13-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4 14479 // CHECK13-NEXT: [[I27:%.*]] = alloca i32, align 4 14480 // CHECK13-NEXT: [[_TMP49:%.*]] = alloca i32, align 4 14481 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4 14482 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_51:%.*]] = alloca i32, align 4 14483 // CHECK13-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4 14484 // CHECK13-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4 14485 // CHECK13-NEXT: [[I57:%.*]] = alloca i32, align 4 14486 // CHECK13-NEXT: [[DOTOMP_IV60:%.*]] = alloca i32, align 4 14487 // CHECK13-NEXT: [[I61:%.*]] = alloca i32, align 4 14488 // CHECK13-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 14489 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 14490 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 14491 // CHECK13-NEXT: [[DOTOMP_LB89:%.*]] = alloca i32, align 4 14492 // CHECK13-NEXT: [[DOTOMP_UB90:%.*]] = alloca i32, align 4 14493 // CHECK13-NEXT: [[I91:%.*]] = alloca i32, align 4 14494 // CHECK13-NEXT: [[DOTOMP_IV94:%.*]] = alloca i32, align 4 14495 // CHECK13-NEXT: [[I95:%.*]] = alloca i32, align 4 14496 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_117:%.*]] = alloca i32, align 4 14497 // CHECK13-NEXT: [[_TMP118:%.*]] = alloca i32, align 4 14498 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_119:%.*]] = alloca i32, align 4 14499 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_120:%.*]] = alloca i32, align 4 14500 // CHECK13-NEXT: [[DOTOMP_LB124:%.*]] = alloca i32, align 4 14501 // CHECK13-NEXT: [[DOTOMP_UB125:%.*]] = alloca i32, align 4 14502 // CHECK13-NEXT: [[I126:%.*]] = alloca i32, align 4 14503 // CHECK13-NEXT: [[DOTOMP_IV129:%.*]] = alloca i32, align 4 14504 // CHECK13-NEXT: [[I130:%.*]] = alloca i32, align 4 14505 // CHECK13-NEXT: [[_TMP152:%.*]] = alloca i32, align 4 14506 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_153:%.*]] = alloca i32, align 4 14507 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_154:%.*]] = alloca i32, align 4 14508 // CHECK13-NEXT: [[DOTOMP_LB158:%.*]] = alloca i32, align 4 14509 // CHECK13-NEXT: [[DOTOMP_UB159:%.*]] = alloca i32, align 4 14510 // CHECK13-NEXT: [[I160:%.*]] = alloca i32, align 4 14511 // CHECK13-NEXT: [[DOTOMP_IV163:%.*]] = alloca i32, align 4 14512 // CHECK13-NEXT: [[I164:%.*]] = alloca i32, align 4 14513 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_186:%.*]] = alloca i32, align 4 14514 // CHECK13-NEXT: [[_TMP187:%.*]] = alloca i32, align 4 14515 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_188:%.*]] = alloca i32, align 4 14516 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_189:%.*]] = alloca i32, align 4 14517 // CHECK13-NEXT: [[DOTOMP_LB193:%.*]] = alloca i32, align 4 14518 // CHECK13-NEXT: [[DOTOMP_UB194:%.*]] = alloca i32, align 4 14519 // CHECK13-NEXT: [[I195:%.*]] = alloca i32, align 4 14520 // CHECK13-NEXT: [[DOTOMP_IV198:%.*]] = alloca i32, align 4 14521 // CHECK13-NEXT: [[I199:%.*]] = alloca i32, align 4 14522 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4 14523 // CHECK13-NEXT: store i32 10000, ptr [[N]], align 4 14524 // CHECK13-NEXT: store i32 100, ptr [[CH]], align 4 14525 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 14526 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4 14527 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14528 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0 14529 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14530 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14531 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 14532 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 14533 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 14534 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 14535 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 14536 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14537 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 14538 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 14539 // CHECK13: simd.if.then: 14540 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 14541 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 14542 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14543 // CHECK13: omp.inner.for.cond: 14544 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]] 14545 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]] 14546 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 14547 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14548 // CHECK13: omp.inner.for.body: 14549 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 14550 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 14551 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14552 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 14553 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP2]] 14554 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 14555 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 14556 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP8]], i64 [[IDXPROM]] 14557 // CHECK13-NEXT: [[TMP10:%.*]] = load double, ptr [[ARRAYIDX]], align 8, !llvm.access.group [[ACC_GRP2]] 14558 // CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP2]] 14559 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 14560 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP12]] to i64 14561 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds double, ptr [[TMP11]], i64 [[IDXPROM5]] 14562 // CHECK13-NEXT: [[TMP13:%.*]] = load double, ptr [[ARRAYIDX6]], align 8, !llvm.access.group [[ACC_GRP2]] 14563 // CHECK13-NEXT: [[ADD7:%.*]] = fadd double [[TMP10]], [[TMP13]] 14564 // CHECK13-NEXT: [[TMP14:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP2]] 14565 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]] 14566 // CHECK13-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 14567 // CHECK13-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds double, ptr [[TMP14]], i64 [[IDXPROM8]] 14568 // CHECK13-NEXT: store double [[ADD7]], ptr [[ARRAYIDX9]], align 8, !llvm.access.group [[ACC_GRP2]] 14569 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14570 // CHECK13: omp.body.continue: 14571 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14572 // CHECK13: omp.inner.for.inc: 14573 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 14574 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 14575 // CHECK13-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]] 14576 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 14577 // CHECK13: omp.inner.for.end: 14578 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 14579 // CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP17]], 0 14580 // CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 14581 // CHECK13-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 14582 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 14583 // CHECK13-NEXT: store i32 [[ADD14]], ptr [[I3]], align 4 14584 // CHECK13-NEXT: br label [[SIMD_IF_END]] 14585 // CHECK13: simd.if.end: 14586 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[N]], align 4 14587 // CHECK13-NEXT: store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR_16]], align 4 14588 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4 14589 // CHECK13-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP19]], 0 14590 // CHECK13-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1 14591 // CHECK13-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1 14592 // CHECK13-NEXT: store i32 [[SUB20]], ptr [[DOTCAPTURE_EXPR_17]], align 4 14593 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB21]], align 4 14594 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_17]], align 4 14595 // CHECK13-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_UB22]], align 4 14596 // CHECK13-NEXT: store i32 0, ptr [[I23]], align 4 14597 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4 14598 // CHECK13-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP21]] 14599 // CHECK13-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END48:%.*]] 14600 // CHECK13: simd.if.then25: 14601 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4 14602 // CHECK13-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV26]], align 4 14603 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]] 14604 // CHECK13: omp.inner.for.cond28: 14605 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]] 14606 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP6]] 14607 // CHECK13-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] 14608 // CHECK13-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END43:%.*]] 14609 // CHECK13: omp.inner.for.body30: 14610 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6]] 14611 // CHECK13-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP25]], 1 14612 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]] 14613 // CHECK13-NEXT: store i32 [[ADD32]], ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP6]] 14614 // CHECK13-NEXT: [[TMP26:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP6]] 14615 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP6]] 14616 // CHECK13-NEXT: [[IDXPROM33:%.*]] = sext i32 [[TMP27]] to i64 14617 // CHECK13-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i64 [[IDXPROM33]] 14618 // CHECK13-NEXT: [[TMP28:%.*]] = load double, ptr [[ARRAYIDX34]], align 8, !llvm.access.group [[ACC_GRP6]] 14619 // CHECK13-NEXT: [[TMP29:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP6]] 14620 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP6]] 14621 // CHECK13-NEXT: [[IDXPROM35:%.*]] = sext i32 [[TMP30]] to i64 14622 // CHECK13-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds double, ptr [[TMP29]], i64 [[IDXPROM35]] 14623 // CHECK13-NEXT: [[TMP31:%.*]] = load double, ptr [[ARRAYIDX36]], align 8, !llvm.access.group [[ACC_GRP6]] 14624 // CHECK13-NEXT: [[ADD37:%.*]] = fadd double [[TMP28]], [[TMP31]] 14625 // CHECK13-NEXT: [[TMP32:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP6]] 14626 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP6]] 14627 // CHECK13-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP33]] to i64 14628 // CHECK13-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds double, ptr [[TMP32]], i64 [[IDXPROM38]] 14629 // CHECK13-NEXT: store double [[ADD37]], ptr [[ARRAYIDX39]], align 8, !llvm.access.group [[ACC_GRP6]] 14630 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE40:%.*]] 14631 // CHECK13: omp.body.continue40: 14632 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC41:%.*]] 14633 // CHECK13: omp.inner.for.inc41: 14634 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6]] 14635 // CHECK13-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP34]], 1 14636 // CHECK13-NEXT: store i32 [[ADD42]], ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6]] 14637 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]] 14638 // CHECK13: omp.inner.for.end43: 14639 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4 14640 // CHECK13-NEXT: [[SUB44:%.*]] = sub nsw i32 [[TMP35]], 0 14641 // CHECK13-NEXT: [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1 14642 // CHECK13-NEXT: [[MUL46:%.*]] = mul nsw i32 [[DIV45]], 1 14643 // CHECK13-NEXT: [[ADD47:%.*]] = add nsw i32 0, [[MUL46]] 14644 // CHECK13-NEXT: store i32 [[ADD47]], ptr [[I27]], align 4 14645 // CHECK13-NEXT: br label [[SIMD_IF_END48]] 14646 // CHECK13: simd.if.end48: 14647 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[N]], align 4 14648 // CHECK13-NEXT: store i32 [[TMP36]], ptr [[DOTCAPTURE_EXPR_50]], align 4 14649 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_50]], align 4 14650 // CHECK13-NEXT: [[SUB52:%.*]] = sub nsw i32 [[TMP37]], 0 14651 // CHECK13-NEXT: [[DIV53:%.*]] = sdiv i32 [[SUB52]], 1 14652 // CHECK13-NEXT: [[SUB54:%.*]] = sub nsw i32 [[DIV53]], 1 14653 // CHECK13-NEXT: store i32 [[SUB54]], ptr [[DOTCAPTURE_EXPR_51]], align 4 14654 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB55]], align 4 14655 // CHECK13-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_51]], align 4 14656 // CHECK13-NEXT: store i32 [[TMP38]], ptr [[DOTOMP_UB56]], align 4 14657 // CHECK13-NEXT: store i32 0, ptr [[I57]], align 4 14658 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_50]], align 4 14659 // CHECK13-NEXT: [[CMP58:%.*]] = icmp slt i32 0, [[TMP39]] 14660 // CHECK13-NEXT: br i1 [[CMP58]], label [[SIMD_IF_THEN59:%.*]], label [[SIMD_IF_END82:%.*]] 14661 // CHECK13: simd.if.then59: 14662 // CHECK13-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_LB55]], align 4 14663 // CHECK13-NEXT: store i32 [[TMP40]], ptr [[DOTOMP_IV60]], align 4 14664 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND62:%.*]] 14665 // CHECK13: omp.inner.for.cond62: 14666 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]] 14667 // CHECK13-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_UB56]], align 4, !llvm.access.group [[ACC_GRP9]] 14668 // CHECK13-NEXT: [[CMP63:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]] 14669 // CHECK13-NEXT: br i1 [[CMP63]], label [[OMP_INNER_FOR_BODY64:%.*]], label [[OMP_INNER_FOR_END77:%.*]] 14670 // CHECK13: omp.inner.for.body64: 14671 // CHECK13-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP9]] 14672 // CHECK13-NEXT: [[MUL65:%.*]] = mul nsw i32 [[TMP43]], 1 14673 // CHECK13-NEXT: [[ADD66:%.*]] = add nsw i32 0, [[MUL65]] 14674 // CHECK13-NEXT: store i32 [[ADD66]], ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP9]] 14675 // CHECK13-NEXT: [[TMP44:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP9]] 14676 // CHECK13-NEXT: [[TMP45:%.*]] = load i32, ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP9]] 14677 // CHECK13-NEXT: [[IDXPROM67:%.*]] = sext i32 [[TMP45]] to i64 14678 // CHECK13-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds double, ptr [[TMP44]], i64 [[IDXPROM67]] 14679 // CHECK13-NEXT: [[TMP46:%.*]] = load double, ptr [[ARRAYIDX68]], align 8, !llvm.access.group [[ACC_GRP9]] 14680 // CHECK13-NEXT: [[TMP47:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP9]] 14681 // CHECK13-NEXT: [[TMP48:%.*]] = load i32, ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP9]] 14682 // CHECK13-NEXT: [[IDXPROM69:%.*]] = sext i32 [[TMP48]] to i64 14683 // CHECK13-NEXT: [[ARRAYIDX70:%.*]] = getelementptr inbounds double, ptr [[TMP47]], i64 [[IDXPROM69]] 14684 // CHECK13-NEXT: [[TMP49:%.*]] = load double, ptr [[ARRAYIDX70]], align 8, !llvm.access.group [[ACC_GRP9]] 14685 // CHECK13-NEXT: [[ADD71:%.*]] = fadd double [[TMP46]], [[TMP49]] 14686 // CHECK13-NEXT: [[TMP50:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP9]] 14687 // CHECK13-NEXT: [[TMP51:%.*]] = load i32, ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP9]] 14688 // CHECK13-NEXT: [[IDXPROM72:%.*]] = sext i32 [[TMP51]] to i64 14689 // CHECK13-NEXT: [[ARRAYIDX73:%.*]] = getelementptr inbounds double, ptr [[TMP50]], i64 [[IDXPROM72]] 14690 // CHECK13-NEXT: store double [[ADD71]], ptr [[ARRAYIDX73]], align 8, !llvm.access.group [[ACC_GRP9]] 14691 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE74:%.*]] 14692 // CHECK13: omp.body.continue74: 14693 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC75:%.*]] 14694 // CHECK13: omp.inner.for.inc75: 14695 // CHECK13-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP9]] 14696 // CHECK13-NEXT: [[ADD76:%.*]] = add nsw i32 [[TMP52]], 1 14697 // CHECK13-NEXT: store i32 [[ADD76]], ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP9]] 14698 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND62]], !llvm.loop [[LOOP10:![0-9]+]] 14699 // CHECK13: omp.inner.for.end77: 14700 // CHECK13-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_50]], align 4 14701 // CHECK13-NEXT: [[SUB78:%.*]] = sub nsw i32 [[TMP53]], 0 14702 // CHECK13-NEXT: [[DIV79:%.*]] = sdiv i32 [[SUB78]], 1 14703 // CHECK13-NEXT: [[MUL80:%.*]] = mul nsw i32 [[DIV79]], 1 14704 // CHECK13-NEXT: [[ADD81:%.*]] = add nsw i32 0, [[MUL80]] 14705 // CHECK13-NEXT: store i32 [[ADD81]], ptr [[I61]], align 4 14706 // CHECK13-NEXT: br label [[SIMD_IF_END82]] 14707 // CHECK13: simd.if.end82: 14708 // CHECK13-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 14709 // CHECK13-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_84]], align 4 14710 // CHECK13-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_84]], align 4 14711 // CHECK13-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP55]], 0 14712 // CHECK13-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 14713 // CHECK13-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 14714 // CHECK13-NEXT: store i32 [[SUB88]], ptr [[DOTCAPTURE_EXPR_85]], align 4 14715 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB89]], align 4 14716 // CHECK13-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_85]], align 4 14717 // CHECK13-NEXT: store i32 [[TMP56]], ptr [[DOTOMP_UB90]], align 4 14718 // CHECK13-NEXT: store i32 0, ptr [[I91]], align 4 14719 // CHECK13-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_84]], align 4 14720 // CHECK13-NEXT: [[CMP92:%.*]] = icmp slt i32 0, [[TMP57]] 14721 // CHECK13-NEXT: br i1 [[CMP92]], label [[SIMD_IF_THEN93:%.*]], label [[SIMD_IF_END116:%.*]] 14722 // CHECK13: simd.if.then93: 14723 // CHECK13-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTOMP_LB89]], align 4 14724 // CHECK13-NEXT: store i32 [[TMP58]], ptr [[DOTOMP_IV94]], align 4 14725 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND96:%.*]] 14726 // CHECK13: omp.inner.for.cond96: 14727 // CHECK13-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]] 14728 // CHECK13-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTOMP_UB90]], align 4, !llvm.access.group [[ACC_GRP12]] 14729 // CHECK13-NEXT: [[CMP97:%.*]] = icmp sle i32 [[TMP59]], [[TMP60]] 14730 // CHECK13-NEXT: br i1 [[CMP97]], label [[OMP_INNER_FOR_BODY98:%.*]], label [[OMP_INNER_FOR_END111:%.*]] 14731 // CHECK13: omp.inner.for.body98: 14732 // CHECK13-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP12]] 14733 // CHECK13-NEXT: [[MUL99:%.*]] = mul nsw i32 [[TMP61]], 1 14734 // CHECK13-NEXT: [[ADD100:%.*]] = add nsw i32 0, [[MUL99]] 14735 // CHECK13-NEXT: store i32 [[ADD100]], ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP12]] 14736 // CHECK13-NEXT: [[TMP62:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP12]] 14737 // CHECK13-NEXT: [[TMP63:%.*]] = load i32, ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP12]] 14738 // CHECK13-NEXT: [[IDXPROM101:%.*]] = sext i32 [[TMP63]] to i64 14739 // CHECK13-NEXT: [[ARRAYIDX102:%.*]] = getelementptr inbounds double, ptr [[TMP62]], i64 [[IDXPROM101]] 14740 // CHECK13-NEXT: [[TMP64:%.*]] = load double, ptr [[ARRAYIDX102]], align 8, !llvm.access.group [[ACC_GRP12]] 14741 // CHECK13-NEXT: [[TMP65:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP12]] 14742 // CHECK13-NEXT: [[TMP66:%.*]] = load i32, ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP12]] 14743 // CHECK13-NEXT: [[IDXPROM103:%.*]] = sext i32 [[TMP66]] to i64 14744 // CHECK13-NEXT: [[ARRAYIDX104:%.*]] = getelementptr inbounds double, ptr [[TMP65]], i64 [[IDXPROM103]] 14745 // CHECK13-NEXT: [[TMP67:%.*]] = load double, ptr [[ARRAYIDX104]], align 8, !llvm.access.group [[ACC_GRP12]] 14746 // CHECK13-NEXT: [[ADD105:%.*]] = fadd double [[TMP64]], [[TMP67]] 14747 // CHECK13-NEXT: [[TMP68:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP12]] 14748 // CHECK13-NEXT: [[TMP69:%.*]] = load i32, ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP12]] 14749 // CHECK13-NEXT: [[IDXPROM106:%.*]] = sext i32 [[TMP69]] to i64 14750 // CHECK13-NEXT: [[ARRAYIDX107:%.*]] = getelementptr inbounds double, ptr [[TMP68]], i64 [[IDXPROM106]] 14751 // CHECK13-NEXT: store double [[ADD105]], ptr [[ARRAYIDX107]], align 8, !llvm.access.group [[ACC_GRP12]] 14752 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE108:%.*]] 14753 // CHECK13: omp.body.continue108: 14754 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC109:%.*]] 14755 // CHECK13: omp.inner.for.inc109: 14756 // CHECK13-NEXT: [[TMP70:%.*]] = load i32, ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP12]] 14757 // CHECK13-NEXT: [[ADD110:%.*]] = add nsw i32 [[TMP70]], 1 14758 // CHECK13-NEXT: store i32 [[ADD110]], ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP12]] 14759 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND96]], !llvm.loop [[LOOP13:![0-9]+]] 14760 // CHECK13: omp.inner.for.end111: 14761 // CHECK13-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_84]], align 4 14762 // CHECK13-NEXT: [[SUB112:%.*]] = sub nsw i32 [[TMP71]], 0 14763 // CHECK13-NEXT: [[DIV113:%.*]] = sdiv i32 [[SUB112]], 1 14764 // CHECK13-NEXT: [[MUL114:%.*]] = mul nsw i32 [[DIV113]], 1 14765 // CHECK13-NEXT: [[ADD115:%.*]] = add nsw i32 0, [[MUL114]] 14766 // CHECK13-NEXT: store i32 [[ADD115]], ptr [[I95]], align 4 14767 // CHECK13-NEXT: br label [[SIMD_IF_END116]] 14768 // CHECK13: simd.if.end116: 14769 // CHECK13-NEXT: [[TMP72:%.*]] = load i32, ptr [[CH]], align 4 14770 // CHECK13-NEXT: store i32 [[TMP72]], ptr [[DOTCAPTURE_EXPR_117]], align 4 14771 // CHECK13-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 4 14772 // CHECK13-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_119]], align 4 14773 // CHECK13-NEXT: [[TMP74:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_119]], align 4 14774 // CHECK13-NEXT: [[SUB121:%.*]] = sub nsw i32 [[TMP74]], 0 14775 // CHECK13-NEXT: [[DIV122:%.*]] = sdiv i32 [[SUB121]], 1 14776 // CHECK13-NEXT: [[SUB123:%.*]] = sub nsw i32 [[DIV122]], 1 14777 // CHECK13-NEXT: store i32 [[SUB123]], ptr [[DOTCAPTURE_EXPR_120]], align 4 14778 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB124]], align 4 14779 // CHECK13-NEXT: [[TMP75:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_120]], align 4 14780 // CHECK13-NEXT: store i32 [[TMP75]], ptr [[DOTOMP_UB125]], align 4 14781 // CHECK13-NEXT: store i32 0, ptr [[I126]], align 4 14782 // CHECK13-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_119]], align 4 14783 // CHECK13-NEXT: [[CMP127:%.*]] = icmp slt i32 0, [[TMP76]] 14784 // CHECK13-NEXT: br i1 [[CMP127]], label [[SIMD_IF_THEN128:%.*]], label [[SIMD_IF_END151:%.*]] 14785 // CHECK13: simd.if.then128: 14786 // CHECK13-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTOMP_LB124]], align 4 14787 // CHECK13-NEXT: store i32 [[TMP77]], ptr [[DOTOMP_IV129]], align 4 14788 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND131:%.*]] 14789 // CHECK13: omp.inner.for.cond131: 14790 // CHECK13-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]] 14791 // CHECK13-NEXT: [[TMP79:%.*]] = load i32, ptr [[DOTOMP_UB125]], align 4, !llvm.access.group [[ACC_GRP15]] 14792 // CHECK13-NEXT: [[CMP132:%.*]] = icmp sle i32 [[TMP78]], [[TMP79]] 14793 // CHECK13-NEXT: br i1 [[CMP132]], label [[OMP_INNER_FOR_BODY133:%.*]], label [[OMP_INNER_FOR_END146:%.*]] 14794 // CHECK13: omp.inner.for.body133: 14795 // CHECK13-NEXT: [[TMP80:%.*]] = load i32, ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP15]] 14796 // CHECK13-NEXT: [[MUL134:%.*]] = mul nsw i32 [[TMP80]], 1 14797 // CHECK13-NEXT: [[ADD135:%.*]] = add nsw i32 0, [[MUL134]] 14798 // CHECK13-NEXT: store i32 [[ADD135]], ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP15]] 14799 // CHECK13-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP15]] 14800 // CHECK13-NEXT: [[TMP82:%.*]] = load i32, ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP15]] 14801 // CHECK13-NEXT: [[IDXPROM136:%.*]] = sext i32 [[TMP82]] to i64 14802 // CHECK13-NEXT: [[ARRAYIDX137:%.*]] = getelementptr inbounds double, ptr [[TMP81]], i64 [[IDXPROM136]] 14803 // CHECK13-NEXT: [[TMP83:%.*]] = load double, ptr [[ARRAYIDX137]], align 8, !llvm.access.group [[ACC_GRP15]] 14804 // CHECK13-NEXT: [[TMP84:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP15]] 14805 // CHECK13-NEXT: [[TMP85:%.*]] = load i32, ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP15]] 14806 // CHECK13-NEXT: [[IDXPROM138:%.*]] = sext i32 [[TMP85]] to i64 14807 // CHECK13-NEXT: [[ARRAYIDX139:%.*]] = getelementptr inbounds double, ptr [[TMP84]], i64 [[IDXPROM138]] 14808 // CHECK13-NEXT: [[TMP86:%.*]] = load double, ptr [[ARRAYIDX139]], align 8, !llvm.access.group [[ACC_GRP15]] 14809 // CHECK13-NEXT: [[ADD140:%.*]] = fadd double [[TMP83]], [[TMP86]] 14810 // CHECK13-NEXT: [[TMP87:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP15]] 14811 // CHECK13-NEXT: [[TMP88:%.*]] = load i32, ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP15]] 14812 // CHECK13-NEXT: [[IDXPROM141:%.*]] = sext i32 [[TMP88]] to i64 14813 // CHECK13-NEXT: [[ARRAYIDX142:%.*]] = getelementptr inbounds double, ptr [[TMP87]], i64 [[IDXPROM141]] 14814 // CHECK13-NEXT: store double [[ADD140]], ptr [[ARRAYIDX142]], align 8, !llvm.access.group [[ACC_GRP15]] 14815 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE143:%.*]] 14816 // CHECK13: omp.body.continue143: 14817 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC144:%.*]] 14818 // CHECK13: omp.inner.for.inc144: 14819 // CHECK13-NEXT: [[TMP89:%.*]] = load i32, ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP15]] 14820 // CHECK13-NEXT: [[ADD145:%.*]] = add nsw i32 [[TMP89]], 1 14821 // CHECK13-NEXT: store i32 [[ADD145]], ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP15]] 14822 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND131]], !llvm.loop [[LOOP16:![0-9]+]] 14823 // CHECK13: omp.inner.for.end146: 14824 // CHECK13-NEXT: [[TMP90:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_119]], align 4 14825 // CHECK13-NEXT: [[SUB147:%.*]] = sub nsw i32 [[TMP90]], 0 14826 // CHECK13-NEXT: [[DIV148:%.*]] = sdiv i32 [[SUB147]], 1 14827 // CHECK13-NEXT: [[MUL149:%.*]] = mul nsw i32 [[DIV148]], 1 14828 // CHECK13-NEXT: [[ADD150:%.*]] = add nsw i32 0, [[MUL149]] 14829 // CHECK13-NEXT: store i32 [[ADD150]], ptr [[I130]], align 4 14830 // CHECK13-NEXT: br label [[SIMD_IF_END151]] 14831 // CHECK13: simd.if.end151: 14832 // CHECK13-NEXT: [[TMP91:%.*]] = load i32, ptr [[N]], align 4 14833 // CHECK13-NEXT: store i32 [[TMP91]], ptr [[DOTCAPTURE_EXPR_153]], align 4 14834 // CHECK13-NEXT: [[TMP92:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_153]], align 4 14835 // CHECK13-NEXT: [[SUB155:%.*]] = sub nsw i32 [[TMP92]], 0 14836 // CHECK13-NEXT: [[DIV156:%.*]] = sdiv i32 [[SUB155]], 1 14837 // CHECK13-NEXT: [[SUB157:%.*]] = sub nsw i32 [[DIV156]], 1 14838 // CHECK13-NEXT: store i32 [[SUB157]], ptr [[DOTCAPTURE_EXPR_154]], align 4 14839 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB158]], align 4 14840 // CHECK13-NEXT: [[TMP93:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_154]], align 4 14841 // CHECK13-NEXT: store i32 [[TMP93]], ptr [[DOTOMP_UB159]], align 4 14842 // CHECK13-NEXT: store i32 0, ptr [[I160]], align 4 14843 // CHECK13-NEXT: [[TMP94:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_153]], align 4 14844 // CHECK13-NEXT: [[CMP161:%.*]] = icmp slt i32 0, [[TMP94]] 14845 // CHECK13-NEXT: br i1 [[CMP161]], label [[SIMD_IF_THEN162:%.*]], label [[SIMD_IF_END185:%.*]] 14846 // CHECK13: simd.if.then162: 14847 // CHECK13-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTOMP_LB158]], align 4 14848 // CHECK13-NEXT: store i32 [[TMP95]], ptr [[DOTOMP_IV163]], align 4 14849 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND165:%.*]] 14850 // CHECK13: omp.inner.for.cond165: 14851 // CHECK13-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]] 14852 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTOMP_UB159]], align 4, !llvm.access.group [[ACC_GRP18]] 14853 // CHECK13-NEXT: [[CMP166:%.*]] = icmp sle i32 [[TMP96]], [[TMP97]] 14854 // CHECK13-NEXT: br i1 [[CMP166]], label [[OMP_INNER_FOR_BODY167:%.*]], label [[OMP_INNER_FOR_END180:%.*]] 14855 // CHECK13: omp.inner.for.body167: 14856 // CHECK13-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP18]] 14857 // CHECK13-NEXT: [[MUL168:%.*]] = mul nsw i32 [[TMP98]], 1 14858 // CHECK13-NEXT: [[ADD169:%.*]] = add nsw i32 0, [[MUL168]] 14859 // CHECK13-NEXT: store i32 [[ADD169]], ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP18]] 14860 // CHECK13-NEXT: [[TMP99:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP18]] 14861 // CHECK13-NEXT: [[TMP100:%.*]] = load i32, ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP18]] 14862 // CHECK13-NEXT: [[IDXPROM170:%.*]] = sext i32 [[TMP100]] to i64 14863 // CHECK13-NEXT: [[ARRAYIDX171:%.*]] = getelementptr inbounds double, ptr [[TMP99]], i64 [[IDXPROM170]] 14864 // CHECK13-NEXT: [[TMP101:%.*]] = load double, ptr [[ARRAYIDX171]], align 8, !llvm.access.group [[ACC_GRP18]] 14865 // CHECK13-NEXT: [[TMP102:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP18]] 14866 // CHECK13-NEXT: [[TMP103:%.*]] = load i32, ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP18]] 14867 // CHECK13-NEXT: [[IDXPROM172:%.*]] = sext i32 [[TMP103]] to i64 14868 // CHECK13-NEXT: [[ARRAYIDX173:%.*]] = getelementptr inbounds double, ptr [[TMP102]], i64 [[IDXPROM172]] 14869 // CHECK13-NEXT: [[TMP104:%.*]] = load double, ptr [[ARRAYIDX173]], align 8, !llvm.access.group [[ACC_GRP18]] 14870 // CHECK13-NEXT: [[ADD174:%.*]] = fadd double [[TMP101]], [[TMP104]] 14871 // CHECK13-NEXT: [[TMP105:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP18]] 14872 // CHECK13-NEXT: [[TMP106:%.*]] = load i32, ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP18]] 14873 // CHECK13-NEXT: [[IDXPROM175:%.*]] = sext i32 [[TMP106]] to i64 14874 // CHECK13-NEXT: [[ARRAYIDX176:%.*]] = getelementptr inbounds double, ptr [[TMP105]], i64 [[IDXPROM175]] 14875 // CHECK13-NEXT: store double [[ADD174]], ptr [[ARRAYIDX176]], align 8, !llvm.access.group [[ACC_GRP18]] 14876 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE177:%.*]] 14877 // CHECK13: omp.body.continue177: 14878 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC178:%.*]] 14879 // CHECK13: omp.inner.for.inc178: 14880 // CHECK13-NEXT: [[TMP107:%.*]] = load i32, ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP18]] 14881 // CHECK13-NEXT: [[ADD179:%.*]] = add nsw i32 [[TMP107]], 1 14882 // CHECK13-NEXT: store i32 [[ADD179]], ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP18]] 14883 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND165]], !llvm.loop [[LOOP19:![0-9]+]] 14884 // CHECK13: omp.inner.for.end180: 14885 // CHECK13-NEXT: [[TMP108:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_153]], align 4 14886 // CHECK13-NEXT: [[SUB181:%.*]] = sub nsw i32 [[TMP108]], 0 14887 // CHECK13-NEXT: [[DIV182:%.*]] = sdiv i32 [[SUB181]], 1 14888 // CHECK13-NEXT: [[MUL183:%.*]] = mul nsw i32 [[DIV182]], 1 14889 // CHECK13-NEXT: [[ADD184:%.*]] = add nsw i32 0, [[MUL183]] 14890 // CHECK13-NEXT: store i32 [[ADD184]], ptr [[I164]], align 4 14891 // CHECK13-NEXT: br label [[SIMD_IF_END185]] 14892 // CHECK13: simd.if.end185: 14893 // CHECK13-NEXT: [[TMP109:%.*]] = load i32, ptr [[CH]], align 4 14894 // CHECK13-NEXT: store i32 [[TMP109]], ptr [[DOTCAPTURE_EXPR_186]], align 4 14895 // CHECK13-NEXT: [[TMP110:%.*]] = load i32, ptr [[N]], align 4 14896 // CHECK13-NEXT: store i32 [[TMP110]], ptr [[DOTCAPTURE_EXPR_188]], align 4 14897 // CHECK13-NEXT: [[TMP111:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_188]], align 4 14898 // CHECK13-NEXT: [[SUB190:%.*]] = sub nsw i32 [[TMP111]], 0 14899 // CHECK13-NEXT: [[DIV191:%.*]] = sdiv i32 [[SUB190]], 1 14900 // CHECK13-NEXT: [[SUB192:%.*]] = sub nsw i32 [[DIV191]], 1 14901 // CHECK13-NEXT: store i32 [[SUB192]], ptr [[DOTCAPTURE_EXPR_189]], align 4 14902 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB193]], align 4 14903 // CHECK13-NEXT: [[TMP112:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_189]], align 4 14904 // CHECK13-NEXT: store i32 [[TMP112]], ptr [[DOTOMP_UB194]], align 4 14905 // CHECK13-NEXT: store i32 0, ptr [[I195]], align 4 14906 // CHECK13-NEXT: [[TMP113:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_188]], align 4 14907 // CHECK13-NEXT: [[CMP196:%.*]] = icmp slt i32 0, [[TMP113]] 14908 // CHECK13-NEXT: br i1 [[CMP196]], label [[SIMD_IF_THEN197:%.*]], label [[SIMD_IF_END220:%.*]] 14909 // CHECK13: simd.if.then197: 14910 // CHECK13-NEXT: [[TMP114:%.*]] = load i32, ptr [[DOTOMP_LB193]], align 4 14911 // CHECK13-NEXT: store i32 [[TMP114]], ptr [[DOTOMP_IV198]], align 4 14912 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND200:%.*]] 14913 // CHECK13: omp.inner.for.cond200: 14914 // CHECK13-NEXT: [[TMP115:%.*]] = load i32, ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]] 14915 // CHECK13-NEXT: [[TMP116:%.*]] = load i32, ptr [[DOTOMP_UB194]], align 4, !llvm.access.group [[ACC_GRP21]] 14916 // CHECK13-NEXT: [[CMP201:%.*]] = icmp sle i32 [[TMP115]], [[TMP116]] 14917 // CHECK13-NEXT: br i1 [[CMP201]], label [[OMP_INNER_FOR_BODY202:%.*]], label [[OMP_INNER_FOR_END215:%.*]] 14918 // CHECK13: omp.inner.for.body202: 14919 // CHECK13-NEXT: [[TMP117:%.*]] = load i32, ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP21]] 14920 // CHECK13-NEXT: [[MUL203:%.*]] = mul nsw i32 [[TMP117]], 1 14921 // CHECK13-NEXT: [[ADD204:%.*]] = add nsw i32 0, [[MUL203]] 14922 // CHECK13-NEXT: store i32 [[ADD204]], ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP21]] 14923 // CHECK13-NEXT: [[TMP118:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP21]] 14924 // CHECK13-NEXT: [[TMP119:%.*]] = load i32, ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP21]] 14925 // CHECK13-NEXT: [[IDXPROM205:%.*]] = sext i32 [[TMP119]] to i64 14926 // CHECK13-NEXT: [[ARRAYIDX206:%.*]] = getelementptr inbounds double, ptr [[TMP118]], i64 [[IDXPROM205]] 14927 // CHECK13-NEXT: [[TMP120:%.*]] = load double, ptr [[ARRAYIDX206]], align 8, !llvm.access.group [[ACC_GRP21]] 14928 // CHECK13-NEXT: [[TMP121:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP21]] 14929 // CHECK13-NEXT: [[TMP122:%.*]] = load i32, ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP21]] 14930 // CHECK13-NEXT: [[IDXPROM207:%.*]] = sext i32 [[TMP122]] to i64 14931 // CHECK13-NEXT: [[ARRAYIDX208:%.*]] = getelementptr inbounds double, ptr [[TMP121]], i64 [[IDXPROM207]] 14932 // CHECK13-NEXT: [[TMP123:%.*]] = load double, ptr [[ARRAYIDX208]], align 8, !llvm.access.group [[ACC_GRP21]] 14933 // CHECK13-NEXT: [[ADD209:%.*]] = fadd double [[TMP120]], [[TMP123]] 14934 // CHECK13-NEXT: [[TMP124:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP21]] 14935 // CHECK13-NEXT: [[TMP125:%.*]] = load i32, ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP21]] 14936 // CHECK13-NEXT: [[IDXPROM210:%.*]] = sext i32 [[TMP125]] to i64 14937 // CHECK13-NEXT: [[ARRAYIDX211:%.*]] = getelementptr inbounds double, ptr [[TMP124]], i64 [[IDXPROM210]] 14938 // CHECK13-NEXT: store double [[ADD209]], ptr [[ARRAYIDX211]], align 8, !llvm.access.group [[ACC_GRP21]] 14939 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE212:%.*]] 14940 // CHECK13: omp.body.continue212: 14941 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC213:%.*]] 14942 // CHECK13: omp.inner.for.inc213: 14943 // CHECK13-NEXT: [[TMP126:%.*]] = load i32, ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP21]] 14944 // CHECK13-NEXT: [[ADD214:%.*]] = add nsw i32 [[TMP126]], 1 14945 // CHECK13-NEXT: store i32 [[ADD214]], ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP21]] 14946 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND200]], !llvm.loop [[LOOP22:![0-9]+]] 14947 // CHECK13: omp.inner.for.end215: 14948 // CHECK13-NEXT: [[TMP127:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_188]], align 4 14949 // CHECK13-NEXT: [[SUB216:%.*]] = sub nsw i32 [[TMP127]], 0 14950 // CHECK13-NEXT: [[DIV217:%.*]] = sdiv i32 [[SUB216]], 1 14951 // CHECK13-NEXT: [[MUL218:%.*]] = mul nsw i32 [[DIV217]], 1 14952 // CHECK13-NEXT: [[ADD219:%.*]] = add nsw i32 0, [[MUL218]] 14953 // CHECK13-NEXT: store i32 [[ADD219]], ptr [[I199]], align 4 14954 // CHECK13-NEXT: br label [[SIMD_IF_END220]] 14955 // CHECK13: simd.if.end220: 14956 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 14957 // CHECK13-NEXT: ret i32 [[CALL]] 14958 // 14959 // 14960 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 14961 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] comdat { 14962 // CHECK13-NEXT: entry: 14963 // CHECK13-NEXT: [[A:%.*]] = alloca ptr, align 8 14964 // CHECK13-NEXT: [[B:%.*]] = alloca ptr, align 8 14965 // CHECK13-NEXT: [[C:%.*]] = alloca ptr, align 8 14966 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 14967 // CHECK13-NEXT: [[CH:%.*]] = alloca i32, align 4 14968 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 14969 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14970 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14971 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14972 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14973 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 14974 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14975 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 14976 // CHECK13-NEXT: [[_TMP15:%.*]] = alloca i32, align 4 14977 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4 14978 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 14979 // CHECK13-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 14980 // CHECK13-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 14981 // CHECK13-NEXT: [[I23:%.*]] = alloca i32, align 4 14982 // CHECK13-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4 14983 // CHECK13-NEXT: [[I27:%.*]] = alloca i32, align 4 14984 // CHECK13-NEXT: [[_TMP49:%.*]] = alloca i32, align 4 14985 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4 14986 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_51:%.*]] = alloca i32, align 4 14987 // CHECK13-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4 14988 // CHECK13-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4 14989 // CHECK13-NEXT: [[I57:%.*]] = alloca i32, align 4 14990 // CHECK13-NEXT: [[DOTOMP_IV60:%.*]] = alloca i32, align 4 14991 // CHECK13-NEXT: [[I61:%.*]] = alloca i32, align 4 14992 // CHECK13-NEXT: [[_TMP83:%.*]] = alloca i32, align 4 14993 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_84:%.*]] = alloca i32, align 4 14994 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_85:%.*]] = alloca i32, align 4 14995 // CHECK13-NEXT: [[DOTOMP_LB89:%.*]] = alloca i32, align 4 14996 // CHECK13-NEXT: [[DOTOMP_UB90:%.*]] = alloca i32, align 4 14997 // CHECK13-NEXT: [[I91:%.*]] = alloca i32, align 4 14998 // CHECK13-NEXT: [[DOTOMP_IV94:%.*]] = alloca i32, align 4 14999 // CHECK13-NEXT: [[I95:%.*]] = alloca i32, align 4 15000 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_117:%.*]] = alloca i32, align 4 15001 // CHECK13-NEXT: [[_TMP118:%.*]] = alloca i32, align 4 15002 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_119:%.*]] = alloca i32, align 4 15003 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_120:%.*]] = alloca i32, align 4 15004 // CHECK13-NEXT: [[DOTOMP_LB124:%.*]] = alloca i32, align 4 15005 // CHECK13-NEXT: [[DOTOMP_UB125:%.*]] = alloca i32, align 4 15006 // CHECK13-NEXT: [[I126:%.*]] = alloca i32, align 4 15007 // CHECK13-NEXT: [[DOTOMP_IV129:%.*]] = alloca i32, align 4 15008 // CHECK13-NEXT: [[I130:%.*]] = alloca i32, align 4 15009 // CHECK13-NEXT: [[_TMP152:%.*]] = alloca i32, align 4 15010 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_153:%.*]] = alloca i32, align 4 15011 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_154:%.*]] = alloca i32, align 4 15012 // CHECK13-NEXT: [[DOTOMP_LB158:%.*]] = alloca i32, align 4 15013 // CHECK13-NEXT: [[DOTOMP_UB159:%.*]] = alloca i32, align 4 15014 // CHECK13-NEXT: [[I160:%.*]] = alloca i32, align 4 15015 // CHECK13-NEXT: [[DOTOMP_IV163:%.*]] = alloca i32, align 4 15016 // CHECK13-NEXT: [[I164:%.*]] = alloca i32, align 4 15017 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_186:%.*]] = alloca i32, align 4 15018 // CHECK13-NEXT: [[_TMP187:%.*]] = alloca i32, align 4 15019 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_188:%.*]] = alloca i32, align 4 15020 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_189:%.*]] = alloca i32, align 4 15021 // CHECK13-NEXT: [[DOTOMP_LB193:%.*]] = alloca i32, align 4 15022 // CHECK13-NEXT: [[DOTOMP_UB194:%.*]] = alloca i32, align 4 15023 // CHECK13-NEXT: [[I195:%.*]] = alloca i32, align 4 15024 // CHECK13-NEXT: [[DOTOMP_IV198:%.*]] = alloca i32, align 4 15025 // CHECK13-NEXT: [[I199:%.*]] = alloca i32, align 4 15026 // CHECK13-NEXT: store i32 10000, ptr [[N]], align 4 15027 // CHECK13-NEXT: store i32 100, ptr [[CH]], align 4 15028 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 15029 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4 15030 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15031 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0 15032 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15033 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15034 // CHECK13-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 15035 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15036 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 15037 // CHECK13-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 15038 // CHECK13-NEXT: store i32 0, ptr [[I]], align 4 15039 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15040 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 15041 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 15042 // CHECK13: simd.if.then: 15043 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15044 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 15045 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15046 // CHECK13: omp.inner.for.cond: 15047 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]] 15048 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]] 15049 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 15050 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15051 // CHECK13: omp.inner.for.body: 15052 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 15053 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 15054 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15055 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP24]] 15056 // CHECK13-NEXT: [[TMP8:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP24]] 15057 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP24]] 15058 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 15059 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i64 [[IDXPROM]] 15060 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]] 15061 // CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP24]] 15062 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP24]] 15063 // CHECK13-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP12]] to i64 15064 // CHECK13-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i64 [[IDXPROM5]] 15065 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP24]] 15066 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP10]], [[TMP13]] 15067 // CHECK13-NEXT: [[TMP14:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP24]] 15068 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP24]] 15069 // CHECK13-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64 15070 // CHECK13-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i64 [[IDXPROM8]] 15071 // CHECK13-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX9]], align 4, !llvm.access.group [[ACC_GRP24]] 15072 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15073 // CHECK13: omp.body.continue: 15074 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15075 // CHECK13: omp.inner.for.inc: 15076 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 15077 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1 15078 // CHECK13-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]] 15079 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 15080 // CHECK13: omp.inner.for.end: 15081 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15082 // CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP17]], 0 15083 // CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 15084 // CHECK13-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 15085 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 15086 // CHECK13-NEXT: store i32 [[ADD14]], ptr [[I3]], align 4 15087 // CHECK13-NEXT: br label [[SIMD_IF_END]] 15088 // CHECK13: simd.if.end: 15089 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[N]], align 4 15090 // CHECK13-NEXT: store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR_16]], align 4 15091 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4 15092 // CHECK13-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP19]], 0 15093 // CHECK13-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1 15094 // CHECK13-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1 15095 // CHECK13-NEXT: store i32 [[SUB20]], ptr [[DOTCAPTURE_EXPR_17]], align 4 15096 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB21]], align 4 15097 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_17]], align 4 15098 // CHECK13-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_UB22]], align 4 15099 // CHECK13-NEXT: store i32 0, ptr [[I23]], align 4 15100 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4 15101 // CHECK13-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP21]] 15102 // CHECK13-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END48:%.*]] 15103 // CHECK13: simd.if.then25: 15104 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4 15105 // CHECK13-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV26]], align 4 15106 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]] 15107 // CHECK13: omp.inner.for.cond28: 15108 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]] 15109 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP27]] 15110 // CHECK13-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] 15111 // CHECK13-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END43:%.*]] 15112 // CHECK13: omp.inner.for.body30: 15113 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP27]] 15114 // CHECK13-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP25]], 1 15115 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]] 15116 // CHECK13-NEXT: store i32 [[ADD32]], ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP27]] 15117 // CHECK13-NEXT: [[TMP26:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP27]] 15118 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP27]] 15119 // CHECK13-NEXT: [[IDXPROM33:%.*]] = sext i32 [[TMP27]] to i64 15120 // CHECK13-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i64 [[IDXPROM33]] 15121 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, ptr [[ARRAYIDX34]], align 4, !llvm.access.group [[ACC_GRP27]] 15122 // CHECK13-NEXT: [[TMP29:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP27]] 15123 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP27]] 15124 // CHECK13-NEXT: [[IDXPROM35:%.*]] = sext i32 [[TMP30]] to i64 15125 // CHECK13-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i64 [[IDXPROM35]] 15126 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, ptr [[ARRAYIDX36]], align 4, !llvm.access.group [[ACC_GRP27]] 15127 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP28]], [[TMP31]] 15128 // CHECK13-NEXT: [[TMP32:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP27]] 15129 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP27]] 15130 // CHECK13-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP33]] to i64 15131 // CHECK13-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds i32, ptr [[TMP32]], i64 [[IDXPROM38]] 15132 // CHECK13-NEXT: store i32 [[ADD37]], ptr [[ARRAYIDX39]], align 4, !llvm.access.group [[ACC_GRP27]] 15133 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE40:%.*]] 15134 // CHECK13: omp.body.continue40: 15135 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC41:%.*]] 15136 // CHECK13: omp.inner.for.inc41: 15137 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP27]] 15138 // CHECK13-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP34]], 1 15139 // CHECK13-NEXT: store i32 [[ADD42]], ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP27]] 15140 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP28:![0-9]+]] 15141 // CHECK13: omp.inner.for.end43: 15142 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4 15143 // CHECK13-NEXT: [[SUB44:%.*]] = sub nsw i32 [[TMP35]], 0 15144 // CHECK13-NEXT: [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1 15145 // CHECK13-NEXT: [[MUL46:%.*]] = mul nsw i32 [[DIV45]], 1 15146 // CHECK13-NEXT: [[ADD47:%.*]] = add nsw i32 0, [[MUL46]] 15147 // CHECK13-NEXT: store i32 [[ADD47]], ptr [[I27]], align 4 15148 // CHECK13-NEXT: br label [[SIMD_IF_END48]] 15149 // CHECK13: simd.if.end48: 15150 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, ptr [[N]], align 4 15151 // CHECK13-NEXT: store i32 [[TMP36]], ptr [[DOTCAPTURE_EXPR_50]], align 4 15152 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_50]], align 4 15153 // CHECK13-NEXT: [[SUB52:%.*]] = sub nsw i32 [[TMP37]], 0 15154 // CHECK13-NEXT: [[DIV53:%.*]] = sdiv i32 [[SUB52]], 1 15155 // CHECK13-NEXT: [[SUB54:%.*]] = sub nsw i32 [[DIV53]], 1 15156 // CHECK13-NEXT: store i32 [[SUB54]], ptr [[DOTCAPTURE_EXPR_51]], align 4 15157 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB55]], align 4 15158 // CHECK13-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_51]], align 4 15159 // CHECK13-NEXT: store i32 [[TMP38]], ptr [[DOTOMP_UB56]], align 4 15160 // CHECK13-NEXT: store i32 0, ptr [[I57]], align 4 15161 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_50]], align 4 15162 // CHECK13-NEXT: [[CMP58:%.*]] = icmp slt i32 0, [[TMP39]] 15163 // CHECK13-NEXT: br i1 [[CMP58]], label [[SIMD_IF_THEN59:%.*]], label [[SIMD_IF_END82:%.*]] 15164 // CHECK13: simd.if.then59: 15165 // CHECK13-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_LB55]], align 4 15166 // CHECK13-NEXT: store i32 [[TMP40]], ptr [[DOTOMP_IV60]], align 4 15167 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND62:%.*]] 15168 // CHECK13: omp.inner.for.cond62: 15169 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]] 15170 // CHECK13-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_UB56]], align 4, !llvm.access.group [[ACC_GRP30]] 15171 // CHECK13-NEXT: [[CMP63:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]] 15172 // CHECK13-NEXT: br i1 [[CMP63]], label [[OMP_INNER_FOR_BODY64:%.*]], label [[OMP_INNER_FOR_END77:%.*]] 15173 // CHECK13: omp.inner.for.body64: 15174 // CHECK13-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP30]] 15175 // CHECK13-NEXT: [[MUL65:%.*]] = mul nsw i32 [[TMP43]], 1 15176 // CHECK13-NEXT: [[ADD66:%.*]] = add nsw i32 0, [[MUL65]] 15177 // CHECK13-NEXT: store i32 [[ADD66]], ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP30]] 15178 // CHECK13-NEXT: [[TMP44:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP30]] 15179 // CHECK13-NEXT: [[TMP45:%.*]] = load i32, ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP30]] 15180 // CHECK13-NEXT: [[IDXPROM67:%.*]] = sext i32 [[TMP45]] to i64 15181 // CHECK13-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds i32, ptr [[TMP44]], i64 [[IDXPROM67]] 15182 // CHECK13-NEXT: [[TMP46:%.*]] = load i32, ptr [[ARRAYIDX68]], align 4, !llvm.access.group [[ACC_GRP30]] 15183 // CHECK13-NEXT: [[TMP47:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP30]] 15184 // CHECK13-NEXT: [[TMP48:%.*]] = load i32, ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP30]] 15185 // CHECK13-NEXT: [[IDXPROM69:%.*]] = sext i32 [[TMP48]] to i64 15186 // CHECK13-NEXT: [[ARRAYIDX70:%.*]] = getelementptr inbounds i32, ptr [[TMP47]], i64 [[IDXPROM69]] 15187 // CHECK13-NEXT: [[TMP49:%.*]] = load i32, ptr [[ARRAYIDX70]], align 4, !llvm.access.group [[ACC_GRP30]] 15188 // CHECK13-NEXT: [[ADD71:%.*]] = add nsw i32 [[TMP46]], [[TMP49]] 15189 // CHECK13-NEXT: [[TMP50:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP30]] 15190 // CHECK13-NEXT: [[TMP51:%.*]] = load i32, ptr [[I61]], align 4, !llvm.access.group [[ACC_GRP30]] 15191 // CHECK13-NEXT: [[IDXPROM72:%.*]] = sext i32 [[TMP51]] to i64 15192 // CHECK13-NEXT: [[ARRAYIDX73:%.*]] = getelementptr inbounds i32, ptr [[TMP50]], i64 [[IDXPROM72]] 15193 // CHECK13-NEXT: store i32 [[ADD71]], ptr [[ARRAYIDX73]], align 4, !llvm.access.group [[ACC_GRP30]] 15194 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE74:%.*]] 15195 // CHECK13: omp.body.continue74: 15196 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC75:%.*]] 15197 // CHECK13: omp.inner.for.inc75: 15198 // CHECK13-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP30]] 15199 // CHECK13-NEXT: [[ADD76:%.*]] = add nsw i32 [[TMP52]], 1 15200 // CHECK13-NEXT: store i32 [[ADD76]], ptr [[DOTOMP_IV60]], align 4, !llvm.access.group [[ACC_GRP30]] 15201 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND62]], !llvm.loop [[LOOP31:![0-9]+]] 15202 // CHECK13: omp.inner.for.end77: 15203 // CHECK13-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_50]], align 4 15204 // CHECK13-NEXT: [[SUB78:%.*]] = sub nsw i32 [[TMP53]], 0 15205 // CHECK13-NEXT: [[DIV79:%.*]] = sdiv i32 [[SUB78]], 1 15206 // CHECK13-NEXT: [[MUL80:%.*]] = mul nsw i32 [[DIV79]], 1 15207 // CHECK13-NEXT: [[ADD81:%.*]] = add nsw i32 0, [[MUL80]] 15208 // CHECK13-NEXT: store i32 [[ADD81]], ptr [[I61]], align 4 15209 // CHECK13-NEXT: br label [[SIMD_IF_END82]] 15210 // CHECK13: simd.if.end82: 15211 // CHECK13-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 15212 // CHECK13-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_84]], align 4 15213 // CHECK13-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_84]], align 4 15214 // CHECK13-NEXT: [[SUB86:%.*]] = sub nsw i32 [[TMP55]], 0 15215 // CHECK13-NEXT: [[DIV87:%.*]] = sdiv i32 [[SUB86]], 1 15216 // CHECK13-NEXT: [[SUB88:%.*]] = sub nsw i32 [[DIV87]], 1 15217 // CHECK13-NEXT: store i32 [[SUB88]], ptr [[DOTCAPTURE_EXPR_85]], align 4 15218 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB89]], align 4 15219 // CHECK13-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_85]], align 4 15220 // CHECK13-NEXT: store i32 [[TMP56]], ptr [[DOTOMP_UB90]], align 4 15221 // CHECK13-NEXT: store i32 0, ptr [[I91]], align 4 15222 // CHECK13-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_84]], align 4 15223 // CHECK13-NEXT: [[CMP92:%.*]] = icmp slt i32 0, [[TMP57]] 15224 // CHECK13-NEXT: br i1 [[CMP92]], label [[SIMD_IF_THEN93:%.*]], label [[SIMD_IF_END116:%.*]] 15225 // CHECK13: simd.if.then93: 15226 // CHECK13-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTOMP_LB89]], align 4 15227 // CHECK13-NEXT: store i32 [[TMP58]], ptr [[DOTOMP_IV94]], align 4 15228 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND96:%.*]] 15229 // CHECK13: omp.inner.for.cond96: 15230 // CHECK13-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]] 15231 // CHECK13-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTOMP_UB90]], align 4, !llvm.access.group [[ACC_GRP33]] 15232 // CHECK13-NEXT: [[CMP97:%.*]] = icmp sle i32 [[TMP59]], [[TMP60]] 15233 // CHECK13-NEXT: br i1 [[CMP97]], label [[OMP_INNER_FOR_BODY98:%.*]], label [[OMP_INNER_FOR_END111:%.*]] 15234 // CHECK13: omp.inner.for.body98: 15235 // CHECK13-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP33]] 15236 // CHECK13-NEXT: [[MUL99:%.*]] = mul nsw i32 [[TMP61]], 1 15237 // CHECK13-NEXT: [[ADD100:%.*]] = add nsw i32 0, [[MUL99]] 15238 // CHECK13-NEXT: store i32 [[ADD100]], ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP33]] 15239 // CHECK13-NEXT: [[TMP62:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP33]] 15240 // CHECK13-NEXT: [[TMP63:%.*]] = load i32, ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP33]] 15241 // CHECK13-NEXT: [[IDXPROM101:%.*]] = sext i32 [[TMP63]] to i64 15242 // CHECK13-NEXT: [[ARRAYIDX102:%.*]] = getelementptr inbounds i32, ptr [[TMP62]], i64 [[IDXPROM101]] 15243 // CHECK13-NEXT: [[TMP64:%.*]] = load i32, ptr [[ARRAYIDX102]], align 4, !llvm.access.group [[ACC_GRP33]] 15244 // CHECK13-NEXT: [[TMP65:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP33]] 15245 // CHECK13-NEXT: [[TMP66:%.*]] = load i32, ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP33]] 15246 // CHECK13-NEXT: [[IDXPROM103:%.*]] = sext i32 [[TMP66]] to i64 15247 // CHECK13-NEXT: [[ARRAYIDX104:%.*]] = getelementptr inbounds i32, ptr [[TMP65]], i64 [[IDXPROM103]] 15248 // CHECK13-NEXT: [[TMP67:%.*]] = load i32, ptr [[ARRAYIDX104]], align 4, !llvm.access.group [[ACC_GRP33]] 15249 // CHECK13-NEXT: [[ADD105:%.*]] = add nsw i32 [[TMP64]], [[TMP67]] 15250 // CHECK13-NEXT: [[TMP68:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP33]] 15251 // CHECK13-NEXT: [[TMP69:%.*]] = load i32, ptr [[I95]], align 4, !llvm.access.group [[ACC_GRP33]] 15252 // CHECK13-NEXT: [[IDXPROM106:%.*]] = sext i32 [[TMP69]] to i64 15253 // CHECK13-NEXT: [[ARRAYIDX107:%.*]] = getelementptr inbounds i32, ptr [[TMP68]], i64 [[IDXPROM106]] 15254 // CHECK13-NEXT: store i32 [[ADD105]], ptr [[ARRAYIDX107]], align 4, !llvm.access.group [[ACC_GRP33]] 15255 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE108:%.*]] 15256 // CHECK13: omp.body.continue108: 15257 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC109:%.*]] 15258 // CHECK13: omp.inner.for.inc109: 15259 // CHECK13-NEXT: [[TMP70:%.*]] = load i32, ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP33]] 15260 // CHECK13-NEXT: [[ADD110:%.*]] = add nsw i32 [[TMP70]], 1 15261 // CHECK13-NEXT: store i32 [[ADD110]], ptr [[DOTOMP_IV94]], align 4, !llvm.access.group [[ACC_GRP33]] 15262 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND96]], !llvm.loop [[LOOP34:![0-9]+]] 15263 // CHECK13: omp.inner.for.end111: 15264 // CHECK13-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_84]], align 4 15265 // CHECK13-NEXT: [[SUB112:%.*]] = sub nsw i32 [[TMP71]], 0 15266 // CHECK13-NEXT: [[DIV113:%.*]] = sdiv i32 [[SUB112]], 1 15267 // CHECK13-NEXT: [[MUL114:%.*]] = mul nsw i32 [[DIV113]], 1 15268 // CHECK13-NEXT: [[ADD115:%.*]] = add nsw i32 0, [[MUL114]] 15269 // CHECK13-NEXT: store i32 [[ADD115]], ptr [[I95]], align 4 15270 // CHECK13-NEXT: br label [[SIMD_IF_END116]] 15271 // CHECK13: simd.if.end116: 15272 // CHECK13-NEXT: [[TMP72:%.*]] = load i32, ptr [[CH]], align 4 15273 // CHECK13-NEXT: store i32 [[TMP72]], ptr [[DOTCAPTURE_EXPR_117]], align 4 15274 // CHECK13-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 4 15275 // CHECK13-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_119]], align 4 15276 // CHECK13-NEXT: [[TMP74:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_119]], align 4 15277 // CHECK13-NEXT: [[SUB121:%.*]] = sub nsw i32 [[TMP74]], 0 15278 // CHECK13-NEXT: [[DIV122:%.*]] = sdiv i32 [[SUB121]], 1 15279 // CHECK13-NEXT: [[SUB123:%.*]] = sub nsw i32 [[DIV122]], 1 15280 // CHECK13-NEXT: store i32 [[SUB123]], ptr [[DOTCAPTURE_EXPR_120]], align 4 15281 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB124]], align 4 15282 // CHECK13-NEXT: [[TMP75:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_120]], align 4 15283 // CHECK13-NEXT: store i32 [[TMP75]], ptr [[DOTOMP_UB125]], align 4 15284 // CHECK13-NEXT: store i32 0, ptr [[I126]], align 4 15285 // CHECK13-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_119]], align 4 15286 // CHECK13-NEXT: [[CMP127:%.*]] = icmp slt i32 0, [[TMP76]] 15287 // CHECK13-NEXT: br i1 [[CMP127]], label [[SIMD_IF_THEN128:%.*]], label [[SIMD_IF_END151:%.*]] 15288 // CHECK13: simd.if.then128: 15289 // CHECK13-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTOMP_LB124]], align 4 15290 // CHECK13-NEXT: store i32 [[TMP77]], ptr [[DOTOMP_IV129]], align 4 15291 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND131:%.*]] 15292 // CHECK13: omp.inner.for.cond131: 15293 // CHECK13-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]] 15294 // CHECK13-NEXT: [[TMP79:%.*]] = load i32, ptr [[DOTOMP_UB125]], align 4, !llvm.access.group [[ACC_GRP36]] 15295 // CHECK13-NEXT: [[CMP132:%.*]] = icmp sle i32 [[TMP78]], [[TMP79]] 15296 // CHECK13-NEXT: br i1 [[CMP132]], label [[OMP_INNER_FOR_BODY133:%.*]], label [[OMP_INNER_FOR_END146:%.*]] 15297 // CHECK13: omp.inner.for.body133: 15298 // CHECK13-NEXT: [[TMP80:%.*]] = load i32, ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP36]] 15299 // CHECK13-NEXT: [[MUL134:%.*]] = mul nsw i32 [[TMP80]], 1 15300 // CHECK13-NEXT: [[ADD135:%.*]] = add nsw i32 0, [[MUL134]] 15301 // CHECK13-NEXT: store i32 [[ADD135]], ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP36]] 15302 // CHECK13-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP36]] 15303 // CHECK13-NEXT: [[TMP82:%.*]] = load i32, ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP36]] 15304 // CHECK13-NEXT: [[IDXPROM136:%.*]] = sext i32 [[TMP82]] to i64 15305 // CHECK13-NEXT: [[ARRAYIDX137:%.*]] = getelementptr inbounds i32, ptr [[TMP81]], i64 [[IDXPROM136]] 15306 // CHECK13-NEXT: [[TMP83:%.*]] = load i32, ptr [[ARRAYIDX137]], align 4, !llvm.access.group [[ACC_GRP36]] 15307 // CHECK13-NEXT: [[TMP84:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP36]] 15308 // CHECK13-NEXT: [[TMP85:%.*]] = load i32, ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP36]] 15309 // CHECK13-NEXT: [[IDXPROM138:%.*]] = sext i32 [[TMP85]] to i64 15310 // CHECK13-NEXT: [[ARRAYIDX139:%.*]] = getelementptr inbounds i32, ptr [[TMP84]], i64 [[IDXPROM138]] 15311 // CHECK13-NEXT: [[TMP86:%.*]] = load i32, ptr [[ARRAYIDX139]], align 4, !llvm.access.group [[ACC_GRP36]] 15312 // CHECK13-NEXT: [[ADD140:%.*]] = add nsw i32 [[TMP83]], [[TMP86]] 15313 // CHECK13-NEXT: [[TMP87:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP36]] 15314 // CHECK13-NEXT: [[TMP88:%.*]] = load i32, ptr [[I130]], align 4, !llvm.access.group [[ACC_GRP36]] 15315 // CHECK13-NEXT: [[IDXPROM141:%.*]] = sext i32 [[TMP88]] to i64 15316 // CHECK13-NEXT: [[ARRAYIDX142:%.*]] = getelementptr inbounds i32, ptr [[TMP87]], i64 [[IDXPROM141]] 15317 // CHECK13-NEXT: store i32 [[ADD140]], ptr [[ARRAYIDX142]], align 4, !llvm.access.group [[ACC_GRP36]] 15318 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE143:%.*]] 15319 // CHECK13: omp.body.continue143: 15320 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC144:%.*]] 15321 // CHECK13: omp.inner.for.inc144: 15322 // CHECK13-NEXT: [[TMP89:%.*]] = load i32, ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP36]] 15323 // CHECK13-NEXT: [[ADD145:%.*]] = add nsw i32 [[TMP89]], 1 15324 // CHECK13-NEXT: store i32 [[ADD145]], ptr [[DOTOMP_IV129]], align 4, !llvm.access.group [[ACC_GRP36]] 15325 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND131]], !llvm.loop [[LOOP37:![0-9]+]] 15326 // CHECK13: omp.inner.for.end146: 15327 // CHECK13-NEXT: [[TMP90:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_119]], align 4 15328 // CHECK13-NEXT: [[SUB147:%.*]] = sub nsw i32 [[TMP90]], 0 15329 // CHECK13-NEXT: [[DIV148:%.*]] = sdiv i32 [[SUB147]], 1 15330 // CHECK13-NEXT: [[MUL149:%.*]] = mul nsw i32 [[DIV148]], 1 15331 // CHECK13-NEXT: [[ADD150:%.*]] = add nsw i32 0, [[MUL149]] 15332 // CHECK13-NEXT: store i32 [[ADD150]], ptr [[I130]], align 4 15333 // CHECK13-NEXT: br label [[SIMD_IF_END151]] 15334 // CHECK13: simd.if.end151: 15335 // CHECK13-NEXT: [[TMP91:%.*]] = load i32, ptr [[N]], align 4 15336 // CHECK13-NEXT: store i32 [[TMP91]], ptr [[DOTCAPTURE_EXPR_153]], align 4 15337 // CHECK13-NEXT: [[TMP92:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_153]], align 4 15338 // CHECK13-NEXT: [[SUB155:%.*]] = sub nsw i32 [[TMP92]], 0 15339 // CHECK13-NEXT: [[DIV156:%.*]] = sdiv i32 [[SUB155]], 1 15340 // CHECK13-NEXT: [[SUB157:%.*]] = sub nsw i32 [[DIV156]], 1 15341 // CHECK13-NEXT: store i32 [[SUB157]], ptr [[DOTCAPTURE_EXPR_154]], align 4 15342 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB158]], align 4 15343 // CHECK13-NEXT: [[TMP93:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_154]], align 4 15344 // CHECK13-NEXT: store i32 [[TMP93]], ptr [[DOTOMP_UB159]], align 4 15345 // CHECK13-NEXT: store i32 0, ptr [[I160]], align 4 15346 // CHECK13-NEXT: [[TMP94:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_153]], align 4 15347 // CHECK13-NEXT: [[CMP161:%.*]] = icmp slt i32 0, [[TMP94]] 15348 // CHECK13-NEXT: br i1 [[CMP161]], label [[SIMD_IF_THEN162:%.*]], label [[SIMD_IF_END185:%.*]] 15349 // CHECK13: simd.if.then162: 15350 // CHECK13-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTOMP_LB158]], align 4 15351 // CHECK13-NEXT: store i32 [[TMP95]], ptr [[DOTOMP_IV163]], align 4 15352 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND165:%.*]] 15353 // CHECK13: omp.inner.for.cond165: 15354 // CHECK13-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]] 15355 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTOMP_UB159]], align 4, !llvm.access.group [[ACC_GRP39]] 15356 // CHECK13-NEXT: [[CMP166:%.*]] = icmp sle i32 [[TMP96]], [[TMP97]] 15357 // CHECK13-NEXT: br i1 [[CMP166]], label [[OMP_INNER_FOR_BODY167:%.*]], label [[OMP_INNER_FOR_END180:%.*]] 15358 // CHECK13: omp.inner.for.body167: 15359 // CHECK13-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP39]] 15360 // CHECK13-NEXT: [[MUL168:%.*]] = mul nsw i32 [[TMP98]], 1 15361 // CHECK13-NEXT: [[ADD169:%.*]] = add nsw i32 0, [[MUL168]] 15362 // CHECK13-NEXT: store i32 [[ADD169]], ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP39]] 15363 // CHECK13-NEXT: [[TMP99:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP39]] 15364 // CHECK13-NEXT: [[TMP100:%.*]] = load i32, ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP39]] 15365 // CHECK13-NEXT: [[IDXPROM170:%.*]] = sext i32 [[TMP100]] to i64 15366 // CHECK13-NEXT: [[ARRAYIDX171:%.*]] = getelementptr inbounds i32, ptr [[TMP99]], i64 [[IDXPROM170]] 15367 // CHECK13-NEXT: [[TMP101:%.*]] = load i32, ptr [[ARRAYIDX171]], align 4, !llvm.access.group [[ACC_GRP39]] 15368 // CHECK13-NEXT: [[TMP102:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP39]] 15369 // CHECK13-NEXT: [[TMP103:%.*]] = load i32, ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP39]] 15370 // CHECK13-NEXT: [[IDXPROM172:%.*]] = sext i32 [[TMP103]] to i64 15371 // CHECK13-NEXT: [[ARRAYIDX173:%.*]] = getelementptr inbounds i32, ptr [[TMP102]], i64 [[IDXPROM172]] 15372 // CHECK13-NEXT: [[TMP104:%.*]] = load i32, ptr [[ARRAYIDX173]], align 4, !llvm.access.group [[ACC_GRP39]] 15373 // CHECK13-NEXT: [[ADD174:%.*]] = add nsw i32 [[TMP101]], [[TMP104]] 15374 // CHECK13-NEXT: [[TMP105:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP39]] 15375 // CHECK13-NEXT: [[TMP106:%.*]] = load i32, ptr [[I164]], align 4, !llvm.access.group [[ACC_GRP39]] 15376 // CHECK13-NEXT: [[IDXPROM175:%.*]] = sext i32 [[TMP106]] to i64 15377 // CHECK13-NEXT: [[ARRAYIDX176:%.*]] = getelementptr inbounds i32, ptr [[TMP105]], i64 [[IDXPROM175]] 15378 // CHECK13-NEXT: store i32 [[ADD174]], ptr [[ARRAYIDX176]], align 4, !llvm.access.group [[ACC_GRP39]] 15379 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE177:%.*]] 15380 // CHECK13: omp.body.continue177: 15381 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC178:%.*]] 15382 // CHECK13: omp.inner.for.inc178: 15383 // CHECK13-NEXT: [[TMP107:%.*]] = load i32, ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP39]] 15384 // CHECK13-NEXT: [[ADD179:%.*]] = add nsw i32 [[TMP107]], 1 15385 // CHECK13-NEXT: store i32 [[ADD179]], ptr [[DOTOMP_IV163]], align 4, !llvm.access.group [[ACC_GRP39]] 15386 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND165]], !llvm.loop [[LOOP40:![0-9]+]] 15387 // CHECK13: omp.inner.for.end180: 15388 // CHECK13-NEXT: [[TMP108:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_153]], align 4 15389 // CHECK13-NEXT: [[SUB181:%.*]] = sub nsw i32 [[TMP108]], 0 15390 // CHECK13-NEXT: [[DIV182:%.*]] = sdiv i32 [[SUB181]], 1 15391 // CHECK13-NEXT: [[MUL183:%.*]] = mul nsw i32 [[DIV182]], 1 15392 // CHECK13-NEXT: [[ADD184:%.*]] = add nsw i32 0, [[MUL183]] 15393 // CHECK13-NEXT: store i32 [[ADD184]], ptr [[I164]], align 4 15394 // CHECK13-NEXT: br label [[SIMD_IF_END185]] 15395 // CHECK13: simd.if.end185: 15396 // CHECK13-NEXT: [[TMP109:%.*]] = load i32, ptr [[CH]], align 4 15397 // CHECK13-NEXT: store i32 [[TMP109]], ptr [[DOTCAPTURE_EXPR_186]], align 4 15398 // CHECK13-NEXT: [[TMP110:%.*]] = load i32, ptr [[N]], align 4 15399 // CHECK13-NEXT: store i32 [[TMP110]], ptr [[DOTCAPTURE_EXPR_188]], align 4 15400 // CHECK13-NEXT: [[TMP111:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_188]], align 4 15401 // CHECK13-NEXT: [[SUB190:%.*]] = sub nsw i32 [[TMP111]], 0 15402 // CHECK13-NEXT: [[DIV191:%.*]] = sdiv i32 [[SUB190]], 1 15403 // CHECK13-NEXT: [[SUB192:%.*]] = sub nsw i32 [[DIV191]], 1 15404 // CHECK13-NEXT: store i32 [[SUB192]], ptr [[DOTCAPTURE_EXPR_189]], align 4 15405 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB193]], align 4 15406 // CHECK13-NEXT: [[TMP112:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_189]], align 4 15407 // CHECK13-NEXT: store i32 [[TMP112]], ptr [[DOTOMP_UB194]], align 4 15408 // CHECK13-NEXT: store i32 0, ptr [[I195]], align 4 15409 // CHECK13-NEXT: [[TMP113:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_188]], align 4 15410 // CHECK13-NEXT: [[CMP196:%.*]] = icmp slt i32 0, [[TMP113]] 15411 // CHECK13-NEXT: br i1 [[CMP196]], label [[SIMD_IF_THEN197:%.*]], label [[SIMD_IF_END220:%.*]] 15412 // CHECK13: simd.if.then197: 15413 // CHECK13-NEXT: [[TMP114:%.*]] = load i32, ptr [[DOTOMP_LB193]], align 4 15414 // CHECK13-NEXT: store i32 [[TMP114]], ptr [[DOTOMP_IV198]], align 4 15415 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND200:%.*]] 15416 // CHECK13: omp.inner.for.cond200: 15417 // CHECK13-NEXT: [[TMP115:%.*]] = load i32, ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]] 15418 // CHECK13-NEXT: [[TMP116:%.*]] = load i32, ptr [[DOTOMP_UB194]], align 4, !llvm.access.group [[ACC_GRP42]] 15419 // CHECK13-NEXT: [[CMP201:%.*]] = icmp sle i32 [[TMP115]], [[TMP116]] 15420 // CHECK13-NEXT: br i1 [[CMP201]], label [[OMP_INNER_FOR_BODY202:%.*]], label [[OMP_INNER_FOR_END215:%.*]] 15421 // CHECK13: omp.inner.for.body202: 15422 // CHECK13-NEXT: [[TMP117:%.*]] = load i32, ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP42]] 15423 // CHECK13-NEXT: [[MUL203:%.*]] = mul nsw i32 [[TMP117]], 1 15424 // CHECK13-NEXT: [[ADD204:%.*]] = add nsw i32 0, [[MUL203]] 15425 // CHECK13-NEXT: store i32 [[ADD204]], ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP42]] 15426 // CHECK13-NEXT: [[TMP118:%.*]] = load ptr, ptr [[B]], align 8, !llvm.access.group [[ACC_GRP42]] 15427 // CHECK13-NEXT: [[TMP119:%.*]] = load i32, ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP42]] 15428 // CHECK13-NEXT: [[IDXPROM205:%.*]] = sext i32 [[TMP119]] to i64 15429 // CHECK13-NEXT: [[ARRAYIDX206:%.*]] = getelementptr inbounds i32, ptr [[TMP118]], i64 [[IDXPROM205]] 15430 // CHECK13-NEXT: [[TMP120:%.*]] = load i32, ptr [[ARRAYIDX206]], align 4, !llvm.access.group [[ACC_GRP42]] 15431 // CHECK13-NEXT: [[TMP121:%.*]] = load ptr, ptr [[C]], align 8, !llvm.access.group [[ACC_GRP42]] 15432 // CHECK13-NEXT: [[TMP122:%.*]] = load i32, ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP42]] 15433 // CHECK13-NEXT: [[IDXPROM207:%.*]] = sext i32 [[TMP122]] to i64 15434 // CHECK13-NEXT: [[ARRAYIDX208:%.*]] = getelementptr inbounds i32, ptr [[TMP121]], i64 [[IDXPROM207]] 15435 // CHECK13-NEXT: [[TMP123:%.*]] = load i32, ptr [[ARRAYIDX208]], align 4, !llvm.access.group [[ACC_GRP42]] 15436 // CHECK13-NEXT: [[ADD209:%.*]] = add nsw i32 [[TMP120]], [[TMP123]] 15437 // CHECK13-NEXT: [[TMP124:%.*]] = load ptr, ptr [[A]], align 8, !llvm.access.group [[ACC_GRP42]] 15438 // CHECK13-NEXT: [[TMP125:%.*]] = load i32, ptr [[I199]], align 4, !llvm.access.group [[ACC_GRP42]] 15439 // CHECK13-NEXT: [[IDXPROM210:%.*]] = sext i32 [[TMP125]] to i64 15440 // CHECK13-NEXT: [[ARRAYIDX211:%.*]] = getelementptr inbounds i32, ptr [[TMP124]], i64 [[IDXPROM210]] 15441 // CHECK13-NEXT: store i32 [[ADD209]], ptr [[ARRAYIDX211]], align 4, !llvm.access.group [[ACC_GRP42]] 15442 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE212:%.*]] 15443 // CHECK13: omp.body.continue212: 15444 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC213:%.*]] 15445 // CHECK13: omp.inner.for.inc213: 15446 // CHECK13-NEXT: [[TMP126:%.*]] = load i32, ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP42]] 15447 // CHECK13-NEXT: [[ADD214:%.*]] = add nsw i32 [[TMP126]], 1 15448 // CHECK13-NEXT: store i32 [[ADD214]], ptr [[DOTOMP_IV198]], align 4, !llvm.access.group [[ACC_GRP42]] 15449 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND200]], !llvm.loop [[LOOP43:![0-9]+]] 15450 // CHECK13: omp.inner.for.end215: 15451 // CHECK13-NEXT: [[TMP127:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_188]], align 4 15452 // CHECK13-NEXT: [[SUB216:%.*]] = sub nsw i32 [[TMP127]], 0 15453 // CHECK13-NEXT: [[DIV217:%.*]] = sdiv i32 [[SUB216]], 1 15454 // CHECK13-NEXT: [[MUL218:%.*]] = mul nsw i32 [[DIV217]], 1 15455 // CHECK13-NEXT: [[ADD219:%.*]] = add nsw i32 0, [[MUL218]] 15456 // CHECK13-NEXT: store i32 [[ADD219]], ptr [[I199]], align 4 15457 // CHECK13-NEXT: br label [[SIMD_IF_END220]] 15458 // CHECK13: simd.if.end220: 15459 // CHECK13-NEXT: ret i32 0 15460 // 15461 // 15462 // CHECK15-LABEL: define {{[^@]+}}@main 15463 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] { 15464 // CHECK15-NEXT: entry: 15465 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 15466 // CHECK15-NEXT: [[A:%.*]] = alloca ptr, align 4 15467 // CHECK15-NEXT: [[B:%.*]] = alloca ptr, align 4 15468 // CHECK15-NEXT: [[C:%.*]] = alloca ptr, align 4 15469 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 15470 // CHECK15-NEXT: [[CH:%.*]] = alloca i32, align 4 15471 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 15472 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15473 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15474 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15475 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15476 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 15477 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15478 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 15479 // CHECK15-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 15480 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 15481 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4 15482 // CHECK15-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 15483 // CHECK15-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 15484 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 15485 // CHECK15-NEXT: [[DOTOMP_IV24:%.*]] = alloca i32, align 4 15486 // CHECK15-NEXT: [[I25:%.*]] = alloca i32, align 4 15487 // CHECK15-NEXT: [[_TMP44:%.*]] = alloca i32, align 4 15488 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_45:%.*]] = alloca i32, align 4 15489 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_46:%.*]] = alloca i32, align 4 15490 // CHECK15-NEXT: [[DOTOMP_LB50:%.*]] = alloca i32, align 4 15491 // CHECK15-NEXT: [[DOTOMP_UB51:%.*]] = alloca i32, align 4 15492 // CHECK15-NEXT: [[I52:%.*]] = alloca i32, align 4 15493 // CHECK15-NEXT: [[DOTOMP_IV55:%.*]] = alloca i32, align 4 15494 // CHECK15-NEXT: [[I56:%.*]] = alloca i32, align 4 15495 // CHECK15-NEXT: [[_TMP75:%.*]] = alloca i32, align 4 15496 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 15497 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_77:%.*]] = alloca i32, align 4 15498 // CHECK15-NEXT: [[DOTOMP_LB81:%.*]] = alloca i32, align 4 15499 // CHECK15-NEXT: [[DOTOMP_UB82:%.*]] = alloca i32, align 4 15500 // CHECK15-NEXT: [[I83:%.*]] = alloca i32, align 4 15501 // CHECK15-NEXT: [[DOTOMP_IV86:%.*]] = alloca i32, align 4 15502 // CHECK15-NEXT: [[I87:%.*]] = alloca i32, align 4 15503 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_106:%.*]] = alloca i32, align 4 15504 // CHECK15-NEXT: [[_TMP107:%.*]] = alloca i32, align 4 15505 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_108:%.*]] = alloca i32, align 4 15506 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_109:%.*]] = alloca i32, align 4 15507 // CHECK15-NEXT: [[DOTOMP_LB113:%.*]] = alloca i32, align 4 15508 // CHECK15-NEXT: [[DOTOMP_UB114:%.*]] = alloca i32, align 4 15509 // CHECK15-NEXT: [[I115:%.*]] = alloca i32, align 4 15510 // CHECK15-NEXT: [[DOTOMP_IV118:%.*]] = alloca i32, align 4 15511 // CHECK15-NEXT: [[I119:%.*]] = alloca i32, align 4 15512 // CHECK15-NEXT: [[_TMP138:%.*]] = alloca i32, align 4 15513 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_139:%.*]] = alloca i32, align 4 15514 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_140:%.*]] = alloca i32, align 4 15515 // CHECK15-NEXT: [[DOTOMP_LB144:%.*]] = alloca i32, align 4 15516 // CHECK15-NEXT: [[DOTOMP_UB145:%.*]] = alloca i32, align 4 15517 // CHECK15-NEXT: [[I146:%.*]] = alloca i32, align 4 15518 // CHECK15-NEXT: [[DOTOMP_IV149:%.*]] = alloca i32, align 4 15519 // CHECK15-NEXT: [[I150:%.*]] = alloca i32, align 4 15520 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_169:%.*]] = alloca i32, align 4 15521 // CHECK15-NEXT: [[_TMP170:%.*]] = alloca i32, align 4 15522 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_171:%.*]] = alloca i32, align 4 15523 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_172:%.*]] = alloca i32, align 4 15524 // CHECK15-NEXT: [[DOTOMP_LB176:%.*]] = alloca i32, align 4 15525 // CHECK15-NEXT: [[DOTOMP_UB177:%.*]] = alloca i32, align 4 15526 // CHECK15-NEXT: [[I178:%.*]] = alloca i32, align 4 15527 // CHECK15-NEXT: [[DOTOMP_IV181:%.*]] = alloca i32, align 4 15528 // CHECK15-NEXT: [[I182:%.*]] = alloca i32, align 4 15529 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4 15530 // CHECK15-NEXT: store i32 10000, ptr [[N]], align 4 15531 // CHECK15-NEXT: store i32 100, ptr [[CH]], align 4 15532 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 15533 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4 15534 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15535 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0 15536 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15537 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15538 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 15539 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 15540 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 15541 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 15542 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 15543 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15544 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 15545 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 15546 // CHECK15: simd.if.then: 15547 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 15548 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 15549 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15550 // CHECK15: omp.inner.for.cond: 15551 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]] 15552 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]] 15553 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 15554 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15555 // CHECK15: omp.inner.for.body: 15556 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 15557 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 15558 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15559 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 15560 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP3]] 15561 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 15562 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[TMP8]], i32 [[TMP9]] 15563 // CHECK15-NEXT: [[TMP10:%.*]] = load double, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]] 15564 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP3]] 15565 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 15566 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[TMP11]], i32 [[TMP12]] 15567 // CHECK15-NEXT: [[TMP13:%.*]] = load double, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP3]] 15568 // CHECK15-NEXT: [[ADD6:%.*]] = fadd double [[TMP10]], [[TMP13]] 15569 // CHECK15-NEXT: [[TMP14:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP3]] 15570 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]] 15571 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds double, ptr [[TMP14]], i32 [[TMP15]] 15572 // CHECK15-NEXT: store double [[ADD6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP3]] 15573 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15574 // CHECK15: omp.body.continue: 15575 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15576 // CHECK15: omp.inner.for.inc: 15577 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 15578 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 15579 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]] 15580 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 15581 // CHECK15: omp.inner.for.end: 15582 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 15583 // CHECK15-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP17]], 0 15584 // CHECK15-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 15585 // CHECK15-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 15586 // CHECK15-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 15587 // CHECK15-NEXT: store i32 [[ADD12]], ptr [[I3]], align 4 15588 // CHECK15-NEXT: br label [[SIMD_IF_END]] 15589 // CHECK15: simd.if.end: 15590 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N]], align 4 15591 // CHECK15-NEXT: store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR_14]], align 4 15592 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 15593 // CHECK15-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP19]], 0 15594 // CHECK15-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 15595 // CHECK15-NEXT: [[SUB18:%.*]] = sub nsw i32 [[DIV17]], 1 15596 // CHECK15-NEXT: store i32 [[SUB18]], ptr [[DOTCAPTURE_EXPR_15]], align 4 15597 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB19]], align 4 15598 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_15]], align 4 15599 // CHECK15-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_UB20]], align 4 15600 // CHECK15-NEXT: store i32 0, ptr [[I21]], align 4 15601 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 15602 // CHECK15-NEXT: [[CMP22:%.*]] = icmp slt i32 0, [[TMP21]] 15603 // CHECK15-NEXT: br i1 [[CMP22]], label [[SIMD_IF_THEN23:%.*]], label [[SIMD_IF_END43:%.*]] 15604 // CHECK15: simd.if.then23: 15605 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 4 15606 // CHECK15-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV24]], align 4 15607 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 15608 // CHECK15: omp.inner.for.cond26: 15609 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]] 15610 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP7]] 15611 // CHECK15-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] 15612 // CHECK15-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END38:%.*]] 15613 // CHECK15: omp.inner.for.body28: 15614 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP7]] 15615 // CHECK15-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP25]], 1 15616 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 15617 // CHECK15-NEXT: store i32 [[ADD30]], ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP7]] 15618 // CHECK15-NEXT: [[TMP26:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP7]] 15619 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP7]] 15620 // CHECK15-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds double, ptr [[TMP26]], i32 [[TMP27]] 15621 // CHECK15-NEXT: [[TMP28:%.*]] = load double, ptr [[ARRAYIDX31]], align 4, !llvm.access.group [[ACC_GRP7]] 15622 // CHECK15-NEXT: [[TMP29:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP7]] 15623 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP7]] 15624 // CHECK15-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds double, ptr [[TMP29]], i32 [[TMP30]] 15625 // CHECK15-NEXT: [[TMP31:%.*]] = load double, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP7]] 15626 // CHECK15-NEXT: [[ADD33:%.*]] = fadd double [[TMP28]], [[TMP31]] 15627 // CHECK15-NEXT: [[TMP32:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP7]] 15628 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP7]] 15629 // CHECK15-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds double, ptr [[TMP32]], i32 [[TMP33]] 15630 // CHECK15-NEXT: store double [[ADD33]], ptr [[ARRAYIDX34]], align 4, !llvm.access.group [[ACC_GRP7]] 15631 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]] 15632 // CHECK15: omp.body.continue35: 15633 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]] 15634 // CHECK15: omp.inner.for.inc36: 15635 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP7]] 15636 // CHECK15-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP34]], 1 15637 // CHECK15-NEXT: store i32 [[ADD37]], ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP7]] 15638 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]] 15639 // CHECK15: omp.inner.for.end38: 15640 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 15641 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP35]], 0 15642 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 15643 // CHECK15-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1 15644 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]] 15645 // CHECK15-NEXT: store i32 [[ADD42]], ptr [[I25]], align 4 15646 // CHECK15-NEXT: br label [[SIMD_IF_END43]] 15647 // CHECK15: simd.if.end43: 15648 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, ptr [[N]], align 4 15649 // CHECK15-NEXT: store i32 [[TMP36]], ptr [[DOTCAPTURE_EXPR_45]], align 4 15650 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_45]], align 4 15651 // CHECK15-NEXT: [[SUB47:%.*]] = sub nsw i32 [[TMP37]], 0 15652 // CHECK15-NEXT: [[DIV48:%.*]] = sdiv i32 [[SUB47]], 1 15653 // CHECK15-NEXT: [[SUB49:%.*]] = sub nsw i32 [[DIV48]], 1 15654 // CHECK15-NEXT: store i32 [[SUB49]], ptr [[DOTCAPTURE_EXPR_46]], align 4 15655 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB50]], align 4 15656 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_46]], align 4 15657 // CHECK15-NEXT: store i32 [[TMP38]], ptr [[DOTOMP_UB51]], align 4 15658 // CHECK15-NEXT: store i32 0, ptr [[I52]], align 4 15659 // CHECK15-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_45]], align 4 15660 // CHECK15-NEXT: [[CMP53:%.*]] = icmp slt i32 0, [[TMP39]] 15661 // CHECK15-NEXT: br i1 [[CMP53]], label [[SIMD_IF_THEN54:%.*]], label [[SIMD_IF_END74:%.*]] 15662 // CHECK15: simd.if.then54: 15663 // CHECK15-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_LB50]], align 4 15664 // CHECK15-NEXT: store i32 [[TMP40]], ptr [[DOTOMP_IV55]], align 4 15665 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND57:%.*]] 15666 // CHECK15: omp.inner.for.cond57: 15667 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]] 15668 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_UB51]], align 4, !llvm.access.group [[ACC_GRP10]] 15669 // CHECK15-NEXT: [[CMP58:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]] 15670 // CHECK15-NEXT: br i1 [[CMP58]], label [[OMP_INNER_FOR_BODY59:%.*]], label [[OMP_INNER_FOR_END69:%.*]] 15671 // CHECK15: omp.inner.for.body59: 15672 // CHECK15-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP10]] 15673 // CHECK15-NEXT: [[MUL60:%.*]] = mul nsw i32 [[TMP43]], 1 15674 // CHECK15-NEXT: [[ADD61:%.*]] = add nsw i32 0, [[MUL60]] 15675 // CHECK15-NEXT: store i32 [[ADD61]], ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP10]] 15676 // CHECK15-NEXT: [[TMP44:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP10]] 15677 // CHECK15-NEXT: [[TMP45:%.*]] = load i32, ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP10]] 15678 // CHECK15-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds double, ptr [[TMP44]], i32 [[TMP45]] 15679 // CHECK15-NEXT: [[TMP46:%.*]] = load double, ptr [[ARRAYIDX62]], align 4, !llvm.access.group [[ACC_GRP10]] 15680 // CHECK15-NEXT: [[TMP47:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP10]] 15681 // CHECK15-NEXT: [[TMP48:%.*]] = load i32, ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP10]] 15682 // CHECK15-NEXT: [[ARRAYIDX63:%.*]] = getelementptr inbounds double, ptr [[TMP47]], i32 [[TMP48]] 15683 // CHECK15-NEXT: [[TMP49:%.*]] = load double, ptr [[ARRAYIDX63]], align 4, !llvm.access.group [[ACC_GRP10]] 15684 // CHECK15-NEXT: [[ADD64:%.*]] = fadd double [[TMP46]], [[TMP49]] 15685 // CHECK15-NEXT: [[TMP50:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP10]] 15686 // CHECK15-NEXT: [[TMP51:%.*]] = load i32, ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP10]] 15687 // CHECK15-NEXT: [[ARRAYIDX65:%.*]] = getelementptr inbounds double, ptr [[TMP50]], i32 [[TMP51]] 15688 // CHECK15-NEXT: store double [[ADD64]], ptr [[ARRAYIDX65]], align 4, !llvm.access.group [[ACC_GRP10]] 15689 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE66:%.*]] 15690 // CHECK15: omp.body.continue66: 15691 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC67:%.*]] 15692 // CHECK15: omp.inner.for.inc67: 15693 // CHECK15-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP10]] 15694 // CHECK15-NEXT: [[ADD68:%.*]] = add nsw i32 [[TMP52]], 1 15695 // CHECK15-NEXT: store i32 [[ADD68]], ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP10]] 15696 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND57]], !llvm.loop [[LOOP11:![0-9]+]] 15697 // CHECK15: omp.inner.for.end69: 15698 // CHECK15-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_45]], align 4 15699 // CHECK15-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP53]], 0 15700 // CHECK15-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 15701 // CHECK15-NEXT: [[MUL72:%.*]] = mul nsw i32 [[DIV71]], 1 15702 // CHECK15-NEXT: [[ADD73:%.*]] = add nsw i32 0, [[MUL72]] 15703 // CHECK15-NEXT: store i32 [[ADD73]], ptr [[I56]], align 4 15704 // CHECK15-NEXT: br label [[SIMD_IF_END74]] 15705 // CHECK15: simd.if.end74: 15706 // CHECK15-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 15707 // CHECK15-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_76]], align 4 15708 // CHECK15-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_76]], align 4 15709 // CHECK15-NEXT: [[SUB78:%.*]] = sub nsw i32 [[TMP55]], 0 15710 // CHECK15-NEXT: [[DIV79:%.*]] = sdiv i32 [[SUB78]], 1 15711 // CHECK15-NEXT: [[SUB80:%.*]] = sub nsw i32 [[DIV79]], 1 15712 // CHECK15-NEXT: store i32 [[SUB80]], ptr [[DOTCAPTURE_EXPR_77]], align 4 15713 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB81]], align 4 15714 // CHECK15-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_77]], align 4 15715 // CHECK15-NEXT: store i32 [[TMP56]], ptr [[DOTOMP_UB82]], align 4 15716 // CHECK15-NEXT: store i32 0, ptr [[I83]], align 4 15717 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_76]], align 4 15718 // CHECK15-NEXT: [[CMP84:%.*]] = icmp slt i32 0, [[TMP57]] 15719 // CHECK15-NEXT: br i1 [[CMP84]], label [[SIMD_IF_THEN85:%.*]], label [[SIMD_IF_END105:%.*]] 15720 // CHECK15: simd.if.then85: 15721 // CHECK15-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTOMP_LB81]], align 4 15722 // CHECK15-NEXT: store i32 [[TMP58]], ptr [[DOTOMP_IV86]], align 4 15723 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND88:%.*]] 15724 // CHECK15: omp.inner.for.cond88: 15725 // CHECK15-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]] 15726 // CHECK15-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTOMP_UB82]], align 4, !llvm.access.group [[ACC_GRP13]] 15727 // CHECK15-NEXT: [[CMP89:%.*]] = icmp sle i32 [[TMP59]], [[TMP60]] 15728 // CHECK15-NEXT: br i1 [[CMP89]], label [[OMP_INNER_FOR_BODY90:%.*]], label [[OMP_INNER_FOR_END100:%.*]] 15729 // CHECK15: omp.inner.for.body90: 15730 // CHECK15-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP13]] 15731 // CHECK15-NEXT: [[MUL91:%.*]] = mul nsw i32 [[TMP61]], 1 15732 // CHECK15-NEXT: [[ADD92:%.*]] = add nsw i32 0, [[MUL91]] 15733 // CHECK15-NEXT: store i32 [[ADD92]], ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP13]] 15734 // CHECK15-NEXT: [[TMP62:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP13]] 15735 // CHECK15-NEXT: [[TMP63:%.*]] = load i32, ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP13]] 15736 // CHECK15-NEXT: [[ARRAYIDX93:%.*]] = getelementptr inbounds double, ptr [[TMP62]], i32 [[TMP63]] 15737 // CHECK15-NEXT: [[TMP64:%.*]] = load double, ptr [[ARRAYIDX93]], align 4, !llvm.access.group [[ACC_GRP13]] 15738 // CHECK15-NEXT: [[TMP65:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP13]] 15739 // CHECK15-NEXT: [[TMP66:%.*]] = load i32, ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP13]] 15740 // CHECK15-NEXT: [[ARRAYIDX94:%.*]] = getelementptr inbounds double, ptr [[TMP65]], i32 [[TMP66]] 15741 // CHECK15-NEXT: [[TMP67:%.*]] = load double, ptr [[ARRAYIDX94]], align 4, !llvm.access.group [[ACC_GRP13]] 15742 // CHECK15-NEXT: [[ADD95:%.*]] = fadd double [[TMP64]], [[TMP67]] 15743 // CHECK15-NEXT: [[TMP68:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP13]] 15744 // CHECK15-NEXT: [[TMP69:%.*]] = load i32, ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP13]] 15745 // CHECK15-NEXT: [[ARRAYIDX96:%.*]] = getelementptr inbounds double, ptr [[TMP68]], i32 [[TMP69]] 15746 // CHECK15-NEXT: store double [[ADD95]], ptr [[ARRAYIDX96]], align 4, !llvm.access.group [[ACC_GRP13]] 15747 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE97:%.*]] 15748 // CHECK15: omp.body.continue97: 15749 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC98:%.*]] 15750 // CHECK15: omp.inner.for.inc98: 15751 // CHECK15-NEXT: [[TMP70:%.*]] = load i32, ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP13]] 15752 // CHECK15-NEXT: [[ADD99:%.*]] = add nsw i32 [[TMP70]], 1 15753 // CHECK15-NEXT: store i32 [[ADD99]], ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP13]] 15754 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND88]], !llvm.loop [[LOOP14:![0-9]+]] 15755 // CHECK15: omp.inner.for.end100: 15756 // CHECK15-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_76]], align 4 15757 // CHECK15-NEXT: [[SUB101:%.*]] = sub nsw i32 [[TMP71]], 0 15758 // CHECK15-NEXT: [[DIV102:%.*]] = sdiv i32 [[SUB101]], 1 15759 // CHECK15-NEXT: [[MUL103:%.*]] = mul nsw i32 [[DIV102]], 1 15760 // CHECK15-NEXT: [[ADD104:%.*]] = add nsw i32 0, [[MUL103]] 15761 // CHECK15-NEXT: store i32 [[ADD104]], ptr [[I87]], align 4 15762 // CHECK15-NEXT: br label [[SIMD_IF_END105]] 15763 // CHECK15: simd.if.end105: 15764 // CHECK15-NEXT: [[TMP72:%.*]] = load i32, ptr [[CH]], align 4 15765 // CHECK15-NEXT: store i32 [[TMP72]], ptr [[DOTCAPTURE_EXPR_106]], align 4 15766 // CHECK15-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 4 15767 // CHECK15-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_108]], align 4 15768 // CHECK15-NEXT: [[TMP74:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_108]], align 4 15769 // CHECK15-NEXT: [[SUB110:%.*]] = sub nsw i32 [[TMP74]], 0 15770 // CHECK15-NEXT: [[DIV111:%.*]] = sdiv i32 [[SUB110]], 1 15771 // CHECK15-NEXT: [[SUB112:%.*]] = sub nsw i32 [[DIV111]], 1 15772 // CHECK15-NEXT: store i32 [[SUB112]], ptr [[DOTCAPTURE_EXPR_109]], align 4 15773 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB113]], align 4 15774 // CHECK15-NEXT: [[TMP75:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_109]], align 4 15775 // CHECK15-NEXT: store i32 [[TMP75]], ptr [[DOTOMP_UB114]], align 4 15776 // CHECK15-NEXT: store i32 0, ptr [[I115]], align 4 15777 // CHECK15-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_108]], align 4 15778 // CHECK15-NEXT: [[CMP116:%.*]] = icmp slt i32 0, [[TMP76]] 15779 // CHECK15-NEXT: br i1 [[CMP116]], label [[SIMD_IF_THEN117:%.*]], label [[SIMD_IF_END137:%.*]] 15780 // CHECK15: simd.if.then117: 15781 // CHECK15-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTOMP_LB113]], align 4 15782 // CHECK15-NEXT: store i32 [[TMP77]], ptr [[DOTOMP_IV118]], align 4 15783 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND120:%.*]] 15784 // CHECK15: omp.inner.for.cond120: 15785 // CHECK15-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]] 15786 // CHECK15-NEXT: [[TMP79:%.*]] = load i32, ptr [[DOTOMP_UB114]], align 4, !llvm.access.group [[ACC_GRP16]] 15787 // CHECK15-NEXT: [[CMP121:%.*]] = icmp sle i32 [[TMP78]], [[TMP79]] 15788 // CHECK15-NEXT: br i1 [[CMP121]], label [[OMP_INNER_FOR_BODY122:%.*]], label [[OMP_INNER_FOR_END132:%.*]] 15789 // CHECK15: omp.inner.for.body122: 15790 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP16]] 15791 // CHECK15-NEXT: [[MUL123:%.*]] = mul nsw i32 [[TMP80]], 1 15792 // CHECK15-NEXT: [[ADD124:%.*]] = add nsw i32 0, [[MUL123]] 15793 // CHECK15-NEXT: store i32 [[ADD124]], ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP16]] 15794 // CHECK15-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP16]] 15795 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP16]] 15796 // CHECK15-NEXT: [[ARRAYIDX125:%.*]] = getelementptr inbounds double, ptr [[TMP81]], i32 [[TMP82]] 15797 // CHECK15-NEXT: [[TMP83:%.*]] = load double, ptr [[ARRAYIDX125]], align 4, !llvm.access.group [[ACC_GRP16]] 15798 // CHECK15-NEXT: [[TMP84:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP16]] 15799 // CHECK15-NEXT: [[TMP85:%.*]] = load i32, ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP16]] 15800 // CHECK15-NEXT: [[ARRAYIDX126:%.*]] = getelementptr inbounds double, ptr [[TMP84]], i32 [[TMP85]] 15801 // CHECK15-NEXT: [[TMP86:%.*]] = load double, ptr [[ARRAYIDX126]], align 4, !llvm.access.group [[ACC_GRP16]] 15802 // CHECK15-NEXT: [[ADD127:%.*]] = fadd double [[TMP83]], [[TMP86]] 15803 // CHECK15-NEXT: [[TMP87:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP16]] 15804 // CHECK15-NEXT: [[TMP88:%.*]] = load i32, ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP16]] 15805 // CHECK15-NEXT: [[ARRAYIDX128:%.*]] = getelementptr inbounds double, ptr [[TMP87]], i32 [[TMP88]] 15806 // CHECK15-NEXT: store double [[ADD127]], ptr [[ARRAYIDX128]], align 4, !llvm.access.group [[ACC_GRP16]] 15807 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE129:%.*]] 15808 // CHECK15: omp.body.continue129: 15809 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC130:%.*]] 15810 // CHECK15: omp.inner.for.inc130: 15811 // CHECK15-NEXT: [[TMP89:%.*]] = load i32, ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP16]] 15812 // CHECK15-NEXT: [[ADD131:%.*]] = add nsw i32 [[TMP89]], 1 15813 // CHECK15-NEXT: store i32 [[ADD131]], ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP16]] 15814 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND120]], !llvm.loop [[LOOP17:![0-9]+]] 15815 // CHECK15: omp.inner.for.end132: 15816 // CHECK15-NEXT: [[TMP90:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_108]], align 4 15817 // CHECK15-NEXT: [[SUB133:%.*]] = sub nsw i32 [[TMP90]], 0 15818 // CHECK15-NEXT: [[DIV134:%.*]] = sdiv i32 [[SUB133]], 1 15819 // CHECK15-NEXT: [[MUL135:%.*]] = mul nsw i32 [[DIV134]], 1 15820 // CHECK15-NEXT: [[ADD136:%.*]] = add nsw i32 0, [[MUL135]] 15821 // CHECK15-NEXT: store i32 [[ADD136]], ptr [[I119]], align 4 15822 // CHECK15-NEXT: br label [[SIMD_IF_END137]] 15823 // CHECK15: simd.if.end137: 15824 // CHECK15-NEXT: [[TMP91:%.*]] = load i32, ptr [[N]], align 4 15825 // CHECK15-NEXT: store i32 [[TMP91]], ptr [[DOTCAPTURE_EXPR_139]], align 4 15826 // CHECK15-NEXT: [[TMP92:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_139]], align 4 15827 // CHECK15-NEXT: [[SUB141:%.*]] = sub nsw i32 [[TMP92]], 0 15828 // CHECK15-NEXT: [[DIV142:%.*]] = sdiv i32 [[SUB141]], 1 15829 // CHECK15-NEXT: [[SUB143:%.*]] = sub nsw i32 [[DIV142]], 1 15830 // CHECK15-NEXT: store i32 [[SUB143]], ptr [[DOTCAPTURE_EXPR_140]], align 4 15831 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB144]], align 4 15832 // CHECK15-NEXT: [[TMP93:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_140]], align 4 15833 // CHECK15-NEXT: store i32 [[TMP93]], ptr [[DOTOMP_UB145]], align 4 15834 // CHECK15-NEXT: store i32 0, ptr [[I146]], align 4 15835 // CHECK15-NEXT: [[TMP94:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_139]], align 4 15836 // CHECK15-NEXT: [[CMP147:%.*]] = icmp slt i32 0, [[TMP94]] 15837 // CHECK15-NEXT: br i1 [[CMP147]], label [[SIMD_IF_THEN148:%.*]], label [[SIMD_IF_END168:%.*]] 15838 // CHECK15: simd.if.then148: 15839 // CHECK15-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTOMP_LB144]], align 4 15840 // CHECK15-NEXT: store i32 [[TMP95]], ptr [[DOTOMP_IV149]], align 4 15841 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND151:%.*]] 15842 // CHECK15: omp.inner.for.cond151: 15843 // CHECK15-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]] 15844 // CHECK15-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTOMP_UB145]], align 4, !llvm.access.group [[ACC_GRP19]] 15845 // CHECK15-NEXT: [[CMP152:%.*]] = icmp sle i32 [[TMP96]], [[TMP97]] 15846 // CHECK15-NEXT: br i1 [[CMP152]], label [[OMP_INNER_FOR_BODY153:%.*]], label [[OMP_INNER_FOR_END163:%.*]] 15847 // CHECK15: omp.inner.for.body153: 15848 // CHECK15-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP19]] 15849 // CHECK15-NEXT: [[MUL154:%.*]] = mul nsw i32 [[TMP98]], 1 15850 // CHECK15-NEXT: [[ADD155:%.*]] = add nsw i32 0, [[MUL154]] 15851 // CHECK15-NEXT: store i32 [[ADD155]], ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP19]] 15852 // CHECK15-NEXT: [[TMP99:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP19]] 15853 // CHECK15-NEXT: [[TMP100:%.*]] = load i32, ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP19]] 15854 // CHECK15-NEXT: [[ARRAYIDX156:%.*]] = getelementptr inbounds double, ptr [[TMP99]], i32 [[TMP100]] 15855 // CHECK15-NEXT: [[TMP101:%.*]] = load double, ptr [[ARRAYIDX156]], align 4, !llvm.access.group [[ACC_GRP19]] 15856 // CHECK15-NEXT: [[TMP102:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP19]] 15857 // CHECK15-NEXT: [[TMP103:%.*]] = load i32, ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP19]] 15858 // CHECK15-NEXT: [[ARRAYIDX157:%.*]] = getelementptr inbounds double, ptr [[TMP102]], i32 [[TMP103]] 15859 // CHECK15-NEXT: [[TMP104:%.*]] = load double, ptr [[ARRAYIDX157]], align 4, !llvm.access.group [[ACC_GRP19]] 15860 // CHECK15-NEXT: [[ADD158:%.*]] = fadd double [[TMP101]], [[TMP104]] 15861 // CHECK15-NEXT: [[TMP105:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP19]] 15862 // CHECK15-NEXT: [[TMP106:%.*]] = load i32, ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP19]] 15863 // CHECK15-NEXT: [[ARRAYIDX159:%.*]] = getelementptr inbounds double, ptr [[TMP105]], i32 [[TMP106]] 15864 // CHECK15-NEXT: store double [[ADD158]], ptr [[ARRAYIDX159]], align 4, !llvm.access.group [[ACC_GRP19]] 15865 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE160:%.*]] 15866 // CHECK15: omp.body.continue160: 15867 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC161:%.*]] 15868 // CHECK15: omp.inner.for.inc161: 15869 // CHECK15-NEXT: [[TMP107:%.*]] = load i32, ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP19]] 15870 // CHECK15-NEXT: [[ADD162:%.*]] = add nsw i32 [[TMP107]], 1 15871 // CHECK15-NEXT: store i32 [[ADD162]], ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP19]] 15872 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND151]], !llvm.loop [[LOOP20:![0-9]+]] 15873 // CHECK15: omp.inner.for.end163: 15874 // CHECK15-NEXT: [[TMP108:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_139]], align 4 15875 // CHECK15-NEXT: [[SUB164:%.*]] = sub nsw i32 [[TMP108]], 0 15876 // CHECK15-NEXT: [[DIV165:%.*]] = sdiv i32 [[SUB164]], 1 15877 // CHECK15-NEXT: [[MUL166:%.*]] = mul nsw i32 [[DIV165]], 1 15878 // CHECK15-NEXT: [[ADD167:%.*]] = add nsw i32 0, [[MUL166]] 15879 // CHECK15-NEXT: store i32 [[ADD167]], ptr [[I150]], align 4 15880 // CHECK15-NEXT: br label [[SIMD_IF_END168]] 15881 // CHECK15: simd.if.end168: 15882 // CHECK15-NEXT: [[TMP109:%.*]] = load i32, ptr [[CH]], align 4 15883 // CHECK15-NEXT: store i32 [[TMP109]], ptr [[DOTCAPTURE_EXPR_169]], align 4 15884 // CHECK15-NEXT: [[TMP110:%.*]] = load i32, ptr [[N]], align 4 15885 // CHECK15-NEXT: store i32 [[TMP110]], ptr [[DOTCAPTURE_EXPR_171]], align 4 15886 // CHECK15-NEXT: [[TMP111:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_171]], align 4 15887 // CHECK15-NEXT: [[SUB173:%.*]] = sub nsw i32 [[TMP111]], 0 15888 // CHECK15-NEXT: [[DIV174:%.*]] = sdiv i32 [[SUB173]], 1 15889 // CHECK15-NEXT: [[SUB175:%.*]] = sub nsw i32 [[DIV174]], 1 15890 // CHECK15-NEXT: store i32 [[SUB175]], ptr [[DOTCAPTURE_EXPR_172]], align 4 15891 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB176]], align 4 15892 // CHECK15-NEXT: [[TMP112:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_172]], align 4 15893 // CHECK15-NEXT: store i32 [[TMP112]], ptr [[DOTOMP_UB177]], align 4 15894 // CHECK15-NEXT: store i32 0, ptr [[I178]], align 4 15895 // CHECK15-NEXT: [[TMP113:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_171]], align 4 15896 // CHECK15-NEXT: [[CMP179:%.*]] = icmp slt i32 0, [[TMP113]] 15897 // CHECK15-NEXT: br i1 [[CMP179]], label [[SIMD_IF_THEN180:%.*]], label [[SIMD_IF_END200:%.*]] 15898 // CHECK15: simd.if.then180: 15899 // CHECK15-NEXT: [[TMP114:%.*]] = load i32, ptr [[DOTOMP_LB176]], align 4 15900 // CHECK15-NEXT: store i32 [[TMP114]], ptr [[DOTOMP_IV181]], align 4 15901 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND183:%.*]] 15902 // CHECK15: omp.inner.for.cond183: 15903 // CHECK15-NEXT: [[TMP115:%.*]] = load i32, ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]] 15904 // CHECK15-NEXT: [[TMP116:%.*]] = load i32, ptr [[DOTOMP_UB177]], align 4, !llvm.access.group [[ACC_GRP22]] 15905 // CHECK15-NEXT: [[CMP184:%.*]] = icmp sle i32 [[TMP115]], [[TMP116]] 15906 // CHECK15-NEXT: br i1 [[CMP184]], label [[OMP_INNER_FOR_BODY185:%.*]], label [[OMP_INNER_FOR_END195:%.*]] 15907 // CHECK15: omp.inner.for.body185: 15908 // CHECK15-NEXT: [[TMP117:%.*]] = load i32, ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP22]] 15909 // CHECK15-NEXT: [[MUL186:%.*]] = mul nsw i32 [[TMP117]], 1 15910 // CHECK15-NEXT: [[ADD187:%.*]] = add nsw i32 0, [[MUL186]] 15911 // CHECK15-NEXT: store i32 [[ADD187]], ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP22]] 15912 // CHECK15-NEXT: [[TMP118:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP22]] 15913 // CHECK15-NEXT: [[TMP119:%.*]] = load i32, ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP22]] 15914 // CHECK15-NEXT: [[ARRAYIDX188:%.*]] = getelementptr inbounds double, ptr [[TMP118]], i32 [[TMP119]] 15915 // CHECK15-NEXT: [[TMP120:%.*]] = load double, ptr [[ARRAYIDX188]], align 4, !llvm.access.group [[ACC_GRP22]] 15916 // CHECK15-NEXT: [[TMP121:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP22]] 15917 // CHECK15-NEXT: [[TMP122:%.*]] = load i32, ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP22]] 15918 // CHECK15-NEXT: [[ARRAYIDX189:%.*]] = getelementptr inbounds double, ptr [[TMP121]], i32 [[TMP122]] 15919 // CHECK15-NEXT: [[TMP123:%.*]] = load double, ptr [[ARRAYIDX189]], align 4, !llvm.access.group [[ACC_GRP22]] 15920 // CHECK15-NEXT: [[ADD190:%.*]] = fadd double [[TMP120]], [[TMP123]] 15921 // CHECK15-NEXT: [[TMP124:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP22]] 15922 // CHECK15-NEXT: [[TMP125:%.*]] = load i32, ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP22]] 15923 // CHECK15-NEXT: [[ARRAYIDX191:%.*]] = getelementptr inbounds double, ptr [[TMP124]], i32 [[TMP125]] 15924 // CHECK15-NEXT: store double [[ADD190]], ptr [[ARRAYIDX191]], align 4, !llvm.access.group [[ACC_GRP22]] 15925 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE192:%.*]] 15926 // CHECK15: omp.body.continue192: 15927 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC193:%.*]] 15928 // CHECK15: omp.inner.for.inc193: 15929 // CHECK15-NEXT: [[TMP126:%.*]] = load i32, ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP22]] 15930 // CHECK15-NEXT: [[ADD194:%.*]] = add nsw i32 [[TMP126]], 1 15931 // CHECK15-NEXT: store i32 [[ADD194]], ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP22]] 15932 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND183]], !llvm.loop [[LOOP23:![0-9]+]] 15933 // CHECK15: omp.inner.for.end195: 15934 // CHECK15-NEXT: [[TMP127:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_171]], align 4 15935 // CHECK15-NEXT: [[SUB196:%.*]] = sub nsw i32 [[TMP127]], 0 15936 // CHECK15-NEXT: [[DIV197:%.*]] = sdiv i32 [[SUB196]], 1 15937 // CHECK15-NEXT: [[MUL198:%.*]] = mul nsw i32 [[DIV197]], 1 15938 // CHECK15-NEXT: [[ADD199:%.*]] = add nsw i32 0, [[MUL198]] 15939 // CHECK15-NEXT: store i32 [[ADD199]], ptr [[I182]], align 4 15940 // CHECK15-NEXT: br label [[SIMD_IF_END200]] 15941 // CHECK15: simd.if.end200: 15942 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 15943 // CHECK15-NEXT: ret i32 [[CALL]] 15944 // 15945 // 15946 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 15947 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] comdat { 15948 // CHECK15-NEXT: entry: 15949 // CHECK15-NEXT: [[A:%.*]] = alloca ptr, align 4 15950 // CHECK15-NEXT: [[B:%.*]] = alloca ptr, align 4 15951 // CHECK15-NEXT: [[C:%.*]] = alloca ptr, align 4 15952 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 15953 // CHECK15-NEXT: [[CH:%.*]] = alloca i32, align 4 15954 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 15955 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15956 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15957 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15958 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15959 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 15960 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15961 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 15962 // CHECK15-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 15963 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4 15964 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_15:%.*]] = alloca i32, align 4 15965 // CHECK15-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 15966 // CHECK15-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 15967 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 15968 // CHECK15-NEXT: [[DOTOMP_IV24:%.*]] = alloca i32, align 4 15969 // CHECK15-NEXT: [[I25:%.*]] = alloca i32, align 4 15970 // CHECK15-NEXT: [[_TMP44:%.*]] = alloca i32, align 4 15971 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_45:%.*]] = alloca i32, align 4 15972 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_46:%.*]] = alloca i32, align 4 15973 // CHECK15-NEXT: [[DOTOMP_LB50:%.*]] = alloca i32, align 4 15974 // CHECK15-NEXT: [[DOTOMP_UB51:%.*]] = alloca i32, align 4 15975 // CHECK15-NEXT: [[I52:%.*]] = alloca i32, align 4 15976 // CHECK15-NEXT: [[DOTOMP_IV55:%.*]] = alloca i32, align 4 15977 // CHECK15-NEXT: [[I56:%.*]] = alloca i32, align 4 15978 // CHECK15-NEXT: [[_TMP75:%.*]] = alloca i32, align 4 15979 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_76:%.*]] = alloca i32, align 4 15980 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_77:%.*]] = alloca i32, align 4 15981 // CHECK15-NEXT: [[DOTOMP_LB81:%.*]] = alloca i32, align 4 15982 // CHECK15-NEXT: [[DOTOMP_UB82:%.*]] = alloca i32, align 4 15983 // CHECK15-NEXT: [[I83:%.*]] = alloca i32, align 4 15984 // CHECK15-NEXT: [[DOTOMP_IV86:%.*]] = alloca i32, align 4 15985 // CHECK15-NEXT: [[I87:%.*]] = alloca i32, align 4 15986 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_106:%.*]] = alloca i32, align 4 15987 // CHECK15-NEXT: [[_TMP107:%.*]] = alloca i32, align 4 15988 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_108:%.*]] = alloca i32, align 4 15989 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_109:%.*]] = alloca i32, align 4 15990 // CHECK15-NEXT: [[DOTOMP_LB113:%.*]] = alloca i32, align 4 15991 // CHECK15-NEXT: [[DOTOMP_UB114:%.*]] = alloca i32, align 4 15992 // CHECK15-NEXT: [[I115:%.*]] = alloca i32, align 4 15993 // CHECK15-NEXT: [[DOTOMP_IV118:%.*]] = alloca i32, align 4 15994 // CHECK15-NEXT: [[I119:%.*]] = alloca i32, align 4 15995 // CHECK15-NEXT: [[_TMP138:%.*]] = alloca i32, align 4 15996 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_139:%.*]] = alloca i32, align 4 15997 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_140:%.*]] = alloca i32, align 4 15998 // CHECK15-NEXT: [[DOTOMP_LB144:%.*]] = alloca i32, align 4 15999 // CHECK15-NEXT: [[DOTOMP_UB145:%.*]] = alloca i32, align 4 16000 // CHECK15-NEXT: [[I146:%.*]] = alloca i32, align 4 16001 // CHECK15-NEXT: [[DOTOMP_IV149:%.*]] = alloca i32, align 4 16002 // CHECK15-NEXT: [[I150:%.*]] = alloca i32, align 4 16003 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_169:%.*]] = alloca i32, align 4 16004 // CHECK15-NEXT: [[_TMP170:%.*]] = alloca i32, align 4 16005 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_171:%.*]] = alloca i32, align 4 16006 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_172:%.*]] = alloca i32, align 4 16007 // CHECK15-NEXT: [[DOTOMP_LB176:%.*]] = alloca i32, align 4 16008 // CHECK15-NEXT: [[DOTOMP_UB177:%.*]] = alloca i32, align 4 16009 // CHECK15-NEXT: [[I178:%.*]] = alloca i32, align 4 16010 // CHECK15-NEXT: [[DOTOMP_IV181:%.*]] = alloca i32, align 4 16011 // CHECK15-NEXT: [[I182:%.*]] = alloca i32, align 4 16012 // CHECK15-NEXT: store i32 10000, ptr [[N]], align 4 16013 // CHECK15-NEXT: store i32 100, ptr [[CH]], align 4 16014 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 16015 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 4 16016 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16017 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], 0 16018 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16019 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 16020 // CHECK15-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4 16021 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 16022 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4 16023 // CHECK15-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4 16024 // CHECK15-NEXT: store i32 0, ptr [[I]], align 4 16025 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16026 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]] 16027 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 16028 // CHECK15: simd.if.then: 16029 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 16030 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 16031 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16032 // CHECK15: omp.inner.for.cond: 16033 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]] 16034 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]] 16035 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 16036 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16037 // CHECK15: omp.inner.for.body: 16038 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 16039 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 16040 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16041 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP25]] 16042 // CHECK15-NEXT: [[TMP8:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP25]] 16043 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP25]] 16044 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 [[TMP9]] 16045 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]] 16046 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP25]] 16047 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP25]] 16048 // CHECK15-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 [[TMP12]] 16049 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP25]] 16050 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], [[TMP13]] 16051 // CHECK15-NEXT: [[TMP14:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP25]] 16052 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP25]] 16053 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 [[TMP15]] 16054 // CHECK15-NEXT: store i32 [[ADD6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP25]] 16055 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16056 // CHECK15: omp.body.continue: 16057 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16058 // CHECK15: omp.inner.for.inc: 16059 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 16060 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1 16061 // CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]] 16062 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 16063 // CHECK15: omp.inner.for.end: 16064 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 16065 // CHECK15-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP17]], 0 16066 // CHECK15-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1 16067 // CHECK15-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1 16068 // CHECK15-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 16069 // CHECK15-NEXT: store i32 [[ADD12]], ptr [[I3]], align 4 16070 // CHECK15-NEXT: br label [[SIMD_IF_END]] 16071 // CHECK15: simd.if.end: 16072 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[N]], align 4 16073 // CHECK15-NEXT: store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR_14]], align 4 16074 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 16075 // CHECK15-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP19]], 0 16076 // CHECK15-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 16077 // CHECK15-NEXT: [[SUB18:%.*]] = sub nsw i32 [[DIV17]], 1 16078 // CHECK15-NEXT: store i32 [[SUB18]], ptr [[DOTCAPTURE_EXPR_15]], align 4 16079 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB19]], align 4 16080 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_15]], align 4 16081 // CHECK15-NEXT: store i32 [[TMP20]], ptr [[DOTOMP_UB20]], align 4 16082 // CHECK15-NEXT: store i32 0, ptr [[I21]], align 4 16083 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 16084 // CHECK15-NEXT: [[CMP22:%.*]] = icmp slt i32 0, [[TMP21]] 16085 // CHECK15-NEXT: br i1 [[CMP22]], label [[SIMD_IF_THEN23:%.*]], label [[SIMD_IF_END43:%.*]] 16086 // CHECK15: simd.if.then23: 16087 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 4 16088 // CHECK15-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV24]], align 4 16089 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]] 16090 // CHECK15: omp.inner.for.cond26: 16091 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]] 16092 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP28]] 16093 // CHECK15-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] 16094 // CHECK15-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END38:%.*]] 16095 // CHECK15: omp.inner.for.body28: 16096 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP28]] 16097 // CHECK15-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP25]], 1 16098 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]] 16099 // CHECK15-NEXT: store i32 [[ADD30]], ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP28]] 16100 // CHECK15-NEXT: [[TMP26:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP28]] 16101 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP28]] 16102 // CHECK15-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 [[TMP27]] 16103 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, ptr [[ARRAYIDX31]], align 4, !llvm.access.group [[ACC_GRP28]] 16104 // CHECK15-NEXT: [[TMP29:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP28]] 16105 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP28]] 16106 // CHECK15-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 [[TMP30]] 16107 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP28]] 16108 // CHECK15-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP28]], [[TMP31]] 16109 // CHECK15-NEXT: [[TMP32:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP28]] 16110 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, ptr [[I25]], align 4, !llvm.access.group [[ACC_GRP28]] 16111 // CHECK15-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, ptr [[TMP32]], i32 [[TMP33]] 16112 // CHECK15-NEXT: store i32 [[ADD33]], ptr [[ARRAYIDX34]], align 4, !llvm.access.group [[ACC_GRP28]] 16113 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]] 16114 // CHECK15: omp.body.continue35: 16115 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]] 16116 // CHECK15: omp.inner.for.inc36: 16117 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP28]] 16118 // CHECK15-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP34]], 1 16119 // CHECK15-NEXT: store i32 [[ADD37]], ptr [[DOTOMP_IV24]], align 4, !llvm.access.group [[ACC_GRP28]] 16120 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP29:![0-9]+]] 16121 // CHECK15: omp.inner.for.end38: 16122 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_14]], align 4 16123 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP35]], 0 16124 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 16125 // CHECK15-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1 16126 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]] 16127 // CHECK15-NEXT: store i32 [[ADD42]], ptr [[I25]], align 4 16128 // CHECK15-NEXT: br label [[SIMD_IF_END43]] 16129 // CHECK15: simd.if.end43: 16130 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, ptr [[N]], align 4 16131 // CHECK15-NEXT: store i32 [[TMP36]], ptr [[DOTCAPTURE_EXPR_45]], align 4 16132 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_45]], align 4 16133 // CHECK15-NEXT: [[SUB47:%.*]] = sub nsw i32 [[TMP37]], 0 16134 // CHECK15-NEXT: [[DIV48:%.*]] = sdiv i32 [[SUB47]], 1 16135 // CHECK15-NEXT: [[SUB49:%.*]] = sub nsw i32 [[DIV48]], 1 16136 // CHECK15-NEXT: store i32 [[SUB49]], ptr [[DOTCAPTURE_EXPR_46]], align 4 16137 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB50]], align 4 16138 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_46]], align 4 16139 // CHECK15-NEXT: store i32 [[TMP38]], ptr [[DOTOMP_UB51]], align 4 16140 // CHECK15-NEXT: store i32 0, ptr [[I52]], align 4 16141 // CHECK15-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_45]], align 4 16142 // CHECK15-NEXT: [[CMP53:%.*]] = icmp slt i32 0, [[TMP39]] 16143 // CHECK15-NEXT: br i1 [[CMP53]], label [[SIMD_IF_THEN54:%.*]], label [[SIMD_IF_END74:%.*]] 16144 // CHECK15: simd.if.then54: 16145 // CHECK15-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_LB50]], align 4 16146 // CHECK15-NEXT: store i32 [[TMP40]], ptr [[DOTOMP_IV55]], align 4 16147 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND57:%.*]] 16148 // CHECK15: omp.inner.for.cond57: 16149 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP31:![0-9]+]] 16150 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_UB51]], align 4, !llvm.access.group [[ACC_GRP31]] 16151 // CHECK15-NEXT: [[CMP58:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]] 16152 // CHECK15-NEXT: br i1 [[CMP58]], label [[OMP_INNER_FOR_BODY59:%.*]], label [[OMP_INNER_FOR_END69:%.*]] 16153 // CHECK15: omp.inner.for.body59: 16154 // CHECK15-NEXT: [[TMP43:%.*]] = load i32, ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP31]] 16155 // CHECK15-NEXT: [[MUL60:%.*]] = mul nsw i32 [[TMP43]], 1 16156 // CHECK15-NEXT: [[ADD61:%.*]] = add nsw i32 0, [[MUL60]] 16157 // CHECK15-NEXT: store i32 [[ADD61]], ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP31]] 16158 // CHECK15-NEXT: [[TMP44:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP31]] 16159 // CHECK15-NEXT: [[TMP45:%.*]] = load i32, ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP31]] 16160 // CHECK15-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds i32, ptr [[TMP44]], i32 [[TMP45]] 16161 // CHECK15-NEXT: [[TMP46:%.*]] = load i32, ptr [[ARRAYIDX62]], align 4, !llvm.access.group [[ACC_GRP31]] 16162 // CHECK15-NEXT: [[TMP47:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP31]] 16163 // CHECK15-NEXT: [[TMP48:%.*]] = load i32, ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP31]] 16164 // CHECK15-NEXT: [[ARRAYIDX63:%.*]] = getelementptr inbounds i32, ptr [[TMP47]], i32 [[TMP48]] 16165 // CHECK15-NEXT: [[TMP49:%.*]] = load i32, ptr [[ARRAYIDX63]], align 4, !llvm.access.group [[ACC_GRP31]] 16166 // CHECK15-NEXT: [[ADD64:%.*]] = add nsw i32 [[TMP46]], [[TMP49]] 16167 // CHECK15-NEXT: [[TMP50:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP31]] 16168 // CHECK15-NEXT: [[TMP51:%.*]] = load i32, ptr [[I56]], align 4, !llvm.access.group [[ACC_GRP31]] 16169 // CHECK15-NEXT: [[ARRAYIDX65:%.*]] = getelementptr inbounds i32, ptr [[TMP50]], i32 [[TMP51]] 16170 // CHECK15-NEXT: store i32 [[ADD64]], ptr [[ARRAYIDX65]], align 4, !llvm.access.group [[ACC_GRP31]] 16171 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE66:%.*]] 16172 // CHECK15: omp.body.continue66: 16173 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC67:%.*]] 16174 // CHECK15: omp.inner.for.inc67: 16175 // CHECK15-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP31]] 16176 // CHECK15-NEXT: [[ADD68:%.*]] = add nsw i32 [[TMP52]], 1 16177 // CHECK15-NEXT: store i32 [[ADD68]], ptr [[DOTOMP_IV55]], align 4, !llvm.access.group [[ACC_GRP31]] 16178 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND57]], !llvm.loop [[LOOP32:![0-9]+]] 16179 // CHECK15: omp.inner.for.end69: 16180 // CHECK15-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_45]], align 4 16181 // CHECK15-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP53]], 0 16182 // CHECK15-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1 16183 // CHECK15-NEXT: [[MUL72:%.*]] = mul nsw i32 [[DIV71]], 1 16184 // CHECK15-NEXT: [[ADD73:%.*]] = add nsw i32 0, [[MUL72]] 16185 // CHECK15-NEXT: store i32 [[ADD73]], ptr [[I56]], align 4 16186 // CHECK15-NEXT: br label [[SIMD_IF_END74]] 16187 // CHECK15: simd.if.end74: 16188 // CHECK15-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4 16189 // CHECK15-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_76]], align 4 16190 // CHECK15-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_76]], align 4 16191 // CHECK15-NEXT: [[SUB78:%.*]] = sub nsw i32 [[TMP55]], 0 16192 // CHECK15-NEXT: [[DIV79:%.*]] = sdiv i32 [[SUB78]], 1 16193 // CHECK15-NEXT: [[SUB80:%.*]] = sub nsw i32 [[DIV79]], 1 16194 // CHECK15-NEXT: store i32 [[SUB80]], ptr [[DOTCAPTURE_EXPR_77]], align 4 16195 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB81]], align 4 16196 // CHECK15-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_77]], align 4 16197 // CHECK15-NEXT: store i32 [[TMP56]], ptr [[DOTOMP_UB82]], align 4 16198 // CHECK15-NEXT: store i32 0, ptr [[I83]], align 4 16199 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_76]], align 4 16200 // CHECK15-NEXT: [[CMP84:%.*]] = icmp slt i32 0, [[TMP57]] 16201 // CHECK15-NEXT: br i1 [[CMP84]], label [[SIMD_IF_THEN85:%.*]], label [[SIMD_IF_END105:%.*]] 16202 // CHECK15: simd.if.then85: 16203 // CHECK15-NEXT: [[TMP58:%.*]] = load i32, ptr [[DOTOMP_LB81]], align 4 16204 // CHECK15-NEXT: store i32 [[TMP58]], ptr [[DOTOMP_IV86]], align 4 16205 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND88:%.*]] 16206 // CHECK15: omp.inner.for.cond88: 16207 // CHECK15-NEXT: [[TMP59:%.*]] = load i32, ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]] 16208 // CHECK15-NEXT: [[TMP60:%.*]] = load i32, ptr [[DOTOMP_UB82]], align 4, !llvm.access.group [[ACC_GRP34]] 16209 // CHECK15-NEXT: [[CMP89:%.*]] = icmp sle i32 [[TMP59]], [[TMP60]] 16210 // CHECK15-NEXT: br i1 [[CMP89]], label [[OMP_INNER_FOR_BODY90:%.*]], label [[OMP_INNER_FOR_END100:%.*]] 16211 // CHECK15: omp.inner.for.body90: 16212 // CHECK15-NEXT: [[TMP61:%.*]] = load i32, ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP34]] 16213 // CHECK15-NEXT: [[MUL91:%.*]] = mul nsw i32 [[TMP61]], 1 16214 // CHECK15-NEXT: [[ADD92:%.*]] = add nsw i32 0, [[MUL91]] 16215 // CHECK15-NEXT: store i32 [[ADD92]], ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP34]] 16216 // CHECK15-NEXT: [[TMP62:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP34]] 16217 // CHECK15-NEXT: [[TMP63:%.*]] = load i32, ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP34]] 16218 // CHECK15-NEXT: [[ARRAYIDX93:%.*]] = getelementptr inbounds i32, ptr [[TMP62]], i32 [[TMP63]] 16219 // CHECK15-NEXT: [[TMP64:%.*]] = load i32, ptr [[ARRAYIDX93]], align 4, !llvm.access.group [[ACC_GRP34]] 16220 // CHECK15-NEXT: [[TMP65:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP34]] 16221 // CHECK15-NEXT: [[TMP66:%.*]] = load i32, ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP34]] 16222 // CHECK15-NEXT: [[ARRAYIDX94:%.*]] = getelementptr inbounds i32, ptr [[TMP65]], i32 [[TMP66]] 16223 // CHECK15-NEXT: [[TMP67:%.*]] = load i32, ptr [[ARRAYIDX94]], align 4, !llvm.access.group [[ACC_GRP34]] 16224 // CHECK15-NEXT: [[ADD95:%.*]] = add nsw i32 [[TMP64]], [[TMP67]] 16225 // CHECK15-NEXT: [[TMP68:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP34]] 16226 // CHECK15-NEXT: [[TMP69:%.*]] = load i32, ptr [[I87]], align 4, !llvm.access.group [[ACC_GRP34]] 16227 // CHECK15-NEXT: [[ARRAYIDX96:%.*]] = getelementptr inbounds i32, ptr [[TMP68]], i32 [[TMP69]] 16228 // CHECK15-NEXT: store i32 [[ADD95]], ptr [[ARRAYIDX96]], align 4, !llvm.access.group [[ACC_GRP34]] 16229 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE97:%.*]] 16230 // CHECK15: omp.body.continue97: 16231 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC98:%.*]] 16232 // CHECK15: omp.inner.for.inc98: 16233 // CHECK15-NEXT: [[TMP70:%.*]] = load i32, ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP34]] 16234 // CHECK15-NEXT: [[ADD99:%.*]] = add nsw i32 [[TMP70]], 1 16235 // CHECK15-NEXT: store i32 [[ADD99]], ptr [[DOTOMP_IV86]], align 4, !llvm.access.group [[ACC_GRP34]] 16236 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND88]], !llvm.loop [[LOOP35:![0-9]+]] 16237 // CHECK15: omp.inner.for.end100: 16238 // CHECK15-NEXT: [[TMP71:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_76]], align 4 16239 // CHECK15-NEXT: [[SUB101:%.*]] = sub nsw i32 [[TMP71]], 0 16240 // CHECK15-NEXT: [[DIV102:%.*]] = sdiv i32 [[SUB101]], 1 16241 // CHECK15-NEXT: [[MUL103:%.*]] = mul nsw i32 [[DIV102]], 1 16242 // CHECK15-NEXT: [[ADD104:%.*]] = add nsw i32 0, [[MUL103]] 16243 // CHECK15-NEXT: store i32 [[ADD104]], ptr [[I87]], align 4 16244 // CHECK15-NEXT: br label [[SIMD_IF_END105]] 16245 // CHECK15: simd.if.end105: 16246 // CHECK15-NEXT: [[TMP72:%.*]] = load i32, ptr [[CH]], align 4 16247 // CHECK15-NEXT: store i32 [[TMP72]], ptr [[DOTCAPTURE_EXPR_106]], align 4 16248 // CHECK15-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 4 16249 // CHECK15-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_108]], align 4 16250 // CHECK15-NEXT: [[TMP74:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_108]], align 4 16251 // CHECK15-NEXT: [[SUB110:%.*]] = sub nsw i32 [[TMP74]], 0 16252 // CHECK15-NEXT: [[DIV111:%.*]] = sdiv i32 [[SUB110]], 1 16253 // CHECK15-NEXT: [[SUB112:%.*]] = sub nsw i32 [[DIV111]], 1 16254 // CHECK15-NEXT: store i32 [[SUB112]], ptr [[DOTCAPTURE_EXPR_109]], align 4 16255 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB113]], align 4 16256 // CHECK15-NEXT: [[TMP75:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_109]], align 4 16257 // CHECK15-NEXT: store i32 [[TMP75]], ptr [[DOTOMP_UB114]], align 4 16258 // CHECK15-NEXT: store i32 0, ptr [[I115]], align 4 16259 // CHECK15-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_108]], align 4 16260 // CHECK15-NEXT: [[CMP116:%.*]] = icmp slt i32 0, [[TMP76]] 16261 // CHECK15-NEXT: br i1 [[CMP116]], label [[SIMD_IF_THEN117:%.*]], label [[SIMD_IF_END137:%.*]] 16262 // CHECK15: simd.if.then117: 16263 // CHECK15-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTOMP_LB113]], align 4 16264 // CHECK15-NEXT: store i32 [[TMP77]], ptr [[DOTOMP_IV118]], align 4 16265 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND120:%.*]] 16266 // CHECK15: omp.inner.for.cond120: 16267 // CHECK15-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP37:![0-9]+]] 16268 // CHECK15-NEXT: [[TMP79:%.*]] = load i32, ptr [[DOTOMP_UB114]], align 4, !llvm.access.group [[ACC_GRP37]] 16269 // CHECK15-NEXT: [[CMP121:%.*]] = icmp sle i32 [[TMP78]], [[TMP79]] 16270 // CHECK15-NEXT: br i1 [[CMP121]], label [[OMP_INNER_FOR_BODY122:%.*]], label [[OMP_INNER_FOR_END132:%.*]] 16271 // CHECK15: omp.inner.for.body122: 16272 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP37]] 16273 // CHECK15-NEXT: [[MUL123:%.*]] = mul nsw i32 [[TMP80]], 1 16274 // CHECK15-NEXT: [[ADD124:%.*]] = add nsw i32 0, [[MUL123]] 16275 // CHECK15-NEXT: store i32 [[ADD124]], ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP37]] 16276 // CHECK15-NEXT: [[TMP81:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP37]] 16277 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP37]] 16278 // CHECK15-NEXT: [[ARRAYIDX125:%.*]] = getelementptr inbounds i32, ptr [[TMP81]], i32 [[TMP82]] 16279 // CHECK15-NEXT: [[TMP83:%.*]] = load i32, ptr [[ARRAYIDX125]], align 4, !llvm.access.group [[ACC_GRP37]] 16280 // CHECK15-NEXT: [[TMP84:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP37]] 16281 // CHECK15-NEXT: [[TMP85:%.*]] = load i32, ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP37]] 16282 // CHECK15-NEXT: [[ARRAYIDX126:%.*]] = getelementptr inbounds i32, ptr [[TMP84]], i32 [[TMP85]] 16283 // CHECK15-NEXT: [[TMP86:%.*]] = load i32, ptr [[ARRAYIDX126]], align 4, !llvm.access.group [[ACC_GRP37]] 16284 // CHECK15-NEXT: [[ADD127:%.*]] = add nsw i32 [[TMP83]], [[TMP86]] 16285 // CHECK15-NEXT: [[TMP87:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP37]] 16286 // CHECK15-NEXT: [[TMP88:%.*]] = load i32, ptr [[I119]], align 4, !llvm.access.group [[ACC_GRP37]] 16287 // CHECK15-NEXT: [[ARRAYIDX128:%.*]] = getelementptr inbounds i32, ptr [[TMP87]], i32 [[TMP88]] 16288 // CHECK15-NEXT: store i32 [[ADD127]], ptr [[ARRAYIDX128]], align 4, !llvm.access.group [[ACC_GRP37]] 16289 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE129:%.*]] 16290 // CHECK15: omp.body.continue129: 16291 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC130:%.*]] 16292 // CHECK15: omp.inner.for.inc130: 16293 // CHECK15-NEXT: [[TMP89:%.*]] = load i32, ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP37]] 16294 // CHECK15-NEXT: [[ADD131:%.*]] = add nsw i32 [[TMP89]], 1 16295 // CHECK15-NEXT: store i32 [[ADD131]], ptr [[DOTOMP_IV118]], align 4, !llvm.access.group [[ACC_GRP37]] 16296 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND120]], !llvm.loop [[LOOP38:![0-9]+]] 16297 // CHECK15: omp.inner.for.end132: 16298 // CHECK15-NEXT: [[TMP90:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_108]], align 4 16299 // CHECK15-NEXT: [[SUB133:%.*]] = sub nsw i32 [[TMP90]], 0 16300 // CHECK15-NEXT: [[DIV134:%.*]] = sdiv i32 [[SUB133]], 1 16301 // CHECK15-NEXT: [[MUL135:%.*]] = mul nsw i32 [[DIV134]], 1 16302 // CHECK15-NEXT: [[ADD136:%.*]] = add nsw i32 0, [[MUL135]] 16303 // CHECK15-NEXT: store i32 [[ADD136]], ptr [[I119]], align 4 16304 // CHECK15-NEXT: br label [[SIMD_IF_END137]] 16305 // CHECK15: simd.if.end137: 16306 // CHECK15-NEXT: [[TMP91:%.*]] = load i32, ptr [[N]], align 4 16307 // CHECK15-NEXT: store i32 [[TMP91]], ptr [[DOTCAPTURE_EXPR_139]], align 4 16308 // CHECK15-NEXT: [[TMP92:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_139]], align 4 16309 // CHECK15-NEXT: [[SUB141:%.*]] = sub nsw i32 [[TMP92]], 0 16310 // CHECK15-NEXT: [[DIV142:%.*]] = sdiv i32 [[SUB141]], 1 16311 // CHECK15-NEXT: [[SUB143:%.*]] = sub nsw i32 [[DIV142]], 1 16312 // CHECK15-NEXT: store i32 [[SUB143]], ptr [[DOTCAPTURE_EXPR_140]], align 4 16313 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB144]], align 4 16314 // CHECK15-NEXT: [[TMP93:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_140]], align 4 16315 // CHECK15-NEXT: store i32 [[TMP93]], ptr [[DOTOMP_UB145]], align 4 16316 // CHECK15-NEXT: store i32 0, ptr [[I146]], align 4 16317 // CHECK15-NEXT: [[TMP94:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_139]], align 4 16318 // CHECK15-NEXT: [[CMP147:%.*]] = icmp slt i32 0, [[TMP94]] 16319 // CHECK15-NEXT: br i1 [[CMP147]], label [[SIMD_IF_THEN148:%.*]], label [[SIMD_IF_END168:%.*]] 16320 // CHECK15: simd.if.then148: 16321 // CHECK15-NEXT: [[TMP95:%.*]] = load i32, ptr [[DOTOMP_LB144]], align 4 16322 // CHECK15-NEXT: store i32 [[TMP95]], ptr [[DOTOMP_IV149]], align 4 16323 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND151:%.*]] 16324 // CHECK15: omp.inner.for.cond151: 16325 // CHECK15-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP40:![0-9]+]] 16326 // CHECK15-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTOMP_UB145]], align 4, !llvm.access.group [[ACC_GRP40]] 16327 // CHECK15-NEXT: [[CMP152:%.*]] = icmp sle i32 [[TMP96]], [[TMP97]] 16328 // CHECK15-NEXT: br i1 [[CMP152]], label [[OMP_INNER_FOR_BODY153:%.*]], label [[OMP_INNER_FOR_END163:%.*]] 16329 // CHECK15: omp.inner.for.body153: 16330 // CHECK15-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP40]] 16331 // CHECK15-NEXT: [[MUL154:%.*]] = mul nsw i32 [[TMP98]], 1 16332 // CHECK15-NEXT: [[ADD155:%.*]] = add nsw i32 0, [[MUL154]] 16333 // CHECK15-NEXT: store i32 [[ADD155]], ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP40]] 16334 // CHECK15-NEXT: [[TMP99:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP40]] 16335 // CHECK15-NEXT: [[TMP100:%.*]] = load i32, ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP40]] 16336 // CHECK15-NEXT: [[ARRAYIDX156:%.*]] = getelementptr inbounds i32, ptr [[TMP99]], i32 [[TMP100]] 16337 // CHECK15-NEXT: [[TMP101:%.*]] = load i32, ptr [[ARRAYIDX156]], align 4, !llvm.access.group [[ACC_GRP40]] 16338 // CHECK15-NEXT: [[TMP102:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP40]] 16339 // CHECK15-NEXT: [[TMP103:%.*]] = load i32, ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP40]] 16340 // CHECK15-NEXT: [[ARRAYIDX157:%.*]] = getelementptr inbounds i32, ptr [[TMP102]], i32 [[TMP103]] 16341 // CHECK15-NEXT: [[TMP104:%.*]] = load i32, ptr [[ARRAYIDX157]], align 4, !llvm.access.group [[ACC_GRP40]] 16342 // CHECK15-NEXT: [[ADD158:%.*]] = add nsw i32 [[TMP101]], [[TMP104]] 16343 // CHECK15-NEXT: [[TMP105:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP40]] 16344 // CHECK15-NEXT: [[TMP106:%.*]] = load i32, ptr [[I150]], align 4, !llvm.access.group [[ACC_GRP40]] 16345 // CHECK15-NEXT: [[ARRAYIDX159:%.*]] = getelementptr inbounds i32, ptr [[TMP105]], i32 [[TMP106]] 16346 // CHECK15-NEXT: store i32 [[ADD158]], ptr [[ARRAYIDX159]], align 4, !llvm.access.group [[ACC_GRP40]] 16347 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE160:%.*]] 16348 // CHECK15: omp.body.continue160: 16349 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC161:%.*]] 16350 // CHECK15: omp.inner.for.inc161: 16351 // CHECK15-NEXT: [[TMP107:%.*]] = load i32, ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP40]] 16352 // CHECK15-NEXT: [[ADD162:%.*]] = add nsw i32 [[TMP107]], 1 16353 // CHECK15-NEXT: store i32 [[ADD162]], ptr [[DOTOMP_IV149]], align 4, !llvm.access.group [[ACC_GRP40]] 16354 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND151]], !llvm.loop [[LOOP41:![0-9]+]] 16355 // CHECK15: omp.inner.for.end163: 16356 // CHECK15-NEXT: [[TMP108:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_139]], align 4 16357 // CHECK15-NEXT: [[SUB164:%.*]] = sub nsw i32 [[TMP108]], 0 16358 // CHECK15-NEXT: [[DIV165:%.*]] = sdiv i32 [[SUB164]], 1 16359 // CHECK15-NEXT: [[MUL166:%.*]] = mul nsw i32 [[DIV165]], 1 16360 // CHECK15-NEXT: [[ADD167:%.*]] = add nsw i32 0, [[MUL166]] 16361 // CHECK15-NEXT: store i32 [[ADD167]], ptr [[I150]], align 4 16362 // CHECK15-NEXT: br label [[SIMD_IF_END168]] 16363 // CHECK15: simd.if.end168: 16364 // CHECK15-NEXT: [[TMP109:%.*]] = load i32, ptr [[CH]], align 4 16365 // CHECK15-NEXT: store i32 [[TMP109]], ptr [[DOTCAPTURE_EXPR_169]], align 4 16366 // CHECK15-NEXT: [[TMP110:%.*]] = load i32, ptr [[N]], align 4 16367 // CHECK15-NEXT: store i32 [[TMP110]], ptr [[DOTCAPTURE_EXPR_171]], align 4 16368 // CHECK15-NEXT: [[TMP111:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_171]], align 4 16369 // CHECK15-NEXT: [[SUB173:%.*]] = sub nsw i32 [[TMP111]], 0 16370 // CHECK15-NEXT: [[DIV174:%.*]] = sdiv i32 [[SUB173]], 1 16371 // CHECK15-NEXT: [[SUB175:%.*]] = sub nsw i32 [[DIV174]], 1 16372 // CHECK15-NEXT: store i32 [[SUB175]], ptr [[DOTCAPTURE_EXPR_172]], align 4 16373 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB176]], align 4 16374 // CHECK15-NEXT: [[TMP112:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_172]], align 4 16375 // CHECK15-NEXT: store i32 [[TMP112]], ptr [[DOTOMP_UB177]], align 4 16376 // CHECK15-NEXT: store i32 0, ptr [[I178]], align 4 16377 // CHECK15-NEXT: [[TMP113:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_171]], align 4 16378 // CHECK15-NEXT: [[CMP179:%.*]] = icmp slt i32 0, [[TMP113]] 16379 // CHECK15-NEXT: br i1 [[CMP179]], label [[SIMD_IF_THEN180:%.*]], label [[SIMD_IF_END200:%.*]] 16380 // CHECK15: simd.if.then180: 16381 // CHECK15-NEXT: [[TMP114:%.*]] = load i32, ptr [[DOTOMP_LB176]], align 4 16382 // CHECK15-NEXT: store i32 [[TMP114]], ptr [[DOTOMP_IV181]], align 4 16383 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND183:%.*]] 16384 // CHECK15: omp.inner.for.cond183: 16385 // CHECK15-NEXT: [[TMP115:%.*]] = load i32, ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]] 16386 // CHECK15-NEXT: [[TMP116:%.*]] = load i32, ptr [[DOTOMP_UB177]], align 4, !llvm.access.group [[ACC_GRP43]] 16387 // CHECK15-NEXT: [[CMP184:%.*]] = icmp sle i32 [[TMP115]], [[TMP116]] 16388 // CHECK15-NEXT: br i1 [[CMP184]], label [[OMP_INNER_FOR_BODY185:%.*]], label [[OMP_INNER_FOR_END195:%.*]] 16389 // CHECK15: omp.inner.for.body185: 16390 // CHECK15-NEXT: [[TMP117:%.*]] = load i32, ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP43]] 16391 // CHECK15-NEXT: [[MUL186:%.*]] = mul nsw i32 [[TMP117]], 1 16392 // CHECK15-NEXT: [[ADD187:%.*]] = add nsw i32 0, [[MUL186]] 16393 // CHECK15-NEXT: store i32 [[ADD187]], ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP43]] 16394 // CHECK15-NEXT: [[TMP118:%.*]] = load ptr, ptr [[B]], align 4, !llvm.access.group [[ACC_GRP43]] 16395 // CHECK15-NEXT: [[TMP119:%.*]] = load i32, ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP43]] 16396 // CHECK15-NEXT: [[ARRAYIDX188:%.*]] = getelementptr inbounds i32, ptr [[TMP118]], i32 [[TMP119]] 16397 // CHECK15-NEXT: [[TMP120:%.*]] = load i32, ptr [[ARRAYIDX188]], align 4, !llvm.access.group [[ACC_GRP43]] 16398 // CHECK15-NEXT: [[TMP121:%.*]] = load ptr, ptr [[C]], align 4, !llvm.access.group [[ACC_GRP43]] 16399 // CHECK15-NEXT: [[TMP122:%.*]] = load i32, ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP43]] 16400 // CHECK15-NEXT: [[ARRAYIDX189:%.*]] = getelementptr inbounds i32, ptr [[TMP121]], i32 [[TMP122]] 16401 // CHECK15-NEXT: [[TMP123:%.*]] = load i32, ptr [[ARRAYIDX189]], align 4, !llvm.access.group [[ACC_GRP43]] 16402 // CHECK15-NEXT: [[ADD190:%.*]] = add nsw i32 [[TMP120]], [[TMP123]] 16403 // CHECK15-NEXT: [[TMP124:%.*]] = load ptr, ptr [[A]], align 4, !llvm.access.group [[ACC_GRP43]] 16404 // CHECK15-NEXT: [[TMP125:%.*]] = load i32, ptr [[I182]], align 4, !llvm.access.group [[ACC_GRP43]] 16405 // CHECK15-NEXT: [[ARRAYIDX191:%.*]] = getelementptr inbounds i32, ptr [[TMP124]], i32 [[TMP125]] 16406 // CHECK15-NEXT: store i32 [[ADD190]], ptr [[ARRAYIDX191]], align 4, !llvm.access.group [[ACC_GRP43]] 16407 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE192:%.*]] 16408 // CHECK15: omp.body.continue192: 16409 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC193:%.*]] 16410 // CHECK15: omp.inner.for.inc193: 16411 // CHECK15-NEXT: [[TMP126:%.*]] = load i32, ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP43]] 16412 // CHECK15-NEXT: [[ADD194:%.*]] = add nsw i32 [[TMP126]], 1 16413 // CHECK15-NEXT: store i32 [[ADD194]], ptr [[DOTOMP_IV181]], align 4, !llvm.access.group [[ACC_GRP43]] 16414 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND183]], !llvm.loop [[LOOP44:![0-9]+]] 16415 // CHECK15: omp.inner.for.end195: 16416 // CHECK15-NEXT: [[TMP127:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_171]], align 4 16417 // CHECK15-NEXT: [[SUB196:%.*]] = sub nsw i32 [[TMP127]], 0 16418 // CHECK15-NEXT: [[DIV197:%.*]] = sdiv i32 [[SUB196]], 1 16419 // CHECK15-NEXT: [[MUL198:%.*]] = mul nsw i32 [[DIV197]], 1 16420 // CHECK15-NEXT: [[ADD199:%.*]] = add nsw i32 0, [[MUL198]] 16421 // CHECK15-NEXT: store i32 [[ADD199]], ptr [[I182]], align 4 16422 // CHECK15-NEXT: br label [[SIMD_IF_END200]] 16423 // CHECK15: simd.if.end200: 16424 // CHECK15-NEXT: ret i32 0 16425 // 16426