1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -triple x86_64-unknown-linux -verify -fopenmp-simd -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // expected-no-diagnostics 10 #ifndef HEADER 11 #define HEADER 12 13 int main(int argc, char **argv) { 14 #pragma omp target teams 15 #pragma omp distribute parallel for reduction(task, +: argc, argv[0:10][0:argc]) 16 for (long long i = 0; i < 10; ++i) { 17 #pragma omp task in_reduction(+: argc, argv[0:10][0:argc]) 18 ; 19 } 20 } 21 22 23 24 // Init firstprivate copy of argc 25 26 // Init firstprivate copy of argv[0:10][0:argc] 27 28 // Register task reduction. 29 30 31 32 33 34 35 36 37 38 #endif 39 // CHECK1-LABEL: define {{[^@]+}}@main 40 // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 41 // CHECK1-NEXT: entry: 42 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 43 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 44 // CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 45 // CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 46 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 47 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 48 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[ARGC_CASTED]], align 4 49 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARGC_CASTED]], align 8 50 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 51 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14(i64 [[TMP1]], ptr [[TMP2]]) #[[ATTR2:[0-9]+]] 52 // CHECK1-NEXT: ret i32 0 53 // 54 // 55 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14 56 // CHECK1-SAME: (i64 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] { 57 // CHECK1-NEXT: entry: 58 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 59 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 60 // CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8 61 // CHECK1-NEXT: store i64 [[ARGC]], ptr [[ARGC_ADDR]], align 8 62 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 63 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 64 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[ARGC_CASTED]], align 4 65 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARGC_CASTED]], align 8 66 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 67 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined, i64 [[TMP1]], ptr [[TMP2]]) 68 // CHECK1-NEXT: ret void 69 // 70 // 71 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined 72 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] { 73 // CHECK1-NEXT: entry: 74 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 75 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 76 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8 77 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 78 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 79 // CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 8 80 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8 81 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8 82 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 83 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 84 // CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8 85 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 86 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 87 // CHECK1-NEXT: store i64 [[ARGC]], ptr [[ARGC_ADDR]], align 8 88 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 89 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8 90 // CHECK1-NEXT: store i64 9, ptr [[DOTOMP_COMB_UB]], align 8 91 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 92 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 93 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 94 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 95 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 96 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 97 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP2]], 9 98 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 99 // CHECK1: cond.true: 100 // CHECK1-NEXT: br label [[COND_END:%.*]] 101 // CHECK1: cond.false: 102 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 103 // CHECK1-NEXT: br label [[COND_END]] 104 // CHECK1: cond.end: 105 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 106 // CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8 107 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 108 // CHECK1-NEXT: store i64 [[TMP4]], ptr [[DOTOMP_IV]], align 8 109 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 110 // CHECK1: omp.inner.for.cond: 111 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 112 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 113 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i64 [[TMP5]], [[TMP6]] 114 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 115 // CHECK1: omp.inner.for.body: 116 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8 117 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8 118 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 119 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined, i64 [[TMP7]], i64 [[TMP8]], ptr [[ARGC_ADDR]], ptr [[TMP9]]) 120 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 121 // CHECK1: omp.inner.for.inc: 122 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 123 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8 124 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP10]], [[TMP11]] 125 // CHECK1-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8 126 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 127 // CHECK1: omp.inner.for.end: 128 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 129 // CHECK1: omp.loop.exit: 130 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 131 // CHECK1-NEXT: ret void 132 // 133 // 134 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined 135 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] { 136 // CHECK1-NEXT: entry: 137 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 138 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 139 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 140 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 141 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8 142 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 143 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 144 // CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 8 145 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 146 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 147 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 148 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[ARGC1:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 151 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 152 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8 153 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8 154 // CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [2 x %struct.kmp_taskred_input_t], align 8 155 // CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 8 156 // CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8 157 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 158 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8 159 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1 160 // CHECK1-NEXT: [[_TMP28:%.*]] = alloca i8, align 1 161 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 162 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 163 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 164 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 165 // CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8 166 // CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 167 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8 168 // CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 169 // CHECK1-NEXT: store i64 9, ptr [[DOTOMP_UB]], align 8 170 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 171 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 172 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[DOTOMP_LB]], align 8 173 // CHECK1-NEXT: store i64 [[TMP2]], ptr [[DOTOMP_UB]], align 8 174 // CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 175 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 176 // CHECK1-NEXT: store i32 0, ptr [[ARGC1]], align 4 177 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 178 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP3]], i64 0 179 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8 180 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP4]], i64 0 181 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 182 // CHECK1-NEXT: [[TMP6:%.*]] = sext i32 [[TMP5]] to i64 183 // CHECK1-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP6]] 184 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 185 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP7]], i64 9 186 // CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[ARRAYIDX3]], align 8 187 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP8]], i64 [[LB_ADD_LEN]] 188 // CHECK1-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARRAYIDX4]] to i64 189 // CHECK1-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64 190 // CHECK1-NEXT: [[TMP11:%.*]] = sub i64 [[TMP9]], [[TMP10]] 191 // CHECK1-NEXT: [[TMP12:%.*]] = sdiv exact i64 [[TMP11]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 192 // CHECK1-NEXT: [[TMP13:%.*]] = add nuw i64 [[TMP12]], 1 193 // CHECK1-NEXT: [[TMP14:%.*]] = mul nuw i64 [[TMP13]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 194 // CHECK1-NEXT: [[TMP15:%.*]] = call ptr @llvm.stacksave.p0() 195 // CHECK1-NEXT: store ptr [[TMP15]], ptr [[SAVED_STACK]], align 8 196 // CHECK1-NEXT: [[VLA:%.*]] = alloca i8, i64 [[TMP13]], align 16 197 // CHECK1-NEXT: store i64 [[TMP13]], ptr [[__VLA_EXPR0]], align 8 198 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP13]] 199 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP16]] 200 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 201 // CHECK1: omp.arrayinit.body: 202 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 203 // CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 204 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 205 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP16]] 206 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 207 // CHECK1: omp.arrayinit.done: 208 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 209 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8 210 // CHECK1-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[TMP18]] to i64 211 // CHECK1-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64 212 // CHECK1-NEXT: [[TMP21:%.*]] = sub i64 [[TMP19]], [[TMP20]] 213 // CHECK1-NEXT: [[TMP22:%.*]] = sdiv exact i64 [[TMP21]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 214 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP22]] 215 // CHECK1-NEXT: store ptr [[_TMP6]], ptr [[_TMP5]], align 8 216 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[_TMP6]], align 8 217 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 0 218 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0 219 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP24]], align 8 220 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1 221 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP25]], align 8 222 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2 223 // CHECK1-NEXT: store i64 4, ptr [[TMP26]], align 8 224 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3 225 // CHECK1-NEXT: store ptr @.red_init., ptr [[TMP27]], align 8 226 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4 227 // CHECK1-NEXT: store ptr null, ptr [[TMP28]], align 8 228 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5 229 // CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP29]], align 8 230 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6 231 // CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP30]], i8 0, i64 4, i1 false) 232 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_7:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 1 233 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 0 234 // CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 235 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP32]], i64 0 236 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[ARRAYIDX8]], align 8 237 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP33]], i64 0 238 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP0]], align 4 239 // CHECK1-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 240 // CHECK1-NEXT: [[LB_ADD_LEN10:%.*]] = add nsw i64 -1, [[TMP35]] 241 // CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 242 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP36]], i64 9 243 // CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8 244 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP37]], i64 [[LB_ADD_LEN10]] 245 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP31]], align 8 246 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 1 247 // CHECK1-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP38]], align 8 248 // CHECK1-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[ARRAYIDX12]] to i64 249 // CHECK1-NEXT: [[TMP40:%.*]] = ptrtoint ptr [[ARRAYIDX9]] to i64 250 // CHECK1-NEXT: [[TMP41:%.*]] = sub i64 [[TMP39]], [[TMP40]] 251 // CHECK1-NEXT: [[TMP42:%.*]] = sdiv exact i64 [[TMP41]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 252 // CHECK1-NEXT: [[TMP43:%.*]] = add nuw i64 [[TMP42]], 1 253 // CHECK1-NEXT: [[TMP44:%.*]] = mul nuw i64 [[TMP43]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 254 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 2 255 // CHECK1-NEXT: store i64 [[TMP44]], ptr [[TMP45]], align 8 256 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 3 257 // CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP46]], align 8 258 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 4 259 // CHECK1-NEXT: store ptr null, ptr [[TMP47]], align 8 260 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 5 261 // CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP48]], align 8 262 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 6 263 // CHECK1-NEXT: store i32 1, ptr [[TMP49]], align 8 264 // CHECK1-NEXT: [[TMP50:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 265 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4 266 // CHECK1-NEXT: [[TMP52:%.*]] = call ptr @__kmpc_taskred_modifier_init(ptr @[[GLOB2]], i32 [[TMP51]], i32 1, i32 2, ptr [[DOTRD_INPUT_]]) 267 // CHECK1-NEXT: store ptr [[TMP52]], ptr [[DOTTASK_RED_]], align 8 268 // CHECK1-NEXT: [[TMP53:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 269 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, ptr [[TMP53]], align 4 270 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3:[0-9]+]], i32 [[TMP54]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 271 // CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 272 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP55]], 9 273 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 274 // CHECK1: cond.true: 275 // CHECK1-NEXT: br label [[COND_END:%.*]] 276 // CHECK1: cond.false: 277 // CHECK1-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 278 // CHECK1-NEXT: br label [[COND_END]] 279 // CHECK1: cond.end: 280 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP56]], [[COND_FALSE]] ] 281 // CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 282 // CHECK1-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 283 // CHECK1-NEXT: store i64 [[TMP57]], ptr [[DOTOMP_IV]], align 8 284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 285 // CHECK1: omp.inner.for.cond: 286 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 287 // CHECK1-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 288 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP58]], [[TMP59]] 289 // CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 290 // CHECK1: omp.inner.for.cond.cleanup: 291 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 292 // CHECK1: omp.inner.for.body: 293 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 294 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP60]], 1 295 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL]] 296 // CHECK1-NEXT: store i64 [[ADD]], ptr [[I]], align 8 297 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0 298 // CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[TMP61]], align 8 299 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1 300 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP62]], align 8 301 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2 302 // CHECK1-NEXT: [[TMP64:%.*]] = load ptr, ptr [[_TMP5]], align 8 303 // CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP63]], align 8 304 // CHECK1-NEXT: [[TMP65:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 305 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, ptr [[TMP65]], align 4 306 // CHECK1-NEXT: [[TMP67:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB2]], i32 [[TMP66]], i32 1, i64 48, i64 24, ptr @.omp_task_entry.) 307 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP67]], i32 0, i32 0 308 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP68]], i32 0, i32 0 309 // CHECK1-NEXT: [[TMP70:%.*]] = load ptr, ptr [[TMP69]], align 8 310 // CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP70]], ptr align 8 [[AGG_CAPTURED]], i64 24, i1 false) 311 // CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP67]], i32 0, i32 1 312 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP71]], i32 0, i32 0 313 // CHECK1-NEXT: [[TMP73:%.*]] = load ptr, ptr [[DOTTASK_RED_]], align 8 314 // CHECK1-NEXT: store ptr [[TMP73]], ptr [[TMP72]], align 8 315 // CHECK1-NEXT: [[TMP74:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 316 // CHECK1-NEXT: [[TMP75:%.*]] = load i32, ptr [[TMP74]], align 4 317 // CHECK1-NEXT: [[TMP76:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB2]], i32 [[TMP75]], ptr [[TMP67]]) 318 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 319 // CHECK1: omp.body.continue: 320 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 321 // CHECK1: omp.inner.for.inc: 322 // CHECK1-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 323 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP77]], 1 324 // CHECK1-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 8 325 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 326 // CHECK1: omp.inner.for.end: 327 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 328 // CHECK1: omp.loop.exit: 329 // CHECK1-NEXT: [[TMP78:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 330 // CHECK1-NEXT: [[TMP79:%.*]] = load i32, ptr [[TMP78]], align 4 331 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP79]]) 332 // CHECK1-NEXT: [[TMP80:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 333 // CHECK1-NEXT: [[TMP81:%.*]] = load i32, ptr [[TMP80]], align 4 334 // CHECK1-NEXT: call void @__kmpc_task_reduction_modifier_fini(ptr @[[GLOB2]], i32 [[TMP81]], i32 1) 335 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 336 // CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP82]], align 8 337 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 338 // CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP83]], align 8 339 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 340 // CHECK1-NEXT: [[TMP85:%.*]] = inttoptr i64 [[TMP13]] to ptr 341 // CHECK1-NEXT: store ptr [[TMP85]], ptr [[TMP84]], align 8 342 // CHECK1-NEXT: [[TMP86:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 343 // CHECK1-NEXT: [[TMP87:%.*]] = load i32, ptr [[TMP86]], align 4 344 // CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB4:[0-9]+]], i32 [[TMP87]], i32 2, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var) 345 // CHECK1-NEXT: switch i32 [[TMP88]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 346 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 347 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 348 // CHECK1-NEXT: ] 349 // CHECK1: .omp.reduction.case1: 350 // CHECK1-NEXT: [[TMP89:%.*]] = load i32, ptr [[TMP0]], align 4 351 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, ptr [[ARGC1]], align 4 352 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP89]], [[TMP90]] 353 // CHECK1-NEXT: store i32 [[ADD15]], ptr [[TMP0]], align 4 354 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP13]] 355 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP91]] 356 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE22:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 357 // CHECK1: omp.arraycpy.body: 358 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 359 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST16:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY]] ] 360 // CHECK1-NEXT: [[TMP92:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1 361 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP92]] to i32 362 // CHECK1-NEXT: [[TMP93:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 363 // CHECK1-NEXT: [[CONV17:%.*]] = sext i8 [[TMP93]] to i32 364 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV]], [[CONV17]] 365 // CHECK1-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8 366 // CHECK1-NEXT: store i8 [[CONV19]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1 367 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], i32 1 368 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 369 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE21:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP91]] 370 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_BODY]] 371 // CHECK1: omp.arraycpy.done22: 372 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB4]], i32 [[TMP87]], ptr @.gomp_critical_user_.reduction.var) 373 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 374 // CHECK1: .omp.reduction.case2: 375 // CHECK1-NEXT: [[TMP94:%.*]] = load i32, ptr [[ARGC1]], align 4 376 // CHECK1-NEXT: [[TMP95:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP94]] monotonic, align 4 377 // CHECK1-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP13]] 378 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY23:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP96]] 379 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY23]], label [[OMP_ARRAYCPY_DONE36:%.*]], label [[OMP_ARRAYCPY_BODY24:%.*]] 380 // CHECK1: omp.arraycpy.body24: 381 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST25:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT34:%.*]], [[ATOMIC_EXIT:%.*]] ] 382 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST26:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT33:%.*]], [[ATOMIC_EXIT]] ] 383 // CHECK1-NEXT: [[TMP97:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1 384 // CHECK1-NEXT: [[CONV27:%.*]] = sext i8 [[TMP97]] to i32 385 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]] monotonic, align 1 386 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 387 // CHECK1: atomic_cont: 388 // CHECK1-NEXT: [[TMP98:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY24]] ], [ [[TMP103:%.*]], [[ATOMIC_CONT]] ] 389 // CHECK1-NEXT: store i8 [[TMP98]], ptr [[_TMP28]], align 1 390 // CHECK1-NEXT: [[TMP99:%.*]] = load i8, ptr [[_TMP28]], align 1 391 // CHECK1-NEXT: [[CONV29:%.*]] = sext i8 [[TMP99]] to i32 392 // CHECK1-NEXT: [[TMP100:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1 393 // CHECK1-NEXT: [[CONV30:%.*]] = sext i8 [[TMP100]] to i32 394 // CHECK1-NEXT: [[ADD31:%.*]] = add nsw i32 [[CONV29]], [[CONV30]] 395 // CHECK1-NEXT: [[CONV32:%.*]] = trunc i32 [[ADD31]] to i8 396 // CHECK1-NEXT: store i8 [[CONV32]], ptr [[ATOMIC_TEMP]], align 1 397 // CHECK1-NEXT: [[TMP101:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1 398 // CHECK1-NEXT: [[TMP102:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i8 [[TMP98]], i8 [[TMP101]] monotonic monotonic, align 1 399 // CHECK1-NEXT: [[TMP103]] = extractvalue { i8, i1 } [[TMP102]], 0 400 // CHECK1-NEXT: [[TMP104:%.*]] = extractvalue { i8, i1 } [[TMP102]], 1 401 // CHECK1-NEXT: br i1 [[TMP104]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 402 // CHECK1: atomic_exit: 403 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT33]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i32 1 404 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT34]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], i32 1 405 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE35:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT33]], [[TMP96]] 406 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE35]], label [[OMP_ARRAYCPY_DONE36]], label [[OMP_ARRAYCPY_BODY24]] 407 // CHECK1: omp.arraycpy.done36: 408 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 409 // CHECK1: .omp.reduction.default: 410 // CHECK1-NEXT: [[TMP105:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 411 // CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP105]]) 412 // CHECK1-NEXT: ret void 413 // 414 // 415 // CHECK1-LABEL: define {{[^@]+}}@.red_init. 416 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 417 // CHECK1-NEXT: entry: 418 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 419 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 420 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 421 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 422 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 423 // CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4 424 // CHECK1-NEXT: ret void 425 // 426 // 427 // CHECK1-LABEL: define {{[^@]+}}@.red_comb. 428 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 429 // CHECK1-NEXT: entry: 430 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 431 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 432 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 433 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 434 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 435 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 436 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4 437 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4 438 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]] 439 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4 440 // CHECK1-NEXT: ret void 441 // 442 // 443 // CHECK1-LABEL: define {{[^@]+}}@.red_init..1 444 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 445 // CHECK1-NEXT: entry: 446 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 447 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 448 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 449 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 450 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 451 // CHECK1-NEXT: [[TMP3:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}}) 452 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8 453 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP4]] 454 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP5]] 455 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 456 // CHECK1: omp.arrayinit.body: 457 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 458 // CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 459 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 460 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]] 461 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 462 // CHECK1: omp.arrayinit.done: 463 // CHECK1-NEXT: ret void 464 // 465 // 466 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..2 467 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 468 // CHECK1-NEXT: entry: 469 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 470 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 471 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 472 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 473 // CHECK1-NEXT: [[TMP2:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}}) 474 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 475 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8 476 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 477 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP3]] 478 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP4]], [[TMP6]] 479 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 480 // CHECK1: omp.arraycpy.body: 481 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 482 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP4]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 483 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 484 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32 485 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 486 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP8]] to i32 487 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 488 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i8 489 // CHECK1-NEXT: store i8 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 490 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 491 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 492 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 493 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 494 // CHECK1: omp.arraycpy.done4: 495 // CHECK1-NEXT: ret void 496 // 497 // 498 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. 499 // CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { 500 // CHECK1-NEXT: entry: 501 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 502 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 503 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 504 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 505 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 506 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP2]], i32 0, i32 0 507 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 508 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP4]], align 8 509 // CHECK1-NEXT: ret void 510 // 511 // 512 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 513 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 514 // CHECK1-NEXT: entry: 515 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8 517 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8 518 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8 519 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8 520 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8 521 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8 522 // CHECK1-NEXT: [[TMP_I:%.*]] = alloca ptr, align 8 523 // CHECK1-NEXT: [[TMP4_I:%.*]] = alloca ptr, align 8 524 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 525 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 526 // CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4 527 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 528 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4 529 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 530 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0 531 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2 532 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0 533 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 534 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1 535 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 536 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 537 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 538 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 539 // CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]] 540 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]] 541 // CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]] 542 // CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]] 543 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]] 544 // CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]] 545 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]] 546 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]] 547 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]] 548 // CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 549 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META12]] 550 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP9]], i32 0, i32 1 551 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8 552 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP12]], align 8 553 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12]] 554 // CHECK1-NEXT: [[TMP17:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP16]], ptr [[TMP15]], ptr [[TMP14]]) 555 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 556 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8 557 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8 558 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 1 559 // CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8 560 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 561 // CHECK1-NEXT: [[TMP24:%.*]] = sext i32 [[TMP23]] to i64 562 // CHECK1-NEXT: [[LB_ADD_LEN_I:%.*]] = add nsw i64 -1, [[TMP24]] 563 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 564 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8 565 // CHECK1-NEXT: [[ARRAYIDX2_I:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP26]], i64 9 566 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[ARRAYIDX2_I]], align 8 567 // CHECK1-NEXT: [[ARRAYIDX3_I:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP27]], i64 [[LB_ADD_LEN_I]] 568 // CHECK1-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[ARRAYIDX3_I]] to i64 569 // CHECK1-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[TMP20]] to i64 570 // CHECK1-NEXT: [[TMP30:%.*]] = sub i64 [[TMP28]], [[TMP29]] 571 // CHECK1-NEXT: [[TMP31:%.*]] = add nuw i64 [[TMP30]], 1 572 // CHECK1-NEXT: [[TMP32:%.*]] = mul nuw i64 [[TMP31]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64) 573 // CHECK1-NEXT: store i64 [[TMP31]], ptr @{{reduction_size[.].+[.]}}, align 8, !noalias [[META12]] 574 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[TMP12]], align 8 575 // CHECK1-NEXT: [[TMP34:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP16]], ptr [[TMP33]], ptr [[TMP20]]) 576 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2 577 // CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[TMP35]], align 8 578 // CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[TMP36]], align 8 579 // CHECK1-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP37]] to i64 580 // CHECK1-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP20]] to i64 581 // CHECK1-NEXT: [[TMP40:%.*]] = sub i64 [[TMP38]], [[TMP39]] 582 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr [[TMP34]], i64 [[TMP40]] 583 // CHECK1-NEXT: store ptr [[TMP4_I]], ptr [[TMP_I]], align 8, !noalias [[META12]] 584 // CHECK1-NEXT: store ptr [[TMP41]], ptr [[TMP4_I]], align 8, !noalias [[META12]] 585 // CHECK1-NEXT: ret i32 0 586 // 587 // 588 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined.omp.reduction.reduction_func 589 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] { 590 // CHECK1-NEXT: entry: 591 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8 592 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8 593 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8 594 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8 595 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8 596 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8 597 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0 598 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8 599 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0 600 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8 601 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1 602 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8 603 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1 604 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8 605 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2 606 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8 607 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64 608 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP7]], align 4 609 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP5]], align 4 610 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 611 // CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4 612 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP11]], i64 [[TMP14]] 613 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP11]], [[TMP17]] 614 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 615 // CHECK1: omp.arraycpy.body: 616 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 617 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 618 // CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 619 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP18]] to i32 620 // CHECK1-NEXT: [[TMP19:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1 621 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP19]] to i32 622 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 623 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i8 624 // CHECK1-NEXT: store i8 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1 625 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 626 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 627 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP17]] 628 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]] 629 // CHECK1: omp.arraycpy.done5: 630 // CHECK1-NEXT: ret void 631 // 632