1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // add -fopenmp-targets 3 4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 6 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // expected-no-diagnostics 12 #ifndef HEADER 13 #define HEADER 14 15 typedef __INTPTR_TYPE__ intptr_t; 16 17 18 void foo(); 19 20 struct S { 21 intptr_t a, b, c; 22 S(intptr_t a) : a(a) {} 23 operator char() { return a; } 24 ~S() {} 25 }; 26 27 template <typename T> 28 T tmain() { 29 #pragma omp target 30 #pragma omp teams 31 #pragma omp distribute parallel for proc_bind(master) 32 for(int i = 0; i < 1000; i++) {} 33 return T(); 34 } 35 36 int main() { 37 #pragma omp target 38 #pragma omp teams 39 #pragma omp distribute parallel for proc_bind(spread) 40 for(int i = 0; i < 1000; i++) {} 41 #pragma omp target 42 #pragma omp teams 43 #pragma omp distribute parallel for proc_bind(close) 44 for(int i = 0; i < 1000; i++) {} 45 return tmain<int>(); 46 } 47 48 49 50 51 52 53 54 55 #endif 56 // CHECK1-LABEL: define {{[^@]+}}@main 57 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 58 // CHECK1-NEXT: entry: 59 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 60 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 61 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 62 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 63 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 64 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 65 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 66 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 67 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 68 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 69 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 70 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 71 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 72 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 73 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 74 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 75 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 76 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 77 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 78 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 79 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 80 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 81 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 82 // CHECK1-NEXT: store i64 1000, ptr [[TMP8]], align 8 83 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 84 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 85 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 86 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 87 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 88 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 89 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 90 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 91 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.region_id, ptr [[KERNEL_ARGS]]) 92 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 93 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 94 // CHECK1: omp_offload.failed: 95 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37() #[[ATTR2:[0-9]+]] 96 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 97 // CHECK1: omp_offload.cont: 98 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 99 // CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4 100 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 101 // CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4 102 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 103 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 104 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 105 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 106 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 107 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 108 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 109 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 110 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 111 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 112 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 113 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 114 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 115 // CHECK1-NEXT: store i64 1000, ptr [[TMP23]], align 8 116 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 117 // CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8 118 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 119 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4 120 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 121 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4 122 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 123 // CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4 124 // CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.region_id, ptr [[KERNEL_ARGS2]]) 125 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 126 // CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 127 // CHECK1: omp_offload.failed3: 128 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41() #[[ATTR2]] 129 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 130 // CHECK1: omp_offload.cont4: 131 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 132 // CHECK1-NEXT: ret i32 [[CALL]] 133 // 134 // 135 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37 136 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 137 // CHECK1-NEXT: entry: 138 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.omp_outlined) 139 // CHECK1-NEXT: ret void 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.omp_outlined 143 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 146 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 147 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 148 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 151 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 152 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 155 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 156 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 157 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_COMB_UB]], align 4 158 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 159 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 160 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 161 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 162 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 163 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 164 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999 165 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 166 // CHECK1: cond.true: 167 // CHECK1-NEXT: br label [[COND_END:%.*]] 168 // CHECK1: cond.false: 169 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 170 // CHECK1-NEXT: br label [[COND_END]] 171 // CHECK1: cond.end: 172 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 173 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 174 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 175 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 177 // CHECK1: omp.inner.for.cond: 178 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 179 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 180 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 181 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 182 // CHECK1: omp.inner.for.body: 183 // CHECK1-NEXT: call void @__kmpc_push_proc_bind(ptr @[[GLOB3]], i32 [[TMP1]], i32 4) 184 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 185 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 186 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 187 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 188 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 189 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 190 // CHECK1: omp.inner.for.inc: 191 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 192 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 193 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 194 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 195 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 196 // CHECK1: omp.inner.for.end: 197 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 198 // CHECK1: omp.loop.exit: 199 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 200 // CHECK1-NEXT: ret void 201 // 202 // 203 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.omp_outlined.omp_outlined 204 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 205 // CHECK1-NEXT: entry: 206 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 207 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 208 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 209 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 210 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 211 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 214 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 215 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 218 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 219 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 220 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 221 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 222 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_UB]], align 4 223 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 224 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 225 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 226 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 227 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 228 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 229 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 230 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 231 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 232 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 233 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 234 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 235 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999 236 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 237 // CHECK1: cond.true: 238 // CHECK1-NEXT: br label [[COND_END:%.*]] 239 // CHECK1: cond.false: 240 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 241 // CHECK1-NEXT: br label [[COND_END]] 242 // CHECK1: cond.end: 243 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 244 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 245 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 246 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 248 // CHECK1: omp.inner.for.cond: 249 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 250 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 251 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 252 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 253 // CHECK1: omp.inner.for.body: 254 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 255 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 256 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 257 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 258 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 259 // CHECK1: omp.body.continue: 260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 261 // CHECK1: omp.inner.for.inc: 262 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 264 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 265 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 266 // CHECK1: omp.inner.for.end: 267 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 268 // CHECK1: omp.loop.exit: 269 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 270 // CHECK1-NEXT: ret void 271 // 272 // 273 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41 274 // CHECK1-SAME: () #[[ATTR1]] { 275 // CHECK1-NEXT: entry: 276 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.omp_outlined) 277 // CHECK1-NEXT: ret void 278 // 279 // 280 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.omp_outlined 281 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 282 // CHECK1-NEXT: entry: 283 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 284 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 285 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 286 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 287 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 288 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 290 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 291 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 292 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 293 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 294 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 295 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_COMB_UB]], align 4 296 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 297 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 298 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 299 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 300 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 301 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 302 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999 303 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 304 // CHECK1: cond.true: 305 // CHECK1-NEXT: br label [[COND_END:%.*]] 306 // CHECK1: cond.false: 307 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 308 // CHECK1-NEXT: br label [[COND_END]] 309 // CHECK1: cond.end: 310 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 311 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 312 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 313 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 314 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 315 // CHECK1: omp.inner.for.cond: 316 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 317 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 318 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 319 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 320 // CHECK1: omp.inner.for.body: 321 // CHECK1-NEXT: call void @__kmpc_push_proc_bind(ptr @[[GLOB3]], i32 [[TMP1]], i32 3) 322 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 323 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 324 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 325 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 326 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 327 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 328 // CHECK1: omp.inner.for.inc: 329 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 330 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 331 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 332 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 334 // CHECK1: omp.inner.for.end: 335 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 336 // CHECK1: omp.loop.exit: 337 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 338 // CHECK1-NEXT: ret void 339 // 340 // 341 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.omp_outlined.omp_outlined 342 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 343 // CHECK1-NEXT: entry: 344 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 345 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 346 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 347 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 348 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 349 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 351 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 352 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 354 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 355 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 356 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 357 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 358 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 359 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 360 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_UB]], align 4 361 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 362 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 363 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 364 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 365 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 366 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 367 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 368 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 369 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 370 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 371 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 372 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 373 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999 374 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 375 // CHECK1: cond.true: 376 // CHECK1-NEXT: br label [[COND_END:%.*]] 377 // CHECK1: cond.false: 378 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 379 // CHECK1-NEXT: br label [[COND_END]] 380 // CHECK1: cond.end: 381 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 382 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 383 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 384 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 385 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 386 // CHECK1: omp.inner.for.cond: 387 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 388 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 389 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 390 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 391 // CHECK1: omp.inner.for.body: 392 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 393 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 394 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 395 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 396 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 397 // CHECK1: omp.body.continue: 398 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 399 // CHECK1: omp.inner.for.inc: 400 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 401 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 402 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 403 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 404 // CHECK1: omp.inner.for.end: 405 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 406 // CHECK1: omp.loop.exit: 407 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 408 // CHECK1-NEXT: ret void 409 // 410 // 411 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 412 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat { 413 // CHECK1-NEXT: entry: 414 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 415 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 416 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 417 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 418 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 419 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 420 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 421 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 422 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 423 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 424 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 425 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 426 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 427 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 428 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 429 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 430 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 431 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 432 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 433 // CHECK1-NEXT: store i64 1000, ptr [[TMP8]], align 8 434 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 435 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 436 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 437 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 438 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 439 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 440 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 441 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 442 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.region_id, ptr [[KERNEL_ARGS]]) 443 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 444 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 445 // CHECK1: omp_offload.failed: 446 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29() #[[ATTR2]] 447 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 448 // CHECK1: omp_offload.cont: 449 // CHECK1-NEXT: ret i32 0 450 // 451 // 452 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29 453 // CHECK1-SAME: () #[[ATTR1]] { 454 // CHECK1-NEXT: entry: 455 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.omp_outlined) 456 // CHECK1-NEXT: ret void 457 // 458 // 459 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.omp_outlined 460 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 461 // CHECK1-NEXT: entry: 462 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 463 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 464 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 465 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 466 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 467 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 468 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 469 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 470 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 471 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 472 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 473 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 474 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_COMB_UB]], align 4 475 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 476 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 477 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 478 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 479 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 480 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 481 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999 482 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 483 // CHECK1: cond.true: 484 // CHECK1-NEXT: br label [[COND_END:%.*]] 485 // CHECK1: cond.false: 486 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 487 // CHECK1-NEXT: br label [[COND_END]] 488 // CHECK1: cond.end: 489 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 490 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 491 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 492 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 494 // CHECK1: omp.inner.for.cond: 495 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 496 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 497 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 498 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 499 // CHECK1: omp.inner.for.body: 500 // CHECK1-NEXT: call void @__kmpc_push_proc_bind(ptr @[[GLOB3]], i32 [[TMP1]], i32 2) 501 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 502 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 503 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 504 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 505 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 507 // CHECK1: omp.inner.for.inc: 508 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 509 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 511 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 512 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 513 // CHECK1: omp.inner.for.end: 514 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 515 // CHECK1: omp.loop.exit: 516 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 517 // CHECK1-NEXT: ret void 518 // 519 // 520 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.omp_outlined.omp_outlined 521 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 522 // CHECK1-NEXT: entry: 523 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 524 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 525 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 526 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 527 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 528 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 529 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 530 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 531 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 532 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 533 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 534 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 535 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 536 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 537 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 538 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 539 // CHECK1-NEXT: store i32 999, ptr [[DOTOMP_UB]], align 4 540 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 541 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 542 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 543 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 544 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 545 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 546 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 547 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 548 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 549 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 550 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 551 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 552 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999 553 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 554 // CHECK1: cond.true: 555 // CHECK1-NEXT: br label [[COND_END:%.*]] 556 // CHECK1: cond.false: 557 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 558 // CHECK1-NEXT: br label [[COND_END]] 559 // CHECK1: cond.end: 560 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 561 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 562 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 563 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 564 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 565 // CHECK1: omp.inner.for.cond: 566 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 567 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 568 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 569 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 570 // CHECK1: omp.inner.for.body: 571 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 572 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 573 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 574 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 575 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 576 // CHECK1: omp.body.continue: 577 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 578 // CHECK1: omp.inner.for.inc: 579 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 580 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 581 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 582 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 583 // CHECK1: omp.inner.for.end: 584 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 585 // CHECK1: omp.loop.exit: 586 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 587 // CHECK1-NEXT: ret void 588 // 589