1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 13 14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 20 21 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 25 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 26 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 28 29 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s 31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 32 33 // expected-no-diagnostics 34 #ifndef HEADER 35 #define HEADER 36 37 void fn1(); 38 void fn2(); 39 void fn3(); 40 void fn4(); 41 void fn5(); 42 void fn6(); 43 44 int Arg; 45 46 void gtid_test() { 47 #pragma omp target 48 #pragma omp teams 49 #pragma omp distribute parallel for 50 for(int i = 0 ; i < 100; i++) {} 51 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for if (parallel: false) 55 for(int i = 0 ; i < 100; i++) { 56 gtid_test(); 57 } 58 } 59 60 61 template <typename T> 62 int tmain(T Arg) { 63 #pragma omp target 64 #pragma omp teams 65 #pragma omp distribute parallel for if (true) 66 for(int i = 0 ; i < 100; i++) { 67 fn1(); 68 } 69 #pragma omp target 70 #pragma omp teams 71 #pragma omp distribute parallel for if (false) 72 for(int i = 0 ; i < 100; i++) { 73 fn2(); 74 } 75 #pragma omp target 76 #pragma omp teams 77 #pragma omp distribute parallel for if (parallel: Arg) 78 for(int i = 0 ; i < 100; i++) { 79 fn3(); 80 } 81 return 0; 82 } 83 84 int main() { 85 #pragma omp target 86 #pragma omp teams 87 #pragma omp distribute parallel for if (true) 88 for(int i = 0 ; i < 100; i++) { 89 90 91 fn4(); 92 } 93 94 #pragma omp target 95 #pragma omp teams 96 #pragma omp distribute parallel for if (false) 97 for(int i = 0 ; i < 100; i++) { 98 99 100 fn5(); 101 } 102 103 #pragma omp target 104 #pragma omp teams 105 #pragma omp distribute parallel for if (Arg) 106 for(int i = 0 ; i < 100; i++) { 107 108 109 fn6(); 110 } 111 112 return tmain(Arg); 113 } 114 115 116 117 118 119 120 // call void [[T_OUTLINE_FUN_3:@.+]]( 121 122 #endif 123 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv 124 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 125 // CHECK1-NEXT: entry: 126 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 127 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 128 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 129 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 130 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 131 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 132 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 133 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 134 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 135 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 136 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 137 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 138 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 139 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 140 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 141 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 142 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 143 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 144 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 145 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 146 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 147 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 148 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 149 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 150 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 151 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 152 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 153 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 154 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 155 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 156 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, ptr [[KERNEL_ARGS]]) 157 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 158 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 159 // CHECK1: omp_offload.failed: 160 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2:[0-9]+]] 161 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 162 // CHECK1: omp_offload.cont: 163 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 164 // CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4 165 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 166 // CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4 167 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 168 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 169 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 170 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 171 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 172 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 173 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 174 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 175 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 176 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 177 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 178 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 179 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 180 // CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 8 181 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 182 // CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8 183 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 184 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4 185 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 186 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4 187 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 188 // CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4 189 // CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.region_id, ptr [[KERNEL_ARGS2]]) 190 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 191 // CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 192 // CHECK1: omp_offload.failed3: 193 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52() #[[ATTR2]] 194 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 195 // CHECK1: omp_offload.cont4: 196 // CHECK1-NEXT: ret void 197 // 198 // 199 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47 200 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] { 201 // CHECK1-NEXT: entry: 202 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined) 203 // CHECK1-NEXT: ret void 204 // 205 // 206 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined 207 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 208 // CHECK1-NEXT: entry: 209 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 210 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 211 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 213 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 214 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 215 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 219 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 220 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 221 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 222 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 223 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 224 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 225 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 226 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 227 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 228 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 229 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 230 // CHECK1: cond.true: 231 // CHECK1-NEXT: br label [[COND_END:%.*]] 232 // CHECK1: cond.false: 233 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 234 // CHECK1-NEXT: br label [[COND_END]] 235 // CHECK1: cond.end: 236 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 237 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 238 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 239 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 240 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 241 // CHECK1: omp.inner.for.cond: 242 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 243 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 244 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 245 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 246 // CHECK1: omp.inner.for.body: 247 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 248 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 249 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 250 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 251 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 252 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 253 // CHECK1: omp.inner.for.inc: 254 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 255 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 256 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 257 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 258 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 259 // CHECK1: omp.inner.for.end: 260 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 261 // CHECK1: omp.loop.exit: 262 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 263 // CHECK1-NEXT: ret void 264 // 265 // 266 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.omp_outlined.omp_outlined 267 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 268 // CHECK1-NEXT: entry: 269 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 270 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 271 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 272 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 273 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 274 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 275 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 276 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 277 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 278 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 279 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 280 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 281 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 282 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 283 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 284 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 285 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 286 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 287 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 288 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 289 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 290 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 291 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 292 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 293 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 294 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 295 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 296 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 297 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 298 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 299 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 300 // CHECK1: cond.true: 301 // CHECK1-NEXT: br label [[COND_END:%.*]] 302 // CHECK1: cond.false: 303 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 304 // CHECK1-NEXT: br label [[COND_END]] 305 // CHECK1: cond.end: 306 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 307 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 308 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 309 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 310 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 311 // CHECK1: omp.inner.for.cond: 312 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 313 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 314 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 315 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 316 // CHECK1: omp.inner.for.body: 317 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 318 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 319 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 320 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 321 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 322 // CHECK1: omp.body.continue: 323 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 324 // CHECK1: omp.inner.for.inc: 325 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 326 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 327 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 328 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 329 // CHECK1: omp.inner.for.end: 330 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 331 // CHECK1: omp.loop.exit: 332 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 333 // CHECK1-NEXT: ret void 334 // 335 // 336 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52 337 // CHECK1-SAME: () #[[ATTR1]] { 338 // CHECK1-NEXT: entry: 339 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.omp_outlined) 340 // CHECK1-NEXT: ret void 341 // 342 // 343 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.omp_outlined 344 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 345 // CHECK1-NEXT: entry: 346 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 347 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 348 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 349 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 350 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 351 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 352 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 353 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 354 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 355 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 356 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 357 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 358 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 359 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 360 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 361 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 362 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 363 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 364 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 365 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 366 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 367 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 368 // CHECK1: cond.true: 369 // CHECK1-NEXT: br label [[COND_END:%.*]] 370 // CHECK1: cond.false: 371 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 372 // CHECK1-NEXT: br label [[COND_END]] 373 // CHECK1: cond.end: 374 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 375 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 376 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 377 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 378 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 379 // CHECK1: omp.inner.for.cond: 380 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 381 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 382 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 383 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 384 // CHECK1: omp.inner.for.body: 385 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 386 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 387 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 388 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 389 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 390 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 391 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 392 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 393 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 394 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 395 // CHECK1: omp.inner.for.inc: 396 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 397 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 398 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 399 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 401 // CHECK1: omp.inner.for.end: 402 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 403 // CHECK1: omp.loop.exit: 404 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 405 // CHECK1-NEXT: ret void 406 // 407 // 408 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l52.omp_outlined.omp_outlined 409 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 410 // CHECK1-NEXT: entry: 411 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 412 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 413 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 414 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 415 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 416 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 417 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 418 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 419 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 420 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 421 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 422 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 423 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 424 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 425 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 426 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 427 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 428 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 429 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 430 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 431 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 432 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 433 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 434 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 435 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 436 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 437 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 438 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 439 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 440 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 441 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 442 // CHECK1: cond.true: 443 // CHECK1-NEXT: br label [[COND_END:%.*]] 444 // CHECK1: cond.false: 445 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 446 // CHECK1-NEXT: br label [[COND_END]] 447 // CHECK1: cond.end: 448 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 449 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 450 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 451 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 452 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 453 // CHECK1: omp.inner.for.cond: 454 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 455 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 456 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 457 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 458 // CHECK1: omp.inner.for.body: 459 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 460 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 461 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 462 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 463 // CHECK1-NEXT: call void @_Z9gtid_testv() 464 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 465 // CHECK1: omp.body.continue: 466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 467 // CHECK1: omp.inner.for.inc: 468 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 469 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 470 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 471 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 472 // CHECK1: omp.inner.for.end: 473 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 474 // CHECK1: omp.loop.exit: 475 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 476 // CHECK1-NEXT: ret void 477 // 478 // 479 // CHECK1-LABEL: define {{[^@]+}}@main 480 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 481 // CHECK1-NEXT: entry: 482 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 483 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 484 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 485 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 486 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 487 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 488 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 489 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 490 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 491 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4 492 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 493 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 494 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 495 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 496 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 497 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 498 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 499 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 500 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 501 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 502 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 503 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 504 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 505 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 506 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 507 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 508 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 509 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 510 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 511 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 512 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 513 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 514 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 515 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 516 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 517 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 518 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 519 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 520 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.region_id, ptr [[KERNEL_ARGS]]) 521 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 522 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 523 // CHECK1: omp_offload.failed: 524 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]] 525 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 526 // CHECK1: omp_offload.cont: 527 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 528 // CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4 529 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 530 // CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4 531 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 532 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 533 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 534 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 535 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 536 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 537 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 538 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 539 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 540 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 541 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 542 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 543 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 544 // CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 8 545 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 546 // CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8 547 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 548 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4 549 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 550 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4 551 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 552 // CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4 553 // CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS2]]) 554 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 555 // CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 556 // CHECK1: omp_offload.failed3: 557 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94() #[[ATTR2]] 558 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 559 // CHECK1: omp_offload.cont4: 560 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr @Arg, align 4 561 // CHECK1-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4 562 // CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 563 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 564 // CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 8 565 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 566 // CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 8 567 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 568 // CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8 569 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 570 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 571 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0 572 // CHECK1-NEXT: store i32 3, ptr [[TMP37]], align 4 573 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1 574 // CHECK1-NEXT: store i32 1, ptr [[TMP38]], align 4 575 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2 576 // CHECK1-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 8 577 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3 578 // CHECK1-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 8 579 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4 580 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP41]], align 8 581 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5 582 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP42]], align 8 583 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6 584 // CHECK1-NEXT: store ptr null, ptr [[TMP43]], align 8 585 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7 586 // CHECK1-NEXT: store ptr null, ptr [[TMP44]], align 8 587 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8 588 // CHECK1-NEXT: store i64 100, ptr [[TMP45]], align 8 589 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9 590 // CHECK1-NEXT: store i64 0, ptr [[TMP46]], align 8 591 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10 592 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4 593 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11 594 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4 595 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12 596 // CHECK1-NEXT: store i32 0, ptr [[TMP49]], align 4 597 // CHECK1-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, ptr [[KERNEL_ARGS6]]) 598 // CHECK1-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0 599 // CHECK1-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 600 // CHECK1: omp_offload.failed7: 601 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP31]]) #[[ATTR2]] 602 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 603 // CHECK1: omp_offload.cont8: 604 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, ptr @Arg, align 4 605 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]]) 606 // CHECK1-NEXT: ret i32 [[CALL]] 607 // 608 // 609 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85 610 // CHECK1-SAME: () #[[ATTR1]] { 611 // CHECK1-NEXT: entry: 612 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined) 613 // CHECK1-NEXT: ret void 614 // 615 // 616 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined 617 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 618 // CHECK1-NEXT: entry: 619 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 620 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 621 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 622 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 623 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 624 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 625 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 626 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 627 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 628 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 629 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 630 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 631 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 632 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 633 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 634 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 635 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 636 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 637 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 638 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 639 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 640 // CHECK1: cond.true: 641 // CHECK1-NEXT: br label [[COND_END:%.*]] 642 // CHECK1: cond.false: 643 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 644 // CHECK1-NEXT: br label [[COND_END]] 645 // CHECK1: cond.end: 646 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 647 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 648 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 649 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 651 // CHECK1: omp.inner.for.cond: 652 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 653 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 654 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 655 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 656 // CHECK1: omp.inner.for.body: 657 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 658 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 659 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 660 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 661 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 662 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 663 // CHECK1: omp.inner.for.inc: 664 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 665 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 666 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 667 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 669 // CHECK1: omp.inner.for.end: 670 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 671 // CHECK1: omp.loop.exit: 672 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 673 // CHECK1-NEXT: ret void 674 // 675 // 676 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85.omp_outlined.omp_outlined 677 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 678 // CHECK1-NEXT: entry: 679 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 680 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 681 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 682 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 683 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 684 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 685 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 686 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 687 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 688 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 689 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 690 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 691 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 692 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 693 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 694 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 695 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 696 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 697 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 698 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 699 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 700 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 701 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 702 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 703 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 704 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 705 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 706 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 707 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 708 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 709 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 710 // CHECK1: cond.true: 711 // CHECK1-NEXT: br label [[COND_END:%.*]] 712 // CHECK1: cond.false: 713 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 714 // CHECK1-NEXT: br label [[COND_END]] 715 // CHECK1: cond.end: 716 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 717 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 718 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 719 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 720 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 721 // CHECK1: omp.inner.for.cond: 722 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 723 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 724 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 725 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 726 // CHECK1: omp.inner.for.body: 727 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 728 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 729 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 730 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 731 // CHECK1-NEXT: call void @_Z3fn4v() 732 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 733 // CHECK1: omp.body.continue: 734 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 735 // CHECK1: omp.inner.for.inc: 736 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 737 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 738 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 739 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 740 // CHECK1: omp.inner.for.end: 741 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 742 // CHECK1: omp.loop.exit: 743 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 744 // CHECK1-NEXT: ret void 745 // 746 // 747 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 748 // CHECK1-SAME: () #[[ATTR1]] { 749 // CHECK1-NEXT: entry: 750 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined) 751 // CHECK1-NEXT: ret void 752 // 753 // 754 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined 755 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 756 // CHECK1-NEXT: entry: 757 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 758 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 759 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 760 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 761 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 762 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 763 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 764 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 765 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 766 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 767 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 768 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 769 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 770 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 771 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 772 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 773 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 774 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 775 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 776 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 777 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 778 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 779 // CHECK1: cond.true: 780 // CHECK1-NEXT: br label [[COND_END:%.*]] 781 // CHECK1: cond.false: 782 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 783 // CHECK1-NEXT: br label [[COND_END]] 784 // CHECK1: cond.end: 785 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 786 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 787 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 788 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 789 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 790 // CHECK1: omp.inner.for.cond: 791 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 792 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 793 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 794 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 795 // CHECK1: omp.inner.for.body: 796 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 797 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 798 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 799 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 800 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 801 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 802 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 803 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 804 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 805 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 806 // CHECK1: omp.inner.for.inc: 807 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 808 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 809 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 810 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 811 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 812 // CHECK1: omp.inner.for.end: 813 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 814 // CHECK1: omp.loop.exit: 815 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 816 // CHECK1-NEXT: ret void 817 // 818 // 819 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined.omp_outlined 820 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 821 // CHECK1-NEXT: entry: 822 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 823 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 824 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 825 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 826 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 827 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 828 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 829 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 830 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 831 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 832 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 833 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 834 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 835 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 836 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 837 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 838 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 839 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 840 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 841 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 842 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 843 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 844 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 845 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 846 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 847 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 848 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 849 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 850 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 851 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 852 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 853 // CHECK1: cond.true: 854 // CHECK1-NEXT: br label [[COND_END:%.*]] 855 // CHECK1: cond.false: 856 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 857 // CHECK1-NEXT: br label [[COND_END]] 858 // CHECK1: cond.end: 859 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 860 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 861 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 862 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 863 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 864 // CHECK1: omp.inner.for.cond: 865 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 866 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 867 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 868 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 869 // CHECK1: omp.inner.for.body: 870 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 871 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 872 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 873 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 874 // CHECK1-NEXT: call void @_Z3fn5v() 875 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 876 // CHECK1: omp.body.continue: 877 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 878 // CHECK1: omp.inner.for.inc: 879 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 880 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 881 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 882 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 883 // CHECK1: omp.inner.for.end: 884 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 885 // CHECK1: omp.loop.exit: 886 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 887 // CHECK1-NEXT: ret void 888 // 889 // 890 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 891 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 892 // CHECK1-NEXT: entry: 893 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 894 // CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 895 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined, ptr [[ARG_ADDR]]) 896 // CHECK1-NEXT: ret void 897 // 898 // 899 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined 900 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 901 // CHECK1-NEXT: entry: 902 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 903 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 904 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 8 905 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 907 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 908 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 909 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 910 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 911 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 912 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 913 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 914 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 915 // CHECK1-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 8 916 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8 917 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 918 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 919 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 920 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 921 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 922 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 923 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 924 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 925 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 926 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 927 // CHECK1: cond.true: 928 // CHECK1-NEXT: br label [[COND_END:%.*]] 929 // CHECK1: cond.false: 930 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 931 // CHECK1-NEXT: br label [[COND_END]] 932 // CHECK1: cond.end: 933 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 934 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 935 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 936 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 937 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 938 // CHECK1: omp.inner.for.cond: 939 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 940 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 941 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 942 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 943 // CHECK1: omp.inner.for.body: 944 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 945 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 946 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 947 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 948 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4 949 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 950 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 951 // CHECK1: omp_if.then: 952 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]) 953 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 954 // CHECK1: omp_if.else: 955 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]) 956 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 957 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 958 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 959 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]) 960 // CHECK1-NEXT: br label [[OMP_IF_END]] 961 // CHECK1: omp_if.end: 962 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 963 // CHECK1: omp.inner.for.inc: 964 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 965 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 966 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 967 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 968 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 969 // CHECK1: omp.inner.for.end: 970 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 971 // CHECK1: omp.loop.exit: 972 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 973 // CHECK1-NEXT: ret void 974 // 975 // 976 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined.omp_outlined 977 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 978 // CHECK1-NEXT: entry: 979 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 980 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 981 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 982 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 983 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 984 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 985 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 986 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 991 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 992 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 993 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 994 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 995 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 996 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 997 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 998 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 999 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1000 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1001 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1002 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1003 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1004 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1005 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1006 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1007 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1008 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1009 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1010 // CHECK1: cond.true: 1011 // CHECK1-NEXT: br label [[COND_END:%.*]] 1012 // CHECK1: cond.false: 1013 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1014 // CHECK1-NEXT: br label [[COND_END]] 1015 // CHECK1: cond.end: 1016 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1017 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1018 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1019 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1021 // CHECK1: omp.inner.for.cond: 1022 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1023 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1024 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1025 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1026 // CHECK1: omp.inner.for.body: 1027 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1028 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1029 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1030 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1031 // CHECK1-NEXT: call void @_Z3fn6v() 1032 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1033 // CHECK1: omp.body.continue: 1034 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1035 // CHECK1: omp.inner.for.inc: 1036 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1037 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1038 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1039 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1040 // CHECK1: omp.inner.for.end: 1041 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1042 // CHECK1: omp.loop.exit: 1043 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1044 // CHECK1-NEXT: ret void 1045 // 1046 // 1047 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_ 1048 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat { 1049 // CHECK1-NEXT: entry: 1050 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1053 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1054 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1055 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8 1056 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 1057 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 1058 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 1059 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4 1060 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8 1061 // CHECK1-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 4 1062 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1063 // CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4 1064 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1065 // CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4 1066 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1067 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 1068 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1069 // CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8 1070 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1071 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8 1072 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1073 // CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8 1074 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1075 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8 1076 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1077 // CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8 1078 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1079 // CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8 1080 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1081 // CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8 1082 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1083 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4 1084 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1085 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4 1086 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1087 // CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4 1088 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.region_id, ptr [[KERNEL_ARGS]]) 1089 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1090 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1091 // CHECK1: omp_offload.failed: 1092 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63() #[[ATTR2]] 1093 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 1094 // CHECK1: omp_offload.cont: 1095 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0 1096 // CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4 1097 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1 1098 // CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4 1099 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2 1100 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8 1101 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3 1102 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8 1103 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4 1104 // CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8 1105 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5 1106 // CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8 1107 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6 1108 // CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8 1109 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7 1110 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8 1111 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8 1112 // CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 8 1113 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9 1114 // CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8 1115 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10 1116 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4 1117 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11 1118 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4 1119 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12 1120 // CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4 1121 // CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.region_id, ptr [[KERNEL_ARGS2]]) 1122 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 1123 // CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]] 1124 // CHECK1: omp_offload.failed3: 1125 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69() #[[ATTR2]] 1126 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]] 1127 // CHECK1: omp_offload.cont4: 1128 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4 1129 // CHECK1-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4 1130 // CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8 1131 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1132 // CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 8 1133 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1134 // CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 8 1135 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1136 // CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8 1137 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1138 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1139 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0 1140 // CHECK1-NEXT: store i32 3, ptr [[TMP37]], align 4 1141 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1 1142 // CHECK1-NEXT: store i32 1, ptr [[TMP38]], align 4 1143 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2 1144 // CHECK1-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 8 1145 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3 1146 // CHECK1-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 8 1147 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4 1148 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP41]], align 8 1149 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5 1150 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP42]], align 8 1151 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6 1152 // CHECK1-NEXT: store ptr null, ptr [[TMP43]], align 8 1153 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7 1154 // CHECK1-NEXT: store ptr null, ptr [[TMP44]], align 8 1155 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8 1156 // CHECK1-NEXT: store i64 100, ptr [[TMP45]], align 8 1157 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9 1158 // CHECK1-NEXT: store i64 0, ptr [[TMP46]], align 8 1159 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10 1160 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4 1161 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11 1162 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4 1163 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12 1164 // CHECK1-NEXT: store i32 0, ptr [[TMP49]], align 4 1165 // CHECK1-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.region_id, ptr [[KERNEL_ARGS6]]) 1166 // CHECK1-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0 1167 // CHECK1-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1168 // CHECK1: omp_offload.failed7: 1169 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75(i64 [[TMP31]]) #[[ATTR2]] 1170 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1171 // CHECK1: omp_offload.cont8: 1172 // CHECK1-NEXT: ret i32 0 1173 // 1174 // 1175 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63 1176 // CHECK1-SAME: () #[[ATTR1]] { 1177 // CHECK1-NEXT: entry: 1178 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.omp_outlined) 1179 // CHECK1-NEXT: ret void 1180 // 1181 // 1182 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.omp_outlined 1183 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1184 // CHECK1-NEXT: entry: 1185 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1186 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1187 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1188 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1189 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1190 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1191 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1192 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1193 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1194 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1195 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1196 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1197 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1198 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1199 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1200 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1201 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1202 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1203 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1204 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1205 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1206 // CHECK1: cond.true: 1207 // CHECK1-NEXT: br label [[COND_END:%.*]] 1208 // CHECK1: cond.false: 1209 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1210 // CHECK1-NEXT: br label [[COND_END]] 1211 // CHECK1: cond.end: 1212 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1213 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1214 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1215 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1217 // CHECK1: omp.inner.for.cond: 1218 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1219 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1220 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1221 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1222 // CHECK1: omp.inner.for.body: 1223 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1224 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1225 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1226 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1227 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]) 1228 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1229 // CHECK1: omp.inner.for.inc: 1230 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1231 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1232 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1233 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1234 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1235 // CHECK1: omp.inner.for.end: 1236 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1237 // CHECK1: omp.loop.exit: 1238 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1239 // CHECK1-NEXT: ret void 1240 // 1241 // 1242 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l63.omp_outlined.omp_outlined 1243 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1244 // CHECK1-NEXT: entry: 1245 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1246 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1247 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1248 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1249 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1250 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1251 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1252 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1253 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1254 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1255 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1256 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1257 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1258 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1259 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1260 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1261 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1262 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1263 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1264 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1265 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1266 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1267 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1268 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1269 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1270 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1271 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1272 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1273 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1274 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1275 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1276 // CHECK1: cond.true: 1277 // CHECK1-NEXT: br label [[COND_END:%.*]] 1278 // CHECK1: cond.false: 1279 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1280 // CHECK1-NEXT: br label [[COND_END]] 1281 // CHECK1: cond.end: 1282 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1283 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1284 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1285 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1286 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1287 // CHECK1: omp.inner.for.cond: 1288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1289 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1290 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1291 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1292 // CHECK1: omp.inner.for.body: 1293 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1294 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1295 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1296 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1297 // CHECK1-NEXT: call void @_Z3fn1v() 1298 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1299 // CHECK1: omp.body.continue: 1300 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1301 // CHECK1: omp.inner.for.inc: 1302 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1303 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1304 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1305 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1306 // CHECK1: omp.inner.for.end: 1307 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1308 // CHECK1: omp.loop.exit: 1309 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1310 // CHECK1-NEXT: ret void 1311 // 1312 // 1313 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69 1314 // CHECK1-SAME: () #[[ATTR1]] { 1315 // CHECK1-NEXT: entry: 1316 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.omp_outlined) 1317 // CHECK1-NEXT: ret void 1318 // 1319 // 1320 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.omp_outlined 1321 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { 1322 // CHECK1-NEXT: entry: 1323 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1324 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1325 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1326 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1327 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1328 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1329 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1330 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1331 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1332 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1333 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1334 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1335 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1336 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1337 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1338 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1339 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1340 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4 1341 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1342 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1343 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1344 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1345 // CHECK1: cond.true: 1346 // CHECK1-NEXT: br label [[COND_END:%.*]] 1347 // CHECK1: cond.false: 1348 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1349 // CHECK1-NEXT: br label [[COND_END]] 1350 // CHECK1: cond.end: 1351 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1352 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1353 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1354 // CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4 1355 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1356 // CHECK1: omp.inner.for.cond: 1357 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1358 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1359 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1360 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1361 // CHECK1: omp.inner.for.body: 1362 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1363 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1364 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1365 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1366 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 1367 // CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1368 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1369 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]] 1370 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]) 1371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1372 // CHECK1: omp.inner.for.inc: 1373 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1374 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1375 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1376 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1377 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1378 // CHECK1: omp.inner.for.end: 1379 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1380 // CHECK1: omp.loop.exit: 1381 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]]) 1382 // CHECK1-NEXT: ret void 1383 // 1384 // 1385 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l69.omp_outlined.omp_outlined 1386 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1387 // CHECK1-NEXT: entry: 1388 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1389 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1390 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1391 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1392 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1393 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1394 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1395 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1396 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1397 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1398 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1399 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1400 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1401 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1402 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1403 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1404 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1405 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1406 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1407 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1408 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1409 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1410 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1411 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1412 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1413 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1414 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1415 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1416 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1417 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1418 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1419 // CHECK1: cond.true: 1420 // CHECK1-NEXT: br label [[COND_END:%.*]] 1421 // CHECK1: cond.false: 1422 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1423 // CHECK1-NEXT: br label [[COND_END]] 1424 // CHECK1: cond.end: 1425 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1426 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1427 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1428 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1429 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1430 // CHECK1: omp.inner.for.cond: 1431 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1432 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1433 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1434 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1435 // CHECK1: omp.inner.for.body: 1436 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1437 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1438 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1439 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1440 // CHECK1-NEXT: call void @_Z3fn2v() 1441 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1442 // CHECK1: omp.body.continue: 1443 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1444 // CHECK1: omp.inner.for.inc: 1445 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1446 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1447 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1448 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1449 // CHECK1: omp.inner.for.end: 1450 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1451 // CHECK1: omp.loop.exit: 1452 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1453 // CHECK1-NEXT: ret void 1454 // 1455 // 1456 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75 1457 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] { 1458 // CHECK1-NEXT: entry: 1459 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8 1460 // CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8 1461 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.omp_outlined, ptr [[ARG_ADDR]]) 1462 // CHECK1-NEXT: ret void 1463 // 1464 // 1465 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.omp_outlined 1466 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] { 1467 // CHECK1-NEXT: entry: 1468 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1469 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1470 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 8 1471 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1472 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1473 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1474 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1475 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1476 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1477 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1478 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1479 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1480 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1481 // CHECK1-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 8 1482 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8 1483 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4 1484 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4 1485 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1486 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1487 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1488 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1489 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1490 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1491 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1492 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1493 // CHECK1: cond.true: 1494 // CHECK1-NEXT: br label [[COND_END:%.*]] 1495 // CHECK1: cond.false: 1496 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1497 // CHECK1-NEXT: br label [[COND_END]] 1498 // CHECK1: cond.end: 1499 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1500 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4 1501 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1502 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1503 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1504 // CHECK1: omp.inner.for.cond: 1505 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1506 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1507 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1508 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1509 // CHECK1: omp.inner.for.body: 1510 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4 1511 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1512 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4 1513 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1514 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4 1515 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 1516 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1517 // CHECK1: omp_if.then: 1518 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]) 1519 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 1520 // CHECK1: omp_if.else: 1521 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]) 1522 // CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1523 // CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4 1524 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]] 1525 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]) 1526 // CHECK1-NEXT: br label [[OMP_IF_END]] 1527 // CHECK1: omp_if.end: 1528 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1529 // CHECK1: omp.inner.for.inc: 1530 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1531 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4 1532 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1533 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4 1534 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1535 // CHECK1: omp.inner.for.end: 1536 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1537 // CHECK1: omp.loop.exit: 1538 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1539 // CHECK1-NEXT: ret void 1540 // 1541 // 1542 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l75.omp_outlined.omp_outlined 1543 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { 1544 // CHECK1-NEXT: entry: 1545 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 1546 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 1547 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1548 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1549 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1550 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1551 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1552 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1553 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1554 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1555 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1556 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 1557 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 1558 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1559 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1560 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1561 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4 1562 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8 1563 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1564 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8 1565 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1566 // CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4 1567 // CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4 1568 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1569 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1570 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1571 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 1572 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1573 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1574 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1575 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1576 // CHECK1: cond.true: 1577 // CHECK1-NEXT: br label [[COND_END:%.*]] 1578 // CHECK1: cond.false: 1579 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1580 // CHECK1-NEXT: br label [[COND_END]] 1581 // CHECK1: cond.end: 1582 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1583 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1584 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1585 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4 1586 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1587 // CHECK1: omp.inner.for.cond: 1588 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1589 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1590 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1591 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1592 // CHECK1: omp.inner.for.body: 1593 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1594 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1595 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1596 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1597 // CHECK1-NEXT: call void @_Z3fn3v() 1598 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1599 // CHECK1: omp.body.continue: 1600 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1601 // CHECK1: omp.inner.for.inc: 1602 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1603 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1604 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4 1605 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1606 // CHECK1: omp.inner.for.end: 1607 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1608 // CHECK1: omp.loop.exit: 1609 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]]) 1610 // CHECK1-NEXT: ret void 1611 // 1612