1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11 22 23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 29 // expected-no-diagnostics 30 #ifndef HEADER 31 #define HEADER 32 33 template <class T> 34 struct S { 35 T f; 36 S(T a) : f(a) {} 37 S() : f() {} 38 operator T() { return T(); } 39 ~S() {} 40 }; 41 42 template <typename T> 43 T tmain() { 44 S<T> test; 45 T t_var = T(); 46 T vec[] = {1, 2}; 47 S<T> s_arr[] = {1, 2}; 48 S<T> &var = test; 49 #pragma omp target 50 #pragma omp teams 51 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var) 52 for (int i = 0; i < 2; ++i) { 53 vec[i] = t_var; 54 s_arr[i] = var; 55 } 56 return T(); 57 } 58 59 int main() { 60 static int svar; 61 volatile double g; 62 volatile double &g1 = g; 63 64 #ifdef LAMBDA 65 [&]() { 66 static float sfvar; 67 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute firstprivate(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 // Private alloca's for conversion 73 74 // Actual private variables to be used in the body (tmp is used for the reference type) 75 76 // Store input parameter addresses into private alloca's for conversion 77 78 g += 1; 79 g1 += 1; 80 svar += 3; 81 sfvar += 4.0; 82 83 // call inner lambda (use refs to private alloca's) 84 [&]() { 85 g += 2; 86 g1 += 2; 87 svar += 4; 88 sfvar += 8.0; 89 90 91 92 }(); 93 } 94 }(); 95 return 0; 96 #else 97 S<float> test; 98 int t_var = 0; 99 int vec[] = {1, 2}; 100 S<float> s_arr[] = {1, 2}; 101 S<float> &var = test; 102 103 #pragma omp target 104 #pragma omp teams 105 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var, svar) 106 for (int i = 0; i < 2; ++i) { 107 vec[i] = t_var; 108 s_arr[i] = var; 109 } 110 return tmain<int>(); 111 #endif 112 } 113 114 115 116 117 // discard omp loop variables 118 119 120 121 // init t_var 122 123 // init vec 124 125 // init s_arr 126 127 128 // init var 129 130 // init svar 131 132 133 134 // Template 135 136 137 138 // discard omp loop variables 139 140 141 142 // init t_var 143 144 // init vec 145 146 // init s_arr 147 148 149 // init var 150 151 152 #endif 153 // CHECK1-LABEL: define {{[^@]+}}@main 154 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 155 // CHECK1-NEXT: entry: 156 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 157 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8 158 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8 159 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8 160 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4 161 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8 162 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 163 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8 164 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 165 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8 166 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8 167 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]]) 168 // CHECK1-NEXT: ret i32 0 169 // 170 // 171 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 172 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 173 // CHECK1-NEXT: entry: 174 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8 175 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8 176 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 177 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8 178 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 179 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8 180 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8 181 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 182 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 183 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8 184 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8 185 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]]) 186 // CHECK1-NEXT: ret void 187 // 188 // 189 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 190 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 191 // CHECK1-NEXT: entry: 192 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 193 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 194 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8 195 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 8 196 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8 197 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 8 198 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8 199 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 200 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 201 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 202 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 203 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 204 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 205 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 206 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8 207 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8 208 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8 209 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 210 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 211 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 212 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 213 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 214 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 215 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8 216 // CHECK1-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 8 217 // CHECK1-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8 218 // CHECK1-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8 219 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8 220 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8 221 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8 222 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8 223 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8 224 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 225 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8 226 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 227 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 228 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 229 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 230 // CHECK1-NEXT: [[TMP5:%.*]] = load volatile double, ptr [[TMP0]], align 8 231 // CHECK1-NEXT: store double [[TMP5]], ptr [[G3]], align 8 232 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8 233 // CHECK1-NEXT: [[TMP7:%.*]] = load volatile double, ptr [[TMP6]], align 8 234 // CHECK1-NEXT: store double [[TMP7]], ptr [[G14]], align 8 235 // CHECK1-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 8 236 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4 237 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[SVAR6]], align 4 238 // CHECK1-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP3]], align 4 239 // CHECK1-NEXT: store float [[TMP9]], ptr [[SFVAR7]], align 4 240 // CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 241 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 242 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 243 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 244 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 245 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 246 // CHECK1: cond.true: 247 // CHECK1-NEXT: br label [[COND_END:%.*]] 248 // CHECK1: cond.false: 249 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 250 // CHECK1-NEXT: br label [[COND_END]] 251 // CHECK1: cond.end: 252 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 253 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 254 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 255 // CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 256 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 257 // CHECK1: omp.inner.for.cond: 258 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 259 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 260 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 261 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 262 // CHECK1: omp.inner.for.body: 263 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 264 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 265 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 266 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 267 // CHECK1-NEXT: [[TMP18:%.*]] = load double, ptr [[G3]], align 8 268 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 269 // CHECK1-NEXT: store double [[ADD9]], ptr [[G3]], align 8 270 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 8 271 // CHECK1-NEXT: [[TMP20:%.*]] = load volatile double, ptr [[TMP19]], align 8 272 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 273 // CHECK1-NEXT: store volatile double [[ADD10]], ptr [[TMP19]], align 8 274 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[SVAR6]], align 4 275 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 276 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[SVAR6]], align 4 277 // CHECK1-NEXT: [[TMP22:%.*]] = load float, ptr [[SFVAR7]], align 4 278 // CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 279 // CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 280 // CHECK1-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 281 // CHECK1-NEXT: store float [[CONV13]], ptr [[SFVAR7]], align 4 282 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 283 // CHECK1-NEXT: store ptr [[G3]], ptr [[TMP23]], align 8 284 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 285 // CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP5]], align 8 286 // CHECK1-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8 287 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 288 // CHECK1-NEXT: store ptr [[SVAR6]], ptr [[TMP26]], align 8 289 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 290 // CHECK1-NEXT: store ptr [[SFVAR7]], ptr [[TMP27]], align 8 291 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 292 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 293 // CHECK1: omp.body.continue: 294 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 295 // CHECK1: omp.inner.for.inc: 296 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 297 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 298 // CHECK1-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV]], align 4 299 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 300 // CHECK1: omp.inner.for.end: 301 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 302 // CHECK1: omp.loop.exit: 303 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP11]]) 304 // CHECK1-NEXT: ret void 305 // 306 // 307 // CHECK3-LABEL: define {{[^@]+}}@main 308 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 309 // CHECK3-NEXT: entry: 310 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 311 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 312 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4 313 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4 314 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4 315 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4 316 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0 317 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4 318 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1 319 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4 320 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4 321 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]]) 322 // CHECK3-NEXT: ret i32 0 323 // 324 // 325 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 326 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] { 327 // CHECK3-NEXT: entry: 328 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 329 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 330 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 331 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4 332 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 333 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8 334 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8 335 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4 336 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 337 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 338 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 339 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 340 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 341 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 342 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 343 // CHECK3-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8 344 // CHECK3-NEXT: store double [[TMP2]], ptr [[G2]], align 8 345 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 346 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4 347 // CHECK3-NEXT: store double [[TMP4]], ptr [[G13]], align 8 348 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4 349 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4 350 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]]) 351 // CHECK3-NEXT: ret void 352 // 353 // 354 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined 355 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] { 356 // CHECK3-NEXT: entry: 357 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 358 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 359 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4 360 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4 361 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4 362 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 4 363 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4 364 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 365 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 366 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 367 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 368 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 369 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 370 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 371 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8 372 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8 373 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca ptr, align 4 374 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4 375 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4 376 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 377 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4 378 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 379 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 380 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4 381 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4 382 // CHECK3-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4 383 // CHECK3-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4 384 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4 385 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4 386 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4 387 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4 388 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4 389 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 390 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4 391 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 392 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 393 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 394 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 395 // CHECK3-NEXT: [[TMP5:%.*]] = load volatile double, ptr [[TMP0]], align 8 396 // CHECK3-NEXT: store double [[TMP5]], ptr [[G3]], align 8 397 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4 398 // CHECK3-NEXT: [[TMP7:%.*]] = load volatile double, ptr [[TMP6]], align 4 399 // CHECK3-NEXT: store double [[TMP7]], ptr [[G14]], align 8 400 // CHECK3-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 4 401 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4 402 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[SVAR6]], align 4 403 // CHECK3-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP3]], align 4 404 // CHECK3-NEXT: store float [[TMP9]], ptr [[SFVAR7]], align 4 405 // CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 406 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 407 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 408 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 409 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 410 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 411 // CHECK3: cond.true: 412 // CHECK3-NEXT: br label [[COND_END:%.*]] 413 // CHECK3: cond.false: 414 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 415 // CHECK3-NEXT: br label [[COND_END]] 416 // CHECK3: cond.end: 417 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 418 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 419 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 420 // CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 421 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 422 // CHECK3: omp.inner.for.cond: 423 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 424 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 425 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 426 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 427 // CHECK3: omp.inner.for.body: 428 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 429 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 430 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 431 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 432 // CHECK3-NEXT: [[TMP18:%.*]] = load double, ptr [[G3]], align 8 433 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00 434 // CHECK3-NEXT: store double [[ADD9]], ptr [[G3]], align 8 435 // CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 4 436 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, ptr [[TMP19]], align 4 437 // CHECK3-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00 438 // CHECK3-NEXT: store volatile double [[ADD10]], ptr [[TMP19]], align 4 439 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[SVAR6]], align 4 440 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3 441 // CHECK3-NEXT: store i32 [[ADD11]], ptr [[SVAR6]], align 4 442 // CHECK3-NEXT: [[TMP22:%.*]] = load float, ptr [[SFVAR7]], align 4 443 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double 444 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00 445 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float 446 // CHECK3-NEXT: store float [[CONV13]], ptr [[SFVAR7]], align 4 447 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0 448 // CHECK3-NEXT: store ptr [[G3]], ptr [[TMP23]], align 4 449 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1 450 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP5]], align 4 451 // CHECK3-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 4 452 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2 453 // CHECK3-NEXT: store ptr [[SVAR6]], ptr [[TMP26]], align 4 454 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3 455 // CHECK3-NEXT: store ptr [[SFVAR7]], ptr [[TMP27]], align 4 456 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]) 457 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 458 // CHECK3: omp.body.continue: 459 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 460 // CHECK3: omp.inner.for.inc: 461 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 462 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1 463 // CHECK3-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV]], align 4 464 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 465 // CHECK3: omp.inner.for.end: 466 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 467 // CHECK3: omp.loop.exit: 468 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP11]]) 469 // CHECK3-NEXT: ret void 470 // 471 // 472 // CHECK9-LABEL: define {{[^@]+}}@main 473 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 474 // CHECK9-NEXT: entry: 475 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 476 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8 477 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8 478 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 479 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 480 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 481 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 482 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 483 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 484 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 485 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8 486 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 487 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 488 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 489 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 490 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 491 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 492 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8 493 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 494 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 495 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false) 496 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 497 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1 498 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 499 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 500 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 501 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 502 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 503 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 504 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 505 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 506 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 507 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 508 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8 509 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8 510 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8 511 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 512 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8 513 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 514 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8 515 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 516 // CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8 517 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 518 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 8 519 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 520 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 8 521 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 522 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8 523 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 524 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 8 525 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 526 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 8 527 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 528 // CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8 529 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 530 // CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 8 531 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 532 // CHECK9-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 8 533 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 534 // CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8 535 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 536 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP20]], align 8 537 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 538 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP21]], align 8 539 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 540 // CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8 541 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 542 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 543 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 544 // CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4 545 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 546 // CHECK9-NEXT: store i32 5, ptr [[TMP26]], align 4 547 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 548 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8 549 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 550 // CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8 551 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 552 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 8 553 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 554 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 8 555 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 556 // CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8 557 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 558 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8 559 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 560 // CHECK9-NEXT: store i64 2, ptr [[TMP33]], align 8 561 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 562 // CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8 563 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 564 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 565 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 566 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 567 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 568 // CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4 569 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, ptr [[KERNEL_ARGS]]) 570 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 571 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 572 // CHECK9: omp_offload.failed: 573 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]] 574 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 575 // CHECK9: omp_offload.cont: 576 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v() 577 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 578 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 579 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 580 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 581 // CHECK9: arraydestroy.body: 582 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 583 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 584 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 585 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 586 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 587 // CHECK9: arraydestroy.done2: 588 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 589 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4 590 // CHECK9-NEXT: ret i32 [[TMP41]] 591 // 592 // 593 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 594 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat { 595 // CHECK9-NEXT: entry: 596 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 597 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 598 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 599 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 600 // CHECK9-NEXT: ret void 601 // 602 // 603 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 604 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 605 // CHECK9-NEXT: entry: 606 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 607 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 608 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 609 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 610 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 611 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 612 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 613 // CHECK9-NEXT: ret void 614 // 615 // 616 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 617 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 618 // CHECK9-NEXT: entry: 619 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 620 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 621 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 622 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 623 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8 624 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 625 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 626 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 627 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 628 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 629 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8 630 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 631 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 632 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 633 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 634 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 635 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]]) 636 // CHECK9-NEXT: ret void 637 // 638 // 639 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined 640 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 641 // CHECK9-NEXT: entry: 642 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 643 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 644 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 645 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 646 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 647 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 648 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8 649 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 650 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 651 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 652 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 653 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 654 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 655 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 656 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 657 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 658 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 659 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 660 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 661 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8 662 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 663 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 664 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 665 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 666 // CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 667 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 668 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 669 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 670 // CHECK9-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8 671 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 672 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 673 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 674 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 675 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8 676 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8 677 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 678 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 8 679 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 680 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 681 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 682 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 683 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4 684 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[T_VAR3]], align 4 685 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i64 8, i1 false) 686 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 687 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2 688 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP7]] 689 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 690 // CHECK9: omp.arraycpy.body: 691 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 692 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 693 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 694 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 695 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 696 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]] 697 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 698 // CHECK9: omp.arraycpy.done6: 699 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP1]], align 8 700 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR7]], ptr align 4 [[TMP8]], i64 4, i1 false) 701 // CHECK9-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 8 702 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 4 703 // CHECK9-NEXT: store i32 [[TMP9]], ptr [[SVAR9]], align 4 704 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 705 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 706 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 707 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 708 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 709 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 710 // CHECK9: cond.true: 711 // CHECK9-NEXT: br label [[COND_END:%.*]] 712 // CHECK9: cond.false: 713 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 714 // CHECK9-NEXT: br label [[COND_END]] 715 // CHECK9: cond.end: 716 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 717 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 718 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 719 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 721 // CHECK9: omp.inner.for.cond: 722 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 723 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 724 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 725 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 726 // CHECK9: omp.inner.for.cond.cleanup: 727 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 728 // CHECK9: omp.inner.for.body: 729 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 730 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 731 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 732 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 733 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR3]], align 4 734 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4 735 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 736 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]] 737 // CHECK9-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX]], align 4 738 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP8]], align 8 739 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4 740 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP21]] to i64 741 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM11]] 742 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX12]], ptr align 4 [[TMP20]], i64 4, i1 false) 743 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 744 // CHECK9: omp.body.continue: 745 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 746 // CHECK9: omp.inner.for.inc: 747 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 748 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], 1 749 // CHECK9-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_IV]], align 4 750 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 751 // CHECK9: omp.inner.for.end: 752 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 753 // CHECK9: omp.loop.exit: 754 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 755 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 756 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 757 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 758 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 759 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2 760 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 761 // CHECK9: arraydestroy.body: 762 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 763 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 764 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 765 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]] 766 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]] 767 // CHECK9: arraydestroy.done15: 768 // CHECK9-NEXT: ret void 769 // 770 // 771 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 772 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 773 // CHECK9-NEXT: entry: 774 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 775 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 776 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 777 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 778 // CHECK9-NEXT: ret void 779 // 780 // 781 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 782 // CHECK9-SAME: () #[[ATTR1]] comdat { 783 // CHECK9-NEXT: entry: 784 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 785 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 786 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 787 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 788 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 789 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8 790 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 791 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 792 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8 793 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8 794 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8 795 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 796 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 797 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 798 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4 799 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false) 800 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1) 801 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1 802 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2) 803 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8 804 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8 805 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8 806 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 807 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 808 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8 809 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 810 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 811 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8 812 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 813 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8 814 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 815 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8 816 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 817 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8 818 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 819 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 8 820 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 821 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 8 822 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 823 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 824 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 825 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8 826 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 827 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8 828 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 829 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 830 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 831 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8 832 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 833 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 8 834 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 835 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 836 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 837 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 838 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 839 // CHECK9-NEXT: store i32 3, ptr [[TMP20]], align 4 840 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 841 // CHECK9-NEXT: store i32 4, ptr [[TMP21]], align 4 842 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 843 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 8 844 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 845 // CHECK9-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 8 846 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 847 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 8 848 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 849 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8 850 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 851 // CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8 852 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 853 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8 854 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 855 // CHECK9-NEXT: store i64 2, ptr [[TMP28]], align 8 856 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 857 // CHECK9-NEXT: store i64 0, ptr [[TMP29]], align 8 858 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 859 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4 860 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 861 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4 862 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 863 // CHECK9-NEXT: store i32 0, ptr [[TMP32]], align 4 864 // CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 865 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 866 // CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 867 // CHECK9: omp_offload.failed: 868 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 869 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 870 // CHECK9: omp_offload.cont: 871 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 872 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 873 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 874 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 875 // CHECK9: arraydestroy.body: 876 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 877 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 878 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 879 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 880 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 881 // CHECK9: arraydestroy.done2: 882 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 883 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4 884 // CHECK9-NEXT: ret i32 [[TMP36]] 885 // 886 // 887 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 888 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 889 // CHECK9-NEXT: entry: 890 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 891 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 892 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 893 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 894 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4 895 // CHECK9-NEXT: ret void 896 // 897 // 898 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 899 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 900 // CHECK9-NEXT: entry: 901 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 902 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 903 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 904 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 905 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 906 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 907 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 908 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4 909 // CHECK9-NEXT: ret void 910 // 911 // 912 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 913 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 914 // CHECK9-NEXT: entry: 915 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 916 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 917 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 918 // CHECK9-NEXT: ret void 919 // 920 // 921 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 922 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 923 // CHECK9-NEXT: entry: 924 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 925 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 926 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 927 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 928 // CHECK9-NEXT: ret void 929 // 930 // 931 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 932 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 933 // CHECK9-NEXT: entry: 934 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 935 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 936 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 937 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 938 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 939 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 940 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]]) 941 // CHECK9-NEXT: ret void 942 // 943 // 944 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 945 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 946 // CHECK9-NEXT: entry: 947 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 948 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 949 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 950 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 951 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 952 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 953 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 954 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 955 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 956 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 957 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 958 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 959 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8 960 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8 961 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]]) 962 // CHECK9-NEXT: ret void 963 // 964 // 965 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 966 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 967 // CHECK9-NEXT: entry: 968 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 969 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 970 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8 971 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8 972 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8 973 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8 974 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8 975 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8 976 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 977 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 978 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 979 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 980 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 981 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 982 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 983 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 984 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 985 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 986 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8 987 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 988 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 989 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 990 // CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8 991 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8 992 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8 993 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8 994 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8 995 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8 996 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8 997 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8 998 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8 999 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8 1000 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8 1001 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1002 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1003 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1004 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1005 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 1006 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[T_VAR3]], align 4 1007 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i64 8, i1 false) 1008 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 1009 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2 1010 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP6]] 1011 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1012 // CHECK9: omp.arraycpy.body: 1013 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1014 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1015 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false) 1016 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1017 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1018 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 1019 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1020 // CHECK9: omp.arraycpy.done6: 1021 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP1]], align 8 1022 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR7]], ptr align 4 [[TMP7]], i64 4, i1 false) 1023 // CHECK9-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 8 1024 // CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1025 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 1026 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1027 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1028 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 1029 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1030 // CHECK9: cond.true: 1031 // CHECK9-NEXT: br label [[COND_END:%.*]] 1032 // CHECK9: cond.false: 1033 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1034 // CHECK9-NEXT: br label [[COND_END]] 1035 // CHECK9: cond.end: 1036 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1037 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1038 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1039 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 1040 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1041 // CHECK9: omp.inner.for.cond: 1042 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1043 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1044 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1045 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1046 // CHECK9: omp.inner.for.cond.cleanup: 1047 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1048 // CHECK9: omp.inner.for.body: 1049 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1050 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1051 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1052 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1053 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 4 1054 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4 1055 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 1056 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]] 1057 // CHECK9-NEXT: store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4 1058 // CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP8]], align 8 1059 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4 1060 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64 1061 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]] 1062 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP18]], i64 4, i1 false) 1063 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1064 // CHECK9: omp.body.continue: 1065 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1066 // CHECK9: omp.inner.for.inc: 1067 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1068 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP20]], 1 1069 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4 1070 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1071 // CHECK9: omp.inner.for.end: 1072 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1073 // CHECK9: omp.loop.exit: 1074 // CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 1075 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 1076 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 1077 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1078 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 1079 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2 1080 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1081 // CHECK9: arraydestroy.body: 1082 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1083 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1084 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1085 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1086 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1087 // CHECK9: arraydestroy.done14: 1088 // CHECK9-NEXT: ret void 1089 // 1090 // 1091 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1092 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1093 // CHECK9-NEXT: entry: 1094 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1095 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1096 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1097 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1098 // CHECK9-NEXT: ret void 1099 // 1100 // 1101 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1102 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1103 // CHECK9-NEXT: entry: 1104 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1105 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1106 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1107 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1108 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4 1109 // CHECK9-NEXT: ret void 1110 // 1111 // 1112 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1113 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1114 // CHECK9-NEXT: entry: 1115 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1116 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1117 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1118 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1119 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1120 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1121 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1122 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1123 // CHECK9-NEXT: ret void 1124 // 1125 // 1126 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1127 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat { 1128 // CHECK9-NEXT: entry: 1129 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 1130 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 1131 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 1132 // CHECK9-NEXT: ret void 1133 // 1134 // 1135 // CHECK11-LABEL: define {{[^@]+}}@main 1136 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 1137 // CHECK11-NEXT: entry: 1138 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1139 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8 1140 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4 1141 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1142 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1143 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1144 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1145 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1146 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1147 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1148 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4 1149 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 1150 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 1151 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 1152 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1153 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1154 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1155 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4 1156 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1157 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1158 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false) 1159 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00) 1160 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1 1161 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1162 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1163 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1164 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1165 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1166 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1167 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1168 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1169 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4 1170 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4 1171 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4 1172 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4 1173 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4 1174 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1175 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4 1176 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1177 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4 1178 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1179 // CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 4 1180 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1181 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 4 1182 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1183 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 4 1184 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1185 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 1186 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1187 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 4 1188 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1189 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 4 1190 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1191 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 1192 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1193 // CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 4 1194 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1195 // CHECK11-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 4 1196 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1197 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4 1198 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 1199 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP20]], align 4 1200 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 1201 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP21]], align 4 1202 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 1203 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 1204 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1205 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1206 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1207 // CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 4 1208 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1209 // CHECK11-NEXT: store i32 5, ptr [[TMP26]], align 4 1210 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1211 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4 1212 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1213 // CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4 1214 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1215 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 4 1216 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1217 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 4 1218 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1219 // CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 4 1220 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1221 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 4 1222 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1223 // CHECK11-NEXT: store i64 2, ptr [[TMP33]], align 8 1224 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1225 // CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 8 1226 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1227 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4 1228 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1229 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4 1230 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1231 // CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 4 1232 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, ptr [[KERNEL_ARGS]]) 1233 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 1234 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1235 // CHECK11: omp_offload.failed: 1236 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]] 1237 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1238 // CHECK11: omp_offload.cont: 1239 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1240 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1241 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0 1242 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1243 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1244 // CHECK11: arraydestroy.body: 1245 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1246 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1247 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1248 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1249 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1250 // CHECK11: arraydestroy.done2: 1251 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1252 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4 1253 // CHECK11-NEXT: ret i32 [[TMP41]] 1254 // 1255 // 1256 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1257 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1258 // CHECK11-NEXT: entry: 1259 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1260 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1261 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1262 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1263 // CHECK11-NEXT: ret void 1264 // 1265 // 1266 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1267 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1268 // CHECK11-NEXT: entry: 1269 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1270 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1271 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1272 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1273 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1274 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1275 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1276 // CHECK11-NEXT: ret void 1277 // 1278 // 1279 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103 1280 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] { 1281 // CHECK11-NEXT: entry: 1282 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1283 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1284 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1285 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1286 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4 1287 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1288 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1289 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1290 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1291 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1292 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4 1293 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1294 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1295 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1296 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1297 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1298 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]]) 1299 // CHECK11-NEXT: ret void 1300 // 1301 // 1302 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined 1303 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] { 1304 // CHECK11-NEXT: entry: 1305 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1306 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1307 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1308 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1309 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1310 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1311 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4 1312 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1313 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1314 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1315 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1316 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1317 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1318 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1319 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1320 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1321 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1322 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4 1323 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1324 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca ptr, align 4 1325 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4 1326 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1327 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1328 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1329 // CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1330 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1331 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1332 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1333 // CHECK11-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4 1334 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1335 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1336 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1337 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1338 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4 1339 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 4 1340 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1341 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 4 1342 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1343 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1344 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1345 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1346 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4 1347 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[T_VAR3]], align 4 1348 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i32 8, i1 false) 1349 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 1350 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2 1351 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP7]] 1352 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1353 // CHECK11: omp.arraycpy.body: 1354 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1355 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1356 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1357 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1358 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1359 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]] 1360 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1361 // CHECK11: omp.arraycpy.done6: 1362 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP1]], align 4 1363 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR7]], ptr align 4 [[TMP8]], i32 4, i1 false) 1364 // CHECK11-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 4 1365 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 4 1366 // CHECK11-NEXT: store i32 [[TMP9]], ptr [[SVAR9]], align 4 1367 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1368 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 1369 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1370 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1371 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1 1372 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1373 // CHECK11: cond.true: 1374 // CHECK11-NEXT: br label [[COND_END:%.*]] 1375 // CHECK11: cond.false: 1376 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1377 // CHECK11-NEXT: br label [[COND_END]] 1378 // CHECK11: cond.end: 1379 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 1380 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1381 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1382 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4 1383 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1384 // CHECK11: omp.inner.for.cond: 1385 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1386 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1387 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] 1388 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1389 // CHECK11: omp.inner.for.cond.cleanup: 1390 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1391 // CHECK11: omp.inner.for.body: 1392 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1393 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1 1394 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1395 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1396 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR3]], align 4 1397 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4 1398 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP19]] 1399 // CHECK11-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX]], align 4 1400 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP8]], align 4 1401 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4 1402 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP21]] 1403 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP20]], i32 4, i1 false) 1404 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1405 // CHECK11: omp.body.continue: 1406 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1407 // CHECK11: omp.inner.for.inc: 1408 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1409 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP22]], 1 1410 // CHECK11-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4 1411 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1412 // CHECK11: omp.inner.for.end: 1413 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1414 // CHECK11: omp.loop.exit: 1415 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1416 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 1417 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]]) 1418 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1419 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0 1420 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2 1421 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1422 // CHECK11: arraydestroy.body: 1423 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1424 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1425 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1426 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]] 1427 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]] 1428 // CHECK11: arraydestroy.done14: 1429 // CHECK11-NEXT: ret void 1430 // 1431 // 1432 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1433 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1434 // CHECK11-NEXT: entry: 1435 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1436 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1437 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1438 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1439 // CHECK11-NEXT: ret void 1440 // 1441 // 1442 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1443 // CHECK11-SAME: () #[[ATTR1]] comdat { 1444 // CHECK11-NEXT: entry: 1445 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1446 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1447 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1448 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1449 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1450 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4 1451 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1452 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1453 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4 1454 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4 1455 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4 1456 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1457 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1458 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1459 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4 1460 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false) 1461 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1) 1462 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1 1463 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1464 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4 1465 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4 1466 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4 1467 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4 1468 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4 1469 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4 1470 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1471 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 1472 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4 1473 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1474 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP6]], align 4 1475 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1476 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4 1477 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1478 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4 1479 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1480 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 4 1481 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1482 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 4 1483 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1484 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1485 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1486 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 4 1487 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1488 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 4 1489 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1490 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4 1491 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 1492 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 4 1493 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 1494 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 4 1495 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 1496 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4 1497 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1498 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1499 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1500 // CHECK11-NEXT: store i32 3, ptr [[TMP20]], align 4 1501 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1502 // CHECK11-NEXT: store i32 4, ptr [[TMP21]], align 4 1503 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1504 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 4 1505 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1506 // CHECK11-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 4 1507 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1508 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 4 1509 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1510 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 4 1511 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1512 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4 1513 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1514 // CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 4 1515 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1516 // CHECK11-NEXT: store i64 2, ptr [[TMP28]], align 8 1517 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1518 // CHECK11-NEXT: store i64 0, ptr [[TMP29]], align 8 1519 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1520 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4 1521 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1522 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4 1523 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1524 // CHECK11-NEXT: store i32 0, ptr [[TMP32]], align 4 1525 // CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]]) 1526 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 1527 // CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1528 // CHECK11: omp_offload.failed: 1529 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]] 1530 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1531 // CHECK11: omp_offload.cont: 1532 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 1533 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0 1534 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1535 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1536 // CHECK11: arraydestroy.body: 1537 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1538 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1539 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1540 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1541 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1542 // CHECK11: arraydestroy.done2: 1543 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 1544 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4 1545 // CHECK11-NEXT: ret i32 [[TMP36]] 1546 // 1547 // 1548 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1549 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1550 // CHECK11-NEXT: entry: 1551 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1552 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1553 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1554 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1555 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4 1556 // CHECK11-NEXT: ret void 1557 // 1558 // 1559 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1560 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1561 // CHECK11-NEXT: entry: 1562 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1563 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1564 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1565 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4 1566 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1567 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 1568 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4 1569 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4 1570 // CHECK11-NEXT: ret void 1571 // 1572 // 1573 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1574 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1575 // CHECK11-NEXT: entry: 1576 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1577 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1578 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1579 // CHECK11-NEXT: ret void 1580 // 1581 // 1582 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1583 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1584 // CHECK11-NEXT: entry: 1585 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1586 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1587 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1588 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1589 // CHECK11-NEXT: ret void 1590 // 1591 // 1592 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1593 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1594 // CHECK11-NEXT: entry: 1595 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1596 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1597 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1598 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1599 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1600 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1601 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1602 // CHECK11-NEXT: ret void 1603 // 1604 // 1605 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49 1606 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1607 // CHECK11-NEXT: entry: 1608 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1609 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1610 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1611 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1612 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1613 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1614 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1615 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1616 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1617 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1618 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1619 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1620 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4 1621 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4 1622 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]]) 1623 // CHECK11-NEXT: ret void 1624 // 1625 // 1626 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined 1627 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] { 1628 // CHECK11-NEXT: entry: 1629 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1630 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1631 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4 1632 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4 1633 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4 1634 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4 1635 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4 1636 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4 1637 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1638 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1639 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1640 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1641 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1642 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1643 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4 1644 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4 1645 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4 1646 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1647 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca ptr, align 4 1648 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1649 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1650 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1651 // CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4 1652 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4 1653 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4 1654 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4 1655 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4 1656 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4 1657 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4 1658 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4 1659 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 4 1660 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4 1661 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4 1662 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1663 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4 1664 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1665 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1666 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 1667 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[T_VAR3]], align 4 1668 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i32 8, i1 false) 1669 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 1670 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2 1671 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP6]] 1672 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1673 // CHECK11: omp.arraycpy.body: 1674 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1675 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1676 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false) 1677 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1678 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1679 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]] 1680 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]] 1681 // CHECK11: omp.arraycpy.done6: 1682 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP1]], align 4 1683 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR7]], ptr align 4 [[TMP7]], i32 4, i1 false) 1684 // CHECK11-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 4 1685 // CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1686 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 1687 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1688 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1689 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1 1690 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1691 // CHECK11: cond.true: 1692 // CHECK11-NEXT: br label [[COND_END:%.*]] 1693 // CHECK11: cond.false: 1694 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1695 // CHECK11-NEXT: br label [[COND_END]] 1696 // CHECK11: cond.end: 1697 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1698 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1699 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1700 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4 1701 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1702 // CHECK11: omp.inner.for.cond: 1703 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1704 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1705 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1706 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 1707 // CHECK11: omp.inner.for.cond.cleanup: 1708 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 1709 // CHECK11: omp.inner.for.body: 1710 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1711 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1712 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1713 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1714 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 4 1715 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4 1716 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP17]] 1717 // CHECK11-NEXT: store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4 1718 // CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP8]], align 4 1719 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4 1720 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP19]] 1721 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP18]], i32 4, i1 false) 1722 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1723 // CHECK11: omp.body.continue: 1724 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1725 // CHECK11: omp.inner.for.inc: 1726 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1727 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 1 1728 // CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4 1729 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1730 // CHECK11: omp.inner.for.end: 1731 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1732 // CHECK11: omp.loop.exit: 1733 // CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1734 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 1735 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]]) 1736 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]] 1737 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0 1738 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2 1739 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1740 // CHECK11: arraydestroy.body: 1741 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1742 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1 1743 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1744 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]] 1745 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]] 1746 // CHECK11: arraydestroy.done13: 1747 // CHECK11-NEXT: ret void 1748 // 1749 // 1750 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1751 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1752 // CHECK11-NEXT: entry: 1753 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1754 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1755 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1756 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1757 // CHECK11-NEXT: ret void 1758 // 1759 // 1760 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1761 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1762 // CHECK11-NEXT: entry: 1763 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1764 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1765 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1766 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1767 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4 1768 // CHECK11-NEXT: ret void 1769 // 1770 // 1771 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1772 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1773 // CHECK11-NEXT: entry: 1774 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1775 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1776 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1777 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4 1778 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1779 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 1780 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4 1781 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4 1782 // CHECK11-NEXT: ret void 1783 // 1784 // 1785 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1786 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1787 // CHECK11-NEXT: entry: 1788 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 1789 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 1790 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 1791 // CHECK11-NEXT: ret void 1792 // 1793