xref: /llvm-project/clang/test/Layout/itanium-union-bitfield.cpp (revision f46c41febb88182f172d0260b55bd17e4c690a43)
1 // RUN: %clang_cc1 -emit-llvm-only -triple %itanium_abi_triple -fdump-record-layouts %s 2>/dev/null \
2 // RUN:            | FileCheck %s
3 
4 // On z/OS, a bit-field has single byte alignment.  Add aligned(4) on z/OS so the union has
5 // the same size & alignment as expected.
6 #ifdef __MVS__
7 #define ALIGN4 __attribute__((aligned(4)))
8 #else
9 #define ALIGN4
10 #endif
11 
12 union A {
13   int f1 : 3 ALIGN4;
14   A();
15 };
16 
A()17 A::A() {}
18 
19 union B {
20   char f1 : 35 ALIGN4;
21   B();
22 };
23 
B()24 B::B() {}
25 
26 // CHECK:*** Dumping AST Record Layout
27 // CHECK-NEXT:     0 | union A
28 // CHECK-NEXT: 0:0-2 |   int f1
29 // CHECK-NEXT:       | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)?}}
30 // CHECK-NEXT:       |  nvsize=1, nvalign=4{{(, preferrednvalign=4)?}}]
31 
32 // CHECK:*** Dumping AST Record Layout
33 // CHECK-NEXT:      0 | union B
34 // CHECK-NEXT: 0:0-34 |   char f1
35 // CHECK-NEXT:        | [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)?}}
36 // CHECK-NEXT:        |  nvsize=5, nvalign=4{{(, preferrednvalign=4)?}}]
37