1// RUN: %clang_cc1 < %s -cl-std=CL2.0 -triple spir64 -emit-llvm | FileCheck -check-prefix=SPIR %s 2// RUN: %clang_cc1 < %s -cl-std=CL2.0 -triple armv5e-none-linux-gnueabi -emit-llvm | FileCheck -check-prefix=ARM %s 3typedef enum memory_order { 4 memory_order_relaxed = __ATOMIC_RELAXED, 5 memory_order_acquire = __ATOMIC_ACQUIRE, 6 memory_order_release = __ATOMIC_RELEASE, 7 memory_order_acq_rel = __ATOMIC_ACQ_REL, 8 memory_order_seq_cst = __ATOMIC_SEQ_CST 9} memory_order; 10 11typedef enum memory_scope { 12 memory_scope_work_item = __OPENCL_MEMORY_SCOPE_WORK_ITEM, 13 memory_scope_work_group = __OPENCL_MEMORY_SCOPE_WORK_GROUP, 14 memory_scope_device = __OPENCL_MEMORY_SCOPE_DEVICE, 15 memory_scope_all_svm_devices = __OPENCL_MEMORY_SCOPE_ALL_SVM_DEVICES, 16#if defined(cl_intel_subgroups) || defined(cl_khr_subgroups) 17 memory_scope_sub_group = __OPENCL_MEMORY_SCOPE_SUB_GROUP 18#endif 19} memory_scope; 20 21void f(atomic_int *i, global atomic_int *gi, local atomic_int *li, private atomic_int *pi, atomic_uint *ui, int cmp, int order, int scope) { 22 int x; 23 // SPIR: load atomic i32, ptr addrspace(4) {{.*}} seq_cst, align 4 24 // ARM: load atomic i32, ptr {{.*}} seq_cst, align 4 25 x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_work_group); 26 27 // SPIR: store atomic i32 {{.*}}, ptr addrspace(4) {{.*}} seq_cst, align 4 28 // ARM: store atomic i32 {{.*}}, ptr {{.*}} seq_cst, align 4 29 __opencl_atomic_store(i, 1, memory_order_seq_cst, memory_scope_work_group); 30 31 // SPIR: store atomic i32 {{.*}}, ptr addrspace(1) {{.*}} seq_cst, align 4 32 // ARM: store atomic i32 {{.*}}, ptr {{.*}} seq_cst, align 4 33 __opencl_atomic_store(gi, 1, memory_order_seq_cst, memory_scope_work_group); 34 35 // SPIR: store atomic i32 {{.*}}, ptr addrspace(3) {{.*}} seq_cst, align 4 36 // ARM: store atomic i32 {{.*}}, ptr {{.*}} seq_cst, align 4 37 __opencl_atomic_store(li, 1, memory_order_seq_cst, memory_scope_work_group); 38 39 // SPIR: store atomic i32 {{.*}}, ptr {{.*}} seq_cst, align 4 40 // ARM: store atomic i32 {{.*}}, ptr {{.*}} seq_cst, align 4 41 __opencl_atomic_store(pi, 1, memory_order_seq_cst, memory_scope_work_group); 42 43 // SPIR: atomicrmw add ptr addrspace(4) {{.*}}, i32 {{.*}} seq_cst, align 4 44 // ARM: atomicrmw add ptr {{.*}}, i32 {{.*}} seq_cst, align 4 45 x = __opencl_atomic_fetch_add(i, 3, memory_order_seq_cst, memory_scope_work_group); 46 47 // SPIR: atomicrmw min ptr addrspace(4) {{.*}}, i32 {{.*}} seq_cst, align 4 48 // ARM: atomicrmw min ptr {{.*}}, i32 {{.*}} seq_cst, align 4 49 x = __opencl_atomic_fetch_min(i, 3, memory_order_seq_cst, memory_scope_work_group); 50 51 // SPIR: atomicrmw umin ptr addrspace(4) {{.*}}, i32 {{.*}} seq_cst, align 4 52 // ARM: atomicrmw umin ptr {{.*}}, i32 {{.*}} seq_cst, align 4 53 x = __opencl_atomic_fetch_min(ui, 3, memory_order_seq_cst, memory_scope_work_group); 54 55 // SPIR: cmpxchg ptr addrspace(4) {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 56 // ARM: cmpxchg ptr {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 57 x = __opencl_atomic_compare_exchange_strong(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_work_group); 58 59 // SPIR: cmpxchg weak ptr addrspace(4) {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 60 // ARM: cmpxchg weak ptr {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 61 x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_work_group); 62 63 // SPIR: cmpxchg weak ptr addrspace(4) {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 64 // ARM: cmpxchg weak ptr {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 65 x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_device); 66 67 // SPIR: cmpxchg weak ptr addrspace(4) {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 68 // ARM: cmpxchg weak ptr {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 69 x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_all_svm_devices); 70 71#ifdef cl_khr_subgroups 72 // SPIR: cmpxchg weak ptr addrspace(4) {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 73 x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_sub_group); 74#endif 75 76 // SPIR: cmpxchg weak ptr addrspace(4) {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 77 // ARM: cmpxchg weak ptr {{.*}}, i32 {{.*}}, i32 {{.*}} seq_cst seq_cst, align 4 78 x = __opencl_atomic_compare_exchange_weak(i, &cmp, 1, order, order, scope); 79} 80