1 // RUN: %clang_cc1 -triple mips-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,O32 -enable-var-scope
2 // RUN: %clang_cc1 -triple mipsel-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,O32 -enable-var-scope
3 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefixes=ALL,N32,NEW -enable-var-scope
4 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefixes=ALL,N32,NEW -enable-var-scope
5 // RUN: %clang_cc1 -triple mips64-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,N64,NEW -enable-var-scope
6 // RUN: %clang_cc1 -triple mips64el-unknown-linux -o - -emit-llvm %s | FileCheck %s -check-prefixes=ALL,N64,NEW -enable-var-scope
7
8 #include <stdarg.h>
9
10 typedef int v4i32 __attribute__ ((__vector_size__ (16)));
11
test_i32(char * fmt,...)12 int test_i32(char *fmt, ...) {
13 va_list va;
14
15 va_start(va, fmt);
16 int v = va_arg(va, int);
17 va_end(va);
18
19 return v;
20 }
21
22 // O32-LABEL: define{{.*}} i32 @test_i32(ptr{{.*}} %fmt, ...)
23 // N32-LABEL: define{{.*}} signext i32 @test_i32(ptr{{.*}} %fmt, ...)
24 // N64-LABEL: define{{.*}} signext i32 @test_i32(ptr{{.*}} %fmt, ...)
25 //
26 // O32: %va = alloca ptr, align [[$PTRALIGN:4]]
27 // N32: %va = alloca ptr, align [[$PTRALIGN:4]]
28 // N64: %va = alloca ptr, align [[$PTRALIGN:8]]
29 // ALL: [[V:%.*]] = alloca i32, align 4
30 //
31 // ALL: call void @llvm.va_start.p0(ptr %va)
32 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
33 // O32: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T:i32]] [[$CHUNKSIZE:4]]
34 // NEW: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T:i32|i64]] [[$CHUNKSIZE:8]]
35 //
36 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
37 //
38 // O32: [[ARG:%.+]] = load i32, ptr [[AP_CUR]], align [[CHUNKALIGN:4]]
39 //
40 // N32: [[TMP:%.+]] = load i64, ptr [[AP_CUR]], align [[CHUNKALIGN:8]]
41 // N64: [[TMP:%.+]] = load i64, ptr [[AP_CUR]], align [[CHUNKALIGN:8]]
42 // NEW: [[ARG:%.+]] = trunc i64 [[TMP]] to i32
43 // ALL: store i32 [[ARG]], ptr [[V]], align 4
44 //
45 // ALL: call void @llvm.va_end.p0(ptr %va)
46 // ALL: }
47
test_i64(char * fmt,...)48 long long test_i64(char *fmt, ...) {
49 va_list va;
50
51 va_start(va, fmt);
52 long long v = va_arg(va, long long);
53 va_end(va);
54
55 return v;
56 }
57
58 // ALL-LABEL: define{{.*}} i64 @test_i64(ptr{{.*}} %fmt, ...)
59 //
60 // ALL: %va = alloca ptr, align [[$PTRALIGN]]
61 // ALL: call void @llvm.va_start.p0(ptr %va)
62 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
63 //
64 // i64 is 8-byte aligned, while this is within O32's stack alignment there's no
65 // guarantee that the offset is still 8-byte aligned after earlier reads.
66 // O32: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 7
67 // O32: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP1]], i32 -8)
68 //
69 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T]] 8
70 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
71 //
72 // ALL: [[ARG:%.+]] = load i64, ptr [[AP_CUR]], align 8
73 //
74 // ALL: call void @llvm.va_end.p0(ptr %va)
75 // ALL: }
76
test_ptr(char * fmt,...)77 char *test_ptr(char *fmt, ...) {
78 va_list va;
79
80 va_start(va, fmt);
81 char *v = va_arg(va, char *);
82 va_end(va);
83
84 return v;
85 }
86
87 // ALL-LABEL: define{{.*}} ptr @test_ptr(ptr{{.*}} %fmt, ...)
88 //
89 // ALL: %va = alloca ptr, align [[$PTRALIGN]]
90 // ALL: [[V:%.*]] = alloca ptr, align [[$PTRALIGN]]
91 // ALL: call void @llvm.va_start.p0(ptr %va)
92 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
93 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T]] [[$CHUNKSIZE]]
94 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
95 //
96 // When the chunk size matches the pointer size, this is easy.
97 // Otherwise we need a promotion temporary.
98 // N32: [[TMP2:%.+]] = load i64, ptr [[AP_CUR]], align 8
99 // N32: [[TMP3:%.+]] = trunc i64 [[TMP2]] to i32
100 // N32: [[PTR:%.+]] = inttoptr i32 [[TMP3]] to ptr
101 // O32: [[PTR:%.+]] = load ptr, ptr [[AP_CUR]], align [[$PTRALIGN]]
102 // N64: [[PTR:%.+]] = load ptr, ptr [[AP_CUR]], align [[$PTRALIGN]]
103 // ALL: store ptr [[PTR]], ptr [[V]], align [[$PTRALIGN]]
104 //
105 // ALL: call void @llvm.va_end.p0(ptr %va)
106 // ALL: }
107
test_v4i32(char * fmt,...)108 int test_v4i32(char *fmt, ...) {
109 va_list va;
110
111 va_start(va, fmt);
112 v4i32 v = va_arg(va, v4i32);
113 va_end(va);
114
115 return v[0];
116 }
117
118 // O32-LABEL: define{{.*}} i32 @test_v4i32(ptr{{.*}} %fmt, ...)
119 // N32-LABEL: define{{.*}} signext i32 @test_v4i32(ptr{{.*}} %fmt, ...)
120 // N64-LABEL: define{{.*}} signext i32 @test_v4i32(ptr{{.*}} %fmt, ...)
121 //
122 // ALL: %va = alloca ptr, align [[$PTRALIGN]]
123 // ALL: [[V:%.+]] = alloca <4 x i32>, align 16
124 // ALL: call void @llvm.va_start.p0(ptr %va)
125 // ALL: [[AP_CUR:%.+]] = load ptr, ptr %va, align [[$PTRALIGN]]
126 //
127 // Vectors are 16-byte aligned, however the O32 ABI has a maximum alignment of
128 // 8-bytes since the base of the stack is 8-byte aligned.
129
130 // O32: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 7
131 // O32: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP1]], i32 -8)
132
133 // N32: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 15
134 // N32: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP1]], i32 -16)
135
136 // N64: [[TMP1:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], i32 15
137 // N64: [[AP_CUR:%.+]] = call ptr @llvm.ptrmask.p0.i64(ptr [[TMP1]], i64 -16)
138
139 //
140 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, ptr [[AP_CUR]], [[$INTPTR_T]] 16
141 // ALL: store ptr [[AP_NEXT]], ptr %va, align [[$PTRALIGN]]
142 //
143 // O32: [[ARG:%.+]] = load <4 x i32>, ptr [[AP_CUR]], align 8
144 // N64: [[ARG:%.+]] = load <4 x i32>, ptr [[AP_CUR]], align 16
145 // N32: [[ARG:%.+]] = load <4 x i32>, ptr [[AP_CUR]], align 16
146 // ALL: store <4 x i32> [[ARG]], ptr [[V]], align 16
147 //
148 // ALL: call void @llvm.va_end.p0(ptr %va)
149 // ALL: [[VECEXT:%.+]] = extractelement <4 x i32> {{.*}}, i32 0
150 // ALL: ret i32 [[VECEXT]]
151 // ALL: }
152