xref: /llvm-project/clang/test/CodeGen/builtins-riscv.c (revision 5f9a82683dc13a09bdd55d88dde981552cda4ce7)
1 // RUN: %clang_cc1 -Wall -Wno-unused-but-set-variable -Werror -triple riscv32 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
2 // RUN: %clang_cc1 -Wall -Wno-unused-but-set-variable -Werror -triple riscv64 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
3 
test_eh_return_data_regno(void)4 void test_eh_return_data_regno(void) {
5   // CHECK: store volatile i32 10
6   // CHECK: store volatile i32 11
7   volatile int res;
8   res = __builtin_eh_return_data_regno(0);
9   res = __builtin_eh_return_data_regno(1);
10 }
11