1 // RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu i686 -tune-cpu i686 -emit-llvm %s -o - | FileCheck %s 2 3 // CHECK: define {{.*}}@f_default({{.*}} [[f_default:#[0-9]+]] 4 // CHECK: define {{.*}}@f_avx_sse4_2_ivybridge({{.*}} [[f_avx_sse4_2_ivybridge:#[0-9]+]] 5 // CHECK: define {{.*}}@f_fpmath_387({{.*}} [[f_default]] 6 // CHECK: define {{.*}}@f_no_sse2({{.*}} [[f_no_sse2:#[0-9]+]] 7 // CHECK: define {{.*}}@f_sse4({{.*}} [[f_sse4:#[0-9]+]] 8 // CHECK: define {{.*}}@f_no_sse4({{.*}} [[f_no_sse4:#[0-9]+]] 9 // CHECK: define {{.*}}@f_default2({{.*}} [[f_default]] 10 // CHECK: define {{.*}}@f_avx_sse4_2_ivybridge_2({{.*}} [[f_avx_sse4_2_ivybridge]] 11 // CHECK: define {{.*}}@f_no_aes_ivybridge({{.*}} [[f_no_aes_ivybridge:#[0-9]+]] 12 // CHECK: define {{.*}}@f_no_mmx({{.*}} [[f_no_mmx:#[0-9]+]] 13 // CHECK: define {{.*}}@f_lakemont_mmx({{.*}} [[f_lakemont_mmx:#[0-9]+]] 14 // CHECK: define {{.*}}@f_use_before_def({{.*}} [[f_lakemont_mmx]] 15 // CHECK: define {{.*}}@f_tune_sandybridge({{.*}} [[f_tune_sandybridge:#[0-9]+]] 16 // CHECK: define {{.*}}@f_x86_64_v2({{.*}} [[f_x86_64_v2:#[0-9]+]] 17 // CHECK: define {{.*}}@f_x86_64_v3({{.*}} [[f_x86_64_v3:#[0-9]+]] 18 // CHECK: define {{.*}}@f_x86_64_v4({{.*}} [[f_x86_64_v4:#[0-9]+]] 19 // CHECK: define {{.*}}@f_avx10_1_256{{.*}} [[f_avx10_1_256:#[0-9]+]] 20 // CHECK: define {{.*}}@f_avx10_1_512{{.*}} [[f_avx10_1_512:#[0-9]+]] 21 // CHECK: define {{.*}}@f_prefer_256_bit({{.*}} [[f_prefer_256_bit:#[0-9]+]] 22 // CHECK: define {{.*}}@f_no_prefer_256_bit({{.*}} [[f_no_prefer_256_bit:#[0-9]+]] 23 24 // CHECK: [[f_default]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="i686" 25 void f_default(void) {} 26 27 // CHECK: [[f_avx_sse4_2_ivybridge]] = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" 28 __attribute__((target("avx,sse4.2,arch=ivybridge"))) 29 void f_avx_sse4_2_ivybridge(void) {} 30 31 // We're currently ignoring the fpmath attribute. So checked above that 32 // attributes are identical to f_default. 33 __attribute__((target("fpmath=387"))) 34 void f_fpmath_387(void) {} 35 36 // CHECK-NOT: tune-cpu 37 // CHECK: [[f_no_sse2]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sm4,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686" 38 __attribute__((target("no-sse2"))) 39 void f_no_sse2(void) {} 40 41 // CHECK: [[f_sse4]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686" 42 __attribute__((target("sse4"))) 43 void f_sse4(void) {} 44 45 // CHECK: [[f_no_sse4]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sm4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686" 46 __attribute__((target("no-sse4"))) 47 void f_no_sse4(void) {} 48 49 // checked above that attributes are identical to f_default 50 void f_default2(void) { 51 f_avx_sse4_2_ivybridge(); 52 return f_default(); 53 } 54 55 // Checked above to have same attributes as f_avx_sse4_2_ivybridge 56 __attribute__((target("avx, sse4.2, arch= ivybridge"))) 57 void f_avx_sse4_2_ivybridge_2(void) {} 58 59 // CHECK: [[f_no_aes_ivybridge]] = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-amx-avx512,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-vaes" 60 __attribute__((target("no-aes, arch=ivybridge"))) 61 void f_no_aes_ivybridge(void) {} 62 63 // CHECK-NOT: tune-cpu 64 // CHECK: [[f_no_mmx]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-mmx" 65 __attribute__((target("no-mmx"))) 66 void f_no_mmx(void) {} 67 68 // CHECK: [[f_lakemont_mmx]] = {{.*}}"target-cpu"="lakemont" "target-features"="+cx8,+mmx" 69 // Adding the attribute to a definition does update it in IR. 70 __attribute__((target("arch=lakemont,mmx"))) 71 void f_lakemont_mmx(void) {} 72 73 void f_use_before_def(void); 74 void usage(void){ 75 f_use_before_def(); 76 } 77 78 // Checked above to have same attributes as f_lakemont_mmx 79 __attribute__((target("arch=lakemont,mmx"))) 80 void f_use_before_def(void) {} 81 82 // CHECK: [[f_tune_sandybridge]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="sandybridge" 83 __attribute__((target("tune=sandybridge"))) 84 void f_tune_sandybridge(void) {} 85 86 // CHECK: [[f_x86_64_v2]] ={{.*}}"target-cpu"="x86-64-v2" 87 // CHECK-SAME: "target-features"="+cmov,+crc32,+cx16,+cx8,+fxsr,+mmx,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" 88 __attribute__((target("arch=x86-64-v2"))) 89 void f_x86_64_v2(void) {} 90 91 // CHECK: [[f_x86_64_v3]] = {{.*}}"target-cpu"="x86-64-v3" 92 // CHECK-SAME: "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" 93 __attribute__((target("arch=x86-64-v3"))) 94 void f_x86_64_v3(void) {} 95 96 // CHECK: [[f_x86_64_v4]] = {{.*}}"target-cpu"="x86-64-v4" 97 // CHECK-SAME: "target-features"="+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+evex512,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" 98 __attribute__((target("arch=x86-64-v4"))) 99 void f_x86_64_v4(void) {} 100 101 // CHECK: [[f_avx10_1_256]] = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave,-amx-avx512,-avx10.1-512,-avx10.2-512,-evex512" 102 __attribute__((target("avx10.1-256"))) 103 void f_avx10_1_256(void) {} 104 105 // CHECK: [[f_avx10_1_512]] = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx10.1-512,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+evex512,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave" 106 __attribute__((target("avx10.1-512"))) 107 void f_avx10_1_512(void) {} 108 109 // CHECK: [[f_prefer_256_bit]] = {{.*}}"target-features"="{{.*}}+prefer-256-bit 110 __attribute__((target("prefer-256-bit"))) 111 void f_prefer_256_bit(void) {} 112 113 // CHECK: [[f_no_prefer_256_bit]] = {{.*}}"target-features"="{{.*}}-prefer-256-bit 114 __attribute__((target("no-prefer-256-bit"))) 115 void f_no_prefer_256_bit(void) {}