1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --include-generated-funcs --version 4 2 // RUN: %clang_cc1 -triple riscv64-linux-gnu -target-feature +i -emit-llvm -o - %s | FileCheck %s 3 4 __attribute__((target_version("arch=+v"))) int foo1(void) { return 1; } 5 __attribute__((target_version("default"))) int foo1(void) { return 1; } 6 7 __attribute__((target_version("arch=+zbb"))) int foo2(void) { return 1; } 8 __attribute__((target_version("arch=+m"))) int foo2(void) { return 1; } 9 __attribute__((target_version("default"))) int foo2(void) { return 1; } 10 11 __attribute__((target_version("arch=+zbb,+c"))) int foo3(void) { return 1; } 12 __attribute__((target_version("arch=+m"))) int foo3(void) { return 1; } 13 __attribute__((target_version("default"))) int foo3(void) { return 1; } 14 15 __attribute__((target_version("arch=+zba"))) int foo4(void) { return 1; } 16 __attribute__((target_version("arch=+zbb"))) int foo4(void) { return 1; } 17 __attribute__((target_version("arch=+zbb,+zba"))) int foo4(void) { return 1; } 18 __attribute__((target_version("default"))) int foo4(void) { return 1; } 19 20 __attribute__((target_version("arch=+zba"))) int foo5(void) { return 1; } 21 __attribute__((target_version("arch=+zbb,+zba"))) int foo5(void) { return 1; } 22 __attribute__((target_version("arch=+zbb"))) int foo5(void) { return 1; } 23 __attribute__((target_version("default"))) int foo5(void) { return 1; } 24 25 __attribute__((target_version("arch=+zba"))) int foo6(void) { return 1; } 26 __attribute__((target_version("arch=+zbb"))) int foo6(void) { return 1; } 27 __attribute__((target_version("arch=+zbb,+zba;priority=10"))) int foo6(void) { return 1; } 28 __attribute__((target_version("default"))) int foo6(void) { return 1; } 29 30 __attribute__((target_version("priority=8;arch=+zba"))) int foo7(void) { return 1; } 31 __attribute__((target_version("arch=+zbb;priority=9"))) int foo7(void) { return 1; } 32 __attribute__((target_version("arch=+zbb,+zba;priority=10"))) int foo7(void) { return 1; } 33 __attribute__((target_version("default"))) int foo7(void) { return 1; } 34 35 int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7(); } 36 //. 37 // CHECK: @__riscv_feature_bits = external dso_local global { i32, [2 x i64] } 38 // CHECK: @foo1 = weak_odr ifunc i32 (), ptr @foo1.resolver 39 // CHECK: @foo2 = weak_odr ifunc i32 (), ptr @foo2.resolver 40 // CHECK: @foo3 = weak_odr ifunc i32 (), ptr @foo3.resolver 41 // CHECK: @foo4 = weak_odr ifunc i32 (), ptr @foo4.resolver 42 // CHECK: @foo5 = weak_odr ifunc i32 (), ptr @foo5.resolver 43 // CHECK: @foo6 = weak_odr ifunc i32 (), ptr @foo6.resolver 44 // CHECK: @foo7 = weak_odr ifunc i32 (), ptr @foo7.resolver 45 //. 46 // CHECK-LABEL: define dso_local signext i32 @foo1._v( 47 // CHECK-SAME: ) #[[ATTR0:[0-9]+]] { 48 // CHECK-NEXT: entry: 49 // CHECK-NEXT: ret i32 1 50 // 51 // 52 // CHECK-LABEL: define dso_local signext i32 @foo1.default( 53 // CHECK-SAME: ) #[[ATTR1:[0-9]+]] { 54 // CHECK-NEXT: entry: 55 // CHECK-NEXT: ret i32 1 56 // 57 // 58 // CHECK-LABEL: define dso_local signext i32 @foo2._zbb( 59 // CHECK-SAME: ) #[[ATTR2:[0-9]+]] { 60 // CHECK-NEXT: entry: 61 // CHECK-NEXT: ret i32 1 62 // 63 // 64 // CHECK-LABEL: define dso_local signext i32 @foo2._m( 65 // CHECK-SAME: ) #[[ATTR3:[0-9]+]] { 66 // CHECK-NEXT: entry: 67 // CHECK-NEXT: ret i32 1 68 // 69 // 70 // CHECK-LABEL: define dso_local signext i32 @foo2.default( 71 // CHECK-SAME: ) #[[ATTR1]] { 72 // CHECK-NEXT: entry: 73 // CHECK-NEXT: ret i32 1 74 // 75 // 76 // CHECK-LABEL: define dso_local signext i32 @foo3._c_zbb( 77 // CHECK-SAME: ) #[[ATTR4:[0-9]+]] { 78 // CHECK-NEXT: entry: 79 // CHECK-NEXT: ret i32 1 80 // 81 // 82 // CHECK-LABEL: define dso_local signext i32 @foo3._m( 83 // CHECK-SAME: ) #[[ATTR3]] { 84 // CHECK-NEXT: entry: 85 // CHECK-NEXT: ret i32 1 86 // 87 // 88 // CHECK-LABEL: define dso_local signext i32 @foo3.default( 89 // CHECK-SAME: ) #[[ATTR1]] { 90 // CHECK-NEXT: entry: 91 // CHECK-NEXT: ret i32 1 92 // 93 // 94 // CHECK-LABEL: define dso_local signext i32 @foo4._zba( 95 // CHECK-SAME: ) #[[ATTR5:[0-9]+]] { 96 // CHECK-NEXT: entry: 97 // CHECK-NEXT: ret i32 1 98 // 99 // 100 // CHECK-LABEL: define dso_local signext i32 @foo4._zbb( 101 // CHECK-SAME: ) #[[ATTR2]] { 102 // CHECK-NEXT: entry: 103 // CHECK-NEXT: ret i32 1 104 // 105 // 106 // CHECK-LABEL: define dso_local signext i32 @foo4._zba_zbb( 107 // CHECK-SAME: ) #[[ATTR6:[0-9]+]] { 108 // CHECK-NEXT: entry: 109 // CHECK-NEXT: ret i32 1 110 // 111 // 112 // CHECK-LABEL: define dso_local signext i32 @foo4.default( 113 // CHECK-SAME: ) #[[ATTR1]] { 114 // CHECK-NEXT: entry: 115 // CHECK-NEXT: ret i32 1 116 // 117 // 118 // CHECK-LABEL: define dso_local signext i32 @foo5._zba( 119 // CHECK-SAME: ) #[[ATTR5]] { 120 // CHECK-NEXT: entry: 121 // CHECK-NEXT: ret i32 1 122 // 123 // 124 // CHECK-LABEL: define dso_local signext i32 @foo5._zba_zbb( 125 // CHECK-SAME: ) #[[ATTR6]] { 126 // CHECK-NEXT: entry: 127 // CHECK-NEXT: ret i32 1 128 // 129 // 130 // CHECK-LABEL: define dso_local signext i32 @foo5._zbb( 131 // CHECK-SAME: ) #[[ATTR2]] { 132 // CHECK-NEXT: entry: 133 // CHECK-NEXT: ret i32 1 134 // 135 // 136 // CHECK-LABEL: define dso_local signext i32 @foo5.default( 137 // CHECK-SAME: ) #[[ATTR1]] { 138 // CHECK-NEXT: entry: 139 // CHECK-NEXT: ret i32 1 140 // 141 // 142 // CHECK-LABEL: define dso_local signext i32 @foo6._zba( 143 // CHECK-SAME: ) #[[ATTR5]] { 144 // CHECK-NEXT: entry: 145 // CHECK-NEXT: ret i32 1 146 // 147 // 148 // CHECK-LABEL: define dso_local signext i32 @foo6._zbb( 149 // CHECK-SAME: ) #[[ATTR2]] { 150 // CHECK-NEXT: entry: 151 // CHECK-NEXT: ret i32 1 152 // 153 // 154 // CHECK-LABEL: define dso_local signext i32 @foo6._zba_zbb( 155 // CHECK-SAME: ) #[[ATTR6]] { 156 // CHECK-NEXT: entry: 157 // CHECK-NEXT: ret i32 1 158 // 159 // 160 // CHECK-LABEL: define dso_local signext i32 @foo6.default( 161 // CHECK-SAME: ) #[[ATTR1]] { 162 // CHECK-NEXT: entry: 163 // CHECK-NEXT: ret i32 1 164 // 165 // 166 // CHECK-LABEL: define dso_local signext i32 @foo7._zba( 167 // CHECK-SAME: ) #[[ATTR5]] { 168 // CHECK-NEXT: entry: 169 // CHECK-NEXT: ret i32 1 170 // 171 // 172 // CHECK-LABEL: define dso_local signext i32 @foo7._zbb( 173 // CHECK-SAME: ) #[[ATTR2]] { 174 // CHECK-NEXT: entry: 175 // CHECK-NEXT: ret i32 1 176 // 177 // 178 // CHECK-LABEL: define dso_local signext i32 @foo7._zba_zbb( 179 // CHECK-SAME: ) #[[ATTR6]] { 180 // CHECK-NEXT: entry: 181 // CHECK-NEXT: ret i32 1 182 // 183 // 184 // CHECK-LABEL: define dso_local signext i32 @foo7.default( 185 // CHECK-SAME: ) #[[ATTR1]] { 186 // CHECK-NEXT: entry: 187 // CHECK-NEXT: ret i32 1 188 // 189 // 190 // CHECK-LABEL: define dso_local signext i32 @bar( 191 // CHECK-SAME: ) #[[ATTR1]] { 192 // CHECK-NEXT: entry: 193 // CHECK-NEXT: [[CALL:%.*]] = call signext i32 @foo1() 194 // CHECK-NEXT: [[CALL1:%.*]] = call signext i32 @foo2() 195 // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]] 196 // CHECK-NEXT: [[CALL2:%.*]] = call signext i32 @foo3() 197 // CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]] 198 // CHECK-NEXT: [[CALL4:%.*]] = call signext i32 @foo4() 199 // CHECK-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]] 200 // CHECK-NEXT: [[CALL6:%.*]] = call signext i32 @foo5() 201 // CHECK-NEXT: [[ADD7:%.*]] = add nsw i32 [[ADD5]], [[CALL6]] 202 // CHECK-NEXT: [[CALL8:%.*]] = call signext i32 @foo6() 203 // CHECK-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD7]], [[CALL8]] 204 // CHECK-NEXT: [[CALL10:%.*]] = call signext i32 @foo7() 205 // CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD9]], [[CALL10]] 206 // CHECK-NEXT: ret i32 [[ADD11]] 207 // 208 // 209 // CHECK-LABEL: define weak_odr ptr @foo1.resolver() comdat { 210 // CHECK-NEXT: resolver_entry: 211 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 212 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 213 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 2097152 214 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2097152 215 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 216 // CHECK: resolver_return: 217 // CHECK-NEXT: ret ptr @foo1._v 218 // CHECK: resolver_else: 219 // CHECK-NEXT: ret ptr @foo1.default 220 // 221 // 222 // CHECK-LABEL: define weak_odr ptr @foo2.resolver() comdat { 223 // CHECK-NEXT: resolver_entry: 224 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 225 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 226 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 268435456 227 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 268435456 228 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 229 // CHECK: resolver_return: 230 // CHECK-NEXT: ret ptr @foo2._zbb 231 // CHECK: resolver_else: 232 // CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 233 // CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 4096 234 // CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 4096 235 // CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]] 236 // CHECK: resolver_return1: 237 // CHECK-NEXT: ret ptr @foo2._m 238 // CHECK: resolver_else2: 239 // CHECK-NEXT: ret ptr @foo2.default 240 // 241 // 242 // CHECK-LABEL: define weak_odr ptr @foo3.resolver() comdat { 243 // CHECK-NEXT: resolver_entry: 244 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 245 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 246 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 268435460 247 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 268435460 248 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 249 // CHECK: resolver_return: 250 // CHECK-NEXT: ret ptr @foo3._c_zbb 251 // CHECK: resolver_else: 252 // CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 253 // CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 4096 254 // CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 4096 255 // CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]] 256 // CHECK: resolver_return1: 257 // CHECK-NEXT: ret ptr @foo3._m 258 // CHECK: resolver_else2: 259 // CHECK-NEXT: ret ptr @foo3.default 260 // 261 // 262 // CHECK-LABEL: define weak_odr ptr @foo4.resolver() comdat { 263 // CHECK-NEXT: resolver_entry: 264 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 265 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 266 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 134217728 267 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 134217728 268 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 269 // CHECK: resolver_return: 270 // CHECK-NEXT: ret ptr @foo4._zba 271 // CHECK: resolver_else: 272 // CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 273 // CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 268435456 274 // CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 268435456 275 // CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]] 276 // CHECK: resolver_return1: 277 // CHECK-NEXT: ret ptr @foo4._zbb 278 // CHECK: resolver_else2: 279 // CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 280 // CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 402653184 281 // CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 402653184 282 // CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]] 283 // CHECK: resolver_return3: 284 // CHECK-NEXT: ret ptr @foo4._zba_zbb 285 // CHECK: resolver_else4: 286 // CHECK-NEXT: ret ptr @foo4.default 287 // 288 // 289 // CHECK-LABEL: define weak_odr ptr @foo5.resolver() comdat { 290 // CHECK-NEXT: resolver_entry: 291 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 292 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 293 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 134217728 294 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 134217728 295 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 296 // CHECK: resolver_return: 297 // CHECK-NEXT: ret ptr @foo5._zba 298 // CHECK: resolver_else: 299 // CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 300 // CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 402653184 301 // CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 402653184 302 // CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]] 303 // CHECK: resolver_return1: 304 // CHECK-NEXT: ret ptr @foo5._zba_zbb 305 // CHECK: resolver_else2: 306 // CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 307 // CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 268435456 308 // CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 268435456 309 // CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]] 310 // CHECK: resolver_return3: 311 // CHECK-NEXT: ret ptr @foo5._zbb 312 // CHECK: resolver_else4: 313 // CHECK-NEXT: ret ptr @foo5.default 314 // 315 // 316 // CHECK-LABEL: define weak_odr ptr @foo6.resolver() comdat { 317 // CHECK-NEXT: resolver_entry: 318 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 319 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 320 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 402653184 321 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 402653184 322 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 323 // CHECK: resolver_return: 324 // CHECK-NEXT: ret ptr @foo6._zba_zbb 325 // CHECK: resolver_else: 326 // CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 327 // CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 134217728 328 // CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 134217728 329 // CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]] 330 // CHECK: resolver_return1: 331 // CHECK-NEXT: ret ptr @foo6._zba 332 // CHECK: resolver_else2: 333 // CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 334 // CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 268435456 335 // CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 268435456 336 // CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]] 337 // CHECK: resolver_return3: 338 // CHECK-NEXT: ret ptr @foo6._zbb 339 // CHECK: resolver_else4: 340 // CHECK-NEXT: ret ptr @foo6.default 341 // 342 // 343 // CHECK-LABEL: define weak_odr ptr @foo7.resolver() comdat { 344 // CHECK-NEXT: resolver_entry: 345 // CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null) 346 // CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 347 // CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 402653184 348 // CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 402653184 349 // CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]] 350 // CHECK: resolver_return: 351 // CHECK-NEXT: ret ptr @foo7._zba_zbb 352 // CHECK: resolver_else: 353 // CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 354 // CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 268435456 355 // CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 268435456 356 // CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]] 357 // CHECK: resolver_return1: 358 // CHECK-NEXT: ret ptr @foo7._zbb 359 // CHECK: resolver_else2: 360 // CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8 361 // CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 134217728 362 // CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 134217728 363 // CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]] 364 // CHECK: resolver_return3: 365 // CHECK-NEXT: ret ptr @foo7._zba 366 // CHECK: resolver_else4: 367 // CHECK-NEXT: ret ptr @foo7.default 368 // 369 //. 370 // CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+d,+f,+i,+v,+zicsr,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b" } 371 // CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i" } 372 // CHECK: attributes #[[ATTR2]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zbb" } 373 // CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+m,+zmmul" } 374 // CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+c,+i,+zbb" } 375 // CHECK: attributes #[[ATTR5]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zba" } 376 // CHECK: attributes #[[ATTR6]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zba,+zbb" } 377 //. 378 // CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} 379 // CHECK: [[META1:![0-9]+]] = !{i32 1, !"target-abi", !"lp64"} 380 // CHECK: [[META2:![0-9]+]] = !{i32 6, !"riscv-isa", [[META3:![0-9]+]]} 381 // CHECK: [[META3]] = !{!"rv64i2p1"} 382 // CHECK: [[META4:![0-9]+]] = !{i32 8, !"SmallDataLimit", i32 0} 383 // CHECK: [[META5:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"} 384 //. 385