xref: /llvm-project/clang/test/CodeGen/atomic-arm.c (revision d3aed4f401fa35ea986d3967c529f4d2b24e2bb6)
1 // RUN: %clang_cc1 -triple thumbv6m-apple-unknown-macho %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
2 // RUN: %clang_cc1 -triple thumbv7m-apple-unknown-macho %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK,CHECK-V7M
3 // RUN: %clang_cc1 -triple thumbv7-apple-ios13.0 %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK,CHECK-HOSTED
4 // RUN: %clang_cc1 -triple thumbv7k-apple-watchos5.0 %s -emit-llvm -o - | FileCheck %s --check-prefixes=CHECK,CHECK-HOSTED
5 
6 
7 // CHECK-V6M: @always1 = global i32 0
8 // CHECK-V6M: @always4 = global i32 0
9 // CHECK-V6M: @always8 = global i32 0
10 
11 // CHECK-V7M: @always1 = global i32 1
12 // CHECK-V7M: @always4 = global i32 1
13 // CHECK-V7M: @always8 = global i32 0
14 
15 // CHECK-HOSTED: @always1 = global i32 1
16 // CHECK-HOSTED: @always4 = global i32 1
17 // CHECK-HOSTED: @always8 = global i32 1
18 
19 int always1 = __atomic_always_lock_free(1, 0);
20 int always4 = __atomic_always_lock_free(4, 0);
21 int always8 = __atomic_always_lock_free(8, 0);
22 
lock_free_1()23 int lock_free_1() {
24   // CHECK-LABEL: @lock_free_1
25   // CHECK-V6M:   [[RES:%.*]] = call arm_aapcscc zeroext i1 @__atomic_is_lock_free(i32 noundef 1, ptr noundef null)
26   // CHECK-V6M:   [[RES32:%.*]] = zext i1 [[RES]] to i32
27   // CHECK-V6M:   ret i32 [[RES32]]
28 
29   // CHECK-V7M: ret i32 1
30   // CHECK-HOSTED: ret i32 1
31   return __c11_atomic_is_lock_free(1);
32 }
33 
lock_free_4()34 int lock_free_4() {
35   // CHECK-LABEL: @lock_free_4
36   // CHECK-V6M:   [[RES:%.*]] = call arm_aapcscc zeroext i1 @__atomic_is_lock_free(i32 noundef 4, ptr noundef null)
37   // CHECK-V6M:   [[RES32:%.*]] = zext i1 [[RES]] to i32
38   // CHECK-V6M:   ret i32 [[RES32]]
39 
40   // CHECK-V7M: ret i32 1
41   // CHECK-HOSTED: ret i32 1
42   return __c11_atomic_is_lock_free(4);
43 }
44 
lock_free_8()45 int lock_free_8() {
46   // CHECK-LABEL: @lock_free_8
47   // CHECK-V6M:   [[RES:%.*]] = call arm_aapcscc zeroext i1 @__atomic_is_lock_free(i32 noundef 8, ptr noundef null)
48   // CHECK-V6M:   [[RES32:%.*]] = zext i1 [[RES]] to i32
49   // CHECK-V6M:   ret i32 [[RES32]]
50 
51   // CHECK-V7M:   [[RES:%.*]] = call arm_aapcscc zeroext i1 @__atomic_is_lock_free(i32 noundef 8, ptr noundef null)
52   // CHECK-V7M:   [[RES32:%.*]] = zext i1 [[RES]] to i32
53   // CHECK-V7M:   ret i32 [[RES32]]
54 
55   // CHECK-HOSTED: ret i32 1
56   return __c11_atomic_is_lock_free(8);
57 }
58