1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature
2 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck %s
3
4 // REQUIRES: aarch64-registered-target || arm-registered-target
5
6 #include <arm_neon.h>
7
8 // CHECK-LABEL: define {{[^@]+}}@test_vcvta_s32_f32
9 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
10 // CHECK-NEXT: entry:
11 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
12 // CHECK-NEXT: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> [[A]])
13 // CHECK-NEXT: ret <2 x i32> [[VCVTA_S32_V1_I]]
14 //
test_vcvta_s32_f32(float32x2_t a)15 int32x2_t test_vcvta_s32_f32(float32x2_t a) {
16 return vcvta_s32_f32(a);
17 }
18
19 // CHECK-LABEL: define {{[^@]+}}@test_vcvta_u32_f32
20 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
21 // CHECK-NEXT: entry:
22 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
23 // CHECK-NEXT: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> [[A]])
24 // CHECK-NEXT: ret <2 x i32> [[VCVTA_U32_V1_I]]
25 //
test_vcvta_u32_f32(float32x2_t a)26 uint32x2_t test_vcvta_u32_f32(float32x2_t a) {
27 return vcvta_u32_f32(a);
28 }
29
30 // CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_s32_f32
31 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {
32 // CHECK-NEXT: entry:
33 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
34 // CHECK-NEXT: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> [[A]])
35 // CHECK-NEXT: ret <4 x i32> [[VCVTAQ_S32_V1_I]]
36 //
test_vcvtaq_s32_f32(float32x4_t a)37 int32x4_t test_vcvtaq_s32_f32(float32x4_t a) {
38 return vcvtaq_s32_f32(a);
39 }
40
41 // CHECK-LABEL: define {{[^@]+}}@test_vcvtaq_u32_f32
42 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
43 // CHECK-NEXT: entry:
44 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
45 // CHECK-NEXT: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> [[A]])
46 // CHECK-NEXT: ret <4 x i32> [[VCVTAQ_U32_V1_I]]
47 //
test_vcvtaq_u32_f32(float32x4_t a)48 uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) {
49 return vcvtaq_u32_f32(a);
50 }
51
52 // CHECK-LABEL: define {{[^@]+}}@test_vcvtn_s32_f32
53 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
54 // CHECK-NEXT: entry:
55 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
56 // CHECK-NEXT: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> [[A]])
57 // CHECK-NEXT: ret <2 x i32> [[VCVTN_S32_V1_I]]
58 //
test_vcvtn_s32_f32(float32x2_t a)59 int32x2_t test_vcvtn_s32_f32(float32x2_t a) {
60 return vcvtn_s32_f32(a);
61 }
62
63 // CHECK-LABEL: define {{[^@]+}}@test_vcvtn_u32_f32
64 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
65 // CHECK-NEXT: entry:
66 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
67 // CHECK-NEXT: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> [[A]])
68 // CHECK-NEXT: ret <2 x i32> [[VCVTN_U32_V1_I]]
69 //
test_vcvtn_u32_f32(float32x2_t a)70 uint32x2_t test_vcvtn_u32_f32(float32x2_t a) {
71 return vcvtn_u32_f32(a);
72 }
73
74 // CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_s32_f32
75 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
76 // CHECK-NEXT: entry:
77 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
78 // CHECK-NEXT: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> [[A]])
79 // CHECK-NEXT: ret <4 x i32> [[VCVTNQ_S32_V1_I]]
80 //
test_vcvtnq_s32_f32(float32x4_t a)81 int32x4_t test_vcvtnq_s32_f32(float32x4_t a) {
82 return vcvtnq_s32_f32(a);
83 }
84
85 // CHECK-LABEL: define {{[^@]+}}@test_vcvtnq_u32_f32
86 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
87 // CHECK-NEXT: entry:
88 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
89 // CHECK-NEXT: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> [[A]])
90 // CHECK-NEXT: ret <4 x i32> [[VCVTNQ_U32_V1_I]]
91 //
test_vcvtnq_u32_f32(float32x4_t a)92 uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) {
93 return vcvtnq_u32_f32(a);
94 }
95
96 // CHECK-LABEL: define {{[^@]+}}@test_vcvtp_s32_f32
97 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
98 // CHECK-NEXT: entry:
99 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
100 // CHECK-NEXT: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> [[A]])
101 // CHECK-NEXT: ret <2 x i32> [[VCVTP_S32_V1_I]]
102 //
test_vcvtp_s32_f32(float32x2_t a)103 int32x2_t test_vcvtp_s32_f32(float32x2_t a) {
104 return vcvtp_s32_f32(a);
105 }
106
107 // CHECK-LABEL: define {{[^@]+}}@test_vcvtp_u32_f32
108 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
109 // CHECK-NEXT: entry:
110 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
111 // CHECK-NEXT: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> [[A]])
112 // CHECK-NEXT: ret <2 x i32> [[VCVTP_U32_V1_I]]
113 //
test_vcvtp_u32_f32(float32x2_t a)114 uint32x2_t test_vcvtp_u32_f32(float32x2_t a) {
115 return vcvtp_u32_f32(a);
116 }
117
118 // CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_s32_f32
119 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
120 // CHECK-NEXT: entry:
121 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
122 // CHECK-NEXT: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> [[A]])
123 // CHECK-NEXT: ret <4 x i32> [[VCVTPQ_S32_V1_I]]
124 //
test_vcvtpq_s32_f32(float32x4_t a)125 int32x4_t test_vcvtpq_s32_f32(float32x4_t a) {
126 return vcvtpq_s32_f32(a);
127 }
128
129 // CHECK-LABEL: define {{[^@]+}}@test_vcvtpq_u32_f32
130 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
131 // CHECK-NEXT: entry:
132 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
133 // CHECK-NEXT: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> [[A]])
134 // CHECK-NEXT: ret <4 x i32> [[VCVTPQ_U32_V1_I]]
135 //
test_vcvtpq_u32_f32(float32x4_t a)136 uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) {
137 return vcvtpq_u32_f32(a);
138 }
139
140 // CHECK-LABEL: define {{[^@]+}}@test_vcvtm_s32_f32
141 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
142 // CHECK-NEXT: entry:
143 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
144 // CHECK-NEXT: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> [[A]])
145 // CHECK-NEXT: ret <2 x i32> [[VCVTM_S32_V1_I]]
146 //
test_vcvtm_s32_f32(float32x2_t a)147 int32x2_t test_vcvtm_s32_f32(float32x2_t a) {
148 return vcvtm_s32_f32(a);
149 }
150
151 // CHECK-LABEL: define {{[^@]+}}@test_vcvtm_u32_f32
152 // CHECK-SAME: (<2 x float> noundef [[A:%.*]]) #[[ATTR0]] {
153 // CHECK-NEXT: entry:
154 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x float> [[A]] to <8 x i8>
155 // CHECK-NEXT: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> [[A]])
156 // CHECK-NEXT: ret <2 x i32> [[VCVTM_U32_V1_I]]
157 //
test_vcvtm_u32_f32(float32x2_t a)158 uint32x2_t test_vcvtm_u32_f32(float32x2_t a) {
159 return vcvtm_u32_f32(a);
160 }
161
162 // CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_s32_f32
163 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
164 // CHECK-NEXT: entry:
165 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
166 // CHECK-NEXT: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> [[A]])
167 // CHECK-NEXT: ret <4 x i32> [[VCVTMQ_S32_V1_I]]
168 //
test_vcvtmq_s32_f32(float32x4_t a)169 int32x4_t test_vcvtmq_s32_f32(float32x4_t a) {
170 return vcvtmq_s32_f32(a);
171 }
172
173 // CHECK-LABEL: define {{[^@]+}}@test_vcvtmq_u32_f32
174 // CHECK-SAME: (<4 x float> noundef [[A:%.*]]) #[[ATTR1]] {
175 // CHECK-NEXT: entry:
176 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A]] to <16 x i8>
177 // CHECK-NEXT: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> [[A]])
178 // CHECK-NEXT: ret <4 x i32> [[VCVTMQ_U32_V1_I]]
179 //
test_vcvtmq_u32_f32(float32x4_t a)180 uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) {
181 return vcvtmq_u32_f32(a);
182 }
183
184