1 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
2 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
3 // RUN: opt -S -passes=mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
4 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
5 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
6 // RUN: opt -S -passes=mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
7
8 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
9 // RUN: -ffp-exception-behavior=strict \
10 // RUN: -fexperimental-strict-floating-point \
11 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
12 // RUN: opt -S -passes=mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
13 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
14 // RUN: -ffp-exception-behavior=strict \
15 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
16 // RUN: opt -S -passes=mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
17
18 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
19 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
20 // RUN: opt -S -passes=mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM32 %s
21 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
22 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
23 // RUN: opt -S -passes=mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM64 %s
24
25 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
26 // RUN: -ffp-exception-behavior=strict \
27 // RUN: -fexperimental-strict-floating-point \
28 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
29 // RUN: opt -S -passes=mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM32 %s
30 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
31 // RUN: -ffp-exception-behavior=strict \
32 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
33 // RUN: opt -S -passes=mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM64 %s
34
35 // REQUIRES: arm-registered-target,aarch64-registered-target
36
37 #include <arm_neon.h>
38
39 // COMMON-LABEL: test_vrndi_f32
40 // COMMONIR: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
41 // UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
42 // CONSTRAINED: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.experimental.constrained.nearbyint.v2f32(<2 x float> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
43 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
44 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
45 // CHECK-ASM64: frinti v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
46 // COMMONIR: ret <2 x float> [[VRNDI1_I]]
test_vrndi_f32(float32x2_t a)47 float32x2_t test_vrndi_f32(float32x2_t a) {
48 return vrndi_f32(a);
49 }
50
51 // COMMON-LABEL: test_vrndiq_f32
52 // COMMONIR: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
53 // UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
54 // CONSTRAINED: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
55 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
56 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
57 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
58 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
59 // CHECK-ASM64: frinti v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
60 // COMMONIR: ret <4 x float> [[VRNDI1_I]]
test_vrndiq_f32(float32x4_t a)61 float32x4_t test_vrndiq_f32(float32x4_t a) {
62 return vrndiq_f32(a);
63 }
64